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Sample records for based readout chip

  1. Pixel detector readout chip

    CERN Multimedia

    1991-01-01

    Close-up of a pixel detector readout chip. The photograph shows an aera of 1 mm x 2 mm containing 12 separate readout channels. The entire chip contains 1000 readout channels (around 80 000 transistors) covering a sensitive area of 8 mm x 5 mm. The chip has been mounted on a silicon detector to detect high energy particles.

  2. Readout Architecture for Hybrid Pixel Readout Chips

    CERN Document Server

    AUTHOR|(SzGeCERN)694170; Westerlund, Tomi; Wyllie, Ken

    The original contribution of this thesis to knowledge are novel digital readout architectures for hybrid pixel readout chips. The thesis presents asynchronous bus-based architecture, a data-node based column architecture and a network-based pixel matrix architecture for data transportation. It is shown that the data-node architecture achieves readout efficiency 99 % with half the output rate as a bus-based system. The network-based solution avoids ``broken'' columns due to some manufacturing errors, and it distributes internal data traffic more evenly across the pixel matrix than column-based architectures. An improvement of $>$ 10 % to the efficiency is achieved with uniform and non-uniform hit occupancies. Architectural design has been done using transaction level modeling ($TLM$) and sequential high-level design techniques for reducing the design and simulation time. It has been possible to simulate tens of column and full chip architectures using the high-level techniques. A decrease of $>$ 10 in run-time...

  3. Test and improvement of readout system based on APV25 chip for GEM detector

    International Nuclear Information System (INIS)

    Hu Shouyang; Jian Siyu; Zhou Jing; Shan Chao; Li Xinglong; Li Xia; Li Xiaomei; Zhou Yi

    2014-01-01

    Gas electron multiplier (GEM) is the most promising position sensitive gas detector. The new generation of readout electronics system includes APV25 front-end card, multi-purpose digitizer (MPD), VME controller and Linux-based acquisition software DAQ. The construction and preliminary test of this readout system were finished, and the ideal data with the system working frequency of 40 MHz and 20 MHz were obtained. The long time running test shows that the system has a very good time-stable ability. Through optimizing the software configuration and improving hardware quality, the noise level was reduced, and the signal noise ratio was improved. (authors)

  4. Design of a current based readout chip and development of a DEPFET pixel prototype system for the ILC vertex detector

    International Nuclear Information System (INIS)

    Trimpl, M.

    2005-12-01

    The future TeV-scale linear collider ILC (International Linear Collider) offers a large variety of precision measurements complementary to the discovery potential of the LHC (Large Hadron Collider). To fully exploit its physics potential, a vertex detector with unprecedented performance is needed. One proposed technology for the ILC vertex detector is the DEPFET active pixel sensor. The DEPFET sensor offers particle detection with in-pixel amplification by incorporating a field effect transistor into a fully depleted high-ohmic silicon substrate. The device provides an excellent signal-to-noise ratio and a good spatial resolution at the same time. To establish a very fast readout of a DEPFET pixel matrix with row rates of 20 MHz and more, the 128 channel CURO II ASIC has been designed and fabricated. The architecture of the chip is completely based on current mode techniques (SI) perfectly adapted to the current signal of the sensor. For the ILC vertex detector a prototype system with a 64 x 128 DEPFET pixel matrix read out by the CURO II chip has been developed. The design issues and the standalone performance of the readout chip as well as first results with the prototype system will be presented. (orig.)

  5. Design of a current based readout chip and development of a DEPFET pixel prototype system for the ILC vertex detector

    Energy Technology Data Exchange (ETDEWEB)

    Trimpl, M.

    2005-12-15

    The future TeV-scale linear collider ILC (International Linear Collider) offers a large variety of precision measurements complementary to the discovery potential of the LHC (Large Hadron Collider). To fully exploit its physics potential, a vertex detector with unprecedented performance is needed. One proposed technology for the ILC vertex detector is the DEPFET active pixel sensor. The DEPFET sensor offers particle detection with in-pixel amplification by incorporating a field effect transistor into a fully depleted high-ohmic silicon substrate. The device provides an excellent signal-to-noise ratio and a good spatial resolution at the same time. To establish a very fast readout of a DEPFET pixel matrix with row rates of 20 MHz and more, the 128 channel CURO II ASIC has been designed and fabricated. The architecture of the chip is completely based on current mode techniques (SI) perfectly adapted to the current signal of the sensor. For the ILC vertex detector a prototype system with a 64 x 128 DEPFET pixel matrix read out by the CURO II chip has been developed. The design issues and the standalone performance of the readout chip as well as first results with the prototype system will be presented. (orig.)

  6. Digital column readout architectures for hybrid pixel detector readout chips

    International Nuclear Information System (INIS)

    Poikela, T; Plosila, J; Westerlund, T; Buytaert, J; Campbell, M; Gaspari, M De; Llopart, X; Wyllie, K; Gromov, V; Kluit, R; Beuzekom, M van; Zappon, F; Zivkovic, V; Brezina, C; Desch, K; Fu, Y; Kruth, A

    2014-01-01

    In this paper, two digital column architectures suitable for sparse readout of data from a pixel matrix in trigger-less applications are presented. Each architecture reads out a pixel matrix of 256 x 256 pixels with a pixel pitch of 55 μm. The first architecture has been implemented in the Timepix3 chip, and this is presented together with initial measurements. Simulation results and measured data are compared. The second architecture has been designed for Velopix, a readout chip planned for the LHCb VELO upgrade. Unlike Timepix3, this has to be tolerant to radiation-induced single-event effects. Results from post-layout simulations are shown with the circuit architectures

  7. Vertically integrated pixel readout chip for high energy physics

    International Nuclear Information System (INIS)

    Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Khalid, Farah; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom

    2011-01-01

    We report on the development of the vertex detector pixel readout chips based on multi-tier vertically integrated electronics for the International Linear Collider. Some testing results of the VIP2a prototype are presented. The chip is the second iteration of the silicon implementation of the prototype, data-pushed concept of the readout developed at Fermilab. The device was fabricated in the 3D MIT-LL 0.15 (micro)m fully depleted SOI process. The prototype is a three-tier design, featuring 30 x 30 (micro)m 2 pixels, laid out in an array of 48 x 48 pixels.

  8. Silicon microstrip detectors with SVX chip readout

    International Nuclear Information System (INIS)

    Brueckner, W.; Dropmann, F.; Godbersen, M.; Konorov, I.; Koenigsmann, K.; Masciocchi, S.; Newsom, C.; Paul, S.; Povh, B.; Russ, J.S.; Timm, S.; Vorwalter, K.; Werding, R.

    1995-01-01

    A new silicon strip detector has been designed for the fixed target experiment WA89 at CERN. The system of about 30 000 channels is equipped with SVX chips and read out via a double buffer into a FASTBUS memory. The detector provides a fast readout by offering zero-suppressed data extraction on the chip. The silicon counters are the largest detectors built on a monocrystal so far in order to achieve good transversal acceptance. Construction and performance during the 1993 data taking run are discussed. ((orig.))

  9. Spectroscopy study of imaging devices based on silicon Pixel Array Detector coupled to VATAGP7 read-out chips

    International Nuclear Information System (INIS)

    Linhart, V; Lacasta, C; Llosa, G; Stankova, V; Burdette, D; Chessi, E; Cochran, E; Honscheid, K; Kagan, H; Weilhammer, P; Cindro, V; Grosicar, B; Mikuz, M; Studen, A; Zontar, D; Clinthorne, N H

    2011-01-01

    Spectroscopic and timing response studies have been conducted on a detector module consisting of a silicon Pixel Array Detector bonded on two VATAGP7 read-out chips manufactured by Gamma-Medica Ideas using laboratory gamma sources and the internal calibration facilities (the calibration system of the read-out chips). The performed tests have proven that the chips have (i) non-linear calibration curves which can be approximated by power functions, (ii) capability to measure the energy of photons with energy resolution better than 2 keV (exact range and resolution depend on experimental setup), (iii) the internal calibration facility which provides 6 out of 16 available internal calibration charges within our region of interest (spanning the Compton edge of 511 keV photons). The peaks induced by the internal calibration facility are suitable for a fit of the calibration curves. However, they are not suitable for measurements of equivalent noise charge because their full width at half maximum varies with their amplitude. These facts indicate that the VATAGP7 chips are useful and precise tools for a wide variety of spectroscopic devices. We have also explored time walk of the module and peaking time of the spectroscopy signals provided by the chips. We have observed that (iv) the time walk is caused partly by the peaking time of the signals provided by the fast shaper of the chips and partly by the timing uncertainty related to the varying position of the photon interaction, (v) the peaking time of the spectroscopy signals provided by the chips increases with increasing pulse height.

  10. Design and Performance of the CMS Pixel Detector Readout Chip

    CERN Document Server

    Kästli, H C; Erdmann, W; Hörmann, C; Horisberger, R P; Kotlinski, D; Meier, B; Hoermann, Ch.

    2006-01-01

    The readout chip for the CMS pixel detector has to deal with an enormous data rate. On-chip zero suppression is inevitable and hit data must be buffered locally during the latency of the first level trigger. Dead-time must be kept at a minimum. It is dominated by contributions coming from the readout. To keep it low an analog readout scheme has been adopted where pixel addresses are analog coded. We present the architecture of the final CMS pixel detector readout chip with special emphasis on the analog readout chain. Measurements of its performance are discussed.

  11. LSST camera readout chip ASPIC: test tools

    International Nuclear Information System (INIS)

    Antilogus, P; Bailly, Ph; Juramy, C; Lebbolo, H; Martin, D; Jeglot, J; Moniez, M; Tocut, V; Wicek, F

    2012-01-01

    The LSST camera will have more than 3000 video-processing channels. The readout of this large focal plane requires a very compact readout chain. The correlated ''Double Sampling technique'', which is generally used for the signal readout of CCDs, is also adopted for this application and implemented with the so called ''Dual Slope integrator'' method. We have designed and implemented an ASIC for LSST: the Analog Signal Processing asIC (ASPIC). The goal is to amplify the signal close to the output, in order to maximize signal to noise ratio, and to send differential outputs to the digitization. Others requirements are that each chip should process the output of half a CCD, that is 8 channels and should operate at 173 K. A specific Back End board has been designed especially for lab test purposes. It manages the clock signals, digitizes the analog differentials outputs of ASPIC and stores data into a memory. It contains 8 ADCs (18 bits), 512 kwords memory and an USB interface. An FPGA manages all signals from/to all components on board and generates the timing sequence for ASPIC. Its firmware is written in Verilog and VHDL languages. Internals registers permit to define various tests parameters of the ASPIC. A Labview GUI allows to load or update these registers and to check a proper operation. Several series of tests, including linearity, noise and crosstalk, have been performed over the past year to characterize the ASPIC at room and cold temperature. At present, the ASPIC, Back-End board and CCD detectors are being integrated to perform a characterization of the whole readout chain.

  12. LSST camera readout chip ASPIC: test tools

    Science.gov (United States)

    Antilogus, P.; Bailly, Ph; Jeglot, J.; Juramy, C.; Lebbolo, H.; Martin, D.; Moniez, M.; Tocut, V.; Wicek, F.

    2012-02-01

    The LSST camera will have more than 3000 video-processing channels. The readout of this large focal plane requires a very compact readout chain. The correlated ''Double Sampling technique'', which is generally used for the signal readout of CCDs, is also adopted for this application and implemented with the so called ''Dual Slope integrator'' method. We have designed and implemented an ASIC for LSST: the Analog Signal Processing asIC (ASPIC). The goal is to amplify the signal close to the output, in order to maximize signal to noise ratio, and to send differential outputs to the digitization. Others requirements are that each chip should process the output of half a CCD, that is 8 channels and should operate at 173 K. A specific Back End board has been designed especially for lab test purposes. It manages the clock signals, digitizes the analog differentials outputs of ASPIC and stores data into a memory. It contains 8 ADCs (18 bits), 512 kwords memory and an USB interface. An FPGA manages all signals from/to all components on board and generates the timing sequence for ASPIC. Its firmware is written in Verilog and VHDL languages. Internals registers permit to define various tests parameters of the ASPIC. A Labview GUI allows to load or update these registers and to check a proper operation. Several series of tests, including linearity, noise and crosstalk, have been performed over the past year to characterize the ASPIC at room and cold temperature. At present, the ASPIC, Back-End board and CCD detectors are being integrated to perform a characterization of the whole readout chain.

  13. Description of the SAltro-16 chip for gas detector readout

    CERN Document Server

    Aspell, P; Garcia Garcia, E; de Gaspari, M; Mager, M; Musa, L; Rehman, A; Trampitsch, G

    2010-01-01

    The S-ALTRO prototype chip is a mixed-signal integrated circuit designed to be one of the building blocks of the readout electronics for gas detectors. Its architecture is based in the ALTRO (ALICE TPC Read Out) chip, being its main difference the integration of the charge shaping amplifier in the same IC. Just like ALTRO chip, the prototype architecture and programmability make it suitable for the readout of a wider class of detectors. In one single chip, 16 analogue signals from the detector are shaped, digitised, processed, compressed and stored in a multi-acquisition memory. The Analogue-to- Digital converters embedded in the chip have a 10-bit dynamic range and a maximum sampling rate up to 40MHz. After digitisation, a pipelined Data Processor is able to remove from the input signal a wide range of perturbations, related to the non- ideal behaviour of the detector, temperature variation of the electronics, environmental noise, etc. Moreover, the Data Processor is able to suppress the pulse tail within 1�...

  14. MAROC, a generic photomultiplier readout chip

    International Nuclear Information System (INIS)

    Blin, S; Barrillon, P; La Taille, C de

    2010-01-01

    The MAROC ASICs family is dedicated to the readout of 64-channel Multi Anode PMT and similar detectors. Its main roles are to correct the gain spread of MAPMT channels thanks to an individual variable gain preamplifier and to discriminate the input signals (from 50fC i.e 1/3 photo-electron) in order to produce 64 trigger outputs. A multiplexed analog charge output is also available with a dynamic range around 10 pe ( ∼ 1.6 pC) and a 12 bit Wilkinson ADC is embedded. Three versions of this chip have been submitted. MAROC 2 is the production version for the ATLAS luminometer and MAROC3 is a version with lower dissipation and significant improvements concerning the charge (30 pe: ∼ 5 pC) and trigger (discrimination from 10fC). This third version showed very good characteristics that are presented here.

  15. MAROC, a generic photomultiplier readout chip

    Energy Technology Data Exchange (ETDEWEB)

    Blin, S; Barrillon, P; La Taille, C de, E-mail: blin@lal.in2p3.f [CNRS/IN2p3/LAL-OMEGA, Universite Paris Sud, Bat.200, 91898 Orsay (France)

    2010-12-15

    The MAROC ASICs family is dedicated to the readout of 64-channel Multi Anode PMT and similar detectors. Its main roles are to correct the gain spread of MAPMT channels thanks to an individual variable gain preamplifier and to discriminate the input signals (from 50fC i.e 1/3 photo-electron) in order to produce 64 trigger outputs. A multiplexed analog charge output is also available with a dynamic range around 10 pe ( {approx} 1.6 pC) and a 12 bit Wilkinson ADC is embedded. Three versions of this chip have been submitted. MAROC 2 is the production version for the ATLAS luminometer and MAROC3 is a version with lower dissipation and significant improvements concerning the charge (30 pe: {approx} 5 pC) and trigger (discrimination from 10fC). This third version showed very good characteristics that are presented here.

  16. MAROC, a generic photomultiplier readout chip

    Science.gov (United States)

    Blin, S.; Barrillon, P.; de La Taille, C.

    2010-12-01

    The MAROC ASICs family is dedicated to the readout of 64-channel Multi Anode PMT and similar detectors. Its main roles are to correct the gain spread of MAPMT channels thanks to an individual variable gain preamplifier and to discriminate the input signals (from 50fC i.e 1/3 photo-electron) in order to produce 64 trigger outputs. A multiplexed analog charge output is also available with a dynamic range around 10 pe ( ~ 1.6 pC) and a 12 bit Wilkinson ADC is embedded. Three versions of this chip have been submitted. MAROC 2 is the production version for the ATLAS luminometer and MAROC3 is a version with lower dissipation and significant improvements concerning the charge (30 pe: ~ 5 pC) and trigger (discrimination from 10fC). This third version showed very good characteristics that are presented here.

  17. SEU tolerant memory design for the ATLAS pixel readout chip

    International Nuclear Information System (INIS)

    Menouni, M; Barbero, M; Breugnon, P; Fougeron, D; Gensolen, F; Arutinov, D; Backhaus, M; Gonella, L; Hemperek, T; Karagounis, M; Beccherle, R; Darbo, G; Caminada, L; Dube, S; Fleury, J; Garcia-Sciveres, M; Gnani, D; Jensen, F; Gromov, V; Kluit, R

    2013-01-01

    The FE-I4 chip for the B-layer upgrade is designed in a 130 nm CMOS process. For this design, configuration memories are based on the DICE latches where layout considerations are followed to improve the tolerance to SEU. Tests have shown that DICE latches for which layout approaches are adopted are 30 times more tolerant to SEU than the standard DICE latches. To prepare for the new pixel readout chip planned for the future upgrades, a prototype chip containing 512 pixels has been designed in a 65 nm CMOS process and a new approach is adopted for SEU tolerant latches. Results in terms of SEU and TID tolerance are presented.

  18. Readout chip for the CMS pixel detector upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Rossini, Marco, E-mail: marco.rossini@phys.ethz.ch

    2014-11-21

    For the CMS experiment a new pixel detector is planned for installation during the extended shutdown in winter 2016/2017. Among the changes of the detector modified front end electronics will be used for higher efficiency at peak luminosity of the LHC and faster readout. The first prototype versions of the new readout chip have been designed and produced. The results of qualification and calibration for the new chip are presented in this paper.

  19. SVX3: A deadtimeless readout chip for silicon strip detectors

    International Nuclear Information System (INIS)

    Zimmerman, T.; Huffman, T.; Srage, J.; Stroehmer, R.; Yarema, R.; Garcia-Sciveras, M.; Luo, L.; Milgrome, O.

    1997-12-01

    A new silicon strip readout chip called the SVX3 has been designed for the 720,000 channel CDF silicon upgrade at Fermilab. SVX3 incorporates an integrator, analog delay pipeline, ADC, and data sparsification for each of 128 identical channels. Many of the operating parameters are programmable via a serial bit stream, which allows the chip to be used under a variety of conditions. Distinct features of SVX3 include use of a backside substrate contact for optimal ground referencing, and the capability of simultaneous signal acquisition and digital readout allowing deadtimeless operation in the Fermilab Tevatron

  20. Digital Power Consumption Estimations for CHIPIX65 Pixel Readout Chip

    CERN Document Server

    Marcotulli, Andrea

    2016-01-01

    New hybrid pixel detectors with improved resolution capable of dealing with hit rates up to 3 GHz/cm2 will be required for future High Energy Physics experiments in the Large Hadron Collider (LHC) at CERN. Given this, the RD53 collaboration works on the design of the next generation pixel readout chip needed for both the ATLAS and CMS detector phase 2 pixel upgrades. For the RD53 demonstrator chip in 65nm CMOS technology, different architectures are considered. In particular the purpose of this work is estimating the power consumption of the digital architecture of the readout ASIC developed by CHIPIX65 project of the INFN National Scientific Committee. This has been done with modern chip design tools integrated with the VEPIX53 simulation framework that has been developed within the RD53 collaboration in order to assess the performance of the system in very high rate, high energy physics experiments.

  1. Radiation effects on the Viking-2 preamplifier-readout chip

    International Nuclear Information System (INIS)

    Fallot-Burghardt, W.; Hawblitzel, C.; Hofmann, W.; Knoepfle, K.T.; Seeger, M.; Brenner, R.; Nygaard, E.; Rudge, A.; Toker, O.; Weilhammer, P.; Yoshioka, K.

    1994-01-01

    We have studied the radiation sensitivity of the Viking-2 VLSI circuit which has been designed for the readout of silicon strip detectors and manufactured at Mietec in 1.5 μm CMOS technology. Both biased and unbiased chips have been irradiated with a 137 Cs γ source up to a total dose of 2 kGy (200 krad) after which all tested chips were still fully functional. We report the characteristic changes of device parameters with dose, including equivalent noise charge for different capacitive loads, and determine transistor threshold shifts and change of mobilities. ((orig.))

  2. TID-dependent current measurements of IBL readout chips

    Energy Technology Data Exchange (ETDEWEB)

    Dette, Karola [TU Dortmund, Experimentelle Physik IV (Germany); CERN (Switzerland); Collaboration: ATLAS Pixel-Collaboration

    2016-07-01

    The ATLAS detector consists of several subsystems with a hybrid pixel detector as the innermost component of the tracking system. The pixel detector has been composed of three layers of silicon sensor assemblies during the first data taking run of the LHC and has been upgraded with a new 4th layer, the so-called Insertable B-Layer (IBL), in summer 2014. Each silicon sensor of the IBL is connected to a Front End readout chip (FE-I4) via bump bonds. During the first year of data taking an increase of the LV current produced by the readout chips was observed. This increase could be traced back to radiation damage inside the silicon. The dependence of the current on the Total Ionizing Dose (TID) and temperature has been tested with X-ray irradiations and will be presented in this talk.

  3. Towards a new generation of pixel detector readout chips

    CERN Document Server

    Campbell, M; Ballabriga, R.; Frojdh, E.; Heijne, E.; Llopart, X.; Poikela, T.; Tlustos, L.; Valerio, P.; Wong, W.

    2016-01-01

    The Medipix3 Collaboration has broken new ground in spectroscopic X-ray imaging and in single particle detection and tracking. This paper will review briefly the performance and limitations of the present generation of pixel detector readout chips developed by the Collaboration. Through Silicon Via technology has the potential to provide a significant improvement in the tile- ability and more flexibility in the choice of readout architecture. This has been explored in the context of 3 projects with CEA-LETI using Medipix3 and Timepix3 wafers. The next generation of chips will aim to provide improved spectroscopic imaging performance at rates compatible with human CT. It will also aim to provide full spectroscopic images with unprecedented energy and spatial resolution. Some of the opportunities and challenges posed by moving to a more dense CMOS process will be discussed.

  4. SPAD array chips with full frame readout for crystal characterization

    Energy Technology Data Exchange (ETDEWEB)

    Fischer, Peter; Blanco, Roberto; Sacco, Ilaria; Ritzert, Michael [Heidelberg University (Germany); Weyers, Sascha [Fraunhofer Institute for Microelectronic Circuits and Systems (Germany)

    2015-05-18

    We present single photon sensitive 2D camera chips containing 88x88 avalanche photo diodes which can be read out in full frame mode with up to 400.000 frames per second. The sensors have an imaging area of ~5mm x 5mm covered by square pixels of ~56µm x 56µm with a ~55% fill factor in the latest chip generation. The chips contain a self triggering logic with selectable (column) multiplicities of up to >=4 hits within an adjustable coincidence time window. The photon accumulation time window is programmable as well. First prototypes have demonstrated low dark count rates of <50kHz/mm2 (SPAD area) at 10 degree C for 10% masked pixels. One chip version contains an automated readout of the photon cluster position. The readout of the detailed photon distribution for single events allows the characterization of light sharing, optical crosstalk etc., in crystals or crystal arrays as they are used in PET instrumentation. This knowledge could lead to improvements in spatial or temporal resolution.

  5. A prototype pixel readout chip for asynchronous detection applications

    International Nuclear Information System (INIS)

    Raymond, D.M.; Hall, G.; Lewis, A.J.; Sharp, P.H.

    1991-01-01

    A two-dimensional array of amplifier cells has been fabricated as a prototype readout system for a matching array of silicon diode detectors. Each cell contains a preamplifier, shaping amplifier, comparator and analogue signal storage in an area of 300 μmx320 μm using 3 μm CMOS technology. Full size chips will be bump bonded to pixel detector arrays. Low noise and asynchronous operation are novel design features. With noise levels of less than 250 rms electrons for input capacitances up to 600 fF, pixel detectors will be suitable for autoradiography, synchrotron X-ray and high energy particle detection applications. The design of the prototype chip is presented and future developments and prospects for applications are discussed. (orig.)

  6. arXiv Characterization and Verification Environment for the RD53A Pixel Readout Chip in 65 nm CMOS

    CERN Document Server

    Vogt, M.; Hemperek, T.; Janssen, J.; Pohl, D.L.; Daas, M.

    2018-02-02

    The RD53 collaboration is currently designing a large scale prototype pixel readout chip in 65 nm CMOS technology for the phase 2 upgrades at the HL-LHC. The RD53A chip will be available by the end of the year 2017 and will be extensively tested to confirm if the circuit and the architecture make a solid foundation for the final pixel readout chips for the experiments at the HL-LHC. A test and data acquisition system for the RD53A chip is currently under development to perform single-chip and multi-chip module measurements. In addition, the verification of the RD53A design is performed in a dedicated simulation environment. The concept and the implementation of the test and data acquisition system and the simulation environment, which are based on a modular data acquisition and system testing framework, are presented in this work.

  7. Performance of the CAMEX64 silicon strip readout chip

    International Nuclear Information System (INIS)

    Yarema, R.J.

    1989-06-01

    The CAMEX64 is a 64 channel full custom CMOS chip designed specifically for the readout of silicon strip detectors. CAMEX which stands for CMOS Multichannel Analog MultiplEXer for Silicon Strip Detectors was designed by members of the Franhofer Institute for Microelectronic Circuits and Systems and the Max Planck Institute for Physics and Astrophysics. Each CAMEX channel has a switched capacitor charge sensitive amplifier with 4 sampling capacitors and a multiplexing scheme for reading out each of the channels on an analog bus. The device uses multiple sampling capacitors to filter and reduce input noise. Filtering is controlled through sampling techniques using external clocks. The device operates in a double correlated sampling mode and therefore cannot separate detector leakage current from a charge input. Normal operation of this device is similar to all other silicon readout chips designed and built thus far in that there is a data acquisition cycle during which charge is simultaneously accepted on all channels for a short period of time from a detector array, followed by a readout cycle where that charge or hit information is read out. This device works especially well for colliding beam experiments where the time of charge arrival is accurately known. However it can be used in fixed target or asynchronous mode where the time of charge arrival is not well known. In the asynchronous mode it appears that gain is somewhat dependent on the time interval required to decide whether or not to accept charge input information and thus the maximum signal to noise performance found with the synchronous mode may not be achieved in the asynchronous mode. 18 figs., 5 tabs

  8. Design of a CMOS readout circuit on ultra-thin flexible silicon chip for printed strain gauges

    Directory of Open Access Journals (Sweden)

    M. Elsobky

    2017-09-01

    Full Text Available Flexible electronics represents an emerging technology with features enabling several new applications such as wearable electronics and bendable displays. Precise and high-performance sensors readout chips are crucial for high quality flexible electronic products. In this work, the design of a CMOS readout circuit for an array of printed strain gauges is presented. The ultra-thin readout chip and the printed sensors are combined on a thin Benzocyclobutene/Polyimide (BCB/PI substrate to form a Hybrid System-in-Foil (HySiF, which is used as an electronic skin for robotic applications. Each strain gauge utilizes a Wheatstone bridge circuit, where four Aerosol Jet® printed meander-shaped resistors form a full-bridge topology. The readout chip amplifies the output voltage difference (about 5 mV full-scale swing of the strain gauge. One challenge during the sensor interface circuit design is to compensate for the relatively large dc offset (about 30 mV at 1 mA in the bridge output voltage so that the amplified signal span matches the input range of an analog-to-digital converter (ADC. The circuit design uses the 0. 5 µm mixed-signal GATEFORESTTM technology. In order to achieve the mechanical flexibility, the chip fabrication is based on either back thinned wafers or the ChipFilmTM technology, which enables the manufacturing of silicon chips with a thickness of about 20 µm. The implemented readout chip uses a supply of 5 V and includes a 5-bit digital-to-analog converter (DAC, a differential difference amplifier (DDA, and a 10-bit successive approximation register (SAR ADC. The circuit is simulated across process, supply and temperature corners and the simulation results indicate excellent performance in terms of circuit stability and linearity.

  9. Implementation of a Customisable Readout Sequence for the ALICE ITS Upgrade Explorer Family Chips

    CERN Document Server

    Gazzari, Matthias

    2014-01-01

    Within the ALICE ITS upgrade R&D programme the Explorer family chips are developed featuring 11700 pixels which are split into 18 different sectors with different properties. These pixels are read out sequentially leading to a time span of 2.34ms between the first and last pixel. Due to the long readout time, shot noise induced by the leakage currents in the in-pixel analogue memories makes the comparison of different sensor implementations located in distant sectors on the Explorer family chips difficult. In order to reduce this noise contribution a customisable readout sequence is developed to read parts instead of the whole chip which reduces the overall readout time. This readout sequence is integrated in the existing characterisation framework in order to choose the best performing sensor implementation through pixel-by-pixel comparison without readout-induced effects.

  10. Programmable System-on-Chip (PSoC) Embedded Readout Designs for Liquid Helium Level Sensors.

    Science.gov (United States)

    Parasakthi, C; Gireesan, K; Usha Rani, R; Sheela, O K; Janawadkar, M P

    2014-08-01

    This article reports the development of programmable system-on-chip (PSoC)-based embedded readout designs for liquid helium level sensors using resistive liquid vapor discriminators. The system has been built for the measurement of liquid helium level in a concave-bottomed, helmet-shaped, fiber-reinforced plastic cryostat for magnetoencephalography. This design incorporates three carbon resistors as cost-effective sensors, which are mounted at desired heights inside the cryostat and were used to infer the liquid helium level by measuring their temperature-dependent resistance. Localized electrical heating of the carbon resistors was used to discriminate whether the resistor is immersed in liquid helium or its vapor by exploiting the difference in the heat transfer rates in the two environments. This report describes a single PSoC chip for the design and development of a constant current source to drive the three carbon resistors, a multiplexer to route the sensor outputs to the analog-to-digital converter (ADC), a buffer to avoid loading of the sensors, an ADC for digitizing the data, and a display using liquid crystal display cum light-emitting diode modules. The level sensor readout designed with a single PSoC chip enables cost-effective and reliable measurement system design. © 2014 Society for Laboratory Automation and Screening.

  11. Readout electronic for multichannel detectors

    CERN Document Server

    Kulibaba, V I; Naumov, S V

    2001-01-01

    Readout electronics based on the 128-channel chip 'Viking' (IDE AS inc., Norway) is considered. The chip 'Viking' integrates 128 low noise charge-sensitive preamplifiers with tunable CR-(RC) sup 2 shapers,analog memory and multiplexed readout to one output. All modules of readout electronics were designed and produced in KIPT taking into account the published recommendations of IDE AS inc.

  12. Readout electronic for multichannel detectors

    International Nuclear Information System (INIS)

    Kulibaba, V.I.; Maslov, N.I.; Naumov, S.V.

    2001-01-01

    Readout electronics based on the 128-channel chip 'Viking' (IDE AS inc., Norway) is considered. The chip 'Viking' integrates 128 low noise charge-sensitive preamplifiers with tunable CR-(RC) 2 shapers,analog memory and multiplexed readout to one output. All modules of readout electronics were designed and produced in KIPT taking into account the published recommendations of IDE AS inc

  13. The FE-I4 Pixel Readout Chip and the IBL Module

    Energy Technology Data Exchange (ETDEWEB)

    Barbero, Marlon; Arutinov, David; Backhaus, Malte; Fang, Xiao-Chao; Gonella, Laura; Hemperek, Tomasz; Karagounis, Michael; Hans, Kruger; Kruth, Andre; Wermes, Norbert; /Bonn U.; Breugnon, Patrick; Fougeron, Denis; Gensolen, Fabrice; Menouni, Mohsine; Rozanov, Alexander; /Marseille, CPPM; Beccherle, Roberto; Darbo, Giovanni; /INFN, Genoa; Caminada, Lea; Dube, Sourabh; Fleury, Julien; Gnani, Dario; /LBL, Berkeley /NIKHEF, Amsterdam /Gottingen U. /SLAC

    2012-05-01

    FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the 'Insertable B-Layer' project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on test results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept.

  14. Development, optimisation and characterisation of a radiation hard mixed-signal readout chip for LHCb

    Energy Technology Data Exchange (ETDEWEB)

    Loechner, S.

    2006-07-26

    The Beetle chip is a radiation hard, 128 channel pipelined readout chip for silicon strip detectors. The front-end consists of a charge-sensitive preamplifier followed by a CR-RC pulse shaper. The analogue pipeline memory is implemented as a switched capacitor array with a maximum latency of 4us. The 128 analogue channels are multiplexed and transmitted off chip in 900ns via four current output drivers. Beside the pipelined readout path, the Beetle provides a fast discrimination of the front-end pulse. Within this doctoral thesis parts of the radiation hard Beetle readout chip for the LHCb experiment have been developed. The overall chip performances like noise, power consumption, input charge rates have been optimised as well as the elimination of failures so that the Beetle fulfils the requirements of the experiment. Furthermore the characterisation of the chip was a major part of this thesis. Beside the detailed measurement of the chip performance, several irradiation tests and an Single Event Upset (SEU) test were performed. A long-time measurement with a silicon strip detector was also part of this work as well as the development and test of a first mass production test setup. The Beetle chip showed no functional failure and only slight degradation in the analogue performance under irradiation of up to 130Mrad total dose. The Beetle chip fulfils all requirements of the vertex detector (VELO), the trigger tracker (TT) and the inner tracker (IT) and is ready for the start of LHCb end of 2007. (orig.)

  15. Development, optimisation and characterisation of a radiation hard mixed-signal readout chip for LHCb

    International Nuclear Information System (INIS)

    Loechner, S.

    2006-01-01

    The Beetle chip is a radiation hard, 128 channel pipelined readout chip for silicon strip detectors. The front-end consists of a charge-sensitive preamplifier followed by a CR-RC pulse shaper. The analogue pipeline memory is implemented as a switched capacitor array with a maximum latency of 4us. The 128 analogue channels are multiplexed and transmitted off chip in 900ns via four current output drivers. Beside the pipelined readout path, the Beetle provides a fast discrimination of the front-end pulse. Within this doctoral thesis parts of the radiation hard Beetle readout chip for the LHCb experiment have been developed. The overall chip performances like noise, power consumption, input charge rates have been optimised as well as the elimination of failures so that the Beetle fulfils the requirements of the experiment. Furthermore the characterisation of the chip was a major part of this thesis. Beside the detailed measurement of the chip performance, several irradiation tests and an Single Event Upset (SEU) test were performed. A long-time measurement with a silicon strip detector was also part of this work as well as the development and test of a first mass production test setup. The Beetle chip showed no functional failure and only slight degradation in the analogue performance under irradiation of up to 130Mrad total dose. The Beetle chip fulfils all requirements of the vertex detector (VELO), the trigger tracker (TT) and the inner tracker (IT) and is ready for the start of LHCb end of 2007. (orig.)

  16. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    Science.gov (United States)

    Claus, R.; ATLAS Collaboration

    2016-07-01

    The ATLAS muon Cathode Strip Chamber (CSC) back-end readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip Xilinx Zynq series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the Zynq for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf through software waveform feature extraction to output 32 S-links. The full system was installed in Sept. 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning towards LHC Run 2.

  17. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    International Nuclear Information System (INIS)

    Claus, R.

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) back-end readout system has been upgraded during the LHC 2013–2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip Xilinx Zynq series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the Zynq for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf through software waveform feature extraction to output 32 S-links. The full system was installed in Sept. 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning towards LHC Run 2.

  18. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    Science.gov (United States)

    Bartoldus, R.; Claus, R.; Garelli, N.; Herbst, R. T.; Huffer, M.; Iakovidis, G.; Iordanidou, K.; Kwan, K.; Kocian, M.; Lankford, A. J.; Moschovakos, P.; Nelson, A.; Ntekas, K.; Ruckman, L.; Russell, J.; Schernau, M.; Schlenker, S.; Su, D.; Valderanis, C.; Wittgen, M.; Yildiz, S. C.

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run-2 luminosity. The readout design is based on the Reconfigurable Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the Advanced Telecommunication Computing Architecture (ATCA) platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources. Together with auxiliary memories, all these components form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for high speed input and output fiberoptic links and TTC allowed the full system of 320 input links from the 32 chambers to be processed by 6 COBs in one ATCA shelf. The full system was installed in September 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning for LHC Run 2.

  19. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    International Nuclear Information System (INIS)

    Bartoldus, R.; Claus, R.; Garelli, N.; Herbst, R.T.; Huffer, M.; Kocian, M.; Ruckman, L.; Russell, J.; Su, D.; Wittgen, M.; Iakovidis, G.; Iordanidou, K.; Moschovakos, P.; Ntekas, K.; Kwan, K.; Lankford, A.J.; Nelson, A.; Schernau, M.; Schlenker, S.; Valderanis, C.

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run-2 luminosity. The readout design is based on the Reconfigurable Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the Advanced Telecommunication Computing Architecture (ATCA) platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources. Together with auxiliary memories, all these components form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for high speed input and output fiberoptic links and TTC allowed the full system of 320 input links from the 32 chambers to be processed by 6 COBs in one ATCA shelf. The full system was installed in September 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning for LHC Run 2

  20. The PASTA chip. A free-running readout ASIC for silicon strip sensors in PANDA

    Energy Technology Data Exchange (ETDEWEB)

    Goerres, Andre; Stockmanns, Tobias; Ritman, James [Forschungszentrum Juelich GmbH, Juelich (Germany); Rivetti, Angelo [INFN Sezione di Torino, Torino (Italy); Collaboration: PANDA-Collaboration

    2015-07-01

    The PANDA experiment is a multi purpose detector, investigating hadron physics in the charm quark mass regime. It is one of the main experiments at the future FAIR accelerator facility, using anti pp annihilations from a 1.5-15 GeV/c anti-proton beam. Because of the broad physics spectrum and the similarity of event and background signals, PANDA does an event selection based on the complete raw data of the detector. The innermost of PANDA's sub-systems is the Micro Vertex Detector (MVD), consisting of silicon pixel and strip sensors. The latter will be read out by a specialized, free-running readout front-end called PANDA Strip ASIC (PASTA). It has to face a high event rate of up to 40 kHz/ch in an radiation-intense environment. To fulfill the MVD's requirements, it has to give accurate timing information to incoming events (<10 ns) and determine the collected charge with an 8-bit precision. All this has to be done with a very low power design (<4 mW/ch) on a small footprint with less than 21 mm{sup 2} and 60 μm input pitch for 64 channels per chip. Therefore, a simple, time-based readout approach with two independent thresholds is chosen. In this talk, the conceptual design of the full front-end and some aspects of the digital part are presented.

  1. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    AUTHOR|(SzGeCERN)696050; Garelli, N.; Herbst, R.T.; Huffer, M.; Iakovidis, G.; Iordanidou, K.; Kwan, K.; Kocian, M.; Lankford, A.J.; Moschovakos, P.; Nelson, A.; Ntekas, K.; Ruckman, L.; Russell, J.; Schernau, M.; Schlenker, S.; Su, D.; Valderanis, C.; Wittgen, M.; Bartoldus, R.

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfigurable Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the Advanced Telecommunication Computing Architecture (ATCA) platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambe...

  2. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    Energy Technology Data Exchange (ETDEWEB)

    Claus, R., E-mail: claus@slac.stanford.edu

    2016-07-11

    The ATLAS muon Cathode Strip Chamber (CSC) back-end readout system has been upgraded during the LHC 2013–2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip Xilinx Zynq series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the Zynq for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf through software waveform feature extraction to output 32 S-links. The full system was installed in Sept. 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning towards LHC Run 2.

  3. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    ATLAS CSC Collaboration; The ATLAS collaboration

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgrade during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfigurable Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the Advanced Telecommunication Computing Architecture (ATCA) platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chamber...

  4. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    AUTHOR|(SzGeCERN)664042

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) back-end readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip Xilinx Zynq series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the Zynq for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf thr...

  5. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    Claus, Richard; The ATLAS collaboration

    2015-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf thro...

  6. A self-adjusting delay circuit for pixel read-out chips

    International Nuclear Information System (INIS)

    Raith, B.

    1997-01-01

    A simple concept for automatic adjustment of important VLSI-circuit properties was proposed in (Fischer and Joens, Nucl. Instr. and. Meth.). As an application, a self-adjusting monoflop is reviewed, and detailed measurements are discussed regarding a possible implementation in the LHC 1 read-out chip for the ATLAS experiment (ATLAS Internal Note, 1995). (orig.)

  7. Development and characterisation of a radiation hard readout chip for the LHCb experiment

    CERN Document Server

    Baumeister, Daniel; Stachel, Johanna

    2003-01-01

    Within this doctoral thesis parts of the radiation hard readout chip Beetle have been developed and characterised, before and after irradiation. The design work included the analogue memory with the corresponding readout amplifier as well as components of the digital control circuitry. An interface compatible with the I2C-standard and the control logic for event readout have been implemented. A scheme has been developed which ensures the robustness of the Beetle chip against Single-Event Upset (SEU). This includes the consistent use of triple-redundant memory devices together with a self-triggered correction in parts of the circuit. The Beetle ASIC is a 128 channel pipelined readout chip for silicon strip detectors. The front-end consists of a charge-sensitive preamplifier and a CR-RC pulse shaper. It features an equivalent noise charge of ENC = 497 e− +48.3 e−/pF·Cin. The analogue memory is a switched capacitor array, which provides a latency of max. 4 µs. The 128 channels are transmitted off chip in 9...

  8. Integration of the Omega-3 readout chip into a high energy physics experimental data acquisition system

    International Nuclear Information System (INIS)

    Beker, H.; Chesi, E.; Martinengo, P.

    1997-01-01

    The Omega-3 readout chip is presented in detail elsewhere in the same proceedings. We here describe the integration of the chip into present and future experiments describing both hardware and software aspects. We cover preliminary tests in the laboratory and on the beam. The WA97 experiment has already used a pixel telescope in the past and intends to upgrade to the Omega-3 chip. A newly proposed experiment at CERN studying strangeness production in heavy ion collisions also plans to use a similar telescope. Finally, we give an outlook on the ongoing developments in the pixel readout architecture in the context of ALICE, the heavy ion experiment at the LHC collider. (orig.)

  9. Performance of a Fast Binary Readout CMOS Active Pixel Sensor Chip Designed for Charged Particle Detection

    Science.gov (United States)

    Deerli, Yavuz; Besanon, Marc; Besson, Auguste; Claus, Gilles; Deptuch, Grzegorz; Dulinski, Wojciech; Fourches, Nicolas; Goffe, Mathieu; Himmi, Abdelkader; Li, Yan; Lutz, Pierre; Orsini, Fabienne; Szelezniak, Michal

    2006-12-01

    We report on the performance of the MIMOSA8 (HiMAPS1) chip. The chip is a 128times32 pixels array where 24 columns have discriminated binary outputs and eight columns analog test outputs. Offset correction techniques are used extensively in this chip to overcome process related mismatches. The array is divided in four blocks of pixels with different conversion factors and is controlled by a serially programmable sequencer. MIMOSA8 is a representative of the CMOS sensors development option considered as a promising candidate for the Vertex Detector of the future International Linear Collider (ILC). The readout technique, implemented on the chip, combines high spatial resolution capabilities with high processing readout speed. Data acquisition, providing control of the chip and signal buffering and linked to a VME system, was made on the eight analog outputs. Analog data, without and with a 55Fe X-ray source, were acquired and processed using off-line analysis software. From the reconstruction of pixel clusters, built around a central pixel, we deduce that the charge spread is limited to the closest 25 pixels and almost all the available charge is collected. The position of the total charge collection peak (and subsequently the charge-to-voltage conversion factor) stays unaffected when the clock frequency is increased even up to 150 MHz (13.6 mus readout time per frame). The discriminators, placed in the readout chain, have proved to be fully functional. Beam tests have been made with high energy electrons at DESY (Germany) to study detection efficiency. The results prove that MIMOSA8 is the first and fastest successful monolithic active pixel sensor with on-chip signal discrimination for detection of MIPs

  10. Silicon μ-strip detectors with SVX chip readout

    International Nuclear Information System (INIS)

    Brueckner, W.; Dropmann, F.; Godbersen, M.; Konorov, I.; Koenigsmann, K.; Newsom, C.; Paul, S.; Povh, B.; Russ, J.; Timm, S.; Vorwalter, K.; Werding, R.

    1994-01-01

    A new silicon strip detector has been designed and constructed for a fixed target experiment at CERN. The system of about 30 000 channels is equipped with SVX chips and read out via a double buffer into Fastbus memory. Construction and performance during the actual data taking run are discussed. ((orig.))

  11. Integrated microelectronic capacitive readout subsystem for lab-on-a-chip applications

    International Nuclear Information System (INIS)

    Spathis, Christos; Georgakopoulou, Konstantina; Petrellis, Nikos; Efstathiou, Konstantinos; Birbas, Alexios

    2014-01-01

    A mixed-signal capacitive biosensor readout system is presented with its main readout functionality embedded in an integrated circuit, compatible with complementary metal oxide semiconductor-type biosensors. The system modularity allows its usage as a consumable since it eventually leads to a system-on-chip where sensor and readout circuitry are hosted on the same die. In this work, a constant current source is used for measuring the input capacitance. Compared to most capacitive biosensor readout circuits, this method offers the convenience of adjusting both the range and the resolution, depending on the requirements dictated by the application. The chip consumes less than 5 mW of power and the die area is 0.06 mm 2 . It shows a broad input capacitance range (capable of measuring bio-capacitances from 6 pF to 9.8 nF), configurable resolution (down to 1 fF), robustness to various biological experiments and good linearity. The integrated nature of the readout system is proven to be sufficient both for one-time in situ (consumable-type) bio-measurements and its incorporation into a point-of-care system. (paper)

  12. Development of a Timepix3 readout system based on the Merlin readout system

    International Nuclear Information System (INIS)

    Crevatin, G.; Carrato, S.; Horswell, I.; Omar, D.; Tartoni, N.; Cautero, G.

    2015-01-01

    Timepix3 chip is a new ASIC specifically designed to readout hybrid pixel detectors. The main purpose of Timepix3 is to measure the time of arrival of events. This characteristic can be exploited very effectively to develop detectors for time resolved experiments at synchrotron radiation facilities. In order to investigate how the ASIC can be applied to synchrotron experiments the Merlin readout system, developed at Diamond for the Medipix3 ASIC, has been adapted to readout the Timepix3 ASIC. The first tests of the ASIC with pulse injection and with alpha particles show that its behaviour is consistent with its nominal characteristics

  13. A Fastbus-based silicon strip readout system

    International Nuclear Information System (INIS)

    Neoustroev, P.; Stepanov, V.; Svoiski, M.; Uvarov, L.; Matthew, P.; Russ, J.; Cooper, P.

    1995-01-01

    The readout system we describe here is built specifically to work with the LBL-designed SVX chip. It is typical of systems using a master sequencer module to direct the trigger and readout cycles of the sparse data source and to push data into a digitization and storage module. (orig.)

  14. Radiation induced effects in the \\\\ATLAS Insertable B-Layer readout chip

    CERN Document Server

    The ATLAS collaboration

    2017-01-01

    The ATLAS Insertable B-Layer is the innermost pixel barrel layer of the ATLAS detector installed in 2014. During the first year of $pp$ collisions at $\\sqrt{s} = 13~{\\rm TeV}$ in 2015, an unusual increase was observed in the low voltage currents of the readout chips. This increase was found to be due to radiation damage to the chips. The dependence of the current on the total ionising dose and temperature has been studied using X-ray and proton beam sources, and will be presented in this note together with its possible parametrisation and operation guidelines for the detector.

  15. XA readout chip characteristics and CdZnTe spectral measurements

    International Nuclear Information System (INIS)

    Barbier, L.M.; Birsa, F.; Odom, J.

    1999-01-01

    The authors report on the performance of a CdZnTe (CZT) array readout by an XA (X-ray imaging chip produced at the AMS foundry) application specific readout chip (ASIC). The array was designed and fabricated at NASA/Goddard Space Flight Center (GSFC) as a prototype for the Burst Arc-Second Imaging and Spectroscopy gamma-ray instrument. The XA ASIC was obtained from Integrated Detector and Electronics (IDE), in Norway. Performance characteristics and spectral data for 241 Am are presented both at room temperature and at -20 C. The measured noise (σ) was 2.5 keV at 60 keV at room temperature. This paper represents a progress report on work with the XA ASIC and CZT detectors. Work is continuing and in particular, larger arrays are planned for future NASA missions

  16. Zero suppression logic of the ALICE muon forward tracker pixel chip prototype PIXAM and associated readout electronics development

    International Nuclear Information System (INIS)

    Flouzat, C.; Değerli, Y.; Guilloux, F.; Orsini, F.; Venault, P.

    2015-01-01

    In the framework of the ALICE experiment upgrade at HL-LHC, a new forward tracking detector, the Muon Forward Tracker (MFT), is foreseen to overcome the intrinsic limitations of the present Muon Spectrometer and will perform new measurements of general interest for the whole ALICE physics. To fulfill the new detector requirements, CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive trade-off between readout speed, spatial resolution, radiation hardness, granularity, power consumption and material budget. This technology has been chosen to equip the Muon Forward Tracker and also the vertex detector: the Inner Tracking System (ITS). Since few years, an intensive R and D program has been performed on the design of MAPS in the 0.18 μ m CMOS Image Sensor (CIS) process. In order to avoid pile up effects in the experiment, the classical rolling shutter readout system of MAPS has been improved to overcome the readout speed limitation. A zero suppression algorithm, based on a 3 by 3 cluster finding (position and data), has been chosen for the MFT. This algorithm allows adequate data compression for the sensor. This paper presents the large size prototype PIXAM, which represents 1/3 of the final chip, and will focus specially on the zero suppression block architecture. This chip is designed and under fabrication in the 0.18 μ m CIS process. Finally, the readout electronics principle to send out the compressed data flow is also presented taking into account the cluster occupancy per MFT plane for a single central Pb-Pb collision

  17. Zero suppression logic of the ALICE muon forward tracker pixel chip prototype PIXAM and associated readout electronics development

    Science.gov (United States)

    Flouzat, C.; Değerli, Y.; Guilloux, F.; Orsini, F.; Venault, P.

    2015-05-01

    In the framework of the ALICE experiment upgrade at HL-LHC, a new forward tracking detector, the Muon Forward Tracker (MFT), is foreseen to overcome the intrinsic limitations of the present Muon Spectrometer and will perform new measurements of general interest for the whole ALICE physics. To fulfill the new detector requirements, CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive trade-off between readout speed, spatial resolution, radiation hardness, granularity, power consumption and material budget. This technology has been chosen to equip the Muon Forward Tracker and also the vertex detector: the Inner Tracking System (ITS). Since few years, an intensive R&D program has been performed on the design of MAPS in the 0.18 μ m CMOS Image Sensor (CIS) process. In order to avoid pile up effects in the experiment, the classical rolling shutter readout system of MAPS has been improved to overcome the readout speed limitation. A zero suppression algorithm, based on a 3 by 3 cluster finding (position and data), has been chosen for the MFT. This algorithm allows adequate data compression for the sensor. This paper presents the large size prototype PIXAM, which represents 1/3 of the final chip, and will focus specially on the zero suppression block architecture. This chip is designed and under fabrication in the 0.18 μ m CIS process. Finally, the readout electronics principle to send out the compressed data flow is also presented taking into account the cluster occupancy per MFT plane for a single central Pb-Pb collision.

  18. Spectroscopic measurements with the ATLAS FE-I4 pixel readout chip

    Energy Technology Data Exchange (ETDEWEB)

    Pohl, David-Leon; Janssen, Jens; Hemperek, Tomasz; Huegging, Fabian; Wermes, Norbert [Physikalisches Institut der Univeristaet Bonn (Germany)

    2015-07-01

    The ATLAS FE-I4 pixel readout chip is a large (2 x 2 cm{sup 2}) state of the art ASIC used in high energy physics experiments as well as for research and development purposes. While the FE-I4 is optimized for high hit rates it provides very limited charge resolution. Therefore two methods were developed to obtain high resolution single pixel charge spectra with the ATLAS FE-I4. The first method relies on the ability to change the detection threshold in small steps while counting hits from a particle source and has a resolution limited by electronic noise only. The other method uses a FPGA based time-to-digital-converter to digitize the analog charge signal with high precision. The feasibility, performance and challenges of these methods are discussed. First results of sensor characterizations from radioactive sources and test beams with the ATLAS FE-I4 in view of the charge collection efficiency after irradiation are presented.

  19. Development of Micromegas-like gaseous detectors using a pixel readout chip as collecting anode

    International Nuclear Information System (INIS)

    Chefdeville, M.

    2009-01-01

    This thesis reports on the fabrication and test of a new gaseous detector with a very large number of readout channels. This detector is intended for measuring the tracks of charged particles with an unprecedented sensitivity to single electrons of almost 100 %. It combines a metal grid for signal amplification called the Micromegas with a pixel readout chip as signal collecting anode and is dubbed GridPix. GridPix is a potential candidate for a sub-detector at a future electron linear collider (ILC) foreseen to work in parallel with the LHC around 2020--2030. The tracking capability of GridPix is best exploited if the Micromegas is integrated on the pixel chip. This integrated grid is called InGrid and is precisely fabricated by wafer post-processing. The various steps of the fabrication process and the measurements of its gain, energy resolution and ion back-flow property are reported in this document. Studies of the response of the complete detector formed by an InGrid and a TimePix pixel chip to X-rays and cosmic particles are also presented. In particular, the efficiency for detecting single electrons and the point resolution in the pixel plane are measured. Implications for a GridPix detector at ILC are discussed. (author)

  20. A Zinc Oxide Nanorod Ammonia Microsensor Integrated with a Readout Circuit on-a-Chip

    Directory of Open Access Journals (Sweden)

    Chyan-Chyi Wu

    2011-11-01

    Full Text Available A zinc oxide nanorod ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.35 mm complementary metal oxide semiconductor (CMOS process was investigated. The structure of the ammonia sensor is composed of a sensitive film and polysilicon electrodes. The ammonia sensor requires a post-process to etch the sacrificial layer, and to coat the sensitive film on the polysilicon electrodes. The sensitive film that is prepared by a hydrothermal method is made of zinc oxide. The sensor resistance changes when the sensitive film adsorbs or desorbs ammonia gas. The readout circuit is used to convert the sensor resistance into the voltage output. Experiments show that the ammonia sensor has a sensitivity of about 1.5 mV/ppm at room temperature.

  1. A One-Dimensional Magnetic Chip with a Hybrid Magnetosensor and a Readout Circuit

    Directory of Open Access Journals (Sweden)

    Guo-Ming Sung

    2018-01-01

    Full Text Available This work presents a one-dimensional magnetic chip composed of a hybrid magnetosensor and a readout circuit, which were fabricated with 0.18 μm 1P6M CMOS technology. The proposed magnetosensor includes a polysilicon cross-shaped Hall plate and two separated metal-oxide semiconductor field-effect transistors (MOSFETs to sense the magnetic induction perpendicular to the chip surface. The readout circuit, which comprises a current-to-voltage converter, a low-pass filter, and an instrumentation amplifier, is designed to amplify the output Hall voltage with a gain of 43 dB. Furthermore, a SPICE macro model is proposed to predict the sensor’s performance in advance and to ensure sufficient comprehension of the magnetic mechanism of the proposed magnetosensor. Both simulated and measured results verify the correctness and flexibility of the proposed SPICE macro model. Measurements reveal that the maximum output Hall voltage VH, the optimum current-related magnetosensitivity SRI, the optimum voltage-related magnetosensitivity SRV, the averaged nonlinearity error NLE, and the relative bias current Ibias are 4.381 mV, 520.5 V/A·T, 40.04 V/V·T, 7.19%, and 200 μA, respectively, for the proposed 1-D magnetic chip with a readout circuit of 43 dB. The averaged NLE is small at high magnetic inductions of ±30 mT, whereas it is large at low magnetic inductions of ±30 G.

  2. LHCb - SALT, a dedicated readout chip for strip detectors in the LHCb Upgrade experiment

    CERN Multimedia

    Swientek, Krzysztof Piotr

    2015-01-01

    Silicon strip detectors in the upgraded Tracker of LHCb experiment will require a new readout 128-channel ASIC called SALT. It will extract and digitise analogue signals from the sensor, perform digital processing and transmit serial output data. SALT is designed in CMOS 130 nm process and uses a novel architecture comprising of analogue front-end and ultra-low power ($<$0.5 mW) fast (40 MSps) sampling 6-bit ADC in each channel. A prototype of first 8-channel version of SALT chip, comprising all important functionalities, was submitted. Its design and possibly first tests results will be presented.

  3. Analyses of test beam data for the ATLAS upgrade readout chip (ABC130)

    Energy Technology Data Exchange (ETDEWEB)

    Peschke, Richard [DESY, Hamburg (Germany); Collaboration: ATLAS-Collaboration

    2015-07-01

    As part of the ATLAS phase II upgrade it is planned to replace the current tracker with an all silicon tracker. The outer part of the new tracker will consist of silicon strip detectors. For the readout of the strip detector a new Analog to Binary Converter chip (ABC130) was designed. The chip is processed in the 130 nm technology. In laboratory measurements the preamplifier of the new ABC130 showed a significant lower gain than expected. From the measurements in the laboratory it was not possible to distinguish if the malfunction is in the preamplifier or in the test circuit. Therefore an unbiased test was mandatory. Among other measurements, one was a test beam campaign at the Stanford Linear Accelerator Collider (SLAC). The result of measurement is shown in the presentation.

  4. Results of FE65-P2 Pixel Readout Test Chip for High Luminosity LHC Upgrades

    CERN Document Server

    AUTHOR|(SzGeCERN)394193

    2016-01-01

    A pixel readout test chip called FE65-P2 has been fabricated on 65 nm CMOS technology. FE65-P2 contains a matrix of 64 x 64 pixels on 50 micron by 50 micron pitch, designed to read out a bump bonded sensor. The goals of FE65-P2 are to demonstrate excellent analog performance isolated from digital activity well enough to achieve 500 electron stable threshold, be radiation hard to at least 500 Mrad, and prove the novel concept of isolated analog front ends embedded in a flat digital design, dubbed “analog islands in a digital sea”. Experience from FE65-P2 and hybrid assemblies will be applied to the design for a large format readout chip, called RD53A, to be produced in a wafer run in early 2017 by the RD53 collaboration. We review the case for 65 nm technology and report on threshold stability test results for the FE65-P2.

  5. A Low Mass On-Chip Readout Scheme for Double-Sided Silicon Strip Detectors

    Energy Technology Data Exchange (ETDEWEB)

    Irmler, C., E-mail: christian.irmler@oeaw.ac.at [HEPHY Vienna – Institute of High Energy Physics of the Austrian Academy of Sciences, Nikolsdorfer Gasse 18, A-1050 Vienna (Austria); Bergauer, T.; Frankenberger, A.; Friedl, M.; Gfall, I. [HEPHY Vienna – Institute of High Energy Physics of the Austrian Academy of Sciences, Nikolsdorfer Gasse 18, A-1050 Vienna (Austria); Higuchi, T. [University of Tokyo, Kavli Institute for Physics and Mathematics of the Universe, 5-1-5 Kashiwanoha, Kashiwa, Chiba 277-8583 (Japan); Ishikawa, A. [Tohoku University, Department of Physics, Aoba Aramaki Aoba-ku, Sendai 980-8578 (Japan); Joo, C. [Seoul National University, High Energy Physics Laboratory, 25-107 Shinlim-dong, Kwanak-gu, Seoul 151-742 (Korea, Republic of); Kah, D.H.; Kang, K.H. [Kyungpook National University, Department of Physics, 1370 Sankyuk Dong, Buk Gu, Daegu 702-701 (Korea, Republic of); Rao, K.K. [Tata Institute of Fundamental Research, Experimental High Energy Physics Group, Homi Bhabha Road, Mumbai 400 005 (India); Kato, E. [Tohoku University, Department of Physics, Aoba Aramaki Aoba-ku, Sendai 980-8578 (Japan); Mohanty, G.B. [Tata Institute of Fundamental Research, Experimental High Energy Physics Group, Homi Bhabha Road, Mumbai 400 005 (India); Negishi, K. [Tohoku University, Department of Physics, Aoba Aramaki Aoba-ku, Sendai 980-8578 (Japan); Onuki, Y.; Shimizu, N. [University of Tokyo, Department of Physics, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-0033 (Japan); Tsuboyama, T. [KEK, 1-1 Oho, Tsukuba, Ibaraki 305-0801 (Japan); Valentan, M. [HEPHY Vienna – Institute of High Energy Physics of the Austrian Academy of Sciences, Nikolsdorfer Gasse 18, A-1050 Vienna (Austria)

    2013-12-21

    B-factories like the KEKB in Tsukuba, Japan, operate at relatively low energies and thus require detectors with very low material budget in order to minimize multiple scattering. On the other hand, front-end chips with short shaping time like the APV25 have to be placed as close to the sensor strips as possible to reduce the capacitive load, which mainly determines the noise figure. In order to achieve both – minimal material budget and low noise – we developed a readout scheme for double-sided silicon detectors, where the APV25 chips are placed on a flexible circuit, which is glued onto the top side of the sensor. The bottom-side strips are connected by two flexible circuits, which are bent around the edge of the sensor. This so-called “Origami” design will be utilized to build the Silicon Vertex Detector of the Belle II experiment, which will consist of four layers made from ladders with up to five double-sided silicon strip sensors in a row. Each ladder will be supported by two ribs made of a carbon fiber and Airex foam core sandwich. The heat dissipated by the front-end chips will be removed by a highly efficient two-phase CO{sub 2} system. Thanks to the Origami concept, all APV25 chips are aligned in a row and thus can be cooled by a single thin cooling pipe per ladder. We present the concept and the assembly procedure of the Origami chip-on-sensor modules.

  6. A Low Mass On-Chip Readout Scheme for Double-Sided Silicon Strip Detectors

    International Nuclear Information System (INIS)

    Irmler, C.; Bergauer, T.; Frankenberger, A.; Friedl, M.; Gfall, I.; Higuchi, T.; Ishikawa, A.; Joo, C.; Kah, D.H.; Kang, K.H.; Rao, K.K.; Kato, E.; Mohanty, G.B.; Negishi, K.; Onuki, Y.; Shimizu, N.; Tsuboyama, T.; Valentan, M.

    2013-01-01

    B-factories like the KEKB in Tsukuba, Japan, operate at relatively low energies and thus require detectors with very low material budget in order to minimize multiple scattering. On the other hand, front-end chips with short shaping time like the APV25 have to be placed as close to the sensor strips as possible to reduce the capacitive load, which mainly determines the noise figure. In order to achieve both – minimal material budget and low noise – we developed a readout scheme for double-sided silicon detectors, where the APV25 chips are placed on a flexible circuit, which is glued onto the top side of the sensor. The bottom-side strips are connected by two flexible circuits, which are bent around the edge of the sensor. This so-called “Origami” design will be utilized to build the Silicon Vertex Detector of the Belle II experiment, which will consist of four layers made from ladders with up to five double-sided silicon strip sensors in a row. Each ladder will be supported by two ribs made of a carbon fiber and Airex foam core sandwich. The heat dissipated by the front-end chips will be removed by a highly efficient two-phase CO 2 system. Thanks to the Origami concept, all APV25 chips are aligned in a row and thus can be cooled by a single thin cooling pipe per ladder. We present the concept and the assembly procedure of the Origami chip-on-sensor modules

  7. Evaluation of the x-ray response of a position-sensitive microstrip detector with an integrated readout chip

    International Nuclear Information System (INIS)

    Rossington, C.; Jaklevic, J.; Haber, C.; Spieler, H.; Reid, J.

    1990-08-01

    The performance of an SVX silicon microstrip detector and its compatible integrated readout chip have been evaluated in response to Rh Kα x-rays (average energy 20.5 keV). The energy and spatial discrimination capabilities, efficient data management and fast readout rates make it an attractive alternative to the CCD and PDA detectors now being offered for x-ray position sensitive diffraction and EXAFS work. The SVX system was designed for high energy physics applications and thus further development of the existing system is required to optimize it for use in practical x-ray experiments. For optimum energy resolution the system noise must be decreased to its previously demonstrated low levels of 2 keV FWHM at 60 keV or less, and the data handling rate of the computer must be increased. New readout chips are now available that offer the potential of better performance. 15 refs., 7 figs

  8. Yarr: A PCIe based readout system for semiconductor tracking systems

    Energy Technology Data Exchange (ETDEWEB)

    Heim, Timon [Bergische Universitaet Wuppertal, Wuppertal (Germany); CERN, Geneva (Switzerland); Maettig, Peter [Bergische Universitaet Wuppertal, Wuppertal (Germany); Pernegger, Heinz [CERN, Geneva (Switzerland)

    2015-07-01

    The Yarr readout system is a novel DAQ concept, using an FPGA board connected via PCIe to a computer, to read out semiconductor tracking systems. The system uses the FPGA as a reconfigurable IO interface which, in conjunction with the very high speed of the PCIe bus, enables a focus of processing the data stream coming from the pixel detector in software. Modern computer system could potentially make the need of custom signal processing hardware in readout systems obsolete and the Yarr readout system showcases this for FE-I4 chips, which are state-of-the-art readout chips used in the ATLAS Pixel Insertable B-Layer and developed for tracking in high multiplicity environments. The underlying concept of the Yarr readout system tries to move intelligence from hardware into the software without the loss of performance, which is made possible by modern multi-core processors. The FPGA board firmware acts like a buffer and does no further processing of the data stream, enabling rapid integration of new hardware due to minimal firmware minimisation.

  9. Prototype ATLAS IBL Modules using the FE-I4A Front-End Readout Chip

    CERN Document Server

    Albert, J; Alimonti, Gianluca; Allport, Phil; Altenheiner, Silke; Ancu, Lucian; Andreazza, Attilio; Arguin, Jean-Francois; Arutinov, David; Backhaus, Malte; Bagolini, Alvise; Ballansat, Jacques; Barbero, Marlon; Barbier, Gérard; Bates, Richard; Battistin, Michele; Baudin, Patrick; Beau, Tristan; Beccherle, Roberto; Beck, Hans Peter; Benoit, Mathieu; Bensinger, Jim; Bomben, Marco; Borri, Marcello; Boscardin, Maurizio; Botelho Direito, Jose Antonio; Bousson, Nicolas; Boyd, George Russell Jr; Breugnon, Patrick; Bruni, Graziano; Bruschi, Marco; Buchholz, Peter; Buttar, Craig; Cadoux, Franck; Calderini, Giovanni; Caminada, Leah; Capeans, Mar; Casse, Gianluigi; Catinaccio, Andrea; Cavalli-Sforza, Matteo; Chauveau, Jacques; Chu, Ming-Lee; Ciapetti, Marco; Cindro, Vladimir; Citterio, Mauro; Clark, Allan; Cobal, Marina; Coelli, Simone; Colijn, Auke-Pieter; Colin, Daly; Collot, Johann; Crespo-Lopez, Olivier; Dalla Betta, Gian-Franco; Darbo, Giovanni; DaVia, Cinzia; David, Pierre-Yves; Debieux, Stéphane; Delebecque, Pierre; Devetak, Erik; DeWilde, Burton; Di Girolamo, Beniamino; Dinu, Nicoleta; Dittus, Fridolin; Diyakov, Denis; Djama, Fares; Dobos, Daniel Adam; Doonan, Kate; Dopke, Jens; Dorholt, Ole; Dube, Sourabh; Dushkin, Andrey; Dzahini, Daniel; Egorov, Kirill; Ehrmann, Oswin; Elldge, David; Elles, Sabine; Elsing, Markus; Eraud, Ludovic; Ereditato, Antonio; Eyring, Andreas; Falchieri, Davide; Falou, Aboud; Fang, Xiaochao; Fausten, Camille; Favre, Yannick; Ferrere, Didier; Fleta, Celeste; Fleury, Julien; Flick, Tobias; Forshaw, Dean; Fougeron, Denis; Fritzsch, Thomas; Gabrielli, Alessandro; Gaglione, Renaud; Gallrapp, Christian; Gan, K; Garcia-Sciveres, Maurice; Gariano, Giuseppe; Gastaldi, Thibaut; Gemme, Claudia; Gensolen, Fabrice; George, Matthias; Ghislain, Patrick; Giacomini, Gabriele; Gibson, Stephen; Giordani, Mario Paolo; Giugni, Danilo; Gjersdal, Håvard; Glitza, Karl Walter; Gnani, Dario; Godlewski, Jan; Gonella, Laura; Gorelov, Igor; Gorišek, Andrej; Gössling, Claus; Grancagnolo, Sergio; Gray, Heather; Gregor, Ingrid-Maria; Grenier, Philippe; Grinstein, Sebastian; Gromov, Vladimir; Grondin, Denis; Grosse-Knetter, Jörn; Hansen, Thor-Erik; Hansson, Per; Harb, Ali; Hartman, Neal; Hasi, Jasmine; Hegner, Franziska; Heim, Timon; Heinemann, Beate; Hemperek, Tomasz; Hessey, Nigel; Hetmánek, Martin; Hoeferkamp, Martin; Hostachy, Jean-Yves; Hügging, Fabian; Husi, Coralie; Iacobucci, Giuseppe; Idarraga, John; Ikegami, Yoichi; Janoška, Zdenko; Jansen, Jens; Jansen, Luc; Jensen, Frank; Jentzsch, Jennifer; Joseph, John; Kagan, Harris; Karagounis, Michael; Kass, Richard; Kenney, Christopher J; Kersten, Susanne; Kind, Peter; Klingenberg, Reiner; Kluit, Ruud; Kocian, Martin; Koffeman, Els; Kok, Angela; Korchak, Oleksandr; Korolkov, Ilya; Kostyukhin, Vadim; Krieger, Nina; Krüger, Hans; Kruth, Andre; Kugel, Andreas; Kuykendall, William; La Rosa, Alessandro; Lai, Chung-Hang; Lantzsch, Kerstin; Laporte, Didier; Lapsien, Tobias; Lounis, abdenour; Lozano, Manuel; Lu, Yunpeng; Lubatti, Henry; Macchiolo, Anna; Mallik, Usha; Mandić, Igor; Marchand, Denis; Marchiori, Giovanni; Massol, Nicolas; Matthias, Wittgen; Mättig, Peter; Mekkaoui, Abderrazak; Menouni, Mohsine; Menu, Johann; Meroni, Chiara; Mesa, Javier; Micelli, Andrea; Michal, Sébastien; Miglioranzi, Silvia; Mikuž, Marko; Mitsui, Shingo; Monti, Mauro; Moore, J; Morettini, Paolo; Muenstermann, Daniel; Murray, Peyton; Nellist, Clara; Nelson, David J; Nessi, Marzio; Neumann, Manuel; Nisius, Richard; Nordberg, Markus; Nuiry, Francois-Xavier; Oppermann, Hermann; Oriunno, Marco; Padilla, Cristobal; Parker, Sherwood; Pellegrini, Giulio; Pelleriti, Gabriel; Pernegger, Heinz; Piacquadio, Nicola Giacinto; Picazio, Attilio; Pohl, David; Polini, Alessandro; Popule, Jiří; Portell Bueso, Xavier; Povoli, Marco; Puldon, David; Pylypchenko, Yuriy; Quadt, Arnulf; Quirion, David; Ragusa, Francesco; Rambure, Thibaut; Richards, Erik; Ristic, Branislav; Røhne, Ole; Rothermund, Mario; Rovani, Alessandro; Rozanov, Alexandre; Rubinskiy, Igor; Rudolph, Matthew Scott; Rummler, André; Ruscino, Ettore; Salek, David; Salzburger, Andreas; Sandaker, Heidi; Schipper, Jan-David; Schneider, Basil; Schorlemmer, Andre; Schroer, Nicolai; Schwemling, Philippe; Seidel, Sally; Seiden, Abraham; Šícho, Petr; Skubic, Patrick; Sloboda, Michal; Smith, D; Sood, Alex; Spencer, Edwin; Strang, Michael; Stugu, Bjarne; Stupak, John; Su, Dong; Takubo, Yosuke; Tassan, Jean; Teng, Ping-Kun; Terada, Susumu; Todorov, Theodore; Tomášek, Michal; Toms, Konstantin; Travaglini, Riccardo; Trischuk, William; Troncon, Clara; Troska, Georg; Tsiskaridze, Shota; Tsurin, Ilya; Tsybychev, Dmitri; Unno, Yoshinobu; Vacavant, Laurent; Verlaat, Bart; Vianello, Elisa; Vigeolas, Eric; von Kleist, Stephan; Vrba, Václav; Vuillermet, Raphaël; Wang, Rui; Watts, Stephen; Weber, Michele; Weber, Marteen; Weigell, Philipp; Weingarten, Jens; Welch, Steven David; Wenig, Siegfried; Wermes, Norbert; Wiese, Andreas; Wittig, Tobias; Yildizkaya, Tamer; Zeitnitz, Christian; Ziolkowski, Michal; Zivkovic, Vladimir; Zoccoli, Antonio; Zorzi, Nicola; Zwalinski, Lukasz

    2012-01-01

    The ATLAS Collaboration will upgrade its semiconductor pixel tracking detector with a new Insertable B-layer (IBL) between the existing pixel detector and the vacuum pipe of the Large Hadron Collider. The extreme operating conditions at this location have necessitated the development of new radiation hard pixel sensor technologies and a new front-end readout chip, called the FE-I4. Planar pixel sensors and 3D pixel sensors have been investigated to equip this new pixel layer, and prototype modules using the FE-I4A have been fabricated and characterized using 120 GeV pions at the CERN SPS and 4 GeV positrons at DESY, before and after module irradiation. Beam test results are presented, including charge collection efficiency, tracking efficiency and charge sharing.

  10. Cobalt Oxide Nanosheet and CNT Micro Carbon Monoxide Sensor Integrated with Readout Circuit on Chip

    Directory of Open Access Journals (Sweden)

    Ching-Liang Dai

    2010-03-01

    Full Text Available The study presents a micro carbon monoxide (CO sensor integrated with a readout circuit-on-a-chip manufactured by the commercial 0.35 μm complementary metal oxide semiconductor (CMOS process and a post-process. The sensing film of the sensor is a composite cobalt oxide nanosheet and carbon nanotube (CoOOH/CNT film that is prepared by a precipitation-oxidation method. The structure of the CO sensor is composed of a polysilicon resistor and a sensing film. The sensor, which is of a resistive type, changes its resistance when the sensing film adsorbs or desorbs CO gas. The readout circuit is used to convert the sensor resistance into the voltage output. The post-processing of the sensor includes etching the sacrificial layers and coating the sensing film. The advantages of the sensor include room temperature operation, short response/recovery times and easy post-processing. Experimental results show that the sensitivity of the CO sensor is about 0.19 mV/ppm, and the response and recovery times are 23 s and 34 s for 200 ppm CO, respectively.

  11. An optical fiber-based flexible readout system for micro-pattern gas detectors

    Science.gov (United States)

    Li, C.; Feng, C. Q.; Zhu, D. Y.; Liu, S. B.; An, Q.

    2018-04-01

    This paper presents an optical fiber-based readout system that is intended to provide a general purpose multi-channel readout solution for various Micro-Pattern Gas Detectors (MPGDs). The proposed readout system is composed of several front-end cards (FECs) and a data collection module (DCM). The FEC exploits the capability of an existing 64-channel generic TPC readout ASIC chip, named AGET, to implement 256 channels readout. AGET offers FEC a large flexibility in gain range (4 options from 120 fC to 10 pC), peaking time (16 options from 50 ns to 1 us) and sampling freqency (100 MHz max.). The DCM contains multiple 1 Gbps optical fiber serial link interfaces that allow the system scaling up to 1536 channels with 6 FECs and 1 DCM. Further scaling up is possible through cascading of multiple DCMs, by configuring one DCM as a master while other DCMs in slave mode. This design offers a rapid readout solution for different application senario. Tests indicate that the nonlinearity of each channel is less than 1%, and the equivalent input noise charge is typically around 0.7 fC in RMS (root mean square), with a noise slope of about 0.01 fC/pF. The system level trigger rate limit is about 700 Hz in all channel readout mode. When in hit channel readout mode, supposing that typically 10 percent of channels are fired, trigger rate can go up to about 7 kHz. This system has been tested with Micromegas detector and GEM detector, confirming its capability in MPGD readout. Details of hardware and FPGA firmware design, as well as system performances, are described in the paper.

  12. A 240-channel thick film multi-chip module for readout of silicon drift detectors

    International Nuclear Information System (INIS)

    Lynn, D.; Bellwied, R.; Beuttenmueller, R.; Caines, H.; Chen, W.; DiMassimo, D.; Dyke, H.; Elliott, D.; Grau, M.; Hoffmann, G.W.; Humanic, T.; Jensen, P.; Kleinfelder, S.A.; Kotov, I.; Kraner, H.W.; Kuczewski, P.; Leonhardt, B.; Li, Z.; Liaw, C.J.; LoCurto, G.; Middelkamp, P.; Minor, R.; Mazeh, N.; Nehmeh, S.; O'Conner, P.; Ott, G.; Pandey, S.U.; Pruneau, C.; Pinelli, D.; Radeka, V.; Rescia, S.; Rykov, V.; Schambach, J.; Sedlmeir, J.; Sheen, J.; Soja, B.; Stephani, D.; Sugarbaker, E.; Takahashi, J.; Wilson, K.

    2000-01-01

    We have developed a thick film multi-chip module for readout of silicon drift (or low capacitance ∼200 fF) detectors. Main elements of the module include a custom 16-channel NPN-BJT preamplifier-shaper (PASA) and a custom 16-channel CMOS Switched Capacitor Array (SCA). The primary design criteria of the module were the minimizations of the power (12 mW/channel), noise (ENC=490 e - rms), size (20.5 mmx63 mm), and radiation length (1.4%). We will discuss various aspects of the PASA design, with emphasis on the preamplifier feedback network. The SCA is a modification of an integrated circuit that has been previously described [1]; its design features specific to its application in the SVT (Silicon Vertex Tracker in the STAR experiment at RHIC) will be discussed. The 240-channel multi-chip module is a circuit with five metal layers fabricated in thick film technology on a beryllia substrate and contains 35 custom and commercial integrated circuits. It has been recently integrated with silicon drift detectors in both a prototype system assembly for the SVT and a silicon drift array for the E896 experiment at the Alternating Gradient Synchrotron at the Brookhaven National Laboratory. We will discuss features of the module's design and fabrication, report the test results, and emphasize its performance both on the bench and under experimental conditions

  13. A multi-chip data acquisition system based on a heterogeneous system-on-chip platform

    CERN Document Server

    Fiergolski, Adrian

    2017-01-01

    The Control and Readout Inner tracking BOard (CaRIBOu) is a versatile readout system targeting a multitude of detector prototypes. It profits from the heterogeneous platform of the Zynq System-on-Chip (SoC) and integrates in a monolithic device front-end FPGA resources with a back-end software running on a hard-core ARM-based processor. The user-friendly Linux terminal with the pre-installed DAQ software is combined with the efficiency and throughput of a system fully implemented in the FPGA fabric. The paper presents the design of the SoC-based DAQ system and its building blocks. It also shows examples of the achieved functionality for the CLICpix2 readout ASIC.

  14. An eight channel low-noise CMOS readout circuit for silicon detectors with on-chip front-end FET

    International Nuclear Information System (INIS)

    Fiorini, C.; Porro, M.

    2006-01-01

    We propose a CMOS readout circuit for the processing of signals from multi-channel silicon detectors to be used in X-ray spectroscopy and γ-ray imaging applications. The circuit is composed by eight channels, each one featuring a low-noise preamplifier, a 6th-order semigaussian shaping amplifier with four selectable peaking times, from 1.8 up to 6 μs, a peak stretcher and a discriminator. The circuit is conceived to be used with silicon detectors with a front-end FET integrated on the detector chips itself, like silicon drift detectors with JFET and pixel detectors with DEPMOS. The integrated time constants used for the shaping are implemented by means of an RC-cell, based on the technique of demagnification of the current flowing in a resistor R by means of the use of current mirrors. The eight analog channels of the chip are multiplexed to a single analog output. A suitable digital section provides self-resetting of each channel and trigger output and is able to set independent thresholds on the analog channels by means of a programmable serial register and 3-bit DACs. The circuit has been realized in the 0.35 μm CMOS AMS technology. In this work, the main features of the circuit are presented along with the experimental results of its characterization

  15. Development of telescope readout system based on FELIX for testbeam experiments

    CERN Document Server

    Wu, Weihao; Chen, Hucheng; Chen, Kai; Lacobucci, Giuseppe; Lanni, Francessco; Liu, Hongbin; Barrero Pinto, Mateus Vicente; Xu, Lailin

    2017-01-01

    The High Voltage CMOS (HV-CMOS) sensors are extensively investigated by the ATLAS collaboration in the High-Luminosity LHC (HL-LHC) upgrade of the Inner Tracker (ITk) detector. A testbeam telescope, based on the ATLAS IBL (Insertable B-Layer) silicon pixel modules, has been built to characterize the HV-CMOS sensor prototypes. The Front-End LInk eXchange (FELIX) system is a new approach to function as the gateway between front-ends and the commodity switched network in the different detectors of the ATLAS upgrade. A FELIX based readout system has been developed for the readout of the testbeam telescope, which includes a Telescope Readout FMC Card as interface between the IBL DC (double-chip) modules and a Xilinx ZC706 evaluation board. The test results show that the FELIX based telescope readout system is capable of sensor calibration and readout of a high-density pixel detector in test beam experiments in an effective way.

  16. In the photograph, one can see the interconnection from one readout chip to the flexible cable realized with ultrasonic wire bonds (25 microns).

    CERN Multimedia

    Saba, A

    2006-01-01

    2 ladders are connected via a multi layer aluminium polyimide flexible cable with a multi chip module containing several custom designed ASICs. The production of the flexible cable was developed and carrier out at CERN. It provides signal and data lines as well as power to the individual readout chipswith a total thickness of only 220 microns. In the photograph, one can see the interconnection from one readout chip to the flexible cable realized with ultrasonic wire bonds (25 microns).

  17. The PASTA chip - A free-running readout ASIC for silicon strip sensors in PANDA

    Energy Technology Data Exchange (ETDEWEB)

    Goerres, Andre; Stockmanns, Tobias; Ritman, James [Institut fuer Kernphysik, Forschungszentrum Juelich, Juelich (Germany); Rivetti, Angelo [INFN Sezione di Torino, Torino (Italy); Collaboration: PANDA-Collaboration

    2014-07-01

    The PANDA experiment is a multi purpose detector, investigating hadron physics in the charm quark mass regime. It is one of the main experiments at the future FAIR accelerator facility, using pp annihilations from a 1.5-15 GeV/c anti-proton beam. Because of the broad physics spectrum and the similarity of event and background signals, PANDA does not rely on a hardware-level trigger decision. The innermost of PANDA's sub-systems is the Micro Vertex Detector (MVD), consisting of silicon pixel and strip sensors. The latter will be read out by a specialized, free-running readout front-end called PANDA Strip ASIC (PASTA). It has to face a high event rate of up to 40 kHz/ch in an radiation-intense environment. To fulfill the MVD's requirements, it has to give accurate timing information to incoming events (<10 ns) and determine the collected charge with an 8-bit precision. The design has to meet cooling and placing restrictions, leading to a very low power consumption (<4 mW/ch) and limited dimensions. Therefore, a simple, time-based readout approach is chosen. In this talk, the conceptual design of the front-end is presented.

  18. SPIROC (SiPM Integrated Read-Out Chip) Dedicated very front-end electronics for an ILC prototype hadronic calorimeter with SiPM read-out

    CERN Document Server

    Bouchel, Michel; Dulucq, Frédéric; Fleury, Julien; de La Taille, Christophe; Martin-Chassard, Gisèle; Raux, Ludovic

    2009-01-01

    The SPIROC chip is a dedicated very front-end electronics for an ILC prototype hadronic calorimeter with Silicon photomultiplier (or MPPC) readout. This ASIC is due to equip a 10,000-channel demonstrator in 2009. SPIROC is an evolution of FLC_SiPM used for the ILC AHCAL physics prototype [1]. SPIROC was submitted in June 2007 and will be tested in September 2007. It embeds cutting edge features that fulfil ILC final detector requirements. It has been realized in 0.35m SiGe technology. It has been developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels needed. SPIROC is an auto-triggered, bi-gain, 36-channel ASIC which allows to measure on each channel the charge from one photoelectron to 2000 and the time with a 100ps accurate TDC. An analogue memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. A 12-bit Wilkinson ADC has been embedded to digitize the analogue memor...

  19. SPIROC (SiPM Integrated Read-Out Chip) Dedicated very front-end electronics for an ILC prototype hadronic calorimeter with SiPM read-out

    CERN Document Server

    Bouchel, Michel; Fleury, Julien; de La Taille, Christophe; Martin-Chassard, Gisèle; Raux, Ludovic

    2007-01-01

    The SPIROC chip is a dedicated very front-end electronics for an ILC prototype hadronic calorimeter with Silicon photomultiplier (or MPPC) readout. This ASIC is due to equip a 10,000-channel demonstrator in 2009. SPIROC is an evolution of FLC_SiPM used for the ILC AHCAL physics prototype [1]. SPIROC was submitted in June 2007 and will be tested in September 2007. It embeds cutting edge features that fulfil ILC final detector requirements. It has been realized in 0.35m SiGe technology. It has been developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels needed. SPIROC is an auto-triggered, bi-gain, 36-channel ASIC which allows to measure on each channel the charge from one photoelectron to 2000 and the time with a 100ps accurate TDC. An analogue memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. A 12-bit Wilkinson ADC has been embedded to digitize the analogue memor...

  20. Frequency multiplexing for readout of spin qubits

    Energy Technology Data Exchange (ETDEWEB)

    Hornibrook, J. M.; Colless, J. I.; Mahoney, A. C.; Croot, X. G.; Blanvillain, S.; Reilly, D. J., E-mail: david.reilly@sydney.edu.au [ARC Centre of Excellence for Engineered Quantum Systems, School of Physics, University of Sydney, Sydney, NSW 2006 (Australia); Lu, H.; Gossard, A. C. [Materials Department, University of California, Santa Barbara, California 93106 (United States)

    2014-03-10

    We demonstrate a low loss, chip-level frequency multiplexing scheme for readout of scaled-up spin qubit devices. By integrating separate bias tees and resonator circuits on-chip for each readout channel, we realise dispersive gate-sensing in combination with charge detection based on two radio frequency quantum point contacts. We apply this approach to perform multiplexed readout of a double quantum dot in the few-electron regime and further demonstrate operation of a 10-channel multiplexing device. Limitations for scaling spin qubit readout to large numbers of multiplexed channels are discussed.

  1. Intensity-based readout of resonant-waveguide grating biosensors: Systems and nanostructures

    Science.gov (United States)

    Paulsen, Moritz; Jahns, Sabrina; Gerken, Martina

    2017-09-01

    Resonant waveguide gratings (RWG) - also called photonic crystal slabs (PCS) - have been established as reliable optical transducers for label-free biochemical assays as well as for cell-based assays. Current readout systems are based on mechanical scanning and spectrometric measurements with system sizes suitable for laboratory equipment. Here, we review recent progress in compact intensity-based readout systems for point-of-care (POC) applications. We briefly introduce PCSs as sensitive optical transducers and introduce different approaches for intensity-based readout systems. Photometric measurements have been realized with a simple combination of a light source and a photodetector. Recently a 96-channel, intensity-based readout system for both biochemical interaction analyses as well as cellular assays was presented employing the intensity change of a near cut-off mode. As an alternative for multiparametric detection, a camera system for imaging detection has been implemented. A portable, camera-based system of size 13 cm × 4.9 cm × 3.5 cm with six detection areas on an RWG surface area of 11 mm × 7 mm has been demonstrated for the parallel detection of six protein binding kinetics. The signal-to-noise ratio of this system corresponds to a limit of detection of 168 M (24 ng/ml). To further improve the signal-to-noise ratio advanced nanostructure designs are investigated for RWGs. Here, results on multiperiodic and deterministic aperiodic nanostructures are presented. These advanced nanostructures allow for the design of the number and wavelengths of the RWG resonances. In the context of intensity-based readout systems they are particularly interesting for the realization of multi-LED systems. These recent trends suggest that compact point-of-care systems employing disposable test chips with RWG functional areas may reach market in the near future.

  2. Emulation and Calibration of the SALT Read-out Chip for the Upstream Tracker for Modernised LHCb Detector

    CERN Document Server

    Dendek, Adam

    2015-01-01

    The LHCb is one of the four major experiments currently operating at CERN. The main reason for constructing the LHCb forward spectrometer was a precise measurement of the CP violation in heavy quarks section as well as search for a New Physics. To obtain interesting results, the LHCb is mainly focused on study of B meson decays. Unfortunately, due to the present data acquisition architecture, the LHCb experiment is statistically limited for collecting such events. This fact led the LHCb Collaboration to decide to perform far-reaching upgrade. Key part of this upgrade will be replacement of the TT detector. To perform this action, it was requited to design new tracking detector with entirely new front-end electronics. This detector will be called the Upstream Tracker (UT) and the read-out chip — SALT. This note presents an overall discussion on SALT chip. In particular, the emulation process of the SALT data preformed via the software written by the author.

  3. Image processing system design for microcantilever-based optical readout infrared arrays

    Science.gov (United States)

    Tong, Qiang; Dong, Liquan; Zhao, Yuejin; Gong, Cheng; Liu, Xiaohua; Yu, Xiaomei; Yang, Lei; Liu, Weiyu

    2012-12-01

    Compared with the traditional infrared imaging technology, the new type of optical-readout uncooled infrared imaging technology based on MEMS has many advantages, such as low cost, small size, producing simple. In addition, the theory proves that the technology's high thermal detection sensitivity. So it has a very broad application prospects in the field of high performance infrared detection. The paper mainly focuses on an image capturing and processing system in the new type of optical-readout uncooled infrared imaging technology based on MEMS. The image capturing and processing system consists of software and hardware. We build our image processing core hardware platform based on TI's high performance DSP chip which is the TMS320DM642, and then design our image capturing board based on the MT9P031. MT9P031 is Micron's company high frame rate, low power consumption CMOS chip. Last we use Intel's company network transceiver devices-LXT971A to design the network output board. The software system is built on the real-time operating system DSP/BIOS. We design our video capture driver program based on TI's class-mini driver and network output program based on the NDK kit for image capturing and processing and transmitting. The experiment shows that the system has the advantages of high capturing resolution and fast processing speed. The speed of the network transmission is up to 100Mbps.

  4. LHC1: a semiconductor pixel detector readout chip with internal, tunable delay providing a binary pattern of selected events

    International Nuclear Information System (INIS)

    Heijne, E.H.M.; Antinori, F.; Barberis, D.

    1996-01-01

    The Omega3/LHC1 pixel detector readout chip comprises a matrix of 128 x 16 readout cells of 50 μm x 500 μm and peripheral functions with 4 distinct modes of initialization and operation, together more than 800 000 transistors. Each cell contains a complete chain of amplifier, discriminator with adjustable threshold and fast-OR output, a globally adjustable delay with local fine-tuning, coincidence logic and memory. Every cell can be individually addressed for electrical test and masking. First results have been obtained from electrical tests of a chip without detector as well as from source measurements. The electronic noise without detector is ∼100 e - rms. The lowest threshold setting is close to 2000 e - and non-uniformity has been measured to be better than 450 e - rms at 5000 e - threshold. A timewalk of <10 ns and a precision of <6 ns rms on a delay of 2 μs have been measured. The results may be improved by further optimization. (orig.)

  5. A time projection chamber with GEM-based readout

    Energy Technology Data Exchange (ETDEWEB)

    Attié, David [CEA Saclay, IRFU, F-91191 Gif-sur-Yvette (France); Behnke, Ties [Deutsches Elektronen-Synchrotron DESY, A Research Centre of the Helmholtz Association, Notkestrasse 85, 22607 Hamburg (Hamburg site) (Germany); Bellerive, Alain [Carleton University, Department of Physics, 1125 Colonel By Drive, Ottawa, ON, Canada K1S 5B6 (Canada); Bezshyyko, Oleg [Taras Shevchenko National University of Kyiv, 64/13, Volodymyrska Street, City of Kyiv 01601 (Ukraine); Bhattacharya, Deb Sankar [CEA Saclay, IRFU, F-91191 Gif-sur-Yvette (France); now at Saha Institute of Nuclear Physics, 1/AF, Sector 1, Bidhan Nagar, Kolkata 700064 (India); Bhattacharya, Purba [Saha Institute of Nuclear Physics, 1/AF, Sector 1, Bidhan Nagar, Kolkata 700064 (India); now at National Institute of Science Education and Research (NISER) Bhubaneswar, P.O. Jatni, Khurda 752050, Odisha (India); Bhattacharya, Sudeb [Saha Institute of Nuclear Physics, 1/AF, Sector 1, Bidhan Nagar, Kolkata 700064 (India); Caiazza, Stefano [Deutsches Elektronen-Synchrotron DESY, A Research Centre of the Helmholtz Association, Notkestrasse 85, 22607 Hamburg (Hamburg site) (Germany); now at Johannes Gutenberg Universität Mainz, Institut für Physik, 55099 Mainz (Germany); Colas, Paul [CEA Saclay, IRFU, F-91191 Gif-sur-Yvette (France); Lentdecker, Gilles De [Inter University ULB-VUB, Av. Fr. Roosevelt 50, B1050 Bruxelles (Belgium); Dehmelt, Klaus [Deutsches Elektronen-Synchrotron DESY, A Research Centre of the Helmholtz Association, Notkestrasse 85, 22607 Hamburg (Hamburg site) (Germany); now at State University of New York at Stony Brook, Department of Physics and Astronomy, Stony Brook, NY 11794-3800 (United States); Desch, Klaus [Universität Bonn, Physikalisches Institut, Nußallee 12, 53115 Bonn (Germany); and others

    2017-06-01

    For the International Large Detector concept at the planned International Linear Collider, the use of time projection chambers (TPC) with micro-pattern gas detector readout as the main tracking detector is investigated. In this paper, results from a prototype TPC, placed in a 1 T solenoidal field and read out with three independent Gas Electron Multiplier (GEM) based readout modules, are reported. The TPC was exposed to a 6 GeV electron beam at the DESY II synchrotron. The efficiency for reconstructing hits, the measurement of the drift velocity, the space point resolution and the control of field inhomogeneities are presented.

  6. Development and characterisation of a radiation hard readout chip for the LHCb outer tracker detector

    International Nuclear Information System (INIS)

    Stange, U.

    2005-01-01

    The reconstruction of charged particle tracks in the Outer Tracker detector of the LHCb experiment requires to measure the drift times of the straw tubes. A Time to Digital Converter (TDC) chip has been developed for this task. The chip integrates into the LHCb data acquisition schema and fulfils the requirements of the detector. The OTIS chip is manufactured in a commercial 0.25 μm CMOS process. A 32-channel TDC core drives the drift time measurement (25 ns measurement range, 390 ps nominal resolution) without introducing dead times. The resulting drift times are buffered until a trigger decision arrives after the fixed latency of 4 μs. In case of a trigger accept signal, the digital control core processes and transmits the corresponding data to the following data acquisition stage. Drift time measurement and data processing are independent from the detector occupancy. The digital control core of the OTIS chip has been developed within this doctoral thesis. It has been integrated into the TDC chip together with other constituents of the chip. Several test chips and prototype versions of the TDC chip have been characterised. The present version of the chip OTIS1.2 fulfils all requirements and is ready for mass production. (Orig.)

  7. A fast and reliable readout method for quantitative analysis of surface-enhanced Raman scattering nanoprobes on chip surface

    Energy Technology Data Exchange (ETDEWEB)

    Chang, Hyejin; Jeong, Sinyoung; Ko, Eunbyeol; Jeong, Dae Hong, E-mail: yslee@snu.ac.kr, E-mail: debobkr@gmail.com, E-mail: jeongdh@snu.ac.kr [Department of Chemistry Education, Seoul National University, Seoul 151-742 (Korea, Republic of); Kang, Homan [Interdisciplinary Program in Nano-Science and Technology, Seoul National University, Seoul 151-742 (Korea, Republic of); Lee, Yoon-Sik, E-mail: yslee@snu.ac.kr, E-mail: debobkr@gmail.com, E-mail: jeongdh@snu.ac.kr [Interdisciplinary Program in Nano-Science and Technology, Seoul National University, Seoul 151-742 (Korea, Republic of); School of Chemical and Biological Engineering, Seoul National University, Seoul 151-742 (Korea, Republic of); Lee, Ho-Young, E-mail: yslee@snu.ac.kr, E-mail: debobkr@gmail.com, E-mail: jeongdh@snu.ac.kr [Department of Nuclear Medicine, Seoul National University Bundang Hospital, Seongnam 463-707 (Korea, Republic of)

    2015-05-15

    Surface-enhanced Raman scattering techniques have been widely used for bioanalysis due to its high sensitivity and multiplex capacity. However, the point-scanning method using a micro-Raman system, which is the most common method in the literature, has a disadvantage of extremely long measurement time for on-chip immunoassay adopting a large chip area of approximately 1-mm scale and confocal beam point of ca. 1-μm size. Alternative methods such as sampled spot scan with high confocality and large-area scan method with enlarged field of view and low confocality have been utilized in order to minimize the measurement time practically. In this study, we analyzed the two methods in respect of signal-to-noise ratio and sampling-led signal fluctuations to obtain insights into a fast and reliable readout strategy. On this basis, we proposed a methodology for fast and reliable quantitative measurement of the whole chip area. The proposed method adopted a raster scan covering a full area of 100 μm × 100 μm region as a proof-of-concept experiment while accumulating signals in the CCD detector for single spectrum per frame. One single scan with 10 s over 100 μm × 100 μm area yielded much higher sensitivity compared to sampled spot scanning measurements and no signal fluctuations attributed to sampled spot scan. This readout method is able to serve as one of key technologies that will bring quantitative multiplexed detection and analysis into practice.

  8. Design and implementation of a nanosecond time-stamping readout system-on-chip for photo-detectors

    International Nuclear Information System (INIS)

    Anvar, Shebli; Château, Frédéric; Le Provost, Hervé; Louis, Frédéric; Manolopoulos, Konstantinos; Moudden, Yassir; Vallage, Bertrand; Zonca, Eric

    2014-01-01

    A readout system suitable for a large number of synchronized photo-detection units has been designed. Each unit embeds a specifically designed fully integrated communicating system based on Xilinx FPGA SoC technology. It runs the VxWorks real-time OS and a custom data acquisition software designed within the Ice middleware framework, resulting in a highly flexible, controllable and scalable distributed application. Clock distribution and delay calibration over customized fixed latency gigabit Ethernet links enable synchronous time-stamping of events with nanosecond precision. The implementation of this readout system on several data-collecting units as well as its performances are described

  9. Microcontroller based four-channel current readout unit for beam slit monitor

    International Nuclear Information System (INIS)

    Holikatti, A.C.; Puntambekar, T.A.; Pithawa, C.K.

    2009-01-01

    This paper describes the design and development of a microcontroller based four-channel current readout unit for Beam Slit Monitor (BSM) installed in Transport Line-1 of Indus Accelerator Complex. BSM is a diagnostic device consisting of two horizontal and two vertical blades, which can be moved independently in to the beam pipe to cut the beam transversely. The readout unit employs switched integrators with reset, hold and select switches and timing and control unit. It integrates the current output of the four blades of BSM and produces an output corresponding to the beam charge intercepted by the blade. The integrator outputs are then multiplexed and digitized using 12-bit ADC. Acquired digital data from ADC is stored into on-chip RAM of the microcontroller. The readout sequence is synchronized with the Microtron beam-timing signal. The timing of integration, hold and reset cycles is controlled by the microcontroller. The unit is connected on a serial link to the host computer in main control room. This unit has been integrated with the BSM system and is being used to obtain the electron beam profile. (author)

  10. Indium phosphide-based monolithically integrated PIN waveguide photodiode readout for resonant cantilever sensors

    Energy Technology Data Exchange (ETDEWEB)

    Siwak, N. P. [Department of Electrical and Computer Engineering, Institute for Systems Research, University of Maryland, College Park, Maryland 20742 (United States); Laboratory for the Physical Sciences, 8050 Greenmead Drive, College Park, Maryland 20740 (United States); Fan, X. Z.; Ghodssi, R. [Department of Electrical and Computer Engineering, Institute for Systems Research, University of Maryland, College Park, Maryland 20742 (United States); Kanakaraju, S.; Richardson, C. J. K. [Laboratory for the Physical Sciences, 8050 Greenmead Drive, College Park, Maryland 20740 (United States)

    2014-10-06

    An integrated photodiode displacement readout scheme for a microelectromechanical cantilever waveguide resonator sensing platform is presented. III-V semiconductors are used to enable the monolithic integration of passive waveguides with active optical components. This work builds upon previously demonstrated results by measuring the displacement of cantilever waveguide resonators with on-chip waveguide PIN photodiodes. The on-chip integration of the readout provides an additional 70% improvement in mass sensitivity compared to off-chip photodetector designs due to measurement stability and minimized coupling loss. In addition to increased measurement stability, reduced packaging complexity is achieved due to the simplicity of the readout design. We have fabricated cantilever waveguides with integrated photodetectors and experimentally characterized these cantilever sensors with monolithically integrated PIN photodiodes.

  11. Performance of an optical readout GEM-based TPC

    International Nuclear Information System (INIS)

    Margato, L.M.S.; Fraga, F.A.F.; Fetal, S.T.G.; Fraga, M.M.F.R.; Balau, E.F.S.; Blanco, A.; Marques, R. Ferreira; Policarpo, A.J.P.L

    2004-01-01

    We report on the operation of a GEM-based small TPC using an optical readout. The detector was operated with a mixture of Ar+CF 4 using 5.48 MeV alpha particles obtained from a 241 Am source and the GEM scintillation was concurrently read by a CCD camera and a photomultiplier. Precision collimators were used to define the track orientation. Qualitative results on the accuracy of the track angle, length and charge deposition measurements are presented

  12. Test of a PCIe based readout option for PANDA

    Energy Technology Data Exchange (ETDEWEB)

    Reiter, Simon; Lange, Soeren; Kuehn, Wolfgang [Justus-Liebig-Universitaet Giessen (Germany); Engel, Heiko [Goethe-Universitaet Frankfurt (Germany); Collaboration: PANDA-Collaboration

    2016-07-01

    The future PANDA detector will achieve an event rate at about 20 MHz resulting in a high data load of up to 200 GB/s. The data acquisition system will be based on a triggerless readout concept, leading to the requirement of large data bandwidths. The data reduction will be guaranteed on the first level by an array of FPGAs running a full on-line reconstruction followed by the second level of a CPU/GPU cluster to achieve a reduction factor more than 1000. The C-RORC (Common Readout Receiver Card), originally developed for ALICE, provides on the one hand 12 optical links with 6.25 Gbps each, and on the other hand a PCIe interface with up to 40 Gbps. The receiver card has been installed and tested, and the firmware has been adjusted for the Panda data format. Test results are presented.

  13. Development of n+-in-p planar pixel quadsensor flip-chipped with FE-I4 readout ASICs

    International Nuclear Information System (INIS)

    Unno, Y.; Hanagaki, K.; Hori, R.; Ikegami, Y.; Nakamura, K.; Takubo, Y.; Kamada, S.; Yamamura, K.; Yamamoto, H.; Takashima, R.; Tojo, J.; Kono, T.; Nagai, R.; Saito, S.; Sugibayashi, K.; Hirose, M.; Jinnouchi, O.; Sato, S.; Sawai, H.; Hara, K.

    2017-01-01

    We have developed flip-chip modules applicable to the pixel detector for the HL-LHC. New radiation-tolerant n + -in-p planar pixel sensors of a size of four FE-I4 application-specific integrated circuits (ASICs) are laid out in a 6-in wafer. Variation in readout connection for the pixels at the boundary of ASICs is implemented in the design of quadsensors. Bump bonding technology is developed for four ASICs onto one quadsensor. Both sensors and ASICs are thinned to 150 μm before bump bonding, and are held flat with vacuum chucks. Using lead-free SnAg solder bumps, we encounter deficiency with large areas of disconnected bumps after thermal stress treatment, including irradiation. Surface oxidation of the solder bumps is identified as a critical source of this deficiency after bump bonding trials, using SnAg bumps with solder flux, indium bumps, and SnAg bumps with a newly-introduced hydrogen-reflow process. With hydrogen-reflow, we establish flux-less bump bonding technology with SnAg bumps, appropriate for mass production of the flip-chip modules with thin sensors and thin ASICs.

  14. Electronic readout for THGEM detectors based on FPGA TDCs

    Energy Technology Data Exchange (ETDEWEB)

    Baumann, Tobias; Buechele, Maximilian; Fischer, Horst; Gorzellik, Matthias; Grussenmeyer, Tobias; Herrmann, Florian; Joerg, Philipp; Koenigsmann, Kay; Kremser, Paul; Kunz, Tobias; Michalski, Christoph; Schopferer, Sebastian; Szameitat, Tobias [Physikalisches Institut, Freiburg Univ. (Germany); Collaboration: COMPASS-II RICH upgrade Group

    2013-07-01

    In the framework of the RD51 programme the characteristics of a new detector design, called THGEM, which is based on multi-layer arrangements of printed circuit board material, is investigated. The THGEMs combine the advantages for covering gains up to 10{sup 6} in electron multiplication at large detector areas and low material budget. Studies are performed by extending the design to a hybrid gas detector by adding a Micromega layer, which significantly improves the ion back flow ratio of the chamber. With the upgrade of the COMPASS experiment at CERN a MWPC plane of the RICH-1 detector will be replaced by installing THGEM chambers. This summarizes to 40k channels of electronic readout, including amplification, discrimination and time-to-digital conversion of the anode signals. Due to the expected hit rate of the detector we design a cost-efficient TDC, based on Artix7 FPGA technology, with time resolution below 100 ps and sufficient hit buffer depth. To cover the large readout area the data is transferred via optical fibres to a central readout system which is part of the GANDALF framework.

  15. Alpha-particle detection based on the BJT detector and simple, IC-based readout electronics

    Energy Technology Data Exchange (ETDEWEB)

    Rovati, L; Bonaiuti, M [Dipartimento di Ingegneria dell' Informazione, Universita di Modena e Reggio Emilia, Modena (Italy); Bettarini, S [Dipartimento di Fisica, Universita di Pisa and INFN Pisa, Pisa (Italy); Bosisio, L [Dipartimento di Fisica, Universita di Trieste and INFN Trieste, Trieste (Italy); Dalla Betta, G-F; Tyzhnevyi, V [Dipartimento di Ingegneria e Scienza dell' Informazione, Universita di Trento e INFN Trento, Trento (Italy); Verzellesi, G [Dipartimento di Scienze e Metodi dell' Ingegneria, Universita di Modena e Reggio Emilia and INFN Trento, Reggio Emilia (Italy); Zorzi, N, E-mail: giovanni.verzellesi@unimore.i [Fondazione Bruno Kessler (FBK), Trento (Italy)

    2009-11-15

    In this paper we propose a portable instrument for alpha-particle detection based on a previously-developed BJT detector and a simple, IC-based readout electronics. Experimental tests of the BJT detector and readout electronics are reported. Numerical simulations are adopted to predict the performance enhancement achievable with optimized BJT detectors.

  16. Alpha-particle detection based on the BJT detector and simple, IC-based readout electronics

    International Nuclear Information System (INIS)

    Rovati, L; Bonaiuti, M; Bettarini, S; Bosisio, L; Dalla Betta, G-F; Tyzhnevyi, V; Verzellesi, G; Zorzi, N

    2009-01-01

    In this paper we propose a portable instrument for alpha-particle detection based on a previously-developed BJT detector and a simple, IC-based readout electronics. Experimental tests of the BJT detector and readout electronics are reported. Numerical simulations are adopted to predict the performance enhancement achievable with optimized BJT detectors.

  17. Evaluation of 320x240 pixel LEC GaAs Schottky barrier X-ray imaging arrays, hybridized to CMOS readout circuit based on charge integration

    CERN Document Server

    Irsigler, R; Alverbro, J; Borglind, J; Froejdh, C; Helander, P; Manolopoulos, S; O'Shea, V; Smith, K

    1999-01-01

    320x240 pixels GaAs Schottky barrier detector arrays were fabricated, hybridized to silicon readout circuits, and subsequently evaluated. The detector chip was based on semi-insulating LEC GaAs material. The square shaped pixel detector elements were of the Schottky barrier type and had a pitch of 38 mu m. The GaAs wafers were thinned down prior to the fabrication of the ohmic back contact. After dicing, the chips were indium bump, flip-chip bonded to CMOS readout circuits based on charge integration, and finally evaluated. A bias voltage between 50 and 100 V was sufficient to operate the detector. Results on I-V characteristics, noise behaviour and response to X-ray radiation are presented. Images of various objects and slit patterns were acquired by using a standard dental imaging X-ray source. The work done was a part of the XIMAGE project financed by the European Community (Brite-Euram). (author)

  18. Study of Charge Diffusion in a Silicon Detector Using an Energy Sensitive Pixel Readout Chip

    CERN Document Server

    Schioppa, E. J.; van Beuzekom, M.; Visser, J.; Koffeman, E.; Heijne, E.; Engel, K. J.; Uher, J.

    2015-01-01

    A 300 μm thick thin p-on-n silicon sensor was connected to an energy sensitive pixel readout ASIC and exposed to a beam of highly energetic charged particles. By exploiting the spectral information and the fine segmentation of the detector, we were able to measure the evolution of the transverse profile of the charge carriers cloud in the sensor as a function of the drift distance from the point of generation. The result does not rely on model assumptions or electric field calculations. The data are also used to validate numerical simulations and to predict the detector spectral response to an X-ray fluorescence spectrum for applications in X-ray imaging.

  19. The RD53 Collaboration's SystemVerilog-UVM Simulation Framework and its General Applicability to Design of Advanced Pixel Readout Chips

    CERN Document Server

    Marconi, S.; Placidi, P.; Christiansen, J.; Hemperek, T.

    2014-01-01

    The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip building blocks (Intellectual Properties, IPs). This work is focused on the implemented simulation and verification environment named VEPIX53, built using the SystemVerilog language and the Universal Verification Methodology (UVM) class library in the framework of the RD53 Collaboration. The environment supports pixel chips at different levels of description: its reusable components feature the generation of different classes of parameterized input hits to the pixel matrix, monitoring of pixel chip inputs and outputs, conformity checks between predicted and actual outputs and collection of statistics on system performance. The environment has been tested performing a study of shared architectures of the trigger late...

  20. The GLUEchip: A custom VLSI chip for detectors readout and associative memories circuits

    International Nuclear Information System (INIS)

    Amendolia, S.R.; Galeotti, S.; Morsani, F.; Passuello, D.; Ristori, L.; Turini, N.

    1993-01-01

    An associative memory full-custom VLSI chip for pattern recognition has been designed and tested in the past years. It's the AMchip, that contains 128 patterns of 60 bits each. To expand the pattern capacity of an Associative Memory bank, the custom VLSI GLUEchip has been developed. The GLUEchip allows the interconnection of up to 16 AMchips or up to 16 GLUEchips: the resulting tree-like structure works like a single AMchip with an output pipelined structure and a pattern capacity increased by a factor 16 for each GLUEchip used

  1. A CMOS 130nm Evaluation digitzer chip for silicon strips readout

    CERN Document Server

    Da Silva, W; Dhellot, M; Fougeron, D; Genat, J F; Hermel, R; Huppert, J f; Kapusta, F; Lebbolo, H; Pham, T H; Rossel, F; Savoy-navarro, A; Sefri, R; Vilalte

    2007-01-01

    A CMOS 130nm evaluation chip intended to read Silicon strip detectors at the ILC has been designed and successfully tested. Optimized for a detector capacitance of 10 pF, it includes four channels of charge integration, pulse shaping, a 16-deep analogue sampler triggered on input analogue sums, and parallel analogue to digital conversion. Tests results of the full chain are reported, demonstrating the behaviour and performance of the full sampling process and analogue to digital conversion. Each channel dissipates less than one milli-Watt static power.

  2. A multi-channel time-to-digital converter chip for drift chamber readout

    International Nuclear Information System (INIS)

    Santos, D.M.; Chau, A.; DeBusshere, D.; Dow, S.; Flasck, J.; Levi, M.; Kirsten, F.; Su, E.

    1995-12-01

    A complete, multi-channel, timing and amplitude measurement IC for use in drift chamber applications is described. By targeting specific resolutions, i.e. 6-bits of resolution for both time and amplitude, area and power can be minimized while achieving the proper level of measurement accuracy. Time is digitized using one eight channel TDC comprised of a delay locked loop and eight sets of latches and encoders. Amplitude (for dE/dx) is digitized using a dual-range FADC for each channel. Eight bits of dynamic range with six bits of accuracy are achieved with the dual-range. The timing and amplitude information is multiplexed into one DRAM (Dynamic Random Access Memory) trigger latency buffer. Interesting events are then transferred into an SRAM (Static Random Access Memory) readout buffer before the latency time has expired. The design has been optimized to achieve the requisite resolution using the smallest area and lowest power. The circuit has been implemented in a 0.8μ triple metal CMOS process. The TDC sub-element has been measured to have better than 135 ps time resolution and 35 ps jitter. The DRAM has a measured cycle time of 80 MHz

  3. A multi-channel time-to-digital converter chip for drift chamber readout

    International Nuclear Information System (INIS)

    Chau, A.; DeBusschere, D.; Dow, S.F.; Flasck, J.; Levi, M.E.; Kirsten, F.; Su, E.; Santos, D.M.

    1996-01-01

    A complete, multi-channel, timing and amplitude measurement IC for use in drift chamber applications is described. By targeting specific resolutions, i.e., 6-bits of resolution for both time and amplitude, area and power can be minimized while achieving the proper level of measurement accuracy. Time is digitized using an TDC comprised of a delay locked loop, latch and encoder. Amplitude (for dE/dx) is digitized using a dual-range FADC for each channel. Eight bits of dynamic range with six bits of accuracy are achieved with the dual-range. Eight complete channels of timing and amplitude information are multiplexed into one DRAM (Dynamic Random Access Memory) trigger latency buffer. Interesting events are subsequently transferred into an SRAM (Static Random Access Memory) readout buffer before the latency time has expired. The design has been optimized to achieve the requisite resolution using the smallest area and lowest power. The circuit has been implemented in an 0.8 microm triple metal CMOS process. The measured results indicate that the differential non-linearities of the TDC and the FADC are 200 ps and 10 mV, respectively. The integral nonlinearities of the TDC and the FADC are 230 ps and 9 mV, respectively

  4. Multimedia-Based Chip Design Education.

    Science.gov (United States)

    Catalkaya, Tamer; Golze, Ulrich

    This paper focuses on multimedia computer-based training programs on chip design. Their development must be fast and economical, in order to be affordable by technical university institutions. The self-produced teaching program Illusion, which demonstrates a monitor controller as an example of a small but complete chip design, was implemented to…

  5. Single event upset studies on the CMS tracker APV25 readout chip

    International Nuclear Information System (INIS)

    Noah, E.; Bauer, T.; Bisello, D.; Faccio, F.; Friedl, M.; Fulcher, J.R.; Hall, G.; Huhtinen, M.; Kaminsky, A.; Pernicka, M.; Raymond, M.; Wyss, J.

    2002-01-01

    The microstrip tracker for the CMS experiment at the CERN Large Hadron Collider will be read out using APV25 chips. During high luminosity running the tracker will be exposed to particle fluxes up to 10 7 cm -2 s -1 , which raises concerns that the APV25 could occasionally suffer Single Event Upsets (SEUs). The effect of SEU on the APV25 has been studied to investigate implications for CMS detector operation and from the viewpoint of detailed circuit operation, to improve the understanding of its origin and what factors affect its magnitude. Simulations were performed to reconstruct the effects created by highly ionising particles striking sensitive parts of the circuits, along with consideration of the underlying mechanisms of charge deposition, collection and the consequences. A model to predict the behaviour of the memory circuits in the APV25 has been developed and data collected from dedicated experiments using both heavy ions and hadrons have been shown to support it

  6. Evaluation of local radiation damage in silicon sensor via charge collection mapping with the Timepix read-out chip

    International Nuclear Information System (INIS)

    Platkevic, M; Jakubek, J; Jakubek, M; Pospisil, S; Zemlicka, J; Havranek, V; Semian, V

    2013-01-01

    Studies of radiation hardness of silicon sensors are standardly performed with single-pad detectors evaluating their global electrical properties. In this work we introduce a technique to visualize and determine the spatial distribution of radiation damage across the area of a semiconductor sensor. The sensor properties such as charge collection efficiency and charge diffusion were evaluated locally at many points of the sensor creating 2D maps. For this purpose we used a silicon sensor bump bonded to the pixelated Timepix read-out chip. This device, operated in Time-over-threshold (TOT) mode, allows for the direct energy measurement in each pixel. Selected regions of the sensor were intentionally damaged by defined doses (up to 10 12 particles/cm 2 ) of energetic protons (of 2.5 and 4 MeV). The extent of the damage was measured in terms of the detector response to the same ions. This procedure was performed either on-line during irradiation or off-line after it. The response of the detector to each single particle was analyzed determining the charge collection efficiency and lateral charge diffusion. We evaluated the changes of these parameters as a function of radiation dose. These features are related to the local properties such as the spatial homogeneity of the sensor. The effect of radiation damage was also independently investigated measuring local changes of signal response to γ, and X rays and alpha particles.

  7. The TOTEM DAQ based on the Scalable Readout System (SRS)

    Science.gov (United States)

    Quinto, Michele; Cafagna, Francesco S.; Fiergolski, Adrian; Radicioni, Emilio

    2018-02-01

    The TOTEM (TOTal cross section, Elastic scattering and diffraction dissociation Measurement at the LHC) experiment at LHC, has been designed to measure the total proton-proton cross-section and study the elastic and diffractive scattering at the LHC energies. In order to cope with the increased machine luminosity and the higher statistic required by the extension of the TOTEM physics program, approved for the LHC's Run Two phase, the previous VME based data acquisition system has been replaced with a new one based on the Scalable Readout System. The system features an aggregated data throughput of 2GB / s towards the online storage system. This makes it possible to sustain a maximum trigger rate of ˜ 24kHz, to be compared with the 1KHz rate of the previous system. The trigger rate is further improved by implementing zero-suppression and second-level hardware algorithms in the Scalable Readout System. The new system fulfils the requirements for an increased efficiency, providing higher bandwidth, and increasing the purity of the data recorded. Moreover full compatibility has been guaranteed with the legacy front-end hardware, as well as with the DAQ interface of the CMS experiment and with the LHC's Timing, Trigger and Control distribution system. In this contribution we describe in detail the architecture of full system and its performance measured during the commissioning phase at the LHC Interaction Point.

  8. Radiation and Temperature Effects on the APV25 Readout Chip for the CMS Tracker

    CERN Document Server

    Messomo, Etam Albert Noah

    2002-01-01

    The Compact Muon Solenoid (CMS) is one of four particle detectors designed for use at the Large Hadron Collider (LHC) currently under construction at CERN, the European Laboratory for Particle Physics in Geneva. The LHC will accelerate two counterrotating beams of protons to energies of 7 TeV and produce 109 proton-proton collisions per second at a bunch-crossing frequency of 40 MHz. These collisions occuring at the centre of CMS will generate a very hostile radiation environment. The CMS sub-detector system closest to the collision point is the highly segmented Tracker, consisting of a silicon pixel detector with 45 million channels and a silicon microstrip detector with 10 million channels. The microstrip detector will be read out by the APV25, a custom-made chip manufactured in a commercial 0.25 µm CMOS microelectronics process. Radiation and temperature studies are required to ensure that the APV25 can operate reliably in the CMS environment. The radiation effects to which the APV25 could be susceptible ...

  9. Embedded Adaptive Optics for Ubiquitous Lab-on-a-Chip Readout on Intact Cell Phones

    Directory of Open Access Journals (Sweden)

    Pakorn Preechaburana

    2012-06-01

    Full Text Available The evaluation of disposable lab-on-a-chip (LOC devices on cell phones is an attractive alternative to migrate the analytical strength of LOC solutions to decentralized sensing applications. Imaging the micrometric detection areas of LOCs in contact with intact phone cameras is central to provide such capability. This work demonstrates a disposable and morphing liquid lens concept that can be integrated in LOC devices and refocuses micrometric features in the range necessary for LOC evaluation using diverse cell phone cameras. During natural evaporation, the lens focus varies adapting to different type of cameras. Standard software in the phone commands a time-lapse acquisition for best focal selection that is sufficient to capture and resolve, under ambient illumination, 50 μm features in regions larger than 500 × 500 μm2. In this way, the present concept introduces a generic solution compatible with the use of diverse and unmodified cell phone cameras to evaluate disposable LOC devices.

  10. Pixelized M-pi-n CdTe detector coupled to Medipix2 readout chip

    CERN Document Server

    Kalliopuska, J; Penttila, R; Andersson, H; Nenonen, S; Gadda, A; Pohjonen, H; Vanttajac, I; Laaksoc, P; Likonen, J

    2011-01-01

    We have realized a simple method for patterning an M-pi-n CdTe diode with a deeply diffused pn-junction, such as indium anode on CdTe. The method relies on removing the semiconductor material on the anode-side of the diode until the physical junction has been reached. The pixelization of the p-type CdTe diode with an indium anode has been demonstrated by patterning perpendicular trenches with a high precision diamond blade and pulsed laser. Pixelization or microstrip pattering can be done on both sides of the diode, also on the cathode-side to realize double sided detector configuration. The article compares the patterning quality of the diamond blade process, pulsed pico-second and femto-second lasers processes. Leakage currents and inter-strip resistance have been measured and are used as the basis of the comparison. Secondary ion mass spectrometry (SIMS) characterization has been done for a diode to define the pn-junction depth and to see the effect of the thermal loads of the flip-chip bonding process. Th...

  11. Effect of gamma irradiation on leakage current in CMOS read-out chips for the ATLAS upgrade silicon strip tracker at the HL-LHC

    CERN Document Server

    Stucci, Stefania Antonia; Lynn, Dave; Kierstead, James; Kuczewski, Philip; van Nieuwenhuizen, Gerrit J; Rosin, Guy; Tricoli, Alessandro

    2017-01-01

    The increase of the leakage current of NMOS transistors in detector readout chips in certain 130 nm CMOS technologies during exposure to ionising radiation needs special consideration in the design of detector systems, as this can result in a large increase of the supply current and power dissipation. As part of the R&D; program for the upgrade of the ATLAS inner detector tracker for the High Luminosity upgrade of the LHC at CERN, a dedicated set of irradiations have been carried out with the $^60$Co gamma-ray source at the Brookhaven National Laboratory. Measurements will be presented that characterise the increase in the digital leakage current in the 130 nm-technology ABC130 readout chips. The variation of the current as a function of time and total ionising dose has been studied under various conditions of dose rate, temperature and power applied to the chip. The range of variation of dose rates and temperatures has been set to be close to those expected at the High Luminosity LHC, i.e. in the range 0...

  12. FE-I2 a front-end readout chip designed in a commercial 025- mu m process for the ATLAS pixel detector at LHC

    CERN Document Server

    Blanquart, L; Einsweiler, Kevin F; Fischer, P; Mandelli, E; Meddeler, G; Peric, I

    2004-01-01

    A new front-end chip (FE-I2) has been developed for the ATLAS pixel detector at the future Large Hadron Collider (LHC) accelerator facility of the European Laboratory for Particle Physics (CERN). This chip has been submitted in a commercial 0.25- mu m CMOS process using special layout techniques for radiation tolerance. It comprises 2880 pixels arranged into 18 columns of 160 channels. Each pixel element of dimension 50 mu m * 400 mu m is composed of a charge- sensitive amplifier followed by a fast discriminator with a detection threshold adjustable within a range of 0-6000 electrons and slow control logic incorporating a wired-hit-Or, preamplifier-kill, readout mask, and automatic threshold tuning circuitry. There are two single-event- upset (SEU)-tolerant DACs for reducing threshold (7-b) and recovery- time (3-b) mismatches from pixel to pixel along with digital hit emulation and a differential readout circuit aimed at transporting time-stamped data from each pixel to buffers at the bottom of the chip. In c...

  13. The RD53 collaboration's SystemVerilog-UVM simulation framework and its general applicability to design of advanced pixel readout chips

    International Nuclear Information System (INIS)

    Marconi, S; Christiansen, J; Conti, E; Placidi, P; Hemperek, T

    2014-01-01

    The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip building blocks (Intellectual Properties, IPs). This work is focused on the implemented simulation and verification environment named VEPIX53, built using the SystemVerilog language and the Universal Verification Methodology (UVM) class library in the framework of the RD53 Collaboration. The environment supports pixel chips at different levels of description: its reusable components feature the generation of different classes of parameterized input hits to the pixel matrix, monitoring of pixel chip inputs and outputs, conformity checks between predicted and actual outputs and collection of statistics on system performance. The environment has been tested performing a study of shared architectures of the trigger latency buffering section of pixel chips. A fully shared architecture and a distributed one have been described at behavioral level and simulated; the resulting memory occupancy statistics and hit loss rates have subsequently been compared

  14. Optimised cantilever biosensor with piezoresistive read-out

    DEFF Research Database (Denmark)

    Rasmussen, Peter; Thaysen, J.; Hansen, Ole

    2003-01-01

    We present a cantilever-based biochemical sensor with piezoresistive read-out which has been optimised for measuring surface stress. The resistors and the electrical wiring on the chip are encapsulated in low-pressure chemical vapor deposition (LPCVD) silicon nitride, so that the chip is well sui...

  15. A Medipix3 readout system based on the National Instruments FlexRIO card and using the LabVIEW programming environment

    Science.gov (United States)

    Horswell, I.; Gimenez, E. N.; Marchal, J.; Tartoni, N.

    2011-01-01

    Hybrid silicon photon-counting detectors are becoming standard equipment for many synchrotron applications. The latest in the Medipix family of read-out chips designed as part of the Medipix Collaboration at CERN is the Medipix3, which while maintaining the same pixel size as its predecessor, offers increased functionality and operating modes. The active area of the Medipix3 chip is approx 14mm × 14mm (containing 256 × 256 pixels) which is not large enough for many detector applications, this results in the need to tile many sensors and chips. As a first step on the road to develop such a detector, it was decided to build a prototype single chip readout system to gain the necessary experience in operating a Medipix3 chip. To provide a flexible learning and development tool it was decided to build an interface based on the recently released FlexRIOTM system from National Instruments and to use the LabVIEWTM graphical programming environment. This system and the achieved performance are described in this paper.

  16. GOSSIPO-4: Evaluation of a Novel PLL-Based TDC-Technique for the Readout of GridPix-Detectors

    CERN Document Server

    Brezina, C; Zappon, F; Van Beuzekom, M; Campbell, M; Desch, K; Van der Graaf, H; Gromov, V; Kluit, R; Llopart, X; Poikela, T; Zivkovic, V

    2014-01-01

    The direct readout of Micro-Pattern Gaseous Detectors (MPGDs) with bare pixel chips introduces the need for a new generation of readout electronics featuring a high spatial granularity as well as a highly accurate time measurement in each pixel. GOSSIPO-4, fabricated in a 130 nm CMOS technology, is a demonstrator ASIC investigating the potential of a new TDC-concept that is based on a chip-wide 40 MHz clock which is complemented by an additional 640 MHz clock. The latter is created upon demand by local oscillators distributed across the pixel matrix. PLL tuning of the local oscillators allows for automatic compensation of frequency fluctuations caused by process parameter, supply voltage and temperature variations. The developed PLL locks within s and achieves a duty cycle of 50.75% with a time interval error of only 23.4 ps. Mean DNL and INL of the TDC are less than 20% of the time bin size of 1.56 ns under all anticipated conditions.

  17. A Low Noise CMOS Readout Based on a Polymer-Coated SAW Array for Miniature Electronic Nose

    Directory of Open Access Journals (Sweden)

    Cheng-Chun Wu

    2016-10-01

    Full Text Available An electronic nose (E-Nose is one of the applications for surface acoustic wave (SAW sensors. In this paper, we present a low-noise complementary metal–oxide–semiconductor (CMOS readout application-specific integrated circuit (ASIC based on an SAW sensor array for achieving a miniature E-Nose. The center frequency of the SAW sensors was measured to be approximately 114 MHz. Because of interference between the sensors, we designed a low-noise CMOS frequency readout circuit to enable the SAW sensor to obtain frequency variation. The proposed circuit was fabricated in Taiwan Semiconductor Manufacturing Company (TSMC 0.18 μm 1P6M CMOS process technology. The total chip size was nearly 1203 × 1203 μm2. The chip was operated at a supply voltage of 1 V for a digital circuit and 1.8 V for an analog circuit. The least measurable difference between frequencies was 4 Hz. The detection limit of the system, when estimated using methanol and ethanol, was 0.1 ppm. Their linearity was in the range of 0.1 to 26,000 ppm. The power consumption levels of the analog and digital circuits were 1.742 mW and 761 μW, respectively.

  18. 3 ns single-shot read-out in a quantum dot-based memory structure

    International Nuclear Information System (INIS)

    Nowozin, T.; Bimberg, D.; Beckel, A.; Lorke, A.; Geller, M.

    2014-01-01

    Fast read-out of two to six charges per dot from the ground and first excited state in a quantum dot (QD)-based memory is demonstrated using a two-dimensional electron gas. Single-shot measurements on modulation-doped field-effect transistor structures with embedded InAs/GaAs QDs show read-out times as short as 3 ns. At low temperature (T = 4.2 K) this read-out time is still limited by the parasitics of the setup and the device structure. Faster read-out times and a larger read-out signal are expected for an improved setup and device structure

  19. Gossipo-3 A prototype of a Front-End Pixel Chip for Read-Out of Micro-Pattern Gas Detectors

    CERN Document Server

    Brezina, Christpoh; van der Graaf, Haryy; Gromov, Vladimir; Kluit, Ruud; Kruth, Andre; Zappon, Francesco

    2009-01-01

    In a joint effort of Nikhef (Amsterdam) and the University of Bonn, the Gossipo-3 integrated circuit (IC) has been developed. This circuit is a prototype of a chip dedicated for read-out of various types of position sensitive Micro-Pattern Gas detectors (MPGD). The Gossipo-3 is defined as a set of building blocks to be used in a future highly granulated (60 μm) chip. The pixel circuit can operate in two modes. In Time mode every readout pixel measures the hit arrival time and the charge deposit. For this purpose it has been equipped with a high resolution TDC (1.7 ns) covering dynamic range up to 102 μs. Charge collected by the pixel will be measured using Time-over- Threshold method in the range from 400 e- to 28000 e- with accuracy of 200 e- (standard deviation). In Counting mode every pixel operates as a 24-bit counter, counting the number of incoming hits. The circuit is also optimized to operate at low power consumption (100 mW/cm2) that is required to avoid the need for massive power transport and coo...

  20. Chip based electroanalytical systems for cell analysis

    DEFF Research Database (Denmark)

    Spegel, C.; Heiskanen, A.; Skjolding, L.H.D.

    2008-01-01

    ' measurements of processes related to living cells, i.e., systems without lysing the cells. The focus is on chip based amperometric and impedimetric cell analysis systems where measurements utilizing solely carbon fiber microelectrodes (CFME) and other nonchip electrode formats, such as CFME for exocytosis...

  1. Central FPGA-based Destination and Load Control in the LHCb MHz Event Readout

    CERN Document Server

    Jacobsson, Richard

    2012-01-01

    The readout strategy of the LHCb experiment [1] is based on complete event readout at 1 MHz [2]. Over 300 sub-detector readout boards transmit event fragments at 1 MHz over a commercial 70 Gigabyte/s switching network to a distributed event building and trigger processing farm with 1470 individual multi-core computer nodes [3]. In the original specifications, the readout was based on a pure push protocol. This paper describes the proposal, implementation, and experience of a powerful non-conventional mixture of a push and a pull protocol, akin to credit-based flow control. A high-speed FPGA-based central master module controls the event fragment packing in the readout boards, the assignment of the farm node destination for each event, and controls the farm load based on an asynchronous pull mechanism from each farm node. This dynamic readout scheme relies on generic event requests and the concept of node credit allowing load balancing and trigger rate regulation as a function of the global farm load. It also ...

  2. Simulation of digital pixel readout chip architectures with the RD53 SystemVerilog-UVM verification environment using Monte Carlo physics data

    International Nuclear Information System (INIS)

    Conti, E.; Marconi, S.; Christiansen, J.; Placidi, P.; Hemperek, T.

    2016-01-01

    The simulation and verification framework developed by the RD53 collaboration is a powerful tool for global architecture optimization and design verification of next generation hybrid pixel readout chips. In this paper the framework is used for studying digital pixel chip architectures at behavioral level. This is carried out by simulating a dedicated, highly parameterized pixel chip description, which makes it possible to investigate different grouping strategies between pixels and different latency buffering and arbitration schemes. The pixel hit information used as simulation input can be either generated internally in the framework or imported from external Monte Carlo detector simulation data. The latter have been provided by both the CMS and ATLAS experiments, featuring HL-LHC operating conditions and the specifications related to the Phase 2 upgrade. Pixel regions and double columns were simulated using such Monte Carlo data as inputs: the performance of different latency buffering architectures was compared and the compliance of different link speeds with the expected column data rate was verified

  3. Polymeric cantilever-based biosensors with integrated readout

    DEFF Research Database (Denmark)

    Johansson, Alicia; Blagoi, Gabriela; Boisen, Anja

    2006-01-01

    The authors present an SU-8 cantilever chip with integrated piezoresistors for detection of surface stress changes due to adsorption of biomolecules on the cantilever surface. Mercaptohexanol is used as a model biomolecule to study molecular interactions with Au-coated SU-8 cantilevers and surfac...

  4. An inverter-based capacitive trans-impedance amplifier readout with offset cancellation and temporal noise reduction for IR focal plane array

    Science.gov (United States)

    Chen, Hsin-Han; Hsieh, Chih-Cheng

    2013-09-01

    This paper presents a readout integrated circuit (ROIC) with inverter-based capacitive trans-impedance amplifier (CTIA) and pseudo-multiple sampling technique for infrared focal plane array (IRFPA). The proposed inverter-based CTIA with a coupling capacitor [1], executing auto-zeroing technique to cancel out the varied offset voltage from process variation, is used to substitute differential amplifier in conventional CTIA. The tunable detector bias is applied from a global external bias before exposure. This scheme not only retains stable detector bias voltage and signal injection efficiency, but also reduces the pixel area as well. Pseudo-multiple sampling technique [2] is adopted to reduce the temporal noise of readout circuit. The noise reduction performance is comparable to the conventional multiple sampling operation without need of longer readout time proportional to the number of samples. A CMOS image sensor chip with 55×65 pixel array has been fabricated in 0.18um CMOS technology. It achieves a 12um×12um pixel size, a frame rate of 72 fps, a power-per-pixel of 0.66uW/pixel, and a readout temporal noise of 1.06mVrms (16 times of pseudo-multiple sampling), respectively.

  5. Central FPGA-based destination and load control in the LHCb MHz event readout

    Science.gov (United States)

    Jacobsson, R.

    2012-10-01

    The readout strategy of the LHCb experiment is based on complete event readout at 1 MHz. A set of 320 sub-detector readout boards transmit event fragments at total rate of 24.6 MHz at a bandwidth usage of up to 70 GB/s over a commercial switching network based on Gigabit Ethernet to a distributed event building and high-level trigger processing farm with 1470 individual multi-core computer nodes. In the original specifications, the readout was based on a pure push protocol. This paper describes the proposal, implementation, and experience of a non-conventional mixture of a push and a pull protocol, akin to credit-based flow control. An FPGA-based central master module, partly operating at the LHC bunch clock frequency of 40.08 MHz and partly at a double clock speed, is in charge of the entire trigger and readout control from the front-end electronics up to the high-level trigger farm. One FPGA is dedicated to controlling the event fragment packing in the readout boards, the assignment of the farm node destination for each event, and controls the farm load based on an asynchronous pull mechanism from each farm node. This dynamic readout scheme relies on generic event requests and the concept of node credit allowing load control and trigger rate regulation as a function of the global farm load. It also allows the vital task of fast central monitoring and automatic recovery in-flight of failing nodes while maintaining dead-time and event loss at a minimum. This paper demonstrates the strength and suitability of implementing this real-time task for a very large distributed system in an FPGA where no random delays are introduced, and where extreme reliability and accurate event accounting are fundamental requirements. It was in use during the entire commissioning phase of LHCb and has been in faultless operation during the first two years of physics luminosity data taking.

  6. Central FPGA-based destination and load control in the LHCb MHz event readout

    International Nuclear Information System (INIS)

    Jacobsson, R.

    2012-01-01

    The readout strategy of the LHCb experiment is based on complete event readout at 1 MHz. A set of 320 sub-detector readout boards transmit event fragments at total rate of 24.6 MHz at a bandwidth usage of up to 70 GB/s over a commercial switching network based on Gigabit Ethernet to a distributed event building and high-level trigger processing farm with 1470 individual multi-core computer nodes. In the original specifications, the readout was based on a pure push protocol. This paper describes the proposal, implementation, and experience of a non-conventional mixture of a push and a pull protocol, akin to credit-based flow control. An FPGA-based central master module, partly operating at the LHC bunch clock frequency of 40.08 MHz and partly at a double clock speed, is in charge of the entire trigger and readout control from the front-end electronics up to the high-level trigger farm. One FPGA is dedicated to controlling the event fragment packing in the readout boards, the assignment of the farm node destination for each event, and controls the farm load based on an asynchronous pull mechanism from each farm node. This dynamic readout scheme relies on generic event requests and the concept of node credit allowing load control and trigger rate regulation as a function of the global farm load. It also allows the vital task of fast central monitoring and automatic recovery in-flight of failing nodes while maintaining dead-time and event loss at a minimum. This paper demonstrates the strength and suitability of implementing this real-time task for a very large distributed system in an FPGA where no random delays are introduced, and where extreme reliability and accurate event accounting are fundamental requirements. It was in use during the entire commissioning phase of LHCb and has been in faultless operation during the first two years of physics luminosity data taking.

  7. Silicon-Chip-Based Optical Frequency Combs

    Science.gov (United States)

    2015-10-26

    fiber-based polarization controllers and a polarization beam splitter , and the output power is monitored with a sensitive photodiode. We use a...a single CW laser beam coupled to a microresonators can produce stabilized, octave-spanning combs through highly cascaded four-wave mixing (FWM...resonator designs , the resonator and the coupling waveguide are monolithically integrated. Thus, the entire on-chip configuration of CMOS-compatible

  8. The New APD Based Readout for the Crystal Barrel Calorimeter

    International Nuclear Information System (INIS)

    Urban, M; Honisch, Ch; Steinacher, M

    2015-01-01

    The CBELSA/TAPS experiment at ELSA measures double polarization observables in meson photoproduction off protons and neutrons. To be able to measure purely neutral reactions off polarized neutrons with high efficiency, the main calorimeter has to be integrated into the first level trigger. This requires to exchange the existing PIN photo diode by a new avalanche photo diode (APD) readout. The newly developed readout electronics will provide an energy resolution compatible to the previous set-up and a fast trigger signal down to 10 MeV energy deposit per crystal. After the successful final tests with a 3x3 CsI crystal matrix in Bonn at ELSA and in Mainz at MAMI all front-end electronics were produced in fall 2013. Automated test routines for the front-end electronics were developed and the characterization measurements of all APDs were successfully accomplished in Bonn. The project is supported by the Deutsche Forschungsgemeinschaft (SFB/TR16) and Schweizerischer Nationalfonds

  9. FPGA-based upgrade of the read-out electronics for the low energy polarimeter at the cooler synchrotron

    Energy Technology Data Exchange (ETDEWEB)

    Hempelmann, Nils [Institut fuer Kernphysik, Forschungszentrum Juelich (Germany); Collaboration: JEDI-Collaboration

    2015-07-01

    The Cooler Synchrotron (COSY) is a storage ring used for experiments with polarized proton and deuteron beams. The low energy polarimeter is used to determine the vector and tensor polarization of the beam before injection at kinetic energies up to 45 MeV for protons and 75 MeV for deuterons. The polarimeter uses scintillators to measure the energy of both outgoing particles of a scattering reaction and the time between their detection. The present read-out electronics consists of analog NIM modules and is limited in terms of time resolution and the capability for online data analysis. The read-out electronics will be replaced with a a new system based on analog pulse sampling and an FPGA chip for logic operations. The new system will be able to measure the time at which particles arrive to a precision better than 50 ps, facilitating better background reduction using coincidence measurement. In addition to measuring the beam polarization, the system will be used to precisely determine the vector and tensor analyzing powers for deuteron scattering off carbon at a kinetic energy of 75 MeV.

  10. Chip-based droplet sorting

    Energy Technology Data Exchange (ETDEWEB)

    Beer, Neil Reginald; Lee, Abraham; Hatch, Andrew

    2017-11-21

    A non-contact system for sorting monodisperse water-in-oil emulsion droplets in a microfluidic device based on the droplet's contents and their interaction with an applied electromagnetic field or by identification and sorting.

  11. Feasibility study to use an SRAM-based FPGA in the readout electronics of the upgraded LHCb outer tracker detector

    International Nuclear Information System (INIS)

    Faerber, Christian

    2014-01-01

    This thesis presents a study of the feasibility to use SRAM-based FPGAs as central component of the upgraded LHCb Outer Tracker readout electronics. The FPGA should contain the functionality of a TDC and should provide fast data links using multi-GBit/s transceivers. The TDC core that was developed provides 5 bit time measurements for 32 channels with a bin size of 780 ps. The TDC has the required time resolution of better than 1 ns. This was achieved by manually placing every logic element of the TDC channels and with an iterative procedure feeding timing measurements back to the Place and Route step of the router software. A transceiver and TDC card, and an adapter board for the existing readout electronics was developed. Both boards were used successfully to read out drift times from an Outer Tracker straw-tube module in a cosmic setup. To qualify the proposed electronics for the expected radiation levels an irradiation test with 22 MeV protons and two FPGA boards was performed up to a total ionization dose of 30 Mrad. Both chips sustained the irradiation expected for the full life time of the upgraded LHCb detector of up to 30 krad. After an irradiation dose of 150 krad the first deteriorations of the performance of the chips were observed. The proton cross section for configuration bit flips was determined to be 1.6.10 16 cm 2 per bit. The measured error rate scaled to the upgrade environment would correspond to a manageable firmware error rate.

  12. Test beam results of the first CMS double-sided strip module prototypes using the CBC2 read-out chip

    Energy Technology Data Exchange (ETDEWEB)

    Harb, Ali, E-mail: ali.harb@desy.de; Mussgiller, Andreas; Hauk, Johannes

    2017-02-11

    The CMS Binary Chip (CBC) is a prototype version of the front-end read-out ASIC to be used in the silicon strip modules of the CMS outer tracking detector during the high luminosity phase of the LHC. The CBC is produced in 130 nm CMOS technology and bump-bonded to the hybrid of a double layer silicon strip module, the so-called 2S-p{sub T} module. It has 254 input channels and is designed to provide on-board trigger information to the first level trigger system of CMS, with the capability of cluster-width discrimination and high-p{sub T} track identification. In November 2013 the first 2S-p{sub T} module prototypes equipped with the CBC chips were put to test at the DESY-II test beam facility. Data were collected exploiting a beam of positrons with an energy ranging from 2 to 4 GeV. In this paper the test setup and the results are presented.

  13. Offset correction system for 128-channel self-triggering readout chip with in-channel 5-bit energy measurement functionality

    Energy Technology Data Exchange (ETDEWEB)

    Otfinowski, P., E-mail: potfin@agh.edu.pl; Grybos, P.; Szczygiel, R.; Kasinski, K.

    2015-04-21

    We report on a novel, two-stage 8-bit trimming solution dedicated for multichannel systems with reduced trim DAC area occupancy. The presented design was used for comparator offset correction in a 128-channel particle tracking, self-triggering readout system and manufactured in 180 nm CMOS process. The 8-bit trim DAC has a range of ±165 mV, current consumption of 3.2 µA and occupies an area of 37 µm×17 µm in each channel, which corresponds to a 6-bit conventional current steering DAC with similar linearity.

  14. An FPGA-based sampling-ADC readout for the crystal barrel calorimeter

    Energy Technology Data Exchange (ETDEWEB)

    Muellers, Johannes [Helmholtz-Institut fuer Strahlen- und Kernphysik, Bonn (Germany); Marciniewski, Pawel [Angstroemlaboratoriet, Uppsala (Sweden); Collaboration: CBELSA/TAPS-Collaboration

    2015-07-01

    The CBELSA/TAPS experiment at the electron accelerator ELSA (Bonn) investigates the photoproduction of mesons off protons and neutrons. Presently the readout of the CsI(Tl)-crystals of the Crystal Barrel calorimeter is being upgraded from a PIN-diode readout to an APD readout to create a fast signal for first-level-triggering. This will increase the trigger efficiency especially for final states with only neutral particles substantially. To increase the possible data readout rate, which is currently limited by the digitization stage (LeCroy QDC 1885F) to ∼ 2 kHz, the implementation of a new Sampling-ADC (SADC) readout is being prepared. Based on the 64-channel PANDA-SADC, the CB-SADC design was modified and adapted to the needs of the CBELSA/TAPS experiment. It offers 64 channels in one NIM module, together with modular analog or FPGA-based digital shaping. The data transfer will be realized by two standard gigabit links. Using an FPGA together with SADCs provides a multitude of possibilities for online feature extraction, such as the determination of the energy deposited in the crystal, TDC capabilities and pile-up detection and recovery.

  15. Cantilever-based sensor with integrated optical read-out using single mode waveguides

    DEFF Research Database (Denmark)

    Nordström, Maria; Zauner, Dan; Calleja, Montserrat

    2007-01-01

    This work presents the design, fabrication and mechanical characterisation of an integrated optical read-out scheme for cantilever-based biosensors. A cantilever can be used as a biosensor by monitoring its bending caused by the surface stress generated due to chemical reactions occurring on its...... surface. Here, we present a novel integrated optical read-out scheme based on single-mode waveguides that enables the fabrication of a compact system. The complete system is fabricated in the polymer SU-8. This manuscript shows the principle of operation and the design well as the fabrication...

  16. Rapid Newcastle Disease Virus Detection Based on Loop-Mediated Isothermal Amplification and Optomagnetic Readout

    DEFF Research Database (Denmark)

    Tian, Bo; Ma, Jing; Zardán Gómez de la Torre, Teresa

    2016-01-01

    Rapid and sensitive diagnostic methods based on isothermal amplification are ideal substitutes for PCR in out-of-lab settings. However, there are bottlenecks in terms of establishing low-cost and user-friendly readout methods for isothermal amplification schemes. Combining the high amplification...... efficiency of loop-mediated isothermal amplification (LAMP) with an optomagnetic nanoparticle-based readout system, we demonstrate ultrasensitive and rapid detection of Newcastle disease virus RNA. Biotinylated amplicons of LAMP and reverse transcription LAMP (RT-LAMP) bind to streptavidin-coated magnetic...... nanoparticles (MNPs) resulting in a dramatical increase in the hydrodynamic size of the MNPs. This increase was measured by an optomagnetic readout system and provided quantitative information on the amount of LAMP target sequence. Our assay resulted in a limit of detection of 10 aM of target sequence...

  17. Readout of the upgraded ALICE-ITS

    Science.gov (United States)

    Szczepankiewicz, A.; ALICE Collaboration

    2016-07-01

    The ALICE experiment will undergo a major upgrade during the second long shutdown of the CERN LHC. As part of this program, the present Inner Tracking System (ITS), which employs different layers of hybrid pixels, silicon drift and strip detectors, will be replaced by a completely new tracker composed of seven layers of monolithic active pixel sensors. The upgraded ITS will have more than twelve billion pixels in total, producing 300 Gbit/s of data when tracking 50 kHz Pb-Pb events. Two families of pixel chips realized with the TowerJazz CMOS imaging process have been developed as candidate sensors: the ALPIDE, which uses a proprietary readout and sparsification mechanism and the MISTRAL-O, based on a proven rolling shutter architecture. Both chips can operate in continuous mode, with the ALPIDE also supporting triggered operations. As the communication IP blocks are shared among the two chip families, it has been possible to develop a common Readout Electronics. All the sensor components (analog stages, state machines, buffers, FIFOs, etc.) have been modelled in a system level simulation, which has been extensively used to optimize both the sensor and the whole readout chain design in an iterative process. This contribution covers the progress of the R&D efforts and the overall expected performance of the ALICE-ITS readout system.

  18. Readout of the upgraded ALICE-ITS

    International Nuclear Information System (INIS)

    Szczepankiewicz, A.

    2016-01-01

    The ALICE experiment will undergo a major upgrade during the second long shutdown of the CERN LHC. As part of this program, the present Inner Tracking System (ITS), which employs different layers of hybrid pixels, silicon drift and strip detectors, will be replaced by a completely new tracker composed of seven layers of monolithic active pixel sensors. The upgraded ITS will have more than twelve billion pixels in total, producing 300 Gbit/s of data when tracking 50 kHz Pb–Pb events. Two families of pixel chips realized with the TowerJazz CMOS imaging process have been developed as candidate sensors: the ALPIDE, which uses a proprietary readout and sparsification mechanism and the MISTRAL-O, based on a proven rolling shutter architecture. Both chips can operate in continuous mode, with the ALPIDE also supporting triggered operations. As the communication IP blocks are shared among the two chip families, it has been possible to develop a common Readout Electronics. All the sensor components (analog stages, state machines, buffers, FIFOs, etc.) have been modelled in a system level simulation, which has been extensively used to optimize both the sensor and the whole readout chain design in an iterative process. This contribution covers the progress of the R&D efforts and the overall expected performance of the ALICE-ITS readout system.

  19. Readout of the upgraded ALICE-ITS

    Energy Technology Data Exchange (ETDEWEB)

    Szczepankiewicz, A., E-mail: Adam.Szczepankiewicz@cern.ch [CERN, Geneva (Switzerland); Institute of Computer Science, Warsaw University of Technology, Warsaw (Poland)

    2016-07-11

    The ALICE experiment will undergo a major upgrade during the second long shutdown of the CERN LHC. As part of this program, the present Inner Tracking System (ITS), which employs different layers of hybrid pixels, silicon drift and strip detectors, will be replaced by a completely new tracker composed of seven layers of monolithic active pixel sensors. The upgraded ITS will have more than twelve billion pixels in total, producing 300 Gbit/s of data when tracking 50 kHz Pb–Pb events. Two families of pixel chips realized with the TowerJazz CMOS imaging process have been developed as candidate sensors: the ALPIDE, which uses a proprietary readout and sparsification mechanism and the MISTRAL-O, based on a proven rolling shutter architecture. Both chips can operate in continuous mode, with the ALPIDE also supporting triggered operations. As the communication IP blocks are shared among the two chip families, it has been possible to develop a common Readout Electronics. All the sensor components (analog stages, state machines, buffers, FIFOs, etc.) have been modelled in a system level simulation, which has been extensively used to optimize both the sensor and the whole readout chain design in an iterative process. This contribution covers the progress of the R&D efforts and the overall expected performance of the ALICE-ITS readout system.

  20. Integrated optical readout for miniaturization of cantilever-based sensor system

    DEFF Research Database (Denmark)

    Nordström, Maria; Zauner, Dan; Calleja, Montserrat

    2007-01-01

    The authors present the fabrication and characterization of an integrated optical readout scheme based on single-mode waveguides for cantilever-based sensors. The cantilever bending is read out by monitoring changes in the optical intensity of light transmitted through the cantilever that also acts...

  1. Pixel readout chips in deep submicron CMOS for ALICE and LHCb tolerant to 10 Mrad and beyond

    International Nuclear Information System (INIS)

    Snoeys, W.; Burns, M.; Campbell, M.; Cantatore, E.; Cencelli, V.; Dinapoli, R.; Heijne, E.; Jarron, P.; Lamanna, P.; Minervini, D.; Morel, M.; O'Shea, V.; Quiquempoix, V.; Bello, D.S.S.D.San Segundo; Van Koningsveld, B.; Wyllie, K.

    2001-01-01

    The ALICE1LHCB chip is a mixed-mode integrated circuit designed to read out silicon pixel detectors for two different applications: particle tracking in the ALICE Silicon Pixel Detector and particle identification in the LHCb Ring Imaging Cherenkov detector. To satisfy the different needs for these two experiments, the chip can be operated in two different modes. In tracking mode all the 50 μmx425 μm pixel cells in the 256x32 array are read out individually, whilst in particle identification mode they are combined in groups of 8 to form a 32x32 array of 400 μmx425 μm cells. Radiation tolerance was enhanced through special circuit layout. Sensitivity to coupling of digital signals into the analog front end was minimized. System issues such as testability and uniformity further constrained the design. The circuit is currently being manufactured in a commercial 0.25 μm CMOS technology

  2. Design and Verification of Digital Architecture of 65K Pixel Readout Chip for High-Energy Physics

    CERN Document Server

    Poikela, Tuomas; Paakkulainen, J

    2010-01-01

    The feasibility to design and implement a front-end ASIC for the upgrade of the VELO detector of LHCb experiment at CERN using IBM’s 130nm standard CMOS process and a standard cell library is studied in this thesis. The proposed architecture is a design to cope with high data rates and continuous data taking. The architecture is designed to operate without any external trigger to record every hit signal the ASIC receives from a sensor chip, and then to transmit the information to the next level of electronics, for example to FPGAs. This thesis focuses on design, implementation and functional verification of the digital electronics of the active pixel area. The area requirements are dictated by the geometry of pixels (55$mu$m x 55$mu$m), power requirements (20W/module) by restricted cooling capabilities of the module consisting of 10 chips and output bandwidth requirements by data rate (< 10 Gbit/s) produced by a particle flux passing through the chip. The design work was carried out using transaction...

  3. Optimized readout configuration for PIXE spectrometers based on Silicon Drift Detectors: Architecture and performance

    International Nuclear Information System (INIS)

    Alberti, R.; Grassi, N.; Guazzoni, C.; Klatka, T.

    2009-01-01

    An optimized readout configuration based on a charge preamplifier with pulsed-reset has been designed for Silicon Drift Detectors (SDDs) to be used in Particle Induced X-ray Emission (PIXE) measurements. The customized readout electronics is able to manage the large pulses originated by the protons backscattered from the target material that would otherwise cause significant degradation of X-ray spectra and marked increase in dead time. In this way, the excellent performance of SDDs can be exploited in high-quality proton-induced spectroscopy of low- and medium-energy X-rays. This paper describes the designed readout architecture and the performance characterization carried out in a PIXE setup with MeV proton beams.

  4. A camac based data acquisition system for flat-panel image array readout

    International Nuclear Information System (INIS)

    Morton, E.J.; Antonuk, L.E.; Berry, J.E.; Huang, W.; Mody, P.; Yorkston, J.; Longo, M.J.

    1993-01-01

    A readout system has been developed to facilitate the digitization and subsequent display of image data from two-dimensional, pixellated, flat-panel, amorphous silicon imaging arrays. These arrays have been designed specifically for medical x-ray imaging applications. The readout system is based on hardware and software developed for various experiments at CERN and Fermi National Accelerator Laboratory. Additional analog signal processing and digital control electronics were constructed specifically for this application. The authors report on the form of the resulting data acquisition system, discuss aspects of its performance, and consider the compromises which were involved in its design

  5. Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip

    CERN Document Server

    Snoeys, W; Burns, M; Campbell, M; Cantatore, E; Carrer, N; Casagrande, L; Cavagnoli, A; Dachs, C; Di Liberto, S; Formenti, F; Giraldo, A; Heijne, Erik H M; Jarron, Pierre; Letheren, M F; Marchioro, A; Martinengo, P; Meddi, F; Mikulec, B; Morando, M; Morel, M; Noah, E; Paccagnella, A; Ropotar, I; Saladino, S; Sansen, Willy; Santopietro, F; Scarlassara, F; Segato, G F; Signe, P M; Soramel, F; Vannucci, Luigi; Vleugels, K

    2000-01-01

    A new pixel readout prototype has been developed at CERN for high- energy physics applications. This full mixed mode circuit has been implemented in a commercial 0.5 mu m CMOS technology. Its radiation tolerance has been enhanced by designing all NMOS transistors in enclosed geometry and introducing guardrings wherever necessary. The technique is explained and its effectiveness demonstrated on various irradiation measurements on individual transistors and on the prototype. Circuit performance started to degrade only after a total dose of 600 krad-1.7 Mrad depending on the type of radiation. 10 keV X-rays, /sup 60/Co gamma-rays, 6.5 MeV protons, and minimum ionizing particles were used. Implications of this layout approach on the circuit design and perspectives for even deeper submicron technologies are discussed. (20 refs).

  6. Fabrication and characterization of n-on-n silicon pixel detectors compatible with the Medipix2 readout chip

    Energy Technology Data Exchange (ETDEWEB)

    Zorzi, N. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy)]. E-mail: zorzi@itc.it; Bisogni, M.G. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy); Boscardin, M. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Dalla Betta, G.-F. [Dipartimento di Informatica e Telecomunicazioni, Universita di Trento, Via Sommarive 14, I-38050 Povo (Trento) (Italy); Gregori, P. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Novelli, M. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy); Piemonte, C. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Quattrocchi, M. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy); Ronchin, S. [ITC-irst, Divisione Microsistemi, Via Sommarive 18, I-38050 Povo (Trento) (Italy); Rosso, V. [Dipartimento di Fisica, Universita di Pisa and Sezione INFN, Via Buonarroti 2, I-56127 Pisa (Italy)

    2005-07-01

    Pixel detectors for mammographic applications have been fabricated at ITC-irst on 800 {mu}m thick silicon wafers adopting a double side n{sup +}-on-n fabrication technology. The activity aims at increasing the X-ray detection efficiency in the energy range of interest minimizing the risk of electrical discharges in hybrid systems operating at high voltages. The detectors, having a layout compatible with the Medipix2 photon counting chip, feature two different design solutions for the p-isolation between neighboring n{sup +}-pixels. We report on the characterization of the fabrication process and on preliminary results of electrical measurements on full detectors and pixel test structures. In particular, we found that the detectors can be reliably operated above the full depletion voltage regardless of the isolation design, that however, impacts the performances in terms of current-voltage characteristics, single pixel currents, inter-pixel resistances and inter-pixel capacitances.

  7. Fabrication and characterization of n-on-n silicon pixel detectors compatible with the Medipix2 readout chip

    International Nuclear Information System (INIS)

    Zorzi, N.; Bisogni, M.G.; Boscardin, M.; Dalla Betta, G.-F.; Gregori, P.; Novelli, M.; Piemonte, C.; Quattrocchi, M.; Ronchin, S.; Rosso, V.

    2005-01-01

    Pixel detectors for mammographic applications have been fabricated at ITC-irst on 800 μm thick silicon wafers adopting a double side n + -on-n fabrication technology. The activity aims at increasing the X-ray detection efficiency in the energy range of interest minimizing the risk of electrical discharges in hybrid systems operating at high voltages. The detectors, having a layout compatible with the Medipix2 photon counting chip, feature two different design solutions for the p-isolation between neighboring n + -pixels. We report on the characterization of the fabrication process and on preliminary results of electrical measurements on full detectors and pixel test structures. In particular, we found that the detectors can be reliably operated above the full depletion voltage regardless of the isolation design, that however, impacts the performances in terms of current-voltage characteristics, single pixel currents, inter-pixel resistances and inter-pixel capacitances

  8. CdTe layer structures for X-ray and gamma-ray detection directly grown on the Medipix readout-chip by MBE

    Science.gov (United States)

    Vogt, A.; Schütt, S.; Frei, K.; Fiederle, M.

    2017-11-01

    This work investigates the potential of CdTe semiconducting layers used for radiation detection directly deposited on the Medipix readout-chip by MBE. Due to the high Z-number of CdTe and the low electron-hole pair creation energy a thin layer suffices for satisfying photon absorption. The deposition takes place in a modified MBE system enabling growth rates up to 10 μm/h while the UHV conditions allow the required high purity for detector applications. CdTe sensor layers deposited on silicon substrates show resistivities up to 5.8 × 108 Ω cm and a preferred (1 1 1) orientation. However, the resistivity increases with higher growth temperature and the orientation gets more random. Additionally, the deposition of a back contact layer sequence in one process simplifies the complex production of an efficient contact on CdTe with aligned work functions. UPS measurements verify a decrease of the work function of 0.62 eV induced by Te doping of the CdTe.

  9. Reliable and redundant FPGA based read-out design in the ATLAS TileCal Demonstrator

    CERN Document Server

    Åkerstedt, Henrik; The ATLAS collaboration; Drake, Gary; Anderson, Kelby; Bohm, Christian; Oreglia, Mark; Tang, Fukun

    2015-01-01

    The Tile Calorimeter at ATLAS is a hadron calorimeter based on steel plates and scintillating tiles read out by PMTs. The current read-out system uses standard ADCs and custom ASICs to digitize and temporarily store the data on the detector. However, only a subset of the data is actually read out to the counting room. The on-detector electronics will be replaced around 2023. To achieve the required reliability the upgraded system will be highly redundant. Here the ASICs will be replaced with Kintex-7 FPGAs from Xilinx. This, in addition to the use of multiple 10 Gbps optical read-out links, will allow a full read-out of all detector data. Due to the higher radiation levels expected when the beam luminosity is increased, opportunities for repairs will be less frequent. The circuitry and firmware must therefore be designed for sufficiently high reliability using redundancy and radiation tolerant components. Within a year, a hybrid demonstrator including the new read-out system will be installed in one slice of ...

  10. Time over threshold readout method of SiPM based small animal PET detector

    International Nuclear Information System (INIS)

    Valastyan, I.; Gal, J.; Hegyesi, G.; Kalinka, G.; Nagy, F.; Kiraly, B.; Imrek, J.; Molnar, J.

    2012-01-01

    Complete text of publication follows. The aim of the work was to design a readout concept for silicon photomultiplier (SiPM) sensor array used in small animal PET scanner. The detector module consist of LYSO 35x35 scintillation crystals, 324 SiPM sensors (arranged in 2x2 blocks and those quads in a 9x9 configuration) and FPGA based readout electronics. The dimensions of the SiPM matrix are area: 48x48 mm 2 and the size of one SiPM sensor is 1.95x2.2 mm 2 . Due to the high dark current of the SiPM, conventional Anger based readout method does not provide sufficient crystal position maps. Digitizing the 324 SiPM channels is a straightforward way to obtain proper crystal position maps. However handling hundreds of analogue input channels and the required DSP resources cause large racks of data acquisition electronics. Therefore coding of the readout channels is required. Proposed readout method: The coding of the 324 SiPMs consists two steps: Step 1) Reduction of the channels from 324 to 36: Row column readout, SiPMs are connected to each other in column by column and row-by row, thus the required channels are 36. The dark current of 18 connected SiPMs is small in off for identifying pulses coming from scintillating events. Step 2) Reduction of the 18 rows and columns to 4 channels: Comparators were connected to each rows and columns, and the level was set above the level of dark noise. Therefore only few comparators are active when scintillation light enters in the tile. The output of the comparator rows and columns are divided to two parts using resistor chains. Then the outputs of the resistor chains are digitized by a 4 channel ADC. However instead of the Anger method, time over threshold (ToT) was used. Figure 1 shows the readout concept of the SiPM matrix. In order to validate the new method and optimize the front-end electronics of the detector, the analogue signals were digitized before the comparators using a CAEN DT5740 32 channel digitizer, then the

  11. A real-time data transmission method based on Linux for physical experimental readout systems

    International Nuclear Information System (INIS)

    Cao Ping; Song Kezhu; Yang Junfeng

    2012-01-01

    In a typical physical experimental instrument, such as a fusion or particle physical application, the readout system generally implements an interface between the data acquisition (DAQ) system and the front-end electronics (FEE). The key task of a readout system is to read, pack, and forward the data from the FEE to the back-end data concentration center in real time. To guarantee real-time performance, the VxWorks operating system (OS) is widely used in readout systems. However, VxWorks is not an open-source OS, which gives it has many disadvantages. With the development of multi-core processor and new scheduling algorithm, Linux OS exhibits performance in real-time applications similar to that of VxWorks. It has been successfully used even for some hard real-time systems. Discussions and evaluations of real-time Linux solutions for a possible replacement of VxWorks arise naturally. In this paper, a real-time transmission method based on Linux is introduced. To reduce the number of transfer cycles for large amounts of data, a large block of contiguous memory buffer for DMA transfer is allocated by modifying the Linux Kernel (version 2.6) source code slightly. To increase the throughput for network transmission, the user software is designed into formation of parallelism. To achieve high performance in real-time data transfer from hardware to software, mapping techniques must be used to avoid unnecessary data copying. A simplified readout system is implemented with 4 readout modules in a PXI crate. This system can support up to 48 MB/s data throughput from the front-end hardware to the back-end concentration center through a Gigabit Ethernet connection. There are no restrictions on the use of this method, hardware or software, which means that it can be easily migrated to other interrupt related applications.

  12. BJT detector with FPGA-based read-out for alpha particle monitoring

    International Nuclear Information System (INIS)

    Tyzhnevyi, V; Dalla Betta, G-F; Rovati, L; Verzellesi, G; Zorzi, N

    2011-01-01

    In this work we introduce a new prototype of readout electronics (ALPHADET), which was designed for an α-particle detection system based on a bipolar junction transistor (BJT) detector. The system uses an FPGA, which provides many advantages at the stage of prototyping and testing the detector. The main design and electrical features of the board are discussed in this paper, along with selected results from the characterization of ALPHADET coupled to BJT detectors.

  13. BJT detector with FPGA-based read-out for alpha particle monitoring

    Energy Technology Data Exchange (ETDEWEB)

    Tyzhnevyi, V; Dalla Betta, G-F [Universita di Trento, via Sommarive, 14, 38123 Trento (Italy); Rovati, L [Universita di Modena e Reggio Emilia, via Vignolese 905, 41125 Modena (Italy); Verzellesi, G [Universita di Modena e Reggio Emilia, via Amendola 2, Pad. Morselli, 42100 Reggio Emilia (Italy); Zorzi, N, E-mail: tyzhnevyi@disi.unitn.it [Fondazione Bruno Kessler, via Sommarive, 18, 38123 Trento (Italy)

    2011-01-15

    In this work we introduce a new prototype of readout electronics (ALPHADET), which was designed for an {alpha}-particle detection system based on a bipolar junction transistor (BJT) detector. The system uses an FPGA, which provides many advantages at the stage of prototyping and testing the detector. The main design and electrical features of the board are discussed in this paper, along with selected results from the characterization of ALPHADET coupled to BJT detectors.

  14. Polymer-based stress sensor with integrated readout

    DEFF Research Database (Denmark)

    Thaysen, Jacob; Yalcinkaya, Arda Deniz; Vettiger, P.

    2002-01-01

    softer than silicon and that a gold resistor is easily incorporated in SU-8, we have proven that a SU-8-based cantilever sensor is almost as sensitive to stress changes as the silicon piezoresistive cantilever. First, the surface stress sensing principle is discussed, from which it can be shown......, noise and device failure. The characterization shows that there is a good agreement between the expected and the obtained performance....

  15. Automatic readout system for superheated emulsion based neutron detector

    International Nuclear Information System (INIS)

    Meena, J.P.; Parihar, A.; Vaijapurkar, S.G.; Mohan, Anand

    2011-01-01

    The paper presents a microcontroller based automatic reader system for neutron measurement using indigenously developed superheated emulsion detector. The system is designed for real time counting of bubbles formed in superheated emulsion detector. A piezoelectric transducer is used for sensing bubble acoustic during the nucleation. The front end of system is mainly consisting of specially designed signal conditioning unit, piezoelectric transducer, an amplifier, a high-pass filter, a differentiator, a comparator and monostable multivibrator. The system is based on PlC 18F6520 microcontroller having large internal SRAM, 10-bit internal ADC, I 2 C interface, UART/USART modules. The paper also describes the design of following microcontroller peripheral units viz temperature monitoring, battery monitoring, LCD display, keypad and a serial communication. The reader system measures and displays neutron dose and dose rate, number of bubble and elapsed time. The developed system can be used for detecting very low neutron leakage in the accelerators, nuclear reactors and nuclear submarines. The important features of system are compact, light weight, cost effective and high neutron sensitivity. The prototype was tested and evaluated by exposing to 241 Am-Be neutron source and results have been reported. (author)

  16. Cold front-end electronics and Ethernet-based DAQ systems for large LAr TPC readout

    CERN Document Server

    D.Autiero,; B.Carlus,; Y.Declais,; S.Gardien,; C.Girerd,; J.Marteau; H.Mathez

    2010-01-01

    Large LAr TPCs are among the most powerful detectors to address open problems in particle and astro-particle physics, such as CP violation in leptonic sector, neutrino properties and their astrophysical implications, proton decay search etc. The scale of such detectors implies severe constraints on their readout and DAQ system. We are carrying on a R&D in electronics on a complete readout chain including an ASIC located close to the collecting planes in the argon gas phase and a DAQ system based on smart Ethernet sensors implemented in a µTCA standard. The choice of the latter standard is motivated by the similarity in the constraints with those existing in Network Telecommunication Industry. We also developed a synchronization scheme developed from the IEEE1588 standard integrated by the use of the recovered clock from the Gigabit link

  17. Characterization of a DAQ system for the readout of a SiPM based shashlik calorimeter

    International Nuclear Information System (INIS)

    Berra, A.; Bonvicini, V.; Bosisio, L.; Lietti, D.; Penzo, A.; Prest, M.; Rabaioli, S.; Rashevskaya, I.; Vallazza, E.

    2014-01-01

    Silicon PhotoMultipliers (SiPMs) are a recently developed type of silicon photodetector characterized by high gain and insensitivity to magnetic fields, which make them a suitable detector for the next generation high energy and space physics experiments. This paper presents the performance of a readout system for SiPMs based on the MAROC3 ASIC. The ASIC consists of 64 channels working in parallel, each one with a variable gain pre-amplifier, a tunable slow shaper with a sample and hold circuit for the analog readout and a tunable fast shaper for the digital one. In the tests described in this paper, only the analog part of the ASIC has been used. A frontend board based on the MAROC3 ASIC has been tested at CERN coupled to a scintillator-lead shashlik calorimeter, readout with 36 large area SiPMs. The performance of the system has been characterized in terms of linearity and energy resolution on the CERN PS-T9 and SPS-H2 beamlines, using different configurations of the ASIC parameters

  18. An FPGA-based Sampling-ADC readout for the crystal barrel calorimeter

    Energy Technology Data Exchange (ETDEWEB)

    Muellers, Johannes [Helmholtz-Institut fuer Strahlen- und Kernphysik, Bonn (Germany); Marciniewski, Pawel [Angstroemlaboratoriet, Uppsala (Sweden); Collaboration: CBELSA/TAPS-Collaboration

    2016-07-01

    The CBELSA/TAPS experiment at the electron accelerator ELSA (Bonn) investigates the photoproduction of mesons off protons and neutrons. The Crystal Barrel Calorimeter has been upgraded replacing its photodiode readout by APDs, which allows the integration of the calorimeter into the first level trigger. Since the possible DAQ rate is currently limited by the digitization stage (LeCroy QDC1885F) to ∼ 2 kHz, the implementation of a new Sampling-ADC (SADC) readout is the second important step in the upgrade of the detector system. Based on the 64-channel PANDA-SADC, the design was modified, adapting it to the needs of the CBELSA/TAPS experiment. The CB-SADC offers 64 channels in one NIM module with up to 14 bit rate at 125 MHz, accompanied by a modular analog input stage and power supply. Data processing and reduction are realized with Kintex7 FPGAs. Readout is possible via gigabit ethernet links. Using an FPGA provides a multitude of possibilities for online feature extraction, such as the determination of the energy deposited in the crystal, TDC capabilities and pile-up detection and recovery. The SADC development is discussed, and first measurements performed in comparison to the presently used LeCroy QDC are presented.

  19. A Hybrid Readout Solution for GaN-Based Detectors Using CMOS Technology

    Directory of Open Access Journals (Sweden)

    Preethi Padmanabhan

    2018-02-01

    Full Text Available Gallium nitride (GaN and its alloys are becoming preferred materials for ultraviolet (UV detectors due to their wide bandgap and tailorable out-of-band cutoff from 3.4 eV to 6.2 eV. GaN based avalanche photodiodes (APDs are particularly suitable for their high photon sensitivity and quantum efficiency in the UV region and for their inherent insensitivity to visible wavelengths. Challenges exist however for practical utilization. With growing interests in such photodetectors, hybrid readout solutions are becoming prevalent with CMOS technology being adopted for its maturity, scalability, and reliability. In this paper, we describe our approach to combine GaN APDs with a CMOS readout circuit, comprising of a linear array of 1 × 8 capacitive transimpedance amplifiers (CTIAs, implemented in a 0.35 µm high voltage CMOS technology. Further, we present a simple, yet sustainable circuit technique to allow operation of APDs under high reverse biases, up to ≈80 V with verified measurement results. The readout offers a conversion gain of 0.43 µV/e−, obtaining avalanche gains up to 103. Several parameters of the CTIA are discussed followed by a perspective on possible hybridization, exploiting the advantages of a 3D-stacked technology.

  20. A Hybrid Readout Solution for GaN-Based Detectors Using CMOS Technology †

    Science.gov (United States)

    Hancock, Bruce; Nikzad, Shouleh; Bell, L. Douglas; Kroep, Kees; Charbon, Edoardo

    2018-01-01

    Gallium nitride (GaN) and its alloys are becoming preferred materials for ultraviolet (UV) detectors due to their wide bandgap and tailorable out-of-band cutoff from 3.4 eV to 6.2 eV. GaN based avalanche photodiodes (APDs) are particularly suitable for their high photon sensitivity and quantum efficiency in the UV region and for their inherent insensitivity to visible wavelengths. Challenges exist however for practical utilization. With growing interests in such photodetectors, hybrid readout solutions are becoming prevalent with CMOS technology being adopted for its maturity, scalability, and reliability. In this paper, we describe our approach to combine GaN APDs with a CMOS readout circuit, comprising of a linear array of 1 × 8 capacitive transimpedance amplifiers (CTIAs), implemented in a 0.35 µm high voltage CMOS technology. Further, we present a simple, yet sustainable circuit technique to allow operation of APDs under high reverse biases, up to ≈80 V with verified measurement results. The readout offers a conversion gain of 0.43 µV/e−, obtaining avalanche gains up to 103. Several parameters of the CTIA are discussed followed by a perspective on possible hybridization, exploiting the advantages of a 3D-stacked technology. PMID:29401655

  1. A Hybrid Readout Solution for GaN-Based Detectors Using CMOS Technology.

    Science.gov (United States)

    Padmanabhan, Preethi; Hancock, Bruce; Nikzad, Shouleh; Bell, L Douglas; Kroep, Kees; Charbon, Edoardo

    2018-02-03

    Gallium nitride (GaN) and its alloys are becoming preferred materials for ultraviolet (UV) detectors due to their wide bandgap and tailorable out-of-band cutoff from 3.4 eV to 6.2 eV. GaN based avalanche photodiodes (APDs) are particularly suitable for their high photon sensitivity and quantum efficiency in the UV region and for their inherent insensitivity to visible wavelengths. Challenges exist however for practical utilization. With growing interests in such photodetectors, hybrid readout solutions are becoming prevalent with CMOS technology being adopted for its maturity, scalability, and reliability. In this paper, we describe our approach to combine GaN APDs with a CMOS readout circuit, comprising of a linear array of 1 × 8 capacitive transimpedance amplifiers (CTIAs), implemented in a 0.35 µm high voltage CMOS technology. Further, we present a simple, yet sustainable circuit technique to allow operation of APDs under high reverse biases, up to ≈80 V with verified measurement results. The readout offers a conversion gain of 0.43 µV/e - , obtaining avalanche gains up to 10³. Several parameters of the CTIA are discussed followed by a perspective on possible hybridization, exploiting the advantages of a 3D-stacked technology.

  2. Tractor performance monitor based on a single-chip microcomputer

    Energy Technology Data Exchange (ETDEWEB)

    Bedri, A.R.; Marley, S.J.; Buchelle, W.F.; Smay, T.A.

    1981-01-01

    A tractor performance monitor based on a single-chip microcomputer was developed to measure ground speed, slip, fuel consumption (rate and total), total area, theoretical time, and total time. Transducers used are presented in detail. 5 refs.

  3. Implementation of the Timepix ASIC in the Scalable Readout System

    Energy Technology Data Exchange (ETDEWEB)

    Lupberger, M., E-mail: lupberger@physik.uni-bonn.de; Desch, K.; Kaminski, J.

    2016-09-11

    We report on the development of electronics hardware, FPGA firmware and software to provide a flexible multi-chip readout of the Timepix ASIC within the framework of the Scalable Readout System (SRS). The system features FPGA-based zero-suppression and the possibility to read out up to 4×8 chips with a single Front End Concentrator (FEC). By operating several FECs in parallel, in principle an arbitrary number of chips can be read out, exploiting the scaling features of SRS. Specifically, we tested the system with a setup consisting of 160 Timepix ASICs, operated as GridPix devices in a large TPC field cage in a 1 T magnetic field at a DESY test beam facility providing an electron beam of up to 6 GeV. We discuss the design choices, the dedicated hardware components, the FPGA firmware as well as the performance of the system in the test beam.

  4. Qualification method for a 1 MGy-tolerant front-end chip designed in 65 nm CMOS for the read-out of remotely operated sensors and actuators during maintenance in ITER

    Energy Technology Data Exchange (ETDEWEB)

    Verbeeck, Jens, E-mail: jens.verbeeck@esat.kuleuven.be [KU Leuven (KUL), Div. LRD-MAGyICS, Kasteelpark Arenberg 10, 3001 Heverlee (Belgium); Cao, Ying [KU Leuven (KUL), Div. LRD-MAGyICS, Kasteelpark Arenberg 10, 3001 Heverlee (Belgium); Van Uffelen, Marco; Casellas, Laura Mont; Damiani, Carlo; Morales, Emilio Ruiz; Santana, Roberto Ranz [Fusion for Energy (F4E), c/Josep, no. 2, Torres Diagonal Litoral, Ed. B3, 08019 Barcelona (Spain); Meek, Richard; Haist, Bernhard [Oxford Technologies Ltd. (OTL), 7 Nuffield Way, Abingdon OX14 1RL (United Kingdom); Hamilton, David [ITER Organisation (IO), Route de Vinon-sur-Verdon, CS 90 046, 13067 St. Paul les Durance Cedex (France); Steyaert, Michiel [KU Leuven, ESAT-MICAS, Kasteelpark Arenberg 10, 3001 Heverlee (Belgium); Leroux, Paul [KU Leuven, ESAT-MICAS, Kasteelpark Arenberg 10, 3001 Heverlee (Belgium); KU Leuven, ESAT, Advanced Integrated Sensing Lab (AdvISe), Kleinhoefstraat 4, 2440 Geel (Belgium)

    2015-10-15

    This paper describes the radiation qualification procedure for a 1 MGy-tolerant Application Specific Integrated Circuit (ASIC) developed in 65 nm CMOS technology. The chip is intended for the read-out of electrical signals of sensors and actuators during maintenance in ITER. First the general working principle of the ASIC is shown. The developed IC allows to read-out, condition and digitize multiple low bandwidth (<10 kHz) sensors. In addition the IC is able to multiplex the digitized sensor signals. To comply with ITER-relevant constraints an adapted radiation qualification procedure has been proposed. The radiation-qualification procedure describes the test criteria and test conditions of the developed ASICs, which are also compared with COTS alternatives, to meet the stringent qualification procedures for electronics exposed to radiation in ITER.

  5. Novel readout method for molecular diagnostic assays based on optical measurements of magnetic nanobead dynamics.

    Science.gov (United States)

    Donolato, Marco; Antunes, Paula; Bejhed, Rebecca S; Zardán Gómez de la Torre, Teresa; Østerberg, Frederik W; Strömberg, Mattias; Nilsson, Mats; Strømme, Maria; Svedlindh, Peter; Hansen, Mikkel F; Vavassori, Paolo

    2015-02-03

    We demonstrate detection of DNA coils formed from a Vibrio cholerae DNA target at picomolar concentrations using a novel optomagnetic approach exploiting the dynamic behavior and optical anisotropy of magnetic nanobead (MNB) assemblies. We establish that the complex second harmonic optical transmission spectra of MNB suspensions measured upon application of a weak uniaxial AC magnetic field correlate well with the rotation dynamics of the individual MNBs. Adding a target analyte to the solution leads to the formation of permanent MNB clusters, namely, to the suppression of the dynamic MNB behavior. We prove that the optical transmission spectra are highly sensitive to the formation of permanent MNB clusters and, thereby to the target analyte concentration. As a specific clinically relevant diagnostic case, we detect DNA coils formed via padlock probe recognition and isothermal rolling circle amplification and benchmark against a commercial equipment. The results demonstrate the fast optomagnetic readout of rolling circle products from bacterial DNA utilizing the dynamic properties of MNBs in a miniaturized and low-cost platform requiring only a transparent window in the chip.

  6. A free-running, time-based readout method for particle detectors

    International Nuclear Information System (INIS)

    Goerres, A; Ritman, J; Stockmanns, T; Bugalho, R; Francesco, A Di; Gastón, C; Gonçalves, F; Rolo, M D; Silva, J C da; Silva, R; Varela, J; Veckalns, V; Mazza, G; Mignone, M; Pietro, V Di; Riccardi, A; Rivetti, A; Wheadon, R

    2014-01-01

    For the EndoTOFPET-US experiment, the TOFPET ASIC has been developed as a front-end chip to read out data from silicon photomultipliers (SiPM) [1]. It introduces a time of flight information into the measurement of a PET scanner and hence reduces radiation exposure of the patient [2]. The chip is designed to work with a high event rate up to 100 kHz and a time resolution of 50 ps LSB. Using two threshold levels, it can measure the leading edge of the event pulse precisely while successfully suppressing dark counts from the SiPM. This also enables a time over threshold determination, leading to a charge measurement of the signal's pulse. The same, time-based concept is chosen for the PASTA chip used in the PANDA experiment. This high-energy particle detector contains sub-systems for specific measurement goals. The innermost of these is the Micro Vertex Detector, a silicon-based tracking system. The PASTA chip's approach is much like the TOFPET ASIC with some differences. The most significant ones are a changed amplifying part for different input signals as well as protection for radiation effects of the high-radiation environment. Apart from that, the simple and general concept combined with a small area and low power consumption support the choice for using this approach

  7. A free-running, time-based readout method for particle detectors

    Science.gov (United States)

    Goerres, A.; Bugalho, R.; Di Francesco, A.; Gastón, C.; Gonçalves, F.; Mazza, G.; Mignone, M.; Di Pietro, V.; Riccardi, A.; Ritman, J.; Rivetti, A.; Rolo, M. D.; da Silva, J. C.; Silva, R.; Stockmanns, T.; Varela, J.; Veckalns, V.; Wheadon, R.

    2014-03-01

    For the EndoTOFPET-US experiment, the TOFPET ASIC has been developed as a front-end chip to read out data from silicon photomultipliers (SiPM) [1]. It introduces a time of flight information into the measurement of a PET scanner and hence reduces radiation exposure of the patient [2]. The chip is designed to work with a high event rate up to 100 kHz and a time resolution of 50 ps LSB. Using two threshold levels, it can measure the leading edge of the event pulse precisely while successfully suppressing dark counts from the SiPM. This also enables a time over threshold determination, leading to a charge measurement of the signal's pulse. The same, time-based concept is chosen for the PASTA chip used in the PANDA experiment. This high-energy particle detector contains sub-systems for specific measurement goals. The innermost of these is the Micro Vertex Detector, a silicon-based tracking system. The PASTA chip's approach is much like the TOFPET ASIC with some differences. The most significant ones are a changed amplifying part for different input signals as well as protection for radiation effects of the high-radiation environment. Apart from that, the simple and general concept combined with a small area and low power consumption support the choice for using this approach.

  8. A compact readout system for multi-pixel hybrid photodiodes

    International Nuclear Information System (INIS)

    Datema, C.P.; Meng, L.J.; Ramsden, D.

    1999-01-01

    Although the first Multi-pixel Hybrid Photodiode (M-HPD) was developed in the early 1990s by Delft Electronic Products, the main obstacle to its application has been the lack of availability of a compact read-out system. A fast, parallel readout system has been constructed for use with the earlier 25-pixel tube with High-energy Physics applications in mind. The excellent properties of the recently developed multi-pixel hybrid photodiodes (M-HPD) will be easier to exploit following the development of the new hybrid read-out circuits described in this paper. This system will enable all of the required read-out functions to be accommodate on a single board into which the M-HPD is plugged. The design and performance of a versatile system is described in which a trigger-signal, derived from the common-side of the silicon anode in the M-HPD, is used to trigger the readout of the 60-anode pixels in the M-HPD. The multi-channel amplifier section is based on the use of a new, commercial VLSI chip, whilst the read-out sequencer uses a chip of its own design. The common anode signal is processed by a fast amplifier and discriminator to provide a trigger signal when a single event is detected. In the prototype version, the serial analogue output data-stream is processed using a PC-mounted, high speed ADC. Results obtained using the new read-out system in a compact gamma-camera and with a small muon tracking-chamber demonstrate the low-noise performance of the system. The application of this read-out system in other position-sensitive or multi-anode photomultiplier tube applications are also described

  9. LHCb: Radiation tolerance tests of SRAM-based FPGAs for the possible usage in the readout electronics for the LHCb experiment

    CERN Multimedia

    Faerber, C; Wiedner, D; Leveringzon, B; Ekelhof, R

    2013-01-01

    This paper describes radiation studies of SRAM-based FPGAs as a central component of the electronics for a possible upgrade of the LHCb Outer Tracker readout electronics to a frequency of 40 MHz. Two Arria GX FPGAs were irradiated with 20 MeV protons to radiation doses of up to 7 Mrad. During and between the irradiation periods the different FPGA currents, the package temperature, the firmware error rate, the PLL stability, and the stability of a 32 channel TDC implemented on the FPGA were monitored. Results on the radiation tolerance of the FPGA and the measured firmware error rates will be presented. The Arria GX FPGA fulfils the radiation tolerance required for the LHCb upgrade (30 krad) and an expected firmware error rate of 10$^{-6}$ Hz makes the chip viable for the LHCb Upgrade.

  10. Application specific integrated circuit (ASIC) readout technologies for future ion beam analytical instruments

    Energy Technology Data Exchange (ETDEWEB)

    Whitlow, Harry J. E-mail: harry_j.whitlow@nuclear.lu.se

    2000-03-01

    New possibilities for ion beam analysis (IBA) are afforded by recent developments in detector technology which facilitate the parallel collection of data from a large number of channels. Application specific integrated circuit (ASIC) technologies, which have been widely employed for multi-channel readout systems in nuclear and particle physics, are more net-cost effective (160/channel for 1000 channels) and a more rational solution for readout of a large number of channels than afforded by conventional electronics. Based on results from existing and on-going chip designs, the possibilities and issues of ASIC readout technology are considered from the IBA viewpoint. Consideration is given to readout chip architecture and how the stringent resolution, linearity and stability requirements for IBA may be met. In addition the implications of the restrictions imposed by ASIC technology are discussed.

  11. Environmental sensors based on micromachined cantilevers with integrated read-out

    DEFF Research Database (Denmark)

    Boisen, Anja; Thaysen, Jacob; Jensenius, Henriette

    2000-01-01

    -out facilitates measurements in liquid. The probe has been successfully implemented in gaseous as well as in liquid experiments. For example, the probe has been used as an accurate and minute thermal sensor and as a humidity sensor. In liquid, the probe has been used to detect the presence of alcohol in water. (C......An AFM probe with integrated piezoresistive read-out has been developed and applied as a cantilever-based environmental sensor. The probe has a built-in reference cantilever, which makes it possible to subtract background drift directly in the measurement. Moreover, the integrated read...

  12. A microcontroller based readout unit for a smart personnel monitoring TLD badge

    International Nuclear Information System (INIS)

    Gaonkar, U.P.; Kulkarni, M.S.; Kannan, S.

    1997-01-01

    An automated TLD personnel monitoring system is under development to cope up with the requirements of personnel monitoring of rapidly growing number of radiation workers. The core of the system is a smart TLD badge incorporating a memory device and a microcontroller based readout unit for reading the memory contents of the badge. The memory is used to store personnel data including the accumulated dose data. The reader unit has a serial RS 232C interface for connection to a PC for entering/modifying data in the memory. A password protected software has also been developed in C for entering/modifying the data in the single memory. 3 figs

  13. On-chip concentration of bacteria using a 3D dielectrophoretic chip and subsequent laser-based DNA extraction in the same chip

    International Nuclear Information System (INIS)

    Cho, Yoon-Kyoung; Kim, Tae-hyeong; Lee, Jeong-Gun

    2010-01-01

    We report the on-chip concentration of bacteria using a dielectrophoretic (DEP) chip with 3D electrodes and subsequent laser-based DNA extraction in the same chip. The DEP chip has a set of interdigitated Au post electrodes with 50 µm height to generate a network of non-uniform electric fields for the efficient trapping by DEP. The metal post array was fabricated by photolithography and subsequent Ni and Au electroplating. Three model bacteria samples (Escherichia coli, Staphylococcus epidermidis, Streptococcus mutans) were tested and over 80-fold concentrations were achieved within 2 min. Subsequently, on-chip DNA extraction from the concentrated bacteria in the 3D DEP chip was performed by laser irradiation using the laser-irradiated magnetic bead system (LIMBS) in the same chip. The extracted DNA was analyzed with silicon chip-based real-time polymerase chain reaction (PCR). The total process of on-chip bacteria concentration and the subsequent DNA extraction can be completed within 10 min including the manual operation time.

  14. MEMS capacitive pressure sensor monolithically integrated with CMOS readout circuit by using post CMOS processes

    Science.gov (United States)

    Jang, Munseon; Yun, Kwang-Seok

    2017-12-01

    In this paper, we presents a MEMS pressure sensor integrated with a readout circuit on a chip for an on-chip signal processing. The capacitive pressure sensor is formed on a CMOS chip by using a post-CMOS MEMS processes. The proposed device consists of a sensing capacitor that is square in shape, a reference capacitor and a readout circuitry based on a switched-capacitor scheme to detect capacitance change at various environmental pressures. The readout circuit was implemented by using a commercial 0.35 μm CMOS process with 2 polysilicon and 4 metal layers. Then, the pressure sensor was formed by wet etching of metal 2 layer through via hole structures. Experimental results show that the MEMS pressure sensor has a sensitivity of 11 mV/100 kPa at the pressure range of 100-400 kPa.

  15. A Reconfigurable Readout Integrated Circuit for Heterogeneous Display-Based Multi-Sensor Systems

    Directory of Open Access Journals (Sweden)

    Kyeonghwan Park

    2017-04-01

    Full Text Available This paper presents a reconfigurable multi-sensor interface and its readout integrated circuit (ROIC for display-based multi-sensor systems, which builds up multi-sensor functions by utilizing touch screen panels. In addition to inherent touch detection, physiological and environmental sensor interfaces are incorporated. The reconfigurable feature is effectively implemented by proposing two basis readout topologies of amplifier-based and oscillator-based circuits. For noise-immune design against various noises from inherent human-touch operations, an alternate-sampling error-correction scheme is proposed and integrated inside the ROIC, achieving a 12-bit resolution of successive approximation register (SAR of analog-to-digital conversion without additional calibrations. A ROIC prototype that includes the whole proposed functions and data converters was fabricated in a 0.18 μm complementary metal oxide semiconductor (CMOS process, and its feasibility was experimentally verified to support multiple heterogeneous sensing functions of touch, electrocardiogram, body impedance, and environmental sensors.

  16. Read-out concepts for FPGA-based sub-systems within the CBM detector

    Energy Technology Data Exchange (ETDEWEB)

    Michel, Jan [Goethe-Universitaet Frankfurt (Germany); Collaboration: CBM-Collaboration

    2015-07-01

    The Compressed Baryonic Matter experiment (CBM) to be built at FAIR consists of several individual sub-detectors. Some are based on custom ASICs as front-ends. Others employ FPGA based modules where extensive slow control features can be implemented to ease the recording of data and to allow for fast detection of any kind of error condition. Being designed as a free-running data acquisition, the demands also include a synchronized read-out, i.e. distribution of a common clock signal to all modules. To reduce the complexity of wiring, this is to be done sharing the same optical fibers as the data transport. During the past years, TrbNet has been designed and is used in various experiments, initially for the HADES experiment at FAIR. This protocol can now serve as a platform for the CBM read-out. In several steps, synchronous links with deterministic latency, as well as a free-streaming data transport can be included. At the same time, modifications to improve bandwidth and provide compatibility to the CERN GBTx links used for ASIC based sub-systems are to be developed. This contribution shows the planned steps as well as the current status of development.

  17. The Retinal Readout System: a status report A Status Report

    CERN Document Server

    Litke, A M

    1999-01-01

    The 'Retinal Readout System' is being developed to study the language the eye uses to send information about the visual world to the brain. Its architecture is based on that of silicon microstrip detectors. An array of 512 microscopic electrodes picks up the signals generated by the output neurons of live retinal tissue in response to a dynamic image focused on the input neurons. These signals are amplified, filtered and multiplexed by a set of eight custom-designed VLSI readout chips, and digitized and recorded by a data acquisition system. This report describes the goals, design, and status of the system. (author)

  18. Depleted fully monolithic CMOS pixel detectors using a column based readout architecture for the ATLAS Inner Tracker upgrade

    Science.gov (United States)

    Wang, T.; Barbero, M.; Berdalovic, I.; Bespin, C.; Bhat, S.; Breugnon, P.; Caicedo, I.; Cardella, R.; Chen, Z.; Degerli, Y.; Egidos, N.; Godiot, S.; Guilloux, F.; Hemperek, T.; Hirono, T.; Krüger, H.; Kugathasan, T.; Hügging, F.; Marin Tobon, C. A.; Moustakas, K.; Pangaud, P.; Schwemling, P.; Pernegger, H.; Pohl, D.-L.; Rozanov, A.; Rymaszewski, P.; Snoeys, W.; Wermes, N.

    2018-03-01

    Depleted monolithic active pixel sensors (DMAPS), which exploit high voltage and/or high resistivity add-ons of modern CMOS technologies to achieve substantial depletion in the sensing volume, have proven to have high radiation tolerance towards the requirements of ATLAS in the high-luminosity LHC era. DMAPS integrating fast readout architectures are currently being developed as promising candidates for the outer pixel layers of the future ATLAS Inner Tracker, which will be installed during the phase II upgrade of ATLAS around year 2025. In this work, two DMAPS prototype designs, named LF-Monopix and TJ-Monopix, are presented. LF-Monopix was fabricated in the LFoundry 150 nm CMOS technology, and TJ-Monopix has been designed in the TowerJazz 180 nm CMOS technology. Both chips employ the same readout architecture, i.e. the column drain architecture, whereas different sensor implementation concepts are pursued. The paper makes a joint description of the two prototypes, so that their technical differences and challenges can be addressed in direct comparison. First measurement results for LF-Monopix will also be shown, demonstrating for the first time a fully functional fast readout DMAPS prototype implemented in the LFoundry technology.

  19. White noise of Nb-based microwave superconducting quantum interference device multiplexers with NbN coplanar resonators for readout of transition edge sensors

    Science.gov (United States)

    Kohjiro, Satoshi; Hirayama, Fuminori; Yamamori, Hirotake; Nagasawa, Shuichi; Fukuda, Daiji; Hidaka, Mutsuo

    2014-06-01

    White noise of dissipationless microwave radio frequency superconducting quantum interference device (RF-SQUID) multiplexers has been experimentally studied to evaluate their readout performance for transition edge sensor (TES) photon counters ranging from near infrared to gamma ray. The characterization has been carried out at 4 K, first to avoid the low-frequency fluctuations present at around 0.1 K, and second, for a feasibility study of readout operation at 4 K for extended applications. To increase the resonant Q at 4 K and maintain low noise SQUID operation, multiplexer chips consisting of niobium nitride (NbN)-based coplanar-waveguide resonators and niobium (Nb)-based RF-SQUIDs have been developed. This hybrid multiplexer exhibited 1 × 104 ≤ Q ≤ 2 × 104 and the square root of spectral density of current noise referred to the SQUID input √SI = 31 pA/√Hz. The former and the latter are factor-of-five and seven improvements from our previous results on Nb-based resonators, respectively. Two-directional readout on the complex plane of the transmission component of scattering matrix S21 enables us to distinguish the flux noise from noise originating from other sources, such as the cryogenic high electron mobility transistor (HEMT) amplifier. Systematic noise measurements with various microwave readout powers PMR make it possible to distinguish the contribution of noise sources within the system as follows: (1) The achieved √SI is dominated by the Nyquist noise from a resistor at 4 K in parallel to the SQUID input coil which is present to prevent microwave leakage to the TES. (2) The next dominant source is either the HEMT-amplifier noise (for small values of PMR) or the quantization noise due to the resolution of 300-K electronics (for large values of PMR). By a decrease of these noise levels to a degree that is achievable by current technology, we predict that the microwave RF-SQUID multiplexer can exhibit √SI ≤ 5 pA/√Hz, i.e., close to √SI of

  20. White noise of Nb-based microwave superconducting quantum interference device multiplexers with NbN coplanar resonators for readout of transition edge sensors

    International Nuclear Information System (INIS)

    Kohjiro, Satoshi; Hirayama, Fuminori; Yamamori, Hirotake; Nagasawa, Shuichi; Fukuda, Daiji; Hidaka, Mutsuo

    2014-01-01

    White noise of dissipationless microwave radio frequency superconducting quantum interference device (RF-SQUID) multiplexers has been experimentally studied to evaluate their readout performance for transition edge sensor (TES) photon counters ranging from near infrared to gamma ray. The characterization has been carried out at 4 K, first to avoid the low-frequency fluctuations present at around 0.1 K, and second, for a feasibility study of readout operation at 4 K for extended applications. To increase the resonant Q at 4 K and maintain low noise SQUID operation, multiplexer chips consisting of niobium nitride (NbN)-based coplanar-waveguide resonators and niobium (Nb)-based RF-SQUIDs have been developed. This hybrid multiplexer exhibited 1 × 10 4  ≤ Q ≤ 2 × 10 4 and the square root of spectral density of current noise referred to the SQUID input √S I  = 31 pA/√Hz. The former and the latter are factor-of-five and seven improvements from our previous results on Nb-based resonators, respectively. Two-directional readout on the complex plane of the transmission component of scattering matrix S 21 enables us to distinguish the flux noise from noise originating from other sources, such as the cryogenic high electron mobility transistor (HEMT) amplifier. Systematic noise measurements with various microwave readout powers P MR make it possible to distinguish the contribution of noise sources within the system as follows: (1) The achieved √S I is dominated by the Nyquist noise from a resistor at 4 K in parallel to the SQUID input coil which is present to prevent microwave leakage to the TES. (2) The next dominant source is either the HEMT-amplifier noise (for small values of P MR ) or the quantization noise due to the resolution of 300-K electronics (for large values of P MR ). By a decrease of these noise levels to a degree that is achievable by current technology, we predict that the microwave RF-SQUID multiplexer can exhibit

  1. SiPM based readout system for PbWO4 crystals

    Science.gov (United States)

    Berra, A.; Bolognini, D.; Bonfanti, S.; Bonvicini, V.; Lietti, D.; Penzo, A.; Prest, M.; Stoppani, L.; Vallazza, E.

    2013-08-01

    Silicon PhotoMultipliers (SiPMs) consist of a matrix of small passively quenched silicon avalanche photodiodes operated in limited Geiger-mode (GM-APDs) and read out in parallel from a common output node. Each pixel (with a typical size in the 20-100 μm range) gives the same current response when hit by a photon; the SiPM output signal is the sum of the signals of all the pixels, which depends on the light intensity. The main advantages of SiPMs with respect to photomultiplier tubes (PMTs) are essentially the small dimensions, the insensitivity to magnetic fields and a low bias voltage. This contribution presents the performance of a SiPM based readout system for crystal calorimeters developed in the framework of the FACTOR/TWICE collaboration. The SiPM used for the test is a new device produced by FBK-irst which consists in a matrix of four sensors embedded in the same silicon substrate, called QUAD. The SiPM has been coupled to a lead tungstate crystal, an early-prototype version of the crystals developed for the electromagnetic calorimeter of the CMS experiment. New tests are foreseen using a complete module consisting of nine crystals, each one readout by two QUADs.

  2. SiPM based readout system for PbWO4 crystals

    International Nuclear Information System (INIS)

    Berra, A.; Bolognini, D.; Bonfanti, S.; Bonvicini, V.; Lietti, D.; Penzo, A.; Prest, M.; Stoppani, L.; Vallazza, E.

    2013-01-01

    Silicon PhotoMultipliers (SiPMs) consist of a matrix of small passively quenched silicon avalanche photodiodes operated in limited Geiger-mode (GM-APDs) and read out in parallel from a common output node. Each pixel (with a typical size in the 20–100 μm range) gives the same current response when hit by a photon; the SiPM output signal is the sum of the signals of all the pixels, which depends on the light intensity. The main advantages of SiPMs with respect to photomultiplier tubes (PMTs) are essentially the small dimensions, the insensitivity to magnetic fields and a low bias voltage. This contribution presents the performance of a SiPM based readout system for crystal calorimeters developed in the framework of the FACTOR/TWICE collaboration. The SiPM used for the test is a new device produced by FBK-irst which consists in a matrix of four sensors embedded in the same silicon substrate, called QUAD. The SiPM has been coupled to a lead tungstate crystal, an early-prototype version of the crystals developed for the electromagnetic calorimeter of the CMS experiment. New tests are foreseen using a complete module consisting of nine crystals, each one readout by two QUADs

  3. SiPM based readout system for PbWO{sub 4} crystals

    Energy Technology Data Exchange (ETDEWEB)

    Berra, A., E-mail: alessandro.berra@gmail.com [Università degli Studi dell' Insubria e INFN sezione di Milano Bicocca, Via Valleggio, 11-22100 Como (Italy); Bolognini, D.; Bonfanti, S. [Università degli Studi dell' Insubria e INFN sezione di Milano Bicocca, Via Valleggio, 11-22100 Como (Italy); Bonvicini, V. [INFN sezione di Trieste (Italy); Lietti, D. [Università degli Studi dell' Insubria e INFN sezione di Milano Bicocca, Via Valleggio, 11-22100 Como (Italy); Penzo, A. [INFN sezione di Trieste (Italy); Prest, M.; Stoppani, L. [Università degli Studi dell' Insubria e INFN sezione di Milano Bicocca, Via Valleggio, 11-22100 Como (Italy); Vallazza, E. [INFN sezione di Trieste (Italy)

    2013-08-01

    Silicon PhotoMultipliers (SiPMs) consist of a matrix of small passively quenched silicon avalanche photodiodes operated in limited Geiger-mode (GM-APDs) and read out in parallel from a common output node. Each pixel (with a typical size in the 20–100 μm range) gives the same current response when hit by a photon; the SiPM output signal is the sum of the signals of all the pixels, which depends on the light intensity. The main advantages of SiPMs with respect to photomultiplier tubes (PMTs) are essentially the small dimensions, the insensitivity to magnetic fields and a low bias voltage. This contribution presents the performance of a SiPM based readout system for crystal calorimeters developed in the framework of the FACTOR/TWICE collaboration. The SiPM used for the test is a new device produced by FBK-irst which consists in a matrix of four sensors embedded in the same silicon substrate, called QUAD. The SiPM has been coupled to a lead tungstate crystal, an early-prototype version of the crystals developed for the electromagnetic calorimeter of the CMS experiment. New tests are foreseen using a complete module consisting of nine crystals, each one readout by two QUADs.

  4. A readout system for position sensitive measurements of X-ray using silicon strip detectors

    CERN Document Server

    Dabrowski, W; Grybos, P; Idzik, M; Kudlaty, J

    2000-01-01

    In this paper we describe the development of a readout system for X-ray measurements using silicon strip detectors. The limitation concerning the inherent spatial resolution of silicon strip detectors has been evaluated by Monte Carlo simulation and the results are discussed. The developed readout system is based on the binary readout architecture and consists of two ASICs: RX32 front-end chip comprising 32 channels of preamplifiers, shapers and discriminators, and COUNT32 counter chip comprising 32 20-bit asynchronous counters and the readout logic. This work focuses on the design and performance of the front-end chip. The RX32 chip has been optimised for a low detector capacitance, in the range of 1-3 pF, and high counting rate applications. It can be used with DC coupled detectors allowing the leakage current up to a few nA per strip. For the prototype chip manufactured in a CMOS process all basic parameters have been evaluated by electronic measurements. The noise below 140 el rms has been achieved for a ...

  5. The readout system of the new H1 silicon detectors

    International Nuclear Information System (INIS)

    Buerger, J.; Hansen, K.; Lange, W.; Prell, S.; Zimmermann, W.; Henschel, H.; Haynes, W.J.; Noyes, G.W.; Joensson, L.; Gabathuler, K.; Horisberger, R.; Wagener, M.; Eichler, R.; Erdmann, W.; Niggli, H.; Pitzl, D.

    1995-03-01

    The H1 detector at HERA at DESY undergoes presently a major upgrade. In this context silicon strip detectors have been installed at beginning of 1995. The high bunch crossing frequency of HERA (10.4 MHz) demands a novel readout architecture which includes pipelining, signal processing and data reduction at a very early stage. The front end readout is hierarchically organized. The detector elements are read out by the APC chip which contains an analog pipeline and performs first background subtraction. Up to five readout chips are controlled by a Decoder Chip. The readout processor module (OnSiRoC) operates the detectors, controls the Decoder Chips and performs a first level data reduction. The paper describes the readout architecture of the H1 Silicon Detectors and performance data of the complete readout chain. (orig.)

  6. Paper-based electrochemical sensing platform with integral battery and electrochromic read-out.

    Science.gov (United States)

    Liu, Hong; Crooks, Richard M

    2012-03-06

    We report a battery-powered, microelectrochemical sensing platform that reports its output using an electrochromic display. The platform is fabricated based on paper fluidics and uses a Prussian blue spot electrodeposited on an indium-doped tin oxide thin film as the electrochromic indicator. The integrated metal/air battery powers both the electrochemical sensor and the electrochromic read-out, which are in electrical contact via a paper reservoir. The sample activates the battery and the presence of analyte in the sample initiates the color change of the Prussian blue spot. The entire system is assembled on the lab bench, without the need for cleanroom facilities. The applicability of the device to point-of-care sensing is demonstrated by qualitative detection of 0.1 mM glucose and H(2)O(2) in artificial urine samples.

  7. Performance of the gamma-ray camera based on GSO(Ce) scintillator array and PSPMT with the ASIC readout system

    International Nuclear Information System (INIS)

    Ueno, Kazuki; Hattori, Kaori; Ida, Chihiro; Iwaki, Satoru; Kabuki, Shigeto; Kubo, Hidetoshi; Kurosawa, Shunsuke; Miuchi, Kentaro; Nagayoshi, Tsutomu; Nishimura, Hironobu; Orito, Reiko; Takada, Atsushi; Tanimori, Toru

    2008-01-01

    We have studied the performance of a readout system with ASIC chips for a gamma-ray camera based on a 64-channel multi-anode PSPMT (Hamamatsu flat-panel H8500) coupled to a GSO(Ce) scintillator array. The GSO array consists of 8x8 pixels of 6x6x13 mm 3 with the same pixel pitch as the anode of the H8500. This camera is intended to serve as an absorber of an electron tracking Compton gamma-ray camera that measures gamma rays up to ∼1 MeV. Because we need a readout system with low power consumption for a balloon-borne experiment, we adopted a 32-channel ASIC chip, IDEAS VA32 H DR11, which has one of the widest dynamic range among commercial chips. However, in the case of using a GSO(Ce) crystal and the H8500, the dynamic range of VA32 H DR11 is narrow, and therefore the H8500 has to be operated with a low gain of about 10 5 . If the H8500 is operated with a low gain, the camera has a narrow incident-energy dynamic range from 100 to 700 keV, and a bad energy resolution of 13.0% (FWHM) at 662 keV. We have therefore developed an attenuator board in order to operate the H8500 with the typical gain of 10 6 , which can measure up to ∼1 MeV gamma ray. The board makes the variation of the anode gain uniform and widens the dynamic range of the H8500. The system using the new attenuator board has a good uniformity of min:max∼1:1.6, an incident-energy dynamic range from 30 to 900 keV, a position resolution of less than 6 mm, and a typical energy resolution of 10.6% (FWHM) at 662 keV with a low power consumption of about 1.7 W/64ch

  8. An instrumentation amplifier based readout circuit for a dual element microbolometer infrared detector

    Science.gov (United States)

    de Waal, D. J.; Schoeman, J.

    2014-06-01

    The infrared band is widely used in many applications to solve problems stretching over very diverse fields, ranging from medical applications like inflammation detection to military, security and safety applications employing thermal imaging in low light conditions. At the heart of these optoelectrical systems lies a sensor used to detect incident infrared radiation, and in the case of this work our focus is on uncooled microbolometers as thermal detectors. Microbolometer based thermal detectors are limited in sensitivity by various parameters, including the detector layout and design, operating temperature, air pressure and biasing that causes self heating. Traditional microbolometers use the entire membrane surface for a single detector material. This work presents the design of a readout circuit amplifier where a dual detector element microbolometer is used, rather than the traditional single element. The concept to be investigated is based on the principle that both elements will be stimulated with a similar incoming IR signal and experience the same resistive change, thus creating a common mode signal. However, such a common mode signal will be rejected by a differential amplifier, thus one element is placed within a negative resistance converter to create a differential mode signal that is twice the magnitude of the comparable single mode signal of traditional detector designs. An instrumentation amplifier is used for the final stage of the readout amplifier circuit, as it allows for very high common mode rejection with proper trimming of the Wheatstone bridge to compensate for manufacturing tolerance. It was found that by implementing the above, improved sensitivity can be achieved.

  9. Solid state silicon based condenser microphone for hearing aid, has transducer chip and IC chip between intermediate chip and openings on both sides of intermediate chip, to allow sound towards diaphragm

    DEFF Research Database (Denmark)

    2000-01-01

    towards diaphragm. Surface of the chip (2) has electrical conductors (14) to connect chip with IC chip (3). USE - For use in miniature electroacoustic devices such as hearing aid. ADVANTAGE - Since sound inlet is covered by filter, dust, moisture and other impurities do not obstruct interior and sound...... inlet of microphone. External electrical connection can be made economically reliable and the thermal stress is avoided with the small size solid state silicon based condenser microphone....

  10. Manipulating Neutral Atoms in Chip-Based Magnetic Traps

    Science.gov (United States)

    Aveline, David; Thompson, Robert; Lundblad, Nathan; Maleki, Lute; Yu, Nan; Kohel, James

    2009-01-01

    Several techniques for manipulating neutral atoms (more precisely, ultracold clouds of neutral atoms) in chip-based magnetic traps and atomic waveguides have been demonstrated. Such traps and waveguides are promising components of future quantum sensors that would offer sensitivities much greater than those of conventional sensors. Potential applications include gyroscopy and basic research in physical phenomena that involve gravitational and/or electromagnetic fields. The developed techniques make it possible to control atoms with greater versatility and dexterity than were previously possible and, hence, can be expected to contribute to the value of chip-based magnetic traps and atomic waveguides. The basic principle of these techniques is to control gradient magnetic fields with suitable timing so as to alter a trap to exert position-, velocity-, and/or time-dependent forces on atoms in the trap to obtain desired effects. The trap magnetic fields are generated by controlled electric currents flowing in both macroscopic off-chip electromagnet coils and microscopic wires on the surface of the chip. The methods are best explained in terms of examples. Rather than simply allowing atoms to expand freely into an atomic waveguide, one can give them a controllable push by switching on an externally generated or a chip-based gradient magnetic field. This push can increase the speed of the atoms, typically from about 5 to about 20 cm/s. Applying a non-linear magnetic-field gradient exerts different forces on atoms in different positions a phenomenon that one can exploit by introducing a delay between releasing atoms into the waveguide and turning on the magnetic field.

  11. Lab-on-a-Chip Based Protein Crystallization

    Science.gov (United States)

    vanderWoerd, Mark J.; Brasseur, Michael M.; Spearing, Scott F.; Whitaker, Ann F. (Technical Monitor)

    2001-01-01

    We are developing a novel technique with which we will grow protein crystals in very small volumes, utilizing chip-based, microfluidic ("LabChip") technology. This development, which is a collaborative effort between NASA's Marshall Space Flight Center and Caliper Technologies Corporation, promises a breakthrough in the field of protein crystal growth. Our initial results obtained from two model proteins, Lysozyme and Thaumatin, show that it is feasible to dispense and adequately mix protein and precipitant solutions on a nano-liter scale. The mixtures have shown crystal growth in volumes in the range of 10 nanoliters to 5 microliters. In addition, large diffraction quality crystals were obtained by this method. X-ray data from these crystals were shown to be of excellent quality. Our future efforts will include the further development of protein crystal growth with LabChip(trademark) technology for more complex systems. We will initially address the batch growth method, followed by the vapor diffusion method and the liquid-liquid diffusion method. The culmination of these chip developments is to lead to an on orbit protein crystallization facility on the International Space Station. Structural biologists will be invited to utilize the on orbit Iterative Biological Crystallization facility to grow high quality macromolecular crystals in microgravity.

  12. Highly efficient router-based readout algorithm for single-photon-avalanche-diode imagers for time-correlated experiments

    Science.gov (United States)

    Cominelli, A.; Acconcia, G.; Caldi, F.; Peronio, P.; Ghioni, M.; Rech, I.

    2018-02-01

    Time-Correlated Single Photon Counting (TCSPC) is a powerful tool that permits to record extremely fast optical signals with a precision down to few picoseconds. On the other hand, it is recognized as a relatively slow technique, especially when a large time-resolved image is acquired exploiting a single acquisition channel and a scanning system. During the last years, much effort has been made towards the parallelization of many acquisition and conversion chains. In particular, the exploitation of Single-Photon Avalanche Diodes in standard CMOS technology has paved the way to the integration of thousands of independent channels on the same chip. Unfortunately, the presence of a large number of detectors can give rise to a huge rate of events, which can easily lead to the saturation of the transfer rate toward the elaboration unit. As a result, a smart readout approach is needed to guarantee an efficient exploitation of the limited transfer bandwidth. We recently introduced a novel readout architecture, aimed at maximizing the counting efficiency of the system in typical TCSPC measurements. It features a limited number of high-performance converters, which are shared with a much larger array, while a smart routing logic provides a dynamic multiplexing between the two parts. Here we propose a novel routing algorithm, which exploits standard digital gates distributed among a large 32x32 array to ensure a dynamic connection between detectors and external time-measurement circuits.

  13. Characterization of the column-based priority logic readout of Topmetal-II− CMOS pixel direct charge sensor

    International Nuclear Information System (INIS)

    An, M.; Zhang, W.; Xiao, L.; Gao, C.; Chen, C.; Huang, G.; Ji, R.; Liu, J.; Pei, H.; Sun, X.; Wang, K.; Yang, P.; Zhou, W.; Han, M.; Mei, Y.; Li, X.; Sun, Q.

    2017-01-01

    We present the detailed study of the digital readout of Topmetal-II - CMOS pixel direct charge sensor. Topmetal-II - is an integrated sensor with an array of 72×72 pixels each capable of directly collecting external charge through exposed metal electrodes in the topmost metal layer. In addition to the time-shared multiplexing readout of the analog output from Charge Sensitive Amplifiers in each pixel, hits are also generated through comparators in each pixel with individually adjustable thresholds. The hits are read out via a column-based priority logic structure, retaining both hit location and time information. The in-array column-based priority logic features with a full clock-less circuitry hence there is no continuously running clock distributed in the pixel and matrix logic. These characteristics enable its use as the charge readout device in future Time Projection Chambers without gaseous gain mechanism, which has unique advantages in low background and low rate-density experiments. We studied the detailed working behavior and performance of this readout, and demonstrated its functional validity and potential in imaging applications.

  14. Ligands, cell-based models, and readouts required for Toll-like receptor action.

    LENUS (Irish Health Repository)

    Dellacasagrande, Jerome

    2012-02-01

    This chapter details the tools that are available to study Toll-like receptor (TLR) biology in vitro. This includes ligands, host cells, and readouts. The use of modified TLRs to circumvent some technical problems is also discussed.

  15. Neural Cell Chip Based Electrochemical Detection of Nanotoxicity.

    Science.gov (United States)

    Kafi, Md Abdul; Cho, Hyeon-Yeol; Choi, Jeong Woo

    2015-07-02

    Development of a rapid, sensitive and cost-effective method for toxicity assessment of commonly used nanoparticles is urgently needed for the sustainable development of nanotechnology. A neural cell with high sensitivity and conductivity has become a potential candidate for a cell chip to investigate toxicity of environmental influences. A neural cell immobilized on a conductive surface has become a potential tool for the assessment of nanotoxicity based on electrochemical methods. The effective electrochemical monitoring largely depends on the adequate attachment of a neural cell on the chip surfaces. Recently, establishment of integrin receptor specific ligand molecules arginine-glycine-aspartic acid (RGD) or its several modifications RGD-Multi Armed Peptide terminated with cysteine (RGD-MAP-C), C(RGD)₄ ensure farm attachment of neural cell on the electrode surfaces either in their two dimensional (dot) or three dimensional (rod or pillar) like nano-scale arrangement. A three dimensional RGD modified electrode surface has been proven to be more suitable for cell adhesion, proliferation, differentiation as well as electrochemical measurement. This review discusses fabrication as well as electrochemical measurements of neural cell chip with particular emphasis on their use for nanotoxicity assessments sequentially since inception to date. Successful monitoring of quantum dot (QD), graphene oxide (GO) and cosmetic compound toxicity using the newly developed neural cell chip were discussed here as a case study. This review recommended that a neural cell chip established on a nanostructured ligand modified conductive surface can be a potential tool for the toxicity assessments of newly developed nanomaterials prior to their use on biology or biomedical technologies.

  16. Neural Cell Chip Based Electrochemical Detection of Nanotoxicity

    Directory of Open Access Journals (Sweden)

    Md. Abdul Kafi

    2015-07-01

    Full Text Available Development of a rapid, sensitive and cost-effective method for toxicity assessment of commonly used nanoparticles is urgently needed for the sustainable development of nanotechnology. A neural cell with high sensitivity and conductivity has become a potential candidate for a cell chip to investigate toxicity of environmental influences. A neural cell immobilized on a conductive surface has become a potential tool for the assessment of nanotoxicity based on electrochemical methods. The effective electrochemical monitoring largely depends on the adequate attachment of a neural cell on the chip surfaces. Recently, establishment of integrin receptor specific ligand molecules arginine-glycine-aspartic acid (RGD or its several modifications RGD-Multi Armed Peptide terminated with cysteine (RGD-MAP-C, C(RGD4 ensure farm attachment of neural cell on the electrode surfaces either in their two dimensional (dot or three dimensional (rod or pillar like nano-scale arrangement. A three dimensional RGD modified electrode surface has been proven to be more suitable for cell adhesion, proliferation, differentiation as well as electrochemical measurement. This review discusses fabrication as well as electrochemical measurements of neural cell chip with particular emphasis on their use for nanotoxicity assessments sequentially since inception to date. Successful monitoring of quantum dot (QD, graphene oxide (GO and cosmetic compound toxicity using the newly developed neural cell chip were discussed here as a case study. This review recommended that a neural cell chip established on a nanostructured ligand modified conductive surface can be a potential tool for the toxicity assessments of newly developed nanomaterials prior to their use on biology or biomedical technologies.

  17. A Time-Based Front End Readout System for PET & CT

    CERN Document Server

    Meyer, T C; Anghinolfi, F; Auffray, E; Dosanjh, M; Hillemanns, H; Hoffmann, H -F; Jarron, P; Kaplon, J; Kronberger, M; Lecoq, P; Moraes, D; Trummer, J

    2007-01-01

    In the framework of the European FP6's BioCare project, we develop a novel, time-based, photo-detector readout technique to increase sensitivity and timing precision for molecular imaging in PET and CT. The project aims to employ Avalanche Photo Diode (APD) arrays with state of the art, high speed, front end amplifiers and discrimination circuits developed for the Large Hadron Collider (LHC) physics program at CERN, suitable to detect and process photons in a combined one-unit PET/CT detection head. In the so-called time-based approach our efforts focus on the system's timing performance with sub-nanosecond time-jitter and -walk, and yet also provide information on photon energy without resorting to analog to digital conversion. The bandwidth of the electronic circuitry is compatible with the scintillator's intrinsic light response (e.g. les40ns in LSO) and hence allows high rate CT operation in single-photon counting mode. Based on commercial LSO crystals and Hamamatsu S8550 APD arrays, we show the system pe...

  18. Pixel readout ASIC for an APD based 2D X-ray hybrid pixel detector with sub-nanosecond resolution

    Energy Technology Data Exchange (ETDEWEB)

    Thil, Ch., E-mail: christophe.thil@ziti.uni-heidelberg.d [Heidelberg University, Institute of Computer Engineering, B6, 26, 68161 Mannheim (Germany); Baron, A.Q.R. [RIKEN SPring-8 Center, 1-1-1 Kouto, Sayo-cho, Sayo-gun, Hyogo 679-5148 (Japan); Fajardo, P. [ESRF, Polygone Scientifique Louis Neel, 6, rue Jules Horowitz, 38000 Grenoble (France); Fischer, P. [Heidelberg University, Institute of Computer Engineering, B6, 26, 68161 Mannheim (Germany); Graafsma, H. [DESY, Notkestrasse 85, 22607 Hamburg (Germany); Rueffer, R. [ESRF, Polygone Scientifique Louis Neel, 6, rue Jules Horowitz, 38000 Grenoble (France)

    2011-02-01

    The fast response and the short recovery time of avalanche photodiodes (APDs) in linear mode make those devices ideal for direct X-ray detection in applications requiring high time resolution or counting rate. In order to provide position sensitivity, the XNAP project aims at creating a hybrid pixel detector with nanosecond time resolution based on a monolithic APD sensor array with 32 x32 pixels covering about 1 cm{sup 2} active area. The readout is implemented in a pixelated front-end ASIC suited for the readout of such arrays, matched to pixels of 280{mu}mx280{mu}m size. Every single channel features a fast transimpedance amplifier, a discriminator with locally adjustable threshold and two counters with high dynamic range and counting speed able to accumulate X-ray hits with no readout dead time. Additionally, the detector can be operated in list mode by time-stamping every single event with sub-nanosecond resolution. In a first phase of the project, a 4x4 pixel test module is built to validate the conceptual design of the detector. The XNAP project is briefly presented and the performance of the readout ASIC is discussed.

  19. Pixel readout ASIC for an APD based 2D X-ray hybrid pixel detector with sub-nanosecond resolution

    International Nuclear Information System (INIS)

    Thil, Ch.; Baron, A.Q.R.; Fajardo, P.; Fischer, P.; Graafsma, H.; Rueffer, R.

    2011-01-01

    The fast response and the short recovery time of avalanche photodiodes (APDs) in linear mode make those devices ideal for direct X-ray detection in applications requiring high time resolution or counting rate. In order to provide position sensitivity, the XNAP project aims at creating a hybrid pixel detector with nanosecond time resolution based on a monolithic APD sensor array with 32 x32 pixels covering about 1 cm 2 active area. The readout is implemented in a pixelated front-end ASIC suited for the readout of such arrays, matched to pixels of 280μmx280μm size. Every single channel features a fast transimpedance amplifier, a discriminator with locally adjustable threshold and two counters with high dynamic range and counting speed able to accumulate X-ray hits with no readout dead time. Additionally, the detector can be operated in list mode by time-stamping every single event with sub-nanosecond resolution. In a first phase of the project, a 4x4 pixel test module is built to validate the conceptual design of the detector. The XNAP project is briefly presented and the performance of the readout ASIC is discussed.

  20. Embedded Processor Based Automatic Temperature Control of VLSI Chips

    Directory of Open Access Journals (Sweden)

    Narasimha Murthy Yayavaram

    2009-01-01

    Full Text Available This paper presents embedded processor based automatic temperature control of VLSI chips, using temperature sensor LM35 and ARM processor LPC2378. Due to the very high packing density, VLSI chips get heated very soon and if not cooled properly, the performance is very much affected. In the present work, the sensor which is kept very near proximity to the IC will sense the temperature and the speed of the fan arranged near to the IC is controlled based on the PWM signal generated by the ARM processor. A buzzer is also provided with the hardware, to indicate either the failure of the fan or overheating of the IC. The entire process is achieved by developing a suitable embedded C program.

  1. PCI Based Read-out Receiver Card in the ALICE DAQ System

    CERN Document Server

    Carena, W; Dénes, E; Divià, R; Schossmaier, K; Soós, C; Sulyán, J; Vascotto, Alessandro; Van de Vyvre, P

    2001-01-01

    The Detector Data Link (DDL) is the high-speed optical link for the ALICE experiment. This link shall transfer the data coming from the detectors at 100 MB/s rate. The main components of the link have been developed: the destination Interface Unit (DIU), the Source Interface Unit (SIU) and the Read-out Receiver Card (RORC). The first RORC version is based on the VME bus. The performance tests show that the maximum VME bandwidth could be reached. Meanwhile the PCI bus became very popular and is used in many platforms. The development of a PCI-based version has been started. The document describes the prototype version in three sections. An overview explains the main purpose of the card: to provide an interface between the DDL and the PCI bus. Acting as a 32bit/33MHz PCI master the card is able to write or read directly to or from the system memory from or to the DDL, respectively. Beside these functions the card can also be used as an autonomous data generator. The card has been designed to be well adapted to ...

  2. A VME-based readout system for the CMS Preshower sub-detector

    CERN Document Server

    Antchev, G; Bialas, W; Da Silva, J C; Kokkas, P; Manthos, N; Reynaud, S; Sidiropoulos, G; Snoeys, W; Vichoudis, P

    2007-01-01

    The CMS preshower is a fine grain detector that comprises 4288 silicon sensors, each containing 32 strips. The raw data are transferred from the detector to the counting room via 1208 optical fibres. Each fibre carries a 600-byte data packet per event. The maximum average level-1 trigger rate of 100 kHz results in a total data flow of ~72 GB/s from the preshower. For the readout of the preshower, 56 links to the CMS DAQ have been reserved, each having a bandwidth of 200 MB/s (2 kB/event). The total available downstream bandwidth of GB/s necessitates a reduction in the data volume by a factor of at least 7. A modular VME-based system is currently under development. The main objective of each VME board in this system is to acquire on-detector data from at least 22 optical links, perform on-line data reduction and pass the concentrated data to the CMS DAQ. The principle modules that the system is based on are being developed in collaboration with the TOTEM experiment.

  3. Fast readout of the COMPASS RICH CsI-MWPC chambers

    CERN Document Server

    Abbon, P; Deschampbs, H; Kunne, F; Gerasimov, S; Ketzer, B; Konorov, I; Kravtchuk, N; Magnon, A; Neyret, D; Panebianco, S; Paul, S; Rebourgeard, P; Tessaroto, F

    2006-01-01

    A new readout system for CsI-coated MWPCs, used in the COMPASS RICH detector, has been proposed and tested in nominal high-rate conditions. It is based on the APV25-S1 analog sampling chip, and will replace the Gassiplex chip readout used up to now. The APV chip, originally designed for silicon microstrip detectors, is shown to perform well even with “slow” signals from a MWPC, keeping a signal-to-noise ratio of 9. For every trigger the system reads three consecutive in-time samples, thus allowing to extract information on the signal shape and its timing. The effective time window is reduced from ∼3 μs for the Gassiplex to below 400 ns for the APV25-S1 chip, reducing pile-up events at high particle rate. A significant improvement of the signal-to-background ratio by a factor 5–6 with respect to the original readout has been measured in the central region of the RICH detector. Due to its pipelined architecture, the new readout system also considerably reduces the dead time per event, allowing efficien...

  4. Fast readout of the COMPASS RICH CsI-MWPC photon chambers

    International Nuclear Information System (INIS)

    Abbon, P.; Delagnes, E.; Deschamps, H.; Kunne, F.; Gerasimov, S.; Ketzer, B.; Konorov, I.; Kravtchuk, N.; Magnon, A.; Neyret, D.; Panebianco, S.; Paul, S.; Rebourgeard, P.; Tessaroto, F.

    2006-01-01

    A new readout system for CsI-coated MWPCs, used in the COMPASS RICH detector, has been proposed and tested in nominal high-rate conditions. It is based on the APV25-S1 analog sampling chip, and will replace the Gassiplex chip readout used up to now. The APV chip, originally designed for silicon microstrip detectors, is shown to perform well even with 'slow' signals from a MWPC, keeping a signal-to-noise ratio of 9. For every trigger the system reads three consecutive in-time samples, thus allowing to extract information on the signal shape and its timing. The effective time window is reduced from ∼3 μs for the Gassiplex to below 400 ns for the APV25-S1 chip, reducing pile-up events at high particle rate. A significant improvement of the signal-to-background ratio by a factor 5-6 with respect to the original readout has been measured in the central region of the RICH detector. Due to its pipelined architecture, the new readout system also considerably reduces the dead time per event, allowing efficient data taking at higher trigger rate

  5. First considerations for a readout system for the ILD TPC with the Timepix3

    Energy Technology Data Exchange (ETDEWEB)

    Schiffer, Tobias [Universitaet Bonn (Germany); Collaboration: LCTPC-Deutschland-Collaboration

    2016-07-01

    For the planned International Linear Collider (ILC) two detectors are proposed. One of them, the International Large Detector (ILD) uses a Time Projektion Chamber (TPC) as the main tracking device. As a readout system for this TPC, pixel chips are one of the considered options. An integrated Micromegas stage is foreseen as gas amplification stage, which is built directly on top of the chip. Since first tests of a Pixel-TPC with 160 Timepix ASICs showed promising results, one is interested in developing a detector using the Timepix3 ASIC. It has several advantages, first of all its feature to measure ToT and a ToA at the same time and its significantly increased readout rate. For this purpose a readout system needs to be developed which fulfils the requirements of the Timpix3 ASIC and also has a high scalability. The main challenges are the high speed readout with a clock of up to 640 MHz and the reliability of the system. Also, the data driven as well as the frame-based readout of the Timepix3 needs to be considered for the implementation. The main goal is to provide a fast and parallel readout of several million channels. An overview and the status of the planning is given. Also, the development challenges are discussed.

  6. Characterizing Rat PNS Electrophysiological Response to Electrical Stimulation Using in vitro Chip-Based Human Investigational Platform (iCHIP)

    Energy Technology Data Exchange (ETDEWEB)

    Khani, Joshua [Georgetown Univ., Washington, DC (United States); Prescod, Lindsay [Georgetown Univ., Washington, DC (United States); Enright, Heather [Georgetown Univ., Washington, DC (United States); Felix, Sarah [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Osburn, Joanne [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Wheeler, Elizabeth [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Kulp, Kris [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)

    2015-08-18

    Ex vivo systems and organ-on-a-chip technology offer an unprecedented approach to modeling the inner workings of the human body. The ultimate goal of LLNL’s in vitro Chip-based Human Investigational Platform (iCHIP) is to integrate multiple organ tissue cultures using microfluidic channels, multi-electrode arrays (MEA), and other biosensors in order to effectively simulate and study the responses and interactions of the major organs to chemical and physical stimulation. In this study, we focused on the peripheral nervous system (PNS) component of the iCHIP system. Specifically we sought to expound on prior research investigating the electrophysiological response of rat dorsal root ganglion cells (rDRGs) to chemical exposures, such as capsaicin. Our aim was to establish a protocol for electrical stimulation using the iCHIP device that would reliably elicit a characteristic response in rDRGs. By varying the parameters for both the stimulation properties – amplitude, phase width, phase shape, and stimulation/ return configuration – and the culture conditions – day in vitro and neural cell types - we were able to make several key observations and uncover a potential convention with a minimal number of devices tested. Future work will seek to establish a standard protocol for human DRGs in the iCHIP which will afford a portable, rapid method for determining the effects of toxins and novel therapeutics on the PNS.

  7. Latest generation of ASICs for photodetector readout

    International Nuclear Information System (INIS)

    Seguin-Moreau, N.

    2013-01-01

    The OMEGA microelectronics group has designed a new generation of multichannel integrated circuits, the “ROC” family, in AustrianMicroSystem (AMS) SiGe 0.35 μm technology to read out signals from various families of photodetectors. The chip named MAROC (standing for Multi Anode ReadOut Chip) has been designed to read out MultiAnode Photomultipliers (MAPMT), Photomultiplier ARray In SiGe ReadOut Chip (PARISROC) to read out Photomultipliers (PMTs) and SiPM Integrated ReadOut Chip (SPIROC) to readout Silicon PhotoMultiplier (SiPM) detectors and which was the first ASIC to do so. The three of them fulfill the stringent requirements of the future photodetectors, in particular in terms of low noise, radiation hardness, large dynamic range, high density and high speed while keeping low power thanks to the SiGe technology. These multi-channel ASICs are real System on Chip (SoC) as they provide charge, time and photon-counting information which are digitized internally. Their complexity and versatility enable innovative frontier detectors and also cover spin off of these detectors in adjacent fields such as medical or material imaging as well as smart detectors. In this presentation, the three ASIC architectures and test results will be described to give a general panorama of the “ROC” chips

  8. Latest generation of ASICs for photodetector readout

    Science.gov (United States)

    Seguin-Moreau, N.

    2013-08-01

    The OMEGA microelectronics group has designed a new generation of multichannel integrated circuits, the "ROC" family, in AustrianMicroSystem (AMS) SiGe 0.35 μm technology to read out signals from various families of photodetectors. The chip named MAROC (standing for Multi Anode ReadOut Chip) has been designed to read out MultiAnode Photomultipliers (MAPMT), Photomultiplier ARray In SiGe ReadOut Chip (PARISROC) to read out Photomultipliers (PMTs) and SiPM Integrated ReadOut Chip (SPIROC) to readout Silicon PhotoMultiplier (SiPM) detectors and which was the first ASIC to do so. The three of them fulfill the stringent requirements of the future photodetectors, in particular in terms of low noise, radiation hardness, large dynamic range, high density and high speed while keeping low power thanks to the SiGe technology. These multi-channel ASICs are real System on Chip (SoC) as they provide charge, time and photon-counting information which are digitized internally. Their complexity and versatility enable innovative frontier detectors and also cover spin off of these detectors in adjacent fields such as medical or material imaging as well as smart detectors. In this presentation, the three ASIC architectures and test results will be described to give a general panorama of the "ROC" chips.

  9. Latest generation of ASICs for photodetector readout

    Energy Technology Data Exchange (ETDEWEB)

    Seguin-Moreau, N., E-mail: seguin@lal.in2p3.fr [Laboratoire de l’Accélérateur Linéaire, IN2P3-CNRS, Université Paris-Sud, Bâtiment 200, 91898 Orsay Cedex (France)

    2013-08-01

    The OMEGA microelectronics group has designed a new generation of multichannel integrated circuits, the “ROC” family, in AustrianMicroSystem (AMS) SiGe 0.35 μm technology to read out signals from various families of photodetectors. The chip named MAROC (standing for Multi Anode ReadOut Chip) has been designed to read out MultiAnode Photomultipliers (MAPMT), Photomultiplier ARray In SiGe ReadOut Chip (PARISROC) to read out Photomultipliers (PMTs) and SiPM Integrated ReadOut Chip (SPIROC) to readout Silicon PhotoMultiplier (SiPM) detectors and which was the first ASIC to do so. The three of them fulfill the stringent requirements of the future photodetectors, in particular in terms of low noise, radiation hardness, large dynamic range, high density and high speed while keeping low power thanks to the SiGe technology. These multi-channel ASICs are real System on Chip (SoC) as they provide charge, time and photon-counting information which are digitized internally. Their complexity and versatility enable innovative frontier detectors and also cover spin off of these detectors in adjacent fields such as medical or material imaging as well as smart detectors. In this presentation, the three ASIC architectures and test results will be described to give a general panorama of the “ROC” chips.

  10. Pulse mode actuation-readout system based on MEMS resonator for liquid sensing

    DEFF Research Database (Denmark)

    Tang, Meng; Cagliani, Alberto; Davis, Zachary James

    2014-01-01

    A MEMS (Micro-Electro-Mechanical Systems) bulk disk resonator is applied for mass sensing under its dynamic mode. The classical readout circuitry involves sophisticated feedback loop and feedthrough compensation. We propose a simple straightforward non-loop pulse mode actuation and capacitive...... readout scheme. In order to verify its feasibility in liquid bio-chemical sensing environment, an experimental measurement is conducted with humidity sensing application. The measured resonant frequency changes 60kHz of 67.7MHz with a humidity change of 0~80%....

  11. Security of Quantum-Readout PUFs against quadrature based challenge estimation attacks

    NARCIS (Netherlands)

    Skoric, B.; Mosk, Allard; Pinkse, Pepijn Willemszoon Harry

    2013-01-01

    The concept of quantum-secure readout of Physical Unclonable Functions (PUFs) has recently been realized experimentally in an optical PUF system. We analyze the security of this system under the strongest type of classical attack: the challenge estimation attack. The adversary performs a measurement

  12. 3D printed flexible capacitive force sensor with a simple micro-controller based readout

    NARCIS (Netherlands)

    Schouten, Martijn G.; Sanders, Remco; Krijnen, Gijs

    2017-01-01

    This paper describes the development of a proof of principle of a flexible force sensor and the corresponding readout circuit. The flexible force sensor consists of a parallel plate capacitor that is 3D printed using regular and conductive thermoplastic poly-urethane (TPU). The capacitance change

  13. Noise Reduction Effect of Multiple-Sampling-Based Signal-Readout Circuits for Ultra-Low Noise CMOS Image Sensors

    Directory of Open Access Journals (Sweden)

    Shoji Kawahito

    2016-11-01

    Full Text Available This paper discusses the noise reduction effect of multiple-sampling-based signal readout circuits for implementing ultra-low-noise image sensors. The correlated multiple sampling (CMS technique has recently become an important technology for high-gain column readout circuits in low-noise CMOS image sensors (CISs. This paper reveals how the column CMS circuits, together with a pixel having a high-conversion-gain charge detector and low-noise transistor, realizes deep sub-electron read noise levels based on the analysis of noise components in the signal readout chain from a pixel to the column analog-to-digital converter (ADC. The noise measurement results of experimental CISs are compared with the noise analysis and the effect of noise reduction to the sampling number is discussed at the deep sub-electron level. Images taken with three CMS gains of two, 16, and 128 show distinct advantage of image contrast for the gain of 128 (noise(median: 0.29 e−rms when compared with the CMS gain of two (2.4 e−rms, or 16 (1.1 e−rms.

  14. Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

    Science.gov (United States)

    Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P. L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C. A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.; Mugnier, H.; Musa, L.; Puggioni, C.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Siddhanta, S.; Usai, G.; van Hoorne, J. W.; Yi, J.

    2015-06-01

    Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

  15. Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

    International Nuclear Information System (INIS)

    Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P.L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C.A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.

    2015-01-01

    Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented

  16. Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

    Energy Technology Data Exchange (ETDEWEB)

    Yang, P., E-mail: yangping0710@126.com [Central China Normal University, Wuhan (China); Aglieri, G.; Cavicchioli, C. [CERN, 1210 Geneva 23 (Switzerland); Chalmet, P.L. [MIND, Archamps (France); Chanlek, N. [Suranaree University of Technology, Nakhon Ratchasima (Thailand); Collu, A. [University of Cagliari, Cagliari (Italy); INFN (Italy); Gao, C. [Central China Normal University, Wuhan (China); Hillemanns, H.; Junique, A. [CERN, 1210 Geneva 23 (Switzerland); Kofarago, M. [CERN, 1210 Geneva 23 (Switzerland); University of Utrecht, Utrecht (Netherlands); Keil, M.; Kugathasan, T. [CERN, 1210 Geneva 23 (Switzerland); Kim, D. [Dongguk and Yonsei University, Seoul (Korea, Republic of); Kim, J. [Pusan National University, Busan (Korea, Republic of); Lattuca, A. [University of Torino, Torino (Italy); INFN (Italy); Marin Tobon, C.A. [CERN, 1210 Geneva 23 (Switzerland); Marras, D. [University of Cagliari, Cagliari (Italy); INFN (Italy); Mager, M.; Martinengo, P. [CERN, 1210 Geneva 23 (Switzerland); Mazza, G. [University of Torino, Torino (Italy); INFN (Italy); and others

    2015-06-11

    Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

  17. Development of gold based solder candidates for flip chip assembly

    DEFF Research Database (Denmark)

    Chidambaram, Vivek; Hald, John; Hattel, Jesper Henri

    2009-01-01

    Flip chip technology is now rapidly replacing the traditional wire bonding interconnection technology in the first level packaging applications due to the miniaturization drive in the microelectronics industry. Flip chip assembly currently involves the use of high lead containing solders...

  18. A novel high electrode count spike recording array using an 81,920 pixel transimpedance amplifier-based imaging chip.

    Science.gov (United States)

    Johnson, Lee J; Cohen, Ethan; Ilg, Doug; Klein, Richard; Skeath, Perry; Scribner, Dean A

    2012-04-15

    Microelectrode recording arrays of 60-100 electrodes are commonly used to record neuronal biopotentials, and these have aided our understanding of brain function, development and pathology. However, higher density microelectrode recording arrays of larger area are needed to study neuronal function over broader brain regions such as in cerebral cortex or hippocampal slices. Here, we present a novel design of a high electrode count picocurrent imaging array (PIA), based on an 81,920 pixel Indigo ISC9809 readout integrated circuit camera chip. While originally developed for interfacing to infrared photodetector arrays, we have adapted the chip for neuron recording by bonding it to microwire glass resulting in an array with an inter-electrode pixel spacing of 30 μm. In a high density electrode array, the ability to selectively record neural regions at high speed and with good signal to noise ratio are both functionally important. A critical feature of our PIA is that each pixel contains a dedicated low noise transimpedance amplifier (∼0.32 pA rms) which allows recording high signal to noise ratio biocurrents comparable to single electrode voltage amplifier recordings. Using selective sampling of 256 pixel subarray regions, we recorded the extracellular biocurrents of rabbit retinal ganglion cell spikes at sampling rates up to 7.2 kHz. Full array local electroretinogram currents could also be recorded at frame rates up to 100 Hz. A PIA with a full complement of 4 readout circuits would span 1cm and could acquire simultaneous data from selected regions of 1024 electrodes at sampling rates up to 9.3 kHz. Published by Elsevier B.V.

  19. A novel readout integrated circuit for ferroelectric FPA detector

    Science.gov (United States)

    Bai, Piji; Li, Lihua; Ji, Yulong; Zhang, Jia; Li, Min; Liang, Yan; Hu, Yanbo; Li, Songying

    2017-11-01

    Uncooled infrared detectors haves some advantages such as low cost light weight low power consumption, and superior reliability, compared with cryogenically cooled ones Ferroelectric uncooled focal plane array(FPA) are being developed for its AC response and its high reliability As a key part of the ferroelectric assembly the ROIC determines the performance of the assembly. A top-down design model for uncooled ferroelectric readout integrated circuit(ROIC) has been developed. Based on the optical thermal and electrical properties of the ferroelectric detector the RTIA readout integrated circuit is designed. The noise bandwidth of RTIA readout circuit has been developed and analyzed. A novel high gain amplifier, a high pass filter and a low pass filter circuits are designed on the ROIC. In order to improve the ferroelectric FPA package performance and decrease of package cost a temperature sensor is designed on the ROIC chip At last the novel RTIA ROIC is implemented on 0.6μm 2P3M CMOS silicon techniques. According to the experimental chip test results the temporal root mean square(RMS)noise voltage is about 1.4mV the sensitivity of the on chip temperature sensor is 0.6 mV/K from -40°C to 60°C the linearity performance of the ROIC chip is better than 99% Based on the 320×240 RTIA ROIC, a 320×240 infrared ferroelectric FPA is fabricated and tested. Test results shows that the 320×240 RTIA ROIC meets the demand of infrared ferroelectric FPA.

  20. Data readout system utilizing photonic integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Stopiński, S., E-mail: S.Stopinski@tue.nl [COBRA Research Institute, Eindhoven University of Technology (Netherlands); Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Malinowski, M.; Piramidowicz, R. [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Smit, M.K.; Leijtens, X.J.M. [COBRA Research Institute, Eindhoven University of Technology (Netherlands)

    2013-10-11

    We describe a novel optical solution for data readout systems. The core of the system is an Indium-Phosphide photonic integrated circuit performing as a front-end readout unit. It functions as an optical serializer in which the serialization of the input signal is provided by means of on-chip optical delay lines. The circuit employs electro-optic phase shifters to build amplitude modulators, power splitters for signal distribution, semiconductor optical amplifiers for signal amplification as well as on-chip reflectors. We present the concept of the system, the design and first characterization results of the devices that were fabricated in a multi-project wafer run.

  1. Investigation of image distortion due to MCP electronic readout misalignment and correction via customized GUI application

    Science.gov (United States)

    Vitucci, G.; Minniti, T.; Tremsin, A. S.; Kockelmann, W.; Gorini, G.

    2018-04-01

    The MCP-based neutron counting detector is a novel device that allows high spatial resolution and time-resolved neutron radiography and tomography with epithermal, thermal and cold neutrons. Time resolution is possible by the high readout speeds of ~ 1200 frames/sec, allowing high resolution event counting with relatively high rates without spatial resolution degradation due to event overlaps. The electronic readout is based on a Timepix sensor, a CMOS pixel readout chip developed at CERN. Currently, a geometry of a quad Timepix detector is used with an active format of 28 × 28 mm2 limited by the size of the Timepix quad (2 × 2 chips) readout. Measurements of a set of high-precision micrometers test samples have been performed at the Imaging and Materials Science & Engineering (IMAT) beamline operating at the ISIS spallation neutron source (U.K.). The aim of these experiments was the full characterization of the chip misalignment and of the gaps between each pad in the quad Timepix sensor. Such misalignment causes distortions of the recorded shape of the sample analyzed. We present in this work a post-processing image procedure that considers and corrects these effects. Results of the correction will be discussed and the efficacy of this method evaluated.

  2. A Novel Time-Based Readout Scheme for a Combined PET-CT Detector Using APDs

    CERN Document Server

    Powolny, F; Hillemanns, H; Jarron, P; Lecoq, P; Meyer, T C; Moraes, D

    2008-01-01

    This paper summarizes CERN R&D work done in the framework of the European Commission's FP6 BioCare Project. The objective was to develop a novel "time-based" signal processing technique to read out LSO-APD photodetectors for medical imaging. An important aspect was to employ the technique in a combined scenario for both computer tomography (CT) and positron emission tomography (PET) with effectively no tradeoffs in efficiency and resolution compared to traditional single mode machines. This made the use of low noise and yet very high-speed monolithic front-end electronics essential so as to assure the required timing characteristics together with a high signal-to-noise ratio. Using APDs for photon detection, two chips, traditionally employed for particle physics, could be identified to meet the above criteria. Although both were not optimized for their intended new medical application, excellent performance in conjunction with LSO-APD sensors could be derived. Whereas a measured energy resolution of 16% (...

  3. Self-corrected chip-based dual-comb spectrometer.

    Science.gov (United States)

    Hébert, Nicolas Bourbeau; Genest, Jérôme; Deschênes, Jean-Daniel; Bergeron, Hugo; Chen, George Y; Khurmi, Champak; Lancaster, David G

    2017-04-03

    We present a dual-comb spectrometer based on two passively mode-locked waveguide lasers integrated in a single Er-doped ZBLAN chip. This original design yields two free-running frequency combs having a high level of mutual stability. We developed in parallel a self-correction algorithm that compensates residual relative fluctuations and yields mode-resolved spectra without the help of any reference laser or control system. Fluctuations are extracted directly from the interferograms using the concept of ambiguity function, which leads to a significant simplification of the instrument that will greatly ease its widespread adoption and commercial deployment. Comparison with a correction algorithm relying on a single-frequency laser indicates discrepancies of only 50 attoseconds on optical timings. The capacities of this instrument are finally demonstrated with the acquisition of a high-resolution molecular spectrum covering 20 nm. This new chip-based multi-laser platform is ideal for the development of high-repetition-rate, compact and fieldable comb spectrometers in the near- and mid-infrared.

  4. A new avalanche photo diode based readout for the crystal barrel calorimeter

    Energy Technology Data Exchange (ETDEWEB)

    Urban, Martin [Helmholtz-Institut fuer Strahlen- und Kernphysik, Nussallee 14-16, 53115 Bonn (Germany); Collaboration: CBELSA/TAPS-Collaboration

    2015-07-01

    The CBELSA/TAPS experiment at ELSA has proven successful in the measurement of double polarization observables in meson photoproduction off protons and neutrons. To be able to measure purely neutral reactions on a polarized neutron target with high efficiency, the main calorimeter consisting of 1320 CsI(Tl) crystals has to be integrated into the first level trigger. Key requirement to achieve this goal is an exchange of the existing PIN photo diode by a new avalanche photo diode (APD) readout. The main advantage of the new readout system is that it will provide timing information which allows a fast trigger signal. The energy resolution will remain compatible to the previous system. Besides the development of automated test routines for the front end electronics, the characterization of all APDs was successfully accomplished in Bonn. After tests with a 3 x 3 CsI(Tl) crystal matrix at the tagged photon beam facilities at ELSA and MAMI the first half of the Crystal Barrel was upgraded in 2014. This talk shows the result of the latest test measurements including the gain stabilization of the new APD readout electronics and presents the progress of the ongoing upgrade.

  5. On-ground characterization of the Euclid's CCD273-based readout chain

    Science.gov (United States)

    Szafraniec, Magdalena; Azzollini, R.; Cropper, M.; Pottinger, S.; Khalil, A.; Hailey, M.; Hu, D.; Plana, C.; Cutts, A.; Hunt, T.; Kohley, R.; Walton, D.; Theobald, C.; Sharples, R.; Schmoll, J.; Ferrando, P.

    2016-07-01

    Euclid is a medium class European Space Agency mission scheduled for launch in 2020. The goal of the survey is to examine the nature of Dark Matter and Dark Energy in the Universe. One of the cosmological probes used to analyze Euclid's data, the weak lensing technique, measures the distortions of galaxy shapes and this requires very accurate knowledge of the system point spread function (PSF). Therefore, to ensure that the galaxy shape is not affected, the detector chain of the telescope's VISible Instrument (VIS) needs to meet specific performance performance requirements. Each of the 12 VIS readout chains consisting of 3 CCDs, readout electronics (ROE) and a power supply unit (RPSU) will undergo a rigorous on-ground testing to ensure that these requirements are met. This paper reports on the current status of the warm and cold testing of the VIS Engineering Model readout chain. Additionally, an early insight to the commissioning of the Flight Model calibration facility and program is provided.

  6. FPGA-based upgrade of the read-out electronics for the low energy polarimeter at COSY/Juelich

    Energy Technology Data Exchange (ETDEWEB)

    Hempelmann, Nils [Institut fuer Kernphysik, Forschungszentrum Juelich (Germany); Collaboration: JEDI-Collaboration

    2016-07-01

    The Cooler Synchrotron (COSY) is a facility for cooled polarized beams at the Forschungszentrum in Juelich. The Low Energy Polarimeter (LEP) is the polarimeter in the injection beam line of COSY. The beam polarization is measured using scattering off carbon and polyethylene (CH2) targets. The outgoing particles are detected using twelve plastic scintillators installed in groups of three to the left, to the right, above, and below the beam. The LEP is the routine tool for beam set-up, but its performance was limited by the old read-out electronics consisting of analog NIM modules. A new system using analog pulse sampling and an FPGA chip for signal processing was installed and tested. The ejectile particles were identified by relative time of flight measurement using a signal from the RF amplifier of the cyclotron used for acceleration as a reference. The new system is able to measure the time at which a particle arrives to an accuracy in the order of 50 ps. The presentation includes a review of available systems and a report about measurements in May and December 2015.

  7. Functional tests of 2S modules for the CMS Phase-2 Tracker Upgrade with a MicroTCA-based readout system

    CERN Document Server

    Preuten, Marius; Klein, Katja; Lipinski, Martin; Rauch, Max; Feld, Lutz

    2017-01-01

    First full size 2S module prototypes for the CMS Phase-2 Outer Tracker Upgrade have been assembled. With two sensors of realistic dimensions and 16 CBC2 readout ASICs on two front-end hybrids, the characteristics of these novel and complex objects can be studied.A MicroTCA based readout system was developed to test multiple front-end hybrids simultaneously. Therefore the concurrent information of the full module can be used for noise and signal studies.

  8. Development of a beam test telescope based on the Alibava readout system

    International Nuclear Information System (INIS)

    Marco-Hernandez, R

    2011-01-01

    A telescope for a beam test have been developed as a result of a collaboration among the University of Liverpool, Centro Nacional de Microelectronica (CNM) of Barcelona and Instituto de Fisica Corpuscular (IFIC) of Valencia. This system is intended to carry out both analogue charge collection and spatial resolution measurements with different types of microstrip or pixel silicon detectors in a beam test environment. The telescope has four XY measurement as well as trigger planes (XYT board) and it can accommodate up to twelve devices under test (DUT board). The DUT board uses two Beetle ASICs for the readout of chilled silicon detectors. The board could operate in a self-triggering mode. The board features a temperature sensor and it can be mounted on a rotary stage. A peltier element is used for cooling the DUT. Each XYT board measures the track space points using two silicon strip detectors connected to two Beetle ASICs. It can also trigger on the particle tracks in the beam test. The board includes a CPLD which allows for the synchronization of the trigger signal to a common clock frequency, delaying and implementing coincidence with other XYT boards. An Alibava mother board is used to read out and to control each XYT/DUT board from a common trigger signal and a common clock signal. The Alibava board has a TDC on board to have a time stamp of each trigger. The data collected by each Alibava board is sent to a master card by means of a local data/address bus following a custom digital protocol. The master board distributes the trigger, clock and reset signals. It also merges the data streams from up to sixteen Alibava boards. The board has also a test channel for testing in a standard mode a XYT or DUT board. This board is implemented with a Xilinx development board and a custom patch board. The master board is connected with the DAQ software via 100M Ethernet. Track based alignment software has also been developed for the data obtained with the DAQ software.

  9. Development of a beam test telescope based on the Alibava readout system

    Science.gov (United States)

    Marco-Hernández, R.

    2011-01-01

    A telescope for a beam test have been developed as a result of a collaboration among the University of Liverpool, Centro Nacional de Microelectrónica (CNM) of Barcelona and Instituto de Física Corpuscular (IFIC) of Valencia. This system is intended to carry out both analogue charge collection and spatial resolution measurements with different types of microstrip or pixel silicon detectors in a beam test environment. The telescope has four XY measurement as well as trigger planes (XYT board) and it can accommodate up to twelve devices under test (DUT board). The DUT board uses two Beetle ASICs for the readout of chilled silicon detectors. The board could operate in a self-triggering mode. The board features a temperature sensor and it can be mounted on a rotary stage. A peltier element is used for cooling the DUT. Each XYT board measures the track space points using two silicon strip detectors connected to two Beetle ASICs. It can also trigger on the particle tracks in the beam test. The board includes a CPLD which allows for the synchronization of the trigger signal to a common clock frequency, delaying and implementing coincidence with other XYT boards. An Alibava mother board is used to read out and to control each XYT/DUT board from a common trigger signal and a common clock signal. The Alibava board has a TDC on board to have a time stamp of each trigger. The data collected by each Alibava board is sent to a master card by means of a local data/address bus following a custom digital protocol. The master board distributes the trigger, clock and reset signals. It also merges the data streams from up to sixteen Alibava boards. The board has also a test channel for testing in a standard mode a XYT or DUT board. This board is implemented with a Xilinx development board and a custom patch board. The master board is connected with the DAQ software via 100M Ethernet. Track based alignment software has also been developed for the data obtained with the DAQ software.

  10. Development of a beam test telescope based on the Alibava readout system

    Energy Technology Data Exchange (ETDEWEB)

    Marco-Hernandez, R, E-mail: rmarco@ific.uv.es [Intituto de Fisica Corpuscular (CSIC-UV), Edificicio Institutos de Investigacion, PolIgono de La Coma, s/n. E-46980 Paterna (Valencia) (Spain)

    2011-01-15

    A telescope for a beam test have been developed as a result of a collaboration among the University of Liverpool, Centro Nacional de Microelectronica (CNM) of Barcelona and Instituto de Fisica Corpuscular (IFIC) of Valencia. This system is intended to carry out both analogue charge collection and spatial resolution measurements with different types of microstrip or pixel silicon detectors in a beam test environment. The telescope has four XY measurement as well as trigger planes (XYT board) and it can accommodate up to twelve devices under test (DUT board). The DUT board uses two Beetle ASICs for the readout of chilled silicon detectors. The board could operate in a self-triggering mode. The board features a temperature sensor and it can be mounted on a rotary stage. A peltier element is used for cooling the DUT. Each XYT board measures the track space points using two silicon strip detectors connected to two Beetle ASICs. It can also trigger on the particle tracks in the beam test. The board includes a CPLD which allows for the synchronization of the trigger signal to a common clock frequency, delaying and implementing coincidence with other XYT boards. An Alibava mother board is used to read out and to control each XYT/DUT board from a common trigger signal and a common clock signal. The Alibava board has a TDC on board to have a time stamp of each trigger. The data collected by each Alibava board is sent to a master card by means of a local data/address bus following a custom digital protocol. The master board distributes the trigger, clock and reset signals. It also merges the data streams from up to sixteen Alibava boards. The board has also a test channel for testing in a standard mode a XYT or DUT board. This board is implemented with a Xilinx development board and a custom patch board. The master board is connected with the DAQ software via 100M Ethernet. Track based alignment software has also been developed for the data obtained with the DAQ software.

  11. Opto-electronic DNA chip-based integrated card for clinical diagnostics.

    Science.gov (United States)

    Marchand, Gilles; Broyer, Patrick; Lanet, Véronique; Delattre, Cyril; Foucault, Frédéric; Menou, Lionel; Calvas, Bernard; Roller, Denis; Ginot, Frédéric; Campagnolo, Raymond; Mallard, Frédéric

    2008-02-01

    Clinical diagnostics is one of the most promising applications for microfluidic lab-on-a-chip or lab-on-card systems. DNA chips, which provide multiparametric data, are privileged tools for genomic analysis. However, automation of molecular biology protocol and use of these DNA chips in fully integrated systems remains a great challenge. Simplicity of chip and/or card/instrument interfaces is amongst the most critical issues to be addressed. Indeed, current detection systems for DNA chip reading are often complex, expensive, bulky and even limited in terms of sensitivity or accuracy. Furthermore, for liquid handling in the lab-on-cards, many devices use complex and bulky systems, either to directly manipulate fluids, or to ensure pneumatic or mechanical control of integrated valves. All these drawbacks prevent or limit the use of DNA-chip-based integrated systems, for point-of-care testing or as a routine diagnostics tool. We present here a DNA-chip-based protocol integration on a plastic card for clinical diagnostics applications including: (1) an opto-electronic DNA-chip, (2) fluid handling using electrically activated embedded pyrotechnic microvalves with closing/opening functions. We demonstrate both fluidic and electric packaging of the optoelectronic DNA chip without major alteration of its electronical and biological functionalities, and fluid control using novel electrically activable pyrotechnic microvalves. Finally, we suggest a complete design of a card dedicated to automation of a complex biological protocol with a fully electrical fluid handling and DNA chip reading.

  12. Strip detectors read-out system user's guide

    International Nuclear Information System (INIS)

    Claus, G.; Dulinski, W.; Lounis, A.

    1996-01-01

    The Strip Detector Read-out System consists of two VME modules: SDR-Flash and SDR-seq completed by a fast logic SDR-Trig stand alone card. The system is a self-consistent, cost effective and easy use solution for the read-out of analog multiplexed signals coming from some of the front-end electronics chips (Viking/VA chips family, Premus 128 etc...) currently used together with solid (silicon) or gas microstrip detectors. (author)

  13. Micromachined piezoresistive inclinometer with oscillator-based integrated interface circuit and temperature readout

    International Nuclear Information System (INIS)

    Dalola, Simone; Ferrari, Vittorio; Marioli, Daniele

    2012-01-01

    In this paper a dual-chip system for inclination measurement is presented. It consists of a MEMS (microelectromechanical system) piezoresistive accelerometer manufactured in silicon bulk micromachining and a CMOS (complementary metal oxide semiconductor) ASIC (application specific integrated circuit) interface designed for resistive-bridge sensors. The sensor is composed of a seismic mass symmetrically suspended by means of four flexure beams that integrate two piezoresistors each to detect the applied static acceleration, which is related to inclination with respect to the gravity vector. The ASIC interface is based on a relaxation oscillator where the frequency and the duty cycle of a rectangular-wave output signal are related to the fractional bridge imbalance and the overall bridge resistance of the sensor, respectively. The latter is a function of temperature; therefore the sensing element itself can be advantageously used to derive information for its own thermal compensation. DC current excitation of the sensor makes the configuration unaffected by wire resistances and parasitic capacitances. Therefore, a modular system results where the sensor can be placed remotely from the electronics without suffering accuracy degradation. The inclination measurement system has been characterized as a function of the applied inclination angle at different temperatures. At room temperature, the experimental sensitivity of the system results in about 148 Hz/g, which corresponds to an angular sensitivity around zero inclination angle of about 2.58 Hz deg −1 . This is in agreement with finite element method simulations. The measured output fluctuations at constant temperature determine an equivalent resolution of about 0.1° at midrange. In the temperature range of 25–65 °C the system sensitivity decreases by about 10%, which is less than the variation due to the microsensor alone thanks to thermal compensation provided by the current excitation of the bridge and the

  14. An Integrated Circuit for Chip-Based Analysis of Enzyme Kinetics and Metabolite Quantification.

    Science.gov (United States)

    Cheah, Boon Chong; Macdonald, Alasdair Iain; Martin, Christopher; Streklas, Angelos J; Campbell, Gordon; Al-Rawhani, Mohammed A; Nemeth, Balazs; Grant, James P; Barrett, Michael P; Cumming, David R S

    2016-06-01

    We have created a novel chip-based diagnostic tools based upon quantification of metabolites using enzymes specific for their chemical conversion. Using this device we show for the first time that a solid-state circuit can be used to measure enzyme kinetics and calculate the Michaelis-Menten constant. Substrate concentration dependency of enzyme reaction rates is central to this aim. Ion-sensitive field effect transistors (ISFET) are excellent transducers for biosensing applications that are reliant upon enzyme assays, especially since they can be fabricated using mainstream microelectronics technology to ensure low unit cost, mass-manufacture, scaling to make many sensors and straightforward miniaturisation for use in point-of-care devices. Here, we describe an integrated ISFET array comprising 2(16) sensors. The device was fabricated with a complementary metal oxide semiconductor (CMOS) process. Unlike traditional CMOS ISFET sensors that use the Si3N4 passivation of the foundry for ion detection, the device reported here was processed with a layer of Ta2O5 that increased the detection sensitivity to 45 mV/pH unit at the sensor readout. The drift was reduced to 0.8 mV/hour with a linear pH response between pH 2-12. A high-speed instrumentation system capable of acquiring nearly 500 fps was developed to stream out the data. The device was then used to measure glucose concentration through the activity of hexokinase in the range of 0.05 mM-231 mM, encompassing glucose's physiological range in blood. Localised and temporal enzyme kinetics of hexokinase was studied in detail. These results present a roadmap towards a viable personal metabolome machine.

  15. A Portable Smart-Phone Readout Device for the Detection of Mercury Contamination Based on an Aptamer-Assay Nanosensor

    Directory of Open Access Journals (Sweden)

    Wei Xiao

    2016-11-01

    Full Text Available The detection of environmental mercury (Hg contamination requires complex and expensive instruments and professional technicians. We present a simple, sensitive, and portable Hg2+ detection system based on a smartphone and colorimetric aptamer nanosensor. A smartphone equipped with a light meter app was used to detect, record, and process signals from a smartphone-based microwell reader (MR S-phone, which is composed of a simple light source and a miniaturized assay platform. The colorimetric readout of the aptamer nanosensor is based on a specific interaction between the selected aptamer and Hg2+, which leads to a color change in the reaction solution due to an aggregation of gold nanoparticles (AuNPs. The MR S-phone-based AuNPs-aptamer colorimetric sensor system could reliably detect Hg2+ in both tap water and Pearl River water samples and produced a linear colorimetric readout of Hg2+ concentration in the range of 1 ng/mL–32 ng/mL with a correlation of 0.991, and a limit of detection (LOD of 0.28 ng/mL for Hg2+. The detection could be quickly completed in only 20 min. Our novel mercury detection assay is simple, rapid, and sensitive, and it provides new strategies for the on-site detection of mercury contamination in any environment.

  16. A Portable Smart-Phone Readout Device for the Detection of Mercury Contamination Based on an Aptamer-Assay Nanosensor.

    Science.gov (United States)

    Xiao, Wei; Xiao, Meng; Fu, Qiangqiang; Yu, Shiting; Shen, Haicong; Bian, Hongfen; Tang, Yong

    2016-11-08

    The detection of environmental mercury (Hg) contamination requires complex and expensive instruments and professional technicians. We present a simple, sensitive, and portable Hg 2+ detection system based on a smartphone and colorimetric aptamer nanosensor. A smartphone equipped with a light meter app was used to detect, record, and process signals from a smartphone-based microwell reader (MR S-phone), which is composed of a simple light source and a miniaturized assay platform. The colorimetric readout of the aptamer nanosensor is based on a specific interaction between the selected aptamer and Hg 2+ , which leads to a color change in the reaction solution due to an aggregation of gold nanoparticles (AuNPs). The MR S-phone-based AuNPs-aptamer colorimetric sensor system could reliably detect Hg 2+ in both tap water and Pearl River water samples and produced a linear colorimetric readout of Hg 2+ concentration in the range of 1 ng/mL-32 ng/mL with a correlation of 0.991, and a limit of detection (LOD) of 0.28 ng/mL for Hg 2+ . The detection could be quickly completed in only 20 min. Our novel mercury detection assay is simple, rapid, and sensitive, and it provides new strategies for the on-site detection of mercury contamination in any environment.

  17. Energy Harvesting Chip and the Chip Based Power Supply Development for a Wireless Sensor Network

    Science.gov (United States)

    Lee, Dasheng

    2008-01-01

    In this study, an energy harvesting chip was developed to scavenge energy from artificial light to charge a wireless sensor node. The chip core is a miniature transformer with a nano-ferrofluid magnetic core. The chip embedded transformer can convert harvested energy from its solar cell to variable voltage output for driving multiple loads. This chip system yields a simple, small, and more importantly, a battery-less power supply solution. The sensor node is equipped with multiple sensors that can be enabled by the energy harvesting power supply to collect information about the human body comfort degree. Compared with lab instruments, the nodes with temperature, humidity and photosensors driven by harvested energy had variation coefficient measurement precision of less than 6% deviation under low environmental light of 240 lux. The thermal comfort was affected by the air speed. A flow sensor equipped on the sensor node was used to detect airflow speed. Due to its high power consumption, this sensor node provided 15% less accuracy than the instruments, but it still can meet the requirement of analysis for predicted mean votes (PMV) measurement. The energy harvesting wireless sensor network (WSN) was deployed in a 24-hour convenience store to detect thermal comfort degree from the air conditioning control. During one year operation, the sensor network powered by the energy harvesting chip retained normal functions to collect the PMV index of the store. According to the one month statistics of communication status, the packet loss rate (PLR) is 2.3%, which is as good as the presented results of those WSNs powered by battery. Referring to the electric power records, almost 54% energy can be saved by the feedback control of an energy harvesting sensor network. These results illustrate that, scavenging energy not only creates a reliable power source for electronic devices, such as wireless sensor nodes, but can also be an energy source by building an energy efficient

  18. Energy Harvesting Chip and the Chip Based Power Supply Development for a Wireless Sensor Network

    Directory of Open Access Journals (Sweden)

    Dasheng Lee

    2008-12-01

    Full Text Available In this study, an energy harvesting chip was developed to scavenge energy from artificial light to charge a wireless sensor node. The chip core is a miniature transformer with a nano-ferrofluid magnetic core. The chip embedded transformer can convert harvested energy from its solar cell to variable voltage output for driving multiple loads. This chip system yields a simple, small, and more importantly, a battery-less power supply solution. The sensor node is equipped with multiple sensors that can be enabled by the energy harvesting power supply to collect information about the human body comfort degree. Compared with lab instruments, the nodes with temperature, humidity and photosensors driven by harvested energy had variation coefficient measurement precision of less than 6% deviation under low environmental light of 240 lux. The thermal comfort was affected by the air speed. A flow sensor equipped on the sensor node was used to detect airflow speed. Due to its high power consumption, this sensor node provided 15% less accuracy than the instruments, but it still can meet the requirement of analysis for predicted mean votes (PMV measurement. The energy harvesting wireless sensor network (WSN was deployed in a 24-hour convenience store to detect thermal comfort degree from the air conditioning control. During one year operation, the sensor network powered by the energy harvesting chip retained normal functions to collect the PMV index of the store. According to the one month statistics of communication status, the packet loss rate (PLR is 2.3%, which is as good as the presented results of those WSNs powered by battery. Referring to the electric power records, almost 54% energy can be saved by the feedback control of an energy harvesting sensor network. These results illustrate that, scavenging energy not only creates a reliable power source for electronic devices, such as wireless sensor nodes, but can also be an energy source by building an

  19. Energy Harvesting Chip and the Chip Based Power Supply Development for a Wireless Sensor Network.

    Science.gov (United States)

    Lee, Dasheng

    2008-12-02

    In this study, an energy harvesting chip was developed to scavenge energy from artificial light to charge a wireless sensor node. The chip core is a miniature transformer with a nano-ferrofluid magnetic core. The chip embedded transformer can convert harvested energy from its solar cell to variable voltage output for driving multiple loads. This chip system yields a simple, small, and more importantly, a battery-less power supply solution. The sensor node is equipped with multiple sensors that can be enabled by the energy harvesting power supply to collect information about the human body comfort degree. Compared with lab instruments, the nodes with temperature, humidity and photosensors driven by harvested energy had variation coefficient measurement precision of less than 6% deviation under low environmental light of 240 lux. The thermal comfort was affected by the air speed. A flow sensor equipped on the sensor node was used to detect airflow speed. Due to its high power consumption, this sensor node provided 15% less accuracy than the instruments, but it still can meet the requirement of analysis for predicted mean votes (PMV) measurement. The energy harvesting wireless sensor network (WSN) was deployed in a 24-hour convenience store to detect thermal comfort degree from the air conditioning control. During one year operation, the sensor network powered by the energy harvesting chip retained normal functions to collect the PMV index of the store. According to the one month statistics of communication status, the packet loss rate (PLR) is 2.3%, which is as good as the presented results of those WSNs powered by battery. Referring to the electric power records, almost 54% energy can be saved by the feedback control of an energy harvesting sensor network. These results illustrate that, scavenging energy not only creates a reliable power source for electronic devices, such as wireless sensor nodes, but can also be an energy source by building an energy efficient

  20. Monitoring the CMS strip tracker readout system

    International Nuclear Information System (INIS)

    Mersi, S; Bainbridge, R; Cripps, N; Fulcher, J; Wingham, M; Baulieu, G; Bel, S; Delaere, C; Drouhin, F; Mirabito, L; Cole, J; Giassi, A; Gross, L; Hahn, K; Nikolic, M; Tkaczyk, S

    2008-01-01

    The CMS Silicon Strip Tracker at the LHC comprises a sensitive area of approximately 200 m 2 and 10 million readout channels. Its data acquisition system is based around a custom analogue front-end chip. Both the control and the readout of the front-end electronics are performed by off-detector VME boards in the counting room, which digitise the raw event data and perform zero-suppression and formatting. The data acquisition system uses the CMS online software framework to configure, control and monitor the hardware components and steer the data acquisition. The first data analysis is performed online within the official CMS reconstruction framework, which provides many services, such as distributed analysis, access to geometry and conditions data, and a Data Quality Monitoring tool based on the online physics reconstruction. The data acquisition monitoring of the Strip Tracker uses both the data acquisition and the reconstruction software frameworks in order to provide real-time feedback to shifters on the operational state of the detector, archiving for later analysis and possibly trigger automatic recovery actions in case of errors. Here we review the proposed architecture of the monitoring system and we describe its software components, which are already in place, the various monitoring streams available, and our experiences of operating and monitoring a large-scale system

  1. Building a large-area GEM-based readout chamber for the upgrade of the ALICE TPC

    CERN Document Server

    Gasik, Piotr

    2017-01-01

    A large Time Projection Chamber (TPC) is the main device for tracking and charged-particle identification in the ALICE experiment at the CERN LHC. After the second long shutdown in 2019-2020, the LHC will deliver Pb beams colliding at an interaction rate up to 50 kHz, which is about a factor of 100 above the present read-out rate of the TPC. To fully exploit the LHC potential the TPC will be upgraded based on the Gas Electron Multiplier (GEM) technology. A prototype of an ALICE TPC Outer Read-Out Chamber (OROC) was equipped with twelve large-size GEM foils as amplification stage to demonstrate the feasibility of replacing the current Multi Wire Proportional Chambers with the new technology. With a total area of $\\sim$0.76 m$^2$ it is the largest GEM-based detector built to date. The GEM OROC was installed within a test field cage and commissioned with radioactive sources.

  2. Building a large-area GEM-based readout chamber for the upgrade of the ALICE TPC

    Energy Technology Data Exchange (ETDEWEB)

    Gasik, P. [Physik Department E62, Technische Universität München, Garching (Germany); Excellence Cluster ‘Origin and Structure of the Universe’, Garching (Germany)

    2017-02-11

    A large Time Projection Chamber (TPC) is the main device for tracking and charged-particle identification in the ALICE experiment at the CERN LHC. After the second long shutdown in 2019–2020, the LHC will deliver Pb beams colliding at an interaction rate up to 50 kHz, which is about a factor of 100 above the present read-out rate of the TPC. To fully exploit the LHC potential the TPC will be upgraded based on the Gas Electron Multiplier (GEM) technology. A prototype of an ALICE TPC Outer Read-Out Chamber (OROC) was equipped with twelve large-size GEM foils as amplification stage to demonstrate the feasibility of replacing the current Multi Wire Proportional Chambers with the new technology. With a total area of ∼0.76 m{sup 2} it is the largest GEM-based detector built to date. The GEM OROC was installed within a test field cage and commissioned with radioactive sources.

  3. Building a large-area GEM-based readout chamber for the upgrade of the ALICE TPC

    International Nuclear Information System (INIS)

    Gasik, P.

    2017-01-01

    A large Time Projection Chamber (TPC) is the main device for tracking and charged-particle identification in the ALICE experiment at the CERN LHC. After the second long shutdown in 2019–2020, the LHC will deliver Pb beams colliding at an interaction rate up to 50 kHz, which is about a factor of 100 above the present read-out rate of the TPC. To fully exploit the LHC potential the TPC will be upgraded based on the Gas Electron Multiplier (GEM) technology. A prototype of an ALICE TPC Outer Read-Out Chamber (OROC) was equipped with twelve large-size GEM foils as amplification stage to demonstrate the feasibility of replacing the current Multi Wire Proportional Chambers with the new technology. With a total area of ∼0.76 m 2 it is the largest GEM-based detector built to date. The GEM OROC was installed within a test field cage and commissioned with radioactive sources.

  4. An FPGA bridge preserving traffing quality of service for on-chip network-based systems

    NARCIS (Netherlands)

    Nejad, A.B.; Escudero Martinez, M.; Goossens, K.G.W.

    2011-01-01

    FPGA prototyping of recent large Systems on Chip (SoCs) is very challenging due to the resource limitation of a single FPGA. Moreover, having external access to SoCs for verification and debug purposes is essential. In this paper, we suggest to partition a network-on-chip (NoC) based system into

  5. Chip-based microtrap arrays for cold polar molecules

    Science.gov (United States)

    Hou, Shunyong; Wei, Bin; Deng, Lianzhong; Yin, Jianping

    2017-12-01

    Compared to the atomic chip, which has been a powerful platform to perform an astonishing range of applications from rapid Bose-Einstein condensate (BEC) production to the atomic clock, the molecular chip is only in its infant stages. Recently a one-dimensional electric lattice was demonstrated to trap polar molecules on a chip. This excellent work opens up the way to building a molecular chip laboratory. Here we propose a two-dimensional (2D) electric lattice on a chip with concise and robust structure, which is formed by arrays of squared gold wires. Arrays of microtraps that originate in the microsize electrodes offer a steep gradient and thus allow for confining both light and heavy polar molecules. Theoretical analysis and numerical calculations are performed using two types of sample molecules, N D3 and SrF, to justify the possibility of our proposal. The height of the minima of the potential wells is about 10 μm above the surface of the chip and can be easily adjusted in a wide range by changing the voltages applied on the electrodes. These microtraps offer intriguing perspectives for investigating cold molecules in periodic potentials, such as quantum computing science, low-dimensional physics, and some other possible applications amenable to magnetic or optical lattice. The 2D adjustable electric lattice is expected to act as a building block for a future gas-phase molecular chip laboratory.

  6. A Novel Data Acquisition System Based on Fast Optical Links and Universal Readout Boards

    CERN Document Server

    Korcyl, Grzegorz

    2015-01-01

    Various scale measurement systems are composed of the sensors providing data through the data acquisition system to the archiving facility. The scale of such systems is determined by the number of sensors that require processing and can vary from few up to hundreds of thousands. The number and the type of sensors impose several requirements on the data acquisition system like readout frequency, measurement precision and online analysis algorithms. The most challenging application s are the large scale experiments in nuclear and particle physics . This thesis presents a concept , construction and tests of a modular and scalable, tree - structured architecture of a data acquisition system. The system is composed out of two logical elemen ts: endpoints which are the modules providing data and hubs that concentrate the data streams from the endpoints and provide connectivity with the rest of the system. Those two logica...

  7. Software for FASTBUS and Motorola 68K based readout controllers for data acquisition

    International Nuclear Information System (INIS)

    Pordes, R.; Bernett, M.; Dorries, T.; Haire, M.; Moore, C.; Oleynik, G.; Votava, M.

    1989-01-01

    Many High Energy Physics experiments at Fermilab are now including FASTBUS front-ends in their data acquisition systems. The requirements on controllers to readout and control these FASTBUS systems are increasing in complexity and speed. The Data Acquisition Software Group has designed general software for front end 68Κ processor boards housed in FASTBUS or VME to meet these needs. The first implementation has been developed for the General Purpose FASTBUS Master (GPM). This software is being ported to the FASTBUS Smart Crate Controller under development at Fermilab. The software is designed, using structured analysis tools and coding in C, to be easily portable in the future to new processor boards. As part of their extended support for FASTBUS, they have enhanced their software for the intelligent LeCroy 1821 FASTBUS interface and implemented the FASTBUS standard routines for the VAX/VMS operating system

  8. Flip-chip bonded optoelectronic integration based on ultrathin silicon (UTSi) CMOS

    Science.gov (United States)

    Hong, Sunkwang; Ho, Tawei; Zhang, Liping; Sawchuk, Alexander A.

    2003-06-01

    We describe the design and test of flip-chip bonded optoelectronic CMOS devices based on Peregrine Semiconductor's 0.5 micron Ultra-Thin Silicon on sapphire (UTSi) technology. The UTSi process eliminates the substrate leakage that typically results in crosstalk and reduces parasitic capacitance to the substrate, providing many benefits compared to bulk silicon CMOS. The low-loss synthetic sapphire substrate is optically transparent and has a coefficient of thermal expansion suitable for flip-chip bonding of vertical cavity surface emitting lasers (VCSELs) and detectors. We have designed two different UTSi CMOS chips. One contains a flip-chip bonded 1 x 4 photodiode array, a receiver array, a double edge triggered D-flip flop-based 2047-pattern pseudo random bit stream (PRBS) generator and a quadrature-phase LC-voltage controlled oscillator (VCO). The other chip contains a flip-chip bonded 1 x 4 VCSEL array, a driver array based on high-speed low-voltage differential signals (LVDS) and a full-balanced differential LC-VCO. Each VCSEL driver and receiver has individual input and bias voltage adjustments. Each UTSi chip is mounted on different printed circuit boards (PCBs) which have holes with about 1 mm radius for optical output and input paths through the sapphire substrate. We discuss preliminary testing of these chips.

  9. GaN-based integrated photonics chip with suspended LED and waveguide

    Science.gov (United States)

    Li, Xin; Wang, Yongjin; Hane, Kazuhiro; Shi, Zheng; Yan, Jiang

    2018-05-01

    We propose a GaN-based integrated photonics chip with suspended LED and straight waveguide with different geometric parameters. The integrated photonics chip is prepared by double-side process. Light transmission performance of the integrated chip verse current is quantitatively analyzed by capturing light transmitted to waveguide tip and BPM (beam propagation method) simulation. Reduction of the waveguide width from 8 μm to 4 μm results in an over linear reduction of the light output power while a doubling of the length from 250 μm to 500 μm only results in under linear decrease of the output power. Free-space data transmission with 80 Mbps random binary sequence of the integrated chip is capable of achieving high speed data transmission via visible light. This study provides a potential approach for GaN-based integrated photonics chip as micro light source and passive optical device in VLC (visible light communication).

  10. Chip cleaning and regeneration for electrochemical sensor arrays

    Energy Technology Data Exchange (ETDEWEB)

    Bhalla, Vijayender [Biochemistry Department ' G.Moruzzi' , University of Bologna, Via Irnerio 48, 40126 Bologna (Italy); Carrara, Sandro, E-mail: sandro.carrara@epfl.c [Biochemistry Department ' G.Moruzzi' , University of Bologna, Via Irnerio 48, 40126 Bologna (Italy); Stagni, Claudio [Department DEIS, University of Bologna, viale Risorgimento 2, 40136 Bologna (Italy); Samori, Bruno [Biochemistry Department ' G.Moruzzi' , University of Bologna, Via Irnerio 48, 40126 Bologna (Italy)

    2010-04-02

    Sensing systems based on electrochemical detection have generated great interest because electronic readout may replace conventional optical readout in microarray. Moreover, they offer the possibility to avoid labelling for target molecules. A typical electrochemical array consists of many sensing sites. An ideal micro-fabricated sensor-chip should have the same measured values for all the equivalent sensing sites (or spots). To achieve high reliability in electrochemical measurements, high quality in functionalization of the electrodes surface is essential. Molecular probes are often immobilized by using alkanethiols onto gold electrodes. Applying effective cleaning methods on the chip is a fundamental requirement for the formation of densely-packed and stable self-assembly monolayers. However, the available well-known techniques for chip cleaning may not be so reliable. Furthermore, it could be necessary to recycle the chip for reuse. Also in this case, an effective recycling technique is required to re-obtain well cleaned sensing surfaces on the chip. This paper presents experimental results on the efficacy and efficiency of the available techniques for initial cleaning and further recycling of micro-fabricated chips. Piranha, plasma, reductive and oxidative cleaning methods were applied and the obtained results were critically compared. Some interesting results were attained by using commonly considered cleaning methodologies. This study outlines oxidative electrochemical cleaning and recycling as the more efficient cleaning procedure for electrochemical based sensor arrays.

  11. Investigation of high resolution compact gamma camera module based on a continuous scintillation crystal using a novel charge division readout method

    International Nuclear Information System (INIS)

    Dai Qiusheng; Zhao Cuilan; Qi Yujin; Zhang Hualin

    2010-01-01

    The objective of this study is to investigate a high performance and lower cost compact gamma camera module for a multi-head small animal SPECT system. A compact camera module was developed using a thin Lutetium Oxyorthosilicate (LSO) scintillation crystal slice coupled to a Hamamatsu H8500 position sensitive photomultiplier tube (PSPMT). A two-stage charge division readout board based on a novel subtractive resistive readout with a truncated center-of-gravity (TCOG) positioning method was developed for the camera. The performance of the camera was evaluated using a flood 99m Tc source with a four-quadrant bar-mask phantom. The preliminary experimental results show that the image shrinkage problem associated with the conventional resistive readout can be effectively overcome by the novel subtractive resistive readout with an appropriate fraction subtraction factor. The response output area (ROA) of the camera shown in the flood image was improved up to 34%, and an intrinsic spatial resolution better than 2 mm of detector was achieved. In conclusion, the utilization of a continuous scintillation crystal and a flat-panel PSPMT equipped with a novel subtractive resistive readout is a feasible approach for developing a high performance and lower cost compact gamma camera. (authors)

  12. Chip based single cell analysis for nanotoxicity assessment.

    Science.gov (United States)

    Shah, Pratikkumar; Kaushik, Ajeet; Zhu, Xuena; Zhang, Chengxiao; Li, Chen-Zhong

    2014-05-07

    Nanomaterials, because of their tunable properties and performances, have been utilized extensively in everyday life related consumable products and technology. On exposure, beyond the physiological range, nanomaterials cause health risks via affecting the function of organisms, genomic systems, and even the central nervous system. Thus, new analytical approaches for nanotoxicity assessment to verify the feasibility of nanomaterials for future use are in demand. The conventional analytical techniques, such as spectrophotometric assay-based techniques, usually require a lengthy and time-consuming process and often produce false positives, and often cannot be implemented at a single cell level measurement for studying cell behavior without interference from its surrounding environment. Hence, there is a demand for a precise, accurate, sensitive assessment for toxicity using single cells. Recently, due to the advantages of automation of fluids and minimization of human errors, the integration of a cell-on-a-chip (CoC) with a microfluidic system is in practice for nanotoxicity assessments. This review explains nanotoxicity and its assessment approaches with advantages/limitations and new approaches to overcome the confines of traditional techniques. Recent advances in nanotoxicity assessment using a CoC integrated with a microfluidic system are also discussed in this review, which may be of use for nanotoxicity assessment and diagnostics.

  13. A self contained Linux based data acquisition system for 2D detectors with delay line readout

    International Nuclear Information System (INIS)

    Beltran, D.; Toledo, J.; Klora, A.C.; Ramos-Lerate, I.; Martinez, J.C.

    2007-01-01

    This article describes a fast and self-contained data acquisition system for 2D gas-filled detectors with delay line readout. It allows the realization of time resolved experiments in the millisecond scale. The acquisition system comprises of an industrial PC running Linux, a commercial time-to-digital converter and an in-house developed histogramming PCI card. The PC provides a mass storage for images and a graphical user interface for system monitoring and control. The histogramming card builds images with a maximum count rate of 5 MHz limited by the time-to-digital converter. Histograms are transferred to the PC at 85 MB/s. This card also includes a time frame generator, a calibration channel unit and eight digital outputs for experiment control. The control software was developed for easy integration into a beamline, including scans. The system is fully operational at the Spanish beamline BM16 at the ESRF in France, the neutron beamlines Adam and Eva at the ILL in France, the Max Plank Institute in Stuttgart in Germany, the University of Copenhagen in Denmark and at the future ALBA synchrotron in Spain. Some representative collected images from synchrotron and neutron beamlines are presented

  14. Flip chip assembly of thinned chips for hybrid pixel detector applications

    International Nuclear Information System (INIS)

    Fritzsch, T; Zoschke, K; Rothermund, M; Oppermann, H; Woehrmann, M; Ehrmann, O; Lang, K D; Huegging, F

    2014-01-01

    There is a steady trend to ultra-thin microelectronic devices. Especially for future particle detector systems a reduced readout chip thickness is required to limit the loss of tracking precision due to scattering. The reduction of silicon thickness is performed at wafer level in a two-step thinning process. To minimize the risk of wafer breakage the thinned wafer needs to be handled by a carrier during the whole process chain of wafer bumping. Another key process is the flip chip assembly of thinned readout chips onto thin sensor tiles. Besides the prevention of silicon breakage the minimization of chip warpage is one additional task for a high yield and reliable flip chip process. A new technology using glass carrier wafer will be described in detail. The main advantage of this technology is the combination of a carrier support during wafer processing and the chip support during flip chip assembly. For that a glass wafer is glue-bonded onto the backside of the thinned readout chip wafer. After the bump deposition process the glass-readout chip stack is diced in one step. Finally the glass carrier chip is released by laser illumination after flip chip assembly of the readout chip onto sensor tile. The results of the flip chip assembly process development for the ATLAS IBL upgrade are described more in detail. The new ATLAS FEI4B chip with a size of 20 × 19 mm 2 is flip chip bonded with a thickness of only 150 μm, but the capability of this technology has been demonstrated on hybrid modules with a reduced readout chip thickness of down to 50 μm which is a major step for ultra-thin electronic systems

  15. High-speed readout of high-Z pixel detectors with the LAMBDA detector

    International Nuclear Information System (INIS)

    Pennicard, D.; Smoljanin, S.; Sheviakov, I.; Xia, Q.; Rothkirch, A.; Yu, Y.; Struth, B.; Hirsemann, H.; Graafsma, H.

    2014-01-01

    High-frame-rate X-ray pixel detectors make it possible to perform time-resolved experiments at synchrotron beamlines, and to make better use of these sources by shortening experiment times. LAMBDA is a photon-counting hybrid pixel detector based on the Medipix3 chip, designed to combine a small pixel size of 55 μm, a large tileable module design, high speed, and compatibility with ''high-Z'' sensors for hard X-ray detection. This technical paper focuses on LAMBDA's high-speed-readout functionality, which allows a frame rate of 2000 frames per second with no deadtime between successive images. This takes advantage of the Medipix3 chip's ''continuous read-write'' function and highly parallelised readout. The readout electronics serialise this data and send it back to a server PC over two 10 Gigabit Ethernet links. The server PC controls the detector and receives, processes and stores the data using software designed for the Tango control system. As a demonstration of high-speed readout of a high-Z sensor, a GaAs LAMBDA detector was used to make a high-speed X-ray video of a computer fan

  16. Integrated potentiometric detector for use in chip-based flow cells

    Science.gov (United States)

    Tantra; Manz

    2000-07-01

    A new kind of potentiometric chip sensor for ion-selective electrodes (ISE) based on a solvent polymeric membrane is described. The chip sensor is designed to trap the organic cocktail inside the chip and to permit sample solution to flow past the membrane. The design allows the sensor to overcome technical problems of ruggedness and would therefore be ideal for industrial processes. The sensor performance for a Ba2+-ISE membrane based on a Vogtle ionophore showed electrochemical behavior similar to that observed in conventional electrodes and microelectrode arrangements.

  17. Application of large area SiPMs for the readout of a plastic scintillator based timing detector

    Science.gov (United States)

    Betancourt, C.; Blondel, A.; Brundler, R.; Dätwyler, A.; Favre, Y.; Gascon, D.; Gomez, S.; Korzenev, A.; Mermod, P.; Noah, E.; Serra, N.; Sgalaberna, D.; Storaci, B.

    2017-11-01

    In this study an array of eight 6 mm × 6 mm area SiPMs was coupled to the end of a long plastic scintillator counter which was exposed to a 2.5 GeV/c muon beam at the CERN PS. Timing characteristics of bars with dimensions 150 cm × 6 cm × 1 cm and 120 cm × 11 cm × 2.5 cm have been studied. An 8-channel SiPM anode readout ASIC (MUSIC R1) based on a novel low input impedance current conveyor has been used to read out and amplify SiPMs independently and sum the signals at the end. Prospects for applications in large-scale particle physics detectors with timing resolution below 100 ps are provided in light of the results.

  18. arXiv Application of large area SiPMs for the readout of a plastic scintillator based timing detector

    CERN Document Server

    Betancourt, C.; Brundler, R.; Dätwyler, A.; Favre, Y.; Gascon, D.; Gomez, S.; Korzenev, Alexander; Mermod, P.; Noah, E.; Serra, N.; Sgalaberna, D.; Storaci, B.

    2017-11-27

    In this study an array of eight 6 mm × 6 mm area SiPMs was coupled to the end of a long plastic scintillator counter which was exposed to a 2.5 GeV/c muon beam at the CERN PS. Timing characteristics of bars with dimensions 150 cm × 6 cm × 1 cm and 120 cm × 11 cm × 2.5 cm have been studied. An 8-channel SiPM anode readout ASIC (MUSIC R1) based on a novel low input impedance current conveyor has been used to read out and amplify SiPMs independently and sum the signals at the end. Prospects for applications in large-scale particle physics detectors with timing resolution below 100 ps are provided in light of the results.

  19. Micromotor-based lab-on-chip immunoassays

    Science.gov (United States)

    García, Miguel; Orozco, Jahir; Guix, Maria; Gao, Wei; Sattayasamitsathit, Sirilak; Escarpa, Alberto; Merkoçi, Arben; Wang, Joseph

    2013-01-01

    Here we describe the first example of using self-propelled antibody-functionalized synthetic catalytic microengines for capturing and transporting target proteins between the different reservoirs of a lab-on-a-chip (LOC) device. A new catalytic polymer/Ni/Pt microtube engine, containing carboxy moieties on its mixed poly(3,4-ethylenedioxythiophene) (PEDOT)/COOH-PEDOT polymeric outermost layer, is further functionalized with the antibody receptor to selectively recognize and capture the target protein. The new motor-based microchip immunoassay operations are carried out without any bulk fluid flow, replacing the common washing steps in antibody-based protein bioassays with the active transport of the captured protein throughout the different reservoirs, where each step of the immunoassay takes place. A first microchip format involving an `on-the-fly' double-antibody sandwich assay (DASA) is used for demonstrating the selective capture of the target protein, in the presence of excess of non-target proteins. A secondary antibody tagged with a polymeric-sphere tracer allows the direct visualization of the binding events. In a second approach the immuno-nanomotor captures and transports the microsphere-tagged antigen through a microchannel network. An anti-protein-A modified microengine is finally used to demonstrate the selective capture, transport and convenient label-free optical detection of a Staphylococcus aureus target bacteria (containing proteinA in its cell wall) in the presence of a large excess of non-target (Saccharomyces cerevisiae) cells. The resulting nanomotor-based microchip immunoassay offers considerable potential for diverse applications in clinical diagnostics, environmental and security monitoring fields.Here we describe the first example of using self-propelled antibody-functionalized synthetic catalytic microengines for capturing and transporting target proteins between the different reservoirs of a lab-on-a-chip (LOC) device. A new catalytic

  20. A flip chip process based on electroplated solder bumps

    Science.gov (United States)

    Salonen, J.; Salmi, J.

    1994-01-01

    Compared to wire bonding and TAB, flip chip technology using solder joints offers the highest pin count and packaging density and superior electrical performance. The chips are mounted upside down on the substrate, which can be made of silicon, ceramic, glass or - in some cases - even PCB. The extra processing steps required for chips are the deposition of a suitable thin film metal layer(s) on the standard Al pad and the formation of bumps. Also, the development of new fine line substrate technologies is required to utilize the full potential of the technology. In our bumping process, bump deposition is done by electroplating, which was chosen for its simplicity and economy. Sputter deposited molybdenum and copper are used as thin film layers between the aluminum pads and the solder bumps. A reason for this choice is that the metals can be selectively etched after bumping using the bumps as a mask, thus circumventing the need for a separate mask for etching the thin film metals. The bumps are electroplated from a binary Pb-Sn bath using a thick liquid photoresist. An extensively modified commercial flip chip bonder is used for alignment and bonding. Heat assisted tack bonding is used to attach the chips to the substrate, and final reflow joining is done without flux in a vacuum furnace.

  1. Hybrid Macro-Micro Fluidics System for a Chip-Based Biosensor

    National Research Council Canada - National Science Library

    Tamanaha, C. R; Whitman, L. J; Colton, R.J

    2002-01-01

    We describe the engineering of a hybrid fluidics platform for a chip-based biosensor system that combines high-performance microfluidics components with powerful, yet compact, millimeter-scale pump and valve actuators...

  2. Simultaneous detection of lactate and glucose by integrated printed circuit board based array sensing chip

    Energy Technology Data Exchange (ETDEWEB)

    Li, Xuelian [Institute for Clean Energy and Advanced Materials, Southwest University, Chongqing 400715 (China); School of Chemistry and Chemical Engineering, Southwest University, Chongqing 400715 (China); Zang, Jianfeng [Department of Mechanical Engineering and Materials Science, Duke University, Durham, NC 27708 (United States); Liu, Yingshuai; Lu, Zhisong [Institute for Clean Energy and Advanced Materials, Southwest University, Chongqing 400715 (China); Li, Qing, E-mail: Qli@swu.edu.cn [School of Chemistry and Chemical Engineering, Southwest University, Chongqing 400715 (China); Li, Chang Ming, E-mail: ecmli@swu.edu.cn [Institute for Clean Energy and Advanced Materials, Southwest University, Chongqing 400715 (China)

    2013-04-10

    Highlights: ► An integrated printed circuit board (PCB) based array sensing chip was developed. ► Simultaneous detection of lactate and glucose in serum has been demonstrated. ► The array electronic biochip has high signal to noise ratio and high sensitivity. ► Additional electrodes were designed on the chip to correct interferences. -- Abstract: An integrated printed circuit board (PCB) based array sensing chip was developed to simultaneously detect lactate and glucose in mouse serum. The novelty of the chip relies on a concept demonstration of inexpensive high-throughput electronic biochip, a chip design for high signal to noise ratio and high sensitivity by construction of positively charged chitosan/redox polymer Polyvinylimidazole-Os (PVI-Os)/carbon nanotube (CNT) composite sensing platform, in which the positively charged chitosan/PVI-Os is mediator and electrostatically immobilizes the negatively charged enzyme, while CNTs function as an essential cross-linker to network PVI-Os and chitosan due to its negative charged nature. Additional electrodes on the chip with the same sensing layer but without enzymes were prepared to correct the interferences for high specificity. Low detection limits of 0.6 μM and 5 μM were achieved for lactate and glucose, respectively. This work could be extended to inexpensive array sensing chips with high sensitivity, good specificity and high reproducibility for various sensor applications.

  3. The ALICE Time of Flight Readout System AFRO

    CERN Document Server

    Kluge, A

    1999-01-01

    The ALICE Time of Flight Detector system comprises more than 100.000 channels and covers an area of more than 100 m2. The timing resolution should be better than 150 ps. This combination of requirements poses a major challenge to the readout system. All detector timing measurements are referenced to a unique start signal t0. This signal is generated at the time an event occurs. Timing measurements are performed using a multichannel TDC chip which requires a 40 MHz reference clock signal. The general concept of the readout system is based on a modular architecture. Detector cells are combined to modules of 1024 channels. Each of these modules can be read out and calibrated independently from each other. By distributing a reference signal, a timing relationship between the modules is established. This reference signal can either be the start signal t0 or the TDC-reference clock. The readout architecture is divided into three steps; the TDC controller, the module controller, and the time of flight controller. Th...

  4. Research of high speed data readout and pre-processing system based on xTCA for silicon pixel detector

    International Nuclear Information System (INIS)

    Zhao Jingzhou; Lin Haichuan; Guo Fang; Liu Zhen'an; Xu Hao; Gong Wenxuan; Liu Zhao

    2012-01-01

    As the development of the detector, Silicon pixel detectors have been widely used in high energy physics experiments. It needs data processing system with high speed, high bandwidth and high availability to read data from silicon pixel detectors which generate more large data. The same question occurs on Belle II Pixel Detector which is a new style silicon pixel detector used in SuperKEKB accelerator with high luminance. The paper describes the research of High speed data readout and pre-processing system based on xTCA for silicon pixel detector. The system consists of High Performance Computer Node (HPCN) based on xTCA and ATCA frame. The HPCN consists of 4XFPs based on AMC, 1 AMC Carrier ATCA Board (ACAB) and 1 Rear Transmission Module. It characterized by 5 high performance FPGAs, 16 fiber links based on RocketIO, 5 Gbit Ethernet ports and DDR2 with capacity up to 18GB. In a ATCA frame, 14 HPCNs make up a system using the high speed backplane to achieve the function of data pre-processing and trigger. This system will be used on the trigger and data acquisition system of Belle II Pixel detector. (authors)

  5. A custom readout electronics for the BESIII CGEM detector

    Science.gov (United States)

    Da Rocha Rolo, M.; Alexeev, M.; Amoroso, A.; Baldini Ferroli, R.; Bertani, M.; Bettoni, D.; Bianchi, F.; Bugalho, R.; Calcaterra, A.; Canale, N.; Capodiferro, M.; Carassiti, V.; Cerioni, S.; Chai, J. Y.; Chiozzi, S.; Cibinetto, G.; Cossio, F.; Cotta Ramusino, A.; De Mori, F.; Destefanis, M.; Di Francesco, A.; Dong, J.; Evangelisti, F.; Farinelli, R.; Fava, L.; Felici, G.; Fioravanti, E.; Garzia, I.; Gatta, M.; Greco, M.; Lavezzi, L.; Leng, C. Y.; Li, H.; Maggiora, M.; Malaguti, R.; Marcello, S.; Marciniewski, P.; Melchiorri, M.; Mezzadri, G.; Mignone, M.; Morello, G.; Pacetti, S.; Patteri, P.; Pellegrino, J.; Pelosi, A.; Rivetti, A.; Savrié, M.; Scodeggio, M.; Soldani, E.; Sosio, S.; Spataro, S.; Tskhadadze, E.; Varela, J.; Verma, S.; Wheadon, R.; Yan, L.

    2017-07-01

    For the upgrade of the inner tracker of the BESIII spectrometer, planned for 2018, a lightweight tracker based on an innovative Cylindrical Gas Electron Multiplier (CGEM) detector is now under development. The analogue readout of the CGEM enables the use of a charge centroid algorithm to improve the spatial resolution to better than 130 μm while loosening the pitch strip to 650 μm, which allows to reduce the total number of channels to about 10 000. The channels are readout by 160 dedicated integrated 64-channel front-end ASICs, providing a time and charge measurement and featuring a fully-digital output. The energy measurement is extracted either from the time-over-threshold (ToT) or the 10-bit digitisation of the peak amplitude of the signal. The time of the event is generated by quad-buffered low-power TDCs, allowing for rates in excess of 60 kHz per channel. The TDCs are based on analogue interpolation techniques and produce a time stamp (or two, if working in ToT mode) of the event with a time resolution better than 50 ps. The front-end noise, based on a CSA and a two-stage complex conjugated pole shapers, dominate the channel intrinsic time jitter, which is less than 5 ns r.m.s. The time information of the hit can be used to reconstruct the track path, operating the detector as a small TPC and hence improving the position resolution when the distribution of the cloud, due to large incident angle or magnetic field, is very broad. Event data is collected by an off-detector motherboard, where each GEM-ROC readout card handles 4 ASIC carrier FEBs (512 channels). Configuration upload and data readout between the off-detector electronics and the VME-based data collector cards are managed by bi-directional fibre optical links. This paper covers the design of a custom front-end electronics for the readout of the new inner tracker of the BESIII experiment, addressing the relevant design aspects of the detector electronics and the front-end ASIC for the CGEM readout

  6. A custom readout electronics for the BESIII CGEM detector

    International Nuclear Information System (INIS)

    Rolo, M. Da Rocha; Alexeev, M.; Amoroso, A.; Bianchi, F.; Cossio, F.; Mori, F. De; Destefanis, M.; Ferroli, R. Baldini; Chai, J.Y.; Bertani, M.; Calcaterra, A.; Capodiferro, M.; Cerioni, S.; Bettoni, D.; Canale, N.; Carassiti, V.; Chiozzi, S.; Cibinetto, G.; Ramusino, A. Cotta; Bugalho, R.

    2017-01-01

    For the upgrade of the inner tracker of the BESIII spectrometer, planned for 2018, a lightweight tracker based on an innovative Cylindrical Gas Electron Multiplier (CGEM) detector is now under development. The analogue readout of the CGEM enables the use of a charge centroid algorithm to improve the spatial resolution to better than 130 μm while loosening the pitch strip to 650 μm, which allows to reduce the total number of channels to about 10 000. The channels are readout by 160 dedicated integrated 64-channel front-end ASICs, providing a time and charge measurement and featuring a fully-digital output. The energy measurement is extracted either from the time-over-threshold (ToT) or the 10-bit digitisation of the peak amplitude of the signal. The time of the event is generated by quad-buffered low-power TDCs, allowing for rates in excess of 60 kHz per channel. The TDCs are based on analogue interpolation techniques and produce a time stamp (or two, if working in ToT mode) of the event with a time resolution better than 50 ps. The front-end noise, based on a CSA and a two-stage complex conjugated pole shapers, dominate the channel intrinsic time jitter, which is less than 5 ns r.m.s. The time information of the hit can be used to reconstruct the track path, operating the detector as a small TPC and hence improving the position resolution when the distribution of the cloud, due to large incident angle or magnetic field, is very broad. Event data is collected by an off-detector motherboard, where each GEM-ROC readout card handles 4 ASIC carrier FEBs (512 channels). Configuration upload and data readout between the off-detector electronics and the VME-based data collector cards are managed by bi-directional fibre optical links. This paper covers the design of a custom front-end electronics for the readout of the new inner tracker of the BESIII experiment, addressing the relevant design aspects of the detector electronics and the front-end ASIC for the CGEM

  7. Study of cutting speed on surface roughness and chip formation when machining nickel-based alloy

    International Nuclear Information System (INIS)

    Khidhir, Basim A.; Mohamed, Bashir

    2010-01-01

    Nickel- based alloy is difficult-to-machine because of its low thermal diffusive property and high strength at higher temperature. The machinability of nickel- based Hastelloy C-276 in turning operations has been carried out using different types of inserts under dry conditions on a computer numerical control (CNC) turning machine at different stages of cutting speed. The effects of cutting speed on surface roughness have been investigated. This study explores the types of wear caused by the effect of cutting speed on coated and uncoated carbide inserts. In addition, the effect of burr formation is investigated. The chip burr is found to have different shapes at lower speeds. Triangles and squares have been noticed for both coated and uncoated tips as well. The conclusion from this study is that the transition from thick continuous chip to wider discontinuous chip is caused by different types of inserts. The chip burr has a significant effect on tool damage starting in the line of depth-of-cut. For the coated insert tips, the burr disappears when the speed increases to above 150 m/min with the improvement of surface roughness; increasing the speed above the same limit for uncoated insert tips increases the chip burr size. The results of this study showed that the surface finish of nickel-based alloy is highly affected by the insert type with respect to cutting speed changes and its effect on chip burr formation and tool failure

  8. Performance of 20:1 multiplexer for large area charge readouts in directional dark matter TPC detectors

    Science.gov (United States)

    Ezeribe, A. C.; Robinson, M.; Robinson, N.; Scarff, A.; Spooner, N. J. C.; Yuriev, L.

    2018-02-01

    More target mass is required in current TPC based directional dark matter detectors for improved detector sensitivity. This can be achieved by scaling up the detector volumes, but this results in the need for more analogue signal channels. A possible solution to reducing the overall cost of the charge readout electronics is to multiplex the signal readout channels. Here, we present a multiplexer system in expanded mode based on LMH6574 chips produced by Texas Instruments, originally designed for video processing. The setup has a capability of reducing the number of readouts in such TPC detectors by a factor of 20. Results indicate that the important charge distribution asymmetry along an ionization track is retained after multiplexed signals are demultiplexed.

  9. Study of preamplifier, shaper and peak detector in readout ASIC for particle detector

    International Nuclear Information System (INIS)

    Wang Ke; Zhang Shengjun; Fan Lei; Li Xian

    2014-01-01

    Recently, kinds of particle detectors have used Application Specific Integrated Circuits (ASIC) in their electronics readout system and ASICs have been designed in China now. This project designed a multi-channel readout ASIC for general detector. The chip has Preamplifier, Shaper and Peak Detector embedded for easy readout. For each channel, signal which is preprocessed by a low-noise preamplifier is sent to the shaper to form a quasi-Gaussian pulse and keep its peak for readout. This chip and modules of individual Preamplifier, Shaper and Peak Detector have been manufactured, results will be reported in time. (authors)

  10. [A novel biologic electricity signal measurement based on neuron chip].

    Science.gov (United States)

    Lei, Yinsheng; Wang, Mingshi; Sun, Tongjing; Zhu, Qiang; Qin, Ran

    2006-06-01

    Neuron chip is a multiprocessor with three pipeline CPU; its communication protocol and control processor are integrated in effect to carry out the function of communication, control, attemper, I/O, etc. A novel biologic electronic signal measurement network system is composed of intelligent measurement nodes with neuron chip at the core. In this study, the electronic signals such as ECG, EEG, EMG and BOS can be synthetically measured by those intelligent nodes, and some valuable diagnostic messages are found. Wavelet transform is employed in this system to analyze various biologic electronic signals due to its strong time-frequency ability of decomposing signal local character. Better effect is gained. This paper introduces the hardware structure of network and intelligent measurement node, the measurement theory and the signal figure of data acquisition and processing.

  11. Firmware Development and Integration for ALICE TPC and PHOS Front-end Electronics A Trigger Based Readout and Control System operating in a Radiation Environment

    CERN Document Server

    AUTHOR|(CDS)2068589; Rohrich, Dieter

    2008-01-01

    The readout electronics in PHOS and TPC - two of the major detectors of the ALICE experiment at the LHC - consist of a set of Front End Cards (FECs) that digitize, process and buffer the data from the detector sensors. The FECs are connected to a Readout Control Unit (RCU) via two sets of custom made PCB backplanes. For PHOS, 28 FECs are connected to one RCU, while for TPC the number is varying from 18 to 25 FECs depending on location. The RCU is in charge of the data readout, including reception and distribution of triggers and in moving the data from the FECs to the Data Acquisition System. In addition it does low level control tasks. The RCU consists of an RCU Motherboard that hosts a Detector Control System (DCS) board and a Source Interface Unit. The DCS board is an embedded computer running Linux that controls the readout electronics. All the mentioned devices are implemented in commercial grade SRAM based Field Programmable Gate Arrays (FPGAs). Even if these devices are not very radiation tolerant, the...

  12. Titanium based flat heat pipes for computer chip cooling

    Science.gov (United States)

    Soni, Gaurav; Ding, Changsong; Sigurdson, Marin; Bozorgi, Payam; Piorek, Brian; MacDonald, Noel; Meinhart, Carl

    2008-11-01

    We are developing a highly conductive flat heat pipe (called Thermal Ground Plane or TGP) for cooling computer chips. Conventional heat pipes have circular cross sections and thus can't make good contact with chip surface. The flatness of our TGP will enable conformal contact with the chip surface and thus enhance cooling efficiency. Another limiting factor in conventional heat pipes is the capillary flow of the working fluid through a wick structure. In order to overcome this limitation we have created a highly porous wick structure on a flat titanium substrate by using micro fabrication technology. We first etch titanium to create very tall micro pillars with a diameter of 5 μm, a height of 40 μm and a pitch of 10 μm. We then grow a very fine nano structured titania (NST) hairs on all surfaces of the pillars by oxidation in H202. In this way we achieve a wick structure which utilizes multiple length scales to yield high performance wicking of water. It's capable of wicking water at an average velocity of 1 cm/s over a distance of several cm. A titanium cavity is laser-welded onto the wicking substrate and a small quantity of water is hermetically sealed inside the cavity to achieve a TGP. The thermal conductivity of our preliminary TGP was measured to be 350 W/m-K, but has the potential to be several orders of magnitude higher.

  13. Development and characterization of high-resolution neutron pixel detectors based on Timepix read-out chips

    Czech Academy of Sciences Publication Activity Database

    Krejčí, F.; Žemlička, J.; Jakoubek, J.; Dudák, J.; Vavřík, D.; Koster, U.; Atkins, D.; Kaestner, A.; Šoltéš, J.; Viererbl, L.; Vacík, Jiří; Tomandl, Ivo

    2016-01-01

    Roč. 11, DEC (2016), č. článku C12026. ISSN 1748-0221 R&D Projects: GA TA ČR TA01010237 Institutional support: RVO:61389005 Keywords : neutron detector s * Pixalated detector s and associated VLSI electronics Subject RIV: BG - Nuclear, Atomic and Molecular Physics, Colliders OBOR OECD: Nuclear physics Impact factor: 1.220, year: 2016

  14. Low-Cost Energy-Efficient 3-D Nano-Spikes-Based Electric Cell Lysis Chips

    KAUST Repository

    Riaz, Kashif

    2017-05-04

    Electric cell lysis (ECL) is a promising technique to be integrated with portable lab-on-a-chip without lysing agent due to its simplicity and fast processing. ECL is usually limited by the requirements of high power/voltage and costly fabrication. In this paper, we present low-cost 3-D nano-spikes-based ECL (NSP-ECL) chips for efficient cell lysis at low power consumption. Highly ordered High-Aspect-Ratio (HAR). NSP arrays with controllable dimensions were fabricated on commercial aluminum foils through scalable and electrochemical anodization and etching. The optimized multiple pulse protocols with minimized undesirable electrochemical reactions (gas and bubble generation), common on micro parallel-plate ECL chips. Due to the scalability of fabrication process, 3-D NSPs were fabricated on small chips as well as on 4-in wafers. Phase diagram was constructed by defining critical electric field to induce cell lysis and for cell lysis saturation Esat to define non-ECL and ECL regions for different pulse parameters. NSP-ECL chips have achieved excellent cell lysis efficiencies ηlysis (ca 100%) at low applied voltages (2 V), 2~3 orders of magnitude lower than that of conventional systems. The energy consumption of NSP-ECL chips was 0.5-2 mJ/mL, 3~9 orders of magnitude lower as compared with the other methods (5J/mL-540kJ/mL). [2016-0305

  15. Design of the ANTARES LCM-DAQ board test bench using a FPGA-based system-on-chip approach

    Energy Technology Data Exchange (ETDEWEB)

    Anvar, S. [CEA Saclay, DAPNIA/SEDI, 91191 Gif-sur-Yvette Cedex (France); Kestener, P. [CEA Saclay, DAPNIA/SEDI, 91191 Gif-sur-Yvette Cedex (France)]. E-mail: pierre.kestener@cea.fr; Le Provost, H. [CEA Saclay, DAPNIA/SEDI, 91191 Gif-sur-Yvette Cedex (France)

    2006-11-15

    The System-on-Chip (SoC) approach consists in using state-of-the-art FPGA devices with embedded RISC processor cores, high-speed differential LVDS links and ready-to-use multi-gigabit transceivers allowing development of compact systems with substantial number of IO channels. Required performances are obtained through a subtle separation of tasks between closely cooperating programmable hardware logic and user-friendly software environment. We report about our experience in using the SoC approach for designing the production test bench of the off-shore readout system for the ANTARES neutrino experiment.

  16. A low cost, printed microwave based level sensor with integrated oscillator readout circuitry

    KAUST Repository

    Karimi, Muhammad Akram; Arsalan, Muhammad; Shamim, Atif

    2017-01-01

    This paper presents an extremely low cost, tube conformable, printed T-resonator based microwave level sensor, whose resonance frequency shifts by changing the level of fluids inside the tube. Printed T-resonator forms the frequency selective

  17. Optical CT scanning of PRESAGETM polyurethane samples with a CCD-based readout system

    International Nuclear Information System (INIS)

    Doran, S J; Krstajic, N; Adamovics, J; Jenneson, P M

    2004-01-01

    This article demonstrates the resolution capabilities of the CCD scanner under ideal circumstances and describes the first CCD-based optical CT experiments on a new class of dosimeter, known as PRESAGE TM (Heuris Pharma, Skillman, NJ)

  18. Design and realisation of integrated circuits for the readout of pixel sensors in high-energy physics and biomedical imaging

    Energy Technology Data Exchange (ETDEWEB)

    Peric, I.

    2004-08-01

    Radiation tolerant pixel-readout chip for the ATLAS pixel detector has been designed, implemented in a deep-submicron CMOS technology and successfully tested. The chip contains readout-channels with complex analog and digital circuits. Chip for steering of the DEPFET active-pixel matrix has been implemented in a high-voltage CMOS technology. The chip contains channels which generate fast sequences of high-voltage signals. Detector containing this chip has been successfully tested. Pixel-readout test chip for an X-ray imaging pixel sensor has been designed, implemented in a CMOS technology and tested. Pixel-readout channels are able to simultaneously count the signals generated by passage of individual photons and to sum the total charge generated during exposure time. (orig.)

  19. Development of a chip-based ingroove microplasma source: Design, characterization, and diagnostics

    Energy Technology Data Exchange (ETDEWEB)

    Li, Xuemei; Meng, Fanying; Yuan, Xin; Yan, Yanyue; Zhao, Zhongjun; Duan, Yixiang, E-mail: yduan@scu.edu.cn [Research Center of Analytical Instrumentation, College of Chemistry and College of Life Science Sichuan University, Chengdu (China); Tang, Jie [State Key Laboratory of Transient Optics and Photonics, Xi' an Institute of Optics and Precision Mechanics of CAS, Xi' an (China)

    2014-03-10

    A chip-based ingroove microplasma source was designed for molecular emission spectrometry by using a space-confined direct current duct in air. The voltage-current characteristics of different size generators, emission spectroscopy of argon were discussed, respectively. It is found that the emission intensity of excited Ar and N{sub 2} approaches its maximum near the cathode, while OH and O peaks most likely appear close to the anode. The electron density, electronic excitation temperature, rotational temperature, and vibrational temperature of the argon plasma were also calculated. More importantly, the chip-based ingroove microplasma shows much better stability compared with its counterparts.

  20. Test-Access Planning and Test Scheduling for Embedded Core-Based System Chips

    OpenAIRE

    Goel, Sandeep Kumar

    2005-01-01

    Advances in the semiconductor process technology enable the creation of a complete system on one single die, the so-called system chip or SOC. To reduce time-to-market for large SOCs, reuse of pre-designed and pre-veried blocks called cores is employed. Like the design style, testing of SOCs can be best approached in a core-based fashion. In order to enable core-based test development, an embedded core should be isolated from its surrounding circuitry and electrical test access from chip pins...

  1. Real-time tunability of chip-based light source enabled by microfluidic mixing

    DEFF Research Database (Denmark)

    Olsen, Brian Bilenberg; Rasmussen, Torben; Balslev, Søren

    2006-01-01

    We demonstrate real-time tunability of a chip-based liquid light source enabled by microfluidic mixing. The mixer and light source are fabricated in SU-8 which is suitable for integration in SU-8-based laboratory-on-a-chip microsystems. The tunability of the light source is achieved by changing...... the concentration of rhodamine 6G dye inside two integrated vertical resonators, since both the refractive index and the gain profile are influenced by the dye concentration. The effect on the refractive index and the gain profile of rhodamine 6G in ethanol is investigated and the continuous tuning of the laser...

  2. Organ/body-on-a-chip based on microfluidic technology for drug discovery.

    Science.gov (United States)

    Kimura, Hiroshi; Sakai, Yasuyuki; Fujii, Teruo

    2018-02-01

    Although animal experiments are indispensable for preclinical screening in the drug discovery process, various issues such as ethical considerations and species differences remain. To solve these issues, cell-based assays using human-derived cells have been actively pursued. However, it remains difficult to accurately predict drug efficacy, toxicity, and organs interactions, because cultivated cells often do not retain their original organ functions and morphologies in conventional in vitro cell culture systems. In the μTAS research field, which is a part of biochemical engineering, the technologies of organ-on-a-chip, based on microfluidic devices built using microfabrication, have been widely studied recently as a novel in vitro organ model. Since it is possible to physically and chemically mimic the in vitro environment by using microfluidic device technology, maintenance of cellular function and morphology, and replication of organ interactions can be realized using organ-on-a-chip devices. So far, functions of various organs and tissues, such as the lung, liver, kidney, and gut have been reproduced as in vitro models. Furthermore, a body-on-a-chip, integrating multi organ functions on a microfluidic device, has also been proposed for prediction of organ interactions. We herein provide a background of microfluidic systems, organ-on-a-chip, Body-on-a-chip technologies, and their challenges in the future. Copyright © 2017 The Japanese Society for the Study of Xenobiotics. Published by Elsevier Ltd. All rights reserved.

  3. Sensitive colorimetric assay for uric acid and glucose detection based on multilayer-modified paper with smartphone as signal readout.

    Science.gov (United States)

    Wang, Xu; Li, Fang; Cai, Ziqi; Liu, Kaifan; Li, Jing; Zhang, Boyang; He, Jianbo

    2018-04-01

    In this work, a multilayer-modified paper-based colorimetric sensing platform with improved color uniformity and intensity was developed for the sensitive and selective determination of uric acid and glucose with smartphone as signal readout. In detail, chitosan, different kinds of chromogenic reagents, and horseradish peroxidase (HRP) combined with a specific oxidase, e.g., uricase or glucose oxidase (GOD), were immoblized onto the paper substrate to form a multilayer-modified test paper. Hydrogen peroxide produced by the oxidases (uricase or GOD) reacts with the substrates (uric acid or glucose), and could oxidize the co-immoblized chromogenic reagents to form colored products with HRP as catalyst. A simple strategy by placing the test paper on top of a light-emitting diode lamp was adopted to efficiently prevent influence from the external light. The color images were recorded by the smartphone camera, and then the gray values of the color images were calculated for quantitative analysis. The developed method provided a wide linear response from 0.01 to 1.0 mM for uric acid detection and from 0.02 to 4.0 mM for glucose detection, with a limit of detection (LOD) as low as 0.003 and 0.014 mM, respectively, which was much lower than for previously reported paper-based colorimetric assays. The proposed assays were successfully applied to uric acid and glucose detection in real serum samples. Furthermore, the enhanced analytical performance of the proposed method allowed the non-invasive detection of glucose levels in tear samples, which holds great potential for point-of-care analysis. Graphical abstract ᅟ.

  4. Ceramic thermal wind sensor based on advanced direct chip attaching package

    International Nuclear Information System (INIS)

    Zhou Lin; Qin Ming; Chen Shengqi; Chen Bei

    2014-01-01

    An advanced direct chip attaching packaged two-dimensional ceramic thermal wind sensor is studied. The thermal wind sensor chip is fabricated by metal lift-off processes on the ceramic substrate. An advanced direct chip attaching (DCA) packaging is adopted and this new packaged method simplifies the processes of packaging further. Simulations of the advanced DCA packaged sensor based on computational fluid dynamics (CFD) model show the sensor can detect wind speed and direction effectively. The wind tunnel testing results show the advanced DCA packaged sensor can detect the wind direction from 0° to 360° and wind speed from 0 to 20 m/s with the error less than 0.5 m/s. The nonlinear fitting based least square method in Matlab is used to analyze the performance of the sensor. (semiconductor devices)

  5. Membrane-based torque magnetometer: Enhanced sensitivity by optical readout of the membrane displacement

    Science.gov (United States)

    Blankenhorn, M.; Heintze, E.; Slota, M.; van Slageren, J.; Moores, B. A.; Degen, C. L.; Bogani, L.; Dressel, M.

    2017-09-01

    The design and realization of a torque magnetometer is reported that reads the deflection of a membrane by optical interferometry. The compact instrument allows for low-temperature measurements of tiny crystals less than a microgram with a significant improvement in sensitivity, signal-to-noise ratio as well as data acquisition time compared with conventional magnetometry and offers an enormous potential for further improvements and future applications in different fields. Magnetic measurements on single-molecule magnets demonstrate the applicability of the membrane-based torque magnetometer.

  6. Development of pixel readout integrated circuits for extreme rate and radiation

    CERN Document Server

    Garcia-Sciveres, M; CERN. Geneva. The LHC experiments Committee; LHCC

    2013-01-01

    Letter of Intent for RD Collaboration Proposal focused on development of a next generation pixel readout integrated circuits needed for high luminosity LHC detector upgrades. Brings together ATLAS and CMS pixel chip design communities.

  7. Multiplexed profiling of GPCR activities by combining split TEV assays and EXT-based barcoded readouts.

    Science.gov (United States)

    Galinski, Sabrina; Wichert, Sven P; Rossner, Moritz J; Wehr, Michael C

    2018-05-25

    G protein-coupled receptors (GPCRs) are the largest class of cell surface receptors and are implicated in the physiological regulation of many biological processes. The high diversity of GPCRs and their physiological functions make them primary targets for therapeutic drugs. For the generation of novel compounds, however, selectivity towards a given target is a critical issue in drug development as structural similarities between members of GPCR subfamilies exist. Therefore, the activities of multiple GPCRs that are both closely and distantly related to assess compound selectivity need to be tested simultaneously. Here, we present a cell-based multiplexed GPCR activity assay, termed GPCRprofiler, which uses a β-arrestin recruitment strategy and combines split TEV protein-protein interaction and EXT-based barcode technologies. This approach enables simultaneous measurements of receptor activities of multiple GPCR-ligand combinations by applying massively parallelized reporter assays. In proof-of-principle experiments covering 19 different GPCRs, both the specificity of endogenous agonists and the polypharmacological effects of two known antipsychotics on GPCR activities were demonstrated. Technically, normalization of barcode reporters across individual assays allows quantitative pharmacological assays in a parallelized manner. In summary, the GPCRprofiler technique constitutes a flexible and scalable approach, which enables simultaneous profiling of compound actions on multiple receptor activities in living cells.

  8. Investigation of high sensitivity radio-frequency readout circuit based on AlGaN/GaN high electron mobility transistor

    International Nuclear Information System (INIS)

    Zhang Xiao-Yu; Sun Jian-Dong; Li Xin-Xing; Zhou Yu; Lü Li; Qin Hua; Tan Ren-Bing

    2015-01-01

    An AlGaN/GaN high electron mobility transistor (HEMT) device is prepared by using a semiconductor nanofabrication process. A reflective radio-frequency (RF) readout circuit is designed and the HEMT device is assembled in an RF circuit through a coplanar waveguide transmission line. A gate capacitor of the HEMT and a surface-mounted inductor on the transmission line are formed to generate LC resonance. By tuning the gate voltage V g , the variations of gate capacitance and conductance of the HEMT are reflected sensitively from the resonance frequency and the magnitude of the RF reflection signal. The aim of the designed RF readout setup is to develop a highly sensitive HEMT-based detector. (paper)

  9. Triggerless Readout with Time and Amplitude Reconstruction of Event Based on Deconvolution Algorithm

    International Nuclear Information System (INIS)

    Kulis, S.; Idzik, M.

    2011-01-01

    In future linear colliders like CLIC, where the period between the bunch crossings is in a sub-nanoseconds range ( 500 ps), an appropriate detection technique with triggerless signal processing is needed. In this work we discuss a technique, based on deconvolution algorithm, suitable for time and amplitude reconstruction of an event. In the implemented method the output of a relatively slow shaper (many bunch crossing periods) is sampled and digitalised in an ADC and then the deconvolution procedure is applied to digital data. The time of an event can be found with a precision of few percent of sampling time. The signal to noise ratio is only slightly decreased after passing through the deconvolution filter. The performed theoretical and Monte Carlo studies are confirmed by the results of preliminary measurements obtained with the dedicated system comprising of radiation source, silicon sensor, front-end electronics, ADC and further digital processing implemented on a PC computer. (author)

  10. Determination of Apparent Amylose Content in Rice by Using Paper-Based Microfluidic Chips.

    Science.gov (United States)

    Hu, Xianqiao; Lu, Lin; Fang, Changyun; Duan, Binwu; Zhu, Zhiwei

    2015-11-11

    Determination of apparent amylose content in rice is a key function for rice research and the rice industry. In this paper, a novel approach with paper-based microfluidic chip is reported to determine apparent amylose content in rice. The conventional color reaction between amylose and iodine was employed. Blue color of amylose-iodine complex generated on-chip was converted to gray and measured with Photoshop after the colored chip was scanned. The method for preparation of the paper chip is described. In situ generation of iodine for on-chip color reaction was designed, and factors influencing color reaction were investigated in detail. Elimination of yellow color interference of excess iodine by exploiting color removal function of Photoshop was presented. Under the optimized conditions, apparent amylose content in rice ranging from 1.5 to 26.4% can be determined, and precision was 6.3%. The analytical results obtained with the developed approach were in good agreement with those with the continuous flow analyzer method.

  11. A low cost, printed microwave based level sensor with integrated oscillator readout circuitry

    KAUST Repository

    Karimi, Muhammad Akram

    2017-10-24

    This paper presents an extremely low cost, tube conformable, printed T-resonator based microwave level sensor, whose resonance frequency shifts by changing the level of fluids inside the tube. Printed T-resonator forms the frequency selective element of the tunable oscillator. Unlike typical band-pass resonators, T-resonator has a band-notch characteristics because of which it has been integrated with an unstable amplifying unit having negative resistance in the desired frequency range. Magnitude and phase of input reflection coefficient of the transistor has been optimized over the desired frequency range. Phase flattening technique has been introduced to maximize the frequency shift of the oscillator. With the help of this technique, we were able to enhance the percentage tuning of the oscillator manifolds which resulted into a level sensor with higher sensitivity. The interface level of fluids (oil and water in our case) causes a relative change in oscillation frequency by more than 50% compared to maximum frequency shift of 8% reported earlier with dielectric tunable oscillators.

  12. ARTROC—a readout ASIC for GEM-based full-field XRF imaging system

    Science.gov (United States)

    Fiutowski, T.; Koperny, S.; Łach, B.; Mindur, B.; Świentek, K.; Wiącek, P.; Dąbrowski, W.

    2017-12-01

    In the paper we report on development of an Application Specific Integrated Circuit (ASIC), called ARTROC, being part of a full-field X-ray fluorescence spectroscopy (XRF) imaging system equipped with a standard three stage Gas Electron Multiplier (GEM) detector of 10×10 cm2 area. The ARTROC consists of 64 independent channels, allowing for simultaneous recording of the amplitudes (energy sub-channel) and time stamps (timing sub-channel) of incoming signals. Thanks to the implemented token-based read out of derandomizing buffers, the ASIC also provides data sparsification and full zero suppression. Reconstruction of the hit positions is performed in an external data acquisition system by matching the time stamps of signals recorded in X- and Y-strips. The amplitude information is used for centre of gravity finding in clusters of signals on neighbouring strips belonging to the same detection events. The ASIC could work in one of six gain modes and one of two speed modes. In a slower mode the maximum count rate per channel is 105/s while in a faster mode it is three times higher. The ARTROC comprises also input protection circuits against possible random discharges inside active detector volume, so it can be used without any additional input components. The ASIC has been designed in 350 nm CMOS process. The basic functionality and parameters have been evaluated using the testability functions implemented in the ASIC design. The ASIC has been also tested in a fully equipped GEM detector set-up with X-rays source.

  13. A PDMS-Based Microfluidic Hanging Drop Chip for Embryoid Body Formation.

    Science.gov (United States)

    Wu, Huei-Wen; Hsiao, Yi-Hsing; Chen, Chih-Chen; Yet, Shaw-Fang; Hsu, Chia-Hsien

    2016-07-06

    The conventional hanging drop technique is the most widely used method for embryoid body (EB) formation. However, this method is labor intensive and limited by the difficulty in exchanging the medium. Here, we report a microfluidic chip-based approach for high-throughput formation of EBs. The device consists of microfluidic channels with 6 × 12 opening wells in PDMS supported by a glass substrate. The PDMS channels were fabricated by replicating polydimethyl-siloxane (PDMS) from SU-8 mold. The droplet formation in the chip was tested with different hydrostatic pressures to obtain optimal operation pressures for the wells with 1000 μm diameter openings. The droplets formed at the opening wells were used to culture mouse embryonic stem cells which could subsequently developed into EBs in the hanging droplets. This device also allows for medium exchange of the hanging droplets making it possible to perform immunochemistry staining and characterize EBs on chip.

  14. A PDMS-Based Microfluidic Hanging Drop Chip for Embryoid Body Formation

    Directory of Open Access Journals (Sweden)

    Huei-Wen Wu

    2016-07-01

    Full Text Available The conventional hanging drop technique is the most widely used method for embryoid body (EB formation. However, this method is labor intensive and limited by the difficulty in exchanging the medium. Here, we report a microfluidic chip-based approach for high-throughput formation of EBs. The device consists of microfluidic channels with 6 × 12 opening wells in PDMS supported by a glass substrate. The PDMS channels were fabricated by replicating polydimethyl-siloxane (PDMS from SU-8 mold. The droplet formation in the chip was tested with different hydrostatic pressures to obtain optimal operation pressures for the wells with 1000 μm diameter openings. The droplets formed at the opening wells were used to culture mouse embryonic stem cells which could subsequently developed into EBs in the hanging droplets. This device also allows for medium exchange of the hanging droplets making it possible to perform immunochemistry staining and characterize EBs on chip.

  15. On-chip signal amplification of magnetic bead-based immunoassay by aviating magnetic bead chains.

    Science.gov (United States)

    Jalal, Uddin M; Jin, Gyeong Jun; Eom, Kyu Shik; Kim, Min Ho; Shim, Joon S

    2017-11-06

    In this work, a Lab-on-a-Chip (LOC) platform is used to electromagnetically actuate magnetic bead chains for an enhanced immunoassay. Custom-made electromagnets generate a magnetic field to form, rotate, lift and lower the magnetic bead chains (MBCs). The cost-effective, disposable LOC platform was made with a polymer substrate and an on-chip electrochemical sensor patterned via the screen-printing process. The movement of the MBCs is controlled to improve the electrochemical signal up to 230% when detecting beta-type human chorionic gonadotropin (β-hCG). Thus, the proposed on-chip MBC-based immunoassay is applicable for rapid, qualitative electrochemical point-of-care (POC) analysis. Copyright © 2017 Elsevier B.V. All rights reserved.

  16. On-chip magnetic bead-based DNA melting curve analysis using a magnetoresistive sensor

    DEFF Research Database (Denmark)

    Rizzi, Giovanni; Østerberg, Frederik Westergaard; Henriksen, Anders Dahl

    2014-01-01

    We present real-time measurements of DNA melting curves in a chip-based system that detects the amount of surface-bound magnetic beads using magnetoresistive magnetic field sensors. The sensors detect the difference between the amount of beads bound to the top and bottom sensor branches....... The beads are magnetized by the field arising from the bias current passed through the sensors. We demonstrate the first on-chip measurements of the melting of DNA hybrids upon a ramping of the temperature. This overcomes the limitation of using a single washing condition at constant temperature. Moreover...

  17. An automatic single channel analyzer based on single-chip microcomputer

    International Nuclear Information System (INIS)

    Yan Xuekun; Jia Mingchun; Zhang Yan; Liu Mingjian; Luo Ming

    2008-01-01

    The hardware and software of an automatic single channel analyzer based on AT89C51RC single-chip microcomputer is described in this paper. The equipment takes a method of channel-width-adjusting symmetrically, and makes use of single-chip microcomputer to control the two DAC0832 so as to adjust the discriminating threshold and channel-width automatically. As a result, the auto-measuring of the single channel analyzer is realized. Its circuit configuration is simple, and the uniformity of its channel-width is well, too. (authors)

  18. SU-8 as a material for lab-on-a-chip-based mass spectrometry.

    Science.gov (United States)

    Arscott, Steve

    2014-10-07

    This short review focuses on the application of SU-8 for the microchip-based approach to the miniaturization of mass spectrometry. Chip-based mass spectrometry will make the technology commonplace and bring benefits such as lower costs and autonomy. The chip-based miniaturization of mass spectrometry necessitates the use of new materials which are compatible with top-down fabrication involving both planar and non-planar processes. In this context, SU-8 is a very versatile epoxy-based, negative tone resist which is sensitive to ultraviolet radiation, X-rays and electron beam exposure. It has a very wide thickness range, from nanometres to millimetres, enabling the formation of mechanically rigid, very high aspect ratio, vertical, narrow width structures required to form microfluidic slots and channels for laboratory-on-a-chip design. It is also relatively chemically resistant and biologically compatible in terms of the liquid solutions used for mass spectrometry. This review looks at the impact and potential of SU-8 on the different parts of chip-based mass spectrometry - pre-treatment, ionization processes, and ion sorting and detection.

  19. MEMS-based wavelength and orbital angular momentum demultiplexer for on-chip applications

    DEFF Research Database (Denmark)

    Lyubopytov, Vladimir; Porfirev, Alexey P.; Gurbatov, Stanislav O.

    2017-01-01

    Summary form only given. We demonstrate a new tunable MEMS-based WDM&OAM Fabry-Pérot filter for simultaneous wavelength (WDM) and Orbital Angular Momentum (OAM) (de)multiplexing. The WDM&OAM filter is suitable for dense on-chip integration and dedicated for the next generation of optical...

  20. X-γ dose rate continuous monitor with wide range based on single-chip microcomputer

    International Nuclear Information System (INIS)

    Wu Debo; Ling Qiu; Guo Lanying; Yang Binhua

    2007-01-01

    This paper describes a concept about circuit designing of X-γ dose rate continuous monitor with wide range based on single-chip microcomputer, and also presents the design procedure of hardware and software, and gives several methods for solving the design procedure of hardware and software with emphasis. (authors)

  1. Development of based on 89S51 single-chip microcomputer electronic dosimeter

    International Nuclear Information System (INIS)

    Wang Junhua; Zhou Jiachao; Sun Jianghan; Du Xiao

    2009-01-01

    It describes the main design features and basic properties of based on 89S51 single-chip microcomputer electronic dosimeter with wide range and multi purposes. The dosimeter can display dose rate or accumulative dose or the maximum dose rate, record accumulative dose, the maximum dose rate and classes. (authors)

  2. Fabrication and Characterization of Bi2Te3-Based Chip-Scale Thermoelectric Energy Harvesting Devices

    Science.gov (United States)

    Cornett, Jane; Chen, Baoxing; Haidar, Samer; Berney, Helen; McGuinness, Pat; Lane, Bill; Gao, Yuan; He, Yifan; Sun, Nian; Dunham, Marc; Asheghi, Mehdi; Goodson, Ken; Yuan, Yi; Najafi, Khalil

    2017-05-01

    Thermoelectric energy harvesters convert otherwise wasted heat into electrical energy. As a result, they have the potential to play a critical role in the autonomous wireless sensor network signal chain. In this paper, we present work carried out on the development of Bi2Te3-based thermoelectric chip-scale energy harvesting devices. Process flow, device demonstration and characterization are highlighted.

  3. Front-end electronics and readout system for the ILD TPC

    CERN Document Server

    Hedberg, V; Lundberg, B; Mjörnmark, U; Oskarsson, A; Österman, L; De Lentdecker, G; Yang, Y; Zhang, F

    2015-01-01

    A high resolution TPC is the main option for a central tracking detector at the future International Linear Collider (ILC). It is planned that the MPGD (Micro Pattern Gas Detector) technology will be used for the readout. A Large Prototype TPC at DESY has been used to test the performance of MPGDs in an electron beam of energies up to 6 GeV. The first step in the technology development was to demonstrate that the MPGDs are able to achieve the necessary performance set by the goals of ILC. For this ’proof of principle’ phase, the ALTRO front-end electronics from the ALICE TPC was used, modified to adapt to MPGD readout. The proof of principle has been verified and at present further improvement of the MPGD technology is going on, using the same readout electronics. The next step is the ’feasibility phase’, which aims at producing front-end electronics comparable in size (few mm2) to the readout pads of the TPC. This development work is based on the succeeding SALTRO16 chip, which combines the analogue ...

  4. MEMS acceleration sensor with remote optical readout for continuous power generator monitoring

    Directory of Open Access Journals (Sweden)

    Tormen Maurizio

    2015-01-01

    Full Text Available Miniaturized accelerometers with remote optical readout are required devices for the continuous monitoring of vibrations inside power generators. In turbo and hydro generators, end-winding vibrations are present during operation causing in the long term undesirable out-of-service repairs. Continuous monitoring of these vibrations is therefore mandatory. The high electromagnetic fields in the generators impose the use of devices immune to electromagnetic interferences. In this paper a MEMS based accelerometer with remote optical readout is presented. Advantages of the proposed device are the use of a differential optical signal to reject the common mode signal and noise, the reduced number of steps for the MEMS chip fabrication and for the system assembly, and the reduced package volume.

  5. The IBL Readout System

    CERN Document Server

    Dopke, J; The ATLAS collaboration; Flick, T; Gabrielli, A; Kugel, A; Maettig, P; Morettini, P; Polini, A; Schroer, N

    2010-01-01

    The first upgrade for the ATLAS pixel detector will be an additional layer, which is called IBL (Insertable B-Layer). To readout this new layer having new electronics assembled an update of the readout electronics is necessary. The aim is to develop a system which is capable to read out at a higher bandwidth and also compatible with the existing system to be integrated into it. The talk will describe the necessary development to reach a new readout system, concentrating on the requirements of a newly designed Back of Crate card as the optical interface in the counting room.

  6. The IBL Readout System

    CERN Document Server

    Dopke, J; Flick, T; Gabrielli, A; Kugel, A; Maettig, P; Morettini, P; Polini, A; Schroer, N

    2011-01-01

    The first upgrade for the ATLAS Pixel Detector will be an additional layer, which is called IBL (Insertable B-Layer). To readout this new layer, having new electronics, an update of the readout electronics is necessary. The aim is to develop a system which is capable to read out at a higher bandwidth, but also compatible with the existing system to be integrated into it. This paper will describe the necessary development to reach a new readout system, concentrating on the requirements of a newly designed Back of Crate card as the optical interface in the counting room.

  7. An SOI CMOS-Based Multi-Sensor MEMS Chip for Fluidic Applications.

    Science.gov (United States)

    Mansoor, Mohtashim; Haneef, Ibraheem; Akhtar, Suhail; Rafiq, Muhammad Aftab; De Luca, Andrea; Ali, Syed Zeeshan; Udrea, Florin

    2016-11-04

    An SOI CMOS multi-sensor MEMS chip, which can simultaneously measure temperature, pressure and flow rate, has been reported. The multi-sensor chip has been designed keeping in view the requirements of researchers interested in experimental fluid dynamics. The chip contains ten thermodiodes (temperature sensors), a piezoresistive-type pressure sensor and nine hot film-based flow rate sensors fabricated within the oxide layer of the SOI wafers. The silicon dioxide layers with embedded sensors are relieved from the substrate as membranes with the help of a single DRIE step after chip fabrication from a commercial CMOS foundry. Very dense sensor packing per unit area of the chip has been enabled by using technologies/processes like SOI, CMOS and DRIE. Independent apparatuses were used for the characterization of each sensor. With a drive current of 10 µA-0.1 µA, the thermodiodes exhibited sensitivities of 1.41 mV/°C-1.79 mV/°C in the range 20-300 °C. The sensitivity of the pressure sensor was 0.0686 mV/(V excit kPa) with a non-linearity of 0.25% between 0 and 69 kPa above ambient pressure. Packaged in a micro-channel, the flow rate sensor has a linearized sensitivity of 17.3 mV/(L/min) -0.1 in the tested range of 0-4.7 L/min. The multi-sensor chip can be used for simultaneous measurement of fluid pressure, temperature and flow rate in fluidic experiments and aerospace/automotive/biomedical/process industries.

  8. An SOI CMOS-Based Multi-Sensor MEMS Chip for Fluidic Applications †

    Science.gov (United States)

    Mansoor, Mohtashim; Haneef, Ibraheem; Akhtar, Suhail; Rafiq, Muhammad Aftab; De Luca, Andrea; Ali, Syed Zeeshan; Udrea, Florin

    2016-01-01

    An SOI CMOS multi-sensor MEMS chip, which can simultaneously measure temperature, pressure and flow rate, has been reported. The multi-sensor chip has been designed keeping in view the requirements of researchers interested in experimental fluid dynamics. The chip contains ten thermodiodes (temperature sensors), a piezoresistive-type pressure sensor and nine hot film-based flow rate sensors fabricated within the oxide layer of the SOI wafers. The silicon dioxide layers with embedded sensors are relieved from the substrate as membranes with the help of a single DRIE step after chip fabrication from a commercial CMOS foundry. Very dense sensor packing per unit area of the chip has been enabled by using technologies/processes like SOI, CMOS and DRIE. Independent apparatuses were used for the characterization of each sensor. With a drive current of 10 µA–0.1 µA, the thermodiodes exhibited sensitivities of 1.41 mV/°C–1.79 mV/°C in the range 20–300 °C. The sensitivity of the pressure sensor was 0.0686 mV/(Vexcit kPa) with a non-linearity of 0.25% between 0 and 69 kPa above ambient pressure. Packaged in a micro-channel, the flow rate sensor has a linearized sensitivity of 17.3 mV/(L/min)−0.1 in the tested range of 0–4.7 L/min. The multi-sensor chip can be used for simultaneous measurement of fluid pressure, temperature and flow rate in fluidic experiments and aerospace/automotive/biomedical/process industries. PMID:27827904

  9. An AES chip with DPA resistance using hardware-based random order execution

    International Nuclear Information System (INIS)

    Yu Bo; Li Xiangyu; Chen Cong; Sun Yihe; Wu Liji; Zhang Xiangmin

    2012-01-01

    This paper presents an AES (advanced encryption standard) chip that combats differential power analysis (DPA) side-channel attack through hardware-based random order execution. Both decryption and encryption procedures of an AES are implemented on the chip. A fine-grained dataflow architecture is proposed, which dynamically exploits intrinsic byte-level independence in the algorithm. A novel circuit called an HMF (Hold-Match-Fetch) unit is proposed for random control, which randomly sets execution orders for concurrent operations. The AES chip was manufactured in SMIC 0.18 μm technology. The average energy for encrypting one group of plain texts (128 bits secrete keys) is 19 nJ. The core area is 0.43 mm 2 . A sophisticated experimental setup was built to test the DPA resistance. Measurement-based experimental results show that one byte of a secret key cannot be disclosed from our chip under random mode after 64000 power traces were used in the DPA attack. Compared with the corresponding fixed order execution, the hardware based random order execution is improved by at least 21 times the DPA resistance. (semiconductor integrated circuits)

  10. An AES chip with DPA resistance using hardware-based random order execution

    Science.gov (United States)

    Bo, Yu; Xiangyu, Li; Cong, Chen; Yihe, Sun; Liji, Wu; Xiangmin, Zhang

    2012-06-01

    This paper presents an AES (advanced encryption standard) chip that combats differential power analysis (DPA) side-channel attack through hardware-based random order execution. Both decryption and encryption procedures of an AES are implemented on the chip. A fine-grained dataflow architecture is proposed, which dynamically exploits intrinsic byte-level independence in the algorithm. A novel circuit called an HMF (Hold-Match-Fetch) unit is proposed for random control, which randomly sets execution orders for concurrent operations. The AES chip was manufactured in SMIC 0.18 μm technology. The average energy for encrypting one group of plain texts (128 bits secrete keys) is 19 nJ. The core area is 0.43 mm2. A sophisticated experimental setup was built to test the DPA resistance. Measurement-based experimental results show that one byte of a secret key cannot be disclosed from our chip under random mode after 64000 power traces were used in the DPA attack. Compared with the corresponding fixed order execution, the hardware based random order execution is improved by at least 21 times the DPA resistance.

  11. Investigation of the readout electronics of DELPHI surround muon chamber

    International Nuclear Information System (INIS)

    Khovanskij, N.; Krumshtejn, Z.; Ol'shevskij, A.; Sadovskij, A.; Sedykh, Yu.; Molnar, J.; Sicho, P.; Tomsa, Z.

    1995-01-01

    The characteristics of the readout electronics of the DELPHI surround muon chambers with various AMPLEX chips (AMPLEX 16 and AMPLEX-SICAL) are presented. This electronics is studied in a cosmic rays test of the real surround muon chamber model. 4 refs., 6 figs., 1 tab

  12. A micromachined surface stress sensor with electronic readout

    NARCIS (Netherlands)

    Carlen, Edwin; Weinberg, M.S.; Zapata, A.M.; Borenstein, J.T.

    2008-01-01

    A micromachined surface stress sensor has been fabricated and integrated off chip with a low-noise, differential capacitance, electronic readout circuit. The differential capacitance signal is modulated with a high frequency carrier signal, and the output signal is synchronously demodulated and

  13. Investigation of a Huffman-based compression algorithm for the ALICE TPC read-out in LHC Run 3

    Energy Technology Data Exchange (ETDEWEB)

    Klewin, Sebastian [Physikalisches Institut, University of Heidelberg (Germany); Collaboration: ALICE-Collaboration

    2016-07-01

    Within the scope of the ALICE upgrade towards the Run 3 of the Large Hadron Collider at CERN, starting in 2020, the ALICE Time Projection Chamber (TPC) will be reworked in order to allow for a continuous read-out. This rework includes not only a replacement of the current read-out chambers with Gas Electron Multiplier (GEM) technology, but also new front-end electronics. To be able to read out the whole data stream without loosing information, in particular without zero-suppression, a lossless compression algorithm, the Huffman encoding, was investigated and adapted to the needs of the TPC. In this talk, an algorithm, adapted for an FPGA implementation, is presented. We show its capability to reduce the data volume to less than 40% of its original size.

  14. Fiber‐free coupling between bulk laser beams and on‐chip polymer‐based multimode waveguides

    DEFF Research Database (Denmark)

    Jensen, Thomas Glasdam; Nielsen, Lars Bue; Kutter, Jörg Peter

    2011-01-01

    light from a bulk beam to on‐chip waveguides and back into a bulk beam again. Using this setup, as much as 20% of the light coming from the source can be retrieved after passing through the on‐chip waveguides. The proposed setup is based on a pin‐aided alignment system that makes it possible to change...

  15. Contrast image formation based on thermodynamic approach and surface laser oxidation process for optoelectronic read-out system

    Science.gov (United States)

    Scherbak, Aleksandr; Yulmetova, Olga

    2018-05-01

    A pulsed fiber laser with the wavelength 1.06 μm was used to treat titanium nitride film deposited on beryllium substrates in the air with intensities below an ablation threshold to provide oxide formation. Laser oxidation results were predicted by the chemical thermodynamic method and confirmed by experimental techniques (X-ray diffraction). The developed technology of contrast image formation is intended to be used for optoelectronic read-out system.

  16. Status of readout integrated circuits for radiation detector

    International Nuclear Information System (INIS)

    Moon, B. S.; Hong, S. B.; Cheng, J. E. and others

    2001-09-01

    In this report, we describe the current status of readout integrated circuits developed for radiation detectors, along with new technologies being applied to this field. The current status of ASCIC chip development related to the readout electronics is also included in this report. Major sources of this report are from product catalogs and web sites of the related industries. In the field of semiconductor process technology in Korea, the current status of the multi-project wafer(MPW) of IDEC, the multi-project chip(MPC) of ISRC and other domestic semiconductor process industries is described. In the case of other countries, the status of the MPW of MOSIS in USA and the MPW of EUROPRACTICE in Europe is studied. This report also describes the technologies and products of readout integrated circuits of industries worldwide

  17. Pad readout for gas detectors using 128-channel integrated preamplifiers

    International Nuclear Information System (INIS)

    Fischer, P.; Drees, A.; Glassel, P.

    1988-01-01

    A novel two-dimensional readout scheme for gas detectors is presented which uses small metal pads with 2.54 mm pitch as an anode. The pads are read out via 128-channel VLSI low-noise preamplifier/multiplexer chips. These chips are mounted on 2.8x2.8 cm/sup 2/ modules which are directly plugged onto the detector backplane, daisy-chained with jumpers and read out sequentially. The readout has been successfully tested with a low-pressure, two-step, TMAE-filled UV-RICH detector prototype. A single electron efficiently of >90% was observed at moderate chamber gains (<10/sup 6/). The method offers high electronic amplification, low noise, and high readout speed with a very flexible and compact design, suited for space-limited applications

  18. Droplet-based Biosensing for Lab-on-a-Chip, Open Microfluidics Platforms

    Directory of Open Access Journals (Sweden)

    Piyush Dak

    2016-04-01

    Full Text Available Low cost, portable sensors can transform health care by bringing easily available diagnostic devices to low and middle income population, particularly in developing countries. Sample preparation, analyte handling and labeling are primary cost concerns for traditional lab-based diagnostic systems. Lab-on-a-chip (LoC platforms based on droplet-based microfluidics promise to integrate and automate these complex and expensive laboratory procedures onto a single chip; the cost will be further reduced if label-free biosensors could be integrated onto the LoC platforms. Here, we review some recent developments of label-free, droplet-based biosensors, compatible with “open” digital microfluidic systems. These low-cost droplet-based biosensors overcome some of the fundamental limitations of the classical sensors, enabling timely diagnosis. We identify the key challenges that must be addressed to make these sensors commercially viable and summarize a number of promising research directions.

  19. Recent advances in graphene-based planar micro-supercapacitors for on-chip energy storage

    Institute of Scientific and Technical Information of China (English)

    Zhong-Shuai Wu; Xinliang Feng; Hui-Ming Cheng

    2014-01-01

    The current development trend towards miniaturized portable electronic devices has signiicantly increased the demand for ultrathin, lexible and sustainable on-chip micro-supercapacitors that have enormous potential to complement, or even to replace, micro-bateries and electrolytic capacitors. In this regard,graphene-based micro-supercapacitors with a planar geometry are promising micro-electrochemical energy-storage devices that can take full advantage of planar coniguration and unique features of graphene.his review summarizes the latest advances in on-chip graphene-based planar interdigital micro-supercapacitors, from the history of their development, representative graphene-based materials(graphene sheets, graphene quantum dots and graphene hybrids) for their manufacture, typical microfabrication strategies(photolithography techniques, electrochemical methods, laser writing, etc.),electrolyte(aqueous, organic, ionic and gel), to device coniguration(symmetric and asymmetric). Finally,the perspectives and possible development directions of future graphene-based micro-supercapacitors are briely discussed.

  20. On-chip plasmon-induced transparency based on plasmonic coupled nanocavities.

    Science.gov (United States)

    Zhu, Yu; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

    2014-01-17

    On-chip plasmon-induced transparency offers the possibility of realization of ultrahigh-speed information processing chips. Unfortunately, little experimental progress has been made to date because it is difficult to obtain on-chip plasmon-induced transparency using only a single meta-molecule in plasmonic circuits. Here, we report a simple and efficient strategy to realize on-chip plasmon-induced transparency in a nanoscale U-shaped plasmonic waveguide side-coupled nanocavity pair. High tunability in the transparency window is achieved by covering the pair with different organic polymer layers. It is possible to realize ultrafast all-optical tunability based on pump light-induced refractive index change of a graphene cover layer. Compared with previous reports, the overall feature size of the plasmonic nanostructure is reduced by more than three orders of magnitude, while ultrahigh tunability of the transparency window is maintained. This work also provides a superior platform for the study of the various physical effects and phenomena of nonlinear optics and quantum optics.

  1. Readout scheme for the Baby-MIND detector

    CERN Document Server

    Noah, Etam; Cadoux, F; Favre, Y; Martinez, B; Nicola, L; Parsa, S; Rayner, M; Antonova, M; Fedotov, S; Izmaylov, A; Kleymenova, A; Khabibullin, M; Khotyantsev, A; Kudenko, Y; Likhacheva, V; Mefodiev, A; Mineev, O; Ovsiannikova, T; Shaykhiev, A; Suvorov, S; Yershov, N; Tsenov, R

    2016-01-01

    A readout scheme has been designed for the plastic scintillator bars of the Baby-MIND detector modules. This spectrometer will measure momentum and identify the charge of 1 GeV/c muons with magnetized iron plates interleaved with detector modules. One challenge the detector aims to address is that of keeping high charge identification efficiencies for momenta below 1 GeV/c where multiple scattering in the iron plates degrades momentum resolution. A front-end board has been developed, with 3 CITIROC readout chips per board and up to 96 channels. Hamamatsu MPPCs type S12571-025C photosensors were chosen for readout of wavelength shifting fibers embedded in plastic scintillators. Procurement of the MPPCs has been carried out to instrument 3000 channels in total. Design choices and first results of this readout scheme are presented.

  2. Towards UV imaging sensors based on single-crystal diamond chips for spectroscopic applications

    Energy Technology Data Exchange (ETDEWEB)

    De Sio, A. [Department of Astronomy and Space Science, University of Firenze, Largo E. Fermi 2, 50125 Florence (Italy)], E-mail: desio@arcetri.astro.it; Bocci, A. [Department of Astronomy and Space Science, University of Firenze, Largo E. Fermi 2, 50125 Florence (Italy); Bruno, P.; Di Benedetto, R.; Greco, V.; Gullotta, G. [INAF-Astrophysical Observatory of Catania (Italy); Marinelli, M. [INFN-Department of Mechanical Engineering, University of Roma ' Tor Vergata' (Italy); Pace, E. [Department of Astronomy and Space Science, University of Firenze, Largo E. Fermi 2, 50125 Florence (Italy); Rubulotta, D.; Scuderi, S. [INAF-Astrophysical Observatory of Catania (Italy); Verona-Rinati, G. [INFN-Department of Mechanical Engineering, University of Roma ' Tor Vergata' (Italy)

    2007-12-11

    The recent improvements achieved in the Homoepitaxial Chemical Vapour Deposition technique have led to the production of high-quality detector-grade single-crystal diamonds. Diamond-based detectors have shown excellent performances in UV and X-ray detection, paving the way for applications of diamond technology to the fields of space astronomy and high-energy photon detection in harsh environments or against strong visible light emission. These applications are possible due to diamond's unique properties such as its chemical inertness and visible blindness, respectively. Actually, the development of linear array detectors represents the main issue for a full exploitation of diamond detectors. Linear arrays are a first step to study bi-dimensional sensors. Such devices allow one to face the problems related to pixel miniaturisation and of signal read-out from many channels. Immediate applications would be in spectroscopy, where such arrays are preferred. This paper reports on the development of imaging detectors made by our groups, starting from the material growth and characterisation, through the design, fabrication and packaging of 2xn pixel arrays, to their electro-optical characterisation in terms of UV sensitivity, uniformity of the response and to the development of an electronic circuit suitable to read-out very low photocurrent signals. The detector and its electronic read-out were then tested using a 2x5 pixel array based on a single-crystal diamond. The results will be discussed in the framework of the development of an imager device for X-UV astronomy applications in space missions.

  3. NI Based System for Seu Testing of Memory Chips for Avionics

    Directory of Open Access Journals (Sweden)

    Boruzdina Anna

    2016-01-01

    Full Text Available This paper presents the results of implementation of National Instrument based system for Single Event Upset testing of memory chips into neutron generator experimental facility, which used for SEU tests for avionics purposes. Basic SEU testing algorithm with error correction and constant errors detection is presented. The issues of radiation shielding of NI based system are discussed and solved. The examples of experimental results show the applicability of the presented system for SEU memory testing under neutrons influence.

  4. TARGET: A multi-channel digitizer chip for very-high-energy gamma-ray telescopes

    Energy Technology Data Exchange (ETDEWEB)

    Bechtol, K.; Funk, S.; /Stanford U., HEPL /KIPAC, Menlo Park; Okumura, A.; /JAXA, Sagamihara /Stanford U., HEPL /KIPAC, Menlo Park; Ruckman, L.; /Hawaii U.; Simons, A.; Tajima, H.; Vandenbroucke, J.; /Stanford U., HEPL /KIPAC, Menlo Park; Varner, G.; /Hawaii U.

    2011-08-11

    The next-generation very-high-energy (VHE) gamma-ray observatory, the Cherenkov Telescope Array, will feature dozens of imaging atmospheric Cherenkov telescopes (IACTs), each with thousands of pixels of photosensors. To be affordable and reliable, reading out such a mega-channel array requires event recording technology that is highly integrated and modular, with a low cost per channel. We present the design and performance of a chip targeted to this application: the TeV Array Readout with GSa/s sampling and Event Trigger (TARGET). This application-specific integrated circuit (ASIC) has 16 parallel input channels, a 4096-sample buffer for each channel, adjustable input termination, self-trigger functionality, and tight window-selected readout. We report the performance of TARGET in terms of sampling frequency, power consumption, dynamic range, current-mode gain, analog bandwidth, and cross talk. The large number of channels per chip allows a low cost per channel ($10 to $20 including front-end and back-end electronics but not including photosensors) to be achieved with a TARGET-based IACT readout system. In addition to basic performance parameters of the TARGET chip itself, we present a camera module prototype as well as a second-generation chip (TARGET 2), both of which have been produced.

  5. A portable smart phone-based plasmonic nanosensor readout platform that measures transmitted light intensities of nanosubstrates using an ambient light sensor.

    Science.gov (United States)

    Fu, Qiangqiang; Wu, Ze; Xu, Fangxiang; Li, Xiuqing; Yao, Cuize; Xu, Meng; Sheng, Liangrong; Yu, Shiting; Tang, Yong

    2016-05-21

    Plasmonic nanosensors may be used as tools for diagnostic testing in the field of medicine. However, quantification of plasmonic nanosensors often requires complex and bulky readout instruments. Here, we report the development of a portable smart phone-based plasmonic nanosensor readout platform (PNRP) for accurate quantification of plasmonic nanosensors. This device operates by transmitting excitation light from a LED through a nanosubstrate and measuring the intensity of the transmitted light using the ambient light sensor of a smart phone. The device is a cylinder with a diameter of 14 mm, a length of 38 mm, and a gross weight of 3.5 g. We demonstrated the utility of this smart phone-based PNRP by measuring two well-established plasmonic nanosensors with this system. In the first experiment, the device measured the morphology changes of triangular silver nanoprisms (AgNPRs) in an immunoassay for the detection of carcinoembryonic antigen (CEA). In the second experiment, the device measured the aggregation of gold nanoparticles (AuNPs) in an aptamer-based assay for the detection of adenosine triphosphate (ATP). The results from the smart phone-based PNRP were consistent with those from commercial spectrophotometers, demonstrating that the smart phone-based PNRP enables accurate quantification of plasmonic nanosensors.

  6. Characterization of Ni/SnPb-TiW/Pt Flip Chip Interconnections in Silicon Pixel Detector Modules

    CERN Document Server

    Karadzhinova, Aneliya; Härkönen, Jaakko; Luukka, Panja-riina; Mäenpää, Teppo; Tuominen, Eija; Haeggstrom, Edward; Kalliopuska, Juha; Vahanen, Sami; Kassamakov, Ivan

    2014-01-01

    In contemporary high energy physics experiments, silicon detectors are essential for recording the trajectory of new particles generated by multiple simultaneous collisions. Modern particle tracking systems may feature 100 million channels, or pixels, which need to be individually connected to read-out chains. Silicon pixel detectors are typically connected to readout chips by flip-chip bonding using solder bumps. High-quality electro-mechanical flip-chip interconnects minimizes the number of dead read-out channels in the particle tracking system. Furthermore, the detector modules must endure handling during installation and withstand heat generation and cooling during operation. Silicon pixel detector modules were constructed by flip-chip bonding 16 readout chips to a single sensor. Eutectic SnPb solder bumps were deposited on the readout chips and the sensor chips were coated with TiW/Pt thin film UBM (under bump metallization). The modules were assembled at Advacam Ltd, Finland. We studied the uniformity o...

  7. Debugging systems-on-chip communication-centric and abstraction-based techniques

    CERN Document Server

    Vermeulen, Bart

    2014-01-01

    This book describes an approach and supporting infrastructure to facilitate debugging the silicon implementation of a System-on-Chip (SOC), allowing its associated product to be introduced into the market more quickly.  Readers learn step-by-step the key requirements for debugging a modern, silicon SOC implementation, nine factors that complicate this debugging task, and a new debug approach that addresses these requirements and complicating factors.  The authors’ novel communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug approach is discussed in detail, showing how it helps to meet debug requirements and address the nine, previously identified factors that complicate debugging silicon implementations of SOCs. The authors also derive the debug infrastructure requirements to support debugging of a silicon implementation of an SOC with their CSAR debug approach. This debug infrastructure consists of a generic on-chip debug architecture, a configurable automated design-for-debug ...

  8. A monolithic glass chip for active single-cell sorting based on mechanical phenotyping.

    Science.gov (United States)

    Faigle, Christoph; Lautenschläger, Franziska; Whyte, Graeme; Homewood, Philip; Martín-Badosa, Estela; Guck, Jochen

    2015-03-07

    The mechanical properties of biological cells have long been considered as inherent markers of biological function and disease. However, the screening and active sorting of heterogeneous populations based on serial single-cell mechanical measurements has not been demonstrated. Here we present a novel monolithic glass chip for combined fluorescence detection and mechanical phenotyping using an optical stretcher. A new design and manufacturing process, involving the bonding of two asymmetrically etched glass plates, combines exact optical fiber alignment, low laser damage threshold and high imaging quality with the possibility of several microfluidic inlet and outlet channels. We show the utility of such a custom-built optical stretcher glass chip by measuring and sorting single cells in a heterogeneous population based on their different mechanical properties and verify sorting accuracy by simultaneous fluorescence detection. This offers new possibilities of exact characterization and sorting of small populations based on rheological properties for biological and biomedical applications.

  9. Temporal Noise Analysis of Charge-Domain Sampling Readout Circuits for CMOS Image Sensors

    Directory of Open Access Journals (Sweden)

    Xiaoliang Ge

    2018-02-01

    Full Text Available This paper presents a temporal noise analysis of charge-domain sampling readout circuits for Complementary Metal-Oxide Semiconductor (CMOS image sensors. In order to address the trade-off between the low input-referred noise and high dynamic range, a Gm-cell-based pixel together with a charge-domain correlated-double sampling (CDS technique has been proposed to provide a way to efficiently embed a tunable conversion gain along the read-out path. Such readout topology, however, operates in a non-stationery large-signal behavior, and the statistical properties of its temporal noise are a function of time. Conventional noise analysis methods for CMOS image sensors are based on steady-state signal models, and therefore cannot be readily applied for Gm-cell-based pixels. In this paper, we develop analysis models for both thermal noise and flicker noise in Gm-cell-based pixels by employing the time-domain linear analysis approach and the non-stationary noise analysis theory, which help to quantitatively evaluate the temporal noise characteristic of Gm-cell-based pixels. Both models were numerically computed in MATLAB using design parameters of a prototype chip, and compared with both simulation and experimental results. The good agreement between the theoretical and measurement results verifies the effectiveness of the proposed noise analysis models.

  10. Test vehicles for CMS HGCAL readout ASIC

    CERN Document Server

    Thienpont, Damien

    2017-01-01

    This paper presents first measurement results of two test vehicles ASIC embedding some building blocks for the future CMS High Granularity CALorimeter (HGCAL) read-out ASIC. They were fabricated in CMOS 130 nm, in order to first design the Analog and Mixed-Signal blocks before going to a complete and complex chip. Such a circuit needs to achieve low noise high dynamic range charge measurement and 20 ps resolution timing capability. The results show good analog performance but with higher noise levels compared to simulations. We present the results of the preamplifiers, shapers and ADCs.

  11. Study of multi-channel readout ASIC and its discrete module for particle detector

    International Nuclear Information System (INIS)

    Wang Ke; Fan Lei; Zhang Shengjun; Li Xian

    2013-01-01

    Recently, kinds of particle detectors have used Application Specific Integrated Circuits (ASIC) in their electronics readout systems, it is the key part for the whole system. This project designed a multi-channel readout ASIC for general detectors. The chip has Preamplifier, Shaper and Peak Detector embedded for easy readout. For each channel, signal which is preprocessed by a low-noise preamplifier is sent to the shaper to form a quasi-Gaussian pulse and keep its peak for readout. This chip and modules of individual Preamplifier, Shaper and Peak Detector have been manufactured and tested. The discrete modules work well, and the 6-channel chip NPRE 6 is ready for test in some particle detection system. (authors)

  12. Prototype readout system for a multi Mpixels UV single-photon imaging detector capable of space flight operation

    Science.gov (United States)

    Seljak, A.; Cumming, H. S.; Varner, G.; Vallerga, J.; Raffanti, R.; Virta, V.

    2018-02-01

    Our collaboration works on the development of a large aperture, high resolution, UV single-photon imaging detector, funded through NASA's Strategic Astrophysics Technology (SAT) program. The detector uses a microchannel plate for charge multiplication, and orthogonal cross strip (XS) anodes for charge readout. Our target is to make an advancement in the technology readiness level (TRL), which enables real scale prototypes to be tested for future NASA missions. The baseline detector has an aperture of 50×50 mm and requires 160 low-noise charge-sensitive channels, in order to extrapolate the incoming photon position with a spatial resolution of about 20 μm FWHM. Technologies involving space flight require highly integrated electronic systems operating at very low power. We have designed two ASICs which enable the construction of such readout system. First, a charge sensitive amplifier (CSAv3) ASIC provides an equivalent noise charge (ENC) of around 600 e-, and a baseline gain of 10 mV/fC. The second, a Giga Sample per Second (GSPS) ASIC, called HalfGRAPH, is a 12-bit analog to digital converter. Its architecture is based on waveform sampling capacitor arrays and has about 8 μs of analog storage memory per channel. Both chips encapsulate 16 measurement channels. Using these chips, a small scale prototype readout system has been constructed on a FPGA Mezzanine Board (FMC), equipped with 32 measurement channels for system evaluation. We describe the construction of HalfGRAPH ASIC, detector's readout system concept and obtained results from the prototype system. As part of the space flight qualification, these chips were irradiated with a Cobalt gamma-ray source, to verify functional operation under ionizing radiation exposure.

  13. A DSP-based readout and online processing system for a new focal-plane polarimeter at AGOR

    Energy Technology Data Exchange (ETDEWEB)

    Hagemann, M.; Bassini, R.; Berg, A.M. van den; Ellinghaus, F.; Frekers, D.; Hannen, V.M.; Haeupke, T.; Heyse, J.; Jacobs, E.; Kirsch, M.; Kruesemann, B.; Rakers, S.; Sohlbach, H.; Woertche, H.J. E-mail: wortche@ikp.uni-muenster.de

    1999-11-21

    A Focal-Plane Polarimeter (FPP) for the large acceptance Big-Bite Spectrometer (BBS) at AGOR using a novel readout architecture has been commissioned at the KVI Groningen. The instrument is optimized for medium-energy polarized proton scattering near or at 0 deg. . For the handling of the high counting rates at extreme forward angles and for the suppression of small-angle scattering in the graphite analyzer, a high-performance data processing DSP system connecting to the LeCroy FERA and PCOS ECL bus architecture has been made operational and tested successfully. Details of the system and the functions of the various electronic components are described.

  14. Study and optimization of the spatial resolution for detectors with binary readout

    Energy Technology Data Exchange (ETDEWEB)

    Yonamine, R., E-mail: ryo.yonamine@ulb.ac.be; Maerschalk, T.; Lentdecker, G. De

    2016-09-11

    Using simulations and analytical approaches, we have studied single hit resolutions obtained with a binary readout, which is often proposed for high granularity detectors to reduce the generated data volume. Our simulations considering several parameters (e.g. strip pitch) show that the detector geometry and an electronics parameter of the binary readout chips could be optimized for binary readout to offer an equivalent spatial resolution to the one with an analog readout. To understand the behavior as a function of simulation parameters, we developed analytical models that reproduce simulation results with a few parameters. The models can be used to optimize detector designs and operation conditions with regard to the spatial resolution.

  15. A missing factor in chip-based patch clamp assay: gigaseal

    International Nuclear Information System (INIS)

    Ong, W-L; Yobas, L; Ong, W-Y

    2006-01-01

    The 'gold' standard in the study of ionic currents across biological membranes is the Patch Clamp method. However, this is a slow, labor and skill intensive process. High throughput patch clamp devices are mainly chip-based. A major challenge in these miniaturized devices is the low rate of 'Gigaseal' formation which is critical in the study of Single Channel effect. In a conventional patch clamp, a pipette moves and patches a fixed cell (cell-adhered patch) which is grown on the bottom of a Petri dish. In the chip-based case, the cells are in suspension and move towards the fixed patch clamp sites (cell-suspended patch). In this study, using the proven conventional patch clamp setup, we investigated the effect of the differences in the cell configurations between the convention patch clamp and cell-based patch clamp. It is shown that adhered cells (as used in the conventional setup) have a much higher rate of gigaseal formation as compared to the cells in suspension (as used in chip-based devices). We postulate that the arrangement of the cytoskeleton within the cell plays a major part in the formation of the gigaseal

  16. VLSI Design of SVM-Based Seizure Detection System With On-Chip Learning Capability.

    Science.gov (United States)

    Feng, Lichen; Li, Zunchao; Wang, Yuanfa

    2018-02-01

    Portable automatic seizure detection system is very convenient for epilepsy patients to carry. In order to make the system on-chip trainable with high efficiency and attain high detection accuracy, this paper presents a very large scale integration (VLSI) design based on the nonlinear support vector machine (SVM). The proposed design mainly consists of a feature extraction (FE) module and an SVM module. The FE module performs the three-level Daubechies discrete wavelet transform to fit the physiological bands of the electroencephalogram (EEG) signal and extracts the time-frequency domain features reflecting the nonstationary signal properties. The SVM module integrates the modified sequential minimal optimization algorithm with the table-driven-based Gaussian kernel to enable efficient on-chip learning. The presented design is verified on an Altera Cyclone II field-programmable gate array and tested using the two publicly available EEG datasets. Experiment results show that the designed VLSI system improves the detection accuracy and training efficiency.

  17. Piezoresistive microcantilever based lab-on-a-chip system for detection of macronutrients in the soil

    Science.gov (United States)

    Patkar, Rajul S.; Ashwin, Mamta; Rao, V. Ramgopal

    2017-12-01

    Monitoring of soil nutrients is very important in precision agriculture. In this paper, we have demonstrated a micro electro mechanical system based lab-on-a-chip system for detection of various soil macronutrients which are available in ionic form K+, NO3-, and H2PO4-. These sensors are highly sensitive piezoresistive silicon microcantilevers coated with a polymer matrix containing methyltridodecylammonium nitrate ionophore/ nitrate ionophore VI for nitrate sensing, 18-crown-6 ether for potassium sensing and Tributyltin chloride for phosphate detection. A complete lab-on-a-chip system integrating a highly sensitive current excited Wheatstone's bridge based portable electronic setup along with arrays of microcantilever devices mounted on a printed circuit board with a liquid flow cell for on the site experimentation for soil test has been demonstrated.

  18. Direct current insulator based dielectrophoresis (DC-iDEP) microfluidic chip for blood plasma separation

    OpenAIRE

    Mohammadi, Mahdi

    2015-01-01

    Lab-on-a-Chip (LOC) integrated microfluidics has been a powerful tool for new developments in analytical chemistry. These microfluidic systems enable the miniaturization, integration and automation of complex biochemical assays through the reduction of reagent use and enabling portability.Cell and particle separation in microfluidic systems has recently gained significant attention in many sample preparations for clinical procedures. Direct-current insulator-based dielectrophoresis (DC-iDEP) ...

  19. A high-resolution detector based on liquid-core scintillating fibres with readout via an electron-bombarded charge-coupled device

    International Nuclear Information System (INIS)

    Cianfarani, C.; Duane, A.; Fabre, J.P.; Frenkel, A.; Golovkin, S.V.; Gorin, A.M.; Harrison, K.; Kozarenko, E.N.; Kushnirenko, A.E.; Ladygin, E.A.; Martellotti, G.; Medvedkov, A.M.; Nass, P.A.; Obudovski, V.P.; Penso, G.; Petukhov, Yu.P.; Siegmund, W.P.; Tyukov, V.E.; Vasilchenko, V.G.

    1994-01-01

    This paper is a presentation of results from tests in a 5 GeV/c hadron beam of detectors based on liquid-core scintillating fibres, each fibre consisting of a glass capillary filled with organic liquid scintillator. Fibre readout was performed via an Electron-Bombarded Charge-Coupled Device (EBCCD) image tube, a novel instrument that combines the functions of a high-gain, gated image intensifier and a Charge-Coupled Device. Using 1-methylnaphthalene doped with 3 g/l of R45 as liquid scintillator, the attenuation lengths obtained for light propagation over distances greater than 16 cm were 1.5 m in fibres of 20 μm core and 1.0 m in fibres of 16 μm core. For particles that crossed the fibres of 20 μm core at distances of ∼1.8 cm and ∼95 cm from the fibres' readout ends, the recorded hit densities were 5.3 mm -1 and 2.5 mm -1 respectively. Using 1-methylnaphthalene doped with 3.6 g/l of R39 as liquid scintillator and fibres of 75 μm core, the hit density obtained for particles that crossed the fibres at a distance of ∼1.8 cm from their readout ends was 8.5 mm -1 . With a specially designed bundle of tapered fibres, having core diameters that smoothly increase from 16 μm to 75 μm, a spatial precision of 6 μm was measured. (orig.)

  20. Absolute quantification of DNA methylation using microfluidic chip-based digital PCR.

    Science.gov (United States)

    Wu, Zhenhua; Bai, Yanan; Cheng, Zule; Liu, Fangming; Wang, Ping; Yang, Dawei; Li, Gang; Jin, Qinghui; Mao, Hongju; Zhao, Jianlong

    2017-10-15

    Hypermethylation of CpG islands in the promoter region of many tumor suppressor genes downregulates their expression and in a result promotes tumorigenesis. Therefore, detection of DNA methylation status is a convenient diagnostic tool for cancer detection. Here, we reported a novel method for the integrative detection of methylation by the microfluidic chip-based digital PCR. This method relies on methylation-sensitive restriction enzyme HpaII, which cleaves the unmethylated DNA strands while keeping the methylated ones intact. After HpaII treatment, the DNA methylation level is determined quantitatively by the microfluidic chip-based digital PCR with the lower limit of detection equal to 0.52%. To validate the applicability of this method, promoter methylation of two tumor suppressor genes (PCDHGB6 and HOXA9) was tested in 10 samples of early stage lung adenocarcinoma and their adjacent non-tumorous tissues. The consistency was observed in the analysis of these samples using our method and a conventional bisulfite pyrosequencing. Combining high sensitivity and low cost, the microfluidic chip-based digital PCR method might provide a promising alternative for the detection of DNA methylation and early diagnosis of epigenetics-related diseases. Copyright © 2017 Elsevier B.V. All rights reserved.

  1. Remote monitor used on the 13N leak rate measurement system based on single-chip microcomputer

    International Nuclear Information System (INIS)

    Tang Rulong; Qiu Xiaoping; Guo Lanying

    2012-01-01

    It describes a design on Remote Monitor based on single-chip microcomputer, and also presents the design procedure of hardware and software for circuit design, and gives some of specific instructions about the important parts of the design. (authors)

  2. A superhydrophobic chip based on SU-8 photoresist pillars suspended on a silicon nitride membrane

    KAUST Repository

    Marinaro, Giovanni; Accardo, Angelo; De Angelis, Francesco; Dane, Thomas; Weinhausen, Britta; Burghammer, Manfred; Riekel, Christian

    2014-01-01

    We developed a new generation of superhydrophobic chips optimized for probing ultrasmall sample quantities by X-ray scattering and fluorescence techniques. The chips are based on thin Si3N4 membranes with a tailored pattern of SU-8 photoresist pillars. Indeed, aqueous solution droplets can be evaporated and concentrated at predefined positions using a non-periodic pillar pattern. We demonstrated quantitatively the deposition and aggregation of gold glyconanoparticles from the evaporation of a nanomolar droplet in a small spot by raster X-ray nanofluorescence. Further, raster nanocrystallography of biological objects such as rod-like tobacco mosaic virus nanoparticles reveals crystalline macro-domain formation composed of highly oriented nanorods. © 2014 the Partner Organisations.

  3. A superhydrophobic chip based on SU-8 photoresist pillars suspended on a silicon nitride membrane

    KAUST Repository

    Marinaro, Giovanni

    2014-07-28

    We developed a new generation of superhydrophobic chips optimized for probing ultrasmall sample quantities by X-ray scattering and fluorescence techniques. The chips are based on thin Si3N4 membranes with a tailored pattern of SU-8 photoresist pillars. Indeed, aqueous solution droplets can be evaporated and concentrated at predefined positions using a non-periodic pillar pattern. We demonstrated quantitatively the deposition and aggregation of gold glyconanoparticles from the evaporation of a nanomolar droplet in a small spot by raster X-ray nanofluorescence. Further, raster nanocrystallography of biological objects such as rod-like tobacco mosaic virus nanoparticles reveals crystalline macro-domain formation composed of highly oriented nanorods. © 2014 the Partner Organisations.

  4. Design of Water Temperature Control System Based on Single Chip Microcomputer

    Science.gov (United States)

    Tan, Hanhong; Yan, Qiyan

    2017-12-01

    In this paper, we mainly introduce a multi-function water temperature controller designed with 51 single-chip microcomputer. This controller has automatic and manual water, set the water temperature, real-time display of water and temperature and alarm function, and has a simple structure, high reliability, low cost. The current water temperature controller on the market basically use bimetal temperature control, temperature control accuracy is low, poor reliability, a single function. With the development of microelectronics technology, monolithic microprocessor function is increasing, the price is low, in all aspects of widely used. In the water temperature controller in the application of single-chip, with a simple design, high reliability, easy to expand the advantages of the function. Is based on the appeal background, so this paper focuses on the temperature controller in the intelligent control of the discussion.

  5. Extraction, amplification and detection of DNA in microfluidic chip-based assays

    KAUST Repository

    Wu, Jinbo

    2013-12-20

    This review covers three aspects of PCR-based microfluidic chip assays: sample preparation, target amplification, and product detection. We also discuss the challenges related to the miniaturization and integration of each assay and make a comparison between conventional and microfluidic schemes. In order to accomplish these essential assays without human intervention between individual steps, the micro-components for fluid manipulation become critical. We therefore summarize and discuss components such as microvalves (for fluid regulation), pumps (for fluid driving) and mixers (for blending fluids). By combining the above assays and microcomponents, DNA testing of multi-step bio-reactions in microfluidic chips may be achieved with minimal external control. The combination of assay schemes with the use of micro-components also leads to rapid methods for DNA testing via multi-step bioreactions. Contains 259 references.

  6. Hybrid macro-micro fluidics system for a chip-based biosensor

    Science.gov (United States)

    Tamanaha, C. R.; Whitman, L. J.; Colton, R. J.

    2002-03-01

    We describe the engineering of a hybrid fluidics platform for a chip-based biosensor system that combines high-performance microfluidics components with powerful, yet compact, millimeter-scale pump and valve actuators. The microfluidics system includes channels, valveless diffuser-based pumps, and pinch-valves that are cast into a poly(dimethylsiloxane) (PDMS) membrane and packaged along with the sensor chip into a palm-sized plastic cartridge. The microfluidics are driven by pump and valve actuators contained in an external unit (with a volume ~30 cm3) that interfaces kinematically with the PDMS microelements on the cartridge. The pump actuator is a simple-lever, flexure-hinge displacement amplifier that increases the motion of a piezoelectric stack. The valve actuators are an array of cantilevers operated by shape memory alloy wires. All components can be fabricated without the need for complex lithography or micromachining, and can be used with fluids containing micron-sized particulates. Prototypes have been modeled and tested to ensure the delivery of microliter volumes of fluid and the even dispersion of reagents over the chip sensing elements. With this hybrid approach to the fluidics system, the biochemical assay benefits from the many advantages of microfluidics yet we avoid the complexity and unknown reliability of immature microactuator technologies.

  7. Simulation and experimental validation of a SU-8 based PCR thermocycler chip with integrated heaters and temperature sensor

    DEFF Research Database (Denmark)

    El-Ali, Jamil; Perch-Nielsen, Ivan R.; Poulsen, Claus Riber

    2004-01-01

    We present a SU-8 based polymerase chain reaction (PCR) chip with integrated platinum thin film heaters and temperature sensor. The device is fabricated in SU-8 on a glass substrate. The use of SU-8 provides a simple microfabrication process for the PCR chamber, controllable surface properties......C/s, respectively, the performance of the chip is comparable with the best silicon micromachined PCR chips presented in the literature. The SU-8 chamber surface was found to be PCR compatible by amplification of yeast gene ribosomal protein S3 and Campylobacter gene cadF. The PCR compatibility of the chamber...

  8. Intelligent Home Control System Based on Single Chip Microcomputer

    Science.gov (United States)

    Yang, Libo

    2017-12-01

    Intelligent home as a way to achieve the realization of the family information has become an important part of the development of social information, Internet of Things because of its huge application prospects, will be smart home industry in the development process of a more realistic breakthrough in the smart home industry development has great significance. This article is based on easy to implement, easy to operate, close to the use of the design concept, the use of STC89C52 microcontroller as the control core for the control terminal, and including infrared remote control, buttons, Web interface, including multiple control sources to control household appliances. The second chapter of this paper describes the design of the hardware and software part of the specific implementation, the fifth chapter is based on the design of a good function to build a specific example of the environment.

  9. First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

    International Nuclear Information System (INIS)

    Alemi, M.; Campbell, M.; Gys, T.; Mikulec, B.; Piedigrossi, D.; Puertolas, D.; Rosso, E.; Schomaker, R.; Snoeys, W.; Wyllie, K.

    2000-01-01

    We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface

  10. First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

    Energy Technology Data Exchange (ETDEWEB)

    Alemi, M.; Campbell, M.; Gys, T. E-mail: thierry.gys@cern.ch; Mikulec, B.; Piedigrossi, D.; Puertolas, D.; Rosso, E.; Schomaker, R.; Snoeys, W.; Wyllie, K

    2000-07-11

    We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface.

  11. First realization of a tracking detector for high energy physics experiments based on Josephson digital readout circuitry

    CERN Document Server

    Pagano, S; Esposito, A P; Mukhanov, O; Rylov, S

    1999-01-01

    We have designed and realized a prototype of a high energy particle microstrip detector with Josephson readout circuits. The key features of this device are: minimum ionizing particle sensitivity, due to the use of semiconductive sensors, fast speed and radiation hardness, due to the use of superconductive circuitry, and current discrimination, which allows the use of several types of semiconductors as detector (Si, GaAs, CVD-diamond) without loss in performances. The Josephson circuitry, made by a combination of RSFQ and latching logic gates, realizes an 8-bit current discriminator and parallel to serial converter and can be directly interfaced to room temperature electronics. This device, which is designed for application as vertex detector for the Compass and LHC-B accelerator experiments, has been tested with small radioactive sources acid will undergo to a test beam at the CERN SPS facility with 24 GeV/c protons. Current results and future perspectives will be reported. (11 refs).

  12. An FPGA-based slowcontrol module and a baseline shifting extension card for the sampling-ADC readout of the crystal barrel calorimeter

    Energy Technology Data Exchange (ETDEWEB)

    Urff, Georg; Poller, Timo [Helmholtz-Institut fuer Strahlen- und Kernphysik, Bonn (Germany); Collaboration: CBELSA/TAPS-Collaboration

    2016-07-01

    At the electron accelerator ELSA (Bonn) the CBELSA/TAPS experiment investigates the photoproduction of mesons off protons and neutrons. The CsI(Tl)-crystals of the Crystal Barrel calorimeter are being upgraded from a PIN-diode readout to an APD readout. In the context of this upgrade, an FPGA-based Sampling-ADC (SADC) is presently being developed (HK 304). A Slow-control Module for the SADC with TCP/Telnet access has been developed on the basis of a Spartan6 FPGA. Control and monitoring of the SADC's power supply as well as control of parameters of the analog and digital data processing in the SADC is realized via PMBus/I{sup 2}C. The prototype as well as an overview of its functionality will be presented. In order to fully utilize the dynamic input range of the SADCs, an interfacing extension board was designed. It receives the differential signal generated by previous amplification stages and adds an individual DC offset voltage to each channel supplied by a digital-to-analog converter. The circuit and the used techniques as well as simulations and measurements are presented.

  13. Addressing On-Chip Power Converstion and Dissipation Issues in Many-Core System-on-a-Chip Based on Conventional Silicon and Emerging Nanotechnologies

    Science.gov (United States)

    Ashenafi, Emeshaw

    Integrated circuits (ICs) are moving towards system-on-a-chip (SOC) designs. SOC allows various small and large electronic systems to be implemented in a single chip. This approach enables the miniaturization of design blocks that leads to high density transistor integration, faster response time, and lower fabrication costs. To reap the benefits of SOC and uphold the miniaturization of transistors, innovative power delivery and power dissipation management schemes are paramount. This dissertation focuses on on-chip integration of power delivery systems and managing power dissipation to increase the lifetime of energy storage elements. We explore this problem from two different angels: On-chip voltage regulators and power gating techniques. On-chip voltage regulators reduce parasitic effects, and allow faster and efficient power delivery for microprocessors. Power gating techniques, on the other hand, reduce the power loss incurred by circuit blocks during standby mode. Power dissipation (Ptotal = Pstatic and Pdynamic) in a complementary metal-oxide semiconductor (CMOS) circuit comes from two sources: static and dynamic. A quadratic dependency on the dynamic switching power and a more than linear dependency on static power as a form of gate leakage (subthreshold current) exist. To reduce dynamic power loss, the supply power should be reduced. A significant reduction in power dissipation occurs when portions of a microprocessor operate at a lower voltage level. This reduction in supply voltage is achieved via voltage regulators or converters. Voltage regulators are used to provide a stable power supply to the microprocessor. The conventional off-chip switching voltage regulator contains a passive floating inductor, which is difficult to be implemented inside the chip due to excessive power dissipation and parasitic effects. Additionally, the inductor takes a very large chip area while hampering the scaling process. These limitations make passive inductor based on-chip

  14. On-chip photonic microsystem for optical signal processing based on silicon and silicon nitride platforms

    Science.gov (United States)

    Li, Yu; Li, Jiachen; Yu, Hongchen; Yu, Hai; Chen, Hongwei; Yang, Sigang; Chen, Minghua

    2018-04-01

    The explosive growth of data centers, cloud computing and various smart devices is limited by the current state of microelectronics, both in terms of speed and heat generation. Benefiting from the large bandwidth, promising low power consumption and passive calculation capability, experts believe that the integrated photonics-based signal processing and transmission technologies can break the bottleneck of microelectronics technology. In recent years, integrated photonics has become increasingly reliable and access to the advanced fabrication process has been offered by various foundries. In this paper, we review our recent works on the integrated optical signal processing system. We study three different kinds of on-chip signal processors and use these devices to build microsystems for the fields of microwave photonics, optical communications and spectrum sensing. The microwave photonics front receiver was demonstrated with a signal processing range of a full-band (L-band to W-band). A fully integrated microwave photonics transceiver without the on-chip laser was realized on silicon photonics covering the signal frequency of up 10 GHz. An all-optical orthogonal frequency division multiplexing (OFDM) de-multiplier was also demonstrated and used for an OFDM communication system with the rate of 64 Gbps. Finally, we show our work on the monolithic integrated spectrometer with a high resolution of about 20 pm at the central wavelength of 1550 nm. These proposed on-chip signal processing systems potential applications in the fields of radar, 5G wireless communication, wearable devices and optical access networks.

  15. HARDWARE IMPLEMENTATION OF PIPELINE BASED ROUTER DESIGN FOR ON-CHIP NETWORK

    Directory of Open Access Journals (Sweden)

    U. Saravanakumar

    2012-12-01

    Full Text Available As the feature size is continuously decreasing and integration density is increasing, interconnections have become a dominating factor in determining the overall quality of a chip. Due to the limited scalability of system bus, it cannot meet the requirement of current System-on-Chip (SoC implementations where only a limited number of functional units can be supported. Long global wires also cause many design problems, such as routing congestion, noise coupling, and difficult timing closure. Network-on-Chip (NoC architectures have been proposed to be an alternative to solve the above problems by using a packet-based communication network. In this paper, the Circuit-Switched (CS Router was designed and analysed the various parameters such as power, timing and area. The CS router has taken more number of cycles to transfer the data from source to destination. So the pipelining concept was implemented by adding registers in the CS router architecture. The proposed architecture increases the speed of operation and reduces the critical path of the circuit. The router has been implemented using Verilog HDL. The parameters area, power and timing were calculated in 130 nm CMOS technology using Synopsys tool with nominal operating voltage of 1V and packet size is 39 bits. Finally power, area and time of these two routers have been analysed and compared.

  16. VLSI design of an RSA encryption/decryption chip using systolic array based architecture

    Science.gov (United States)

    Sun, Chi-Chia; Lin, Bor-Shing; Jan, Gene Eu; Lin, Jheng-Yi

    2016-09-01

    This article presents the VLSI design of a configurable RSA public key cryptosystem supporting the 512-bit, 1024-bit and 2048-bit based on Montgomery algorithm achieving comparable clock cycles of current relevant works but with smaller die size. We use binary method for the modular exponentiation and adopt Montgomery algorithm for the modular multiplication to simplify computational complexity, which, together with the systolic array concept for electric circuit designs effectively, lower the die size. The main architecture of the chip consists of four functional blocks, namely input/output modules, registers module, arithmetic module and control module. We applied the concept of systolic array to design the RSA encryption/decryption chip by using VHDL hardware language and verified using the TSMC/CIC 0.35 m 1P4 M technology. The die area of the 2048-bit RSA chip without the DFT is 3.9 × 3.9 mm2 (4.58 × 4.58 mm2 with DFT). Its average baud rate can reach 10.84 kbps under a 100 MHz clock.

  17. Field-programmable lab-on-a-chip based on microelectrode dot array architecture.

    Science.gov (United States)

    Wang, Gary; Teng, Daniel; Lai, Yi-Tse; Lu, Yi-Wen; Ho, Yingchieh; Lee, Chen-Yi

    2014-09-01

    The fundamentals of electrowetting-on-dielectric (EWOD) digital microfluidics are very strong: advantageous capability in the manipulation of fluids, small test volumes, precise dynamic control and detection, and microscale systems. These advantages are very important for future biochip developments, but the development of EWOD microfluidics has been hindered by the absence of: integrated detector technology, standard commercial components, on-chip sample preparation, standard manufacturing technology and end-to-end system integration. A field-programmable lab-on-a-chip (FPLOC) system based on microelectrode dot array (MEDA) architecture is presented in this research. The MEDA architecture proposes a standard EWOD microfluidic component called 'microelectrode cell', which can be dynamically configured into microfluidic components to perform microfluidic operations of the biochip. A proof-of-concept prototype FPLOC, containing a 30 × 30 MEDA, was developed by using generic integrated circuits computer aided design tools, and it was manufactured with standard low-voltage complementary metal-oxide-semiconductor technology, which allows smooth on-chip integration of microfluidics and microelectronics. By integrating 900 droplet detection circuits into microelectrode cells, the FPLOC has achieved large-scale integration of microfluidics and microelectronics. Compared to the full-custom and bottom-up design methods, the FPLOC provides hierarchical top-down design approach, field-programmability and dynamic manipulations of droplets for advanced microfluidic operations.

  18. Merlin: a fast versatile readout system for Medipix3

    International Nuclear Information System (INIS)

    Plackett, R; Horswell, I; Gimenez, E N; Marchal, J; Omar, D; Tartoni, N

    2013-01-01

    This contribution reports on the development of a new high rate readout system for the Medipix3 hybrid pixel ASIC developed by the Detector Group at Diamond Light Source. It details the current functionality of the system and initial results from tests on Diamond's B16 beamline. The Merlin system is based on a National Instruments PXI/FlexRIO system running a Xilinx Virtex5 FPGA. It is capable of recording Medipix3 256 by 256 by 12 bit data frames at over 1 kHz in bursts of 1200 frames and running at over 100 Hz continuously to disk or over a TCP/IP link. It is compatible with the standard Medipix3 single chipboards developed at CERN and is capable of driving them over cable lengths of up to 10 m depending on the data rate required. In addition to a standalone graphical interface, a system of remote TCP/IP control and data transfer has been developed to allow easy integration with third party control systems and scripting languages. Two Merlin systems are being deployed on the B16 and I16 beamlines at Diamond and the system has been integrated with the EPICS/GDA control systems used. Results from trigger synchronisation, fast burst and high rate tests made on B16 in March are reported and demonstrate an encouraging reliability and timing accuracy. In addition to normal high resolution imaging applications of Medipix3, the results indicate the system could profitably be used in 'pump and probe' style experiments, where a very accurate, high frame rate is especially beneficial. In addition to these two systems, Merlin is being used by the Detector Group to test the Excalibur 16 chip hybrid modules, and by the LHCb VELO Pixel Upgrade group in their forthcoming testbeams. Additionally the contribution looks forward to further developments and improvements in the system, including full rate quad chip readout capability, multi-FPGA support, long distance optical communication and further functionality enhancements built on the capabilities of the Medipix3 chips.

  19. Merlin: a fast versatile readout system for Medipix3

    Science.gov (United States)

    Plackett, R.; Horswell, I.; Gimenez, E. N.; Marchal, J.; Omar, D.; Tartoni, N.

    2013-01-01

    This contribution reports on the development of a new high rate readout system for the Medipix3 hybrid pixel ASIC developed by the Detector Group at Diamond Light Source. It details the current functionality of the system and initial results from tests on Diamond's B16 beamline. The Merlin system is based on a National Instruments PXI/FlexRIO system running a Xilinx Virtex5 FPGA. It is capable of recording Medipix3 256 by 256 by 12 bit data frames at over 1 kHz in bursts of 1200 frames and running at over 100 Hz continuously to disk or over a TCP/IP link. It is compatible with the standard Medipix3 single chipboards developed at CERN and is capable of driving them over cable lengths of up to 10 m depending on the data rate required. In addition to a standalone graphical interface, a system of remote TCP/IP control and data transfer has been developed to allow easy integration with third party control systems and scripting languages. Two Merlin systems are being deployed on the B16 and I16 beamlines at Diamond and the system has been integrated with the EPICS/GDA control systems used. Results from trigger synchronisation, fast burst and high rate tests made on B16 in March are reported and demonstrate an encouraging reliability and timing accuracy. In addition to normal high resolution imaging applications of Medipix3, the results indicate the system could profitably be used in `pump and probe' style experiments, where a very accurate, high frame rate is especially beneficial. In addition to these two systems, Merlin is being used by the Detector Group to test the Excalibur 16 chip hybrid modules, and by the LHCb VELO Pixel Upgrade group in their forthcoming testbeams. Additionally the contribution looks forward to further developments and improvements in the system, including full rate quad chip readout capability, multi-FPGA support, long distance optical communication and further functionality enhancements built on the capabilities of the Medipix3 chips.

  20. Mission Profile Based Sizing of IGBT Chip Area for PV Inverter Applications

    DEFF Research Database (Denmark)

    Shen, Yanfeng; Wang, Huai; Yang, Yongheng

    2016-01-01

    Maximizing the total energy generation is of importance for Photovoltaic (PV) plants. This paper proposes a method to optimize the IGBT chip area for PV inverters to minimize the annual energy loss of the active switches based on long-term operation conditions (i.e., mission profile). The design...... yearly mission profile. Simulation results are given to verify the thermal characteristics. Furthermore, a Monte Carlo based lifetime evaluation is presented to check the IGBT reliability. The proposed design method enables a reliability-oriented energy optimized sizing of active switches for PV inverter...

  1. Support for Programming Models in Network-on-Chip-based Many-core Systems

    DEFF Research Database (Denmark)

    Rasmussen, Morten Sleth

    This thesis addresses aspects of support for programming models in Network-on- Chip-based many-core architectures. The main focus is to consider architectural support for a plethora of programming models in a single system. The thesis has three main parts. The first part considers parallelization...... models to be supported by a single architecture. The architecture features a specialized network interface processor which allows extensive configurability of the memory system. Based on this architecture, a detailed implementation of the cache coherent shared memory programming model is presented...

  2. Embedded 3D Graphics Core for FPGA-based System-on-Chip Applications

    DEFF Research Database (Denmark)

    Holten-Lund, Hans Erik

    2005-01-01

    This paper presents a 3D graphics accelerator core for an FPGA based system, and illustrates how to build a System-on-Chip containing a Xilinx MicroBlaze soft-core CPU and our 3D graphics accelerator core. The system is capable of running uClinux and hardware accelerated 3D graphics applications......, and the video display which periodically reads from memory to display the final rendered graphics. The graphics core uses internal scratch-pad memory to reduce its external bandwidth requirement, this is achieved by implementing a tile-based rendering algorithm. Reduced external bandwidth means that the power...

  3. LHCb: A new Readout Control system for the LHCb Upgrade

    CERN Multimedia

    Alessio, F

    2012-01-01

    The LHCb experiment has proposed an upgrade towards a full 40 MHz readout system in order to run between five and ten times its initial design luminosity. The entire readout architecture will be upgraded in order to cope with higher sub-detector occupancies, higher rate and higher network load. In this paper, we describe the architecture, functionalities and the first hardware implementation of a new Readout Control system for the LHCb upgrade. The system is based on FPGAs and bi-directional links for the control of the entire readout architecture. First results on the validation of the system are also given.

  4. Physics-based process modeling, reliability prediction, and design guidelines for flip-chip devices

    Science.gov (United States)

    Michaelides, Stylianos

    -down devices without the underfill, based on the thorough understanding of the failure modes. Also, practical design guidelines for material, geometry and process parameters for reliable flip-chip devices have been developed.

  5. The Front-End Readout as an Encoder IC for Magneto-Resistive Linear Scale Sensors

    Directory of Open Access Journals (Sweden)

    Trong-Hieu Tran

    2016-09-01

    Full Text Available This study proposes a front-end readout circuit as an encoder chip for magneto-resistance (MR linear scales. A typical MR sensor consists of two major parts: one is its base structure, also called the magnetic scale, which is embedded with multiple grid MR electrodes, while another is an “MR reader” stage with magnets inside and moving on the rails of the base. As the stage is in motion, the magnetic interaction between the moving stage and the base causes the variation of the magneto-resistances of the grid electrodes. In this study, a front-end readout IC chip is successfully designed and realized to acquire temporally-varying resistances in electrical signals as the stage is in motions. The acquired signals are in fact sinusoids and co-sinusoids, which are further deciphered by the front-end readout circuit via newly-designed programmable gain amplifiers (PGAs and analog-to-digital converters (ADCs. The PGA is particularly designed to amplify the signals up to full dynamic ranges and up to 1 MHz. A 12-bit successive approximation register (SAR ADC for analog-to-digital conversion is designed with linearity performance of ±1 in the least significant bit (LSB over the input range of 0.5–2.5 V from peak to peak. The chip was fabricated by the Taiwan Semiconductor Manufacturing Company (TSMC 0.35-micron complementary metal oxide semiconductor (CMOS technology for verification with a chip size of 6.61 mm2, while the power consumption is 56 mW from a 5-V power supply. The measured integral non-linearity (INL is −0.79–0.95 LSB while the differential non-linearity (DNL is −0.68–0.72 LSB. The effective number of bits (ENOB of the designed ADC is validated as 10.86 for converting the input analog signal to digital counterparts. Experimental validation was conducted. A digital decoder is orchestrated to decipher the harmonic outputs from the ADC via interpolation to the position of the moving stage. It was found that the displacement

  6. Progress on TSV technology for Medipix3RX chip

    Science.gov (United States)

    Sarajlić, M.; Pennicard, D.; Smoljanin, S.; Fritzsch, T.; Zoschke, K.; Graafsma, H.

    2017-12-01

    The progress of Through Silicon Via (TSV) technology for Medipix3RX chip done at DESY is presented here. The goal of this development is to replace the wire bonds in X-ray detectors with TSVs, in order to reduce the dead area between detectors. We obtained the first working chips assembled together with Si based sensors for X-ray detection. The 3D integration technology, including TSV, Re-distribution layer deposition, bump bonding to the Si sensor and bump bonding to the carrier PCB, was done by Fraunhofer Institute IZM in Berlin. After assembly, the module was successfully tested by recording background radiation and making X-ray images of small objects. The active area of the Medipix3RX chip is 14.1 mm×14.1 mm or 256×256 pixels. During TSV processing, the Medipix3RX chip was thinned from 775 μm original thickness, to 130 μm. The diameter of the vias is 40 μm, and the pitch between the vias is 120 μm. A liner filling approach was used to contact the TSV with the RDL on the backside of the Medipix3RX readout chip.

  7. Challenges of arbitrary waveform signal detection by Silicon Photomultipliers as readout for Cherenkov fibre based beam loss monitoring systems

    CERN Document Server

    Vinogradov, Sergey; Nebot del Busto, Eduardo; Kastriotou, Maria; Welsch, Carsten P

    2016-01-01

    Silicon Photomultipliers (SiPMs) are well recognised as very competitive photodetectors due to their exceptional photon number and time resolution, room-temperature low-voltage operation, insensitivity to magnetic fields, compactness, and robustness. Detection of weak light pulses of nanosecond time scale appears to be the best area for SiPM applications because in this case most of the SiPM drawbacks have a rather limited effect on its performance. In contrast to the more typical scintillation and Cherenkov detection applications, which demand information on the number of photons and/or the arrival time of the light pulse only, beam loss monitoring (BLM) systems utilising Cherenkov fibres with photodetector readout have to precisely reconstruct the temporal profile of the light pulse. This is a rather challenging task for any photon detector especially taking into account the high dynamic range of incident signals (100K – 1M) from a few photons to a few percents of destructive losses in a beam line and pre...

  8. Quantifying Asphalt Emulsion-Based Chip Seal Curing Times Using Electrical Resistance Measurements.

    Science.gov (United States)

    2017-04-15

    Chip sealing typically consists of covering a pavement surface with asphalt emulsion into which aggregate chips are embedded. The asphalt emulsion cures through the evaporation of water, thus providing mechanical strength to adhere to the pavement wh...

  9. Flip chip assembly of thinned chips for hybrid pixel detector applications

    CERN Document Server

    Fritzsch, T; Woehrmann, M; Rothermund, M; Huegging, F; Ehrmann, O; Oppermann, H; Lang, K.D

    2014-01-01

    There is a steady trend to ultra-thin microelectronic devices. Especially for future particle detector systems a reduced readout chip thickness is required to limit the loss of tracking precision due to scattering. The reduction of silicon thickness is performed at wafer level in a two-step thinning process. To minimize the risk of wafer breakage the thinned wafer needs to be handled by a carrier during the whole process chain of wafer bumping. Another key process is the flip chip assembly of thinned readout chips onto thin sensor tiles. Besides the prevention of silicon breakage the minimization of chip warpage is one additional task for a high yield and reliable flip chip process. A new technology using glass carrier wafer will be described in detail. The main advantage of this technology is the combination of a carrier support during wafer processing and the chip support during flip chip assembly. For that a glass wafer is glue-bonded onto the backside of the thinned readout chip wafer. After the bump depo...

  10. Detector for the FSD Fourier-diffractometer based on ZnS(Ag)/6LiF scintillation screen and wavelength shifting fibers readout

    International Nuclear Information System (INIS)

    Kuz'min, E.S.; Balagurov, A.M.; Bokuchava, G.D.; Zhuk, V.V.; Kudryashev, V.A.; Bulkin, A.P.; Trunov, V.A.

    2001-01-01

    At the IBR-2 pulsed reactor (FLNP, JINR, Dubna), a specialized time-of-flight instrument Fourier-Stress-Diffractometer (FSD) intended for the measurement of internal stresses in bulk samples by using high-resolution neutron diffraction is under construction. One of the main components of the diffractometer is a new-type detector with combined electronic - geometrical focusing uniting a large solid angle and a small geometry contribution to the instrumental resolution. The first two modules of the detector, based on scintillation screen ZnS(Ag)/ 6 LiF with wavelength shifting fibers readout have been developed and tested. The design of the detector and associated electronics are described. The method of time focusing surface approximation, using the screen flexibility is proposed. Characteristics of the tested modules in comparison with a detector of the previous generation are presented and advantages of the new detector design for high-resolution diffractometry are discussed

  11. Rapid identification of Yersinia pestis and Brucella melitensis by chip-based continuous flow PCR

    Science.gov (United States)

    Dietzsch, Michael; Hlawatsch, Nadine; Melzer, Falk; Tomaso, Herbert; Gärtner, Claudia; Neubauer, Heinrich

    2012-06-01

    To combat the threat of biological agents like Yersinia pestis and Brucella melitensis in bioterroristic scenarios requires fast, easy-to-use and safe identification systems. In this study we describe a system for rapid amplification of specific genetic markers for the identification of Yersinia pestis and Brucella melitensis. Using chip based PCR and continuous flow technology we were able to amplify the targets simultaneously with a 2-step reaction profile within 20 minutes. The subsequent analysis of amplified fragments by standard gel electrophoresis requires another 45 minutes. We were able to detect both pathogens within 75 minutes being much faster than most other nucleic acid amplification technologies.

  12. Self-driven filter-based blood plasma separator microfluidic chip for point-of-care testing

    International Nuclear Information System (INIS)

    Madadi, Hojjat; Casals-Terré, Jasmina; Mohammadi, Mahdi

    2015-01-01

    There is currently a growing need for lab-on-a-chip devices for use in clinical analysis and diagnostics, especially in the area of patient care. The first step in most blood assays is plasma extraction from whole blood. This paper presents a novel, self-driven blood plasma separation microfluidic chip, which can extract more than 0.1 μl plasma from a single droplet of undiluted fresh human blood (∼5 μl). This volume of blood plasma is extracted from whole blood with high purity (more than 98%) in a reasonable time frame (3 to 5 min), and without the need for any external force. This would be the first step towards the realization of a single-use, self-blood test that does not require any external force or power source to deliver and analyze a fresh whole-blood sample, in contrast to the existing time-consuming conventional blood analysis. The prototypes are manufactured in polydimethylsiloxane that has been modified with a strong nonionic surfactant (Silwet L-77) to achieve hydrophilic behavior. The main advantage of this microfluidic chip design is the clogging delay in the filtration area, which results in an increased amount of extracted plasma (0.1 μl). Moreover, the plasma can be collected in one or more 10 μm-deep channels to facilitate the detection and readout of multiple blood assays. This high volume of extracted plasma is achieved thanks to a novel design that combines maximum pumping efficiency without disturbing the red blood cells’ trajectory through the use of different hydrodynamic principles, such as a constriction effect and a symmetrical filtration mode. To demonstrate the microfluidic chip’s functionality, we designed and fabricated a novel hybrid microdevice that exhibits the benefits of both microfluidics and lateral flow immunochromatographic tests. The performance of the presented hybrid microdevice is validated using rapid detection of thyroid stimulating hormone within a single droplet of whole blood. (paper)

  13. The universal read-out controller for CBM at FAIR

    Energy Technology Data Exchange (ETDEWEB)

    Manz, Sebastian; Abel, Norbert; Gebelein, Jano [Kirchhoff-Institut fuer Physik, Heidelberg (Germany); Collaboration: CBM-Collaboration

    2011-07-01

    Since 2007 we design and develop the firmware for the read-out controller (ROC) for data acquisition of the CBM detector at FAIR. While our first implementation solely focused on the nXYTER chip, today we are also designing and implementing readout logic for the GET4 chip which is supposed to be part of the time of flight (TOF) detector. Furthermore, we fully support both Ethernet and Optical transport as two transparent solutions. This addresses the different requirements of a laboratory setup and the final detector setup respectively. The usage of a strict modularization of the Read Out Controller firmware enables us to provide an Universal ROC where front-end specific logic and transport logic can be combined in a very flexible way. Fault tolerance techniques are only required for some of those modules and hence are only implemented there.

  14. An FPGA design flow for reconfigurable network-based multi-processor systems on chip

    NARCIS (Netherlands)

    Kumar, A.; Hansson, M.A; Huisken, J.; Corporaal, H.

    2007-01-01

    Multi-processor systems on chip (MPSoC) platforms are becoming increasingly more heterogeneous and are shifting towards a more communication-centric methodology. Networks on chip (NoC) have emerged as the design paradigm for scalable on-chip communication architectures. As the system complexity

  15. From bioseparation to artificial micro-organs: microfluidic chip based particle manipulation techniques

    Science.gov (United States)

    Stelzle, Martin

    2010-02-01

    Microfluidic device technology provides unique physical phenomena which are not available in the macroscopic world. These may be exploited towards a diverse array of applications in biotechnology and biomedicine ranging from bioseparation of particulate samples to the assembly of cells into structures that resemble the smallest functional unit of an organ. In this paper a general overview of chip-based particle manipulation and separation is given. In the state of the art electric, magnetic, optical and gravitational field effects are utilized. Also, mechanical obstacles often in combination with force fields and laminar flow are employed to achieve separation of particles or molecules. In addition, three applications based on dielectrophoretic forces for particle manipulation in microfluidic systems are discussed in more detail. Firstly, a virus assay is demonstrated. There, antibody-loaded microbeads are used to bind virus particles from a sample and subsequently are accumulated to form a pico-liter sized aggregate located at a predefined position in the chip thus enabling highly sensitive fluorescence detection. Secondly, subcellular fractionation of mitochondria from cell homogenate yields pure samples as was demonstrated by Western Blot and 2D PAGE analysis. Robust long-term operation with complex cell homogenate samples while avoiding electrode fouling is achieved by a set of dedicated technical means. Finally, a chip intended for the dielectrophoretic assembly of hepatocytes and endothelial cells into a structure resembling a liver sinusoid is presented. Such "artificial micro organs" are envisioned as substance screening test systems providing significantly higher predictability with respect to the in vivo response towards a substance under test.

  16. On-chip magnetic bead-based DNA melting curve analysis using a magnetoresistive sensor

    International Nuclear Information System (INIS)

    Rizzi, Giovanni; Østerberg, Frederik W.; Henriksen, Anders D.; Dufva, Martin; Hansen, Mikkel F.

    2015-01-01

    We present real-time measurements of DNA melting curves in a chip-based system that detects the amount of surface-bound magnetic beads using magnetoresistive magnetic field sensors. The sensors detect the difference between the amount of beads bound to the top and bottom sensor branches of the differential sensor geometry. The sensor surfaces are functionalized with wild type (WT) and mutant type (MT) capture probes, differing by a single base insertion (a single nucleotide polymorphism, SNP). Complementary biotinylated targets in suspension couple streptavidin magnetic beads to the sensor surface. The beads are magnetized by the field arising from the bias current passed through the sensors. We demonstrate the first on-chip measurements of the melting of DNA hybrids upon a ramping of the temperature. This overcomes the limitation of using a single washing condition at constant temperature. Moreover, we demonstrate that a single sensor bridge can be used to genotype a SNP. - Highlights: • We apply magnetoresistive sensors to study solid-surface hybridization kinetics of DNA. • We measure DNA melting profiles for perfectly matching DNA duplexes and for a single base mismatch. • We present a procedure to correct for temperature dependencies of the sensor output. • We reliably extract melting temperatures for the DNA hybrids. • We demonstrate direct measurement of differential binding signal for two probes on a single sensor

  17. A new wire chamber front-end system, based on the ASD-8 B chip

    International Nuclear Information System (INIS)

    Kruesemann, B.A.M.; Bassini, R.; Ellinghaus, F.; Frekers, D.; Hagemann, M.; Hannen, V.M.; Heynitz, H. von; Heyse, J.; Rakers, S.; Sohlbach, H.; Woertche, H.J.

    1999-01-01

    The Focal-Plane Polarimeter (FPP) for the Big-Bite Spectrometer van den Berg (Nucl. Instr. and Meth. B 99 (1995) 637ff) at the KVI requires the read-out of four large-area MWPCs and two VDCs with 3872 wires in total. The EUROSUPERNOVA collaboration (SNOVA) developed a digital 16 channel preamplifier front-end board, housing two amplifier-shaper-discriminatorchips ASD-8 B. The main features of this board are a fast single-wire readout, a high integration density, a low power consumption and compatibility to common instrumentation standards. The board represents the first successfully running application of the ASD-8 for wire chamber readout. (author)

  18. Atom-chip based quantum gravimetry for the precise determination of absolute local gravity

    Science.gov (United States)

    Abend, S.

    2015-12-01

    We present a novel technique for the precise measurement of absolute local gravity based on cold atom interferometry. Atom interferometry utilizes the interference of matter waves interrogated by laser light to read out inertial forces. Today's generation of these devices typically operate with test mass samples, that consists of ensembles of laser cooled atoms. Their performance is limited by the velocity spread and finite-size of the test masses that impose systematic uncertainties at the level of a few μGal. Rather than laser cooled atoms we employ quantum degenerate ensembles, so called Bose-Einstein condensates, as ultra-sensitive probes for gravity. These sources offer unique properties in temperature as well as in ensemble size that will allow to overcome the current limitations with the next generation of sensors. Furthermore, atom-chip technologies offer the possibility to generate Bose-Einstein condensates in a fast and reliable way. We show a lab-based prototype that uses the atom-chip itself to retro-reflect the interrogation laser and thus serving as inertial reference inside the vacuum. With this setup it is possible to demonstrate all necessary steps to measure gravity, including the preparation of the source, spanning an interferometer as well as the detection of the output signal, within an area of 1 cm3 right below the atom-chip and to analyze relevant systematic effects. In the framework of the center of excellence geoQ a next generation device is under construction at the Institut für Quantenoptik, that will allow for in-field measurements. This device will feature a state-of-the-art atom-chip source with a high-flux of ultra-cold atoms at a repetition rate of 1-2 Hz. In cooperation with the Müller group at the Institut für Erdmessung the sensor will be characterized in the laboratory first, to be ultimately employed in campaigns to measure the Fennoscandian uplift at the level of 1 μGal. The presented work is part of the center of

  19. A novel gold nanoparticle-DNA aptamer-based plasmonic chip for rapid and sensitive detection of bacterial pathogens

    DEFF Research Database (Denmark)

    Sun, Yi; Phuoc Long, Truong; Wolff, Anders

    2016-01-01

    Gold nanoparticles (AuNPs)-based biosensors are emerging technologies for rapid detection of pathogens. However, it is very challenging to develop chip-based AuNP-biosensors for whole cells. This paper describes a novel AuNPs-DNA aptamer-based plasmonic assay which allows DNA aptamers...

  20. The NA60 experiment readout architecture

    CERN Document Server

    Floris, M; Usai, G L; David, A; Rosinsky, P; Ohnishi, H

    2004-01-01

    The NA60 experiment was designed to identify signatures of a new state of matter, the Quark Gluon Plasma, in heavy-ion collisions at the CERN Super Proton Synchroton. The apparatus is composed of four main detectors: a muon spectrometer (MS), a zero degree calorimeter (ZDC), a silicon vertex telescope (VT), and a silicon microstrip beam tracker (BT). The readout of the whole experiment is based on a PCI architecture. The basic unit is a general purpose PCI card, interfaced to the different subdetectors via custom mezzanine cards. This allowed us to successfully implement several completely different readout protocols (from the VME like protocol of the MS to the custom protocol of the pixel telescope). The system was fully tested with proton and ion beams, and several million events were collected in 2002 and 2003. This paper presents the readout architecture of NA60, with particular emphasis on the PCI layer common to all the subdetectors. (16 refs).

  1. Integrated three-dimensional optical MEMS for chip-based fluorescence detection

    Science.gov (United States)

    Hung, Kuo-Yung; Tseng, Fan-Gang; Khoo, Hwa-Seng

    2009-04-01

    This paper presents a novel fluorescence sensing chip for parallel protein microarray detection in the context of a 3-in-1 protein chip system. This portable microchip consists of a monolithic integration of CMOS-based avalanche photo diodes (APDs) combined with a polymer micro-lens, a set of three-dimensional (3D) inclined mirrors for separating adjacent light signals and a low-noise transformer-free dc-dc boost mini-circuit to power the APDs (ripple below 1.28 mV, 0-5 V input, 142 V and 12 mA output). We fabricated our APDs using the planar CMOS process so as to facilitate the post-CMOS integration of optical MEMS components such as the lenses. The APD arrays were arranged in unique circular patterns appropriate for detecting the specific fluorescently labelled protein spots in our study. The array-type APDs were designed so as to compensate for any alignment error as detected by a positional error signal algorithm. The condenser lens was used as a structure for light collection to enhance the fluorescent signals by about 25%. This element also helped to reduce the light loss due to surface absorption. We fabricated an inclined mirror to separate two adjacent fluorescent signals from different specimens. Excitation using evanescent waves helped reduce the interference of the excitation light source. This approach also reduced the number of required optical lenses and minimized the complexity of the structural design. We achieved detection floors for anti-rabbit IgG and Cy5 fluorescent dye as low as 0.5 ng/µl (~3.268 nM). We argue that the intrinsic nature of point-to-point and batch-detection methods as showcased in our chip offers advantages over the serial-scanning approach used in traditional scanner systems. In addition, our system is low cost and lightweight.

  2. Performance of the ALIBAVA portable readout system with irradiated and non-irradiated microstrip silicon sensors

    International Nuclear Information System (INIS)

    Marco-Hernadez, R.

    2009-01-01

    A readout system for microstrip silicon sensors has been developed as a result of collaboration among the University of Liverpool, the CNM of Barcelona and the IFIC of Valencia. The name of this collaboration is ALIBAVA and it is integrated in the RD50 Collaboration. This system is able to measure the collected charge in one or two microstrip silicon sensors by reading out all the channels of the sensor(s), up to 256, as an analogue measurement. The system uses two Beetle chips to read out the detector(s). The Beetle chip is an analogue pipelined readout chip used in the LHCb experiment. The system can operate either with non-irradiated and irradiated sensors as well as with n-type and p-type microstrip silicon sensors. Heavily irradiated sensors will be used at the SLHC, so this system is being to research the performance of microstrip silicon sensors in conditions as similar as possible to the SLHC operating conditions. The system has two main parts: a hardware part and a software part. The hardware part acquires the sensor signals either from external trigger inputs, in case of a radioactive source setup is used, or from a synchronised trigger output generated by the system, if a laser setup is used. This acquired data is sent by USB to be stored in a PC for a further processing. The hardware is a dual board based system. The daughterboard is a small board intended for containing two Beetle readout chips as well as fan-ins and detector support to interface the sensors. The motherboard is intended to process the data, to control the whole hardware and to communicate with the software by USB. The software controls the system and processes the data acquired from the sensors in order to store it in an adequate format file. The main characteristics of the system will be described. Results of measurements acquired with n-type and p-type irradiated and non-irradiated detectors using both the laser and the radioactive source setup will be also presented and discussed

  3. Variable self-powered light detection CMOS chip with real-time adaptive tracking digital output based on a novel on-chip sensor.

    Science.gov (United States)

    Wang, HongYi; Fan, Youyou; Lu, Zhijian; Luo, Tao; Fu, Houqiang; Song, Hongjiang; Zhao, Yuji; Christen, Jennifer Blain

    2017-10-02

    This paper provides a solution for a self-powered light direction detection with digitized output. Light direction sensors, energy harvesting photodiodes, real-time adaptive tracking digital output unit and other necessary circuits are integrated on a single chip based on a standard 0.18 µm CMOS process. Light direction sensors proposed have an accuracy of 1.8 degree over a 120 degree range. In order to improve the accuracy, a compensation circuit is presented for photodiodes' forward currents. The actual measurement precision of output is approximately 7 ENOB. Besides that, an adaptive under voltage protection circuit is designed for variable supply power which may undulate with temperature and process.

  4. Wideband pulse amplifiers for the NECTAr chip

    Science.gov (United States)

    Sanuy, A.; Delagnes, E.; Gascon, D.; Sieiro, X.; Bolmont, J.; Corona, P.; Feinstein, F.; Glicenstein, J.-F.; Naumann, C. L.; Nayman, P.; Ribó, M.; Tavernet, J.-P.; Toussenel, F.; Vincent, P.; Vorobiov, S.

    2012-12-01

    The NECTAr collaboration's FE option for the camera of the CTA is a 16 bits and 1-3 GS/s sampling chip based on analog memories including most of the readout functions. This works describes the input amplifiers of the NECTAr ASIC. A fully differential wideband amplifier, with voltage gain up to 20 V/V and a BW of 400 MHz. As it is impossible to design a fully differential OpAmp with an 8 GHz GBW product in a 0.35 CMOS technology, an alternative implementation based on HF linearized transconductors is explored. The output buffer is a class AB miller operational amplifier, with special non-linear current boost.

  5. Wideband pulse amplifiers for the NECTAr chip

    International Nuclear Information System (INIS)

    Sanuy, A.; Delagnes, E.; Gascon, D.; Sieiro, X.; Bolmont, J.; Corona, P.; Feinstein, F.; Glicenstein, J-F.; Naumann, C.L.; Nayman, P.; Ribó, M.

    2012-01-01

    The NECTAr collaboration's FE option for the camera of the CTA is a 16 bits and 1–3 GS/s sampling chip based on analog memories including most of the readout functions. This works describes the input amplifiers of the NECTAr ASIC. A fully differential wideband amplifier, with voltage gain up to 20 V/V and a BW of 400 MHz. As it is impossible to design a fully differential OpAmp with an 8 GHz GBW product in a 0.35 CMOS technology, an alternative implementation based on HF linearized transconductors is explored. The output buffer is a class AB miller operational amplifier, with special non-linear current boost.

  6. Wideband pulse amplifiers for the NECTAr chip

    Energy Technology Data Exchange (ETDEWEB)

    Sanuy, A., E-mail: asanuy@ecm.ub.es [Dept. AM i Dept. ECM, Institut de Ciencies del Cosmos (ICC), Universitat de Barcelona. Marti i Franques 1, E08028, Barcelona (Spain); Delagnes, E. [IRFU/DSM/CEA, CE-Saclay, Bat. 141 SEN Saclay, F-91191, Gif-sur-Yvette (France); Gascon, D. [Dept. AM i Dept. ECM, Institut de Ciencies del Cosmos (ICC), Universitat de Barcelona. Marti i Franques 1, E08028, Barcelona (Spain); Sieiro, X. [Departament d' Electronica, Universitat de Barcelona. Marti i Franques 1, E08028, Barcelona (Spain); Bolmont, J.; Corona, P. [LPNHE, Universite Paris VI and Universite Paris VII and IN2P3/CNRS, Barre 12-22, 1er etage, 4 place Jussieu, 75252 Paris (France); Feinstein, F. [LUPM, Universite Montpellier II and IN2P3/CNRS, CC072, bat. 13, place Eugene Bataillon, 34095 Montpellier (France); Glicenstein, J-F. [IRFU/DSM/CEA, CE-Saclay, Bat. 141 SEN Saclay, F-91191, Gif-sur-Yvette (France); Naumann, C.L.; Nayman, P. [LPNHE, Universite Paris VI and Universite Paris VII and IN2P3/CNRS, Barre 12-22, 1er etage, 4 place Jussieu, 75252 Paris (France); Ribo, M. [Dept. AM i Dept. ECM, Institut de Ciencies del Cosmos (ICC), Universitat de Barcelona. Marti i Franques 1, E08028, Barcelona (Spain); and others

    2012-12-11

    The NECTAr collaboration's FE option for the camera of the CTA is a 16 bits and 1-3 GS/s sampling chip based on analog memories including most of the readout functions. This works describes the input amplifiers of the NECTAr ASIC. A fully differential wideband amplifier, with voltage gain up to 20 V/V and a BW of 400 MHz. As it is impossible to design a fully differential OpAmp with an 8 GHz GBW product in a 0.35 CMOS technology, an alternative implementation based on HF linearized transconductors is explored. The output buffer is a class AB miller operational amplifier, with special non-linear current boost.

  7. Feasibility study of a green energy powered thermoelectric chip based air conditioner for electric vehicles

    International Nuclear Information System (INIS)

    Miranda, Á.G.; Chen, T.S.; Hong, C.W.

    2013-01-01

    Traditional compressed-refrigerant air conditioning systems consume substantial energy that may reduce the driving performance and cruising mileage of electric vehicles considerably. It is crucial to design a new climate control system, using a direct energy conversion principle, to further aid in the commercialization of modern electric vehicles. A solid state air conditioner model consisting on TECs (thermoelectric chips) as the load, DSSCs (dye sensitized solar cells) as the renewable energy source and high power LiBs (lithium-ion batteries) as an energy storage device are considered for a personal mobility vehicle. The power management between the main power net and the solid state air conditioner interface is designed with an outer proportional-integral controller and an inner passivity based current controller with a loss included model for perfect tracking. This model is intended to comprise thermal and electrical elements which can be tunable for performance benchmarking and optimization of a solid state air conditioning system. Dynamic performance simulations of the solid-state air conditioner are performed, alongside guidelines for feasibility. - Highlights: • Alternative model extraction for dye sensitized solar cells. • Improved and computationally fast model for the cabin air temperature dynamics. • Euler–Lagrange loss included modeling of a buck converter. • Loss-included passivity based inner loop current control. • The thermoelectric chip air conditioner is tested in simulated cooling/heating scenarios

  8. TrackCC: A Practical Wireless Indoor Localization System Based on Less-Expensive Chips

    Directory of Open Access Journals (Sweden)

    Xiaolong Li

    2017-06-01

    Full Text Available This paper aims at proposing a new wireless indoor localization system (ILS, called TrackCC, based on a commercial type of low-power system-on-chip (SoC, nRF24LE1. This type of chip has only l output power levels and acute fluctuation for a received minimum power level in operation, which give rise to many practical challenges for designing localization algorithms. In order to address these challenges, we exploit the Markov theory to construct a ( l + 1 × ( l + 1 -sized state transition matrix to remove the fluctuation, and then propose a priority-based pattern matching algorithm to search for the most similar match in the signal map to estimate the real position of unknown nodes. The experimental results show that, compared to two existing wireless ILSs, LANDMARC and SAIL, which have meter level positioning accuracy, the proposed TrackCC can achieve the decimeter level accuracy on average in both line-of-sight (LOS and non-line-of-sight (NLOS senarios.

  9. Advances in OLED/OPD-based sensors and spectrometer-on-a-chip (Conference Presentation)

    Science.gov (United States)

    Shinar, Joseph; Kaudal, Rajiv; Manna, Eeshita; Fungura, Fadzai; Shinar, Ruth

    2016-09-01

    We describe ongoing advances toward achieving all-organic optical sensors and a spectrometer on a chip. Two-dimensional combinatorial arrays of microcavity OLEDs (μcOLEDs) with systematically varying optical cavity lengths are fabricated on a single chip by changing the thickness of different organic and/or spacer layers sandwiched between two metal electrodes (one very thin) that form the cavity. The broad spectral range is achieved by utilizing materials that result in white OLEDs (WOLEDs) when fabricated on a standard ITO substrate. The tunable and narrower emissions from the μcOLEDs serve as excitation sources in luminescent sensors and in monitoring light absorption. For each wavelength, the light from the μcOLED is partially absorbed by a sample under study and the light emitted by an electronically excited sample, or the transmitted light is detected by a photodetector (PD). To obtain a compact monitor, an organic PD (OPD) or a perovskite-based PD is integrated with the μcOLED array. We show the potential of encompassing a broader wavelength range by using WOLED materials to fabricate the μcOLEDs. The utility of the all-organic analytical devices is demonstrated by monitoring oxygen, and bioanalytes based on oxygen detection, as well as the absorption spectra of dyes.

  10. SAD-Based Stereo Vision Machine on a System-on-Programmable-Chip (SoPC)

    Science.gov (United States)

    Zhang, Xiang; Chen, Zhangwei

    2013-01-01

    This paper, proposes a novel solution for a stereo vision machine based on the System-on-Programmable-Chip (SoPC) architecture. The SOPC technology provides great convenience for accessing many hardware devices such as DDRII, SSRAM, Flash, etc., by IP reuse. The system hardware is implemented in a single FPGA chip involving a 32-bit Nios II microprocessor, which is a configurable soft IP core in charge of managing the image buffer and users' configuration data. The Sum of Absolute Differences (SAD) algorithm is used for dense disparity map computation. The circuits of the algorithmic module are modeled by the Matlab-based DSP Builder. With a set of configuration interfaces, the machine can process many different sizes of stereo pair images. The maximum image size is up to 512 K pixels. This machine is designed to focus on real time stereo vision applications. The stereo vision machine offers good performance and high efficiency in real time. Considering a hardware FPGA clock of 90 MHz, 23 frames of 640 × 480 disparity maps can be obtained in one second with 5 × 5 matching window and maximum 64 disparity pixels. PMID:23459385

  11. Rapid and Low-Cost CRP Measurement by Integrating a Paper-Based Microfluidic Immunoassay with Smartphone (CRP-Chip)

    Science.gov (United States)

    Dong, Meili; Wu, Jiandong; Ma, Zimin; Peretz-Soroka, Hagit; Zhang, Michael; Komenda, Paul; Tangri, Navdeep; Liu, Yong; Rigatto, Claudio; Lin, Francis

    2017-01-01

    Traditional diagnostic tests for chronic diseases are expensive and require a specialized laboratory, therefore limiting their use for point-of-care (PoC) testing. To address this gap, we developed a method for rapid and low-cost C-reactive protein (CRP) detection from blood by integrating a paper-based microfluidic immunoassay with a smartphone (CRP-Chip). We chose CRP for this initial development because it is a strong biomarker of prognosis in chronic heart and kidney disease. The microfluidic immunoassay is realized by lateral flow and gold nanoparticle-based colorimetric detection of the target protein. The test image signal is acquired and analyzed using a commercial smartphone with an attached microlens and a 3D-printed chip–phone interface. The CRP-Chip was validated for detecting CRP in blood samples from chronic kidney disease patients and healthy subjects. The linear detection range of the CRP-Chip is up to 2 μg/mL and the detection limit is 54 ng/mL. The CRP-Chip test result yields high reproducibility and is consistent with the standard ELISA kit. A single CRP-Chip can perform the test in triplicate on a single chip within 15 min for less than 50 US cents of material cost. This CRP-Chip with attractive features of low-cost, fast test speed, and integrated easy operation with smartphones has the potential to enable future clinical PoC chronic disease diagnosis and risk stratification by parallel measurements of a panel of protein biomarkers. PMID:28346363

  12. GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

    Energy Technology Data Exchange (ETDEWEB)

    Campbell, M. [CERN/MediPix Consortium, Geneva (Switzerland); Heijne, E.H.M. [CERN/MediPix Consortium, Geneva (Switzerland); Llopart, X. [CERN/MediPix Consortium, Geneva (Switzerland); Colas, P. [DAPNIA, CEA Saclay, 91191 Gif sur Yvette Cedex (France); Giganon, A. [DAPNIA, CEA Saclay, 91191 Gif sur Yvette Cedex (France); Giomataris, Y. [DAPNIA, CEA Saclay, 91191 Gif sur Yvette Cedex (France); Chefdeville, M. [NIKHEF, Amsterdam (Netherlands); Colijn, A.P. [NIKHEF, Amsterdam (Netherlands); Fornaini, A. [NIKHEF, Amsterdam (Netherlands); Graaf, H. van der [NIKHEF, Amsterdam (Netherlands)]. E-mail: vdgraaf@nikhef.nl; Kluit, P. [NIKHEF, Amsterdam (Netherlands); Timmermans, J. [NIKHEF, Amsterdam (Netherlands); Visschers, J.L. [NIKHEF, Amsterdam (Netherlands); Schmitz, J. [University of Twente/MESA (Netherlands)

    2006-05-01

    A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50{mu}m above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as {delta}-rays. With a gas layer thickness of only 1mm, the device could be applied as vertex detector, outperforming all Si-based detectors.

  13. GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

    International Nuclear Information System (INIS)

    Campbell, M.; Heijne, E.H.M.; Llopart, X.; Colas, P.; Giganon, A.; Giomataris, Y.; Chefdeville, M.; Colijn, A.P.; Fornaini, A.; Graaf, H. van der; Kluit, P.; Timmermans, J.; Visschers, J.L.; Schmitz, J.

    2006-01-01

    A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50μm above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as δ-rays. With a gas layer thickness of only 1mm, the device could be applied as vertex detector, outperforming all Si-based detectors

  14. GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

    Science.gov (United States)

    Campbell, M.; Heijne, E. H. M.; Llopart, X.; Colas, P.; Giganon, A.; Giomataris, Y.; Chefdeville, M.; Colijn, A. P.; Fornaini, A.; van der Graaf, H.; Kluit, P.; Timmermans, J.; Visschers, J. L.; Schmitz, J.

    2006-05-01

    A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50 μm above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as δ-rays. With a gas layer thickness of only 1 mm, the device could be applied as vertex detector, outperforming all Si-based detectors.

  15. Evaluation of mixed-signal noise effects in photon-counting X-ray image sensor readout circuits

    International Nuclear Information System (INIS)

    Lundgren, Jan; Abdalla, Suliman; O'Nils, Mattias; Oelmann, Bengt

    2006-01-01

    In readout electronics for photon-counting pixel detectors, the tight integration between analog and digital blocks causes the readout electronics to be sensitive to on-chip noise coupling. This noise coupling can result in faulty luminance values in grayscale X-ray images, or as color distortions in a color X-ray imaging system. An exploration of simulating noise coupling in readout circuits is presented which enables the discovery of sensitive blocks at as early a stage as possible, in order to avoid costly design iterations. The photon-counting readout system has been simulated for noise coupling in order to highlight the existing problems of noise coupling in X-ray imaging systems. The simulation results suggest that on-chip noise coupling should be considered and simulated in future readout electronics systems for X-ray detectors

  16. A single-walled carbon nanotube thin film-based pH-sensing microfluidic chip.

    Science.gov (United States)

    Li, Cheng Ai; Han, Kwi Nam; Pham, Xuan-Hung; Seong, Gi Hun

    2014-04-21

    A novel microfluidic pH-sensing chip was developed based on pH-sensitive single-walled carbon nanotubes (SWCNTs). In this study, the SWCNT thin film acted both as an electrode and a pH-sensitive membrane. The potentiometric pH response was observed by electronic structure changes in the semiconducting SWCNTs in response to the pH level. In a microfluidic chip consisting of a SWCNT pH-sensing working electrode and an Ag/AgCl reference electrode, the calibration plot exhibited promising pH-sensing performance with an ideal Nernstian response of 59.71 mV pH(-1) between pH 3 and 11 (standard deviation of the sensitivity is 1.5 mV pH(-1), R(2) = 0.985). Moreover, the SWCNT electrode in the microfluidic device showed no significant variation at any pH value in the range of the flow rate between 0.1 and 15 μl min(-1). The selectivity coefficients of the SWCNT electrode revealed good selectivity against common interfering ions.

  17. Silicon based cryogenic platform for the integration of qubit and classical control chips

    Science.gov (United States)

    Leonhardt, T.; Hollmann, A.; Jirovec, D.; Neumann, R.; Klemt, B.; Kindel, S.; Kucharski, M.; Fischer, G.; Bougeard, D.; Bluhm, H.; Schreiber, L. R.

    Electrostatically confined electron-spin-qubits proved viable for quantum information processing. Yet their up-scaling not only demands improvement of physical qubits, but also the development and cryogenic integration of classical control hardware. Therefore, we created a platform to integrate quantum chips and classical electronics. These multilayer interposer chips incorporate passive circuit elements, high bandwidth coplanar wave guides and interconnects for electron spin resonant qubit control as well as low impedance DC microstrips reducing EM-crosstalk from AC to DC lines. We used the interposer for measurements of a Si/SiGe quantum dot at 30 mK. We also characterized a commercial voltage controlled oszillator (VCO) based on hetero-bipolar transistors. Tunable about 30 GHz it is ideal for electron spin resonant qubit control. Cooled from 300 to 4 K it exhibits a slightly increased output power and frequency, while the phase noise level is constant. The device remains functional up to magnetic fields of 6 T.

  18. Design of automatic curtain controlled by wireless based on single chip 51 microcomputer

    Science.gov (United States)

    Han, Dafeng; Chen, Xiaoning

    2017-08-01

    In order to realize the wireless control of the domestic intelligent curtains, a set of wireless intelligent curtain control system based on 51 single chip microcomputer have been designed in this paper. The intelligent curtain can work in the manual mode, automatic mode and sleep mode and can be carried out by the button and mobile phone APP mode loop switch. Through the photosensitive resistance module and human pyroelectric infrared sensor to collect the indoor light value and the data whether there is the person in the room, and then after single chip processing, the motor drive module is controlled to realize the positive inversion of the asynchronous motor, the intelligent opening and closing of the curtain have been realized. The operation of the motor can be stopped under the action of the switch and the curtain opening and closing and timing switch can be controlled through the keys and mobile phone APP. The optical fiber intensity, working mode, curtain state and system time are displayed by LCD1602. The system has a high reliability and security under practical testing and with the popularity and development of smart home, the design has broad market prospects.

  19. Ultracompact on-chip photothermal power monitor based on silicon hybrid plasmonic waveguides

    Directory of Open Access Journals (Sweden)

    Wu Hao

    2017-01-01

    Full Text Available We propose and demonstrate an ultracompact on-chip photothermal power monitor based on a silicon hybrid plasmonic waveguide (HPWG, which consists of a metal strip, a silicon core, and a silicon oxide (SiO2 insulator layer between them. When light injected to an HPWG is absorbed by the metal strip, the temperature increases and the resistance of the metal strip changes accordingly due to the photothermal and thermal resistance effects of the metal. Therefore, the optical power variation can be monitored by measuring the resistance of the metal strip on the HPWG. To obtain the electrical signal for the resistance measurement conveniently, a Wheatstone bridge circuit is monolithically integrated with the HPWG on the same chip. As the HPWG has nanoscale light confinement, the present power monitor is as short as ~3 μm, which is the smallest photothermal power monitor reported until now. The compactness helps to improve the thermal efficiency and the response speed. For the present power monitor fabricated with simple fabrication processes, the measured responsivity is as high as about 17.7 mV/mW at a bias voltage of 2 V and the power dynamic range is as large as 35 dB.

  20. Development of an external readout electronics for a hybrid photon detector

    CERN Document Server

    Uyttenhove, Simon; Tichon, Jacques; Garcia, Salvador

    The pixel hybrid photon detectors currently installed in the LHCb Cherenkov system encapsulate readout electronics in the vacuum tube envelope. The LHCb upgrade and the new trigger system will require their replacement with new photon detectors. The baseline photon detector candidate is the multi-anode photomultiplier. A hybrid photon detector with external readout electronics has been proposed as a backup option. This master thesis covers a R & D phase to investigate this latter concept. Extensive studies of the initial electronics system underlined the noise contributions from the Beetle chip used as front-end readout ASIC and from the ceramic carrier of the photon detector. New front-end electronic boards have been developed and made fully compatible with the existing LHCb-RICH infrastructure. With this compact readout system, Cherenkov photons have been successfully detected in a real particle beam environment. The proof-of-concept of a hybrid photon detector with external readout electronics was val...

  1. The AMS silicon tracker readout, performance results with minimum ionizing particles

    CERN Document Server

    Alpat, B; Battiston, R; Bourquin, Maurice; Burger, W J; Extermann, Pierre; Chang, Y H; Hou, S R; Pauluzzi, M; Produit, N; Qiu, S; Rapin, D; Ribordy, R; Toker, O; Wu, S X

    2000-01-01

    First results for the AMS silicon tracker readout performance are presented. Small 20.0*20.0*0.300 mm/sup 3/ silicon microstrip detectors were installed in a 50 GeV electron beam at CERN. The detector readout consisted of prototypes of the tracker data reduction card equipped with a 12-bit ADC and the tracker frontend hybrid with VA_hdr readout chips. The system performance is assessed in terms of signal-to-noise, position resolution, and efficiency. (13 refs).

  2. Recent advances in particle and droplet manipulation for lab-on-a-chip devices based on surface acoustic waves.

    Science.gov (United States)

    Wang, Zhuochen; Zhe, Jiang

    2011-04-07

    Manipulation of microscale particles and fluid liquid droplets is an important task for lab-on-a-chip devices for numerous biological researches and applications, such as cell detection and tissue engineering. Particle manipulation techniques based on surface acoustic waves (SAWs) appear effective for lab-on-a-chip devices because they are non-invasive, compatible with soft lithography micromachining, have high energy density, and work for nearly any type of microscale particles. Here we review the most recent research and development of the past two years in SAW based particle and liquid droplet manipulation for lab-on-a-chip devices including particle focusing and separation, particle alignment and patterning, particle directing, and liquid droplet delivery.

  3. UW VLSI chip tester

    Science.gov (United States)

    McKenzie, Neil

    1989-12-01

    We present a design for a low-cost, functional VLSI chip tester. It is based on the Apple MacIntosh II personal computer. It tests chips that have up to 128 pins. All pin drivers of the tester are bidirectional; each pin is programmed independently as an input or an output. The tester can test both static and dynamic chips. Rudimentary speed testing is provided. Chips are tested by executing C programs written by the user. A software library is provided for program development. Tests run under both the Mac Operating System and A/UX. The design is implemented using Xilinx Logic Cell Arrays. Price/performance tradeoffs are discussed.

  4. Atom-chip-based quantum gravimetry for the precise determination of absolute gravity

    Science.gov (United States)

    Abend, Sven; Schubert, Christian; Ertmer, Wolfgang; Rasel, Ernst

    2017-04-01

    We present a novel technique for the precise measurement of absolute local gravity with a quantum gravimeter based on an atom chip. Atom interferometry utilizes the interference of matter waves interrogated by laser light to read out inertial forces. Today's generation of these devices typically operate with test mass samples, that consists of ensembles of laser cooled atoms. Their performance is limited by the velocity spread and finite-size of the test masses that impose systematic uncertainties at the level of a few μGal [1]. Rather than laser cooled atoms we employ quantum degenerate ensembles, so called Bose-Einstein condensates [2], as ultra-sensitive probes for gravity. These sources offer unique properties that will allow to overcome the current limitations in the next generation of sensors. Furthermore, atom-chip technology offers the possibility to generate Bose-Einstein condensates in a fast and reliable way. We present a lab-based prototype that uses the atom chip itself to retro-reflect the interrogation laser and thus serves as inertial reference inside the vacuum [3]. With this setup, it is possible to demonstrate all necessary steps to measure gravity, including the preparation of the source, spanning an interferometer as well as the detection of the output signal. All steps are pursued on a baseline of 1 cm right below the atom chip and to analyze relevant systematic effects. In the framework of the center of excellence geoQ a next generation device is under construction at the Institut für Quantenoptik, that will target for in-field measurements. This device will feature a state-of-the-art atom-chip source with a high-flux of ultra-cold atoms at a repetition rate of 1-2 Hz [4]. The device will be characterized in cooperation with the Müller group at the Institut für Erdmessung the sensor and finally employed in a campaign to measure the Fennoscandian uplift at the level of 1 μGal. The presented work is supported by the CRC 1227 DQ-mat, the

  5. A High-Speed, Event-Driven, Active Pixel Sensor Readout for Photon-Counting Microchannel Plate Detectors

    Science.gov (United States)

    Kimble, Randy A.; Pain, Bedabrata; Norton, Timothy J.; Haas, J. Patrick; Oegerle, William R. (Technical Monitor)

    2002-01-01

    Silicon array readouts for microchannel plate intensifiers offer several attractive features. In this class of detector, the electron cloud output of the MCP intensifier is converted to visible light by a phosphor; that light is then fiber-optically coupled to the silicon array. In photon-counting mode, the resulting light splashes on the silicon array are recognized and centroided to fractional pixel accuracy by off-chip electronics. This process can result in very high (MCP-limited) spatial resolution while operating at a modest MCP gain (desirable for dynamic range and long term stability). The principal limitation of intensified CCD systems of this type is their severely limited local dynamic range, as accurate photon counting is achieved only if there are not overlapping event splashes within the frame time of the device. This problem can be ameliorated somewhat by processing events only in pre-selected windows of interest of by using an addressable charge injection device (CID) for the readout array. We are currently pursuing the development of an intriguing alternative readout concept based on using an event-driven CMOS Active Pixel Sensor. APS technology permits the incorporation of discriminator circuitry within each pixel. When coupled with suitable CMOS logic outside the array area, the discriminator circuitry can be used to trigger the readout of small sub-array windows only when and where an event splash has been detected, completely eliminating the local dynamic range problem, while achieving a high global count rate capability and maintaining high spatial resolution. We elaborate on this concept and present our progress toward implementing an event-driven APS readout.

  6. Studies for an upgrade of ALICE Inner Tracking System: Pixel chip characterization

    Directory of Open Access Journals (Sweden)

    Park Jonghan

    2017-01-01

    Full Text Available Inner Tracking System (ITS of ALICE is used for vertex determination and tracking. Future heavy-ion program at the LHC aims to run with high luminosity. To address this challenge, upgrade program of ITS is underway, which aims at better position resolution (factor of 3, high detection efficiency (>99%, high-rate readout capabilities (100 kHz for Pb-Pb and moderate radiation hardness (> 700 krad. The new ITS will be composed with 7 layers of silicon pixel chip based on Monolithic Active Pixel Sensor (MAPS technology. The characterization test of various version of prototype chips at different phases of development has been performed. This contribution will provide the main characterization results obtained from the measurements performed at laboratories and using test beam for finalizing the pixel chip specification.

  7. Fluorescence Lifetime Readouts of Troponin-C-Based Calcium FRET Sensors: A Quantitative Comparison of CFP and mTFP1 as Donor Fluorophores

    Science.gov (United States)

    Laine, Romain; Stuckey, Daniel W.; Manning, Hugh; Warren, Sean C.; Kennedy, Gordon; Carling, David

    2012-01-01

    We have compared the performance of two Troponin-C-based calcium FRET sensors using fluorescence lifetime read-outs. The first sensor, TN-L15, consists of a Troponin-C fragment inserted between CFP and Citrine while the second sensor, called mTFP-TnC-Cit, was realized by replacing CFP in TN-L15 with monomeric Teal Fluorescent Protein (mTFP1). Using cytosol preparations of transiently transfected mammalian cells, we have measured the fluorescence decay profiles of these sensors at controlled concentrations of calcium using time-correlated single photon counting. These data were fitted to discrete exponential decay models using global analysis to determine the FRET efficiency, fraction of donor molecules undergoing FRET and calcium affinity of these sensors. We have also studied the decay profiles of the donor fluorescent proteins alone and determined the sensitivity of the donor lifetime to temperature and emission wavelength. Live-cell fluorescence lifetime imaging (FLIM) of HEK293T cells expressing each of these sensors was also undertaken. We confirmed that donor fluorescence of mTFP-TnC-Cit fits well to a two-component decay model, while the TN-L15 lifetime data was best fitted to a constrained four-component model, which was supported by phasor analysis of the measured lifetime data. If the constrained global fitting is employed, the TN-L15 sensor can provide a larger dynamic range of lifetime readout than the mTFP-TnC-Cit sensor but the CFP donor is significantly more sensitive to changes in temperature and emission wavelength compared to mTFP and, while the mTFP-TnC-Cit solution phase data broadly agreed with measurements in live cells, this was not the case for the TN-L15 sensor. Our titration experiment also indicates that a similar precision in determination of calcium concentration can be achieved with both FRET biosensors when fitting a single exponential donor fluorescence decay model to the fluorescence decay profiles. We therefore suggest that mTFP-based

  8. Readout electronics development for the ATLAS silicon tracker

    International Nuclear Information System (INIS)

    Borer, K.; Beringer, J.; Anghinolfi, F.; Aspell, P.; Chilingarov, A.; Jarron, P.; Heijne, E.H.M.; Santiard, J.C.; Verweij, H.; Goessling, C.; Lisowski, B.; Reichold, A.; Bonino, R.; Clark, A.G.; Kambara, H.; La Marra, D.; Leger, A.; Wu, X.; Richeux, J.P.; Taylor, G.N.; Fedotov, M.; Kuper, E.; Velikzhanin, Yu.; Campbell, D.; Murray, P.; Seller, P.

    1995-01-01

    We present the status of the development of the readout electronics for the large area silicon tracker of the ATLAS experiment at the LHC, carried out by the CERN RD2 project. Our basic readout concept is to integrate a fast amplifier, analog memory, sparse data scan circuit and analog-to-digital convertor (ADC) on a single VLSI chip. This architecture will provide full analog information of charged particle hits associated unambiguously to one LHC beam crossing, which is expected to be at a frequency of 40 MHz. The expected low occupancy of the ATLAS inner silicon detectors allows us to use a low speed (5 MHz) on-chip ADC with a multiplexing scheme. The functionality of the fast amplifier and analog memory have been demonstrated with various prototype chips. Most recently we have successfully tested improved versions of the amplifier and the analog memory. A piecewise linear ADC has been fabricated and performed satisfactorily up to 5 MHz. A new chip including amplifier, analog memory, memory controller, ADC, and data buffer has been designed and submitted for fabrication and will be tested on a prototype of the ATLAS silicon tracker module with realistic electrical and mechanical constraints. (orig.)

  9. Time-Based Readout of a Silicon Photomultiplier (SiPM) for Time of Flight Positron Emission Tomography (TOF-PET)

    CERN Document Server

    Powolny, F; Brunner, S E; Hillemanns, H; Meyer, T; Garutti, E; Williams, M C S; Auffray, E; Shen, W; Goettlich, M; Jarron, P; Schultz-Coulon, H C

    2011-01-01

    Time of flight (TOF) measurements in positron emission tomography (PET) are very challenging in terms of timing performance, and should ideally achieve less than 100 ps FWHM precision. We present a time-based differential technique to read out silicon photomultipliers (SiPMs) which has less than 20 ps FWHM electronic jitter. The novel readout is a fast front end circuit (NINO) based on a first stage differential current mode amplifier with 20 Omega input resistance. Therefore the amplifier inputs are connected differentially to the SiPM's anode and cathode ports. The leading edge of the output signal provides the time information, while the trailing edge provides the energy information. Based on a Monte Carlo photon-generation model, HSPICE simulations were run with a 3 x 3 mm(2) SiPM-model, read out with a differential current amplifier. The results of these simulations are presented here and compared with experimental data obtained with a 3 x 3 x 15 mm(3) LSO crystal coupled to a SiPM. The measured time coi...

  10. First performance results of the ALICE TPC Readout Control Unit 2

    OpenAIRE

    Zhao, Chengxin; Alme, Johan; Alt, Torsten; Appelshäuser, Harald; Bratrud, Lars Karlot Stubberud; Castro, Andrew; Costa, Filippo; David, Ernö; Gunji, Tako; Kirsch, S; Kiss, Tivadar; Langøy, Rune; Lien, Jørgen; Lippmann, C; Oskarsson, Anders

    2016-01-01

    - This paper presents the first performance results of the ALICE TPC Readout Control Unit 2 (RCU2). With the upgraded hardware typology and the new readout scheme in FPGA design, the RCU2 is designed to achieve twice the readout speed of the present Readout Control Unit. Design choices such as using the flash-based Microsemi Smartfusion2 FPGA and applying mitigation techniques in interfaces and FPGA design ensure a high degree of radiation tolerance. This paper presents the system level ir...

  11. An Integrated Microfabricated Chip with Double Functions as an Ion Source and Air Pump Based on LIGA Technology

    Directory of Open Access Journals (Sweden)

    Hua Li

    2017-01-01

    Full Text Available The injection and ionization of volatile organic compounds (VOA by an integrated chip is experimentally analyzed in this paper. The integrated chip consists of a needle-to-cylinder electrode mounting on the Polymethyl Methacrylate (PMMA substrate. The needle-to-cylinder electrode is designed and fabricated by Lithographie, Galvanoformung and Abformung (LIGA technology. In this paper, the needle is connected to a negative power supply of −5 kV and used as the cathode; the cylinder electrodes are composed of two arrays of cylinders and serve as the anode. The ionic wind is produced based on corona and glow discharges of needle-to-cylinder electrodes. The experimental setup is designed to observe the properties of the needle-to-cylinder discharge and prove its functions as an ion source and air pump. In summary, the main results are as follows: (1 the ionic wind velocity produced by the chip is about 0.79 m/s at an applied voltage of −3300 V; (2 acetic acid and ammonia water can be injected through the chip, which is proved by pH test paper; and (3 the current measured by a Faraday cup is about 10 pA for acetic acid and ammonia with an applied voltage of −3185 V. The integrated chip is promising for portable analytical instruments, such as ion mobility spectrometry (IMS, field asymmetric ion mobility spectrometry (FAIMS, and mass spectrometry (MS.

  12. A reconfigurable image tube using an external electronic image readout

    Science.gov (United States)

    Lapington, J. S.; Howorth, J. R.; Milnes, J. S.

    2005-08-01

    We have designed and built a sealed tube microchannel plate (MCP) intensifier for optical/NUV photon counting applications suitable for 18, 25 and 40 mm diameter formats. The intensifier uses an electronic image readout to provide direct conversion of event position into electronic signals, without the drawbacks associated with phosphor screens and subsequent optical detection. The Image Charge technique is used to remove the readout from the intensifier vacuum enclosure, obviating the requirement for additional electrical vacuum feedthroughs and for the readout pattern to be UHV compatible. The charge signal from an MCP intensifier is capacitively coupled via a thin dielectric vacuum window to the electronic image readout, which is external to the sealed intensifier tube. The readout pattern is a separate item held in proximity to the dielectric window and can be easily detached, making the system easily reconfigurable. Since the readout pattern detects induced charge and is external to the tube, it can be constructed as a multilayer, eliminating the requirement for narrow insulator gaps and allowing it to be constructed using standard PCB manufacturing tolerances. We describe two readout patterns, the tetra wedge anode (TWA), an optimized 4 electrode device similar to the wedge and strip anode (WSA) but with a factor 2 improvement in resolution, and an 8 channel high speed 50 ohm device, both manufactured as multilayer PCBs. We present results of the detector imaging performance, image resolution, linearity and stability, and discuss the development of an integrated readout and electronics device based on these designs.

  13. Performance study of large area encoding readout MRPC

    Science.gov (United States)

    Chen, X. L.; Wang, Y.; Chen, G.; Han, D.; Wang, X.; Zeng, M.; Zeng, Z.; Zhao, Z.; Guo, B.

    2018-02-01

    Muon tomography system built by the 2-D readout high spatial resolution Multi-gap Resistive Plate Chamber (MRPC) detector is a project of Tsinghua University. An encoding readout method based on the fine-fine configuration has been used to minimize the number of the readout electronic channels resulting in reducing the complexity and the cost of the system. In this paper, we provide a systematic comparison of the MRPC detector performance with and without fine-fine encoding readout. Our results suggest that the application of the fine-fine encoding readout leads us to achieve a detecting system with slightly worse spatial resolution but dramatically reduce the number of electronic channels.

  14. An integrated one-chip-sensor system for microRNA quantitative analysis based on digital droplet polymerase chain reaction

    Science.gov (United States)

    Tsukuda, Masahiko; Wiederkehr, Rodrigo Sergio; Cai, Qing; Majeed, Bivragh; Fiorini, Paolo; Stakenborg, Tim; Matsuno, Toshinobu

    2016-04-01

    A silicon microfluidic chip was developed for microRNA (miRNA) quantitative analysis. It performs sequentially reverse transcription and polymerase chain reaction in a digital droplet format. Individual processes take place on different cavities, and reagent and sample mixing is carried out on a chip, prior to entering each compartment. The droplets are generated on a T-junction channel before the polymerase chain reaction step. Also, a miniaturized fluorescence detector was developed, based on an optical pick-up head of digital versatile disc (DVD) and a micro-photomultiplier tube. The chip integrated in the detection system was tested using synthetic miRNA with known concentrations, ranging from 300 to 3,000 templates/µL. Results proved the functionality of the system.

  15. Review of chip-scale atomic clocks based on coherent population trapping

    International Nuclear Information System (INIS)

    Wang Zhong

    2014-01-01

    Research on chip-scale atomic clocks (CSACs) based on coherent population trapping (CPT) is reviewed. The background and the inspiration for the research are described, including the important schemes proposed to improve the CPT signal quality, the selection of atoms and buffer gases, and the development of micro-cell fabrication. With regard to the reliability, stability, and service life of the CSACs, the research regarding the sensitivity of the CPT resonance to temperature and laser power changes is also reviewed, as well as the CPT resonance's collision and light of frequency shifts. The first generation CSACs have already been developed but its characters are still far from our expectations. Our conclusion is that miniaturization and power reduction are the most important aspects calling for further research. (review)

  16. arXiv The MuPix System-on-Chip for the Mu3e Experiment

    CERN Document Server

    Augustin, Heiko

    2017-02-11

    Mu3e is a novel experiment searching for charged lepton flavor violation in the rare decay $\\mu^+ \\rightarrow e^+e^-e^+$. Decay vertex position, decay time and particle momenta have to be precisely measured in order to reject both accidental and physics background. A silicon pixel tracker based on $50\\,\\mu$m thin high voltage monolithic active pixel sensors (HV-MAPS) in a 1 T solenoidal magnetic field provides precise vertex and momentum information. The MuPix chip combines pixel sensor cells with integrated analog electronics and a periphery with a complete digital readout. The MuPix7 is the first HV-MAPS prototype implementing all functionalities of the final sensor including a readout state machine and high speed serialization with 1.25 Gbit/s data output, allowing for a streaming readout in parallel to the data taking. The observed efficiency of the MuPix7 chip including the full readout system is $\\geq99\\%$ in a high rate test beam.

  17. Chip-based CE for rapid separation of 8-aminopyrene-1,3,6-trisulfonic acid (APTS) derivatized glycans

    Czech Academy of Sciences Publication Activity Database

    Smejkal, Petr; Szekrényes, A.; Ryvolová, M.; Foret, František; Guttman, A.; Bek, F.; Macka, M.

    2010-01-01

    Roč. 22, č. 31 (2010), s. 3783-3786 ISSN 0173-0835 R&D Projects: GA MŠk MEB060821 Institutional research plan: CEZ:AV0Z40310501 Keywords : bioanalyzer * chip-based analysis * glycans Subject RIV: CB - Analytical Chemistry, Separation Impact factor: 3.569, year: 2010

  18. Avoiding Message-Dependent Deadlock in Network-Based Systems on Chip

    NARCIS (Netherlands)

    Hansson, A.; Goossens, K.; Rãdulescu, A.

    2007-01-01

    Networks on chip (NoCs) are an essential component of systems on chip (SoCs) and much research is devoted to deadlock avoidance in NoCs. Prior work focuses on the router network while protocol interactions between NoC and intellectual property (IP) modules are not considered. These interactions

  19. Single-Chip Computers With Microelectromechanical Systems-Based Magnetic Memory

    NARCIS (Netherlands)

    Carley, L. Richard; Bain, James A.; Fedder, Gary K.; Greve, David W.; Guillou, David F.; Lu, Michael S.C.; Mukherjee, Tamal; Santhanam, Suresh; Abelmann, Leon; Min, Seungook

    This article describes an approach for implementing a complete computer system (CPU, RAM, I/O, and nonvolatile mass memory) on a single integrated-circuit substrate (a chip)—hence, the name "single-chip computer." The approach presented combines advances in the field of microelectromechanical

  20. Rutherford X-ray spectrometer readout

    International Nuclear Information System (INIS)

    Bateman, J.E.

    1978-07-01

    Rutherford electronic X-ray spectrometer readout is based on the combination of two established techniques (a) the detection and location of soft X-rays by means of multichannel electron multiplier arrays (MCP's), and (b) the electronic readout of charge distributions (generally in multi-wire proportional counters) by means of the delay line techniques. In order for the latter device to function well a charge signal of approximately 10 6 electrons must be available to the delay line wand. This is achieved in the present device by means of two cascaded MCP's which can produce electron gains up to approximately 10 8 , and so operate the delay line from the single electron pulses generated at the front face of an MCP by a soft X-ray. The delay line readout technique was chosen because of its simplicity (both in terms of the necessary hardware and the associated electronics), robustness, and ease of implementation. In order to achieve the target spatial resolution of 50 μm (fwhm) or 20 μm (standard deviation) it was necessary to adapt the charge collection system so that the readout takes place from a length of delay line 200 mm long. The general layout of the system and the functions of the electronic circuits are described. Performance testing, setting up procedures and trouble shooting of the system are discussed. (U.K.)

  1. Microwave multiplex readout for superconducting sensors

    Energy Technology Data Exchange (ETDEWEB)

    Ferri, E., E-mail: elena.ferri@mib.infn.it [Università Milano-Bicocca, Milan (Italy); INFN Sez. di Milano-Bicocca, Milan (Italy); Becker, D.; Bennett, D. [NIST, Boulder, CO (United States); Faverzani, M. [Università Milano-Bicocca, Milan (Italy); INFN Sez. di Milano-Bicocca, Milan (Italy); Fowler, J.; Gard, J. [NIST, Boulder, CO (United States); Giachero, A. [Università Milano-Bicocca, Milan (Italy); INFN Sez. di Milano-Bicocca, Milan (Italy); Hays-Wehle, J.; Hilton, G. [NIST, Boulder, CO (United States); Maino, M. [Università Milano-Bicocca, Milan (Italy); INFN Sez. di Milano-Bicocca, Milan (Italy); Mates, J. [NIST, Boulder, CO (United States); Puiu, A.; Nucciotti, A. [Università Milano-Bicocca, Milan (Italy); INFN Sez. di Milano-Bicocca, Milan (Italy); Reintsema, C.; Schmidt, D.; Swetz, D.; Ullom, J.; Vale, L. [NIST, Boulder, CO (United States)

    2016-07-11

    The absolute neutrino mass scale is still an outstanding challenge in both particle physics and cosmology. The calorimetric measurement of the energy released in a nuclear beta decay is a powerful tool to determine the effective electron-neutrino mass. In the last years, the progress on low temperature detector technologies has allowed to design large scale experiments aiming at pushing down the sensitivity on the neutrino mass below 1 eV. Even with outstanding performances in both energy (~ eV on keV) and time resolution (~ 1 μs) on the single channel, a large number of detectors working in parallel is required to reach a sub-eV sensitivity. Microwave frequency domain readout is the best available technique to readout large array of low temperature detectors, such as Transition Edge Sensors (TESs) or Microwave Kinetic Inductance Detectors (MKIDs). In this way a multiplex factor of the order of thousands can be reached, limited only by the bandwidth of the available commercial fast digitizers. This microwave multiplexing system will be used to readout the HOLMES detectors, an array of 1000 microcalorimeters based on TES sensors in which the {sup 163}Ho will be implanted. HOLMES is a new experiment for measuring the electron neutrino mass by means of the electron capture (EC) decay of {sup 163}Ho. We present here the microwave frequency multiplex which will be used in the HOLMES experiment and the microwave frequency multiplex used to readout the MKID detectors developed in Milan as well.

  2. The front-end chip of the SuperB SVT detector

    International Nuclear Information System (INIS)

    Giorgi, F.; Comotti, D.; Manghisoni, M.; Re, V.; Traversi, G.; Fabbri, L.; Gabrielli, A.; Pellegrini, G.; Sbarra, C.; Semprini-Cesari, N.; Valentinetti, S.; Villa, M.; Zoccoli, A.; Berra, A.; Lietti, D.; Prest, M.; Bevan, A.; Wilson, F.; Beck, G.; Morris, J.

    2013-01-01

    The asymmetric e + e − collider SuperB is designed to deliver a high luminosity, greater than 10 36 cm −2 s −1 , with moderate beam currents and a reduced center of mass boost with respect to earlier B-Factories. The innermost detector is the Silicon Vertex Tracker which is made of 5 layers of double sided silicon strip sensors plus a layer 0, that can be equipped with short striplets detectors in a first phase of the experiment. In order to achieve an overall track reconstruction efficiency above 98% it is crucial to optimize both analog and digital readout circuits. The readout architecture being developed for the front-end chips will be able to cope with the very high rates expected in the first layer. The digital readout will be optimized to be fully efficient for hit rates up to 2 MHz/strip, including large margins on the maximum expected background rates, but can potentially accommodate higher rates with a proper tuning of the buffer depth. The readout is based on a triggered architecture where each of the 128 strip channel is provided with a dedicated digital buffer. Each buffer collects the digitized charge information by means of a 4-bit TOT, storing it in conjunction with the related time stamp. The depth of buffers was dimensioned considering the expected trigger latency and hit rate including suitable safety margins. Every buffer is connected to a highly parallelized circuit handling the trigger logic, rejecting expired data in the buffers and channeling the parallel stream of triggered hits to the common output of the chip. The presented architecture has been modeled by HDL language and investigated with a Monte Carlo hit generator emulating the analog front-end behavior. The simulations showed that even applying the highest stressing conditions, about 2 MHz per strip, the efficiency of the digital readout remained above 99.8%

  3. The rad-hard readout system of the BaBar silicon vertex tracker

    Science.gov (United States)

    Re, V.; DeWitt, J.; Dow, S.; Frey, A.; Johnson, R. P.; Kroeger, W.; Kipnis, I.; Leona, A.; Luo, L.; Mandelli, E.; Manfredi, P. F.; Nyman, M.; Pedrali-Noy, M.; Poplevin, P.; Perazzo, A.; Roe, N.; Spencer, N.

    1998-02-01

    This paper discusses the behaviour of a prototype rad-hard version of the chip developed for the readout of the BaBar silicon vertex tracker. A previous version of the chip, implemented in the 0.8 μm HP rad-soft version has been thoroughly tested in the recent times. It featured outstanding noise characteristics and showed that the specifications assumed as target for the tracker readout were met to a very good extent. The next step was the realization of a chip prototype in the rad-hard process that will be employed in the actual chip production. Such a prototype is structurally and functionally identical to its rad-soft predecessor. However, the process parameters being different, and not fully mastered at the time of design, some deviations in the behaviour were to be expected. The reasons for such deviations have been identified and some of them were removed by acting on the points that were left accessible on the chip. Other required small circuit modifications that will not affect the production schedule. The tests done so far on the rad-hard chip have shown that the noise behaviour is very close to that of the rad-soft version, that is fully adequate for the vertex detector readout.

  4. An Efficient, FPGA-Based, Cluster Detection Algorithm Implementation for a Strip Detector Readout System in a Time Projection Chamber Polarimeter

    Science.gov (United States)

    Gregory, Kyle J.; Hill, Joanne E. (Editor); Black, J. Kevin; Baumgartner, Wayne H.; Jahoda, Keith

    2016-01-01

    A fundamental challenge in a spaceborne application of a gas-based Time Projection Chamber (TPC) for observation of X-ray polarization is handling the large amount of data collected. The TPC polarimeter described uses the APV-25 Application Specific Integrated Circuit (ASIC) to readout a strip detector. Two dimensional photoelectron track images are created with a time projection technique and used to determine the polarization of the incident X-rays. The detector produces a 128x30 pixel image per photon interaction with each pixel registering 12 bits of collected charge. This creates challenging requirements for data storage and downlink bandwidth with only a modest incidence of photons and can have a significant impact on the overall mission cost. An approach is described for locating and isolating the photoelectron track within the detector image, yielding a much smaller data product, typically between 8x8 pixels and 20x20 pixels. This approach is implemented using a Microsemi RT-ProASIC3-3000 Field-Programmable Gate Array (FPGA), clocked at 20 MHz and utilizing 10.7k logic gates (14% of FPGA), 20 Block RAMs (17% of FPGA), and no external RAM. Results will be presented, demonstrating successful photoelectron track cluster detection with minimal impact to detector dead-time.

  5. Unusual ratio of TL readouts of different discs of personnel monitoring TLD badge based on CaSO4: Dy teflon disc

    International Nuclear Information System (INIS)

    Pradhan, S.M.; Ande, C.D.; Kher, R.K.; Chourasiya, G.; Vashishtha, R.; Gupta, A.K.

    2005-01-01

    In India Personnel Monitoring against external radiation hazard of gamma, beta and X-rays is provided using a TLD badge based on CaSO 4 : Dy Teflon TLD disc. Unusual ratios of TL readouts of different discs of TLD badge (Disc Ratios) observed for service TLD badges of radiation workers were investigated and simulated. Simulations were carried out by exposure of TLD badges by speck type radioactive sources placed in contact of badges, exposure of TLD badges placed on concrete floor to a radiography source. Clues for the simulation were obtained from nature of work, radiological conditions during course of individuals' work whose TLD badges showed the unusual disc ratios and geometrical calculations performed. It is concluded that although the actual exposure condition during use is unknown, the unusual disk ratios observed for the service TLD badges can be simulated and utilized to arrive at probable exposure conditions. The study helped in investigations of the abnormal exposures and assigning doses to the concerned radiation workers. (author)

  6. FASTBUS readout system for the CDF DAQ upgrade

    International Nuclear Information System (INIS)

    Andresen, J.; Areti, H.; Black, D.

    1993-11-01

    The Data Acquisition System (DAQ) at the Collider Detector at Fermilab is currently being upgraded to handle a minimum of 100 events/sec for an aggregate bandwidth that is at least 25 Mbytes/sec. The DAQ System is based on a commercial switching network that has interfaces to VME bus. The modules that readout the front end crates (FASTBUS and RABBIT) have to deliver the data to the VME bus based host adapters of the switch. This paper describes a readout system that has the required bandwidth while keeping the experiment dead time due to the readout to a minimum

  7. Dye-based coatings for hydrophobic valves and their application to polymer labs-on-a-chip

    Science.gov (United States)

    Riegger, L.; Mielnik, M. M.; Gulliksen, A.; Mark, D.; Steigert, J.; Lutz, S.; Clad, M.; Zengerle, R.; Koltay, P.; Hoffmann, J.

    2010-04-01

    We provide a method for the selective surface patterning of microfluidic chips with hydrophobic fluoropolymers which is demonstrated by the fabrication of hydrophobic valves via dispensing. It enables efficient optical quality control for the surface patterning thus permitting the low-cost production of highly reproducible hydrophobic valves. Specifically, different dyes for fluoropolymers enabling visual quality control (QC) are investigated, and two fluoropolymer-solvent-dye solutions based on fluorescent quantum dots (QD) and carbon black (CB) are presented in detail. The latter creates superhydrophobic surfaces on arbitrary substrates, e.g. chips made from cyclic olefin copolymer (COC, water contact angle = 157.9°), provides good visibility for the visual QC in polymer labs-on-a-chip and increases the burst pressures of the hydrophobic valves. Finally, an application is presented which aims at the on-chip amplification of mRNA based on defined flow control by hydrophobic valves is presented. Here, the optimization based on QC in combination with the Teflon-CB coating improves the burst pressure reproducibility from 14.5% down to 6.1% compared to Teflon-coated valves.

  8. AC electric field induced dipole-based on-chip 3D cell rotation.

    Science.gov (United States)

    Benhal, Prateek; Chase, J Geoffrey; Gaynor, Paul; Oback, Björn; Wang, Wenhui

    2014-08-07

    The precise rotation of suspended cells is one of the many fundamental manipulations used in a wide range of biotechnological applications such as cell injection and enucleation in nuclear transfer (NT) cloning. Noticeably scarce among the existing rotation techniques is the three-dimensional (3D) rotation of cells on a single chip. Here we present an alternating current (ac) induced electric field-based biochip platform, which has an open-top sub-mm square chamber enclosed by four sidewall electrodes and two bottom electrodes, to achieve rotation about the two axes, thus 3D cell rotation. By applying an ac potential to the four sidewall electrodes, an in-plane (yaw) rotating electric field is generated and in-plane rotation is achieved. Similarly, by applying an ac potential to two opposite sidewall electrodes and the two bottom electrodes, an out-of-plane (pitch) rotating electric field is generated and rolling rotation is achieved. As a prompt proof-of-concept, bottom electrodes were constructed with transparent indium tin oxide (ITO) using the standard lift-off process and the sidewall electrodes were constructed using a low-cost micro-milling process and then assembled to form the chip. Through experiments, we demonstrate rotation of bovine oocytes of ~120 μm diameter about two axes, with the capability of controlling the rotation direction and the rate for each axis through control of the ac potential amplitude, frequency, and phase shift, and cell medium conductivity. The maximum observed rotation rate reached nearly 140° s⁻¹, while a consistent rotation rate reached up to 40° s⁻¹. Rotation rate spectra for zona pellucida-intact and zona pellucida-free oocytes were further compared and found to have no effective difference. This simple, transparent, cheap-to-manufacture, and open-top platform allows additional functional modules to be integrated to become a more powerful cell manipulation system.

  9. Toward a reduced-wire readout system for ultrasound imaging.

    Science.gov (United States)

    Lim, Jaemyung; Arkan, Evren F; Degertekin, F Levent; Ghovanloo, Maysam

    2014-01-01

    We present a system-on-a-chip (SoC) for use in high-frequency capacitive micromachined ultrasonic transducer (CMUT) imaging systems. This SoC consists of trans-impedance amplifiers (TIA), delay locked loop (DLL) based clock multiplier, quadrature sampler, and pulse width modulator (PWM). The SoC down converts RF echo signal to baseband by quadrature sampling which facilitates modulation. To send data through a 1.6 m wire in the catheter which has limited bandwidth and is vulnerable to noise, the SoC creates a pseudo-digital PWM signal which can be used for back telemetry or wireless readout of the RF data. In this implementation, using a 0.35-μm std. CMOS process, the TIA and single-to-differential (STD) converter had 45 MHz bandwidth, the quadrature sampler had 10.1 dB conversion gain, and the PWM had 5-bit ENoB. Preliminary results verified front-end functionality, and the power consumption of a TIA, STD, quadrature sampler, PWM, and clock multiplier was 26 mW from a 3 V supply.

  10. Chip-based generation of carbon nanodots via electrochemical oxidation of screen printed carbon electrodes and the applications for efficient cell imaging and electrochemiluminescence enhancement.

    Science.gov (United States)

    Xu, Yuanhong; Liu, Jingquan; Zhang, Jizhen; Zong, Xidan; Jia, Xiaofang; Li, Dan; Wang, Erkang

    2015-06-07

    A portable lab-on-a-chip methodology to generate ionic liquid-functionalized carbon nanodots (CNDs) was developed via electrochemical oxidation of screen printed carbon electrodes. The CNDs can be successfully applied for efficient cell imaging and solid-state electrochemiluminescence sensor fabrication on the paper-based chips.

  11. On-Chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism

    NARCIS (Netherlands)

    Zhang, X.; Kerkhoff, Hans G.; Vermeulen, Bart

    2010-01-01

    Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated into the SoC to function as an ATE. This paper introduces the reuse of a Network-on-Chip as a test access mechanism. Since

  12. SPIDR, a general-purpose readout system for pixel ASICs

    International Nuclear Information System (INIS)

    Heijden, B. van der; Visser, J.; Beuzekom, M. van; Boterenbrood, H.; Munneke, B.; Schreuder, F.; Kulis, S.

    2017-01-01

    The SPIDR (Speedy PIxel Detector Readout) system is a flexible general-purpose readout platform that can be easily adapted to test and characterize new and existing detector readout ASICs. It is originally designed for the readout of pixel ASICs from the Medipix/Timepix family, but other types of ASICs or front-end circuits can be read out as well. The SPIDR system consists of an FPGA board with memory and various communication interfaces, FPGA firmware, CPU subsystem and an API library on the PC . The FPGA firmware can be adapted to read out other ASICs by re-using IP blocks. The available IP blocks include a UDP packet builder, 1 and 10 Gigabit Ethernet MAC's and a 'soft core' CPU . Currently the firmware is targeted at the Xilinx VC707 development board and at a custom board called Compact-SPIDR . The firmware can easily be ported to other Xilinx 7 series and ultra scale FPGAs. The gap between an ASIC and the data acquisition back-end is bridged by the SPIDR system. Using the high pin count VITA 57 FPGA Mezzanine Card (FMC) connector only a simple chip carrier PCB is required. A 1 and a 10 Gigabit Ethernet interface handle the connection to the back-end. These can be used simultaneously for high-speed data and configuration over separate channels. In addition to the FMC connector, configurable inputs and outputs are available for synchronization with other detectors. A high resolution (≈ 27 ps bin size) Time to Digital converter is provided for time stamping events in the detector. The SPIDR system is frequently used as readout for the Medipix3 and Timepix3 ASICs. Using the 10 Gigabit Ethernet interface it is possible to read out a single chip at full bandwidth or up to 12 chips at a reduced rate. Another recent application is the test-bed for the VeloPix ASIC, which is developed for the Vertex Detector of the LHCb experiment. In this case the SPIDR system processes the 20 Gbps scrambled data stream from the VeloPix and distributes it over four

  13. System-on-a-Chip Based Nano Star Tracker and Its Real-Time Image Processing Approach

    OpenAIRE

    Wei, Minsong; Bao, Jingyu; Xing, Fei; Liu, Zengyi; Sun, Ting; You, Zheng

    2016-01-01

    The star tracker is one of the most accurate components for satellite attitude determination. With the development of the nano star tracker, it is compatible for application on small satellites. However, the drawback in dynamic property of nano star tracker has limited its extensive applications. The principal objective of this study is to introduce a system-on-a-chip (SOC) based nano star tracker with enhanced dynamic property. A morphology based image processing approach was realized based ...

  14. Timing and Readout Contorl in the LHCb Upgraded Readout System

    CERN Document Server

    Alessio, Federico

    2016-01-01

    In 2019, the LHCb experiment at CERN will undergo a major upgrade where its detectors electronics and entire readout system will be changed to read-out events at the full LHC rate of 40 MHz. In this paper, the new timing, trigger and readout control system for such upgrade is reviewed. Particular attention is given to the distribution of the clock, timing and synchronization information across the entire readout system using generic FTTH technology like Passive Optical Networks. Moreover the system will be responsible to generically control the Front-End electronics by transmitting configuration data and receiving monitoring data, offloading the software control system from the heavy task of manipulating complex protocols of thousands of Front-End electronics devices. The way in which this was implemented is here reviewed with a description of results from first implementations of the system, including usages in test-benches, implementation of techniques for timing distribution and latency control."

  15. Transparent Nanopore Cavity Arrays Enable Highly Parallelized Optical Studies of Single Membrane Proteins on Chip.

    Science.gov (United States)

    Diederichs, Tim; Nguyen, Quoc Hung; Urban, Michael; Tampé, Robert; Tornow, Marc

    2018-06-13

    Membrane proteins involved in transport processes are key targets for pharmaceutical research and industry. Despite continuous improvements and new developments in the field of electrical readouts for the analysis of transport kinetics, a well-suited methodology for high-throughput characterization of single transporters with nonionic substrates and slow turnover rates is still lacking. Here, we report on a novel architecture of silicon chips with embedded nanopore microcavities, based on a silicon-on-insulator technology for high-throughput optical readouts. Arrays containing more than 14 000 inverted-pyramidal cavities of 50 femtoliter volumes and 80 nm circular pore openings were constructed via high-resolution electron-beam lithography in combination with reactive ion etching and anisotropic wet etching. These cavities feature both, an optically transparent bottom and top cap. Atomic force microscopy analysis reveals an overall extremely smooth chip surface, particularly in the vicinity of the nanopores, which exhibits well-defined edges. Our unprecedented transparent chip design provides parallel and independent fluorescent readout of both cavities and buffer reservoir for unbiased single-transporter recordings. Spreading of large unilamellar vesicles with efficiencies up to 96% created nanopore-supported lipid bilayers, which are stable for more than 1 day. A high lipid mobility in the supported membrane was determined by fluorescent recovery after photobleaching. Flux kinetics of α-hemolysin were characterized at single-pore resolution with a rate constant of 0.96 ± 0.06 × 10 -3 s -1 . Here, we deliver an ideal chip platform for pharmaceutical research, which features high parallelism and throughput, synergistically combined with single-transporter resolution.

  16. The NA62 Gigatracker: Detector properties and pixel read-out architectures

    International Nuclear Information System (INIS)

    Fiorini, M.; Carassiti, V.; Ceccucci, A.; Cortina, E.; Cotta Ramusino, A.; Dellacasa, G.; Jarron, P.; Kaplon, J.; Kluge, A.; Marchetto, F.; Martin, E.; Martoiu, S.; Mazza, G.; Noy, M.; Petrucci, F.; Riedler, P.; Rivetti, A.; Tiuraniemi, S.

    2010-01-01

    The beam spectrometer of the NA62 experiment, named Gigatracker, has to perform single track reconstruction with unprecedented time resolution (150 ps rms) in a harsh radiation environment. To meet these requirements, and in order to reduce material budget to a minimum, three hybrid silicon pixel detector stations will be installed in vacuum. An adequate strategy to compensate for the discriminator time-walk must be implemented and R and D investigating two different options is ongoing. Two read-out chip prototypes have been designed in order to compare their performance: one approach is based on the use of a constant-fraction discriminator followed by an on-pixel TDC, while the other one is based on the use of a time-over-threshold circuit followed by a TDC shared by a group of pixels. This paper describes the Gigatracker system, presents the global architectures of both read-out ASICs and reviews the current status of the R and D project.

  17. A novel mechano-optical sensor based on read-out with a Si3N4 grated waveguide

    NARCIS (Netherlands)

    Pham Van So, P.V.S.; Dijkstra, Mindert; van Wolferen, Hendricus A.G.M.; Pollnau, Markus; Krijnen, Gijsbertus J.M.; Hoekstra, Hugo

    2011-01-01

    Microcantilever-based sensors can be used to detect molecular absorption of, for example, hydrogen gas, which causes changes in the surface stress, leading to deflection of the cantilever. Such a deflection can be determined by means of optical beam deflection, capacitance-, or piezo-resistance

  18. A new wire chamber front-end system, based on the ASD-8 B chip

    NARCIS (Netherlands)

    Krusemann, BAM; Bassini, R; Ellinghaus, F; Frekers, D; Hagemann, M; Hannen, VM; von Heynitz, H; Heyse, J; Sohlbach, H; Wortche, HJ

    1999-01-01

    The Focal-Plane Polarimeter (FPP) for the Big-Bite Spectrometer van den Berg (Nucl Instr. and Meth. B 99 (1995) 637ff) at the KVI requires the read-out of four large-area MWPCs and two VDCs with 3872 wires in-total. The EUROSUPERNOVA collaboration (SNOVA) developed a digital 16 channel preamplifier

  19. Digital column readout architecture for the ATLAS pixel 025 mum front end IC

    CERN Document Server

    Mandelli, E; Blanquart, L; Comes, G; Denes, P; Einsweiler, Kevin F; Fischer, P; Marchesini, R; Meddeler, G; Peric, I

    2002-01-01

    A fast low noise, limited power, radiation-hard front-end chip was developed for reading out the Atlas Pixel Silicon Detector. As in the past prototypes, every chip is used to digitize and read out charge and time information from hits on each one of its 2880 inputs. The basic column readout architecture idea was adopted and modified to allow a safe transition to quarter micron technology. Each pixel cell, organized in a 160 multiplied by 18 matrix, can be independently enabled and configured in order to optimize the analog signal response and to prevent defective pixels from saturating the readout. The digital readout organizes hit data coming from each column, with respect to time, and output them on a low-level serial interface. A considerable effort was made to design state machines free of undefined states, where single-point defects and charge deposited by heavy ions in the silicon could have led to unpredicted forbidden states. 7 Refs.

  20. Design and prototyping of a readout aggregation ASIC

    Energy Technology Data Exchange (ETDEWEB)

    Lemke, Frank; Schatral, Sven; Bruening, Ulrich [ZITI, Universitaet Heidelberg (Germany); Som, Indranil; Bhattacharyya, Tarun [Indian Institute of Technology, Kharagpur (India); Collaboration: CBM-Collaboration

    2015-07-01

    In close collaboration between the Indian Institute of Technology Kharagpur (IITKGP) and the Institute for Computer Engineering (ZITI) at the University of Heidelberg a readout aggregation ASIC was designed. This happened in the context of the Compressed Baryonic Matter (CBM) experiment at the Facility for Antiproton and Ion Research (FAIR). The ASIC is designed in 65nm TSMC technology. Its miniASIC tapeout to verify the analog and high-speed components is scheduled to the first quarter of 2015. This mixed-signal ASIC consists of a full-custom 5Gb/s serializer/deserializer, designed by the IITKGP including design elements such as phase-locked loop, bandgap reference, and clock data recovery, and a digital designed network communication and aggregation part designed by the ZITI. In addition, there are test structures and an I2C readout integrated to ease bring up and monitoring. A specialty of this test ASIC is the aggregation of links featuring different data rates, running with bundles of 500 MB/s LVDS. This enables flexible readout setups of mixed detectors respectively readout of various chips. As communication protocol, a unified link protocol is used including control messages, data messages, and synchronization messages on an identical lane. The design has been simulated, verified, and hardware emulated using Spartan 6 FPGAs.

  1. A Microfluidic Chip Based on Localized Surface Plasmon Resonance for Real-Time Monitoring of Antigen-Antibody Reactions

    Science.gov (United States)

    Hiep, Ha Minh; Nakayama, Tsuyoshi; Saito, Masato; Yamamura, Shohei; Takamura, Yuzuru; Tamiya, Eiichi

    2008-02-01

    Localized surface plasmon resonance (LSPR) connecting to noble metal nanoparticles is an important issue for many analytical and biological applications. Therefore, the development of microfluidic LSPR chip that allows studying biomolecular interactions becomes an essential requirement for micro total analysis systems (µTAS) integration. However, miniaturized process of the conventional surface plasmon resonance system has been faced with some limitations, especially with the usage of Kretschmann configuration in total internal reflection mode. In this study, we have tried to solve this problem by proposing a novel microfluidic LSPR chip operated with a simple collinear optical system. The poly(dimethylsiloxane) (PDMS) based microfluidic chip was fabricated by soft-lithography technique and enables to interrogate specific insulin and anti-insulin antibody reaction in real-time after immobilizing antibody on its surface. Moreover, the sensing ability of microfluidic LSPR chip was also evaluated with various glucose concentrations. The kinetic constant of insulin and anti-insulin antibody was determined and the detection limit of 100 ng/mL insulin was archived.

  2. Technology Development of Salak (Salacca Zalacca) Chips With Vacuum Frying Machine Base On Expert System In Kramat-Bangkalan Regency

    Science.gov (United States)

    Rosida, D. F.; Happyanto; Anggraeni; Sugiarto; Hapsari

    2018-01-01

    Agropolitan Program is one form of regional development to improve agribusiness system and effort to improve the welfare of the community. One of the leading commodities in Bangkalan agroclimates is salak which is a potentially very large commodity to be developed. Salak commodities in Kramat Bangkalan Indonesia have developed varous salak produced such as dates of salak, syrup and dodol salak. Salak chips was the target of innovation from processed salak. The Production of salak chips using frying technology with vacuum system to obtain crunchy chips. To get the results need to be developed synergy technology to combine the process conditions and the right system in producing good quality salak chips. Bangkalan Regency is the potential to continue to develop products using a variety of salak to the processed form of vacuum frying machine based on expert system so that the resulting product would be great texture, aroma and taste. This will make the area of Bangkalan, Indonesia be more independent in producing and increasing revenue.

  3. A 3D Microfluidic Chip for Electrochemical Detection of Hydrolysed Nucleic Bases by a Modified Glassy Carbon Electrode

    Directory of Open Access Journals (Sweden)

    Jana Vlachova

    2015-01-01

    Full Text Available Modification of carbon materials, especially graphene-based materials, has wide applications in electrochemical detection such as electrochemical lab-on-chip devices. A glassy carbon electrode (GCE modified with chemically alternated graphene oxide was used as a working electrode (glassy carbon modified by graphene oxide with sulphur containing compounds and Nafion for detection of nucleobases in hydrolysed samples (HCl pH = 2.9, 100 °C, 1 h, neutralization by NaOH. It was found out that modification, especially with trithiocyanuric acid, increased the sensitivity of detection in comparison with pure GCE. All processes were finally implemented in a microfluidic chip formed with a 3D printer by fused deposition modelling technology. As a material for chip fabrication, acrylonitrile butadiene styrene was chosen because of its mechanical and chemical stability. The chip contained the one chamber for the hydrolysis of the nucleic acid and another for the electrochemical detection by the modified GCE. This chamber was fabricated to allow for replacement of the GCE.

  4. A 3D microfluidic chip for electrochemical detection of hydrolysed nucleic bases by a modified glassy carbon electrode.

    Science.gov (United States)

    Vlachova, Jana; Tmejova, Katerina; Kopel, Pavel; Korabik, Maria; Zitka, Jan; Hynek, David; Kynicky, Jindrich; Adam, Vojtech; Kizek, Rene

    2015-01-22

    Modification of carbon materials, especially graphene-based materials, has wide applications in electrochemical detection such as electrochemical lab-on-chip devices. A glassy carbon electrode (GCE) modified with chemically alternated graphene oxide was used as a working electrode (glassy carbon modified by graphene oxide with sulphur containing compounds and Nafion) for detection of nucleobases in hydrolysed samples (HCl pH = 2.9, 100 °C, 1 h, neutralization by NaOH). It was found out that modification, especially with trithiocyanuric acid, increased the sensitivity of detection in comparison with pure GCE. All processes were finally implemented in a microfluidic chip formed with a 3D printer by fused deposition modelling technology. As a material for chip fabrication, acrylonitrile butadiene styrene was chosen because of its mechanical and chemical stability. The chip contained the one chamber for the hydrolysis of the nucleic acid and another for the electrochemical detection by the modified GCE. This chamber was fabricated to allow for replacement of the GCE.

  5. A nuclear pulse amplitude acquisition system based on 80C31 single-chip microcomputer

    International Nuclear Information System (INIS)

    Zhao Xiuliang; Qu Guopu; Guo Lanying; Zhang Songbai

    1999-01-01

    A kind of multichannel nuclear pulse amplitude signal acquisition system is described, which is composed of pulse peak detector, integrated S/H circuit, A/D converter and 80C31 single-chip microcomputer

  6. Patterned Fibers Embedded Microfluidic Chips Based on PLA and PDMS for Ag Nanoparticle Safety Testing

    Directory of Open Access Journals (Sweden)

    Yaowen Liu

    2016-11-01

    Full Text Available A new method to integrate poly-dl-lactide (PLA patterned electrospun fibers with a polydimethylsiloxane (PDMS microfluidic chip was successfully developed via lithography. Hepatocyte behavior under static and dynamic conditions was investigated. Immunohistochemical analyses indicated good hepatocyte survival under the dynamic culture system with effective hepatocyte spheroid formation in the patterned microfluidic chip vs. static culture conditions and tissue culture plate (TCP. In particular, hepatocytes seeded in this microfluidic chip under a flow rate of 10 μL/min could re-establish hepatocyte polarity to support biliary excretion and were able to maintain high levels of albumin and urea secretion over 15 days. Furthermore, the optimized system could produce sensitive and consistent responses to nano-Ag-induced hepatotoxicity during culture. Thus, this microfluidic chip device provides a new means of fabricating complex liver tissue-engineered scaffolds, and may be of considerable utility in the toxicity screening of nanoparticles.

  7. Development of a SQUID-based 3He Co-magnetometer Readout for a Neutron Electric Dipole Moment Experiment

    OpenAIRE

    Kim, Young Jin; Clayton, Steven M.

    2012-01-01

    A discovery of a permanent electric dipole moment (EDM) of the neutron would provide one of the most important low energy tests of the discrete symmetries beyond the Standard Model of particle physics. A new search of neutron EDM, to be conducted at the spallation neutron source (SNS) at ORNL, is designed to improve the present experimental limit of ~10^-26 e-cm by two orders of magnitude. The experiment is based on the magnetic-resonance technique in which polarized neutrons precess at the L...

  8. A superconducting quantum interference device based read-out of a subattonewton force sensor operating at millikelvin temperatures

    International Nuclear Information System (INIS)

    Usenko, O.; Vinante, A.; Wijts, G.; Oosterkamp, T. H.

    2011-01-01

    We present a scheme to measure the displacement of a nanomechanical resonator at cryogenic temperature. The technique is based on the use of a superconducting quantum interference device to detect the magnetic flux change induced by a magnetized particle attached on the end of the resonator. Unlike conventional interferometric techniques, our detection scheme does not involve direct power dissipation in the resonator, and therefore, is particularly suitable for ultralow temperature applications. We demonstrate its potential by cooling an ultrasoft silicon cantilever to a noise temperature of 25 mK, corresponding to a subattonewton thermal force noise of 0.5 aN/√(Hz).

  9. FILTRES: a 128 channels VLSI mixed front-end readout electronic development for microstrip detectors

    International Nuclear Information System (INIS)

    Anstotz, F.; Hu, Y.; Michel, J.; Sohler, J.L.; Lachartre, D.

    1998-01-01

    We present a VLSI digital-analog readout electronic chain for silicon microstrip detectors. The characteristics of this circuit have been optimized for the high resolution tracker of the CERN CMS experiment. This chip consists of 128 channels at 50 μm pitch. Each channel is composed by a charge amplifier, a CR-RC shaper, an analog memory, an analog processor, an output FIFO read out serially by a multiplexer. This chip has been processed in the radiation hard technology DMILL. This paper describes the architecture of the circuit and presents test results of the 128 channel full chain chip. (orig.)

  10. A high-throughput readout architecture based on PCI-Express Gen3 and DirectGMA technology

    International Nuclear Information System (INIS)

    Rota, L.; Vogelgesang, M.; Perez, L.E. Ardila; Caselle, M.; Chilingaryan, S.; Dritschler, T.; Zilio, N.; Kopmann, A.; Balzer, M.; Weber, M.

    2016-01-01

    Modern physics experiments produce multi-GB/s data rates. Fast data links and high performance computing stages are required for continuous data acquisition and processing. Because of their intrinsic parallelism and computational power, GPUs emerged as an ideal solution to process this data in high performance computing applications. In this paper we present a high-throughput platform based on direct FPGA-GPU communication. The architecture consists of a Direct Memory Access (DMA) engine compatible with the Xilinx PCI-Express core, a Linux driver for register access, and high- level software to manage direct memory transfers using AMD's DirectGMA technology. Measurements with a Gen3 x8 link show a throughput of 6.4 GB/s for transfers to GPU memory and 6.6 GB/s to system memory. We also assess the possibility of using the architecture in low latency systems: preliminary measurements show a round-trip latency as low as 1 μs for data transfers to system memory, while the additional latency introduced by OpenCL scheduling is the current limitation for GPU based systems. Our implementation is suitable for real-time DAQ system applications ranging from photon science and medical imaging to High Energy Physics (HEP) systems

  11. The PAUCam readout electronics system

    Science.gov (United States)

    Jiménez, Jorge; Illa, José M.; Cardiel-Sas, Laia; de Vicente, Juan; Castilla, Javier; Casas, Ricard

    2016-08-01

    The PAUCam is an optical camera with a wide field of view of 1 deg x 1 deg and up to 46 narrow and broad band filters. The camera is already installed on the William Herschel Telescope (WHT) in the Canary Islands, Spain and successfully commissioned during the first period of 2015. The paper presents the main results from the readout electronics commissioning tests and include an overview of the whole readout electronics system, its configuration and current performance.

  12. Flexure mechanism-based parallelism measurements for chip-on-glass bonding

    International Nuclear Information System (INIS)

    Jung, Seung Won; Yun, Won Soo; Jin, Songwan; Jeong, Young Hun; Kim, Bo Sun

    2011-01-01

    Recently, liquid crystal displays (LCDs) have played vital roles in a variety of electronic devices such as televisions, cellular phones, and desktop/laptop monitors because of their enhanced volume, performance, and functionality. However, there is still a need for thinner LCD panels due to the trend of miniaturization in electronic applications. Thus, chip-on-glass (COG) bonding has become one of the most important aspects in the LCD panel manufacturing process. In this study, a novel sensor was developed to measure the parallelism between the tooltip planes of the bonding head and the backup of the COG main bonder, which has previously been estimated by prescale pressure films in industry. The sensor developed in this study is based on a flexure mechanism, and it can measure the total pressing force and the inclination angles in two directions that satisfy the quantitative definition of parallelism. To improve the measurement accuracy, the sensor was calibrated based on the estimation of the total pressing force and the inclination angles using the least-squares method. To verify the accuracy of the sensor, the estimation results for parallelism were compared with those from prescale pressure film measurements. In addition, the influence of parallelism on the bonding quality was experimentally demonstrated. The sensor was successfully applied to the measurement of parallelism in the COG-bonding process with an accuracy of more than three times that of the conventional method using prescale pressure films

  13. Optical biosensor based on a silicon nanowire ridge waveguide for lab on chip applications

    International Nuclear Information System (INIS)

    Gamal, Rania; Ismail, Yehea; Swillam, Mohamed A

    2015-01-01

    We propose a novel sensor using a silicon nanowire ridge waveguide (SNRW). This waveguide is comprised of an array of silicon nanowires on an insulator substrate that has the envelope of a ridge waveguide. The SNRW inherently maximizes the overlap between the material-under-test and the incident light wave by introducing voids to the otherwise bulk structure. When a sensing sample is injected, the voids within the SNRW adopt the refractive index of the material-under-test. Hence, the strong contribution of the material-under-test to the overall modal effective index will greatly augment the sensitivity. Additionally, the ridge structure provides a fabrication convenience as it covers the entire substrate, ensuring that the etching process would not damage the substrate. Finite-difference time-domain simulations are conducted and showed that the percentage change in the effective index due to a 1% change in the surrounding environment is more than 170 times the change perceived in an evanescent-detection based bulk silicon ridge waveguide. Moreover, the SNRW proves to be more sensitive than recent other, non-evanescent sensors. In addition, the detection limit for this structure was revealed to be as small as 10 −8 . A compact bimodal waveguide based on SNRW is designed and tested. It delivers high sensitivity values that offer comparable performance to similar low-index light-guiding sensing configurations; however, our proposed structure has much smaller footprints and allows high dense integration for lab-on-chip applications. (paper)

  14. Magnetic actuator for the control and mixing of magnetic bead-based reactions on-chip.

    Science.gov (United States)

    Berenguel-Alonso, Miguel; Granados, Xavier; Faraudo, Jordi; Alonso-Chamarro, Julián; Puyol, Mar

    2014-10-01

    While magnetic bead (MB)-based bioassays have been implemented in integrated devices, their handling on-chip is normally either not optimal--i.e. only trapping is achieved, with aggregation of the beads--or requires complex actuator systems. Herein, we describe a simple and low-cost magnetic actuator to trap and move MBs within a microfluidic chamber in order to enhance the mixing of a MB-based reaction. The magnetic actuator consists of a CD-shaped plastic unit with an arrangement of embedded magnets which, when rotating, generate the mixing. The magnetic actuator has been used to enhance the amplification reaction of an enzyme-linked fluorescence immunoassay to detect Escherichia coli O157:H7 whole cells, an enterohemorrhagic strain, which have caused several outbreaks in food and water samples. A 2.7-fold sensitivity enhancement was attained with a detection limit of 603 colony-forming units (CFU) /mL, when employing the magnetic actuator.

  15. The GOTTHARD charge integrating readout detector: design and characterization

    International Nuclear Information System (INIS)

    Mozzanica, A; Bergamaschi, A; Dinapoli, R; Greiffenberg, D; Henrich, B; Johnson, I; Valeria, R; Schmitt, B; Xintian, S; Graafsma, H; Lohmann, M

    2012-01-01

    A charge integrating readout ASIC (Application Specific Integrated Circuit) for silicon strip sensors has been developed at PSI in collaboration with DESY. The goal of the project is to provide a charge integrating readout system able to cope with the pulsed beam of XFEL machines and at the same time to retain the high dynamic range and single photon resolution performances typical for photon counting systems. The ASIC, designed in IBM 130 nm CMOS technology, takes advantage of its three gain stages with automatic stage selection to achieve a dynamic range of 10000 12 keV photons and a noise better than 300 e.n.c.. The 4 analog outputs of the ASIC are optimized for speed, allowing frame rates higher than 1 MHz, without compromises on linearity and noise performances. This work presents the design features of the ASIC, and reports the characterization results of the chip itself.

  16. A Resettable Keypad Lock with Visible Readout Based on Closed Bipolar Electrochemistry and Electrochromic Poly(3-methylthiophene) Films.

    Science.gov (United States)

    Wang, Lei; Lian, Wenjing; Liu, Hongyun

    2016-03-24

    A closed bipolar electrode (BPE) system was developed with electrochromic poly(3-methylthiophene) (PMT) films electropolymerized on the ITO/rGO electrode as one pole of BPE in the reporting reservoir and the bare ITO electrode as another pole of BPE in the analyte reservoir, in which rGO represents reduced graphene oxide. Under a suitable driving voltage (Vtot), the electrochemical reduction/oxidation of electroactive probes, such as H2O2/glutathione (Glu), in the analyte reservoir could induce the reversible color change of PMT films in the reporting reservoir between blue and red. Based on this, a keypad lock with H2O2 , Glu, and Vtot =-3.0 V as the three inputs and the color change of PMT films as the visible output was established. This system was easily operated and did not need to synthesize the complex compounds or DNA molecules. The security system was easy to reset and could be used repeatedly. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  17. Dual-readout calorimetry with scintillating crystals

    International Nuclear Information System (INIS)

    Pinci, D

    2009-01-01

    The dual-readout approach, which allows an event-by-event measurement of the electromagnetic shower fraction, was originally demonstrated with the DREAM sampling calorimeter. This approach can be extended to homogeneous detectors like crystals if Cherenkov and scintillation light can be separated. In this paper we present several methods we developed for distinguishing the two components in PWO and BGO based calorimeters and the results obtained.

  18. Signal processing for distributed readout using TESs

    International Nuclear Information System (INIS)

    Smith, Stephen J.; Whitford, Chris H.; Fraser, George W.

    2006-01-01

    We describe optimal filtering algorithms for determining energy and position resolution in position-sensitive Transition Edge Sensor (TES) Distributed Read-Out Imaging Devices (DROIDs). Improved algorithms, developed using a small-signal finite-element model, are based on least-squares minimisation of the total noise power in the correlated dual TES DROID. Through numerical simulations we show that significant improvements in energy and position resolution are theoretically possible over existing methods

  19. Metabolic changes assessed by MRS accurately reflect brain function during drug-induced epilepsy in mice in contrast to fMRI-based hemodynamic readouts.

    Science.gov (United States)

    Seuwen, Aline; Schroeter, Aileen; Grandjean, Joanes; Rudin, Markus

    2015-10-15

    Functional proton magnetic resonance spectroscopy (1H-MRS) enables the non-invasive assessment of neural activity by measuring signals arising from endogenous metabolites in a time resolved manner. Proof-of-principle of this approach has been demonstrated in humans and rats; yet functional 1H-MRS has not been applied in mice so far, although it would be of considerable interest given the many genetically engineered models of neurological disorders established in this species only. Mouse 1H-MRS is challenging as the high demands on spatial resolution typically result in long data acquisition times not commensurable with functional studies. Here, we propose an approach based on spectroscopic imaging in combination with the acquisition of the free induction decay to maximize signal intensity. Highly resolved metabolite maps have been recorded from mouse brain with 12 min temporal resolution. This enabled monitoring of metabolic changes following the administration of bicuculline, a GABA-A receptor antagonist. Changes in levels of metabolites involved in energy metabolism (lactate and phosphocreatine) and neurotransmitters (glutamate) were investigated in a region-dependent manner and shown to scale with the bicuculline dose. GABAergic inhibition induced spectral changes characteristic for increased neurotransmitter turnover and oxidative stress. In contrast to metabolic readouts, BOLD and CBV fMRI responses did not scale with the bicuculline dose indicative of the failure of neurovascular coupling. Nevertheless fMRI measurements supported the notion of increased oxidative stress revealed by functional MRS. Hence, the combined analysis of metabolic and hemodynamic changes in response to stimulation provides complementary insight into processes associated with neural activity. Copyright © 2015 Elsevier Inc. All rights reserved.

  20. FE-I4 pixel chip characterization with USBpix3 test system

    Energy Technology Data Exchange (ETDEWEB)

    Filimonov, Viacheslav; Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Janssen, Jens; Krueger, Hans; Pohl, David-Leon; Wermes, Norbert [University of Bonn, Bonn (Germany)

    2015-07-01

    The USBpix readout system is a small and light weighting test system for the ATLAS pixel readout chips. It is widely used to operate and characterize FE-I4 pixel modules in lab and test beam environments. For multi-chip modules the resources on the Multi-IO board, that is the central control unit of the readout system, are coming to their limits, which makes the simultaneous readout of more than one chip at a time challenging. Therefore an upgrade of the current USBpix system has been developed. The upgraded system is called USBpix3 - the main focus of the talk. Characterization of single chip FE-I4 modules was performed with USBpix3 prototype (digital, analog, threshold and source scans; tuning). PyBAR (Bonn ATLAS Readout in Python scripting language) was used as readout software. PyBAR consists of FEI4 DAQ and Data Analysis Libraries in Python. The presentation describes the USBpix3 system, results of FE-I4 modules characterization and preparation for the multi-chip module and multi-module readout with USBpix3.

  1. A multichannel front end ASIC for PMT readout in LHAASO WCDA

    Science.gov (United States)

    Liang, Y.; Zhao, L.; Guo, Y.; Qin, J.; Yang, Y.; Cheng, B.; Liu, S.; An, Q.

    2018-01-01

    Time and charge measurements over a large dynamic range from 1 Photo Electron (P.E.) to 4000 P.E. are required for the Water Cherenkov Detector Array (WCDA), which is one of the key components in the Large High Altitude Air Shower Observatory (LHAASO). To simplify the circuit structure of the readout electronics, a front end ASIC was designed. Based on the charge-to-time conversion method, the output pulse width of the ASIC corresponds to the input signal charge information while time information of the input signal is picked off through a discriminator, and thus the time and charge information can be digitized simultaneously using this ASIC and a following Time-to-Digital Converter (TDC). To address the challenge of mismatch among the channels observed in the previous prototype version, this work presents approaches for analyzing the problem and optimizing the circuits. A new version of the ASIC was designed and fabricated in the GLOBALFOUNDRIES 0.35 μm CMOS technology, which integrates 6 channels (corresponding to the readout of the 3 PMTs) in each chip. The test results indicate that the mismatch between the channels is significantly reduced to less than 20% using the proposed approach. The time measurement resolution better than 300 ps is achieved, and the charge measurement resolution is better than 10% at 1 P.E., and 1% at 4000 P.E., which meets the application requirements.

  2. Dedicated multichannel readout ASIC coupled with single crystal diamond for dosimeter application

    International Nuclear Information System (INIS)

    Fabbri, A; Notaristefani, F De; Galasso, M; Cencelli, V Orsolini; Falco, M D; Marinelli, M; Tortora, L; Verona, C; Rinati, G Verona

    2013-01-01

    This paper reports on the tests of a low-noise, multi-channel readout integrated circuit used as a readout electronic front-end for a diamond multi-pixel dosimeter. The system is developed for dose distribution measurement in radiotherapy applications. The first 10-channel prototype chip was designed and fabricated in a 0.18 um CMOS process. Every channel includes a charge integrator with a 10 pF capacitor and a double slope A/D converter. The diamond multi-pixel detector, based on CVD synthetic single crystal diamond Schottky diodes, is made by a 3 × 3 sensor matrix. The overall device has been tested under irradiation with 6 MeV radio therapeutic photon beams at the Policlinico ''Tor Vergata'' (PTV) hospital. Measurements show a 20 fA RMS leakage current from the front-end input stage and a negligible dark current from the diamond detector, a stable temporal response and a good linear behaviour as a function of both dose and dose rate. These characteristics were common to each tested channel.

  3. Medipix3 array high performance read-out board for synchrotron research

    International Nuclear Information System (INIS)

    Tartoni, N.; Horswell, I. C.; Marchal, J.; Gimenez, E. N.; Fearn, R. D.; Silfhout, R. G. van

    2010-01-01

    The Medipix3 ASIC is one of the most advanced chip that is presently available to build photon counting area detectors. The capabilities of the chip include adjacent pixels charge summing circuitry to sort out the distortion due to charge sharing, simultaneous counting and read-out that enables frames to be acquired without dead time, the colour mode of operation that enables up to eight energy bands to be acquired. In order to fully exploit the capabilities of the Medipix3 chip in synchrotron research, a high performance electronic board capable of driving large arrays of chips is necessary. We propose a parallel read-out board of Medipix3 chip arrays with a scalable architecture that allows driving the Medipix3 chip in all of its modes of operation. The board functions include the control of the chip arrays, data formatting and data compression, the management of the communications with the data storage devices, and operation in various trigger modes. In addition to this the board will have some 'intelligence' embedded. This will add some very important features to the final detector such as pattern recognition, capability of variable frame duration as a function of the photon flux, feedback to other equipment and real time calculations of data relevant to experiments such as the autocorrelation function.

  4. System on chip thermal vacuum sensor based on standard CMOS process

    International Nuclear Information System (INIS)

    Li Jinfeng; Tang Zhenan; Wang Jiaqi

    2009-01-01

    An on-chip microelectromechanical system was fabricated in a 0.5 μm standard CMOS process for gas pressure detection. The sensor was based on a micro-hotplate (MHP) and had been integrated with a rail to rail operational amplifier and an 8-bit successive approximation register (SAR) A/D converter. A tungsten resistor was manufactured on the MHP as the sensing element, and the sacrificial layer of the sensor was made from polysilicon and etched by surface-micromachining technology. The operational amplifier was configured to make the sensor operate in constant current mode. A digital bit stream was provided as the system output. The measurement results demonstrate that the gas pressure sensitive range of the vacuum sensor extends from 1 to 10 5 Pa. In the gas pressure range from 1 to 100 Pa, the sensitivity of the sensor is 0.23 mV/ Pa, the linearity is 4.95%, and the hysteresis is 8.69%. The operational amplifier can drive 200 ω resistors distortionlessly, and the SAR A/D converter achieves a resolution of 7.4 bit with 100 kHz sample rate. The performance of the operational amplifier and the SAR A/D converter meets the requirements of the sensor system.

  5. Chip-integrated optical power limiter based on an all-passive micro-ring resonator

    Science.gov (United States)

    Yan, Siqi; Dong, Jianji; Zheng, Aoling; Zhang, Xinliang

    2014-10-01

    Recent progress in silicon nanophotonics has dramatically advanced the possible realization of large-scale on-chip optical interconnects integration. Adopting photons as information carriers can break the performance bottleneck of electronic integrated circuit such as serious thermal losses and poor process rates. However, in integrated photonics circuits, few reported work can impose an upper limit of optical power therefore prevent the optical device from harm caused by high power. In this study, we experimentally demonstrate a feasible integrated scheme based on a single all-passive micro-ring resonator to realize the optical power limitation which has a similar function of current limiting circuit in electronics. Besides, we analyze the performance of optical power limiter at various signal bit rates. The results show that the proposed device can limit the signal power effectively at a bit rate up to 20 Gbit/s without deteriorating the signal. Meanwhile, this ultra-compact silicon device can be completely compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may pave the way of very large scale integrated photonic circuits for all-optical information processors and artificial intelligence systems.

  6. Wireless implantable chip with integrated nitinol-based pump for radio-controlled local drug delivery.

    Science.gov (United States)

    Fong, Jeffrey; Xiao, Zhiming; Takahata, Kenichi

    2015-02-21

    We demonstrate an active, implantable drug delivery device embedded with a microfluidic pump that is driven by a radio-controlled actuator for temporal drug delivery. The polyimide-packaged 10 × 10 × 2 mm(3) chip contains a micromachined pump chamber and check valves of Parylene C to force the release of the drug from a 76 μL reservoir by wirelessly activating the actuator using external radio-frequency (RF) electromagnetic fields. The rectangular-shaped spiral-coil actuator based on nitinol, a biocompatible shape-memory alloy, is developed to perform cantilever-like actuation for pumping operation. The nitinol-coil actuator itself forms a passive 185 MHz resonant circuit that serves as a self-heat source activated via RF power transfer to enable frequency-selective actuation and pumping. Experimental wireless operation of fabricated prototypes shows successful release of test agents from the devices placed in liquid and excited by radiating tuned RF fields with an output power of 1.1 W. These tests reveal a single release volume of 219 nL, suggesting a device's capacity of ~350 individual ejections of drug from its reservoir. The thermal behavior of the activated device is also reported in detail. This proof-of-concept prototype validates the effectiveness of wireless RF pumping for fully controlled, long-lasting drug delivery, a key step towards enabling patient-tailored, targeted local drug delivery through highly miniaturized implants.

  7. On-Chip Neural Data Compression Based On Compressed Sensing With Sparse Sensing Matrices.

    Science.gov (United States)

    Zhao, Wenfeng; Sun, Biao; Wu, Tong; Yang, Zhi

    2018-02-01

    On-chip neural data compression is an enabling technique for wireless neural interfaces that suffer from insufficient bandwidth and power budgets to transmit the raw data. The data compression algorithm and its implementation should be power and area efficient and functionally reliable over different datasets. Compressed sensing is an emerging technique that has been applied to compress various neurophysiological data. However, the state-of-the-art compressed sensing (CS) encoders leverage random but dense binary measurement matrices, which incur substantial implementation costs on both power and area that could offset the benefits from the reduced wireless data rate. In this paper, we propose two CS encoder designs based on sparse measurement matrices that could lead to efficient hardware implementation. Specifically, two different approaches for the construction of sparse measurement matrices, i.e., the deterministic quasi-cyclic array code (QCAC) matrix and -sparse random binary matrix [-SRBM] are exploited. We demonstrate that the proposed CS encoders lead to comparable recovery performance. And efficient VLSI architecture designs are proposed for QCAC-CS and -SRBM encoders with reduced area and total power consumption.

  8. RD Collaboration Proposal: Development of pixel readout integrated circuits for extreme rate and radiation

    CERN Document Server

    Chistiansen, J (CERN)

    2013-01-01

    This proposal describes a new RD collaboration to develop the next genrration of hybrid pixel readout chips for use in ATLAS and CMS PHase 2 upgrades. extrapolation of hybrid pixel technology to the HL-LHC presents major challenges on several fronts. Challenges include: smaller pixels to resolve tracks in boosted jets, much higher hit rates (1-2 GHz/cm2 ), unprecedented radiation tolerance (10 MGy), much higher output bandwidth, and large IC format with low power consumption in order to instrument large areas while keeping the material budget low. This collaboration is specifically focused on design of hybrid pixel readout chips, and not on more general chip design or on other aspects of hybrid pixel technology. Participants include 7 institutes on ATLAS and 7 on CMS, plus 2 on both experiments.

  9. Paper-Based Digital Microfluidic Chip for Multiple Electrochemical Assay Operated by a Wireless Portable Control System

    DEFF Research Database (Denmark)

    Ruecha, Nipapan; Lee, Jumi; Chae, Heedo

    2017-01-01

    for multiple analysis assays are fabricated by affordable printing techniques. For enhanced sensitivity of the sensor, the working electrode is modified through the electrochemical method, namely by reducing graphene with voltammetry and coating gold nanoparticles by amperometry. Detachable sensor and absorber...... designed portable power supply and wireless control system, the active paper-based chip platform can be utilized as an advanced point-of-care device for multiple assays in digital microfluidics....

  10. Spatial redistribution of radiation in flip-chip photodiodes based on InAsSbP/InAs double heterostructures

    Energy Technology Data Exchange (ETDEWEB)

    Zakgeim, A. L. [Russian Academy of Sciences, Scientific and Technological Center for Microelectronics (Russian Federation); Il’inskaya, N. D.; Karandashev, S. A.; Lavrov, A. A., E-mail: ioffeled@mail.ru; Matveev, B. A.; Remennyy, M. A.; Stus’, N. M.; Usikova, A. A. [Russian Academy of Sciences, Ioffe Institute (Russian Federation); Cherniakov, A. E. [Russian Academy of Sciences, Scientific and Technological Center for Microelectronics (Russian Federation)

    2017-02-15

    The spatial distribution of equilibrium and nonequilibrium (including luminescent) IR (infrared) radiation in flip-chip photodiodes based on InAsSbP/InAs double heterostructures (λ{sub max} = 3.4 μm) is measured and analyzed; the structural features of the photodiodes, including the reflective properties of the ohmic contacts, are taken into account. Optical area enhancement due to multiple internal reflection in photodiodes with different geometric characteristics is estimated.

  11. Design of a CMOS integrated on-chip oscilloscope for spin wave characterization

    Directory of Open Access Journals (Sweden)

    Eugen Egel

    2017-05-01

    Full Text Available Spin waves can perform some optically-inspired computing algorithms, e.g. the Fourier transform, directly than it is done with the CMOS logic. This article describes a new approach for on-chip characterization of spin wave based devices. The readout circuitry for the spin waves is simulated with 65-nm CMOS technology models. Commonly used circuits for Radio Frequency (RF receivers are implemented to detect a sinusoidal ultra-wideband (5-50 GHz signal with an amplitude of at least 15 μV picked up by a loop antenna. First, the RF signal is amplified by a Low Noise Amplifier (LNA. Then, it is down-converted by a mixer to Intermediate Frequency (IF. Finally, an Operational Amplifier (OpAmp brings the IF signal to higher voltages (50-300 mV. The estimated power consumption and the required area of the readout circuit is approximately 55.5 mW and 0.168 mm2, respectively. The proposed On-Chip Oscilloscope (OCO is highly suitable for on-chip spin wave characterization regarding the frequency, amplitude change and phase information. It offers an integrated low power alternative to current spin wave detecting systems.

  12. Chip-Scale Bioassays Based on Surface-Enhanced Raman Scattering: Fundamentals and Applications

    Energy Technology Data Exchange (ETDEWEB)

    Park, Hye-Young [Iowa State Univ., Ames, IA (United States)

    2005-01-01

    This work explores the development and application of chip-scale bioassays based on surface-enhanced Raman scattering (SERS) for high throughput and high sensitivity analysis of biomolecules. The size effect of gold nanoparticles on the intensity of SERS is first presented. A sandwich immunoassay was performed using Raman-labeled immunogold nanoparticles with various sizes. The SERS responses were correlated to particle densities, which were obtained by atomic force microscopy (AFM). The response of individual particles was also investigated using Raman-microscope and an array of gold islands on a silicon substrate. The location and the size of individual particles were mapped using AFM. The next study describes a low-level detection of Escherichia coli 0157:H7 and simulants of biological warfare agents in a sandwich immunoassay format using SERS labels, which have been termed Extrinsic Raman labels (ERLs). A new ERL scheme based on a mixed monolayer is also introduced. The mixed monolayer ERLs were created by covering the gold nanoparticles with a mixture of two thiolates, one thiolate for covalently binding antibody to the particle and the other thiolate for producing a strong Raman signal. An assay platform based on mixed self-assembled monolayers (SAMs) on gold is then presented. The mixed SAMs were prepared from dithiobis(succinimidyl undecanoate) (DSU) to covalently bind antibodies on gold substrate and oligo(ethylene glycol)-terminated thiol to prevent nonspecific adsorption of antibodies. After the mixed SAMs surfaces, formed from various mole fraction of DSU were incubated with antibodies, AFM was used to image individual antibodies on the surface. The final study presents a collaborative work on the single molecule adsorption of YOYO-I labeled {lambda}-DNA at compositionally patterned SAMs using total internal reflection fluorescence microscopy. The role of solution pH, {lambda}-DNA concentration, and domain size was investigated. This work also revealed

  13. FAIR: A new fast trigger and readout bus system

    International Nuclear Information System (INIS)

    Ordine, A.; Boiano, A.; Zaghi, A.

    1998-01-01

    FAIR (FAst Intercrate Readout) is a synchronous ECL bus system dedicated to readout. It is based on a new trigger and readout hardware level protocol and on a new control system that learns how to setup and control modules. The hardware protocol along with the data structure allow both readout and event building at the same time at the rate of 22 ns/longword (1.44 Gbit/s) without the need of CPUs. It performs trigger management and full pipelining by using a multilevel FIFO structure. FAIR provides for a multi-crate front-end environment and uses an embedded serial network to accomplish front-end control and setup. The data transfer measured performances and the control system are presented in some detail

  14. The Design of High Performance, Low Power Triple-Track Magnetic Sensor Chip

    Directory of Open Access Journals (Sweden)

    Junning Chen

    2013-07-01

    Full Text Available This paper presents a design of a high performance and low power consumption triple-track magnetic sensor chip which was fabricated in TSMC 0.35 μm CMOS process. This chip is able to simultaneously sense, decode and read out the information stored in triple-track magnetic cards. A reference voltage generating circuit, a low-cost filter circuit, a power-on reset circuit, an RC oscillator, and a pre-decoding circuit are utilized as the basic modules. The triple-track magnetic sensor chip has four states, i.e., reset, sleep, swiping card and data read-out. In sleep state, the internal RC oscillator is closed, which means that the digital part does not operate to optimize energy consumption. In order to improve decoding accuracy and expand the sensing range of the signal, two kinds of circuit are put forward, naming offset correction circuit, and tracking circuit. With these two circuits, the sensing function of this chip can be more efficiently and accurately. We simulated these circuit modules with TSMC technology library. The results showed that these modules worked well within wide range input signal. Based on these results, the layout and tape-out were carried out. The measurement results showed that the chip do function well within a wide swipe speed range, which achieved the design target.

  15. Rapid fabrication of microfluidic chips based on the simplest LED lithography

    Science.gov (United States)

    Li, Yue; Wu, Ping; Luo, Zhaofeng; Ren, Yuxuan; Liao, Meixiang; Feng, Lili; Li, Yuting; He, Liqun

    2015-05-01

    Microfluidic chips are generally fabricated by a soft lithography method employing commercial lithography equipment. These heavy machines require a critical room environment and high lamp power, and the cost remains too high for most normal laboratories. Here we present a novel microfluidics fabrication method utilizing a portable ultraviolet (UV) LED as an alternative UV source for photolithography. With this approach, we can repeat several common microchannels as do these conventional commercial exposure machines, and both the verticality of the channel sidewall and lithography resolution are proved to be acceptable. Further microfluidics applications such as mixing, blood typing and microdroplet generation are implemented to validate the practicability of the chips. This simple but innovative method decreases the cost and requirement of chip fabrication dramatically and may be more popular with ordinary laboratories.

  16. Rapid fabrication of microfluidic chips based on the simplest LED lithography

    International Nuclear Information System (INIS)

    Li, Yue; Wu, Ping; Liao, Meixiang; Feng, Lili; Li, Yuting; He, Liqun; Luo, Zhaofeng; Ren, Yuxuan

    2015-01-01

    Microfluidic chips are generally fabricated by a soft lithography method employing commercial lithography equipment. These heavy machines require a critical room environment and high lamp power, and the cost remains too high for most normal laboratories. Here we present a novel microfluidics fabrication method utilizing a portable ultraviolet (UV) LED as an alternative UV source for photolithography. With this approach, we can repeat several common microchannels as do these conventional commercial exposure machines, and both the verticality of the channel sidewall and lithography resolution are proved to be acceptable. Further microfluidics applications such as mixing, blood typing and microdroplet generation are implemented to validate the practicability of the chips. This simple but innovative method decreases the cost and requirement of chip fabrication dramatically and may be more popular with ordinary laboratories. (paper)

  17. Readout electronics for low dark count pixel detectors based on Geiger mode avalanche photodiodes fabricated in conventional CMOS technologies for future linear colliders

    International Nuclear Information System (INIS)

    Vilella, E.; Arbat, A.; Comerma, A.; Trenado, J.; Alonso, O.; Gascon, D.; Vila, A.; Garrido, L.; Dieguez, A.

    2011-01-01

    High sensitivity and excellent timing accuracy of the Geiger mode avalanche photodiodes make them ideal sensors as pixel detectors for particle tracking in high energy physics experiments to be performed in future linear colliders. Nevertheless, it is well known that these sensors suffer from dark counts and afterpulsing noise, which induce false hits (indistinguishable from event detection) as well as an increase in the necessary area of the readout system. In this work, we present a comparison between APDs fabricated in a high voltage 0.35 μm and a high integration 0.13 μm commercially available CMOS technologies that has been performed to determine which of them best fits the particle collider requirements. In addition, a readout circuit that allows low noise operation is introduced. Experimental characterization of the proposed pixel is also presented in this work.

  18. A novel conductive-polymer-based integration process for high-performance flip-chip packages

    Science.gov (United States)

    Lohokare, Saurabh

    Conductive polymers have recently attracted considerable attention for low-temperature fabrication of lead-free, reworkable, and flexible flip-chip interconnects. Using these materials, I demonstrate in this thesis a process that enables low-cost and high-resolution flip-chip interconnects using conventional micro-fabrication techniques. This fabrication process offers improved performance as compared to conventional flip-chip techniques, such as screen-printing, and allows for definition of interconnects with excellent surface uniformity and control over the bump profile. In order to demonstrate the utility and wide applicability of this process, several test implementations that serve as case studies were investigated. Specifically, novel InGaAsSb avalanche photodiodes (APDs), operating around lambda = 2m and targeted for free-space communication and biomedical spectroscopy applications, were fabricated and flip-chip-integrated to test the static electrical characteristics of the polymer bumps. Additionally, the dynamic electrical performance characteristics of the polymer bumps were studied by using AlGaAsSb/AlGaSb p-i-n photodetectors as a case study. The fabrication of these photodetectors, operating around lambda = 1.55mum and targeted for optical communication applications, was accomplished using a customized inductively coupled plasma (ICP) etch process that resulted in a low dark current and excellent speed (3dB bandwidth of 10GHz) and, responsivity (60% external quantum efficiency) characteristics. Furthermore, flip-chip integration was used to demonstrate a three-dimensional, point-to-point micro-optical interconnect, which was 2.33mm-long in a system 15.27mm3 in volume. Lastly, high-speed parallel optical interconnects were demonstrated using polymer-flip-chip-integrated 10GHz vertical-cavity surface-emitting laser (VCSEL) and DOEs. Such interconnects offer the ability to alleviate the communication bottleneck that is projected to occur in future, high

  19. WDM-Coherent OCDMA over one single device based on short chip Super Structured Fiber Bragg Gratings.

    Science.gov (United States)

    Amaya, Waldimar; Pastor, Daniel; Baños, Rocio; Garcia-Munoz, Victor

    2011-11-21

    We theoretically propose and demonstrate experimentally a Coherent Direct Sequence OCDMA en/decoder for multi-channel WDM operation based on a single device. It presents a broadband spectral envelope and a periodic spectral pattern that can be employed for en/decoding multiple sub-bands simultaneously. Multi-channel operation is verified experimentally by means of Multi-Band Super Structured Fiber Bragg Gratings with binary phase encoded chips fabricated with 1mm inter-chip separation that provides 4x100 GHz ITU sub-band separation at 1.25 Gbps. The WDM-OCDMA system verification was carried out employing simultaneous encoding of four adjacent sub-bands and two different OCDMA codes. © 2011 Optical Society of America

  20. The pipelined readout for the ZEUS calorimeter

    International Nuclear Information System (INIS)

    Hervas, L.

    1991-01-01

    The electron-proton storage ring complex HERA under construction at DESY in Hamburg is the first machine of a new generation of colliders. Since physics to be studied at HERA (covered in chapter 2) base on the precise measurement of kinematic variables over a very large range of energies, a foremost emphasis is set in calorimetry. After long studies and an ambitious test program, the ZEUS collaboration has built a high resolution depleted uranium-scintillator calorimeter with photomultiplier readout, the state of the art in detectors of this type. In chapter 3 the principles of calorimetry are reviewed and the construction of the ZEUS calorimeter is described. Mainly due to the large dynamic range and the short bunch crossing times a novel concept for the readout in an analog pipelined fashion had to be designed. This concept is explained in chapter 4. The solid state implementation of the pipeline required two integrated circuits which were developed specially for the ZEUS calorimeter in collaboration with an electronics research institute and produced by industry. The design and construction of these devices and the detailed testing which has been performed for properties critical in the readout is covered in chapters 5 and 6. The whole pipelined readout is a complicated setup with many steps and collaborating systems. Its implementation and the information to operate it are covered in chapter 7. Finally the concepts presented and the applications discussed have been installed and tested on a test beam calibration experiment. There, the modules of the calorimeter have been calibrated. Chapter 8 presents results from these measurements which show excellent performance of the electronics as well as optimal properties of the calorimeter modules. (orig./HSI)

  1. Newborn screening by matrix-assisted laser desorption/ionization mass spectrometry based on parylene-matrix chip.

    Science.gov (United States)

    Kim, Jo-Il; Noh, Joo-Yoon; Kim, Mira; Park, Jong-Min; Song, Hyun-Woo; Kang, Min-Jung; Pyun, Jae-Chul

    2017-08-01

    Newborn screening for diagnosis of phenylketonuria, homocystinuria, and maple syrup urine disease have been conducted by analyzing the concentration of target amino acids using matrix-assisted laser desorption/ionization time-of-flight mass spectrometry (MALDI-ToF MS) based on parylene-matrix chip. Parylene-matrix chip was applied to MALDI-ToF MS analysis reducing the matrix peaks significantly at low mass-to-charge ratio range (m/z  0.98) and the LODs were ranging from 9.0 to 22.9 μg/mL. Effect of proteins in serum was estimated by comparing MALDI-ToF mass spectra of amino acids-spiked serum before and after the methanol extraction. Interference of other amino acids on analysis of target analyte was determined to be insignificant. From these results, MALDI-ToF MS based on parylene-matrix chip could be applicable to medical diagnosis of neonatal metabolic disorders. Copyright © 2017 Elsevier Inc. All rights reserved.

  2. Development of γ dose rate monitor based on FPGA and single-chip microcomputer

    International Nuclear Information System (INIS)

    He Zhiguo; Ling Qiu; Guo Lanying; Yang Binhua

    2009-01-01

    A novelγdose rate monitor with multiple channels signal collection in which takes the FPGA as the core process chip and single-chip microcomputer as the data processor had been developed. This paper introduced the communication interface design between FPGA and MCU, and gave the data acquisition module and the function simulation chart designed by FPGA. In addition, the software and hardware design diagrams of MCU had been given in this paper. The maximum digitallization was carried on in the designing process. The experiments showed that the scheme for the system matched to the requests completely. (authors)

  3. Cell Monitoring and Manipulation Systems (CMMSs based on Glass Cell-Culture Chips (GC3s

    Directory of Open Access Journals (Sweden)

    Sebastian M. Buehler

    2016-06-01

    Full Text Available We developed different types of glass cell-culture chips (GC3s for culturing cells for microscopic observation in open media-containing troughs or in microfluidic structures. Platinum sensor and manipulation structures were used to monitor physiological parameters and to allocate and permeabilize cells. Electro-thermal micro pumps distributed chemical compounds in the microfluidic systems. The integrated temperature sensors showed a linear, Pt1000-like behavior. Cell adhesion and proliferation were monitored using interdigitated electrode structures (IDESs. The cell-doubling times of primary murine embryonic neuronal cells (PNCs were determined based on the IDES capacitance-peak shifts. The electrical activity of PNC networks was detected using multi-electrode arrays (MEAs. During seeding, the cells were dielectrophoretically allocated to individual MEAs to improve network structures. MEA pads with diameters of 15, 20, 25, and 35 µm were tested. After 3 weeks, the magnitudes of the determined action potentials were highest for pads of 25 µm in diameter and did not differ when the inter-pad distances were 100 or 170 µm. Using 25-µm diameter circular oxygen electrodes, the signal currents in the cell-culture media were found to range from approximately −0.08 nA (0% O2 to −2.35 nA (21% O2. It was observed that 60-nm thick silicon nitride-sensor layers were stable potentiometric pH sensors under cell-culture conditions for periods of days. Their sensitivity between pH 5 and 9 was as high as 45 mV per pH step. We concluded that sensorized GC3s are potential animal replacement systems for purposes such as toxicity pre-screening. For example, the effect of mefloquine, a medication used to treat malaria, on the electrical activity of neuronal cells was determined in this study using a GC3 system.

  4. A 130 nm ASIC prototype for the NA62 Gigatracker readout

    Energy Technology Data Exchange (ETDEWEB)

    Dellacasa, G., E-mail: gdellaca@to.infn.it [I.N.F.N. sez. Torino, via Giuria 1, 10125 Torino (Italy); Garbolino, S. [Universita degli Studi di Torino, Dip. Fisica Sperimentale, via Giuria 1, 10125 Torino (Italy); Marchetto, F. [I.N.F.N. sez. Torino, via Giuria 1, 10125 Torino (Italy); Martoiu, S. [I.N.F.N. sez. Torino, via Giuria 1, 10125 Torino (Italy); CERN CH-1211, Geneve 23 (Switzerland); Mazza, G.; Rivetti, A.; Wheadon, R. [I.N.F.N. sez. Torino, via Giuria 1, 10125 Torino (Italy)

    2011-09-11

    One of the most challenging detectors of the NA62 experiment is the silicon tracker, called Gigatracker. It consists of three hybrid silicon pixel stations, each one covering an area of 27 mmx60 mm. While the maximum pixel size is fairly large, 300{mu}mx300{mu}m the system has to sustain a very high particle rate, 1.5 MHz/mm{sup 2}, which corresponds to 800 MHz for each station. To obtain an efficient tracking with such a high rate the required track timing resolution is 150 ps (rms). Therefore the front-end ASIC should provide for each pixel a 200 ps time measurement capability, thus leading to the requirement of time walk compensation and very compact TDCs. Moreover, Single Event Upset protection has to be implemented in order to protect the digital circuitry. An ASIC prototype has been realized in CMOS 130 nm technology, containing three pixel columns. The chip performs the time walk compensation by a Constant Fraction Discriminator circuit, while the time measurement is performed by a Time to Amplitude Converter based TDC, both of them implemented on each pixel cell. The End of Column circuit containing only digital logic is responsible for the data readout from the pixel cell. The whole chip works with a system clock of 160 MHz and the digital logic is SEU protected by the use of Hamming codes. The detailed architecture of the ASIC prototype and test results are presented.

  5. A 3x1 integrated pyroelectric sensor based on VDF/TrFE copolymer

    NARCIS (Netherlands)

    Setiadi, D.; Setiadi, D.; Sarro, P.M.; Regtien, Paulus P.L.

    1996-01-01

    This paper presents an integrated pyroelectric sensor based on a vinylidene fluoride¿trifluoroethylene (VDF/TrFE) copolymer. A silicon substrate that contains field-effect transistor (FET) readout electronics is coated with the VDF/TrFE copolymer film using a spin-coating technique. On-chip poling

  6. Characterization of the CBC2 readout ASIC for the CMS strip-tracker high-luminosity upgrade

    International Nuclear Information System (INIS)

    Braga, D; Hall, G; Pesaresi, M; Raymond, M; Jones, L; Murray, P; Prydderch, M

    2014-01-01

    The CMS Binary Chip 2 (CBC2) is a full-scale prototype ASIC developed for the front-end readout of the high-luminosity upgrade of the CMS silicon strip tracker. The 254-channel, 130 nm CMOS ASIC is designed for the binary readout of double-layer modules, and features cluster-width discrimination and coincidence logic for detecting high-P T track candidates. The chip was delivered in January 2013 and has since been bump-bonded to a dual-chip hybrid and extensively tested. The CBC2 is fully functional and working to specification: we present the result of electrical characterization of the chip, including gain, noise, threshold scan and power consumption, together with the performance of the stub finding logic. Finally we will outline the plan for future developments towards the production version

  7. Validation of a fully autonomous phosphate analyser based on a microfluidic lab-on-a-chip

    DEFF Research Database (Denmark)

    Slater, Conor; Cleary, J.; Lau, K.T.

    2010-01-01

    of long-term operation. This was proven by a bench top calibration of the analyser using standard solutions and also by comparing the analyser's performance to a commercially available phosphate monitor installed at a waste water treatment plant. The output of the microfluidic lab-on-a-chip analyser...

  8. Low-Cost Energy-Efficient 3-D Nano-Spikes-Based Electric Cell Lysis Chips

    KAUST Repository

    Riaz, Kashif; Leung, Siu; Fan, Zhiyong; Lee, Yi-Kuen

    2017-01-01

    Electric cell lysis (ECL) is a promising technique to be integrated with portable lab-on-a-chip without lysing agent due to its simplicity and fast processing. ECL is usually limited by the requirements of high power/voltage and costly fabrication

  9. Test-Access Planning and Test Scheduling for Embedded Core-Based System Chips

    NARCIS (Netherlands)

    Goel, Sandeep Kumar

    2005-01-01

    Advances in the semiconductor process technology enable the creation of a complete system on one single die, the so-called system chip or SOC. To reduce time-to-market for large SOCs, reuse of pre-designed and pre-veried blocks called cores is employed. Like the design style, testing of SOCs can be

  10. Integrated lab-on-chip biosensing systems based on magnetic particle actuation : a comprehensive review

    NARCIS (Netherlands)

    Reenen, van A.; Jong, de A.M.; Toonder, den J.M.J.; Prins, M.W.J.

    2014-01-01

    The demand for easy to use and cost effective medical technologies inspires scientists to develop inno-vative lab-on-chip technologies for in-vitro diagnostic testing. To fulfill the medical needs, the tests should be rapid, sensitive, quantitative, miniaturizable, and need to integrate all steps

  11. Scheduling and Fluid Routing for Flow-Based Microfluidic Laboratories-on-a-Chip

    DEFF Research Database (Denmark)

    Minhass, Wajid Hassan; McDaniel, Jeffrey; Raagaard, Michael Lander

    2017-01-01

    Microfluidic laboratories-on-chip (LoCs) are replacing the conventional biochemical analyzers and are able to integrate the necessary functions for biochemical analysis onchip. There are several types of LoCs, each having its advantages and limitations. In this paper we are interested in flow-bas...

  12. The TDCpix readout ASIC: A 75ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

    CERN Document Server

    Kluge, A; Bonacini, S; Jarron, P; Kaplon, J; Morel, M; Noy, M; Perktold, L; Poltorak, K

    2013-01-01

    The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak fl ow of particles crossing the detector modules reaches 1.27 MHz/mm 2 for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection ef fi ciency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45 40 square pixels of 300 300 μ m 2 and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low...

  13. Studies and development of a readout ASIC for pixelated CdTe detectors for space applications

    International Nuclear Information System (INIS)

    Michalowska, A.

    2013-01-01

    designed two ASICs. The first one, Caterpylar, is a test-chip, which enables the characterization of differently dimensioned CSA circuits to choose the most suitable one for the final application. It is optimized for readout of the target CdTe detector with 300 μm pixel pitch and the corresponding input parameters. With this circuit I have also analyzed possible filtering methods, in particular the semi-Gaussian shaping and the Multi-Correlated Double Sampling (MCDS). Their comparison is preceded by the theoretical analysis of these shapers. The second ASIC D 2 R 1 is a complete readout circuit, containing 256 channels to readout CdTe detector with the same number of pixels, arranged in 16 *16 array. Each channel fits into a layout area of 300 μm - 300 μm. It is based on the MCDS processing with self-triggering capabilities. The mean electronic noise measured over all channels is 29 electrons rms when characterized without the detector. The corresponding power consumption is 315 μW/channel. With these results the future measurements with the detector give prospects for reaching an FWHM spectral resolution in the order of 600 eV at 60 keV. (author) [fr

  14. Improved liquid chromatography-MS/MS of heparan sulfate oligosaccharides via chip-based pulsed makeup flow.

    Science.gov (United States)

    Huang, Yu; Shi, Xiaofeng; Yu, Xiang; Leymarie, Nancy; Staples, Gregory O; Yin, Hongfeng; Killeen, Kevin; Zaia, Joseph

    2011-11-01

    Microfluidic chip-based hydrophilic interaction chromatography (HILIC) is a useful separation system for liquid chromatography-mass spectrometry (LC-MS) in compositional profiling of heparan sulfate (HS) oligosaccharides; however, ions observed using HILIC LC-MS are low in charge. Tandem MS of HS oligosaccharide ions with low charge results in undesirable losses of SO(3) from precursor ions during collision induced dissociation. One solution is to add metal cations to stabilize sulfate groups. Another is to add a nonvolatile, polar compound such as sulfolane, a molecule known to supercharge proteins, to produce a similar effect for oligosaccharides. We demonstrate use of a novel pulsed makeup flow (MUF) HPLC-chip. The chip enables controlled application of additives during specified chromatographic time windows and thus minimizes the extent to which nonvolatile additives build up in the ion source. The pulsed MUF system was applied to LC-MS/MS of HS oligosaccharides. Metal cations and sulfolane were tested as additives. The most promising results were obtained for sulfolane, for which supercharging of the oligosaccharide ions increased their signal strengths relative to controls. Tandem MS of these supercharged precursor ions showed decreased abundances of product ions from sulfate losses yet more abundant product ions from backbone cleavages.

  15. An electrical bio-chip to transfer and detect electromagnetic stimulation on the cells based on vertically aligned carbon nanotubes

    Energy Technology Data Exchange (ETDEWEB)

    Rafizadeh-Tafti, Saeed [Nanoelectronic Center of Excellence, Thin Film and Nanoelectronic Lab, School of Electrical and Computer Engineering, University of Tehran, P.O. Box 14395/515, Tehran (Iran, Islamic Republic of); Nano Bio Electronic Devices Lab, School of Electrical and Computer Engineering, University of Tehran, P.O. Box 14395/515, Tehran (Iran, Islamic Republic of); Haqiqatkhah, Mohammad Hossein [Center of Excellence on Applied Electromagnetic Systems, School of Electrical & Computer Engineering, University of Tehran, P.O. Box 14395-515, North Kargar Avenue, Tehran (Iran, Islamic Republic of); Saviz, Mehrdad [Antenna Laboratory, School of Electrical and Computer Engineering, University of Tehran, P.O. Box 14395-515, North Kargar Avenue, Tehran (Iran, Islamic Republic of); Janmaleki, Mohsen [Medical Nanotechnology and Tissue Engineering Research Center, Shahid Beheshti University of Medical Sciences, P.O. Box 1985717443, Tehran (Iran, Islamic Republic of); Faraji Dana, Reza [Center of Excellence on Applied Electromagnetic Systems, School of Electrical & Computer Engineering, University of Tehran, P.O. Box 14395-515, North Kargar Avenue, Tehran (Iran, Islamic Republic of); Zanganeh, Somayeh [Nanoelectronic Center of Excellence, Thin Film and Nanoelectronic Lab, School of Electrical and Computer Engineering, University of Tehran, P.O. Box 14395/515, Tehran (Iran, Islamic Republic of); Nano Bio Electronic Devices Lab, School of Electrical and Computer Engineering, University of Tehran, P.O. Box 14395/515, Tehran (Iran, Islamic Republic of); Abdolahad, Mohammad, E-mail: m.abdolahad@ut.ac.ir [Nanoelectronic Center of Excellence, Thin Film and Nanoelectronic Lab, School of Electrical and Computer Engineering, University of Tehran, P.O. Box 14395/515, Tehran (Iran, Islamic Republic of); Nano Bio Electronic Devices Lab, School of Electrical and Computer Engineering, University of Tehran, P.O. Box 14395/515, Tehran (Iran, Islamic Republic of)

    2017-01-01

    A highly sensitive impedimetric bio-chip based on vertically aligned multiwall carbon nanotubes (VAMWCNTs), was applied in direct interaction with lung cancer cells. Our tool provided both inducing and monitoring the bioelectrical changes in the cells initiated by electromagnetic (EM) wave stimulation. EM wave of 940 MHz frequency with different intensities was used. Here, wave ablation might accumulate electrical charge on the tips of nanotubes penetrated into cell's membrane. The charge might induce ionic exchanges into the cell and cause alterations in electrical states of the membrane. Transmembrane electrostatic/dynamic states would be strongly affected due to such exchanges. Our novel modality was that, the cells' vitality changes caused by charge inductions were electrically detected with the same nanotubes in the architecture of electrodes for impedance measurement. The responses of the sensor were confirmed by electron and florescent microscopy images as well as biological assays. In summation, our method provided an effective biochip for enhancing and detecting external EM stimulation on the cells useful for future diagnostic and therapeutic applications, such as wave-guided drug-resistance breakage. - Highlights: • A CNT-chip is fabricated to stimulate cancer cells by electromagnetic wave. • Wave induced charges accumulation on the tip of CNTs penetrated into cells. • Transmembrane electrostatic states would be strongly affected due to such exchanges. • The cells' vitality changes could be happened and electrically detected with the same chip.

  16. Integrated on-chip solid state capacitor based on vertically aligned carbon nanofibers, grown using a CMOS temperature compatible process

    Science.gov (United States)

    Saleem, Amin M.; Andersson, Rickard; Desmaris, Vincent; Enoksson, Peter

    2018-01-01

    Complete miniaturized on-chip integrated solid-state capacitors have been fabricated based on conformal coating of vertically aligned carbon nanofibers (VACNFs), using a CMOS temperature compatible microfabrication processes. The 5 μm long VACNFs, operating as electrode, are grown on a silicon substrate and conformally coated by aluminum oxide dielectric using atomic layer deposition (ALD) technique. The areal (footprint) capacitance density value of 11-15 nF/mm2 is realized with high reproducibility. The CMOS temperature compatible microfabrication, ultra-low profile (less than 7 μm thickness) and high capacitance density would enables direct integration of micro energy storage devices on the active CMOS chip, multi-chip package and passives on silicon or glass interposer. A model is developed to calculate the surface area of VACNFs and the effective capacitance from the devices. It is thereby shown that 71% of surface area of the VACNFs has contributed to the measured capacitance, and by using the entire area the capacitance can potentially be increased.

  17. Analysis of oversulfation in biglycan chondroitin/dermatan sulfate oligosaccharides by chip-based nanoelectrospray ionization multistage mass spectrometry.

    Science.gov (United States)

    Flangea, Corina; Sisu, Eugen; Seidler, Daniela G; Zamfir, Alina D

    2012-01-15

    Biglycan (BGN) is a small proteoglycan that consists of a protein core containing leucine-rich repeat regions and two glycosaminoglycan (GAG) chains of either chondroitin sulfate (CS) or dermatan sulfate (DS) type. The development of novel, highly efficient analytical methods for structural identification of BGN-derived CS/DS motifs, possibly implicated in biological events, is currently the focus of research. In this work, an improved analytical method based on fully automated chip-nanoelectrospray ionization (nanoESI) in conjunction with high-capacity ion trap (HCT) multistage mass spectrometry (MS) by collision-induced dissociation (CID) was for the first time applied to BGN CS/DS oligosaccharide analysis. The CS/DS chains were released from transfected 293 BGN by β-elimination. The chain was digested with AC I lyase, and the resulting mixture was purified and subsequently separated by size exclusion chromatography (SEC). Di- and tetrasaccharide fractions were pooled and characterized in detail using the developed chip-nanoESI protocol. The chip-nanoESI MS profile in the negative ion mode revealed the presence of under-, regularly, and oversulfated species in both di- and tetrasaccharide fractions. CID MS(2)-MS(3) yielded sequence patterns consistent with unusual oversulfated 4,5-Δ-GlcA(2S)-GalNAc(4S) and 4,5-Δ-GlcA(2S)-GalNAc(6S)-IdoA(2S)-GalNAc(6S) motifs. Copyright © 2011 Elsevier Inc. All rights reserved.

  18. DNA Nanobiosensors: An Outlook on Signal Readout Strategies

    Directory of Open Access Journals (Sweden)

    Arun Richard Chandrasekaran

    2017-01-01

    Full Text Available A suite of functionalities and structural versatility makes DNA an apt material for biosensing applications. DNA-based biosensors are cost-effective and sensitive and have the potential to be used as point-of-care diagnostic tools. Along with robustness and biocompatibility, these sensors also provide multiple readout strategies. Depending on the functionality of DNA-based biosensors, a variety of output strategies have been reported: fluorescence- and FRET-based readout, nanoparticle-based colorimetry, spectroscopy-based techniques, electrochemical signaling, gel electrophoresis, and atomic force microscopy.

  19. Adjunctive Effects of A Piscean Collagen-Based Controlled-Release Chlorhexidine Chip in the Treatment of Chronic Periodontitis: A Clinical and Microbiological Study

    Science.gov (United States)

    John, Priya; Lazarus, Flemingson; Selvam, Arul; Prabhuji, Munivenkatappa Lakshmaiah Venkatesh

    2015-01-01

    Introduction PerioChip a bovine origin gelatine based CHX chip has shown beneficial effects in the management of Chronic Periodontitis. A new fish collagen based CHX chip similar to PerioChip is currently available; however this product has not been thoroughly researched. Aim The aim of the present study was to evaluate the effectiveness of a new Piscean collagen-based controlled-release chlorhexidine chip (CHX chip) as an adjunctive therapy to scaling and root planing (SRP). Settings and Design The study was conducted as a randomised, split-mouth, controlled clinical trial at Krishnadevaraya College of Dental Sciences, Bangalore, India. Materials and Methods In a split–mouth study involving 20 sites in 10 patients with chronic periodontitis, control sites received scaling and root planing and test sites received scaling and root planing (SRP) and the intrapocket CHX chip placement as an adjunct. Subgingival plaque samples were collected from both control and test sites at baseline, 11 days and 11 weeks and the anaerobic colony count were assessed. Clinical parameters that were recorded at baseline and 11 weeks were gingival index, Plaque index, Probing pocket depth (PPD), and Clinical attachment level (CAL). Plaque index was recorded additionally at 11 days. Results In the test group there was a statistically significant reduction in the total anaerobic colony count, gingival index and plaque scores from baseline as compared to control sites at all time intervals. An additional 0.8mm reduction in mean probing pocket depth was noted in the test group. Gain in Clinical attachment level was comparable in both groups. Conclusion The adjunctive use of the new collagen-based CHX chip yielded significant antimicrobial benefit accompanied by a reduction in probing depth and a clinical attachment level gain as compared to SRP alone. This suggests that it may be a useful treatment option of nonsurgical periodontal treatment of chronic periodontitis. PMID:26155567

  20. The Belle II SVD data readout system

    Energy Technology Data Exchange (ETDEWEB)

    Thalmeier, R., E-mail: Richard.Thalmeier@oeaw.ac.at [Institute of High Energy Physics, Austrian Academy of Sciences, 1050 Vienna (Austria); Adamczyk, K. [H. Niewodniczanski Institute of Nuclear Physics, Krakow 31-342 (Poland); Aihara, H. [Department of Physics, University of Tokyo, Tokyo 113-0033 (Japan); Angelini, C. [Dipartimento di Fisica, Universita’ di Pisa, I-56127 Pisa (Italy); INFN Sezione di Pisa, I-56127 Pisa (Italy); Aziz, T.; Babu, V. [Tata Institute of Fundamental Research, Mumbai 400005 (India); Bacher, S. [H. Niewodniczanski Institute of Nuclear Physics, Krakow 31-342 (Poland); Bahinipati, S. [Indian Institute of Technology Bhubaneswar, Satya Nagar (India); Barberio, E.; Baroncelli, Ti.; Baroncelli, To. [School of Physics, University of Melbourne, Melbourne, Victoria 3010 (Australia); Basith, A.K. [Indian Institute of Technology Madras, Chennai 600036 (India); Batignani, G. [Dipartimento di Fisica, Universita’ di Pisa, I-56127 Pisa (Italy); INFN Sezione di Pisa, I-56127 Pisa (Italy); Bauer, A. [Institute of High Energy Physics, Austrian Academy of Sciences, 1050 Vienna (Austria); Behera, P.K. [Indian Institute of Technology Madras, Chennai 600036 (India); Bergauer, T. [Institute of High Energy Physics, Austrian Academy of Sciences, 1050 Vienna (Austria); Bettarini, S. [Dipartimento di Fisica, Universita’ di Pisa, I-56127 Pisa (Italy); INFN Sezione di Pisa, I-56127 Pisa (Italy); Bhuyan, B. [Indian Institute of Technolog y Guwahati, Assam 781039 (India); Bilka, T. [Faculty of Mathematics and Physics, Charles University, 12116 Prague (Czech Republic); Bosi, F. [INFN Sezione di Pisa, I-56127 Pisa (Italy); and others

    2017-02-11

    The Belle II Experiment at the High Energy Accelerator Research Organization (KEK) in Tsukuba, Japan, will explore the asymmetry between matter and antimatter and search for new physics beyond the standard model. 172 double-sided silicon strip detectors are arranged cylindrically in four layers around the collision point to be part of a system which measures the tracks of the collision products of electrons and positrons. A total of 1748 radiation-hard APV25 chips read out 128 silicon strips each and send the analog signals by time-division multiplexing out of the radiation zone to 48 Flash Analog Digital Converter Modules (FADC). Each of them applies processing to the data; for example, it uses a digital finite impulse response filter to compensate line signal distortions, and it extracts the peak timing and amplitude from a set of several data points for each hit, using a neural network. We present an overview of the SVD data readout system, along with front-end electronics, cabling, power supplies and data processing.