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Sample records for array readout chip

  1. PARISROC, a photomultiplier array readout chip (PMm2 collaboration)

    International Nuclear Information System (INIS)

    PARISROC is a complete readout chip, in AMS SiGe 0.35 μm technology, for photomultipliers array. It is a front-end electronics ASIC which allows trigerless acquisition for the next generation of neutrino experiments. These detectors have place in megaton size water tanks and will require very large surface of photo-detection. An R and D program, funded by French National Agency for Research and called PMm2, proposes to segment the very large surface of photo-detection in macro pixels made of 16 photomultiplier tubes connected to an autonomous front-end electronics. The ASIC allows triggerless acquisition and only sends out the relevant data by network to the central data storage. This data management reduces considerably the cost of these detectors. This paper describes the front-end electronics ASIC called PARISROC which integrates totally independents 16 channels with a variable gain and provides charge and time measurement with a 12-bit ADC and a 24-bits Counter.

  2. Pixel detector readout chip

    CERN Multimedia

    1991-01-01

    Close-up of a pixel detector readout chip. The photograph shows an aera of 1 mm x 2 mm containing 12 separate readout channels. The entire chip contains 1000 readout channels (around 80 000 transistors) covering a sensitive area of 8 mm x 5 mm. The chip has been mounted on a silicon detector to detect high energy particles.

  3. Readout Architecture for Hybrid Pixel Readout Chips

    CERN Document Server

    AUTHOR|(SzGeCERN)694170; Westerlund, Tomi; Wyllie, Ken

    The original contribution of this thesis to knowledge are novel digital readout architectures for hybrid pixel readout chips. The thesis presents asynchronous bus-based architecture, a data-node based column architecture and a network-based pixel matrix architecture for data transportation. It is shown that the data-node architecture achieves readout efficiency 99 % with half the output rate as a bus-based system. The network-based solution avoids ``broken'' columns due to some manufacturing errors, and it distributes internal data traffic more evenly across the pixel matrix than column-based architectures. An improvement of $>$ 10 % to the efficiency is achieved with uniform and non-uniform hit occupancies. Architectural design has been done using transaction level modeling ($TLM$) and sequential high-level design techniques for reducing the design and simulation time. It has been possible to simulate tens of column and full chip architectures using the high-level techniques. A decrease of $>$ 10 in run-time...

  4. Thermopile Area Array Readout Project

    Data.gov (United States)

    National Aeronautics and Space Administration — NASA/JPL thermopile detector linear arrays, wire bonded to Black Forest Engineering (BFE) CMOS readout integrated circuits (ROICs), have been utilized in NASA...

  5. Readout concept employing a novel on-chip 16-bit ADC for smart IR focal plane arrays

    Science.gov (United States)

    Ringh, Ulf; Jansson, Christer; Liddiard, Kevin C.

    1996-06-01

    This paper discusses CMOS readout for an uncooled 2D IR array of resistance bolometers. Factors influencing the architectural choice and detailed noise considerations for the pixel select switch are covered. A parallel readout concept using one ADC per column is the suggested architecture for an uncooled CMOS IR array. In order to meet the requirement on speed and resolution a new ADC principle had to be developed. The ADC is however of general interest where resolution above 10 bits at medium speed and low cost are desired. High linearity is obtained utilizing the first- order delta-sigma converter technique, while resolution and speed is enhanced by a successive approximation of the delta-sigma integrator residual voltage. An experimental 16 X 16 infrared bolometer detector array has been designed where a row-by-row readout operation of the bolometer array is supported by a column-wise 16-bit A/D conversion. The 16- column preamplifiers and ADC structure has been implemented in a standard 0.8 micrometers CMOS process with 40 micrometers column pitch. Measured results of the experimental array is presented, including both electronics and detectors.

  6. An MWPC readout chip for high rate environment

    CERN Document Server

    Kano, H; Ikeno, M; Sasaki, O; Sato, K; Matsuura, S

    2000-01-01

    An ASIC has been fabricated in order to readout data from an MWPC that is installed in high rate environment. 16 channels and an ancillary control circuit are packed in a chip, and a channel consists of LVDS Receiver and 100-stage shift register array for delay. A hit data from the chamber is once input in the shift register array, and is just output from it when the trigger signal is set. If a channel contains a signal during a gate followed by the trigger, the channel is regarded to contain a hit. The primary purpose to construct the chip is for test beam and cosmic ray test of ATLAS thin gap chambers (TGC), which are used for the muon trigger signal generation. The architecture of the ASIC is so simple and uidependent from the specific readout scheme of ATLAS TGC. It will be found that the ASIC is adopted easily for any readout scheme of MWPC like detector. 3 Refs.

  7. Digital column readout architectures for hybrid pixel detector readout chips

    CERN Document Server

    Poikela, T; Westerlund, T; Buytaert, J; Campbell, M; De Gaspari, M; Llopart, X; Wyllie, K; Gromov, V; Kluit, R; van Beuzekom, M; Zappon, F; Zivkovic, V; Brezina, C; Desch, K; Fu, Y; Kruth, A

    2014-01-01

    In this paper, two digital column architectures suitable for sparse readout of data from a pixel matrix in trigger-less applications are presented. Each architecture reads out a pixel matrix of 256 x 256 pixels with a pixel pitch of 55 µm. The first architecture has been implemented in the Timepix3 chip, and this is presented together with initial measurements. Simulation results and measured data are compared. The second architecture has been designed for Velopix, a readout chip planned for the LHCb VELO upgrade. Unlike Timepix3, this has to be tolerant to radiation-induced single-event effects. Results from post-layout simulations are shown with the circuit architectures.

  8. Design considerations for pixel readout chips

    CERN Document Server

    Fischer, P

    2003-01-01

    Pixel detectors are becoming a standard tracking component in modern particle physics experiment and find first applications in X-ray diffraction, medical imaging and astronomy. The amplification and the readout of the small signal charges from the pixel sensor require highly integrated ASICs in which several thousand low-noise charge-sensitive amplifiers are densely interspersed with fast data-processing logic. The reduction of crosstalk from the digital to the analog section is therefore crucial. The frequent demand for radiation tolerance requires special chip technologies or the use of deep sub-micron processes with suited design rules. This paper summarizes a few designs aspects particularly important for pixel readout chips.

  9. MAROC, a generic photomultiplier readout chip

    Energy Technology Data Exchange (ETDEWEB)

    Blin, S; Barrillon, P; La Taille, C de, E-mail: blin@lal.in2p3.f [CNRS/IN2p3/LAL-OMEGA, Universite Paris Sud, Bat.200, 91898 Orsay (France)

    2010-12-15

    The MAROC ASICs family is dedicated to the readout of 64-channel Multi Anode PMT and similar detectors. Its main roles are to correct the gain spread of MAPMT channels thanks to an individual variable gain preamplifier and to discriminate the input signals (from 50fC i.e 1/3 photo-electron) in order to produce 64 trigger outputs. A multiplexed analog charge output is also available with a dynamic range around 10 pe ( {approx} 1.6 pC) and a 12 bit Wilkinson ADC is embedded. Three versions of this chip have been submitted. MAROC 2 is the production version for the ATLAS luminometer and MAROC3 is a version with lower dissipation and significant improvements concerning the charge (30 pe: {approx} 5 pC) and trigger (discrimination from 10fC). This third version showed very good characteristics that are presented here.

  10. MAROC, a generic photomultiplier readout chip

    Science.gov (United States)

    Blin, S.; Barrillon, P.; de La Taille, C.

    2010-12-01

    The MAROC ASICs family is dedicated to the readout of 64-channel Multi Anode PMT and similar detectors. Its main roles are to correct the gain spread of MAPMT channels thanks to an individual variable gain preamplifier and to discriminate the input signals (from 50fC i.e 1/3 photo-electron) in order to produce 64 trigger outputs. A multiplexed analog charge output is also available with a dynamic range around 10 pe ( ~ 1.6 pC) and a 12 bit Wilkinson ADC is embedded. Three versions of this chip have been submitted. MAROC 2 is the production version for the ATLAS luminometer and MAROC3 is a version with lower dissipation and significant improvements concerning the charge (30 pe: ~ 5 pC) and trigger (discrimination from 10fC). This third version showed very good characteristics that are presented here.

  11. Indium Hybridization of Large Format TES Bolometer Arrays to Readout Multiplexers for Far-Infrared Astronomy

    Science.gov (United States)

    Miller, Timothy M.; Costen, Nick; Allen, Christine

    2007-01-01

    This conference poster reviews the Indium hybridization of the large format TES bolometer arrays. We are developing a key technology to enable the next generation of detectors. That is the Hybridization of Large Format Arrays using Indium bonded detector arrays containing 32x40 elements which conforms to the NIST multiplexer readout architecture of 1135 micron pitch. We have fabricated and hybridized mechanical models with the detector chips bonded after being fully back-etched. The mechanical support consists of 30 micron walls between elements Demonstrated electrical continuity for each element. The goal is to hybridize fully functional array of TES detectors to NIST readout.

  12. Bier and Pastis, a pixel readout prototype chip for LHC

    CERN Document Server

    Berg, C; Bonzom, V; Delpierre, P A; Desch, Klaus; Fischer, P; Keil, M; Meuser, S; Raith, B A; Wermes, N

    2000-01-01

    The 12*63 pixel readout prototype chip Bieu&Pastis, designed to cope with the environment imposed on a pixel detector by high-energy proton-proton collisions as expected at the Large Hadron Collider (LHC), is described. The chip contains the full pixel cell functionality, but not yet the full peripheral architecture for data transfer and readout with LHC speed. Design considerations and lab tests to characterize the performance as well as some test beam results are described. (7 refs).

  13. Bier&Pastis, a pixel readout prototype chip for LHC

    Science.gov (United States)

    Berg, C.; Blanquart, L.; Bonzom, V.; Delpierre, P.; Desch, K.; Fischer, P.; Keil, M.; Meuser, S.; Raith, B.; Wermes, N.

    2000-01-01

    The 12×63 pixel readout prototype chip Bier&Pastis, designed to cope with the environment imposed on a pixel detector by high-energy proton-proton collisions as expected at the Large Hadron Collider (LHC), is described. The chip contains the full pixel cell functionality, but not yet the full peripheral architecture for data transfer and readout with LHC speed. Design considerations and lab tests to characterize the performance as well as some test beam results are described.

  14. Readout chip for the CMS pixel detector upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Rossini, Marco, E-mail: marco.rossini@phys.ethz.ch

    2014-11-21

    For the CMS experiment a new pixel detector is planned for installation during the extended shutdown in winter 2016/2017. Among the changes of the detector modified front end electronics will be used for higher efficiency at peak luminosity of the LHC and faster readout. The first prototype versions of the new readout chip have been designed and produced. The results of qualification and calibration for the new chip are presented in this paper.

  15. Performance of the CAMEX64 silicon strip readout chip

    International Nuclear Information System (INIS)

    The CAMEX64 is a 64 channel full custom CMOS chip designed specifically for the readout of silicon strip detectors. CAMEX which stands for CMOS Multichannel Analog MultiplEXer for Silicon Strip Detectors was designed by members of the Franhofer Institute for Microelectronic Circuits and Systems and the Max Planck Institute for Physics and Astrophysics. Each CAMEX channel has a switched capacitor charge sensitive amplifier with 4 sampling capacitors and a multiplexing scheme for reading out each of the channels on an analog bus. The device uses multiple sampling capacitors to filter and reduce input noise. Filtering is controlled through sampling techniques using external clocks. The device operates in a double correlated sampling mode and therefore cannot separate detector leakage current from a charge input. Normal operation of this device is similar to all other silicon readout chips designed and built thus far in that there is a data acquisition cycle during which charge is simultaneously accepted on all channels for a short period of time from a detector array, followed by a readout cycle where that charge or hit information is read out. This device works especially well for colliding beam experiments where the time of charge arrival is accurately known. However it can be used in fixed target or asynchronous mode where the time of charge arrival is not well known. In the asynchronous mode it appears that gain is somewhat dependent on the time interval required to decide whether or not to accept charge input information and thus the maximum signal to noise performance found with the synchronous mode may not be achieved in the asynchronous mode. 18 figs., 5 tabs

  16. Parallel optical readout of a cantilever array in dynamic mode

    NARCIS (Netherlands)

    Koelmans, W.W.; Honschoten, van J.W.; Vettiger, P.; Abelmann, L.; Elwenspoek, M.C.

    2009-01-01

    In this work we present parallel optical readout of a cantilever array which operates in dynamic mode using a standard optical beam deflection configuration containing only one laser-detector pair. We show accurate readout of the resonance frequency shift of an individual cantilever within an array

  17. Advanced ACTPol Cryogenic Detector Arrays and Readout

    Science.gov (United States)

    Henderson, S. W.; Allison, R.; Austermann, J.; Baildon, T.; Battaglia, N.; Beall, J. A.; Becker, D.; De Bernardis, F.; Bond, J. R.; Calabrese, E.; Choi, S. K.; Coughlin, K. P.; Crowley, K. T.; Datta, R.; Devlin, M. J.; Duff, S. M.; Dunkley, J.; Dünner, R.; van Engelen, A.; Gallardo, P. A.; Grace, E.; Hasselfield, M.; Hills, F.; Hilton, G. C.; Hincks, A. D.; Hloẑek, R.; Ho, S. P.; Hubmayr, J.; Huffenberger, K.; Hughes, J. P.; Irwin, K. D.; Koopman, B. J.; Kosowsky, A. B.; Li, D.; McMahon, J.; Munson, C.; Nati, F.; Newburgh, L.; Niemack, M. D.; Niraula, P.; Page, L. A.; Pappas, C. G.; Salatino, M.; Schillaci, A.; Schmitt, B. L.; Sehgal, N.; Sherwin, B. D.; Sievers, J. L.; Simon, S. M.; Spergel, D. N.; Staggs, S. T.; Stevens, J. R.; Thornton, R.; Van Lanen, J.; Vavagiakis, E. M.; Ward, J. T.; Wollack, E. J.

    2016-08-01

    Advanced ACTPol is a polarization-sensitive upgrade for the 6 m aperture Atacama Cosmology Telescope, adding new frequencies and increasing sensitivity over the previous ACTPol receiver. In 2016, Advanced ACTPol will begin to map approximately half the sky in five frequency bands (28-230 GHz). Its maps of primary and secondary cosmic microwave background anisotropies—imaged in intensity and polarization at few arcminute-scale resolution—will enable precision cosmological constraints and also a wide array of cross-correlation science that probes the expansion history of the universe and the growth of structure via gravitational collapse. To accomplish these scientific goals, the Advanced ACTPol receiver will be a significant upgrade to the ACTPol receiver, including four new multichroic arrays of cryogenic, feedhorn-coupled AlMn transition edge sensor polarimeters (fabricated on 150 mm diameter wafers); a system of continuously rotating meta-material silicon half-wave plates; and a new multiplexing readout architecture which uses superconducting quantum interference devices and time division to achieve a 64-row multiplexing factor. Here we present the status and scientific goals of the Advanced ACTPol instrument, emphasizing the design and implementation of the Advanced ACTPol cryogenic detector arrays.

  18. HARDROC, Readout chip of the Digital Hadronic Calorimeter of ILC

    CERN Document Server

    Callier, S; de La Taille, C; Martin-Chassard, N; Seguin-Moreau, N

    2009-01-01

    HARDROC (HAdronic Rpc Detector ReadOut Chip) [1] is the very front end chip designed for the readout of the RPC or Micromegas foreseen for the Digital HAdronic CALorimeter (DHCAL) of the future International Linear Collider. The very fine granularity of the ILC hadronic calorimeters (1cm2 pads) implies a huge number of electronics channels (4 105 /m3) which is a new feature of “imaging” calorimetry. Moreover, for compactness, the chips must be embedded inside the detector making crucial the reduction of the power consumption to 10 μW per channel. This is achieved using power pulsing, made possible by the ILC bunch pattern (1 ms of data acquisition for 199 ms of dead time). HARDROC readout is a semi-digital readout with three thresholds which allows both good tracking and coarse energy measurement, and also integrates on chip data storage. The overall performance of HARDROC will be described with detailed measurements of all the characteristics. Hundreds of chips have indeed been produced and tested befor...

  19. Flexible readout and integration sensor (FRIS): a bio-inspired, system-on-chip, event-based readout architecture

    Science.gov (United States)

    Lin, Joseph H.; Pouliquen, Philippe O.; Andreou, Andreas G.; Goldberg, Arnold C.; Rizk, Charbel G.

    2012-06-01

    We present a bio-inspired system-on-chip focal plane readout architecture which at the system level, relies on an event based sampling scheme where only pixels within a programmable range of photon flux rates are output. At the pixel level, a one bit oversampled analog-to-digital converter together with a decimator allows for the quantization of signals up to 26 bits. Furthermore, digital non-uniformity correction of both gain and offset errors is applied at the pixel level prior to readout. We report test results for a prototype array fabricated in a standard 90nm CMOS process. Tests performed at room and cryogenic temperatures demonstrate the capability to operate at a temporal noise ratio as low as 1.5, an electron well capacity over 100Ge-, and an ADC LSB down to 1e-.

  20. Radiation tolerance of prototype BTeV pixel detector readout chips

    Energy Technology Data Exchange (ETDEWEB)

    Gabriele Chiodini et al.

    2002-07-12

    High energy and nuclear physics experiments need tracking devices with increasing spatial precision and readout speed in the face of ever-higher track densities and increased radiation environments. The new generation of hybrid pixel detectors (arrays of silicon diodes bump bonded to arrays of front-end electronic cells) is the state of the art technology able to meet these challenges. We report on irradiation studies performed on BTeV pixel readout chip prototypes exposed to a 200 MeV proton beam at Indiana University Cyclotron Facility. Prototype pixel readout chip preFPIX2 has been developed at Fermilab for collider experiments and implemented in standard 0.25 micron CMOS technology following radiation tolerant design rules. The tests confirmed the radiation tolerance of the chip design to proton total dose up to 87 MRad. In addition, non destructive radiation-induced single event upsets have been observed in on-chip static registers and the single bit upset cross section has been extensively measured.

  1. Development, optimisation and characterisation of a radiation hard mixed-signal readout chip for LHCb

    Energy Technology Data Exchange (ETDEWEB)

    Loechner, S.

    2006-07-26

    The Beetle chip is a radiation hard, 128 channel pipelined readout chip for silicon strip detectors. The front-end consists of a charge-sensitive preamplifier followed by a CR-RC pulse shaper. The analogue pipeline memory is implemented as a switched capacitor array with a maximum latency of 4us. The 128 analogue channels are multiplexed and transmitted off chip in 900ns via four current output drivers. Beside the pipelined readout path, the Beetle provides a fast discrimination of the front-end pulse. Within this doctoral thesis parts of the radiation hard Beetle readout chip for the LHCb experiment have been developed. The overall chip performances like noise, power consumption, input charge rates have been optimised as well as the elimination of failures so that the Beetle fulfils the requirements of the experiment. Furthermore the characterisation of the chip was a major part of this thesis. Beside the detailed measurement of the chip performance, several irradiation tests and an Single Event Upset (SEU) test were performed. A long-time measurement with a silicon strip detector was also part of this work as well as the development and test of a first mass production test setup. The Beetle chip showed no functional failure and only slight degradation in the analogue performance under irradiation of up to 130Mrad total dose. The Beetle chip fulfils all requirements of the vertex detector (VELO), the trigger tracker (TT) and the inner tracker (IT) and is ready for the start of LHCb end of 2007. (orig.)

  2. Readout of two-kilopixel transition-edge sensor arrays for Advanced ACTPol

    CERN Document Server

    Henderson, Shawn W; Amiri, Mandana; Austermann, Jason; Beall, James A; Chaudhuri, Saptarshi; Cho, Hsiao-Mei; Choi, Steve K; Cothard, Nicholas F; Crowley, Kevin T; Duff, Shannon M; Fitzgerald, Colin P; Gallardo, Patricio A; Halpern, Mark; Hasselfield, Matthew; Hilton, Gene; Ho, Shuay-Pwu Patty; Hubmayr, Johannes; Irwin, Kent D; Koopman, Brian J; Li, Dale; Li, Yaqiong; McMahon, Jeff; Nati, Federico; Niemack, Michael D; Reintsema, Carl D; Salatino, Maria; Schillaci, Alessandro; Schmitt, Benjamin L; Simon, Sara M; Staggs, Suzanne T; Vavagiakis, Eve M; Ward, Jonathan T

    2016-01-01

    Advanced ACTPol is an instrument upgrade for the six-meter Atacama Cosmology Telescope (ACT) designed to measure the cosmic microwave background (CMB) temperature and polarization with arcminute-scale angular resolution. To achieve its science goals, Advanced ACTPol utilizes a larger readout multiplexing factor than any previous CMB experiment to measure detector arrays with approximately two thousand transition-edge sensor (TES) bolometers in each 150 mm detector wafer. We present the implementation and testing of the Advanced ACTPol time-division multiplexing readout architecture with a 64-row multiplexing factor. This includes testing of individual multichroic detector pixels and superconducting quantum interference device (SQUID) multiplexing chips as well as testing and optimizing of the integrated readout electronics. In particular, we describe the new automated multiplexing SQUID tuning procedure developed to select and optimize the thousands of SQUID parameters required to readout each Advanced ACTPol...

  3. Readout of TPC Tracking Chambers with GEMs and Pixel Chip

    Energy Technology Data Exchange (ETDEWEB)

    Kadyk, John; Kim, T.; Freytsis, M.; Button-Shafer, J.; Kadyk, J.; Vahsen, S.E.; Wenzel, W.A.

    2007-12-21

    Two layers of GEMs and the ATLAS Pixel Chip, FEI3, have been combined and tested as a prototype for Time Projection Chamber (TPC) readout at the International Linear Collider (ILC). The double-layer GEM system amplifies charge with gain sufficient to detect all track ionization. The suitability of three gas mixtures for this application was investigated, and gain measurements are presented. A large sample of cosmic ray tracks was reconstructed in 3D by using the simultaneous timing and 2D spatial information from the pixel chip. The chip provides pixel charge measurement as well as timing. These results demonstrate that a double GEM and pixel combination, with a suitably modified pixel ASIC, could meet the stringent readout requirements of the ILC.

  4. Digital Power Consumption Estimations for CHIPIX65 Pixel Readout Chip

    CERN Document Server

    Marcotulli, Andrea

    2016-01-01

    New hybrid pixel detectors with improved resolution capable of dealing with hit rates up to 3 GHz/cm2 will be required for future High Energy Physics experiments in the Large Hadron Collider (LHC) at CERN. Given this, the RD53 collaboration works on the design of the next generation pixel readout chip needed for both the ATLAS and CMS detector phase 2 pixel upgrades. For the RD53 demonstrator chip in 65nm CMOS technology, different architectures are considered. In particular the purpose of this work is estimating the power consumption of the digital architecture of the readout ASIC developed by CHIPIX65 project of the INFN National Scientific Committee. This has been done with modern chip design tools integrated with the VEPIX53 simulation framework that has been developed within the RD53 collaboration in order to assess the performance of the system in very high rate, high energy physics experiments.

  5. A multipurpose programmable read-out chip

    International Nuclear Information System (INIS)

    A mixed-signal integrated chip in IBM 130nm technology suitable to a variety of detectors with different requirements is under development. The CBM experiment at FAIR could be a good candidate for the use of this chip. The chip can read out 128 channels, which can be masked in groups of 16, 32 or 64. The multichannel ASIC includes a low noise PreAmplifier and Shaping Amplifier (PASA), a Peak Detector (PD), a Time-to-Amplitude Converter (TAC) and fast arbitration and sequencing logic to concentrate the data before it is sent to a pipelined Analog-to-Digital Converter (ADC). The chip is self-triggered, which is essential for applications where the detector pulses arrive randomly in time. The PASA is programmable for different detector capacitances (from 1 pF to 50 pF), input pulse polarity, preamplifier gain, peaking time (from 20 to 200 ns) and conversion gain in order to suit a wide range of application requirements. The ADC is programmable to support either 8, 10 or 12 bit resolution with a conversion rate from 1 MHz to 100 MHz; the switched-capacitor bias network provides bias currents proportional to the operating frequency. Simulations of the ADC will be shown together with plots of the expected performance

  6. Towards a new generation of pixel detector readout chips

    International Nuclear Information System (INIS)

    The Medipix3 Collaboration has broken new ground in spectroscopic X-ray imaging and in single particle detection and tracking. This paper will review briefly the performance and limitations of the present generation of pixel detector readout chips developed by the Collaboration. Through Silicon Via technology has the potential to provide a significant improvement in the tile-ability and more flexibility in the choice of readout architecture. This has been explored in the context of 3 projects with CEA-LETI using Medipix3 and Timepix3 wafers. The next generation of chips will aim to provide improved spectroscopic imaging performance at rates compatible with human CT. It will also aim to provide full spectroscopic images with unprecedented energy and spatial resolution. Some of the opportunities and challenges posed by moving to a more dense CMOS process will be discussed

  7. XPAD3-S: A fast hybrid pixel readout chip for X-ray synchrotron facilities

    International Nuclear Information System (INIS)

    At X-ray synchrotron facilities, scattering experiments require detectors with a large sensitive surface, an high count rate capability, a large counter dynamics, a fast readout system and an adjustable energy threshold. X-ray pixel chip with adaptable dynamics (XPAD3) is a new pixellized photon detector based on hybrid pixel technology, which provides low noise data readout at high speed. It is designed in 0.25 μm IBM technology and contains 9600 pixels (130 μmx130 μm) distributed into 80 columns of 120 elements each. Its features have been optimized to fulfill a count rate capability up to 10+6 photons/pixel/s, an high dynamic range over 35 keV, a very low noise of 130e-, and a threshold adjustment well below 4 keV. Fast data readout below 2 ms/frame is expected. To meet these requirements, an innovative architecture has been designed that makes possible the readout the circuit during acquisition while preserving the precise setting of the thresholds all over the pixel array. The XPAD3 circuit can be bump-bonded with Si, CdTe, or GaAs sensors to optimize its detection efficiency at high X-ray energies. XPAD3 detector modules will be tiled together to form the XPIX detector with a 8 cmx12 cm sensitive area. We present first results obtained using a single-chip prototype of the XPAD3 detector

  8. Semiconductor arrays with multiplexer readout for gamma-ray imaging: results for a 48 × 48 Ge array

    Science.gov (United States)

    Barber, H. B.; Augustine, F. L.; Barrett, H. H.; Dereniak, E. L.; Matherson, K. L.; Meyers, T. J.; Perry, D. L.; Venzon, J. E.; Woolfenden, J. M.; Young, E. T.

    1994-12-01

    We are developing a new kind of gamma-ray imaging device that has sub-millimeter spatial resolution and excellent energy resolution. The device is composed of a slab of semiconductor detector partitioned into an array of detector cells by photolithography and connected to a monolithic circuit chip called a multiplexer (MUX) for readout. Our application is for an ultra-high-resolution SPECT system for functional brain imaging using an injected radiotracer. We report here on results obtained with a Hughes 48 × 48 Ge PIN-photodiode array with MUX readout, originally developed as an infrared focal-plane-array imaging sensor. The device functions as an array of individual gamma-ray detectors with minimal interpixel crosstalk. Linearity of energy response is excellent up to at least 140 keV. The array exhibits excellent energy resolution, ˜ 2 keV at ≤ 140 keV or 1.5% FWHM at 140 keV. The energy resolution is dominated by MUX readout noise and so should improve with MUX optimization for gamma-ray detection. The spatial resolution of the 48 × 48 Ge array is essentially the same as the pixel spacing, 125 μm. The quantum efficiency is limited by the thin Ge detector (0.25 mm), but this approach is readily applicable to thicker Ge detectors and room-temperature semiconductor detectors such as CdTe, HgI 2 and CdZnTe.

  9. Design of readout circuit for microcantilever-based ripple uncooled infrared focal plane arrays

    Science.gov (United States)

    Cao, Junmin; Chen, Zhongjian; Lu, Wengao; Zhang, Yacong; Lei, Ke; Zhao, Baoying

    2009-07-01

    A readout integrated circuit (ROIC) for uncooled microcantilever infrared focal plane arrays (IRFPAs) based on capacitive readout is proposed. The ROIC is optimized according to noise modeling and analysis to reduce noise. An experimental chip of 16×16 FPAs readout circuit has been designed and fabricated using 0.35um CMOS technology. The measurement results showed that the power dissipation is 16.5mW from a 5V supply voltage at 50Hz frame rate, the linearity is 99.2% at the typical mode; the uniformity is larger than 97% and the equivalent noise charge (ENC) is below 150e. It is believed that the ROIC has a great potential in the applications of large-scale micro-cantilever-based uncooled IRFPAs.

  10. Development of arrays of Silicon Drift Detectors and readout ASIC for the SIDDHARTA experiment

    Science.gov (United States)

    Quaglia, R.; Schembari, F.; Bellotti, G.; Butt, A. D.; Fiorini, C.; Bombelli, L.; Giacomini, G.; Ficorella, F.; Piemonte, C.; Zorzi, N.

    2016-07-01

    This work deals with the development of new Silicon Drift Detectors (SDDs) and readout electronics for the upgrade of the SIDDHARTA experiment. The detector is based on a SDDs array organized in a 4×2 format with each SDD square shaped with 64 mm2 (8×8) active area. The total active area of the array is therefore 32×16 mm2 while the total area of the detector (including 1 mm border dead area) is 34 × 18mm2. The SIDDHARTA apparatus requires 48 of these modules that are designed and manufactured by Fondazione Bruno Kessler (FBK). The readout electronics is composed by CMOS preamplifiers (CUBEs) and by the new SFERA (SDDs Front-End Readout ASIC) circuit. SFERA is a 16-channels readout ASIC designed in a 0.35 μm CMOS technology, which features in each single readout channel a high order shaping amplifier (9th order Semi-Gaussian complex-conjugate poles) and a high efficiency pile-up rejection logic. The outputs of the channels are connected to an analog multiplexer for the external analog to digital conversion. An on-chip 12-bit SAR ADC is also included. Preliminary measurements of the detectors in the single SDD format are reported. Also measurements of low X-ray energies are reported in order to prove the possible extension to the soft X-ray range.

  11. A Full Parallel Event Driven Readout Technique for Area Array SPAD FLIM Image Sensors.

    Science.gov (United States)

    Nie, Kaiming; Wang, Xinlei; Qiao, Jun; Xu, Jiangtao

    2016-01-01

    This paper presents a full parallel event driven readout method which is implemented in an area array single-photon avalanche diode (SPAD) image sensor for high-speed fluorescence lifetime imaging microscopy (FLIM). The sensor only records and reads out effective time and position information by adopting full parallel event driven readout method, aiming at reducing the amount of data. The image sensor includes four 8 × 8 pixel arrays. In each array, four time-to-digital converters (TDCs) are used to quantize the time of photons' arrival, and two address record modules are used to record the column and row information. In this work, Monte Carlo simulations were performed in Matlab in terms of the pile-up effect induced by the readout method. The sensor's resolution is 16 × 16. The time resolution of TDCs is 97.6 ps and the quantization range is 100 ns. The readout frame rate is 10 Mfps, and the maximum imaging frame rate is 100 fps. The chip's output bandwidth is 720 MHz with an average power of 15 mW. The lifetime resolvability range is 5-20 ns, and the average error of estimated fluorescence lifetimes is below 1% by employing CMM to estimate lifetimes. PMID:26828490

  12. A readout for large arrays of microwave kinetic inductance detectors.

    Science.gov (United States)

    McHugh, Sean; Mazin, Benjamin A; Serfass, Bruno; Meeker, Seth; O'Brien, Kieran; Duan, Ran; Raffanti, Rick; Werthimer, Dan

    2012-04-01

    Microwave kinetic inductance detectors (MKIDs) are superconducting detectors capable of counting single photons and measuring their energy in the UV, optical, and near-IR. MKIDs feature intrinsic frequency domain multiplexing (FDM) at microwave frequencies, allowing the construction and readout of large arrays. Due to the microwave FDM, MKIDs do not require the complex cryogenic multiplexing electronics used for similar detectors, such as transition edge sensors, but instead transfer this complexity to room temperature electronics where they present a formidable signal processing challenge. In this paper, we describe the first successful effort to build a readout for a photon counting optical/near-IR astronomical instrument, the ARray Camera for Optical to Near-infrared Spectrophotometry. This readout is based on open source hardware developed by the Collaboration for Astronomy Signal Processing and Electronics Research. Designed principally for radio telescope backends, it is flexible enough to be used for a variety of signal processing applications.

  13. Advanced ACTPol Cryogenic Detector Arrays and Readout

    CERN Document Server

    Henderson, S W; Austermann, J; Baildon, T; Battaglia, N; Beall, J A; Becker, D; De Bernardis, F; Bond, J R; Calabrese, E; Choi, S K; Coughlin, K P; Crowley, K T; Datta, R; Devlin, M J; Duff, S M; Dunner, R; Dunkley, J; van Engelen, A; Gallardo, P A; Grace, E; Hasselfield, M; Hills, F; Hilton, G C; Hincks, A D; Hlozek, R; Ho, S P; Hubmayr, J; Huffenberger, K; Hughes, J P; Irwin, K D; Koopman, B J; Kosowsky, A B; Li, D; McMahon, J; Munson, C; Nati, F; Newburgh, L; Niemack, M D; Niraula, P; Page, L A; Pappas, C G; Salatino, M; Schillaci, A; Schmitt, B L; Sehgal, N; Sherwin, B D; Sievers, J L; Simon, S M; Spergel, D N; Staggs, S T; Stevens, J R; Thornton, R; Van Lanen, J; Vavagiakis, E M; Ward, J T; Wollack, E J

    2015-01-01

    Advanced ACTPol is a polarization-sensitive upgrade for the 6 m aperture Atacama Cosmology Telescope (ACT), adding new frequencies and increasing sensitivity over the previous ACTPol receiver. In 2016, Advanced ACTPol will begin to map approximately half the sky in five frequency bands (28-230 GHz). Its maps of primary and secondary cosmic microwave background (CMB) anisotropies -- imaged in intensity and polarization at few arcminute-scale resolution -- will enable precision cosmological constraints and also a wide array of cross-correlation science that probes the expansion history of the universe and the growth of structure via gravitational collapse. To accomplish these scientific goals, the Advanced ACTPol receiver will be a significant upgrade to the ACTPol receiver, including four new multichroic arrays of cryogenic, feedhorn-coupled AlMn transition edge sensor (TES) polarimeters (fabricated on 150 mm diameter wafers); a system of continuously rotating meta-material silicon half-wave plates; and a new ...

  14. ASIC Readout Circuit Architecture for Large Geiger Photodiode Arrays

    Science.gov (United States)

    Vasile, Stefan; Lipson, Jerold

    2012-01-01

    The objective of this work was to develop a new class of readout integrated circuit (ROIC) arrays to be operated with Geiger avalanche photodiode (GPD) arrays, by integrating multiple functions at the pixel level (smart-pixel or active pixel technology) in 250-nm CMOS (complementary metal oxide semiconductor) processes. In order to pack a maximum of functions within a minimum pixel size, the ROIC array is a full, custom application-specific integrated circuit (ASIC) design using a mixed-signal CMOS process with compact primitive layout cells. The ROIC array was processed to allow assembly in bump-bonding technology with photon-counting infrared detector arrays into 3-D imaging cameras (LADAR). The ROIC architecture was designed to work with either common- anode Si GPD arrays or common-cathode InGaAs GPD arrays. The current ROIC pixel design is hardwired prior to processing one of the two GPD array configurations, and it has the provision to allow soft reconfiguration to either array (to be implemented into the next ROIC array generation). The ROIC pixel architecture implements the Geiger avalanche quenching, bias, reset, and time to digital conversion (TDC) functions in full-digital design, and uses time domain over-sampling (vernier) to allow high temporal resolution at low clock rates, increased data yield, and improved utilization of the laser beam.

  15. Performance of multiplexed SQUID readout for Cryogenic Sensor Arrays

    Science.gov (United States)

    Chervenak, J. A.; Grossman, E. N.; Irwin, K. D.; Martinis, John M.; Reintsema, C. D.; Allen, C. A.; Bergman, D. I.; Moseley, S. H.; Shafer, R.

    2000-04-01

    We report on the implementation of a multiplexer that uses superconducting quantum interference devices (SQUIDs) to read out low-impedance cryogenic detectors. Using prototype chips, a circuit was built which interfaces eight input SQUID channels with a close-packed array of eight transition-edge sensor (TES) infrared bolometers. Circuit elements were measured and crosstalk specifications are reported. Digital feedback is employed to flux-lock a single element in the array of SQUIDs.

  16. Timepix3: a 65K channel hybrid pixel readout chip with simultaneous ToA/ToT and sparse readout

    Science.gov (United States)

    Poikela, T.; Plosila, J.; Westerlund, T.; Campbell, M.; De Gaspari, M.; Llopart, X.; Gromov, V.; Kluit, R.; van Beuzekom, M.; Zappon, F.; Zivkovic, V.; Brezina, C.; Desch, K.; Fu, Y.; Kruth, A.

    2014-05-01

    The Timepix3, hybrid pixel detector (HPD) readout chip, a successor to the Timepix \\cite{timepix2007} chip, can record time-of-arrival (ToA) and time-over-threshold (ToT) simultaneously in each pixel. ToA information is recorded in a 14-bit register at 40 MHz and can be refined by a further 4 bits with a nominal resolution of 1.5625 ns (640 MHz). ToT is recorded in a 10-bit overflow controlled counter at 40 MHz. Pixels can be programmed to record 14 bits of integral ToT and 10 bits of event counting, both at 40 MHz. The chip is designed in 130 nm CMOS and contains 256 × 256 pixel channels (55 × 55 μm2). The chip, which has more than 170 M transistors, has been conceived as a general-purpose readout chip for HPDs used in a wide range of applications. Common requirements of these applications are operation without a trigger signal, and sparse readout where only pixels containing event information are read out. A new architecture has been designed for sparse readout and can achieve a throughput of up to 40 Mhits/s/cm2. The flexible architecture offers readout schemes ranging from serial (one link) readout (40 Mbps) to faster parallel (up to 8 links) readout of 5.12 Gbps. In the ToA/ToT operation mode, readout is simultaneous with data acquisition thus keeping pixels sensitive at all times. The pixel matrix is formed by super pixel (SP) structures of 2 × 4 pixels. This optimizes resources by sharing the pixel readout logic which transports data from SPs to End-of-Column (EoC) using a 2-phase handshake protocol. To reduce power consumption in applications with a low duty cycle, an on-chip power pulsing scheme has been implemented. The logic switches bias currents of the analog front-ends in a sequential manner, and all front-ends can be switched in 800 ns. The digital design uses a mixture of commercial and custom standard cell libraries and was verified using Open Verification Methodology (OVM) and commercial timing analysis tools. The analog front-end and a

  17. Readout circuitry for continuous high-rate photon detection with arrays of InP Geiger-mode avalanche photodiodes

    Science.gov (United States)

    Frechette, Jonathan; Grossmann, Peter J.; Busacker, David E.; Jordy, George J.; Duerr, Erik K.; McIntosh, K. Alexander; Oakley, Douglas C.; Bailey, Robert J.; Ruff, Albert C.; Brattain, Michael A.; Funk, Joseph E.; MacDonald, Jason G.; Verghese, Simon

    2012-06-01

    An asynchronous readout integrated circuit (ROIC) has been developed for hybridization to a 32x32 array of single-photon sensitive avalanche photodiodes (APDs). The asynchronous ROIC is capable of simultaneous detection and readout of photon times of arrival, with no array blind time. Each pixel in the array is independently operated by a finite state machine that actively quenches an APD upon a photon detection event, and re-biases the device into Geiger mode after a programmable hold-off time. While an individual APD is in hold-off mode, other elements in the array are biased and available to detect photons. This approach enables high pixel refresh frequency (PRF), making the device suitable for applications including optical communications and frequency-agile ladar. A built-in electronic shutter that de-biases the whole array allows the detector to operate in a gated mode or allows for detection to be temporarily disabled. On-chip data reduction reduces the high bandwidth requirements of simultaneous detection and readout. Additional features include programmable single-pixel disable, region of interest processing, and programmable output data rates. State-based on-chip clock gating reduces overall power draw. ROIC operation has been demonstrated with hybridized InP APDs sensitive to 1.06-μm and 1.55-μm wavelength, and fully packaged focal plane arrays (FPAs) have been assembled and characterized.

  18. A 4k-Pixel CTIA Readout for Far IR Photodetector Arrays Project

    Data.gov (United States)

    National Aeronautics and Space Administration — We propose to design a low noise, two-side buttable, 64x64 readout multiplexer with the following key design features: 1- By far the largest readout array developed...

  19. Monolithic arrays of silicon drift detectors for medical imaging applications and related CMOS readout electronics

    Energy Technology Data Exchange (ETDEWEB)

    Fiorini, C. [Politecnico di Milano, Dipartimento di Elettronica e Informazione, Milan (Italy) and INFN, Sezione di Milano, Milan (Italy)]. E-mail: carlo.fiorini@polimi.it; Longoni, A. [Politecnico di Milano, Dipartimento di Elettronica e Informazione, Milan (Italy); INFN, Sezione di Milano, Milan (Italy); Porro, M. [Politecnico di Milano, Dipartimento di Ingegneria Nucleare, Milan (Italy); INFN, Sezione di Milano, Milan (Italy); Perotti, F. [Istituto di Astrofisica Spaziale e Fisica Cosmica - INAF, Milan (Italy); Lechner, P. [PNSensors, Munich (Germany); Strueder, L. [MPI fuer Extraterrestrische Physik Halbleiterlabor, Munich (Germany)

    2006-05-01

    Monolithic arrays of Silicon Drift Detectors (SDDs) have been recently proposed to be used with scintillators for high-position-resolution {gamma}-ray imaging applications. Thanks to the low electronics noise due to the small value of the output capacitance, the SDD offers better performances with respect to conventional photodiodes of the same geometry. We show the results achieved with a small monolithic array of SDDs, each one with a front-end JFET integrated at its center, used as photodetector in a first prototype of Anger Camera. An intrinsic resolution better than 200 {mu}m has been achieved with this prototype. Moreover, we describe a new monolithic array of SDDs composed of 77 single hexagonal units, each one with an active area of 8.7 mm{sup 2}, for a total active area of the device of 6.7 cm{sup 2}. Finally, the basic principles and the first results of the CMOS readout chip specifically designed for the readout of the signals from SDDs arrays are presented.

  20. Monolithic arrays of silicon drift detectors for medical imaging applications and related CMOS readout electronics

    International Nuclear Information System (INIS)

    Monolithic arrays of Silicon Drift Detectors (SDDs) have been recently proposed to be used with scintillators for high-position-resolution γ-ray imaging applications. Thanks to the low electronics noise due to the small value of the output capacitance, the SDD offers better performances with respect to conventional photodiodes of the same geometry. We show the results achieved with a small monolithic array of SDDs, each one with a front-end JFET integrated at its center, used as photodetector in a first prototype of Anger Camera. An intrinsic resolution better than 200 μm has been achieved with this prototype. Moreover, we describe a new monolithic array of SDDs composed of 77 single hexagonal units, each one with an active area of 8.7 mm2, for a total active area of the device of 6.7 cm2. Finally, the basic principles and the first results of the CMOS readout chip specifically designed for the readout of the signals from SDDs arrays are presented

  1. The CMS Pixel Readout Chip for the Phase 1 Upgrade

    International Nuclear Information System (INIS)

    The present CMS pixel Read Out Chip (ROC) was designed for operation at a bunch spacing of 25 ns and to be efficient up to the nominal instantaneous luminosity of 1034 cm−2 s−1. Based on the excellent LHC performance to date and the upgrade plans for the accelerators, it is anticipated that the instantaneous luminosity could reach 2×1034 cm−2 s−1 before the Long Shutdown 2 (LS2) in 2018, and well above this by the LS3 in 2022. That is why a new ROC has been designed and why a completely new pixel detector will be built with a planned installation in CMS during an extended winter shutdown in 2016/17. The ROC for the upgraded pixel detector is an evolution of the present architecture. It will be manufactured in the same 250 nm CMOS process. The core of the architecture is maintained, with enhancement in performance in three main areas: readout protocol, reduced data loss and enhanced analog performance. The main features of the new CMS pixel ROC are presented together with measured performance of the chip

  2. Digital readouts for large microwave low-temperature detector arrays

    Science.gov (United States)

    Mazin, Benjamin A.; Day, Peter K.; Irwin, Kent D.; Reintsema, Carl D.; Zmuidzinas, Jonas

    2006-04-01

    Over the last several years many different types of low-temperature detectors (LTDs) have been developed that use a microwave resonant circuit as part of their readout. These devices include microwave kinetic inductance detectors (MKID), microwave SQUID readouts for transition edge sensors (TES), and NIS bolometers. Current readout techniques for these devices use analog frequency synthesizers and IQ mixers. While these components are available as microwave integrated circuits, one set is required for each resonator. We are exploring a new readout technique for this class of detectors based on a commercial-off-the-shelf technology called software defined radio (SDR). In this method a fast digital to analog (D/A) converter creates as many tones as desired in the available bandwidth. Our prototype system employs a 100 MS/s 16-bit D/A to generate an arbitrary number of tones in 50 MHz of bandwidth. This signal is then mixed up to the desired detector resonant frequency (˜10 GHz), sent through the detector, then mixed back down to baseband. The baseband signal is then digitized with a series of fast analog to digital converters (80 MS/s, 14-bit). Next, a numerical mixer in a dedicated integrated circuit or FPGA mixes the resonant frequency of a specified detector to 0 Hz, and sends the complex detector output over a computer bus for processing and storage. In this paper we will report on our results in using a prototype system to readout a MKID array, including system noise performance, X-ray pulse response, and cross-talk measurements. We will also discuss how this technique can be scaled to read out many thousands of detectors.

  3. Silicon ball grid array chip carrier

    Science.gov (United States)

    Palmer, David W.; Gassman, Richard A.; Chu, Dahwey

    2000-01-01

    A ball-grid-array integrated circuit (IC) chip carrier formed from a silicon substrate is disclosed. The silicon ball-grid-array chip carrier is of particular use with ICs having peripheral bond pads which can be reconfigured to a ball-grid-array. The use of a semiconductor substrate such as silicon for forming the ball-grid-array chip carrier allows the chip carrier to be fabricated on an IC process line with, at least in part, standard IC processes. Additionally, the silicon chip carrier can include components such as transistors, resistors, capacitors, inductors and sensors to form a "smart" chip carrier which can provide added functionality and testability to one or more ICs mounted on the chip carrier. Types of functionality that can be provided on the "smart" chip carrier include boundary-scan cells, built-in test structures, signal conditioning circuitry, power conditioning circuitry, and a reconfiguration capability. The "smart" chip carrier can also be used to form specialized or application-specific ICs (ASICs) from conventional ICs. Types of sensors that can be included on the silicon ball-grid-array chip carrier include temperature sensors, pressure sensors, stress sensors, inertia or acceleration sensors, and/or chemical sensors. These sensors can be fabricated by IC processes and can include microelectromechanical (MEM) devices.

  4. Metallic Magnetic Calorimeters with On-Chip dc-SQUID Readout

    Science.gov (United States)

    Kempf, S.; Ferring, A.; Fleischmann, A.; Wegner, M.; Enss, C.

    2016-07-01

    Metallic magnetic calorimeters (MMCs) are low-temperature particle detectors that are typically read out by using superconducting quantum interference devices (SQUIDs). But since MMCs are sensitive to the input circuitry and the noise performance of the SQUID, the energy resolution of MMCs have not yet reached their fundamental limit. A possible solution to overcome present limits is to maximize the flux coupling by minimizing parasitic inductance in the input circuit. To show the suitability of this approach, we realized a 64 pixel MMC detector array with integrated dc-SQUID readout, i.e., detector and SQUID are on the same chip. We observed an influence of the power dissipation of the SQUID on the detector temperature. We achieved a baseline energy resolution of Δ E_mathrm {FWHM} = 25 mathrm {eV} and Δ E_mathrm {FWHM} = 30 mathrm {eV} for X-rays with energies up to 6 mathrm {keV}.

  5. The CMS pixel readout chip for the Phase 1 Upgrade

    CERN Document Server

    Hits, Dmitry

    2015-01-01

    The present CMS pixel Read Out Chip (ROC) was designed for operation at a bunch spacing of 25\\,ns and to be efficient up to the nominal instantaneous luminosity of 10$^{34} \\rm cm^{-2} \\rm s^{-1}$. Based on the excellent LHC performance to date and the upgrade plans for the accelerators, it is anticipated that the instantaneous luminosity could reach $2\\times10^{34} \\rm cm^{-2} \\rm s^{-1}$ before the Long Shutdown 2 (LS2) in 2018, and well above this by the LS3 in 2022. That is why a new ROC has been designed and why a completely new pixel detector will be built with a planned installation in CMS during an extended winter shutdown in 2016/17. The ROC for the upgraded pixel detector is an evolution of the present architecture. It will be manufactured in the same 250\\,nm CMOS process. The core of the architecture is maintained, with enhancement in performance in three main areas: readout protocol, reduced data loss and enhanced analog performance. The main features of the new CMS pixel ROC are presented togeth...

  6. A 240-channel thick film multi-chip module for readout of silicon drift detectors

    Science.gov (United States)

    Lynn, D.; Bellwied, R.; Beuttenmueller, R.; Caines, H.; Chen, W.; DiMassimo, D.; Dyke, H.; Elliott, D.; Grau, M.; Hoffmann, G. W.; Humanic, T.; Jensen, P.; Kleinfelder, S. A.; Kotov, I.; Kraner, H. W.; Kuczewski, P.; Leonhardt, B.; Li, Z.; Liaw, C. J.; LoCurto, G.; Middelkamp, P.; Minor, R.; Mazeh, N.; Nehmeh, S.; O'Conner, P.; Ott, G.; Pandey, S. U.; Pruneau, C.; Pinelli, D.; Radeka, V.; Rescia, S.; Rykov, V.; Schambach, J.; Sedlmeir, J.; Sheen, J.; Soja, B.; Stephani, D.; Sugarbaker, E.; Takahashi, J.; Wilson, K.; STAR-SVT Collaboration

    2000-01-01

    We have developed a thick film multi-chip module for readout of silicon drift (or low capacitance ˜200 fF) detectors. Main elements of the module include a custom 16-channel NPN-BJT preamplifier-shaper (PASA) and a custom 16-channel CMOS Switched Capacitor Array (SCA). The primary design criteria of the module were the minimizations of the power (12 mW/channel), noise (ENC=490 e - rms), size (20.5 mm×63 mm), and radiation length (1.4%). We will discuss various aspects of the PASA design, with emphasis on the preamplifier feedback network. The SCA is a modification of an integrated circuit that has been previously described [1]; its design features specific to its application in the SVT (Silicon Vertex Tracker in the STAR experiment at RHIC) will be discussed. The 240-channel multi-chip module is a circuit with five metal layers fabricated in thick film technology on a beryllia substrate and contains 35 custom and commercial integrated circuits. It has been recently integrated with silicon drift detectors in both a prototype system assembly for the SVT and a silicon drift array for the E896 experiment at the Alternating Gradient Synchrotron at the Brookhaven National Laboratory. We will discuss features of the module's design and fabrication, report the test results, and emphasize its performance both on the bench and under experimental conditions.

  7. A 240-channel thick film multi-chip module for readout of silicon drift detectors

    International Nuclear Information System (INIS)

    We have developed a thick film multi-chip module for readout of silicon drift (or low capacitance ∼200 fF) detectors. Main elements of the module include a custom 16-channel NPN-BJT preamplifier-shaper (PASA) and a custom 16-channel CMOS Switched Capacitor Array (SCA). The primary design criteria of the module were the minimizations of the power (12 mW/channel), noise (ENC=490 e- rms), size (20.5 mmx63 mm), and radiation length (1.4%). We will discuss various aspects of the PASA design, with emphasis on the preamplifier feedback network. The SCA is a modification of an integrated circuit that has been previously described [1]; its design features specific to its application in the SVT (Silicon Vertex Tracker in the STAR experiment at RHIC) will be discussed. The 240-channel multi-chip module is a circuit with five metal layers fabricated in thick film technology on a beryllia substrate and contains 35 custom and commercial integrated circuits. It has been recently integrated with silicon drift detectors in both a prototype system assembly for the SVT and a silicon drift array for the E896 experiment at the Alternating Gradient Synchrotron at the Brookhaven National Laboratory. We will discuss features of the module's design and fabrication, report the test results, and emphasize its performance both on the bench and under experimental conditions

  8. NIRCA ASIC for the readout of focal plane arrays

    Science.gov (United States)

    Pâhlsson, Philip; Steenari, David; Øya, Petter; Otnes Berge, Hans Kristian; Meier, Dirk; Olsen, Alf; Hasanbegovic, Amir; Altan, Mehmet A.; Najafiuchevler, Bahram; Talebi, Jahanzad; Azman, Suleyman; Gheorghe, Codin; Ackermann, Jörg; Mæhlum, Gunnar; Johansen, Tor Magnus; Stein, Timo

    2016-05-01

    This work is a continuation of our preliminary tests on NIRCA - the Near Infrared Readout and Controller ASIC [1]. The primary application for NIRCA is future astronomical science and Earth observation missions where NIRCA will be used with mercury cadmium telluride image sensors (HgCdTe, or MCT) [2], [3]. Recently we have completed the ASIC tests in the cryogenic environment down to 77 K. We have verified that NIRCA provides to the readout integrated circuit (ROIC) regulated power, bias voltages, and fully programmable digital sequences with sample control of the analogue to digital converters (ADC). Both analog and digital output from the ROIC can be acquired and image data is 8b/10bencoded and delivered via serial interface. The NIRCA also provides temperature measurement, and monitors several analog and digital input channels. The preliminary work confirms that NIRCA is latch-up immune and able to operate down to 77 K. We have tested the performance of the 12-bit ADC with pre-amplifier to have 10.8 equivalent number of bits (ENOB) at 1.4 Msps and maximum sampling speed at 2 Msps. The 1.8-V and 3.3-V output regulators and the 10-bit DACs show good linearity and work as expected. A programmable sequencer is implemented as a micro-controller with a custom instruction set. Here we describe the special operations of the sequencer with regards to the applications and a novel approach to parallel real-time hardware outputs. The test results of the working prototype ASIC show good functionality and performance from room temperature down to 77 K. The versatility of the chip makes the architecture a possible candidate for other research areas, defense or industrial applications that require analog and digital acquisition, voltage regulation, and digital signal generation.

  9. Compensated readout for high-density MOS-gated memristor crossbar array

    KAUST Repository

    Zidan, Mohammed A.

    2015-01-01

    Leakage current is one of the main challenges facing high-density MOS-gated memristor arrays. In this study, we show that leakage current ruins the memory readout process for high-density arrays, and analyze the tradeoff between the array density and its power consumption. We propose a novel readout technique and its underlying circuitry, which is able to compensate for the transistor leakage-current effect in the high-density gated memristor array.

  10. A Trigger and Readout Scheme for future Cherenkov Telescope Arrays

    CERN Document Server

    Hermann, G; Foehr, C; Hofmann, W; Kihm, T; Köck, F

    2008-01-01

    The next generation of ground-based gamma-ray observatories, such as e.g. CTA, will consist of about 50-100 telescopes, and cameras with in total ~100000 to ~200000 channels. The telescopes of the core array will cover and effective area of ~ 1 km2 and will be possibly accompanied by a large halo of smaller telescopes spread over about 10 km2 . In order to make maximum use of the stereoscopic approach, a very flexible inter-telescope trigger scheme is needed which allows to couple telescopes that located up to ~1 km apart. The development of a cost effective readout scheme for the camera signals exhibits a major technological challenge. Here we present ideas on a new asynchronous inter-telescope trigger scheme, and a very cost-effective, high-bandwidth frontend to backend data transfer system, both based on standard Ethernet components and an Ethernet front-end interface based on mass production standard FPGAs.

  11. Design and performance of a low noise, 128-channel ASIC preamplifier for readout of active matrix flat-panel imaging arrays

    CERN Document Server

    Maolinbay, M; Yarema, R J; Antonuk, L E; El-Mohri, Y; Yeakey, M

    2002-01-01

    Design architecture and performance measurements of a low noise, 128-channel application-specific-integrated-circuit (ASIC) preamplifier are reported. The ASIC was designed for readout of active matrix flat-panel imager (AMFPI) arrays. Such arrays, which presently can be made as large as 41 cmx41 cm and with pixel-to-pixel pitches down to approx 70 mu m, require large numbers of low noise, high density, custom integrated readout circuits. The design of this new chip is specifically tailored for research and development of active matrix flat-panel arrays for various medical imaging applications. The design architecture includes the following features: (1) Programmable signal gain which allows acquisition of a wide range of signal sizes from various array designs so as to optimize the signal-to-noise ratio; (2) Correlated double sampling (CDS) which significantly reduces certain noise components; (3) Pipelined readout (simultaneously sampling and multiplexing signals) which reduces image acquisition time; (4) P...

  12. Fast, High-Precision Readout Circuit for Detector Arrays

    Science.gov (United States)

    Rider, David M.; Hancock, Bruce R.; Key, Richard W.; Cunningham, Thomas J.; Wrigley, Chris J.; Seshadri, Suresh; Sander, Stanley P.; Blavier, Jean-Francois L.

    2013-01-01

    The GEO-CAPE mission described in NASA's Earth Science and Applications Decadal Survey requires high spatial, temporal, and spectral resolution measurements to monitor and characterize the rapidly changing chemistry of the troposphere over North and South Americas. High-frame-rate focal plane arrays (FPAs) with many pixels are needed to enable such measurements. A high-throughput digital detector readout integrated circuit (ROIC) that meets the GEO-CAPE FPA needs has been developed, fabricated, and tested. The ROIC is based on an innovative charge integrating, fast, high-precision analog-to-digital circuit that is built into each pixel. The 128×128-pixel ROIC digitizes all 16,384 pixels simultaneously at frame rates up to 16 kHz to provide a completely digital output on a single integrated circuit at an unprecedented rate of 262 million pixels per second. The approach eliminates the need for off focal plane electronics, greatly reducing volume, mass, and power compared to conventional FPA implementations. A focal plane based on this ROIC will require less than 2 W of power on a 1×1-cm integrated circuit. The ROIC is fabricated of silicon using CMOS technology. It is designed to be indium bump bonded to a variety of detector materials including silicon PIN diodes, indium antimonide (InSb), indium gallium arsenide (In- GaAs), and mercury cadmium telluride (HgCdTe) detector arrays to provide coverage over a broad spectral range in the infrared, visible, and ultraviolet spectral ranges.

  13. CALORIC: A readout chip for high granularity calorimeter

    International Nuclear Information System (INIS)

    A very-front-end electronics has been developed to fulfil requirements for the next generation of electromagnetic calorimeters. The compactness of this kind of detector and its large number of channels (up to several millions) impose a drastic limitation of the power consumption and a high level of integration. The electronic channel proposed is first of all composed of a low-noise Charge Sensitive Amplifier (CSA) able to amplify the charge delivered by a silicon diode up to 10 pC. Next, a two-gain shaping, based on a Gated Integration (G.I.), is implemented to cover the 15 bits dynamic range required: a high gain shaper processes signals from 4 fC (charge corresponding to the MIP) up to 1 pC, and a low gain filter handles charges up to 10 pC. The G.I. performs also the analog memorization of the signal until it is digitalized. Hence, the analog-to-digital conversion is carried out through a low-power 12-bit cyclic ADC. If the signal overloads the high-gain channel dynamic range, a comparator selects the low-gain channel instead. Moreover, an auto-trigger channel has been implemented in order to select and store a valid event over the noise. The timing sequence of the channel is managed by a digital IP. It controls the G.I. switches, generates all needed clocks, drives the ADC and delivers the final result over 12 bits. The whole readout channel is power controlled, which permits to reduce the consumption according to the duty cycle of the beam collider. Simulations have been performed with Spectre simulator on the prototype chip designed with the 0.35 μm CMOS technology from Austriamicrosystems. Results show a non-linearity better than 0.1% for the high-gain channel, and a non-linearity limited to 1% for the low-gain channel. The Equivalent Noise Charge referred to the input of the channel is evaluated to 0.4 fC complying with the MIP/10 limit. With the timing sequence of the International Linear Collider, which presents a duty cycle of 1%, the power consumption

  14. FPHX: A New Silicon Strip Readout Chip for the PHENIX Experiment at RHIC

    Energy Technology Data Exchange (ETDEWEB)

    Hoff, James R.; Zimmerman, Tom N.; Yarema, Raymond J.; /Fermilab; Kapustinsky, Jon S.; Brookes, Melynda L.; /LOS ALAMOS

    2009-01-01

    The FPHX chip is a silicon strip readout chip developed at Fermilab for use in the FVTX Detector of the PHENIX experiment at RHIC. Each front end consists of an integrator which is AC coupled to a shaper, followed by a discriminator and a 3-bit analog-to-digital converter. The backend is a novel architecture in two stages that permits dead-timeless operation and high-speed readout with very low latency. A slow controller provides an interface for all on-chip programmable functions. This chip has been fabricated in the 0.25um TSMC process. All functionality including the analog front-end, the digital back-end, and the slow controller has been verified experimentally.

  15. The charge pump PLL clock generator designed for the 1.56 ns bin size time-to-digital converter pixel array of the Timepix3 readout ASIC

    CERN Document Server

    Fu, Y et al.

    2014-01-01

    Timepix3 is a newly developed pixel readout chip which is expected to be operated in a wide range of gaseous and silicon detectors. It is made of 256×256 pixels organized in a square pixel-array with 55 µm pitch. Oscillators running at 640 MHz are distributed across the pixel-array and allow for a highly accurate measurement of the arrival time of a hit. This paper concentrates on a low-jitter phase locked loop (PLL) that is located in the chip periphery. This PLL provides a control voltage which regulates the actual frequency of the individual oscillators, allowing for compensation of process, voltage, and temperature variations.

  16. The design of a DAQ system for a GEM imaging detector based on FET array readout

    International Nuclear Information System (INIS)

    A data acquisition system was designed for a GEM imaging detector, which is readout by a FET switch array and can be used in real-time imaging. By using some advanced technologies, like FPGA and MCU, the designed DAQ system succeeds in multi-channel real-time readout with high-accuracy and high universality. (authors)

  17. Performance of a Fast Binary Readout CMOS Active Pixel Sensor Chip Designed for Charged Particle Detection

    OpenAIRE

    Degerli, Y.; Besancon, M.; Besson, A.; Claus, G; Deptuch, G; Dulinski, W.; Fourches, N.; Goffe, M.; Himmi, A.; Li, Y.; Li, Y.; Lutz, P.; Orsini, F.; Szelezniak, M.

    2006-01-01

    We report on the performance of the MIMOSA8 (HiMAPS1) chip. The chip is a 128$, times ,$32 pixels array where 24 columns have discriminated binary outputs and eight columns analog test outputs. Offset correction techniques are used extensively in this chip to overcome process related mismatches. The array is divided in four blocks of pixels with different conversion factors and is controlled by a serially programmable sequencer. MIMOSA8 is a representative of the CMOS sensors development opti...

  18. SPIROC (SiPM Integrated Read-Out Chip) Dedicated very front-end electronics for an ILC prototype hadronic calorimeter with SiPM read-out

    CERN Document Server

    Bouchel, Michel; Dulucq, Frédéric; Fleury, Julien; de La Taille, Christophe; Martin-Chassard, Gisèle; Raux, Ludovic

    2009-01-01

    The SPIROC chip is a dedicated very front-end electronics for an ILC prototype hadronic calorimeter with Silicon photomultiplier (or MPPC) readout. This ASIC is due to equip a 10,000-channel demonstrator in 2009. SPIROC is an evolution of FLC_SiPM used for the ILC AHCAL physics prototype [1]. SPIROC was submitted in June 2007 and will be tested in September 2007. It embeds cutting edge features that fulfil ILC final detector requirements. It has been realized in 0.35m SiGe technology. It has been developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels needed. SPIROC is an auto-triggered, bi-gain, 36-channel ASIC which allows to measure on each channel the charge from one photoelectron to 2000 and the time with a 100ps accurate TDC. An analogue memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. A 12-bit Wilkinson ADC has been embedded to digitize the analogue memor...

  19. Frequency multiplexed superconducting quantum interference device readout of large bolometer arrays for cosmic microwave background measurements

    OpenAIRE

    Dobbs, M. A.; Lueker, M.; Padin, S.; Shirokoff, E.; Staniszewski, Z.; Vieira, J. D.

    2012-01-01

    A technological milestone for experiments employing transition edge sensor bolometers operating at sub-Kelvin temperature is the deployment of detector arrays with 100s–1000s of bolometers. One key technology for such arrays is readout multiplexing: the ability to read out many sensors simultaneously on the same set of wires. This paper describes a frequency-domain multiplexed readout system which has been developed for and deployed on the APEX-SZ and South Pole Telescope millimeter wavelengt...

  20. Preliminary validation results of an ASIC for the readout and control of near-infrared large array detectors

    Science.gov (United States)

    Pâhlsson, Philip; Meier, Dirk; Otnes Berge, Hans Kristian; Øya, Petter; Steenari, David; Olsen, Alf; Hasanbegovic, Amir; Altan, Mehmet A.; Najafiuchevler, Bahram; Talebi, Jahanzad; Azman, Suleyman; Gheorghe, Codin; Ackermann, Jörg; Mæhlum, Gunnar

    2015-06-01

    In this paper we present initial test results of the Near Infrared Readout and Controller ASIC (NIRCA), designed for large area image sensors under contract from the European Space Agency (ESA) and the Norwegian Space Center. The ASIC is designed to read out image sensors based on mercury cadmium telluride (HgCdTe, or MCT) operating down to 77 K. IDEAS has developed, designed and initiated testing of NIRCA with promising results, showing complete functionality of all ASIC sub-components. The ASIC generates programmable digital signals to clock out the contents of an image array and to amplify, digitize and transfer the resulting pixel charge. The digital signals can be programmed into the ASIC during run-time and allows for windowing and custom readout schemes. The clocked out voltages are amplified by programmable gain amplifiers and digitized by 12-bit, 3-Msps successive approximation register (SAR) analogue-to-digital converters (ADC). Digitized data is encoded using 8-bit to 10-bit encoding and transferred over LVDS to the readout system. The ASIC will give European researchers access to high spectral sensitivity, very low noise and radiation hardened readout electronics for astronomy and Earth observation missions operating at 77 K and room temperature. The versatility of the chip makes the architecture a possible candidate for other research areas, or defense or industrial applications that require analog and digital acquisition, voltage regulation, and digital signal generation.

  1. Evaluation of 320x240 pixel LEC GaAs Schottky barrier X-ray imaging arrays, hybridized to CMOS readout circuit based on charge integration

    CERN Document Server

    Irsigler, R; Alverbro, J; Borglind, J; Froejdh, C; Helander, P; Manolopoulos, S; O'Shea, V; Smith, K

    1999-01-01

    320x240 pixels GaAs Schottky barrier detector arrays were fabricated, hybridized to silicon readout circuits, and subsequently evaluated. The detector chip was based on semi-insulating LEC GaAs material. The square shaped pixel detector elements were of the Schottky barrier type and had a pitch of 38 mu m. The GaAs wafers were thinned down prior to the fabrication of the ohmic back contact. After dicing, the chips were indium bump, flip-chip bonded to CMOS readout circuits based on charge integration, and finally evaluated. A bias voltage between 50 and 100 V was sufficient to operate the detector. Results on I-V characteristics, noise behaviour and response to X-ray radiation are presented. Images of various objects and slit patterns were acquired by using a standard dental imaging X-ray source. The work done was a part of the XIMAGE project financed by the European Community (Brite-Euram). (author)

  2. Integration of the Omega-3 readout chip into a high energy physics experimental data acquisition system

    Energy Technology Data Exchange (ETDEWEB)

    Beker, H.; Chesi, E.; Martinengo, P. [European Organization for Nuclear Research, Geneva (Switzerland)

    1997-08-21

    The Omega-3 readout chip is presented in detail elsewhere in the same proceedings. We here describe the integration of the chip into present and future experiments describing both hardware and software aspects. We cover preliminary tests in the laboratory and on the beam. The WA97 experiment has already used a pixel telescope in the past and intends to upgrade to the Omega-3 chip. A newly proposed experiment at CERN studying strangeness production in heavy ion collisions also plans to use a similar telescope. Finally, we give an outlook on the ongoing developments in the pixel readout architecture in the context of ALICE, the heavy ion experiment at the LHC collider. (orig.). 11 refs.

  3. Integrated microelectronic capacitive readout subsystem for lab-on-a-chip applications

    International Nuclear Information System (INIS)

    A mixed-signal capacitive biosensor readout system is presented with its main readout functionality embedded in an integrated circuit, compatible with complementary metal oxide semiconductor-type biosensors. The system modularity allows its usage as a consumable since it eventually leads to a system-on-chip where sensor and readout circuitry are hosted on the same die. In this work, a constant current source is used for measuring the input capacitance. Compared to most capacitive biosensor readout circuits, this method offers the convenience of adjusting both the range and the resolution, depending on the requirements dictated by the application. The chip consumes less than 5 mW of power and the die area is 0.06 mm2. It shows a broad input capacitance range (capable of measuring bio-capacitances from 6 pF to 9.8 nF), configurable resolution (down to 1 fF), robustness to various biological experiments and good linearity. The integrated nature of the readout system is proven to be sufficient both for one-time in situ (consumable-type) bio-measurements and its incorporation into a point-of-care system. (paper)

  4. Design and development of compact readout electronics with silicon photomultiplier array for a compact imaging detector

    Institute of Scientific and Technical Information of China (English)

    ZHANG Xiao-Hui; QI Yu-Jin; ZHAO Cui-Lan

    2012-01-01

    This work aims at developing compact readout electronics for a compact imaging detector module with silicon photomultiplier (SPM) array.The detector module consists of a LYSO crystal array coupling with a SensL's 4×4 SPM array.A compact multiplexed readout based on a discretized positioning circuit (DPC) was developed to reduce the readout channels from 16 to 4 outputs.Different LYSO crystal arrays of 4×4,8×8 and 12×12 with pixel sizes of 3.2,1.6 and 1.0 mm respectively,have been tested with the compact readout board using a 137Cs source.The initial results show that the compact imaging detector module with the compact multiplexed readout could clearly resolve 1 mm×1 mm×10 mm LYSO scintillation crystal array except those at the edges.The detector's intrinsic spatial resolution up to 1 mm can be achieved with the 3 mm×3 mm size SPMArray4 through light sharing and compact multiplexed readout.Our results indicate that this detector module is feasible for the development of high-resolution compact PET.

  5. CHIP, CHIP, ARRAY! THREE CHIPS FOR POST-GENOMIC RESEARCH

    Science.gov (United States)

    Cambridge Healthtech Institute recently held the 4th installment of their popular "Lab-on-a-Chip" series in Zurich, Switzerland. As usual, it was enthusiastically received and over 225 people attended the 2-1/2 day meeting to see and hear about some of the latest developments an...

  6. Fixed pattern deviations in Si pixel detectors measured using the Medipix 1 readout chip

    CERN Document Server

    Tlustos, L; Davidson, D; Heijne, Erik H M; Mikulec, B

    2003-01-01

    Dopant fluctuations and other defects in silicon wafers can lead to systematic errors in several parameters in particle or single-photon detection. In imaging applications non-uniformities in sensors or readout give rise to fixed pattern image noise and degradation of achievable spatial resolution for a given flux. High granularity pixel detectors offer the possibility to investigate local properties of the detector material on a microscopic scale. In this paper, we study fixed pattern detection fluctuations and detector inhomogeneities using the Medipix 1 readout chip. Low-frequency fixed pattern signal deviations due to dopant inhomogeneities can be separated from high-frequency deviations.

  7. Real-Time Discrete SPAD Array Readout Architecture for Time of Flight PET

    CERN Document Server

    Tétrault, M -A; Boisvert, A; Thibaudeau, C; Dubois, F; Fontaine, R; Pratte, J -F

    2014-01-01

    Single photon avalanche diode (SPAD) arrays have proven themselves as serious candidates for time of flight positron emission tomography (PET). Discrete readout schemes mitigate the low-noise requirements of analog schemes and offer very fine control over threshold levels and timing pickup strategies. A high optical fill factor is paramount to timing performance in such detectors, and consequently space is limited for closely integrated electronics. Nonetheless, a production, daily used PET scanner must minimize bandwidth usage, data volume, data analysis time and power consumption and therefore requires a real-time readout and data processing architecture as close to the detector as possible. We propose a fully digital, embedded real-time readout architecture for SPAD-based detector. The readout circuit is located directly under the SPAD array instead of within or beside it to remove the fill factor versus circuit capabilities tradeoff. The overall real-time engine reduces transmitted data by a factor of 8 i...

  8. Production Testing and Quality Assurance of CMS Silicon Microstrip Tracker Readout Chips

    CERN Document Server

    Barrillon, Pierre; Hall, Geoffrey; Leaver, James; Noah, E; Raymond, M; Bisello, Dario; Candelori, Andrea; Kaminski, A; Stefanuti, L; Tessaro, Mario; French, Marcus

    2004-01-01

    The APV25 is the 128 channel CMOS chip developed for readout of the silicon microstrip tracker in the CMS experiment at the CERN Large Hadron Collider. The detector is now under construction and will be the largest silicon microstrip system ever built, with ~200m^2 of silicon sensors. Around 10^5 chips are required to instrument the system, which must operate for about 10 years in a high radiation environment with little or no possibility of microstrip system ever built, with ~200m^2 of silicon sensors. Around 10^5 chips are required to instrument the system, which must operate for about 10 years in a high radiation environment with little or no possibility of assurance of long term performance of the readout electronics, especially verification of radiation tolerance, is highly desirable. This has been achieved by means of automated probe testing of every chip on the silicon wafers from the foundry, followed by studies of sample die to evaluate in more detail properties of the chips which cannot easily be ex...

  9. DTMROC-S: Deep submicron version of the readout chip for the TRT detector in ATLAS

    OpenAIRE

    Anghinolfi, Francisco; åkesson, Torsten, Paul, åke; Eerola, Paula; Farthouat, Philippe; Lichard, Peter; Ryjov, Vladimir; Szczygiel, Richard; Dressnandt, Nandor; Keener, Paul; Newcomer, Mitch; Van Berg, Rick; Williams, Hugh

    2002-01-01

    A new version of the circuit for the readout of the ATLAS straw tube detector, TRT [1], has been developed in a deep-submicron process. The DTMROC-S is fabricated in a commercial 0.25μm CMOS IBM technology, with a library hardened by layout techniques [2]. Compared to the previous version of the chip [3] done in a 0.8μm radiation-hard CMOS and despite of the features added for improving the robustness and testability of the circuit, the deep-submicron technology results in a much smaller chip...

  10. Performance of CMS silicon microstrip detectors with the APV6 readout chip

    Energy Technology Data Exchange (ETDEWEB)

    Meschini, M. E-mail: meschini@fi.infn.it; Albergo, S.; Angarano, M.; Azzi, P.; Babucci, E.; Bacchetta, N.; Bader, A.; Bagliesi, G.; Basti, A.; Biggeri, U.; Bilei, G.M.; Bisello, D.; Boemi, D.; Bosi, F.; Borrello, L.; Bozzi, C.; Braibant, S.; Breuker, H.; Bruzzi, M.; Buffini, A.; Busoni, S.; Candelori, A.; Caner, A.; Castaldi, R.; Castro, A.; Catacchini, E.; Checcucci, B.; Ciampolini, P.; Civinini, C.; Creanza, D.; D' Alessandro, R.; Da Rold, M.; Demaria, N.; De Palma, M.; Dell' Orso, R.; Marina, R. Della; Dutta, S.; Eklund, C.; Elliott-Peisert, A.; Feld, L.; Fiore, L.; Focardi, E.; French, M.; Freudenreich, K.; Fuertjes, A.; Giassi, A.; Giorgi, M.; Giraldo, A.; Glessing, B.; Gu, W.H.; Hall, G.; Hammerstrom, R.; Hebbeker, T.; Hrubec, J.; Huhtinen, M.; Kaminsky, A.; Karimaki, V.; Koenig, St.; Krammer, M.; Lariccia, P.; Lenzi, M.; Loreti, M.; Luebelsmeyer, K.; Lustermann, W.; Maettig, P.; Maggi, G.; Mannelli, M.; Mantovani, G.; Marchioro, A.; Mariotti, C.; Martignon, G.; McEvoy, B.; Messineo, A.; My, S.; Paccagnella, A.; Palla, F.; Pandoulas, D.; Papi, A.; Parrini, G.; Passeri, D.; Pieri, M.; Piperov, S.; Potenza, R.; Radicci, V.; Raffaelli, F.; Raymond, M.; Santocchia, A.; Schmitt, B.; Selvaggi, G.; Servoli, L.; Sguazzoni, G.; Siedling, R.; Silvestris, L.; Skog, K.; Starodumov, A.; Stavitski, I.; Stefanini, G.; Tempesta, P.; Tonelli, G.; Tricomi, A.; Tuuva, T.; Vannini, C.; Verdini, P.G.; Viertel, G.; Xie, Z.; Li Yahong; Watts, S.; Wittmer, B

    2000-06-01

    We present results obtained with full-size wedge silicon microstrip detectors bonded to APV6 (Raymond et al., Proceedings of the 3rd Workshop on Electronics for LHC Experiments, CERN/LHCC/97-60) readout chips. We used two identical modules, each consisting of two crystals bonded together. One module was irradiated with 1.7x10{sup 14} neutrons/cm{sup 2}. The detectors have been characterized both in the laboratory and by exposing them to a beam of minimum ionizing particles. The results obtained are a good starting point for the evaluation of the performance of the 'ensemble' detector plus readout chip in a version very similar to the final production one. We detected the signal from minimum ionizing particles with a signal-to-noise ratio ranging from 9.3 for the irradiated detector up to 20.5 for the non-irradiated detector, provided the parameters of the readout chips are carefully tuned.

  11. Influence of Highly Ionising Events on the CMS APV25 Readout Chip

    CERN Document Server

    Bainbridge, R J

    2004-01-01

    The Compact Muon Solenoid (CMS) experiment is one of four large high energy physics experiments presently being constructed for operation at the Large Hadron Collider (LHC) facility at CERN, Geneva. The motivation for the LHC and its experiments is the large range of new physics expected at the TeV energy scale. The CMS Silicon Strip Tracker (SST) will play a major role in all physics searches, providing precision tracking within a hostile radiation environment. The SST readout system is based on the APV25 front-end chip, of which 73000 are needed to fully instrument the sub-detector. It is essential for the SST readout system to be of the highest quality in order to maximise the physics performance of the sub-detector. Therefore, a production test station has been developed to screen wafers, each containing several hundred APV25 chips, prior to the integration of individual die into the final readout system. Several hundred wafers have already been screened and the number of chips identified to be fully func...

  12. High-resolution digital readout for uncooled smart IR focal plane arrays

    Science.gov (United States)

    Ringh, Ulf; Jansson, Christer; Liddiard, Kevin C.; Reinhold, Olaf

    1997-11-01

    This paper discusses the development of a high resolution digital readout from a 2D array of uncooled IR detectors. The need for a high resolution analogue to digital converter (ADC) is described and anew concept is presented. Experimental VLSI arrays have been designed using 0.8 micrometers CMOS technology and the pixel size is 40 micrometers X 40 micrometers . The concept has been demonstrated by using 320 parallel 16 bit ADCs in a 320 X 240 readout array with a frame rate of 30 Hz. High linearity and low noise is obtained and the power consumption for each ADC is 0.5 mW. The high digital resolution allows for digital offset correction off the local plane. A 16 X 16 version of the readout circuit has been postprocessed with uncooled IR detectors. These are currently under evaluation.

  13. Large drift tube arrays with external delay line readout

    International Nuclear Information System (INIS)

    The construction and performance of 2 meter long, 5 cm diameter, circular drift tubes made of 1 mm thick bakelite paper coated inside with conductive paint. The longitudinal coordinate is read-out with an external delay line system. The measured spatial resolution obtained from the drift time is close to 180 μm (one standard deviation). A system of 1100 tubes has been built for a muon experiment

  14. Test Beam Data Analysis for a Timepix3 Readout Chip

    CERN Document Server

    Williams, Morag

    2016-01-01

    The vertex and tracker detector R&D for a future linear collider (CLICdp) aims at developing new silicon sensor technologies. The EP-LCD group has been helping develop a novel pixel detector chip called the Timepix3 with a very thick active silicon layer (675 μm). This thick detector can be used to reconstruct the track incidence angle using the charge drift-time information. To evaluate the principle, test beam data was taken in October 2015 and June 2016 with the Timepix3 at various angles to the beam. The data was analysed to evaluate the sensors performance in calculating the track incidence angle. The device angle was determined using three methods: the first using the cluster size information, secondly using the timing information, and finally using a multivariate analysis technique. The timing method proved the principle of the Timepix3 track angle measurements but the MVA method was found to give much better results, especially for smaller angles, than the other two methods and requires fewer cal...

  15. Fabrication of cantilever arrays with tips for parallel optical readout

    NARCIS (Netherlands)

    Koelmans, W.W.; Peters, T.; Abelmann, L.; Elwenspoek, M.C.

    2010-01-01

    We report on progress in the fabrication of cantilever arrays with tips. The process features only one lithographic step for the definition of both the tips and cantilevers. The tips have a uniform height distribution and are placed by selfalignment on the cantilever. The arrays are fabricated for a

  16. Fast Fourier transform spectrometer readout for large arrays of microwave kinetic inductance detectors

    NARCIS (Netherlands)

    Yates, S. J. C.; Baryshev, A. M.; Baselmans, J. J. A.; Klein, B.; Guesten, R.

    2009-01-01

    Microwave kinetic inductance detectors have great potential for large, very sensitive detector arrays for use in, for example, submillimeter imaging. Being intrinsically readout in the frequency domain, they are particularly suited for frequency domain multiplexing allowing similar to 1000 s of devi

  17. Development of Micromegas-like gaseous detectors using a pixel readout chip as collecting anode

    International Nuclear Information System (INIS)

    This thesis reports on the fabrication and test of a new gaseous detector with a very large number of readout channels. This detector is intended for measuring the tracks of charged particles with an unprecedented sensitivity to single electrons of almost 100 %. It combines a metal grid for signal amplification called the Micromegas with a pixel readout chip as signal collecting anode and is dubbed GridPix. GridPix is a potential candidate for a sub-detector at a future electron linear collider (ILC) foreseen to work in parallel with the LHC around 2020--2030. The tracking capability of GridPix is best exploited if the Micromegas is integrated on the pixel chip. This integrated grid is called InGrid and is precisely fabricated by wafer post-processing. The various steps of the fabrication process and the measurements of its gain, energy resolution and ion back-flow property are reported in this document. Studies of the response of the complete detector formed by an InGrid and a TimePix pixel chip to X-rays and cosmic particles are also presented. In particular, the efficiency for detecting single electrons and the point resolution in the pixel plane are measured. Implications for a GridPix detector at ILC are discussed. (author)

  18. A Zinc Oxide Nanorod Ammonia Microsensor Integrated with a Readout Circuit on-a-Chip

    Directory of Open Access Journals (Sweden)

    Chyan-Chyi Wu

    2011-11-01

    Full Text Available A zinc oxide nanorod ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.35 mm complementary metal oxide semiconductor (CMOS process was investigated. The structure of the ammonia sensor is composed of a sensitive film and polysilicon electrodes. The ammonia sensor requires a post-process to etch the sacrificial layer, and to coat the sensitive film on the polysilicon electrodes. The sensitive film that is prepared by a hydrothermal method is made of zinc oxide. The sensor resistance changes when the sensitive film adsorbs or desorbs ammonia gas. The readout circuit is used to convert the sensor resistance into the voltage output. Experiments show that the ammonia sensor has a sensitivity of about 1.5 mV/ppm at room temperature.

  19. A zinc oxide nanorod ammonia microsensor integrated with a readout circuit on-a-chip.

    Science.gov (United States)

    Yang, Ming-Zhi; Dai, Ching-Liang; Wu, Chyan-Chyi

    2011-01-01

    A zinc oxide nanorod ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.35 μm complementary metal oxide semiconductor (CMOS) process was investigated. The structure of the ammonia sensor is composed of a sensitive film and polysilicon electrodes. The ammonia sensor requires a post-process to etch the sacrificial layer, and to coat the sensitive film on the polysilicon electrodes. The sensitive film that is prepared by a hydrothermal method is made of zinc oxide. The sensor resistance changes when the sensitive film adsorbs or desorbs ammonia gas. The readout circuit is used to convert the sensor resistance into the voltage output. Experiments show that the ammonia sensor has a sensitivity of about 1.5 mV/ppm at room temperature.

  20. A Zinc Oxide Nanorod Ammonia Microsensor Integrated with a Readout Circuit on-a-Chip

    Science.gov (United States)

    Yang, Ming-Zhi; Dai, Ching-Liang; Wu, Chyan-Chyi

    2011-01-01

    A zinc oxide nanorod ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.35 μm complementary metal oxide semiconductor (CMOS) process was investigated. The structure of the ammonia sensor is composed of a sensitive film and polysilicon electrodes. The ammonia sensor requires a post-process to etch the sacrificial layer, and to coat the sensitive film on the polysilicon electrodes. The sensitive film that is prepared by a hydrothermal method is made of zinc oxide. The sensor resistance changes when the sensitive film adsorbs or desorbs ammonia gas. The readout circuit is used to convert the sensor resistance into the voltage output. Experiments show that the ammonia sensor has a sensitivity of about 1.5 mV/ppm at room temperature. PMID:22247656

  1. Design and implementation of Gm-APD array readout integrated circuit for infrared 3D imaging

    Science.gov (United States)

    Zheng, Li-xia; Yang, Jun-hao; Liu, Zhao; Dong, Huai-peng; Wu, Jin; Sun, Wei-feng

    2013-09-01

    A single-photon detecting array of readout integrated circuit (ROIC) capable of infrared 3D imaging by photon detection and time-of-flight measurement is presented in this paper. The InGaAs avalanche photon diodes (APD) dynamic biased under Geiger operation mode by gate controlled active quenching circuit (AQC) are used here. The time-of-flight is accurately measured by a high accurate time-to-digital converter (TDC) integrated in the ROIC. For 3D imaging, frame rate controlling technique is utilized to the pixel's detection, so that the APD related to each pixel should be controlled by individual AQC to sense and quench the avalanche current, providing a digital CMOS-compatible voltage pulse. After each first sense, the detector is reset to wait for next frame operation. We employ counters of a two-segmental coarse-fine architecture, where the coarse conversion is achieved by a 10-bit pseudo-random linear feedback shift register (LFSR) in each pixel and a 3-bit fine conversion is realized by a ring delay line shared by all pixels. The reference clock driving the LFSR counter can be generated within the ring delay line Oscillator or provided by an external clock source. The circuit is designed and implemented by CSMC 0.5μm standard CMOS technology and the total chip area is around 2mm×2mm for 8×8 format ROIC with 150μm pixel pitch. The simulation results indicate that the relative time resolution of the proposed ROIC can achieve less than 1ns, and the preliminary test results show that the circuit function is correct.

  2. LHCb - SALT, a dedicated readout chip for strip detectors in the LHCb Upgrade experiment

    CERN Multimedia

    Swientek, Krzysztof Piotr

    2015-01-01

    Silicon strip detectors in the upgraded Tracker of LHCb experiment will require a new readout 128-channel ASIC called SALT. It will extract and digitise analogue signals from the sensor, perform digital processing and transmit serial output data. SALT is designed in CMOS 130 nm process and uses a novel architecture comprising of analogue front-end and ultra-low power ($<$0.5 mW) fast (40 MSps) sampling 6-bit ADC in each channel. A prototype of first 8-channel version of SALT chip, comprising all important functionalities, was submitted. Its design and possibly first tests results will be presented.

  3. Improved Circuits with Capacitive Feedback for Readout Resistive Sensor Arrays

    Directory of Open Access Journals (Sweden)

    Óscar Oballe-Peinado

    2016-01-01

    Full Text Available One of the most suitable ways of distributing a resistive sensor array for reading is an array with M rows and N columns. This allows reduced wiring and a certain degree of parallelism in the implementation, although it also introduces crosstalk effects. Several types of circuits can carry out the analogue-digital conversion of this type of sensors. This article focuses on the use of operational amplifiers with capacitive feedback and FPGAs for this task. Specifically, modifications of a previously reported circuit are proposed to reduce the errors due to the non-idealities of the amplifiers and the I/O drivers of the FPGA. Moreover, calibration algorithms are derived from the analysis of the proposed circuitry to reduce the crosstalk error and improve the accuracy. Finally, the performances of the proposals is evaluated experimentally on an array of resistors and for different ranges.

  4. Improved Circuits with Capacitive Feedback for Readout Resistive Sensor Arrays.

    Science.gov (United States)

    Oballe-Peinado, Óscar; Vidal-Verdú, Fernando; Sánchez-Durán, José A; Castellanos-Ramos, Julián; Hidalgo-López, José A

    2016-01-01

    One of the most suitable ways of distributing a resistive sensor array for reading is an array with M rows and N columns. This allows reduced wiring and a certain degree of parallelism in the implementation, although it also introduces crosstalk effects. Several types of circuits can carry out the analogue-digital conversion of this type of sensors. This article focuses on the use of operational amplifiers with capacitive feedback and FPGAs for this task. Specifically, modifications of a previously reported circuit are proposed to reduce the errors due to the non-idealities of the amplifiers and the I/O drivers of the FPGA. Moreover, calibration algorithms are derived from the analysis of the proposed circuitry to reduce the crosstalk error and improve the accuracy. Finally, the performances of the proposals is evaluated experimentally on an array of resistors and for different ranges. PMID:26821024

  5. Cool Timepix – Electronic noise of the Timepix readout chip down to −125 °C

    Energy Technology Data Exchange (ETDEWEB)

    Schön, R., E-mail: rolfs@nikhef.nl; Alfonsi, M.; Bakel, N. van; Beuzekom, M. van; Koffeman, E.

    2015-01-21

    The Timepix readout chip with its 65k pixels on a sensitive area of 14 mm×14 mm provides a fine spatial resolution for particle tracking or medical imaging. We explore the operation of Timepix in a dual-phase xenon environment (around −110 °C). Used in dual-phase xenon time projection chambers, e.g. for dark matter search experiments, the readout must have a sufficiently low detection limit for small energy deposits. We measured the electronic pixel noise of three bare Timepix chips. For the first time Timepix readout chips were cooled to temperatures as low as −125 °C. In this work, we present the results of analysing noise transition curves recorded while applying a well-defined charge to the pixel's input. The electronic noise reduces to an average of 99e{sup −}, a reduction of 23% compared to operation at room temperature.

  6. A Full Parallel Event Driven Readout Technique for Area Array SPAD FLIM Image Sensors

    Directory of Open Access Journals (Sweden)

    Kaiming Nie

    2016-01-01

    Full Text Available This paper presents a full parallel event driven readout method which is implemented in an area array single-photon avalanche diode (SPAD image sensor for high-speed fluorescence lifetime imaging microscopy (FLIM. The sensor only records and reads out effective time and position information by adopting full parallel event driven readout method, aiming at reducing the amount of data. The image sensor includes four 8 × 8 pixel arrays. In each array, four time-to-digital converters (TDCs are used to quantize the time of photons’ arrival, and two address record modules are used to record the column and row information. In this work, Monte Carlo simulations were performed in Matlab in terms of the pile-up effect induced by the readout method. The sensor’s resolution is 16 × 16. The time resolution of TDCs is 97.6 ps and the quantization range is 100 ns. The readout frame rate is 10 Mfps, and the maximum imaging frame rate is 100 fps. The chip’s output bandwidth is 720 MHz with an average power of 15 mW. The lifetime resolvability range is 5–20 ns, and the average error of estimated fluorescence lifetimes is below 1% by employing CMM to estimate lifetimes.

  7. Multiplexed Readout for 1000-pixel Arrays of Microwave Kinetic Inductance Detectors

    CERN Document Server

    van Rantwijk, Joris; van Loon, Dennis; Yates, Stephen; Baryshev, Andrey; Baselmans, Jochem

    2015-01-01

    Microwave Kinetic Inductance Detectors (MKIDs) are the most attractive radiation detectors for far-infrared and sub-mm astronomy: They combine ultimate sensitivity with the possibility to create very large detector arrays, in excess of 10 000 pixels. This is possible by reading-out the arrays using RF frequency division multiplexing, which allows multiplexing ratios in excess of 1000 pixels per readout line. We describe a novel readout system for large arrays of MKIDs, operating in a 2 GHz band in the 4-8 GHz range. The readout, which is a combination of a digital front- and back-end and an analog up- and down-converter system, can read out up to 4000 detectors simultaneously with 1 kHz datarate. The system achieves a readout noise power spectral density of -98 dBc/Hz while reading 1000 carriers simultaneously, which scales linear with the number of carriers. We demonstrate that 4000 state-of-the-art Aluminium-NbTiN MKIDs can be read out without deteriorating their intrinsic performance.

  8. Electrical-contact-free readout of the response of superconductive bolometer arrays using thermal cross talk.

    Science.gov (United States)

    Bozbey, Ali; Fardmanesh, Mehdi; Schubert, Juergen; Banzet, Marko

    2006-10-01

    We utilized and investigated the unique dependence of the magnitude and phase of the response on thermal cross talk between bolometer pixels in an array to measure the response of the devices through fewer monitoring devices. We show the feasibility of the proposed readout technique by use of two source pixels in an array, as the image-mapping devices, and one optically shielded pixel as the readout device. While the sensing pixels were electrical-contact free, the readout device was current biased in 4-probe current-bias configuration. Both the phase and the magnitude of the response due to the cross talk in the array were found to be strongly dependent on the modulation frequency and the distance between the sensing and the readout pixels. A series of measurements were designed to extract the response of each single-sensing pixel. By combining the measured data, the response of individual pixels could be extracted through the interpolation of the mapped responses. PMID:16983408

  9. An exothermic chip for point-of-care testing using a forehead thermometer as a readout.

    Science.gov (United States)

    Gao, Bingbing; Liu, Hong; Gu, Zhongze

    2016-02-01

    We report an exothermic chip for quantitative point-of-care testing using a forehead thermometer as a readout. The chip has a capillary channel that directs an aqueous sample into an exothermic reservoir. NaOH powders are preloaded in the reservoir as the exothermic reagent. At the inlet of the capillary channel, a microvalve is fabricated using an aptamer-modified hydrogel which is responsive to a specific analyte. When the aqueous sample comes in contact with the hydrogel valve, the hydrogel shrinks due to the selective analyte-hydrogel interaction. The volume reduction of the hydrogel increases the capillary flow rate, and thus increases the heat produced by NaOH dissolution. A forehead thermometer is used to measure the temperature increment which is correlated with the analyte concentration. Using this method, heavy metal ions (Hg(2+) and Pb(2+)) in different real samples are quantitatively analyzed. PMID:26726852

  10. Front-end multi-channel PMT-associated readout chip for hodoscope application

    International Nuclear Information System (INIS)

    For developing a prompt gamma imaging system, we have designed a 16-channel readout chip in a BiCMOS process to be associated with multi-anode photomultipliers (MaPMTs). Each channel has one current input and two separated outputs. The input has very low impedance to minimize electrical crosstalk and effects of capacitances. The two outputs serve to respectively detect signal event and quantify signal charge. The channel architecture is a current-mode one, employing a current conveyor to drive both a buffered current comparator and a charge-sensitive amplifier (CSA). The current conveyor is built with super-common-base (SCB) transistor structures to obtain input impedance in the order of a few ohms. Circuit design with the use of bipolar transistor components also improves frequency and noise performances. The chip has been tested and the evaluated characteristics meet the system requirements.

  11. Analyses of test beam data for the ATLAS upgrade readout chip (ABC130)

    Energy Technology Data Exchange (ETDEWEB)

    Peschke, Richard [DESY, Hamburg (Germany); Collaboration: ATLAS-Collaboration

    2015-07-01

    As part of the ATLAS phase II upgrade it is planned to replace the current tracker with an all silicon tracker. The outer part of the new tracker will consist of silicon strip detectors. For the readout of the strip detector a new Analog to Binary Converter chip (ABC130) was designed. The chip is processed in the 130 nm technology. In laboratory measurements the preamplifier of the new ABC130 showed a significant lower gain than expected. From the measurements in the laboratory it was not possible to distinguish if the malfunction is in the preamplifier or in the test circuit. Therefore an unbiased test was mandatory. Among other measurements, one was a test beam campaign at the Stanford Linear Accelerator Collider (SLAC). The result of measurement is shown in the presentation.

  12. Readout electronics for the Wide Field of view Cherenkov/Fluorescence Telescope Array

    Science.gov (United States)

    Zhang, J.; Zhang, S.; Zhang, Y.; Zhou, R.; Bai, L.; Zhang, J.; Huang, J.; Yang, C.; Cao, Z.

    2015-08-01

    The aim of the Large High Altitude Air Shower Observatory (LHAASO), supported by IHEP of the Chinese Academy of Sciences, is a multipurpose project with a complex detectors array for high energy gamma ray and cosmic ray detection. The Wide Field of view Cherenkov Telescope Array (WFCTA), as one of the components of the LHAASO project, aim to tag each primary particle that causes an air shower. The WFCTA is a portable telescope array used to detect cosmic ray spectra. The design of the readout electronics of the WFCTA is described in this paper Sixteen photomultiplier tubes (PMTs), together with their readout electronics are integrated into a single sub-cluster. To maintain good resolution and linearity over a wide dynamic range, a dual-gain amplification configuration on an analog board is used The digital board contains two 16channel 14-bit, 50 Msps analog-to-digital converters (ADC) and its power consumption, noise level, and relative deviation are all tested.

  13. An inverter-based capacitive trans-impedance amplifier readout with offset cancellation and temporal noise reduction for IR focal plane array

    Science.gov (United States)

    Chen, Hsin-Han; Hsieh, Chih-Cheng

    2013-09-01

    This paper presents a readout integrated circuit (ROIC) with inverter-based capacitive trans-impedance amplifier (CTIA) and pseudo-multiple sampling technique for infrared focal plane array (IRFPA). The proposed inverter-based CTIA with a coupling capacitor [1], executing auto-zeroing technique to cancel out the varied offset voltage from process variation, is used to substitute differential amplifier in conventional CTIA. The tunable detector bias is applied from a global external bias before exposure. This scheme not only retains stable detector bias voltage and signal injection efficiency, but also reduces the pixel area as well. Pseudo-multiple sampling technique [2] is adopted to reduce the temporal noise of readout circuit. The noise reduction performance is comparable to the conventional multiple sampling operation without need of longer readout time proportional to the number of samples. A CMOS image sensor chip with 55×65 pixel array has been fabricated in 0.18um CMOS technology. It achieves a 12um×12um pixel size, a frame rate of 72 fps, a power-per-pixel of 0.66uW/pixel, and a readout temporal noise of 1.06mVrms (16 times of pseudo-multiple sampling), respectively.

  14. Superconducting bolometer array with SQUID readout for submillimetre wavelength detection

    Energy Technology Data Exchange (ETDEWEB)

    May, T [Ruhr-Universitaet Bochum, Astronomisches Institut, Universitaetsstr. 150, D-44780 Bochum (Germany); Zakosarenko, V [Institute for Physical High Technology (IPHT), Winzerlaer Str. 10, D-07752 Jena (Germany); Boucher, R [Institute for Physical High Technology (IPHT), Winzerlaer Str. 10, D-07752 Jena (Germany); Kreysa, E [Max-Planck Institute for Radioastronomy, Bonn (Germany); Meyer, H-G [Institute for Physical High Technology (IPHT), Winzerlaer Str. 10, D-07752 Jena (Germany)

    2003-12-01

    We have tested a fully microfabricated superconducting bolometer array for astrophysical observations at submillimetre wavelengths. The system is cooled by a {sup 3}He sorption refrigerator operating in a pumped {sup 4}He cryostat. The transition edge bolometer uses a bilayer of molybdenum and a gold-palladium alloy with a transition temperature of around 500 mK as the thermometer. The bolometer is voltage biased, and the current is measured by a superconducting quantum interference device (SQUID) ammeter.

  15. Superconducting bolometer array with SQUID readout for submillimetre wavelength detection

    International Nuclear Information System (INIS)

    We have tested a fully microfabricated superconducting bolometer array for astrophysical observations at submillimetre wavelengths. The system is cooled by a 3He sorption refrigerator operating in a pumped 4He cryostat. The transition edge bolometer uses a bilayer of molybdenum and a gold-palladium alloy with a transition temperature of around 500 mK as the thermometer. The bolometer is voltage biased, and the current is measured by a superconducting quantum interference device (SQUID) ammeter

  16. Code-division-multiplexed readout of large arrays of TES microcalorimeters

    Science.gov (United States)

    Morgan, K. M.; Alpert, B. K.; Bennett, D. A.; Denison, E. V.; Doriese, W. B.; Fowler, J. W.; Gard, J. D.; Hilton, G. C.; Irwin, K. D.; Joe, Y. I.; O'Neil, G. C.; Reintsema, C. D.; Schmidt, D. R.; Ullom, J. N.; Swetz, D. S.

    2016-09-01

    Code-division multiplexing (CDM) offers a path to reading out large arrays of transition edge sensor (TES) X-ray microcalorimeters with excellent energy and timing resolution. We demonstrate the readout of X-ray TESs with a 32-channel flux-summed code-division multiplexing circuit based on superconducting quantum interference device (SQUID) amplifiers. The best detector has energy resolution of 2.28 ± 0.12 eV FWHM at 5.9 keV and the array has mean energy resolution of 2.77 ± 0.02 eV over 30 working sensors. The readout channels are sampled sequentially at 160 ns/row, for an effective sampling rate of 5.12 μs/channel. The SQUID amplifiers have a measured flux noise of 0.17 μΦ0/√Hz (non-multiplexed, referred to the first stage SQUID). The multiplexed noise level and signal slew rate are sufficient to allow readout of more than 40 pixels per column, making CDM compatible with requirements outlined for future space missions. Additionally, because the modulated data from the 32 SQUID readout channels provide information on each X-ray event at the row rate, our CDM architecture allows determination of the arrival time of an X-ray event to within 275 ns FWHM with potential benefits in experiments that require detection of near-coincident events.

  17. Multiplexed readout of MMC detector arrays using non-hysteretic rf-SQUIDs

    CERN Document Server

    Kempf, S; Gastaldo, L; Fleischmann, A; Enss, C

    2013-01-01

    Metallic magnetic calorimeters (MMCs) are widely used for various experiments in fields ranging from atomic and nuclear physics to x-ray spectroscopy, laboratory astrophysics or material science. Whereas in previous experiments single pixel detectors or small arrays have been used, for future applications large arrays are needed. Therefore, suitable multiplexing techniques for MMC arrays are currently under development. A promising approach for the readout of large arrays is the microwave SQUID multiplexer that operates in the frequency domain and that employs non-hysteretic rf-SQUIDs to transduce the detector signals into a frequency shift of high $Q$ resonators which can be monitored by using standard microwave measurement techniques. In this paper we discuss the design and the expected performance of a recently developed and fabricated 64 pixel detector array with integrated microwave SQUID multiplexer. First experimental data were obtained characterizing dc-SQUIDs with virtually identical washer design.

  18. Noise of short-time integrators for readout of uncooled infrared bolometer arrays

    OpenAIRE

    D. Würfel; D. Weiler; B. J. Hosticka; Vogt, H.

    2010-01-01

    As state-of-the-art readout circuits short-time integrators in Far Infrared (FIR) uncooled bolometer arrays are commonly used. This paper compares the transfer functions of an ideal continuous-time integrator with that of a real integrator with focus an OTA parameters and noise analysis. Beside the noise sources at the non-inverting input of the OTA special care has to be taken to account for capacitances at the inverting input. The Noise Equivalent Temperature Difference (N...

  19. A Low Mass On-Chip Readout Scheme for Double-Sided Silicon Strip Detectors

    Energy Technology Data Exchange (ETDEWEB)

    Irmler, C., E-mail: christian.irmler@oeaw.ac.at [HEPHY Vienna – Institute of High Energy Physics of the Austrian Academy of Sciences, Nikolsdorfer Gasse 18, A-1050 Vienna (Austria); Bergauer, T.; Frankenberger, A.; Friedl, M.; Gfall, I. [HEPHY Vienna – Institute of High Energy Physics of the Austrian Academy of Sciences, Nikolsdorfer Gasse 18, A-1050 Vienna (Austria); Higuchi, T. [University of Tokyo, Kavli Institute for Physics and Mathematics of the Universe, 5-1-5 Kashiwanoha, Kashiwa, Chiba 277-8583 (Japan); Ishikawa, A. [Tohoku University, Department of Physics, Aoba Aramaki Aoba-ku, Sendai 980-8578 (Japan); Joo, C. [Seoul National University, High Energy Physics Laboratory, 25-107 Shinlim-dong, Kwanak-gu, Seoul 151-742 (Korea, Republic of); Kah, D.H.; Kang, K.H. [Kyungpook National University, Department of Physics, 1370 Sankyuk Dong, Buk Gu, Daegu 702-701 (Korea, Republic of); Rao, K.K. [Tata Institute of Fundamental Research, Experimental High Energy Physics Group, Homi Bhabha Road, Mumbai 400 005 (India); Kato, E. [Tohoku University, Department of Physics, Aoba Aramaki Aoba-ku, Sendai 980-8578 (Japan); Mohanty, G.B. [Tata Institute of Fundamental Research, Experimental High Energy Physics Group, Homi Bhabha Road, Mumbai 400 005 (India); Negishi, K. [Tohoku University, Department of Physics, Aoba Aramaki Aoba-ku, Sendai 980-8578 (Japan); Onuki, Y.; Shimizu, N. [University of Tokyo, Department of Physics, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-0033 (Japan); Tsuboyama, T. [KEK, 1-1 Oho, Tsukuba, Ibaraki 305-0801 (Japan); Valentan, M. [HEPHY Vienna – Institute of High Energy Physics of the Austrian Academy of Sciences, Nikolsdorfer Gasse 18, A-1050 Vienna (Austria)

    2013-12-21

    B-factories like the KEKB in Tsukuba, Japan, operate at relatively low energies and thus require detectors with very low material budget in order to minimize multiple scattering. On the other hand, front-end chips with short shaping time like the APV25 have to be placed as close to the sensor strips as possible to reduce the capacitive load, which mainly determines the noise figure. In order to achieve both – minimal material budget and low noise – we developed a readout scheme for double-sided silicon detectors, where the APV25 chips are placed on a flexible circuit, which is glued onto the top side of the sensor. The bottom-side strips are connected by two flexible circuits, which are bent around the edge of the sensor. This so-called “Origami” design will be utilized to build the Silicon Vertex Detector of the Belle II experiment, which will consist of four layers made from ladders with up to five double-sided silicon strip sensors in a row. Each ladder will be supported by two ribs made of a carbon fiber and Airex foam core sandwich. The heat dissipated by the front-end chips will be removed by a highly efficient two-phase CO{sub 2} system. Thanks to the Origami concept, all APV25 chips are aligned in a row and thus can be cooled by a single thin cooling pipe per ladder. We present the concept and the assembly procedure of the Origami chip-on-sensor modules.

  20. A small-area low-power current readout circuit using two-stage conversion method for 64-channel CNT sensor arrays.

    Science.gov (United States)

    Shin, Young-San; Lee, Seongsoo; Wee, Jae-Kyung; Song, Inchae

    2013-06-01

    In this paper, a small-area and low-power current readout circuit with a novel two-stage conversion method is presented for 64-channel CNT (carbon nanotube) sensor arrays. In the first stage, current of each CNT sensor is amplified by 64 active input current mirrors (AICMs). In the second stage, the amplified current is converted to a voltage level through the shared variable gain amplifier (S-VGA). Then the S-VGA output is digitalized by successive approximation register analog-to-digital converter (SAR-ADC). The proposed readout circuit significantly reduces chip area and power consumption, since VGA is shared over 64 channels and passive elements are used only in S-VGA. Fabricated chip area is 0.173 mm(2) in 0.13 μm CMOS technology. Measured power consumption and linearity error are 73.06 μW and 5.3%, respectively, at the input current range of 10 nA-10 μA and conversion rate of 640 samples/s. A prototype real-time CNT sensor system was implemented using the fabricated readout circuit, and successfully detected alcohol reaction. PMID:23853327

  1. Frequency multiplexed superconducting quantum interference device readout of large bolometer arrays for cosmic microwave background measurements.

    Science.gov (United States)

    Dobbs, M A; Lueker, M; Aird, K A; Bender, A N; Benson, B A; Bleem, L E; Carlstrom, J E; Chang, C L; Cho, H-M; Clarke, J; Crawford, T M; Crites, A T; Flanigan, D I; de Haan, T; George, E M; Halverson, N W; Holzapfel, W L; Hrubes, J D; Johnson, B R; Joseph, J; Keisler, R; Kennedy, J; Kermish, Z; Lanting, T M; Lee, A T; Leitch, E M; Luong-Van, D; McMahon, J J; Mehl, J; Meyer, S S; Montroy, T E; Padin, S; Plagge, T; Pryke, C; Richards, P L; Ruhl, J E; Schaffer, K K; Schwan, D; Shirokoff, E; Spieler, H G; Staniszewski, Z; Stark, A A; Vanderlinde, K; Vieira, J D; Vu, C; Westbrook, B; Williamson, R

    2012-07-01

    A technological milestone for experiments employing transition edge sensor bolometers operating at sub-Kelvin temperature is the deployment of detector arrays with 100s-1000s of bolometers. One key technology for such arrays is readout multiplexing: the ability to read out many sensors simultaneously on the same set of wires. This paper describes a frequency-domain multiplexed readout system which has been developed for and deployed on the APEX-SZ and South Pole Telescope millimeter wavelength receivers. In this system, the detector array is divided into modules of seven detectors, and each bolometer within the module is biased with a unique ∼MHz sinusoidal carrier such that the individual bolometer signals are well separated in frequency space. The currents from all bolometers in a module are summed together and pre-amplified with superconducting quantum interference devices operating at 4 K. Room temperature electronics demodulate the carriers to recover the bolometer signals, which are digitized separately and stored to disk. This readout system contributes little noise relative to the detectors themselves, is remarkably insensitive to unwanted microphonic excitations, and provides a technology pathway to multiplexing larger numbers of sensors. PMID:22852677

  2. Test Beam Campaigns for the CMS Phase I Upgrade Pixel Readout Chip

    CERN Document Server

    Spannagel, Simon

    2014-01-01

    The current CMS silicon pixel detector as the innermost component of the CMS experiment is performing well at LHC design luminosity, but would be subject to severe inefficiencies at LHC peak luminosities of 2x10e34 cm^-2 s^-1. Therefore, an upgrade of the CMS pixel detector is planned, including a new readout chip. The chip design comprises additional on-chip buffer cells as well as high-speed data links and low-threshold comparators in the pixel cells. With these changes the upgraded pixel detector will be able to maintain or even improve the efficiency of the current detector at the increased requirements imposed by high luminosities and pile-up. The effects of these design changes on e.g. position resolution and charge collection efficiency were studied in detail using a precision tracking telescope at the DESY test beam facilities. The high telescope track resolution enables precise studies of tracking efficiency, charge sharing and collection even within single pixel cells of the device under test. This ...

  3. An addressable cell array for a platform of biosensor chips

    Science.gov (United States)

    Yang, Seungkyoung; Choi, Soo-hee; Jung, Moon Youn; Song, Kibong; Park, Jeong Won

    2013-05-01

    In order to detect interested matters in fields, various lab-on-a-chips where chemical, physical, or biological sensors are loaded have been developed. eNOSE can be a representative example among them. Because animals can sense 300~1000 different chemicals by olfactory system - smell -, the olfactory system has been spotlighted as new materials in the field of sensing. Those investigations, however, are usually focused on how to detect signals from the olfactory neurons or receptors loaded on chips and enhance sensing efficacy of chips. Therefore, almost of those chips are designed for only one material sensing. Multi-sensing using multi-channels will be needed when the olfactory systems are adopted well on chips. For multiple sensing, we developed an addressable cell array. The chip has 38 cell-chambers arranged in a circle shape and different cell types of thirty eight can be allocated with specific addresses on the chip without any complex valve system. In order to confirm the cell addressing, we loaded EGFP-transfected and empty vector-transfected HEK293a cells into inlets of the cell array in a planned address and those cells were positioned into each chamber by brief aspiration. The arrayed cells were confirmed as a specific pattern through EGFP and nuclei staining. This cell array which can generate address of sensor materials like cells with their own specification is expected to be applied to a platform for a biosensor chip at various sensing fields.

  4. Analysis of high frame rate readout circuit for near-infrared InGaAs focal plane array

    Science.gov (United States)

    Huang, Zhangcheng; Chen, Yu; Huang, Songlei; Fang, Jiaxiong

    2013-09-01

    High frame rate imaging for applications such as meteorological forecast, motion target tracking require high-speed Read-Out Integrated Circuit (ROIC). In order to achieve 10 KHz of frame rate, this paper analyzes the bandwidth of Capacitive-feedback Trans-Impedance Amplifier (CTIA) in ROIC which is the dominant bandwidth-limiting node when interfaced with large InGaAs detector pixel capacitance of about 10pF. A small-signal model is presented to study the relationship between integration capacitance, detector capacitance, transconductance and CTIA bandwidth. Calculation and simulation results show explicitly how the series resistance at the interface restricts the frame rate of Focal Plane Arrays (FPA). In order to achieve low-noise performance at a high frame rate, this paper describes an optimal solution in ROIC design. A prototype ROIC chip (DL7) has been fabricated with 0.5-μm mixed signal CMOS process and interfaced with InGaAs detector arrays. Test results show that frame rate is above 10 KHz and ROIC noise is around 270 e-, near identical to the design value.

  5. SALT, a dedicated readout chip for high precision tracking silicon strip detectors at the LHCb Upgrade

    Science.gov (United States)

    Bugiel, Sz.; Dasgupta, R.; Firlej, M.; Fiutowski, T.; Idzik, M.; Kuczynska, M.; Moron, J.; Swientek, K.; Szumlak, T.

    2016-02-01

    The Upstream Tracker (UT) silicon strip detector, one of the central parts of the tracker system of the modernised LHCb experiment, will use a new 128-channel readout ASIC called SALT. It will extract and digitise analogue signals from the UT sensors, perform digital signal processing and transmit a serial output data. The SALT is being designed in CMOS 130 nm process and uses a novel architecture comprising of analog front-end and fast (40 MSps) ultra-low power (<0.5 mW) 6-bit ADC in each channel. The prototype ASICs of important functional blocks, like analogue front-end, 6-bit SAR ADC, PLL, and DLL, were designed, fabricated and tested. A prototype of an 8-channel version of the SALT chip, comprising all important functionalities was also designed and fabricated. The architecture and design of the SALT, together with the selected preliminary tests results, are presented.

  6. The FE-I4 Pixel Readout Chip and the IBL Module

    Energy Technology Data Exchange (ETDEWEB)

    Barbero, Marlon; Arutinov, David; Backhaus, Malte; Fang, Xiao-Chao; Gonella, Laura; Hemperek, Tomasz; Karagounis, Michael; Hans, Kruger; Kruth, Andre; Wermes, Norbert; /Bonn U.; Breugnon, Patrick; Fougeron, Denis; Gensolen, Fabrice; Menouni, Mohsine; Rozanov, Alexander; /Marseille, CPPM; Beccherle, Roberto; Darbo, Giovanni; /INFN, Genoa; Caminada, Lea; Dube, Sourabh; Fleury, Julien; Gnani, Dario; /LBL, Berkeley /NIKHEF, Amsterdam /Gottingen U. /SLAC

    2012-05-01

    FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the 'Insertable B-Layer' project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on test results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept.

  7. Prototype ATLAS IBL Modules using the FE-I4A Front-End Readout Chip

    CERN Document Server

    Albert, J; Alimonti, Gianluca; Allport, Phil; Altenheiner, Silke; Ancu, Lucian; Andreazza, Attilio; Arguin, Jean-Francois; Arutinov, David; Backhaus, Malte; Bagolini, Alvise; Ballansat, Jacques; Barbero, Marlon; Barbier, Gérard; Bates, Richard; Battistin, Michele; Baudin, Patrick; Beau, Tristan; Beccherle, Roberto; Beck, Hans Peter; Benoit, Mathieu; Bensinger, Jim; Bomben, Marco; Borri, Marcello; Boscardin, Maurizio; Botelho Direito, Jose Antonio; Bousson, Nicolas; Boyd, George Russell Jr; Breugnon, Patrick; Bruni, Graziano; Bruschi, Marco; Buchholz, Peter; Buttar, Craig; Cadoux, Franck; Calderini, Giovanni; Caminada, Leah; Capeans, Mar; Casse, Gianluigi; Catinaccio, Andrea; Cavalli-Sforza, Matteo; Chauveau, Jacques; Chu, Ming-Lee; Ciapetti, Marco; Cindro, Vladimir; Citterio, Mauro; Clark, Allan; Cobal, Marina; Coelli, Simone; Colijn, Auke-Pieter; Colin, Daly; Collot, Johann; Crespo-Lopez, Olivier; Dalla Betta, Gian-Franco; Darbo, Giovanni; DaVia, Cinzia; David, Pierre-Yves; Debieux, Stéphane; Delebecque, Pierre; Devetak, Erik; DeWilde, Burton; Di Girolamo, Beniamino; Dinu, Nicoleta; Dittus, Fridolin; Diyakov, Denis; Djama, Fares; Dobos, Daniel Adam; Doonan, Kate; Dopke, Jens; Dorholt, Ole; Dube, Sourabh; Dushkin, Andrey; Dzahini, Daniel; Egorov, Kirill; Ehrmann, Oswin; Elldge, David; Elles, Sabine; Elsing, Markus; Eraud, Ludovic; Ereditato, Antonio; Eyring, Andreas; Falchieri, Davide; Falou, Aboud; Fang, Xiaochao; Fausten, Camille; Favre, Yannick; Ferrere, Didier; Fleta, Celeste; Fleury, Julien; Flick, Tobias; Forshaw, Dean; Fougeron, Denis; Fritzsch, Thomas; Gabrielli, Alessandro; Gaglione, Renaud; Gallrapp, Christian; Gan, K; Garcia-Sciveres, Maurice; Gariano, Giuseppe; Gastaldi, Thibaut; Gemme, Claudia; Gensolen, Fabrice; George, Matthias; Ghislain, Patrick; Giacomini, Gabriele; Gibson, Stephen; Giordani, Mario Paolo; Giugni, Danilo; Gjersdal, Håvard; Glitza, Karl Walter; Gnani, Dario; Godlewski, Jan; Gonella, Laura; Gorelov, Igor; Gorišek, Andrej; Gössling, Claus; Grancagnolo, Sergio; Gray, Heather; Gregor, Ingrid-Maria; Grenier, Philippe; Grinstein, Sebastian; Gromov, Vladimir; Grondin, Denis; Grosse-Knetter, Jörn; Hansen, Thor-Erik; Hansson, Per; Harb, Ali; Hartman, Neal; Hasi, Jasmine; Hegner, Franziska; Heim, Timon; Heinemann, Beate; Hemperek, Tomasz; Hessey, Nigel; Hetmánek, Martin; Hoeferkamp, Martin; Hostachy, Jean-Yves; Hügging, Fabian; Husi, Coralie; Iacobucci, Giuseppe; Idarraga, John; Ikegami, Yoichi; Janoška, Zdenko; Jansen, Jens; Jansen, Luc; Jensen, Frank; Jentzsch, Jennifer; Joseph, John; Kagan, Harris; Karagounis, Michael; Kass, Richard; Kenney, Christopher J; Kersten, Susanne; Kind, Peter; Klingenberg, Reiner; Kluit, Ruud; Kocian, Martin; Koffeman, Els; Kok, Angela; Korchak, Oleksandr; Korolkov, Ilya; Kostyukhin, Vadim; Krieger, Nina; Krüger, Hans; Kruth, Andre; Kugel, Andreas; Kuykendall, William; La Rosa, Alessandro; Lai, Chung-Hang; Lantzsch, Kerstin; Laporte, Didier; Lapsien, Tobias; Lounis, abdenour; Lozano, Manuel; Lu, Yunpeng; Lubatti, Henry; Macchiolo, Anna; Mallik, Usha; Mandić, Igor; Marchand, Denis; Marchiori, Giovanni; Massol, Nicolas; Matthias, Wittgen; Mättig, Peter; Mekkaoui, Abderrazak; Menouni, Mohsine; Menu, Johann; Meroni, Chiara; Mesa, Javier; Micelli, Andrea; Michal, Sébastien; Miglioranzi, Silvia; Mikuž, Marko; Mitsui, Shingo; Monti, Mauro; Moore, J; Morettini, Paolo; Muenstermann, Daniel; Murray, Peyton; Nellist, Clara; Nelson, David J; Nessi, Marzio; Neumann, Manuel; Nisius, Richard; Nordberg, Markus; Nuiry, Francois-Xavier; Oppermann, Hermann; Oriunno, Marco; Padilla, Cristobal; Parker, Sherwood; Pellegrini, Giulio; Pelleriti, Gabriel; Pernegger, Heinz; Piacquadio, Nicola Giacinto; Picazio, Attilio; Pohl, David; Polini, Alessandro; Popule, Jiří; Portell Bueso, Xavier; Povoli, Marco; Puldon, David; Pylypchenko, Yuriy; Quadt, Arnulf; Quirion, David; Ragusa, Francesco; Rambure, Thibaut; Richards, Erik; Ristic, Branislav; Røhne, Ole; Rothermund, Mario; Rovani, Alessandro; Rozanov, Alexandre; Rubinskiy, Igor; Rudolph, Matthew Scott; Rummler, André; Ruscino, Ettore; Salek, David; Salzburger, Andreas; Sandaker, Heidi; Schipper, Jan-David; Schneider, Basil; Schorlemmer, Andre; Schroer, Nicolai; Schwemling, Philippe; Seidel, Sally; Seiden, Abraham; Šícho, Petr; Skubic, Patrick; Sloboda, Michal; Smith, D; Sood, Alex; Spencer, Edwin; Strang, Michael; Stugu, Bjarne; Stupak, John; Su, Dong; Takubo, Yosuke; Tassan, Jean; Teng, Ping-Kun; Terada, Susumu; Todorov, Theodore; Tomášek, Michal; Toms, Konstantin; Travaglini, Riccardo; Trischuk, William; Troncon, Clara; Troska, Georg; Tsiskaridze, Shota; Tsurin, Ilya; Tsybychev, Dmitri; Unno, Yoshinobu; Vacavant, Laurent; Verlaat, Bart; Vianello, Elisa; Vigeolas, Eric; von Kleist, Stephan; Vrba, Václav; Vuillermet, Raphaël; Wang, Rui; Watts, Stephen; Weber, Michele; Weber, Marteen; Weigell, Philipp; Weingarten, Jens; Welch, Steven David; Wenig, Siegfried; Wermes, Norbert; Wiese, Andreas; Wittig, Tobias; Yildizkaya, Tamer; Zeitnitz, Christian; Ziolkowski, Michal; Zivkovic, Vladimir; Zoccoli, Antonio; Zorzi, Nicola; Zwalinski, Lukasz

    2012-01-01

    The ATLAS Collaboration will upgrade its semiconductor pixel tracking detector with a new Insertable B-layer (IBL) between the existing pixel detector and the vacuum pipe of the Large Hadron Collider. The extreme operating conditions at this location have necessitated the development of new radiation hard pixel sensor technologies and a new front-end readout chip, called the FE-I4. Planar pixel sensors and 3D pixel sensors have been investigated to equip this new pixel layer, and prototype modules using the FE-I4A have been fabricated and characterized using 120 GeV pions at the CERN SPS and 4 GeV positrons at DESY, before and after module irradiation. Beam test results are presented, including charge collection efficiency, tracking efficiency and charge sharing.

  8. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    Claus, Richard; The ATLAS collaboration

    2015-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf thro...

  9. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    ATLAS CSC Collaboration; The ATLAS collaboration

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgrade during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfigurable Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the Advanced Telecommunication Computing Architecture (ATCA) platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chamber...

  10. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    Yildiz, Suleyman Cenk; The ATLAS collaboration

    2015-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfigurable Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the Advanced Telecommunication Computing Architecture (ATCA) platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambe...

  11. Cobalt Oxide Nanosheet and CNT Micro Carbon Monoxide Sensor Integrated with Readout Circuit on Chip

    Science.gov (United States)

    Dai, Ching-Liang; Chen, Yen-Chi; Wu, Chyan-Chyi; Kuo, Chin-Fu

    2010-01-01

    The study presents a micro carbon monoxide (CO) sensor integrated with a readout circuit-on-a-chip manufactured by the commercial 0.35 μm complementary metal oxide semiconductor (CMOS) process and a post-process. The sensing film of the sensor is a composite cobalt oxide nanosheet and carbon nanotube (CoOOH/CNT) film that is prepared by a precipitation-oxidation method. The structure of the CO sensor is composed of a polysilicon resistor and a sensing film. The sensor, which is of a resistive type, changes its resistance when the sensing film adsorbs or desorbs CO gas. The readout circuit is used to convert the sensor resistance into the voltage output. The post-processing of the sensor includes etching the sacrificial layers and coating the sensing film. The advantages of the sensor include room temperature operation, short response/recovery times and easy post-processing. Experimental results show that the sensitivity of the CO sensor is about 0.19 mV/ppm, and the response and recovery times are 23 s and 34 s for 200 ppm CO, respectively. PMID:22294897

  12. Cobalt Oxide Nanosheet and CNT Micro Carbon Monoxide Sensor Integrated with Readout Circuit on Chip

    Directory of Open Access Journals (Sweden)

    Ching-Liang Dai

    2010-03-01

    Full Text Available The study presents a micro carbon monoxide (CO sensor integrated with a readout circuit-on-a-chip manufactured by the commercial 0.35 μm complementary metal oxide semiconductor (CMOS process and a post-process. The sensing film of the sensor is a composite cobalt oxide nanosheet and carbon nanotube (CoOOH/CNT film that is prepared by a precipitation-oxidation method. The structure of the CO sensor is composed of a polysilicon resistor and a sensing film. The sensor, which is of a resistive type, changes its resistance when the sensing film adsorbs or desorbs CO gas. The readout circuit is used to convert the sensor resistance into the voltage output. The post-processing of the sensor includes etching the sacrificial layers and coating the sensing film. The advantages of the sensor include room temperature operation, short response/recovery times and easy post-processing. Experimental results show that the sensitivity of the CO sensor is about 0.19 mV/ppm, and the response and recovery times are 23 s and 34 s for 200 ppm CO, respectively.

  13. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    Claus, Richard; The ATLAS collaboration

    2015-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) back-end readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip Xilinx Zynq series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the Zynq for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf thr...

  14. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    Science.gov (United States)

    Claus, R.

    2016-07-01

    The ATLAS muon Cathode Strip Chamber (CSC) back-end readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip Xilinx Zynq series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the Zynq for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf through software waveform feature extraction to output 32 S-links. The full system was installed in Sept. 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning towards LHC Run 2.

  15. GEM400: A front-end chip based on capacitor-switch array for pixel-based GEM detector

    International Nuclear Information System (INIS)

    The upgrade of Beijing Synchrotron Radiation Facility (BSRF) needs two-dimensional position-sensitive detection equipment to improve the experimental performance. Gas Electron Multiplier (GEM) detector, in particular, pixel-based GEM detector has good application prospects in the domain of synchrotron radiation. The read-out of larger scale pixel-based GEM detector is difficult for the high density of the pixels (PAD for collecting electrons). In order to reduce the number of cables, this paper presents a read-out scheme for pixel-based GEM detector, which is based on System-in-Package technology and ASIC technology. We proposed a circuit structure based on capacitor switch array circuit, and design a chip GEM400, which is a 400 channels ASIC. The proposed circuit can achieve good stability and low power dissipation. The chip is implemented in a 0.35μm CMOS process. The basic functional circuitry in ths chip includes analog switch, analog buffer, voltage amplifier, bandgap and control logic block, and the layout of this chip takes 5mm × 5mm area. The simulation results show that the chip can allow the maximum amount of input charge 70pC on the condition of 100pF external integrator capacitor. Besides, the chip has good channel uniformity (INL is better than 0.1%) and lower power dissipation.

  16. Calibration Scheme for Large Kinetic Inductance Detector Arrays Based on Readout Frequency Response

    Science.gov (United States)

    Bisigello, L.; Yates, S. J. C.; Murugesan, V.; Baselmans, J. J. A.; Baryshev, A. M.

    2016-07-01

    Microwave kinetic inductance detector (MKID) provides a way to build large ground-based sub-mm instruments such as NIKA and A-MKID. For such instruments, therefore, it is important to understand and characterize the response to ensure good linearity and calibration over a wide dynamic range. We propose to use the MKID readout frequency response to determine the MKID responsivity to an input optical source power. A signal can be measured in a KID as a change in the phase of the readout signal with respect to the KID resonant circle. Fundamentally, this phase change is due to a shift in the KID resonance frequency, in turn due to a radiation induced change in the quasiparticle number in the superconducting resonator. We show that the shift in resonant frequency can be determined from the phase shift by using KID phase versus frequency dependence using a previously measured resonant frequency. Working in this calculated resonant frequency, we gain near linearity and constant calibration to a constant optical signal applied in a wide range of operating points on the resonance and readout powers. This calibration method has three particular advantages: first, it is fast enough to be used to calibrate large arrays, with pixel counts in the thousands of pixels; second, it is based on data that are already necessary to determine KID positions; third, it can be done without applying any optical source in front of the array.

  17. A substrate-free optical readout focal plane array with a heat sink structure

    Institute of Scientific and Technical Information of China (English)

    Liu Ruiwen; Kong Yanmei; Jiao Binbin; Li Zhigang; Shang Haiping; Lu Dike; Gao Chaoqun; Chen Dapeng; Zhang Qingchuan

    2013-01-01

    A substrate-free optical readout focal plane array (FPA) operating in 8-12 μm with a heat sink structure (HSS) was fabricated and its performance was tested.The temperature distribution of the FPA with an HSS investigated by using a commercial FLIR IR camera shows excellent uniformity.The thermal cross-talk effect existing in traditional substrate-free FPAs was eliminated effectively.The heat sink is fabricated successfully by electroplating copper,which provides high thermal capacity and high thermal conductivity,on the frame of substrate-free FPA.The FPA was tested in the optical-readout system,the results show that the response and NETD are 13.6 grey/K (F /# =0.8) and 588 mK,respectively.

  18. New CMOS readout circuit with background suppression and CDS for infrared focal plane array applications

    Institute of Scientific and Technical Information of China (English)

    LI Xin-yi; ZHAO Yi-qiang; YAO Su-ying

    2009-01-01

    A high injection, large dynamic range, stable detector bias, small area and low power consumption CMOS readout circuit with background current suppression and correlated double sampling (CDS) for a high-resolution infrared focal plane array applications is proposed. The detector bias error in this structure is less than 0.1 mV. The input resistance is ideally zero, which is important to obtain high injection efficiency. Unit-cell occupies 10 μm × 15 μm area and consumes less than 0.4 mW power. Charge storage capacity is 3 × 108 electrons. The function and performance of the proposed readout circuit have been verified by experimental results.

  19. Arrays of nucleic acid probes on biological chips

    Science.gov (United States)

    Chee, Mark; Cronin, Maureen T.; Fodor, Stephen P. A.; Huang, Xiaohua X.; Hubbell, Earl A.; Lipshutz, Robert J.; Lobban, Peter E.; Morris, MacDonald S.; Sheldon, Edward L.

    1998-11-17

    DNA chips containing arrays of oligonucleotide probes can be used to determine whether a target nucleic acid has a nucleotide sequence identical to or different from a specific reference sequence. The array of probes comprises probes exactly complementary to the reference sequence, as well as probes that differ by one or more bases from the exactly complementary probes.

  20. Radiation tolerance of the readout chip for the Phase I upgrade of the CMS pixel detector

    International Nuclear Information System (INIS)

    For the Phase I upgrade of the CMS pixel detector a new digital readout chip (ROC) has been developed. An important part of the design verification are irradiation studies to ensure sufficient radiation tolerance. The paper summarizes results of the irradiation studies on the final ROC design for the detector layers 2 – 4. Samples have been irradiated with 23 MeV protons to accumulate the expected lifetime dose of 0.5 MGy and up to 1.1 MGy to project the performance of the ROC for layer 1 of the detector. It could be shown that the design is sufficiently radiation tolerant and that all performance parameters stay within their specifications. Additionally, very high doses of up to 4.2 MGy have been tested to explore the limits of the current chip design on 250 nm CMOS technology. The study confirmed that samples irradiated up to the highest dose could be successfully operated with test pulses

  1. Characterization of edgeless pixel detectors coupled to Medipix2 readout chip

    Science.gov (United States)

    Kalliopuska, Juha; Tlustos, Lukas; Eränen, Simo; Virolainen, Tuula

    2011-08-01

    VTT has developed a straightforward and fast process to fabricate four-side buttable (edgeless) microstrip and pixel detectors on 6 in. (150 mm) wafers. The process relies on advanced ion implantation to activate the edges of the detector instead of using polysilicon. The article characterizes 150 μm thick n-on-n edgeless pixel detector prototypes with a dead layer at the edge below 1 μm. Electrical and radiation response characterization of 1.4×1.4 cm2 n-on-n edgeless detectors has been done by coupling them to the Medipix2 readout chips. The distance of the detector's physical edge from the pixels was either 20 or 50 μm. The leakage current of flip-chip bonded edgeless Medipix2 detector assembles were measured to be ˜90 nA/cm2 and no breakdown was observed below 110 V. Radiation response characterization includes X-ray tube and radiation source responses. The characterization results show that the detector's response at the pixels close to the physical edge of the detector depend dramatically on the pixel-to-edge distance.

  2. Tuning of Kilopixel Transition Edge Sensor Bolometer Arrays with a Digital Frequency Multiplexed Readout System

    CERN Document Server

    MacDermid, K; Aubin, F; Bissonnette, E; Dobbs, M; Hubmayr, J; Smecher, G; Warraich, S

    2009-01-01

    A digital frequency multiplexing (DfMUX) system has been developed and used to tune large arrays of transition edge sensor (TES) bolometers read out with SQUID arrays for mm-wavelength cosmology telescopes. The DfMUX system multiplexes the input bias voltages and output currents for several bolometers on a single set of cryogenic wires. Multiplexing reduces the heat load on the camera's sub-Kelvin cryogenic detector stage. In this paper we describe the algorithms and software used to set up and optimize the operation of the bolometric camera. The algorithms are implemented on soft processors embedded within FPGA devices operating on each backend readout board. The result is a fully parallelized implementation for which the setup time is independent of the array size.

  3. Rydberg atom mediated non-destructive readout of collective rotational states in polar molecule arrays

    CERN Document Server

    Kuznetsova, Elena; Sadeghpour, H R; Yelin, Susanne F

    2016-01-01

    We analyze in detail the possibility to use charge-dipole interaction between a single polar molecule or a 1D molecular array and a single Rydberg atom to read out rotational populations. The change in the Rydberg electron energy is conditioned on the rotational state of the polar molecules, allowing for realization of a CNOT quantum gate between the molecules and the atom. Subsequent readout of the atomic fluorescence results in a non-destructive measurement of the rotational state. We study the interaction between a 1D array of polar molecules and an array or a cloud of atoms in a Rydberg superatom (blockaded) state and calculate the resolved energy shifts of Rb(60s) with KRb and RbYb molecules, with N=1, 3, 5 molecules. We show that collective molecular rotational states can be read out using the conditioned Rydberg energy shifts.

  4. Medipix3: A 64 k pixel detector readout chip working in single photon counting mode with improved spectrometric performance

    CERN Document Server

    Ballabriga, R; Wong, W; Heijne, E; Campbell, M; Llopart, X

    2011-01-01

    Medipix3 is a 256 x 256 channel hybrid pixel detector readout chip working in a single photon counting mode with a new inter-pixel architecture, which aims to improve the energy resolution in pixelated detectors by mitigating the effects of charge sharing between channels. Charges are summed in all 2 x 2 pixel clusters on the chip and a given hit is allocated locally to the pixel summing circuit with the biggest total charge on an event-by-event basis. Each pixel contains also two 12-bit binary counters with programmable depth and overflow control. The chip is configurable such that either the dimensions of each detector pixel match those of one readout pixel or detector pixels are four times greater in area than the readout pixels. In the latter case, event-by-event summing is still possible between the larger pixels. Each pixel has around 1600 transistors and the analog static power consumption is below 15 mu W in the charge summing mode and 9 mu W in the single pixel mode. The chip has been built in an 8-m...

  5. A noble gas detector with electroluminescence readout based on an array of APDs

    International Nuclear Information System (INIS)

    We present the results of the operation of an array of avalanche photodiodes (APDs) for the readout of an electroluminescence detector. The detector contains 24 APDs with a pitch of 15 mm between them allowing energy and position measurements simultaneously. Measurements were performed in xenon (3.8 bar) and argon (4.8 bar) showing a good energy resolution of 5.3% FWHM at 60 keV in xenon and 9.4% in argon respectively. Following Monte Carlo studies the performance could be improved significantly by reducing the pitch between the sensors

  6. Testing System Based on Virtual Instrument for Readout Circuit of Infrared Focal Plane Array

    Institute of Scientific and Technical Information of China (English)

    XUE Lian; MENG Li-ya; YUAN Xiang-hui

    2008-01-01

    Readout integrated circuit(ROIC) is one of the most important components for hybrid-integrated infrared focal plane array(IRFPA). And it should be tested to ensure the product yield before bonding. This paper presents an on-wafer testing system based on Labview for ROIC of IRFPA. The quantitative measurement can be conducted after determining whether there is row crosstalk or not in this system. This low-cost system has the benefits of easy expansion, upgrading, and flexibility, and it has been employed in the testing of several kinds of IRFPA ROICs to measure the parameters of saturated output voltage, non-uniformity, dark noise and dynamic range, etc.

  7. Optical sensitivity non-uniformity analysis and optimization of a tilt optical readout focal plane array

    Science.gov (United States)

    Fu, Jianyu; Shang, Haiping; Shi, Haitao; Li, Zhigang; Ou, Yi; Chen, Dapeng; Zhang, Qingchuan

    2016-02-01

    An optical readout focal plane array (FPA) usually has a differently tilted reflector/absorber at the initial state due to the micromachining technique. The angular deviation of the reflector/absorber has a strong impact on the optical sensitivity non-uniformity, which is a key factor which affects the imaging uniformity. In this study, a theoretical analysis has been developed, and it is found that the stress matching in SiO2-Aluminum (Al) bilayer leg could make a contribution towards reducing the optical sensitivity non-uniformity. Ion implantation of phosphorus (P) has been utilized to control the stress in SiO2 film. By controlling the implantation energy and dose, the stress and stress stability are modified. The optical readout FPA has been successfully fabricated with the stress-control technique based on P+ implantation. It is demonstrated that the gray response non-uniformity of optical readout FPA has decreased from 25.69% to 10.7%.

  8. Development of Frequency-Division Multiplexing Readout System for Large-Format TES X-ray Microcalorimeter Arrays

    Science.gov (United States)

    Sakai, K.; Yamamoto, R.; Takei, Y.; Mitsuda, K.; Yamasaki, N. Y.; Hidaka, M.; Nagasawa, S.; Kohjiro, S.; Miyazaki, T.

    2016-07-01

    We are developing the frequency-division multiplexing (FDM) readout system aimed to realize the 400-pixel transition edge sensor (TES) microcalorimeter array for the DIOS mission as well as large-format arrays with more than a thousand of TES for future space missions such as the ATHENA mission. The developed system consists of the low-power superconducting quantum interference device (SQUID), the digital FDM electronics, and the analog front-end to bridge the SQUID and the digital electronics. Using the developed readout system, we performed a TES readout experiment and succeeded to multiplex four TES signals with the single-staged cryogenic setup. We have experienced two issues during the experiment: an excess noise and crosstalk. The brief overview of the developed system and the details, results, and issues of the TES multiplexing readout experiment is discussed.

  9. Development of the photomultiplier tube readout system for the first Large-Sized Telescope of the Cherenkov Telescope Array

    CERN Document Server

    Masuda, Shu; Barrio, Juan Abel; Bigas, Oscar Blanch; Delgado, Carlos; Coromina, Lluís Freixas; Gunji, Shuichi; Hadasch, Daniela; Hatanaka, Kenichiro; Ikeno, Masahiro; Laguna, Jose Maria Illa; Inome, Yusuke; Ishio, Kazuma; Katagiri, Hideaki; Kubo, Hidetoshi; Martínez, Gustavo; Mazin, Daniel; Nakajima, Daisuke; Nakamori, Takeshi; Ohoka, Hideyuki; Paoletti, Riccardo; Ritt, Stefan; Rugliancich, Andrea; Saito, Takayuki; Sulanke, Karl-Heinz; Takeda, Junki; Tanaka, Manobu; Tanigawa, Shunsuke; Tejedor, Luis Ángel; Teshima, Masahiro; Tsuchiya, Yugo; Uchida, Tomohisa; Yamamoto, Tokonatsu

    2015-01-01

    The Cherenkov Telescope Array (CTA) is the next generation ground-based very high energy gamma-ray observatory. The Large-Sized Telescope (LST) of CTA targets 20 GeV -- 1 TeV gamma rays and has 1855 photomultiplier tubes (PMTs) installed in the focal plane camera. With the 23 m mirror dish, the night sky background (NSB) rate amounts to several hundreds MHz per pixel. In order to record clean images of gamma-ray showers with minimal NSB contamination, a fast sampling of the signal waveform is required so that the signal integration time can be as short as the Cherenkov light flash duration (a few ns). We have developed a readout board which samples waveforms of seven PMTs per board at a GHz rate. Since a GHz FADC has a high power consumption, leading to large heat dissipation, we adopted the analog memory ASIC "DRS4". The sampler has 1024 capacitors per channel and can sample the waveform at a GHz rate. Four channels of a chip are cascaded to obtain deeper sampling depth with 4096 capacitors. After a trigger ...

  10. In the photograph, one can see the interconnection from one readout chip to the flexible cable realized with ultrasonic wire bonds (25 microns).

    CERN Multimedia

    Saba, A

    2006-01-01

    2 ladders are connected via a multi layer aluminium polyimide flexible cable with a multi chip module containing several custom designed ASICs. The production of the flexible cable was developed and carrier out at CERN. It provides signal and data lines as well as power to the individual readout chipswith a total thickness of only 220 microns. In the photograph, one can see the interconnection from one readout chip to the flexible cable realized with ultrasonic wire bonds (25 microns).

  11. Nanoimprinted nanopillar array chip for procalcitonin detection (Conference Presentation)

    Science.gov (United States)

    Sun, Ling Ling; Zhou, Xiaodong

    2016-03-01

    Procalcitonin (PCT) is an early and highly specific biomarker in response to bacterial infection. The PCT-guided antibiotic therapy has demonstrated to be more efficient than standard therapy to reduce in antibiotic use without adverse outcome in mortality. The PCT detection in clinics is required to be highly sensitive with a sensitivity of 0.5 ng/ml. At present, the technologies for PCT detection are limited. This paper reported a highly sensitive nanoimprinted gold nanopillar array chip for PCT detection. To achieve high sensitivity for PCT detection, the gold nanopillar array sensing chip was designed by plasmonic simulation and fabricated by high fidelity nanoimprinting technology. The gold nanopillars of 140 nm were nanoimprinted on glass substrate. A robust sandwich bioassay of capture antibody /PCT / quantum dot (QD) conjugated detection antibody was established on the gold nanopillar array chip to detect PCT. The nanopillars serve as localized surface plasmon resonance (LSPR) generators to enhance the fluorescent emission from QD. A limit of detection (LOD) of 0.5 ng/ml was achieved for PCT detection. This is the first time that PCT is detected with such high sensitivity by LSPR enhanced QD emission. By considering the low-cost, high sensitivity of the bioassay, as well as the inexpensive mass fabrication of the high quality chips, this novel nanoimprinted gold nanopillar array chip is particularly useful for developing a point-of-care system for PCT detection.

  12. Multiplexed readout demonstration of a TES-based detector array in a resistance locked loop

    CERN Document Server

    van der Kuur, Jan; Kiviranta, Mikko; Akamatsu, Hiroki; Khosropanah, Pourya; Hartog, Roland den; Suzuki, Toyoaki; Jackson, Brian

    2015-01-01

    TES-based bolometer and microcalorimeter arrays with thousands of pixels are under development for several space-based and ground-based applications. A linear detector response and low levels of cross talk facilitate the calibration of the instruments. In an effort to improve the properties of TES-based detectors, fixing the TES resistance in a resistance-locked loop (RLL) under optical loading has recently been proposed. Earlier theoretical work on this mode of operation has shown that the detector speed, linearity and dynamic range should improve with respect to voltage biased operation. This paper presents an experimental demonstration of multiplexed readout in this mode of operation in a TES-based detector array with noise equivalent power values (NEP) of $3.5\\cdot 10^{-19} $W/$\\sqrt{\\mathrm{Hz}}$. The measured noise and dynamic properties of the detector in the RLL will be compared with the earlier modelling work. Furthermore, the practical implementation routes for future FDM systems for the readout of ...

  13. Single-bead arrays for fluorescence-based immunoassays on capillary-driven microfluidic chips

    Science.gov (United States)

    Temiz, Yuksel; Lim, Michel; Delamarche, Emmanuel

    2016-03-01

    We report a concept for the simple fabrication of easy-to-use chips for immunoassays in the context of point-of-care diagnostics. The chip concept comprises mainly three features: (1) the efficient integration of reagents using beads functionalized with receptors, (2) the generation of capillary-driven liquid flows without using external pumps, and (3) a high-sensitivity detection of analytes using fluorescence microscopy. We fabricated prototype chips using dry etching of Si wafers. 4.5-μm-diameter beads were integrated into hexagonal arrays by sedimentation and removing the excess using a stream of water. We studied the effect of different parameters and showed that array occupancies from 30% to 50% can be achieved by pipetting a 250 nL droplet of 1% bead solution and allowing the beads sediment for 3 min. Chips with integrated beads were sealed using a 50-μm-thick dry-film resist laminated at 45 °C. Liquids pipetted to loading pads were autonomously pulled by capillary pumps at a rate of 0.35 nL s-1 for about 30 min. We studied ligand-receptor interactions and binding kinetics using time-lapse fluorescence microscopy and demonstrated a 5 pM limit of detection (LOD) for an anti-biotin immunoassay. As a clinically-relevant example, we implemented an immunoassay to detect prostate specific antigen (PSA) and showed an LOD of 108 fM (i.e. 3.6 pg mL-1). While a specific implementation is provided here for the detection of PSA, we believe that combining capillary-driven microfluidics with arrays of single beads and fluorescence readout to be very flexible and sufficiently sensitive for the detection of other clinically-relevant analytes.

  14. Spectroscopic measurements with the ATLAS FE-I4 pixel readout chip

    Energy Technology Data Exchange (ETDEWEB)

    Pohl, David-Leon; Janssen, Jens; Hemperek, Tomasz; Huegging, Fabian; Wermes, Norbert [Physikalisches Institut der Univeristaet Bonn (Germany)

    2015-07-01

    The ATLAS FE-I4 pixel readout chip is a large (2 x 2 cm{sup 2}) state of the art ASIC used in high energy physics experiments as well as for research and development purposes. While the FE-I4 is optimized for high hit rates it provides very limited charge resolution. Therefore two methods were developed to obtain high resolution single pixel charge spectra with the ATLAS FE-I4. The first method relies on the ability to change the detection threshold in small steps while counting hits from a particle source and has a resolution limited by electronic noise only. The other method uses a FPGA based time-to-digital-converter to digitize the analog charge signal with high precision. The feasibility, performance and challenges of these methods are discussed. First results of sensor characterizations from radioactive sources and test beams with the ATLAS FE-I4 in view of the charge collection efficiency after irradiation are presented.

  15. A Novel Two-Wire Fast Readout Approach for Suppressing Cable Crosstalk in a Tactile Resistive Sensor Array.

    Science.gov (United States)

    Wu, Jianfeng; Wang, Yu; Li, Jianqing; Song, Aiguo

    2016-01-01

    For suppressing the crosstalk problem due to wire resistances and contacted resistances of the long flexible cables in tactile sensing systems, we present a novel two-wire fast readout approach for the two-dimensional resistive sensor array in shared row-column fashion. In the approach, two wires are used for every driving electrode and every sampling electrode in the resistive sensor array. The approach with a high readout rate, though it requires a large number of wires and many sampling channels, solves the cable crosstalk problem. We also verified the approach's performance with Multisim simulations and actual experiments.

  16. A low-power small-area ADC array for IRFPA readout

    Science.gov (United States)

    Zhong, Shengyou; Yao, Libin

    2013-09-01

    The readout integrated circuit (ROIC) is a bridge between the infrared focal plane array (IRFPA) and image processing circuit in an infrared imaging system. The ROIC is the first part of signal processing circuit and connected to detectors directly, so its performance will greatly affect the detector or even the whole imaging system performance. With the development of CMOS technologies, it's possible to digitalize the signal inside the ROIC and develop the digital ROIC. Digital ROIC can reduce complexity of the whole system and improve the system reliability. More importantly, it can accommodate variety of digital signal processing techniques which the traditional analog ROIC cannot achieve. The analog to digital converter (ADC) is the most important building block in the digital ROIC. The requirements for ADCs inside the ROIC are low power, high dynamic range and small area. In this paper we propose an RC hybrid Successive Approximation Register (SAR) ADC as the column ADC for digital ROIC. In our proposed ADC structure, a resistor ladder is used to generate several voltages. The proposed RC hybrid structure not only reduces the area of capacitor array but also releases requirement for capacitor array matching. Theory analysis and simulation show RC hybrid SAR ADC is suitable for ADC array applications

  17. On-chip ADC for infrared focal plane arrays

    Science.gov (United States)

    Gao, Lei; Chen, Guo-qiang; Wang, Pan; Ding, Rui-jun

    2013-09-01

    This paper presents a low power and small area analog-digital converter (ADC) for infrared focal plane arrays (IRFPA) readout integrated circuit (ROIC). Successive approximation register (SAR) ADC architecture is used in this IRFPA readout integrated circuit. Each column of the IRFPA shares one SAR ADC. The most important part is the three-level DAC. Compared to the previous design, this three-level DAC needs smaller area, has lower power, and more suitable for IRFPA ROIC. In this DAC, its most significant bit (MSB) sub-DAC uses charge scaling, while the least significant bit (LSB) sub-DAC uses voltage scaling. Where the MSB sub-DAC consists of a four-bit charge scaling DAC and a five-bit sub-charge scaling DAC. We need to put a scaling capacitor Cs between these two sub-DACs. Because of the small area, we have more design methods to make the ADC has a symmetrical structure and has higher accuracy. The ADC also needs a high resolution comparator. In this design the comparator uses three-stage operational amplifier structure to have a 77dB differential gain. As the IR focal plane readout circuit signal is stepped DC signal, the circuit design time without adding the sample and hold circuit, so we can use a DC signal instead of infrared focal plane readout circuit output analog signals to be simulated. The simulation result shows that the resolution of the ADC is 12 bit.

  18. Development of an ASIC for the readout and control of near-infrared large array detectors

    Science.gov (United States)

    Meier, Dirk; Berge, Hans Kristian Otnes; Hasanbegovic, Amir; Altan, Mehmet A.; Najafiuchevler, Bahram; Azman, Suleyman; Talebi, Jahanzad; Olsen, Alf; Øya, Petter; Paahlsson, Philip; Gheorghe, Codin; Maehlum, Gunnar

    2014-07-01

    The article describes the near infrared readout and controller ASIC (NIRCA) developed by Integrated Detector Electronics AS (IDEAS). The project aims at future astronomical science and Earth observation missions, where the ASIC will be used with image sensors based on mercury cadmium telluride (HgCdTe, or MCT). NIRCA is designed to operate from cryogenic temperatures (77 K) to higher than room temperature (328 K) and in a high radiation environment (LET > 60 MeVcm2/mg). The ASIC connects to the readout integrated circuit (ROIC) and delivers fully digitized data via serial digital output. The ASIC contains an analogue front-end (AFE) with 4 analogue-to-digital converters (ADCs) and programmable gain amplifiers with offset adjustment. The ADCs have a differential input swing of +/-2 V, 12-bit resolution, and a maximum sample rate of 3 MSps. The ASIC contains a programmable sequencer (microcontroller) to generate up to 40 digital signals for the ROIC and to control the analogue front-end and DACs on the chip. The ASIC has two power supply voltage regulators that provide the ROIC with 1.8 V and 3.3 V, and programmable 10-bit DACs to generate 16 independent reference and bias voltages from 0.3 V to 3 V. In addition NIRCA allows one to read 8 external digital signals, and monitor external and internal analogue signals including onchip temperature. NIRCA can be programmed and controlled via SPI interface for all internal functions and allows data forwarding from and to the ROIC SPI interface.

  19. A Noble Gas Detector with Electroluminescence Readout based on an Array of APDs

    CERN Document Server

    Bourguille, B; Gil-Botella, I; Lux, T; Palomares, C; Sanchez, F; Santorelli, R

    2015-01-01

    We present the results of the operation of an array of avalanche photodiodes (APDs) for the readout of an electroluminescence detector. The detector contains 24 APDs with a pitch of 15 mm between them allowing energy and position measurements simultaneously. Measurements were performed in xenon (3.8 bar) and argon (4.8 bar) showing a good energy resolution of 5.3% FWHM at 60 keV in xenon and 9.4% in argon respectively. In X-ray energies of 13 could be clearly separated from the pedestals indicating that this kind of technology might be also interesting for dark matter detectors. Following Monte Carlo studies the performance could be improved significantly by reducing the pitch between the sensors.

  20. An Efficient Test Facility For The Cherenkov Telescope Array FlashCam Readout Electronics Production

    CERN Document Server

    Eisenkolb, F; Kalkuhl, C; Pühlhofer, G; Santangelo, A; Schanz, T; Tenzer, C

    2016-01-01

    The Cherenkov Telescope Array (CTA) is the planned next-generation instrument for ground-based gamma-ray astronomy, currently under preparation by a world-wide consortium. The FlashCam group is preparing a photomultiplier-based camera for the Medium Size Telescopes of CTA, with a fully digital Readout System (ROS). For the forthcoming mass production of a substantial number of cameras, efficient test routines for all components are currently under development. We report here on a test facility for the ROS components. A test setup and routines have been developed and an early version of that setup has successfully been used to test a significant fraction of the ROS for the FlashCam camera prototype in January 2016. The test setup with its components and interface, as well as first results, are presented here.

  1. Fiber faceplate modulation readout in Bi-material micro-cantilever mirror array imaging system

    Science.gov (United States)

    Hui, Mei; Xia, Zhengzheng; Liu, Ming; Dong, Liquan; Liu, Xiaohua; Zhao, Yuejin

    2016-05-01

    Fiber faceplate modulation was applied to read out the precise actuation of silicon-based, surface micro-fabricated cantilever mirrors array in optical imaging system. The faceplate was made by ordered bundles consisting of as many as ten thousands fibers. The transmission loss of an individual fiber in the bundles was 0.35dB/cm and the cross talk between neighboring fibers in the faceplate was about 15%. Micro-cantilever mirrors array (Focal-Plane Array (FPA)) which composed of two-level bi-material pixels, absorb incident infrared flux and result in a temperature increase. The temperature distribution of incident flux transformed to the deformation distribution in FPA which has a very big difference in coefficients of thermal expansion. FPA plays the roles of target sensing and has the characteristics of high detection sensitivity. Instead of general filter such as knife edge or pinhole, fiber faceplate modulate the beam reflected by the units of FPA. An optical readout signal brings a visible spectrum into pattern recognition system, yielding a visible image on monitor. Thermal images at room temperature have been obtained. The proposed method permits optical axis compact and image noise suppression.

  2. On-chip clearing of arrays of 3-D cell cultures and micro-tissues.

    Science.gov (United States)

    Grist, S M; Nasseri, S S; Poon, T; Roskelley, C; Cheung, K C

    2016-07-01

    Three-dimensional (3-D) cell cultures are beneficial models for mimicking the complexities of in vivo tissues, especially in tumour studies where transport limitations can complicate response to cancer drugs. 3-D optical microscopy techniques are less involved than traditional embedding and sectioning, but are impeded by optical scattering properties of the tissues. Confocal and even two-photon microscopy limit sample imaging to approximately 100-200 μm depth, which is insufficient to image hypoxic spheroid cores. Optical clearing methods have permitted high-depth imaging of tissues without physical sectioning, but they are difficult to implement for smaller 3-D cultures due to sample loss in solution exchange. In this work, we demonstrate a microfluidic platform for high-throughput on-chip optical clearing of breast cancer spheroids using the SeeDB, Clear(T2), and ScaleSQ clearing methods. Although all three methods are able to effectively clear the spheroids, we find that SeeDB and ScaleSQ more effectively clear the sample than Clear(T2); however, SeeDB induces green autofluorescence while ScaleS causes sample expansion. Our unique on-chip implementation permits clearing arrays of 3-D cultures using perfusion while monitoring the 3-D cultures throughout the process, enabling visualization of the clearing endpoint as well as monitoring of transient changes that could induce image artefacts. Our microfluidic device is compatible with on-chip 3-D cell culture, permitting the use of on-chip clearing at the endpoint after monitoring the same spheroids during their culture. This on-chip method has the potential to improve readout from 3-D cultures, facilitating their use in cell-based assays for high-content drug screening and other applications. PMID:27493703

  3. Design and evaluation of a 2D array PIN photodiode bump bonded to readout IC for the low energy x-ray detector.

    Science.gov (United States)

    Yuk, Sunwoo; Park, Shin-Woong; Yi, Yun

    2006-01-01

    A 2D array radiation sensor, consisting of an array of PIN photodiodes bump bonded to readout integrated circuit (IC), has been developed for operation with low energy X-rays. The PIN photodiode array and readout IC for this system have been fabricated. The main performance measurements are the following: a few pA-scale leakage current, 350 pF junction capacitance, 30 microm-depth depletion layer and a 250 microm intrinsic layer at zero bias. This PIN photodiode array and readout IC were fabricated using a PIN photodiode process and standard 0.35 microm CMOS technology, respectively. The readout circuit is operated from a 3.3 V single power supply. Finally, a 2D array radiation sensor has been developed using bump bonding between the PIN photodiode and the readout electronics. PMID:17946079

  4. Design of a current based readout chip and development of a DEPFET pixel prototype system for the ILC vertex detector

    International Nuclear Information System (INIS)

    The future TeV-scale linear collider ILC (International Linear Collider) offers a large variety of precision measurements complementary to the discovery potential of the LHC (Large Hadron Collider). To fully exploit its physics potential, a vertex detector with unprecedented performance is needed. One proposed technology for the ILC vertex detector is the DEPFET active pixel sensor. The DEPFET sensor offers particle detection with in-pixel amplification by incorporating a field effect transistor into a fully depleted high-ohmic silicon substrate. The device provides an excellent signal-to-noise ratio and a good spatial resolution at the same time. To establish a very fast readout of a DEPFET pixel matrix with row rates of 20 MHz and more, the 128 channel CURO II ASIC has been designed and fabricated. The architecture of the chip is completely based on current mode techniques (SI) perfectly adapted to the current signal of the sensor. For the ILC vertex detector a prototype system with a 64 x 128 DEPFET pixel matrix read out by the CURO II chip has been developed. The design issues and the standalone performance of the readout chip as well as first results with the prototype system will be presented. (orig.)

  5. Design of a current based readout chip and development of a DEPFET pixel prototype system for the ILC vertex detector

    Energy Technology Data Exchange (ETDEWEB)

    Trimpl, M.

    2005-12-15

    The future TeV-scale linear collider ILC (International Linear Collider) offers a large variety of precision measurements complementary to the discovery potential of the LHC (Large Hadron Collider). To fully exploit its physics potential, a vertex detector with unprecedented performance is needed. One proposed technology for the ILC vertex detector is the DEPFET active pixel sensor. The DEPFET sensor offers particle detection with in-pixel amplification by incorporating a field effect transistor into a fully depleted high-ohmic silicon substrate. The device provides an excellent signal-to-noise ratio and a good spatial resolution at the same time. To establish a very fast readout of a DEPFET pixel matrix with row rates of 20 MHz and more, the 128 channel CURO II ASIC has been designed and fabricated. The architecture of the chip is completely based on current mode techniques (SI) perfectly adapted to the current signal of the sensor. For the ILC vertex detector a prototype system with a 64 x 128 DEPFET pixel matrix read out by the CURO II chip has been developed. The design issues and the standalone performance of the readout chip as well as first results with the prototype system will be presented. (orig.)

  6. Zero suppression logic of the ALICE muon forward tracker pixel chip prototype PIXAM and associated readout electronics development

    International Nuclear Information System (INIS)

    In the framework of the ALICE experiment upgrade at HL-LHC, a new forward tracking detector, the Muon Forward Tracker (MFT), is foreseen to overcome the intrinsic limitations of the present Muon Spectrometer and will perform new measurements of general interest for the whole ALICE physics. To fulfill the new detector requirements, CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive trade-off between readout speed, spatial resolution, radiation hardness, granularity, power consumption and material budget. This technology has been chosen to equip the Muon Forward Tracker and also the vertex detector: the Inner Tracking System (ITS). Since few years, an intensive R and D program has been performed on the design of MAPS in the 0.18 μ m CMOS Image Sensor (CIS) process. In order to avoid pile up effects in the experiment, the classical rolling shutter readout system of MAPS has been improved to overcome the readout speed limitation. A zero suppression algorithm, based on a 3 by 3 cluster finding (position and data), has been chosen for the MFT. This algorithm allows adequate data compression for the sensor. This paper presents the large size prototype PIXAM, which represents 1/3 of the final chip, and will focus specially on the zero suppression block architecture. This chip is designed and under fabrication in the 0.18 μ m CIS process. Finally, the readout electronics principle to send out the compressed data flow is also presented taking into account the cluster occupancy per MFT plane for a single central Pb-Pb collision

  7. Zero suppression logic of the ALICE muon forward tracker pixel chip prototype PIXAM and associated readout electronics development

    Science.gov (United States)

    Flouzat, C.; Değerli, Y.; Guilloux, F.; Orsini, F.; Venault, P.

    2015-05-01

    In the framework of the ALICE experiment upgrade at HL-LHC, a new forward tracking detector, the Muon Forward Tracker (MFT), is foreseen to overcome the intrinsic limitations of the present Muon Spectrometer and will perform new measurements of general interest for the whole ALICE physics. To fulfill the new detector requirements, CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive trade-off between readout speed, spatial resolution, radiation hardness, granularity, power consumption and material budget. This technology has been chosen to equip the Muon Forward Tracker and also the vertex detector: the Inner Tracking System (ITS). Since few years, an intensive R&D program has been performed on the design of MAPS in the 0.18 μ m CMOS Image Sensor (CIS) process. In order to avoid pile up effects in the experiment, the classical rolling shutter readout system of MAPS has been improved to overcome the readout speed limitation. A zero suppression algorithm, based on a 3 by 3 cluster finding (position and data), has been chosen for the MFT. This algorithm allows adequate data compression for the sensor. This paper presents the large size prototype PIXAM, which represents 1/3 of the final chip, and will focus specially on the zero suppression block architecture. This chip is designed and under fabrication in the 0.18 μ m CIS process. Finally, the readout electronics principle to send out the compressed data flow is also presented taking into account the cluster occupancy per MFT plane for a single central Pb-Pb collision.

  8. Emulation and Calibration of the SALT Read-out Chip for the Upstream Tracker for Modernised LHCb Detector

    CERN Document Server

    Dendek, Adam

    2015-01-01

    The LHCb is one of the four major experiments currently operating at CERN. The main reason for constructing the LHCb forward spectrometer was a precise measurement of the CP violation in heavy quarks section as well as search for a New Physics. To obtain interesting results, the LHCb is mainly focused on study of B meson decays. Unfortunately, due to the present data acquisition architecture, the LHCb experiment is statistically limited for collecting such events. This fact led the LHCb Collaboration to decide to perform far-reaching upgrade. Key part of this upgrade will be replacement of the TT detector. To perform this action, it was requited to design new tracking detector with entirely new front-end electronics. This detector will be called the Upstream Tracker (UT) and the read-out chip — SALT. This note presents an overall discussion on SALT chip. In particular, the emulation process of the SALT data preformed via the software written by the author.

  9. Latest generation of ASICs for photodetector readout

    Energy Technology Data Exchange (ETDEWEB)

    Seguin-Moreau, N., E-mail: seguin@lal.in2p3.fr [Laboratoire de l’Accélérateur Linéaire, IN2P3-CNRS, Université Paris-Sud, Bâtiment 200, 91898 Orsay Cedex (France)

    2013-08-01

    The OMEGA microelectronics group has designed a new generation of multichannel integrated circuits, the “ROC” family, in AustrianMicroSystem (AMS) SiGe 0.35 μm technology to read out signals from various families of photodetectors. The chip named MAROC (standing for Multi Anode ReadOut Chip) has been designed to read out MultiAnode Photomultipliers (MAPMT), Photomultiplier ARray In SiGe ReadOut Chip (PARISROC) to read out Photomultipliers (PMTs) and SiPM Integrated ReadOut Chip (SPIROC) to readout Silicon PhotoMultiplier (SiPM) detectors and which was the first ASIC to do so. The three of them fulfill the stringent requirements of the future photodetectors, in particular in terms of low noise, radiation hardness, large dynamic range, high density and high speed while keeping low power thanks to the SiGe technology. These multi-channel ASICs are real System on Chip (SoC) as they provide charge, time and photon-counting information which are digitized internally. Their complexity and versatility enable innovative frontier detectors and also cover spin off of these detectors in adjacent fields such as medical or material imaging as well as smart detectors. In this presentation, the three ASIC architectures and test results will be described to give a general panorama of the “ROC” chips.

  10. Latest generation of ASICs for photodetector readout

    Science.gov (United States)

    Seguin-Moreau, N.

    2013-08-01

    The OMEGA microelectronics group has designed a new generation of multichannel integrated circuits, the "ROC" family, in AustrianMicroSystem (AMS) SiGe 0.35 μm technology to read out signals from various families of photodetectors. The chip named MAROC (standing for Multi Anode ReadOut Chip) has been designed to read out MultiAnode Photomultipliers (MAPMT), Photomultiplier ARray In SiGe ReadOut Chip (PARISROC) to read out Photomultipliers (PMTs) and SiPM Integrated ReadOut Chip (SPIROC) to readout Silicon PhotoMultiplier (SiPM) detectors and which was the first ASIC to do so. The three of them fulfill the stringent requirements of the future photodetectors, in particular in terms of low noise, radiation hardness, large dynamic range, high density and high speed while keeping low power thanks to the SiGe technology. These multi-channel ASICs are real System on Chip (SoC) as they provide charge, time and photon-counting information which are digitized internally. Their complexity and versatility enable innovative frontier detectors and also cover spin off of these detectors in adjacent fields such as medical or material imaging as well as smart detectors. In this presentation, the three ASIC architectures and test results will be described to give a general panorama of the "ROC" chips.

  11. Latest generation of ASICs for photodetector readout

    International Nuclear Information System (INIS)

    The OMEGA microelectronics group has designed a new generation of multichannel integrated circuits, the “ROC” family, in AustrianMicroSystem (AMS) SiGe 0.35 μm technology to read out signals from various families of photodetectors. The chip named MAROC (standing for Multi Anode ReadOut Chip) has been designed to read out MultiAnode Photomultipliers (MAPMT), Photomultiplier ARray In SiGe ReadOut Chip (PARISROC) to read out Photomultipliers (PMTs) and SiPM Integrated ReadOut Chip (SPIROC) to readout Silicon PhotoMultiplier (SiPM) detectors and which was the first ASIC to do so. The three of them fulfill the stringent requirements of the future photodetectors, in particular in terms of low noise, radiation hardness, large dynamic range, high density and high speed while keeping low power thanks to the SiGe technology. These multi-channel ASICs are real System on Chip (SoC) as they provide charge, time and photon-counting information which are digitized internally. Their complexity and versatility enable innovative frontier detectors and also cover spin off of these detectors in adjacent fields such as medical or material imaging as well as smart detectors. In this presentation, the three ASIC architectures and test results will be described to give a general panorama of the “ROC” chips

  12. Development of Microreactor Array Chip-Based Measurement System for Massively Parallel Analysis of Enzymatic Activity

    Science.gov (United States)

    Hosoi, Yosuke; Akagi, Takanori; Ichiki, Takanori

    Microarray chip technology such as DNA chips, peptide chips and protein chips is one of the promising approaches for achieving high-throughput screening (HTS) of biomolecule function since it has great advantages in feasibility of automated information processing due to one-to-one indexing between array position and molecular function as well as massively parallel sample analysis as a benefit of down-sizing and large-scale integration. Mostly, however, the function that can be evaluated by such microarray chips is limited to affinity of target molecules. In this paper, we propose a new HTS system of enzymatic activity based on microreactor array chip technology. A prototype of the automated and massively parallel measurement system for fluorometric assay of enzymatic reactions was developed by the combination of microreactor array chips and a highly-sensitive fluorescence microscope. Design strategy of microreactor array chips and an optical measurement platform for the high-throughput enzyme assay are discussed.

  13. Design of the low area monotonic trim DAC in 40 nm CMOS technology for pixel readout chips

    Science.gov (United States)

    Drozd, A.; Szczygiel, R.; Maj, P.; Satlawa, T.; Grybos, P.

    2014-12-01

    The recent research in hybrid pixel detectors working in single photon counting mode focuses on nanometer or 3D technologies which allow making pixels smaller and implementing more complex solutions in each of the pixels. Usually single pixel in readout electronics for X-ray detection comprises of charge amplifier, shaper and discriminator that allow classification of events occurring at the detector as true or false hits by comparing amplitude of the signal obtained with threshold voltage, which minimizes the influence of noise effects. However, making the pixel size smaller often causes problems with pixel to pixel uniformity and additional effects like charge sharing become more visible. To improve channel-to-channel uniformity or implement an algorithm for charge sharing effect minimization, small area trimming DACs working in each pixel independently are necessary. However, meeting the requirement of small area often results in poor linearity and even non-monotonicity. In this paper we present a novel low-area thermometer coded 6-bit DAC implemented in 40 nm CMOS technology. Monte Carlo simulations were performed on the described design proving that under all conditions designed DAC is inherently monotonic. Presented DAC was implemented in the prototype readout chip with 432 pixels working in single photon counting mode, with two trimming DACs in each pixel. Each DAC occupies the area of 8 μm × 18.5 μm. Measurements and chips' tests were performed to obtain reliable statistical results.

  14. Novel CMOS readout techniques for uncooled pyroelectric IR FPA

    Science.gov (United States)

    Sun, Tai-Ping; Chin, Yuan-Lung; Chung, Wen-Yaw; Hsiung, Shen-Kan; Chou, Jung-Chuan

    1998-09-01

    Based on the application of the source follower per detector (SFD) input biasing technique, a new redout structure for the IR focal-plane-array (FPA), called the variable gain source follower per detector (VGSFD) is proposed and analyzed. The readout circuit of VGSFD of a unit cell of pyroelectric sensor under investigation, is composed of a source follower per detector circuit, high gain amplifier, and the reset switch. The VGSFD readout chip has been designed in 0.5 micrometers double-poly-double-metal n-well CMOS technology in various formats from 8 by 8 to 128 by 128. The experimental 8 by 8 VGSFD measurement results of the fabricated readout chip at room temperature have successfully verified both the readout function and performance. The high gain, low power, high sensitivity readout performances are achieved in a 50 by 50 micrometers (superscript 2) pixel size.

  15. Readout system with on-board demodulation for CMB polarization experiments using coherent polarimeter arrays

    CERN Document Server

    Ishidoshiro, Koji; Higuchi, Takeo; Hasegawa, Masaya; Hazumi, Masashi; Ikeno, Masahiro; Tajima, Osamu; Tanaka, Manobu; Uchida, Tomohisa

    2011-01-01

    B-modes are special patterns in cosmic microwave background (CMB) polarization. The detection of them is a smoking-gun signature of primordial gravitational waves. The generic strategy of the CMB polarization experiments is to employ a large number of polarimeters for improving the statistics. The Q/U Imaging ExperimenT-II (QUIET-II) has been proposed to detect the B-modes using the world's largest coherent polarimeter array (2,000 channels). An unique detection technique using QUIET's polarimeters, which is a modula- tion/demodulation scheme, enables us directly extracting the polarization signal. The extracted signal is free from non- polarized components and intrinsic 1/f noise. We developed a data readout system with on-board demodulation functions for the QUIET-II experiment. We employed a "master" clock strategy. This strategy guarantees phase matching between the modulation by the polarimeters and the demodulation by ADC modules. The single master generates all carrier clocks and distributes them to ea...

  16. The RD53 Collaboration's SystemVerilog-UVM Simulation Framework and its General Applicability to Design of Advanced Pixel Readout Chips

    OpenAIRE

    Marconi, S; Conti, E; Placidi, P; Christiansen, J.; Hemperek, T.

    2014-01-01

    The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip building blocks (Intellectual Properties, IPs). This work is focused on the implemented simulation and verification environment named VEPIX53, built using the SystemVerilog language and the Universa...

  17. Readout electronic for multichannel detectors

    CERN Document Server

    Kulibaba, V I; Naumov, S V

    2001-01-01

    Readout electronics based on the 128-channel chip 'Viking' (IDE AS inc., Norway) is considered. The chip 'Viking' integrates 128 low noise charge-sensitive preamplifiers with tunable CR-(RC) sup 2 shapers,analog memory and multiplexed readout to one output. All modules of readout electronics were designed and produced in KIPT taking into account the published recommendations of IDE AS inc.

  18. A fast and reliable readout method for quantitative analysis of surface-enhanced Raman scattering nanoprobes on chip surface

    Energy Technology Data Exchange (ETDEWEB)

    Chang, Hyejin; Jeong, Sinyoung; Ko, Eunbyeol; Jeong, Dae Hong, E-mail: yslee@snu.ac.kr, E-mail: debobkr@gmail.com, E-mail: jeongdh@snu.ac.kr [Department of Chemistry Education, Seoul National University, Seoul 151-742 (Korea, Republic of); Kang, Homan [Interdisciplinary Program in Nano-Science and Technology, Seoul National University, Seoul 151-742 (Korea, Republic of); Lee, Yoon-Sik, E-mail: yslee@snu.ac.kr, E-mail: debobkr@gmail.com, E-mail: jeongdh@snu.ac.kr [Interdisciplinary Program in Nano-Science and Technology, Seoul National University, Seoul 151-742 (Korea, Republic of); School of Chemical and Biological Engineering, Seoul National University, Seoul 151-742 (Korea, Republic of); Lee, Ho-Young, E-mail: yslee@snu.ac.kr, E-mail: debobkr@gmail.com, E-mail: jeongdh@snu.ac.kr [Department of Nuclear Medicine, Seoul National University Bundang Hospital, Seongnam 463-707 (Korea, Republic of)

    2015-05-15

    Surface-enhanced Raman scattering techniques have been widely used for bioanalysis due to its high sensitivity and multiplex capacity. However, the point-scanning method using a micro-Raman system, which is the most common method in the literature, has a disadvantage of extremely long measurement time for on-chip immunoassay adopting a large chip area of approximately 1-mm scale and confocal beam point of ca. 1-μm size. Alternative methods such as sampled spot scan with high confocality and large-area scan method with enlarged field of view and low confocality have been utilized in order to minimize the measurement time practically. In this study, we analyzed the two methods in respect of signal-to-noise ratio and sampling-led signal fluctuations to obtain insights into a fast and reliable readout strategy. On this basis, we proposed a methodology for fast and reliable quantitative measurement of the whole chip area. The proposed method adopted a raster scan covering a full area of 100 μm × 100 μm region as a proof-of-concept experiment while accumulating signals in the CCD detector for single spectrum per frame. One single scan with 10 s over 100 μm × 100 μm area yielded much higher sensitivity compared to sampled spot scanning measurements and no signal fluctuations attributed to sampled spot scan. This readout method is able to serve as one of key technologies that will bring quantitative multiplexed detection and analysis into practice.

  19. Pixel readout chips in deep submicron CMOS for ALICE and LHCb tolerant to 10 mrad and beyond

    CERN Document Server

    Snoeys, W; Campbell, M; Cantatore, E; Cencelli, V; Dinapoli, R; Heijne, Erik H M; Jarron, Pierre; Lamanna, P; Minervini, D; Morel, M; O'Shea, V; Quiquempoix, V; San Segundo-Bello, D; Van Koningsveld, B; Wyllie, Ken H

    2001-01-01

    The ALICE1LHCB chip is a mixed-mode integrated circuit designed to read out silicon pixel detectors for two different applications: particle tracking in the ALICE Silicon Pixel Detector and particle identification in the LHCb Ring Imaging Cherenkov detector. To satisfy the different needs for these two experiments, the chip can be operated in two different modes. In tracking mode all the 50 mu m *425 mu m pixel cells in the 256*32 array are read out individually, whilst in particle identification mode they are combined in groups of 8 to form a 32*32 array of 300 mu m x 425 mu m cells. Radiation tolerance was enhanced through special circuit layout. Sensitivity to coupling of digital signals into the analog front end was minimized. System issues such as testability and uniformity further constrained the design. The circuit is currently being manufactured in a commercial 0.25 mu m CMOS technology. (28 refs).

  20. Novel Single Photon Counting Readout Circuits and APD Arrays with Capability from UV to IR Project

    Data.gov (United States)

    National Aeronautics and Space Administration — The overall goal of the proposed Phase I SBIR project is to develop and demonstrate 256x256 segmented readout integrated circuits (ROICs) that can read, digitize...

  1. A 4k-Pixel CTIA Readout for Far IR Photodetector Arrays Project

    Data.gov (United States)

    National Aeronautics and Space Administration — We propose to investigate the feasibility of developing a low noise, two-side buttable, 64x64 readout multiplexer with the following key design features: 1- By far...

  2. Super-Altro 16: a Front-End System on Chip for DSP Based Readout of Gaseous Detectors

    CERN Document Server

    Aspell, P.; Franca, H.; Garcia Garcia, E.; Musa, L.

    2013-01-01

    This paper presents the architecture, design and test results of an ASIC specifically designed for the readout of gaseous detectors. The primary application is the readout of the Linear Collider Time Projection Chamber. The small area available (4mm2/channel) requires an innovative design, where sensitive analog components and massive digital functionalities are integrated on the same chip. Moreover, shut down (power pulsing) features are necessary in order to reduce the power consumption. The Super-Altro is a 16-channel demonstrator ASIC involving analog and digital signal processing. Each channel contains a low noise Pre-Amplifier and Shaping Amplifier (PASA), a pipeline ADC, and a Digital Signal Processor (DSP). The PASA is programmable in terms of gain and shaping time and can operate with both positive and negative polarities of input charge. The 10-bit ADC samples the output of the PASA at a frequency up to 40MHz before providing the digitized signal to the DSP which performs baseline subtraction, signa...

  3. Front-end multi-channel PMT-associated readout chip for hodoscope application

    OpenAIRE

    Deng, Shiming; Mathez, Hervé; Dauvergne, Denis; Zoccarato, Yannick; Lu, Guo-Neng

    2012-01-01

    International audience The system development requires a dedicated multi-channel readout ASIC (Application Specific Integrated Circuit) to be associated with the MaPMTs. Each channel should have very low input impedance to avoid electrical crosstalk between adjacent channels and to minimize effects of detector and wiring capacitances (Cd + Cw). Crosstalk between channels may degrade position resolution, while these capacitances may degrade both frequency and noise performances. Each channe...

  4. A 130 nm CMOS mixed mode front end readout chip for silicon strip tracking at the future linear collider

    Energy Technology Data Exchange (ETDEWEB)

    Pham, T.H., E-mail: pham@lpnhe.in2p3.f [LPNHE-Universite Pierre et Marie Curie/IN2P3-CNRS-4, Place Jussieu, 75252 Paris Cedex 05 (France); Charpy, A.; Ciobanu, C. [LPNHE-Universite Pierre et Marie Curie/IN2P3-CNRS-4, Place Jussieu, 75252 Paris Cedex 05 (France); Comerma, A. [Universitat de Barcelona, Dept E.C.M/Dept. Electronica/ICC-Diagonal 647, planta 6, 08028 Barcelona (Spain); David, J.; Dhellot, M. [LPNHE-Universite Pierre et Marie Curie/IN2P3-CNRS-4, Place Jussieu, 75252 Paris Cedex 05 (France); Dieguez, A.; Gascon, D. [Universitat de Barcelona, Dept E.C.M/Dept. Electronica/ICC-Diagonal 647, planta 6, 08028 Barcelona (Spain); Genat, J.F.; Savoy Navarro, A.; Sefri, R. [LPNHE-Universite Pierre et Marie Curie/IN2P3-CNRS-4, Place Jussieu, 75252 Paris Cedex 05 (France)

    2010-11-01

    A 130 nm mixed (analog and digital) CMOS chip intended to read silicon strip detectors for future linear collider experiments was developed. Currently under testing, this chip has been optimized for a silicon micro-strip tracking device. It includes 88 channels of a full analog signal processing chain with the corresponding digital control and readout. Every analog channel includes (i) a low noise charge amplifier and integration with long pulse shaping, (ii) an eight by eight positions analog sampler for both storing successive events and reconstructing the full pulse shape, and (iii) a sparsifier performing analog sum of three adjacent inputs to decide whether there is signal or not. The whole system is controlled by the digital part, which allows configuring all the reference currents and voltages, drives the control signals to the analog memories, records the timing and channel information and subsequently performs the conversion to digital values of samples. The total surface of the circuit is 10x5 mm{sup 2}, with each analog channel occupying an area of 105x3500 {mu}m{sup 2}, and the remaining space of about 9000x700 {mu}m{sup 2} being filled by the analog channels on the silicon.

  5. An eight channel low-noise CMOS readout circuit for silicon detectors with on-chip front-end FET

    International Nuclear Information System (INIS)

    We propose a CMOS readout circuit for the processing of signals from multi-channel silicon detectors to be used in X-ray spectroscopy and γ-ray imaging applications. The circuit is composed by eight channels, each one featuring a low-noise preamplifier, a 6th-order semigaussian shaping amplifier with four selectable peaking times, from 1.8 up to 6 μs, a peak stretcher and a discriminator. The circuit is conceived to be used with silicon detectors with a front-end FET integrated on the detector chips itself, like silicon drift detectors with JFET and pixel detectors with DEPMOS. The integrated time constants used for the shaping are implemented by means of an RC-cell, based on the technique of demagnification of the current flowing in a resistor R by means of the use of current mirrors. The eight analog channels of the chip are multiplexed to a single analog output. A suitable digital section provides self-resetting of each channel and trigger output and is able to set independent thresholds on the analog channels by means of a programmable serial register and 3-bit DACs. The circuit has been realized in the 0.35 μm CMOS AMS technology. In this work, the main features of the circuit are presented along with the experimental results of its characterization

  6. Development and Characterisation of a Radiation Hard Readout Chip for the LHCb Outer Tracker Detector

    CERN Document Server

    Stange, Uwe

    2005-01-01

    The reconstruction of charged particle tracks in the Outer Tracker detector of the LHCb experiment requires to measure the drift times of the straw tubes. A Time to Digital Converter (TDC) chip has been developed for this task. The chip integrates into the LHCb data acquisition schema and ful ls the requirements of the detector. The OTIS chip is manufactured in a commercial 0.25 µm CMOS process. A 32-channel TDC core drives the drift time measurement (25 ns measurement range, 390 ps nominal resolution) without introducing dead times. The resulting drift times are bu ered until a trigger decision arrives after the xed latency of 4 µs. In case of a trigger accept signal, the digital control core processes and transmits the corresponding data to the following data acquisition stage. Drift time measurement and data processing are independent from the detector occupancy. The digital control core of the OTIS chip has been developed within this doctoral thesis. It has been integrated into the TDC chip together wit...

  7. Calibration scheme for large Kinetic Inductance Detector Arrays based on Readout Frequency Response

    OpenAIRE

    Bisigello, L.; Yates, S J C; Murugesan, V.; Baselmans, J. J. A.; Baryshev, A. M.

    2016-01-01

    Microwave kinetic inductance detector (MKID) provides a way to build large ground based sub-mm instruments such as NIKA and A-MKID. For such instruments, therefore, it is important to understand and characterize the response to ensure good linearity and calibration over wide dynamic range. We propose to use the MKID readout frequency response to determine the MKID responsivity to an input optical source power. A signal can be measured in a KID as a change in the phase of the readout signal wi...

  8. A digital output readout circuit with substrate temperature and bias heating compensation for uncooled micro-bolometer infrared focal plane arrays

    Science.gov (United States)

    Que, Longcheng; Wei, Linhai; Lv, Jian; Jiang, Yadong

    2015-07-01

    Uncooled micro-bolometer FPAs (focal plane arrays) are influenced by substrate temperature and bias heating effect seriously. When the substrate temperature of the FPA changes greatly, the output and the responsivity of the FPA will vary a lot, thus the images' quality is poor without the substrate temperature and bias heating effect compensation. In this paper, a new substrate temperature compensation method is proposed, which is completed during analog-to-digital converting with a 12-bit ADC (analog-to-digital converter), and the bias heating effect is canceled by trimming blind bolometers with on-chip DAC (digital-to-analog converter). The simulation result presents the achievable substrate temperature compensation range is about 80 K. The proposed structure has been adopted in a readout circuit and successfully fabricated with 0.5 μm CMOS process. For normal temperature scene (300 K), the digital output only changes 16% when the substrate temperature changes from 253 K to 333 K. And the equivalent analog output only changes 546.2 mV with a 3.4 V output swing. As a result, the scene DR (dynamic range) does not change rapidly along with the variation of the substrate temperature and the images' quality is improved greatly.

  9. The RD53 Collaboration's SystemVerilog-UVM Simulation Framework and its General Applicability to Design of Advanced Pixel Readout Chips

    CERN Document Server

    Marconi, S; Placidi, Pisana; Christiansen, Jorgen; Hemperek, Tomasz

    2014-01-01

    The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip building blocks (Intellectual Properties, IPs). This work is focused on the implemented simulation and verification environment named VEPIX53, built using the SystemVerilog language and the Universal Verification Methodology (UVM) class library in the framework of the RD53 Collaboration. The environment supports pixel chips at different levels of description: its reusable components feature the generation of different classes of parameterized input hits to the pixel matrix, monitoring of pixel chip inputs and outputs, conformity checks between predicted and actual outputs and collection of statistics on system performance. The environment has been tested performing a study of shared architectures of the trigger late...

  10. A Pixel Readout Chip in 40 nm CMOS Process for High Count Rate Imaging Systems with Minimization of Charge Sharing Effects

    Energy Technology Data Exchange (ETDEWEB)

    Maj, Piotr; Grybos, P.; Szczgiel, R.; Kmon, P.; Drozd, A.; Deptuch, G.

    2013-11-07

    We present a prototype chip in 40 nm CMOS technology for readout of hybrid pixel detector. The prototype chip has a matrix of 18x24 pixels with a pixel pitch of 100 m. It can operate both in single photon counting (SPC) mode and in C8P1 mode. In SPC the measured ENC is 84 e rms (for the peaking time of 48 ns), while the effective offset spread is below 2 mV rms. In the C8P1 mode the chip reconstructs full charge deposited in the detector, even in the case of charge sharing, and it identifies a pixel with the largest charge deposition. The chip architecture and preliminary measurements are reported.

  11. The PASTA chip - A free-running readout ASIC for silicon strip sensors in PANDA

    Energy Technology Data Exchange (ETDEWEB)

    Goerres, Andre; Stockmanns, Tobias; Ritman, James [Institut fuer Kernphysik, Forschungszentrum Juelich, Juelich (Germany); Rivetti, Angelo [INFN Sezione di Torino, Torino (Italy); Collaboration: PANDA-Collaboration

    2014-07-01

    The PANDA experiment is a multi purpose detector, investigating hadron physics in the charm quark mass regime. It is one of the main experiments at the future FAIR accelerator facility, using pp annihilations from a 1.5-15 GeV/c anti-proton beam. Because of the broad physics spectrum and the similarity of event and background signals, PANDA does not rely on a hardware-level trigger decision. The innermost of PANDA's sub-systems is the Micro Vertex Detector (MVD), consisting of silicon pixel and strip sensors. The latter will be read out by a specialized, free-running readout front-end called PANDA Strip ASIC (PASTA). It has to face a high event rate of up to 40 kHz/ch in an radiation-intense environment. To fulfill the MVD's requirements, it has to give accurate timing information to incoming events (<10 ns) and determine the collected charge with an 8-bit precision. The design has to meet cooling and placing restrictions, leading to a very low power consumption (<4 mW/ch) and limited dimensions. Therefore, a simple, time-based readout approach is chosen. In this talk, the conceptual design of the front-end is presented.

  12. TOT01, a time-over-threshold based readout chip in 180nm CMOS technology for silicon strip detectors

    Science.gov (United States)

    Kasinski, K.; Szczygiel, R.; Gryboś, P.

    2011-01-01

    This work is focused on the development of the TOT01 prototype front-end ASIC for the readout of long silicon strip detectors in the STS (Silicon Tracking System) of the CBM experiment at FAIR - GSI. The deposited charge measurement is based on the Time-over-Threshold method which allows integration of a low-power ADC into each channel. The TOT01 chip comprises 30 identical channels and 1 test channel which is supplied with additional test pads. The major blocks of each channel are the CSA (charge sensitive amplifier) with two switchable constant-current discharge circuits and additional test features. The architecture of the CSA core is based on the folded cascode. The input p-channel MOSFET device, biased at a drain current 500 μA, was optimized for 30 pF detector capacitance while keeping in mind the area constraints — W/L = 1800 μm / 0.180 μm. The main advantage of this solution is high gain (GBW = 1.2 GHz) and low power consumption at the same time. The amplifier is followed by the discriminator circuit. The discriminator allows for a global (multi-channel) differential threshold setting and independent compensation for the CSA output DC-level deviations in each channel by means of a 6-bit digital to analog converter (DAC). The output pulse of this processing chain is fed through a 31:1 multiplexer structure to the output of the chip for further processing. The TOT01 chip has been fabricated in the UMC 0.18 μm CMOS process (Europractice mini@sic). It has 78 pads, measures approximately 1.5x3.2 mm2 and dissipates 33 mW. The channels have 50 μm pitch and each consumes 1.05 mW of power. The chip has been successfully tested. Charge sensitivity parameters, noise performance and first X-ray acquisitions are presented.

  13. Tests of gases in a mini-TPC with pixel chip readout

    Energy Technology Data Exchange (ETDEWEB)

    Vahsen, S. [University of Hawaii, 2505 Correa Road, Honolulu, HI 96822 (United States); Oliver-Mallory, K.; Lopez-Thibodeaux, M. [Lawrence Berkeley National Laboratory, 1 Cyclotron Road, Berkeley, CA 94720 (United States); Kadyk, J., E-mail: jakadyk@lbl.gov [Lawrence Berkeley National Laboratory, 1 Cyclotron Road, Berkeley, CA 94720 (United States); Garcia-Sciveres, M. [Lawrence Berkeley National Laboratory, 1 Cyclotron Road, Berkeley, CA 94720 (United States)

    2014-02-21

    Gases for potential use as targets for directional dark matter detection were tested in a prototype detector using two sequential Gas Electron Multipliers, or GEMs. The sensitive volume consists of a mini-TPC of 12 cm length and 7.5 cm diameter. An FEI3 pixel chip, developed for the ATLAS experiment, was used to produce spatial measurements with high resolution. An Fe55 source produced photoelectrons by X-ray conversions in the sensitive volume, and images of these were recorded by the chip. Spatial resolution plots are shown for the gases, which include the practical electron range of the photoelectrons and the effects of diffusion in the mini-TPC. Avalanche gain and gain resolution measurements were made for the four gases tested, at atmospheric and sub-atmospheric pressures: Ar(70)/CO{sub 2}(30), CF{sub 4}, He(80)/CF{sub 4}(20) and He(80)/isobutane(20)

  14. The performance of the bolometer array and readout system during the 2012/2013 flight of the E and B experiment (EBEX)

    CERN Document Server

    MacDermid, Kevin; Ade, Peter; Aubin, Francois; Baccigalupi, Carlo; Bandura, Kevin; Bao, Chaoyun; Borrill, Julian; Chapman, Daniel; Didier, Joy; Dobbs, Matt; Grain, Julien; Grainger, Will; Hanany, Shaul; Helson, Kyle; Hillbrand, Seth; Hilton, Gene; Hubmayr, Hannes; Irwin, Kent; Johnson, Bradley; Jaffe, Andrew; Jones, Terry; Kisner, Ted; Klein, Jeff; Korotkov, Andrei; Lee, Adrian; Levinson, Lorne; Limon, Michele; Miller, Amber; Milligan, Michael; Pascale, Enzo; Raach, Kate; Reichborn-Kjennerud, Britt; Reintsema, Carl; Sagiv, Ilan; Smecher, Graeme; Stompor, Radek; Tristram, Matthieu; Tucker, Greg; Westbrook, Ben; Zilic, Kyle

    2014-01-01

    EBEX is a balloon-borne telescope designed to measure the polarization of the cosmic microwave background radiation. During its eleven day science flight in the Austral Summer of 2012, it operated 955 spider-web transition edge sensor (TES) bolometers separated into bands at 150, 250 and 410 GHz. This is the first time that an array of TES bolometers has been used on a balloon platform to conduct science observations. Polarization sensitivity was provided by a wire grid and continuously rotating half-wave plate. The balloon implementation of the bolometer array and readout electronics presented unique development requirements. Here we present an outline of the readout system, the remote tuning of the bolometers and Superconducting QUantum Interference Device (SQUID) amplifiers, and preliminary current noise of the bolometer array and readout system.

  15. Characterization of M-π-n CdTe pixel detectors coupled to HEXITEC readout chip

    Science.gov (United States)

    Veale, M. C.; Kalliopuska, J.; Pohjonen, H.; Andersson, H.; Nenonen, S.; Seller, P.; Wilson, M. D.

    2012-01-01

    Segmentation of the anode-side of an M-π-n CdTe diode, where the pn-junction is diffused into the detector bulk, produces large improvements in the spatial and energy resolution of CdTe pixel detectors. It has been shown that this fabrication technique produces very high inter-pixel resistance and low leakage currents are obtained by physical isolation of the pixels of M-π-n CdTe detectors. In this paper the results from M-π-n CdTe detectors stud bonded to a spectroscopic readout ASIC are reported. The CdTe pixel detectors have 250 μm pitch and an area of 5 × 5 mm2 with thicknesses of 1 and 2 mm. The polarization and energy resolution dependence of the M-π-n CdTe detectors as a function of detector thickness are discussed.

  16. Study of Charge Diffusion in a Silicon Detector Using an Energy Sensitive Pixel Readout Chip

    CERN Document Server

    Schioppa, E. J.; van Beuzekom, M.; Visser, J.; Koffeman, E.; Heijne, E.; Engel, K. J.; Uher, J.

    2015-01-01

    A 300 μm thick thin p-on-n silicon sensor was connected to an energy sensitive pixel readout ASIC and exposed to a beam of highly energetic charged particles. By exploiting the spectral information and the fine segmentation of the detector, we were able to measure the evolution of the transverse profile of the charge carriers cloud in the sensor as a function of the drift distance from the point of generation. The result does not rely on model assumptions or electric field calculations. The data are also used to validate numerical simulations and to predict the detector spectral response to an X-ray fluorescence spectrum for applications in X-ray imaging.

  17. Study of the VMM1 read-out chip in a neutron irradiation environment

    Science.gov (United States)

    Alexopoulos, T.; Fanourakis, G.; Geralis, T.; Kokkoris, M.; Kourkoumeli-Charalampidi, A.; Papageorgiou, K.; Tsipolitis, G.

    2016-05-01

    Within 2015, the LHC operated close to the design energy of √s = 13–14 TeV delivering instantaneous luminosities up to Script L = 5 × 1033 cm‑2s‑1. The ATLAS Phase-I upgrade in 2018/19 will introduce the MicroMEGAS detectors in the area of the small wheel at the end caps. Accompanying new electronics are designed and built such as the VMM front end ASIC, which provides energy, timing and triggering information and allows fast data read-out. The first VMM version (VMM1) has been widely produced and tested in various test beams, whilst the second version (VMM2) is currently being tested. This paper focuses on the VMM1 single event upset studies and more specifically on the response of the configuration registers under harsh radiation environments. Similar conditions are expected at Run III with Script L = 2 × 1034 cm‑2s‑1 and a mean of 55 interactions per bunch crossing. Two VMM1s were exposed in a neutron irradiation environment using the TANDEM Van Der Graaff accelerator at NSCR Demokritos, Athens, Greece. The results showed a rate of SEU occurrences at a measured cross section of (4.1±0.8)×10‑14 cm2/bit for each VMM. Consequently, when extrapolating this value to the luminosity expected in Run III, the occurrence is roughly 6 SEUs/min in all the read-out system comprising 40,000 VMMs installed during the Phase-I upgrade.

  18. A Silicon-Germanium Single Chip Receiver for S-band Phased Array Radars

    NARCIS (Netherlands)

    Heij, W. de; Boer, A. de; Hek, A.P. de; Vliet, F.E. van

    2011-01-01

    A Silicon-Germanium single chip receiver has been developed for S-band phased array radars with 2-D digital beamforming. The complete receiver chain from the S-band RF input up to the low-IF output has been integrated on a single SiGe chip. The only external components required to complete the recei

  19. A programmable energy efficient readout chip for a multiparameter highly integrated implantable biosensor system

    Science.gov (United States)

    Nawito, M.; Richter, H.; Stett, A.; Burghartz, J. N.

    2015-11-01

    In this work an Application Specific Integrated Circuit (ASIC) for an implantable electrochemical biosensor system (SMART implant, Stett et al., 2014) is presented. The ASIC drives the measurement electrodes and performs amperometric measurements for determining the oxygen concentration, potentiometric measurements for evaluating the pH-level as well as temperature measurements. A 10-bit pipeline analog to digital (ADC) is used to digitize the acquired analog samples and is implemented as a single stage to reduce power consumption and chip area. For pH measurements, an offset subtraction technique is employed to raise the resolution to 12-bits. Charge integration is utilized for oxygen and temperature measurements with the capability to cover current ranges between 30 nA and 1 μA. In order to achieve good performance over a wide range of supply and process variations, internal reference voltages are generated from a programmable band-gap regulated circuit and biasing currents are supplied from a wide-range bootstrap current reference. To accommodate the limited available electrical power, all components are designed for low power operation. Also a sequential operation approach is applied, in which essential circuit building blocks are time multiplexed between different measurement types. All measurement sequences and parameters are programmable and can be adjusted for different tissues and media. The chip communicates with external unites through a full duplex two-wire Serial Peripheral Interface (SPI), which receives operational instructions and at the same time outputs the internally stored measurement data. The circuit has been fabricated in a standard 0.5-μm CMOS process and operates on a supply as low as 2.7 V. Measurement results show good performance and agree with circuit simulation. It consumes a maximum of 500 μA DC current and is clocked between 500 kHz and 4 MHz according to the measurement parameters. Measurement results of the on-chip ADC show a

  20. A frequency and sensitivity tunable microresonator array for high-speed quantum processor readout

    Energy Technology Data Exchange (ETDEWEB)

    Whittaker, J. D., E-mail: jwhittaker@dwavesys.com; Swenson, L. J.; Volkmann, M. H.; Spear, P.; Altomare, F.; Berkley, A. J.; Bunyk, P.; Harris, R.; Hilton, J. P.; Hoskinson, E.; Johnson, M. W.; Ladizinsky, E.; Lanting, T.; Oh, T.; Perminov, I.; Tolkacheva, E.; Yao, J. [D-Wave Systems, Inc., Burnaby, British Columbia V5G 4M9 (Canada); Bumble, B.; Day, P. K.; Eom, B. H. [Jet Propulsion Laboratory, California Institute of Technology, Pasadena, California 91109 (United States); and others

    2016-01-07

    Superconducting microresonators have been successfully utilized as detection elements for a wide variety of applications. With multiplexing factors exceeding 1000 detectors per transmission line, they are the most scalable low-temperature detector technology demonstrated to date. For high-throughput applications, fewer detectors can be coupled to a single wire but utilize a larger per-detector bandwidth. For all existing designs, fluctuations in fabrication tolerances result in a non-uniform shift in resonance frequency and sensitivity, which ultimately limits the efficiency of bandwidth utilization. Here, we present the design, implementation, and initial characterization of a superconducting microresonator readout integrating two tunable inductances per detector. We demonstrate that these tuning elements provide independent control of both the detector frequency and sensitivity, allowing us to maximize the transmission line bandwidth utilization. Finally, we discuss the integration of these detectors in a multilayer fabrication stack for high-speed readout of the D-Wave quantum processor, highlighting the use of control and routing circuitry composed of single-flux-quantum loops to minimize the number of control wires at the lowest temperature stage.

  1. Calibration scheme for large Kinetic Inductance Detector Arrays based on Readout Frequency Response

    CERN Document Server

    Bisigello, L; Murugesan, V; Baselmans, J J A; Baryshev, A M

    2016-01-01

    Microwave kinetic inductance detector (MKID) provides a way to build large ground based sub-mm instruments such as NIKA and A-MKID. For such instruments, therefore, it is important to understand and characterize the response to ensure good linearity and calibration over wide dynamic range. We propose to use the MKID readout frequency response to determine the MKID responsivity to an input optical source power. A signal can be measured in a KID as a change in the phase of the readout signal with respect to the KID resonant circle. Fundamentally, this phase change is due to a shift in the KID resonance frequency, in turn due to a radiation induced change in the quasiparticle number in the superconducting resonator. We show that shift in resonant frequency can be determined from the phase shift by using KID phase versus frequency dependence using a previously measured resonant frequency. Working in this calculated resonant frequency, we gain near linearity and constant calibration to a constant optical signal ap...

  2. Array of virtual Frisch-grid CZT detectors with common cathode readout and pulse-height correction

    Energy Technology Data Exchange (ETDEWEB)

    Bolotnikov, A.E.; Camarda, G.S.; Cui, Y.; Egarievwe, E.U.; Fochuk, P.M.; Fuerstnau, M.; Gul, R.; Hossain, A.; Jones, F.; Kim, K.; Kopach, O.V.; Taggart, R.; Yang, G.; Ye, Z.; Xu, L.; and James, R.B.

    2010-08-01

    We present our new results from testing 15-mm-long virtual Frisch-grid CdZnTe detectors with a common-cathode readout for correcting pulse-height distortions. The array employs parallelepiped-shaped CdZnTe (CZT) detectors of a large geometrical aspect ratio, with two planar contacts on the top and bottom surfaces (anode and cathode) and an additional shielding electrode on the crystal's sides to create the virtual Frisch-grid effect. We optimized the geometry of the device and improved its spectral response. We found that reducing to 5 mm the length of the shielding electrode placed next to the anode had no adverse effects on the device's performance. At the same time, this allowed corrections for electron loss by reading the cathode signals to obtain depth information.

  3. Simultaneous detection of lactate and glucose by integrated printed circuit board based array sensing chip

    International Nuclear Information System (INIS)

    Highlights: ► An integrated printed circuit board (PCB) based array sensing chip was developed. ► Simultaneous detection of lactate and glucose in serum has been demonstrated. ► The array electronic biochip has high signal to noise ratio and high sensitivity. ► Additional electrodes were designed on the chip to correct interferences. -- Abstract: An integrated printed circuit board (PCB) based array sensing chip was developed to simultaneously detect lactate and glucose in mouse serum. The novelty of the chip relies on a concept demonstration of inexpensive high-throughput electronic biochip, a chip design for high signal to noise ratio and high sensitivity by construction of positively charged chitosan/redox polymer Polyvinylimidazole-Os (PVI-Os)/carbon nanotube (CNT) composite sensing platform, in which the positively charged chitosan/PVI-Os is mediator and electrostatically immobilizes the negatively charged enzyme, while CNTs function as an essential cross-linker to network PVI-Os and chitosan due to its negative charged nature. Additional electrodes on the chip with the same sensing layer but without enzymes were prepared to correct the interferences for high specificity. Low detection limits of 0.6 μM and 5 μM were achieved for lactate and glucose, respectively. This work could be extended to inexpensive array sensing chips with high sensitivity, good specificity and high reproducibility for various sensor applications

  4. Simultaneous detection of lactate and glucose by integrated printed circuit board based array sensing chip

    Energy Technology Data Exchange (ETDEWEB)

    Li, Xuelian [Institute for Clean Energy and Advanced Materials, Southwest University, Chongqing 400715 (China); School of Chemistry and Chemical Engineering, Southwest University, Chongqing 400715 (China); Zang, Jianfeng [Department of Mechanical Engineering and Materials Science, Duke University, Durham, NC 27708 (United States); Liu, Yingshuai; Lu, Zhisong [Institute for Clean Energy and Advanced Materials, Southwest University, Chongqing 400715 (China); Li, Qing, E-mail: Qli@swu.edu.cn [School of Chemistry and Chemical Engineering, Southwest University, Chongqing 400715 (China); Li, Chang Ming, E-mail: ecmli@swu.edu.cn [Institute for Clean Energy and Advanced Materials, Southwest University, Chongqing 400715 (China)

    2013-04-10

    Highlights: ► An integrated printed circuit board (PCB) based array sensing chip was developed. ► Simultaneous detection of lactate and glucose in serum has been demonstrated. ► The array electronic biochip has high signal to noise ratio and high sensitivity. ► Additional electrodes were designed on the chip to correct interferences. -- Abstract: An integrated printed circuit board (PCB) based array sensing chip was developed to simultaneously detect lactate and glucose in mouse serum. The novelty of the chip relies on a concept demonstration of inexpensive high-throughput electronic biochip, a chip design for high signal to noise ratio and high sensitivity by construction of positively charged chitosan/redox polymer Polyvinylimidazole-Os (PVI-Os)/carbon nanotube (CNT) composite sensing platform, in which the positively charged chitosan/PVI-Os is mediator and electrostatically immobilizes the negatively charged enzyme, while CNTs function as an essential cross-linker to network PVI-Os and chitosan due to its negative charged nature. Additional electrodes on the chip with the same sensing layer but without enzymes were prepared to correct the interferences for high specificity. Low detection limits of 0.6 μM and 5 μM were achieved for lactate and glucose, respectively. This work could be extended to inexpensive array sensing chips with high sensitivity, good specificity and high reproducibility for various sensor applications.

  5. Indium bump array fabrication on small CMOS circuit for flip-chip bonding

    Institute of Scientific and Technical Information of China (English)

    Huang Yuyang; Zhang Yuxiang; Yin Zhizhen; Cui Guoxin; Liu H C; Bian Lifeng; Yang Hui; Zhang Yaohui

    2011-01-01

    We demonstrate a novel method for indium bump fabrication on a small CMOS circuit chip that is to be flip-chip bonded with a GaAs/AlGaAs multiple quantum well spatial light modulator.A chip holder with a via hole is used to coat the photoresist for indium bump lift-off.The 1000 μm-wide photoresist edge bead around the circuit chip can be reduced to less than 500μm,which ensures the integrity of the indium bump array.64 × 64 indium arrays with 20 μm-high,30 μm-diameter bumps are successfully formed on a 5 × 6.5 mm2 CMOS chip.

  6. Pixelized M-pi-n CdTe detector coupled to Medipix2 readout chip

    CERN Document Server

    Kalliopuska, J; Penttila, R; Andersson, H; Nenonen, S; Gadda, A; Pohjonen, H; Vanttajac, I; Laaksoc, P; Likonen, J

    2011-01-01

    We have realized a simple method for patterning an M-pi-n CdTe diode with a deeply diffused pn-junction, such as indium anode on CdTe. The method relies on removing the semiconductor material on the anode-side of the diode until the physical junction has been reached. The pixelization of the p-type CdTe diode with an indium anode has been demonstrated by patterning perpendicular trenches with a high precision diamond blade and pulsed laser. Pixelization or microstrip pattering can be done on both sides of the diode, also on the cathode-side to realize double sided detector configuration. The article compares the patterning quality of the diamond blade process, pulsed pico-second and femto-second lasers processes. Leakage currents and inter-strip resistance have been measured and are used as the basis of the comparison. Secondary ion mass spectrometry (SIMS) characterization has been done for a diode to define the pn-junction depth and to see the effect of the thermal loads of the flip-chip bonding process. Th...

  7. Low-power Broadband Digitizer for Millimeter-Wave Sensor Array Readout Project

    Data.gov (United States)

    National Aeronautics and Space Administration — Multiplexing in frequency domain using a bank of high-Q micro-resonators is an emerging method of reading out large arrays of transition-edge sensors and...

  8. Visible Blind SiC Array with Low Noise Readout Project

    Data.gov (United States)

    National Aeronautics and Space Administration — To date, we have (i) designed and fabricated both common cathode and common anode SiC detector arrays; (ii) designed and fabricated the detector packaging (FPA),...

  9. A 32x32 Direct Hybrid Germanium Photoconductor Array with CTIA Readout Multiplexer Project

    Data.gov (United States)

    National Aeronautics and Space Administration — This proposal introduces an innovative concept aimed to develop, for the first time, a 1k pixel far infrared focal-plane array with the following key design...

  10. A 32x32 Direct Hybrid Germanium Photoconductor Array with CTIA Readout Multiplexer Project

    Data.gov (United States)

    National Aeronautics and Space Administration — We propose to investigate the feasibility of developing a two-dimensional far infrared photoconductor array with the following key design features: 1- A...

  11. A frequency and sensitivity tunable microresonator array for high-speed quantum processor readout

    CERN Document Server

    Whittaker, J D; Volkmann, M H; Spear, P; Altomare, F; Berkley, A J; Bumble, B; Bunyk, P; Day, P K; Eom, B H; Harris, R; Hilton, J P; Hoskinson, E; Johnson, M W; Kleinsasser, A; Ladizinsky, E; Lanting, T; Oh, T; Perminov, I; Tolkacheva, E; Yao, J

    2015-01-01

    Superconducting microresonators have been successfully utilized as detection elements for a wide variety of applications. With multiplexing factors exceeding 1,000 detectors per transmission line, they are the most scalable low-temperature detector technology demonstrated to date. For high-throughput applications, fewer detectors can be coupled to a single wire but utilize a larger per-detector bandwidth. For all existing designs, fluctuations in fabrication tolerances result in a non-uniform shift in resonance frequency and sensitivity, which ultimately limits the efficiency of band-width utilization. Here we present the design, implementation, and initial characterization of a superconducting microresonator readout integrating two tunable inductances per detector. We demonstrate that these tuning elements provide independent control of both the detector frequency and sensitivity, allowing us to maximize the transmission line bandwidth utilization. Finally we discuss the integration of these detectors in a m...

  12. The RD53 collaboration's SystemVerilog-UVM simulation framework and its general applicability to design of advanced pixel readout chips

    International Nuclear Information System (INIS)

    The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip building blocks (Intellectual Properties, IPs). This work is focused on the implemented simulation and verification environment named VEPIX53, built using the SystemVerilog language and the Universal Verification Methodology (UVM) class library in the framework of the RD53 Collaboration. The environment supports pixel chips at different levels of description: its reusable components feature the generation of different classes of parameterized input hits to the pixel matrix, monitoring of pixel chip inputs and outputs, conformity checks between predicted and actual outputs and collection of statistics on system performance. The environment has been tested performing a study of shared architectures of the trigger latency buffering section of pixel chips. A fully shared architecture and a distributed one have been described at behavioral level and simulated; the resulting memory occupancy statistics and hit loss rates have subsequently been compared

  13. Focal plane array readout integrated circuit with per-pixel analog-to-digital and digital-to-analog conversion

    Science.gov (United States)

    Kleinfelder, Stuart; Hottes, Alison; Pease, R. Fabian W.

    2000-07-01

    A pixel array readout integrated circuit (ROIC) containing per-pixel analog-to-digital conversion (ADC) and digital-to- analog conversion (DAC) for infrared detectors is presented with design and test result details. Fabricated in a standard 0.35 micron, 3.3 volt CMOS technology. the prototype consists of a linear array of 64 pixels, containing over 100 transistors per 30 by 30 micron pixel. The 8-bit per-pixel ADC is a Nyquist-rate single-slope design consisting of a three stage comparator and an 8 bit memory. This fully pixel- parallel ADC architecture operates in full-frame 'snapshot' mode and can reach over 1,000 frames per second. Each pixel also contains cascoded current source, globally biased to subtract an identical, fixed amount of current from each pixel in order to remove a common background signal by 'charge skimming.' It operates over more than 3 decades of current cancellation (approximately 10 pA to > 10 nA). As well, each pixel contains a 4 to 6+ bit current-mode DAC, intended to trim-out pixel-to-pixel variations in background current. It consists of 16 unit-cells of switched cascoded current sources per pixel, organized as two separately biased weights and controlled by a 16-bit per-pixel memory. The DAC operates over more than 4 decades of current cancellation (< 10 pA to approximately equals 100 nA) per least significant bit (LSB).

  14. Distributed Read-out Imaging Device array for astronomical observations in UV/VIS

    NARCIS (Netherlands)

    Hijmering, R.A.

    2009-01-01

    STJ (Superconducting Tunneling Junctions) are being developed as spectro-photometers in wavelengths ranging from the NIR to X-rays. 10x12 arrays of STJs have already been successfully used as optical imaging spectrometers with the S-Cam 3, on the William Hershel Telescope on La Palma and on the Opti

  15. TARGET: toward a solution for the readout electronics of the Cherenkov Telescope Array

    CERN Document Server

    Tibaldo, L; Albert, A M; Funk, S; Kawashima, T; Kraus, M; Okumura, A; Sapozhnikov, L; Tajima, H; Varner, G S; Wu, T; Zink, A

    2015-01-01

    TARGET is an application specific integrated circuit (ASIC) designed to read out signals recorded by the photosensors in cameras of very-high-energy gamma-ray telescopes exploiting the imaging of Cherenkov radiation from atmospheric showers. TARGET capabilities include sampling at a high rate (typically 1 GSample/s), digitization, and triggering on the sum of four adjacent pixels. The small size, large number of channels read out per ASIC (16), low cost per channel, and deep buffer for trigger latency (~16 $\\mu$s at 1 GSample/s) make TARGET ideally suited for the readout in systems with a large number of telescopes instrumented with compact photosensors like multi-anode or silicon photomultipliers combined with dual-mirror optics. The possible advantages of such systems are better sensitivity, a larger field of view, and improved angular resolution. The two latest generations of TARGET ASICs, TARGET 5 and TARGET 7, are soon to be used for the first time in two prototypes of small-sized and medium-sized dual-m...

  16. Towards on-chip time-resolved thermal mapping with micro-/nanosensor arrays

    Science.gov (United States)

    Liu, Haixiao; Sun, Weiqiang; Xiang, An; Shi, Tuanwei; Chen, Qing; Xu, Shengyong

    2012-08-01

    In recent years, thin-film thermocouple (TFTC) array emerged as a versatile candidate in micro-/nanoscale local temperature sensing for its high resolution, passive working mode, and easy fabrication. However, some key issues need to be taken into consideration before real instrumentation and industrial applications of TFTC array. In this work, we will demonstrate that TFTC array can be highly scalable from micrometers to nanometers and that there are potential applications of TFTC array in integrated circuits, including time-resolvable two-dimensional thermal mapping and tracing the heat source of a device. Some potential problems and relevant solutions from a view of industrial applications will be discussed in terms of material selection, multiplexer reading, pattern designing, and cold-junction compensation. We show that the TFTC array is a powerful tool for research fields such as chip thermal management, lab-on-a-chip, and other novel electrical, optical, or thermal devices.

  17. Development of a novel pixel-level signal processing chain for fast readout 3D integrated CMOS pixel sensors

    Energy Technology Data Exchange (ETDEWEB)

    Fu, Y.; Torheim, O.; Hu-Guo, C. [Institut Pluridisciplinaire Hubert Curien (IPHC), 23 rue du loess, BP 28, 67037 Strasbourg (France); Degerli, Y. [CEA Saclay, IRFU/SEDI, 91191 Gif-sur-Yvette Cedex (France); Hu, Y., E-mail: yann.hu@iphc.cnrs.fr [Institut Pluridisciplinaire Hubert Curien (IPHC), 23 rue du loess, BP 28, 67037 Strasbourg (France)

    2013-03-11

    In order to resolve the inherent readout speed limitation of traditional 2D CMOS pixel sensors, operated in rolling shutter readout, a parallel readout architecture has been developed by taking advantage of 3D integration technologies. Since the rows of the pixel array are zero-suppressed simultaneously instead of sequentially, a frame readout time of a few microseconds is expected for coping with high hit rates foreseen in future collider experiments. In order to demonstrate the pixel readout functionality of such a pixel sensor, a 2D proof-of-concept chip including a novel pixel-level signal processing chain was designed and fabricated in a 0.13μm CMOS technology. The functionalities of this chip have been verified through experimental characterization.

  18. Distributed Read-out Imaging Device array for astronomical observations in UV/VIS

    Science.gov (United States)

    Hijmering, Richard A.

    2009-12-01

    STJ (Superconducting Tunneling Junctions) are being developed as spectro-photometers in wavelengths ranging from the NIR to X-rays. 10x12 arrays of STJs have already been successfully used as optical imaging spectrometers with the S-Cam 3, on the William Hershel Telescope on La Palma and on the Optical Ground Station on Tenerife. To overcome the limited field of view which can be achieved with single STJ arrays, DROIDS (Distributed Read Out Imaging Devices) are being developed which produce next to energy and timing also produce positional information with each detector element. These DROIDS consist of a superconducting absorber strip with proximized STJs on either end. The STJs are a Ta/Al/AlOx/Al/Ta 100/30/1/30/100nm sandwich of which the bottom electrode Ta layer is one with the 100nm thick absorber layer. The ratio of the two signals from the STJs provides information on the absorption position and the sum signal is a measure for the energy of the absorbed photon. In this thesis we present different important processes which are involved with the detection of optical photons using DROIDs. This includes the spatial and spectral resolution, confinement of the quasiparticles in the proximized STJs to enhance tunnelling and quasiparticle creation resulting from absorption of a photon in the proximized STJ. We have combined our findings in the development of a 2D theoretical model which describes the diffusion of quasiparticles and imperfect confinement via exchange of quasiparticles between the absorber and STJ. Finally we will present some of the first results obtained with an array of 60 360x33.5 μm2 DROIDs in 3x20 format.

  19. An Infrared Readout Circuit with On-chip Compensation%一种具有片上补偿功能的红外读出电路

    Institute of Scientific and Technical Information of China (English)

    阙隆成; 吕坚; 魏林海; 周云; 蒋亚东

    2015-01-01

    针对非制冷红外探测器系统,提出了一种恒流偏置的红外读出电路(ROIC),该电路具有衬底温度补偿功能,且可实现片上偏移非均匀性补偿。基于微测辐射热计等效电阻受目标温度、衬底温度等影响的等效模型,每个读出通道采用两个盲电阻以消除衬底温度的影响,同时使用DAC逐点调节参考电压,以完成片上偏移非均匀性补偿。该ROIC 应用到阵列大小为320×240的非制冷微测辐射热计焦平面上,已在CSMC 05MIXDDST02的0.5m CMOS标准工艺下成功流试验片。电路测试结果表明:对于常温目标,当衬底温度变化60 K时,输出电压变化小于500 mV;经偏移非均匀性补偿后,阵列的固定图像噪声为11.8 mV。该ROIC适用于应用于复杂温度环境的高均匀性非制冷红外探测器。%This paper describes a constant current-biased readout circuit with substrate temperature compensation and non-uniformity compensation for the uncooled micro-bolometer detector. The influence of temperature for the equivalent resistance of micro-bolometer is evaluated. Then an effective way for substrate temperature compensation is proposed, which utilizes two blind micro-bolometers in each readout circuit channel. On the other hand, the non-uniformity compensation is also achieved by a 5bits on-chip DAC. A 320×240 uncooled micro-bolometer focal plane array(FPA)based on the proposed circuit was implemented on silicon by 0.5m CMOS technology. The measurement data show that the maximum difference of a normal temperature object over 60K substrate of which temperature change is only 500mV and the fixed pattern noise(FPN)is less than 11.8mV. Thus it is ideally suited for high performance production applications.

  20. 一种具有片上补偿功能的红外读出电路%An Infrared Readout Circuit with On-chip Compensation

    Institute of Scientific and Technical Information of China (English)

    阙隆成; 吕坚; 魏林海; 周云; 蒋亚东

    2015-01-01

    针对非制冷红外探测器系统,提出了一种恒流偏置的红外读出电路(ROIC),该电路具有衬底温度补偿功能,且可实现片上偏移非均匀性补偿。基于微测辐射热计等效电阻受目标温度、衬底温度等影响的等效模型,每个读出通道采用两个盲电阻以消除衬底温度的影响,同时使用DAC逐点调节参考电压,以完成片上偏移非均匀性补偿。该ROIC 应用到阵列大小为320×240的非制冷微测辐射热计焦平面上,已在CSMC 05MIXDDST02的0.5m CMOS标准工艺下成功流试验片。电路测试结果表明:对于常温目标,当衬底温度变化60 K时,输出电压变化小于500 mV;经偏移非均匀性补偿后,阵列的固定图像噪声为11.8 mV。该ROIC适用于应用于复杂温度环境的高均匀性非制冷红外探测器。%This paper describes a constant current-biased readout circuit with substrate temperature compensation and non-uniformity compensation for the uncooled micro-bolometer detector. The influence of temperature for the equivalent resistance of micro-bolometer is evaluated. Then an effective way for substrate temperature compensation is proposed, which utilizes two blind micro-bolometers in each readout circuit channel. On the other hand, the non-uniformity compensation is also achieved by a 5bits on-chip DAC. A 320×240 uncooled micro-bolometer focal plane array(FPA)based on the proposed circuit was implemented on silicon by 0.5m CMOS technology. The measurement data show that the maximum difference of a normal temperature object over 60K substrate of which temperature change is only 500mV and the fixed pattern noise(FPN)is less than 11.8mV. Thus it is ideally suited for high performance production applications.

  1. Gossipo-3 A prototype of a Front-End Pixel Chip for Read-Out of Micro-Pattern Gas Detectors

    CERN Document Server

    Brezina, Christpoh; van der Graaf, Haryy; Gromov, Vladimir; Kluit, Ruud; Kruth, Andre; Zappon, Francesco

    2009-01-01

    In a joint effort of Nikhef (Amsterdam) and the University of Bonn, the Gossipo-3 integrated circuit (IC) has been developed. This circuit is a prototype of a chip dedicated for read-out of various types of position sensitive Micro-Pattern Gas detectors (MPGD). The Gossipo-3 is defined as a set of building blocks to be used in a future highly granulated (60 μm) chip. The pixel circuit can operate in two modes. In Time mode every readout pixel measures the hit arrival time and the charge deposit. For this purpose it has been equipped with a high resolution TDC (1.7 ns) covering dynamic range up to 102 μs. Charge collected by the pixel will be measured using Time-over- Threshold method in the range from 400 e- to 28000 e- with accuracy of 200 e- (standard deviation). In Counting mode every pixel operates as a 24-bit counter, counting the number of incoming hits. The circuit is also optimized to operate at low power consumption (100 mW/cm2) that is required to avoid the need for massive power transport and coo...

  2. Development of the quality control system of the readout electronics for the large size telescope of the Cherenkov Telescope Array observatory

    Science.gov (United States)

    Konno, Y.; Kubo, H.; Masuda, S.; Paoletti, R.; Poulios, S.; Rugliancich, A.; Saito, T.

    2016-07-01

    The Cherenkov Telescope Array (CTA) is the next generation VHE γ-ray observatory which will improve the currently available sensitivity by a factor of 10 in the range 100 GeV to 10 TeV. The array consists of different types of telescopes, called large size telescope (LST), medium size telescope (MST) and small size telescope (SST). A LST prototype is currently being built and will be installed at the Observatorio Roque de los Muchachos, island of La Palma, Canary islands, Spain. The readout system for the LST prototype has been designed and around 300 readout boards will be produced in the coming months. In this note we describe an automated quality control system able to measure basic performance parameters and quickly identify faulty boards.

  3. Realization of readout integrated circuit (ROIC) for an array of 72x4 P-on-N type HgCdTe long wave infrared detectors

    OpenAIRE

    Ceylan, Ömer; Ceylan, Omer

    2008-01-01

    Infrared Focal Plane Arrays (IRFPAs) are important and high-tech systems, which are used in many strategic applications, such as medical imaging, missile guidance, and surveillance systems. The most important building blocks of IRFPAs are detectors and Readout Integrated Circuit (ROIC). Both of them need careful design and implementation for the overall system to be succesful. Detector part produces the photon induced current and sent to the input of ROIC. Detector design and fabrication dete...

  4. Realization of readout integrated circuit (ROIC) for an array of 288x4, N-on-P type HgCdTe long wave infrared detectors

    OpenAIRE

    Kayahan, Hüseyin; Kayahan, Huseyin

    2008-01-01

    Infrared (IR) imaging systems are used in a variety of applications from biomedical to astronomic and strategic imaging. Modern military missile guidance and surveillance systems also incorporate infrared imaging systems. The most critical component of an infrared imaging system is the focal plane array (FPA), a key assembly of detectors and readout electronics to carry out the function of infrared to electrical signal conversion. As in all sensor networks, extraordinary care must be given to...

  5. Simulation of digital pixel readout chip architectures with the RD53 SystemVerilog-UVM verification environment using Monte Carlo physics data

    International Nuclear Information System (INIS)

    The simulation and verification framework developed by the RD53 collaboration is a powerful tool for global architecture optimization and design verification of next generation hybrid pixel readout chips. In this paper the framework is used for studying digital pixel chip architectures at behavioral level. This is carried out by simulating a dedicated, highly parameterized pixel chip description, which makes it possible to investigate different grouping strategies between pixels and different latency buffering and arbitration schemes. The pixel hit information used as simulation input can be either generated internally in the framework or imported from external Monte Carlo detector simulation data. The latter have been provided by both the CMS and ATLAS experiments, featuring HL-LHC operating conditions and the specifications related to the Phase 2 upgrade. Pixel regions and double columns were simulated using such Monte Carlo data as inputs: the performance of different latency buffering architectures was compared and the compliance of different link speeds with the expected column data rate was verified

  6. Gene chip array for differentiation of mycobacterial species and detection of drug resistance

    Institute of Scientific and Technical Information of China (English)

    SHI Xiao-chun; LIU Xiao-qing; XIE Xiu-li; XU Ying-chun; ZHAO Zhi-xian

    2012-01-01

    Background Gene chip array can differentiate isolated mycobacterial strains using vadous mycobacterium specific probes simultaneously.Gene chip array can evaluate drug resistance to isoniazid and rifampin of tuberculosis strains by detecting drug resistance related gene mutation.This technique has great potential for clinical application.We performed a retrospective study to investigate the capability of gene chip array in the rapid differentiation of species and detection of drug resistance in mycobacterium,and to evaluate its clinical efficacy.Methods We selected 39 patients (54 clinical mycobacterium isolates),used gene chip array to identify the species of these isolates and detect drug resistance to isoniazid and rifampin in Mycobacterium tuberculosis isolates.Meanwhile,these patients' clinical data were analyzed retrospectively.Results Among these 39 patients whose mycopacterium culture were positive,32 patients' isolates were identified as Mycobacterium tubercu/osis, all of them were clinical infection. Seven patients' isolates were identified as non-tuberculosis mycobacterium.Analyzed with their clinical data,only two patients were considered as clinical infection,both of them were diagnosed as hematogenous disseminated Mycobacterium introcellulare infection.The other five patients' isolates were of no clinical significance; their clinical samples were all respiratory specimens.Clinical manifestations of tuberculosis and non-tuberculous mycobacterial infections were similar.Isoniazid resistance was detected in two tuberculosis patients,while rifampin resistance was detected in one tuberculosis patient; there was another patient whose Mycobacterium tuberculosis isolate was resistant to both isoniazid and rifampin (belongs to multidrug resistance tuberculosis).The fact that this patient did not respond to routine anti-tuberculosis chemotherapy also confirmed this result.Conclusions Gene chip array may be a simple,rapid,and reliable method for the

  7. Design and implementation of a nanosecond time-stamping readout system-on-chip for photo-detectors

    Energy Technology Data Exchange (ETDEWEB)

    Anvar, Shebli; Château, Frédéric; Le Provost, Hervé; Louis, Frédéric [CEA/Irfu/SEDI Gif-sur-Yvette (France); Manolopoulos, Konstantinos [Physics Department, University of Athens (Greece); Moudden, Yassir, E-mail: yassir.moudden@cea.fr [CEA/Irfu/SEDI Gif-sur-Yvette (France); Vallage, Bertrand [CEA/Irfu/SPP Gif-sur-Yvette (France); Zonca, Eric [CEA/Irfu/SEDI Gif-sur-Yvette (France)

    2014-01-21

    A readout system suitable for a large number of synchronized photo-detection units has been designed. Each unit embeds a specifically designed fully integrated communicating system based on Xilinx FPGA SoC technology. It runs the VxWorks real-time OS and a custom data acquisition software designed within the Ice middleware framework, resulting in a highly flexible, controllable and scalable distributed application. Clock distribution and delay calibration over customized fixed latency gigabit Ethernet links enable synchronous time-stamping of events with nanosecond precision. The implementation of this readout system on several data-collecting units as well as its performances are described.

  8. Characteristics of Off-Chip Millimeter-Wave Radiation from Serial Josephson Junction Arrays

    Institute of Scientific and Technical Information of China (English)

    WANG Zheng; FAN Bin; ZHAO Xin-Jie; YUE Hong-Wei; HE Ming; JI Lu; YAN Shao-Lin; FANG Lan; Klushin A. M.

    2011-01-01

    @@ We investigate the self-emissions from serial high-temperature superconductor bicrystal Josephson junction ar- rays embedded in a quasi-optical resonator.A bicrystal substrate is used as a dielectric resonator antenna, which increases the coupling strength between the junction array and the electromagnetic (EM) wave.Both three-dimension (3D) electromagnetic simulations and experiments are performed.Strong ofT-chip radiations axe measured from the junction array at 78 GHz and 78 K.The proposed method and the experimental results are important for millimeter wave applications in junction arrays.

  9. Efficient, tunable flip-chip-integrated III-V/Si hybrid external-cavity laser array.

    Science.gov (United States)

    Lin, Shiyun; Zheng, Xuezhe; Yao, Jin; Djordjevic, Stevan S; Cunningham, John E; Lee, Jin-Hyoung; Shubin, Ivan; Luo, Ying; Bovington, Jock; Lee, Daniel Y; Thacker, Hiren D; Raj, Kannan; Krishnamoorthy, Ashok V

    2016-09-19

    We demonstrate a surface-normal coupled tunable hybrid silicon laser array for the first time using passively-aligned, high-accuracy flip chip bonding. A 2x6 III-V reflective semiconductor optical amplifier (RSOA) array with integrated total internal reflection mirrors is bonded to a CMOS SOI chip with grating couplers and silicon ring reflectors to form a tunable hybrid external-cavity laser array. Waveguide-coupled wall plug efficiency (wcWPE) of 2% and output power of 3 mW has been achieved for all 12 lasers. We further improved the performance by reducing the thickness of metal/dielectric stacks and achieved 10mW output power and 5% wcWPE with the same integration techniques. This non-invasive, one-step back end of the line (BEOL) integration approach provides a promising solution to high density laser sources for future large-scale photonic integrated circuits.

  10. A 64x64 Low Noise Cryogenic Readout Multiplexer for Far IR Focal-Plane Arrays Project

    Data.gov (United States)

    National Aeronautics and Space Administration — We propose to investigate the feasibility of developing a low noise, two-side buttable, 64x64 readout multiplexer with the following key design features: 1- By far...

  11. Simultaneous detection of lactate and glucose by integrated printed circuit board based array sensing chip.

    Science.gov (United States)

    Li, Xuelian; Zang, Jianfeng; Liu, Yingshuai; Lu, Zhisong; Li, Qing; Li, Chang Ming

    2013-04-10

    An integrated printed circuit board (PCB) based array sensing chip was developed to simultaneously detect lactate and glucose in mouse serum. The novelty of the chip relies on a concept demonstration of inexpensive high-throughput electronic biochip, a chip design for high signal to noise ratio and high sensitivity by construction of positively charged chitosan/redox polymer Polyvinylimidazole-Os (PVI-Os)/carbon nanotube (CNT) composite sensing platform, in which the positively charged chitosan/PVI-Os is mediator and electrostatically immobilizes the negatively charged enzyme, while CNTs function as an essential cross-linker to network PVI-Os and chitosan due to its negative charged nature. Additional electrodes on the chip with the same sensing layer but without enzymes were prepared to correct the interferences for high specificity. Low detection limits of 0.6 μM and 5 μM were achieved for lactate and glucose, respectively. This work could be extended to inexpensive array sensing chips with high sensitivity, good specificity and high reproducibility for various sensor applications.

  12. A snap-shot mode cryogenic readout circuit for QWIPIR FPAs

    Energy Technology Data Exchange (ETDEWEB)

    Ma Wenlong; Shi Yin [Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083 (China); Zhang Yaohui; Liu Hongbing; Xie Baojian, E-mail: wlma2006@sinano.ac.c [Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences, Suzhou 215125 (China)

    2010-02-15

    The design and measurement of a snap-shot mode cryogenic readout circuit (ROIC) for GaAs/AlGaAs QWIP FPAs was reported. CTIA input circuits with pixel level built-in electronic injection transistors were proposed to test the chip before assembly with a detector array. Design optimization techniques for cryogenic and low power are analyzed. An experimental ROIC chip of a 128 x 128 array was fabricated in 0.35 {mu}m CMOS technology. Measurements showed that the ROIC could operate at 77 K with low power dissipation of 35 mW. The chip has a pixel charge capacity of 2.57 x 10{sup 6} electrons and transimpedance of 1.4 x 10{sup 7} {Omega}. Measurements showed that the transimpedance non-uniformity was less than 5% with a 10 MHz readout speed and a 3.3 V supply voltage. (semiconductor integrated circuits)

  13. A snap-shot mode cryogenic readout circuit for QWIPIR FPAs

    International Nuclear Information System (INIS)

    The design and measurement of a snap-shot mode cryogenic readout circuit (ROIC) for GaAs/AlGaAs QWIP FPAs was reported. CTIA input circuits with pixel level built-in electronic injection transistors were proposed to test the chip before assembly with a detector array. Design optimization techniques for cryogenic and low power are analyzed. An experimental ROIC chip of a 128 x 128 array was fabricated in 0.35 μm CMOS technology. Measurements showed that the ROIC could operate at 77 K with low power dissipation of 35 mW. The chip has a pixel charge capacity of 2.57 x 106 electrons and transimpedance of 1.4 x 107 Ω. Measurements showed that the transimpedance non-uniformity was less than 5% with a 10 MHz readout speed and a 3.3 V supply voltage. (semiconductor integrated circuits)

  14. Medipix2 parallel readout system

    Science.gov (United States)

    Fanti, V.; Marzeddu, R.; Randaccio, P.

    2003-08-01

    A fast parallel readout system based on a PCI board has been developed in the framework of the Medipix collaboration. The readout electronics consists of two boards: the motherboard directly interfacing the Medipix2 chip, and the PCI board with digital I/O ports 32 bits wide. The device driver and readout software have been developed at low level in Assembler to allow fast data transfer and image reconstruction. The parallel readout permits a transfer rate up to 64 Mbytes/s. http://medipix.web.cern ch/MEDIPIX/

  15. Development and Test of a High Performance Multi Channel Readout System on a Chip with Application in PET/MR

    OpenAIRE

    2014-01-01

    The availability of new, compact, magnetic field tolerant sensors suitable for PET has opened the opportunity to build highly integrated PET scanners that can be included in commercial MR scanners. This combination has long been expected to have big advantages over existing systems combining PET and CT. This thesis describes my work towards building a highly integrated readout ASIC for application in PET/MR within the framework of the HYPERImage and SUBLIMA projects. It also gives a brief ...

  16. A 15 × 15 single photon avalanche diode sensor featuring breakdown pixels extraction architecture for efficient data readout

    Science.gov (United States)

    Yang, Xiao; Zhu, Hongbo; Nakura, Toru; Iizuka, Tetsuya; Asada, Kunihiro

    2016-04-01

    This paper proposes a breakdown pixels extraction architecture for single photon avalanche diode (SPAD) based faint light detection systems. The proposed extraction circuit detects the breakdown pixels and only their addresses are readout. Therefore, under the faint light environment, this SPAD-based sensor significantly improves the data readout efficiency. In addition, since the readout sequence is 4× faster than that of the conventional architecture in the dark condition, the proposed system does not need an independent on-chip event detection circuit that consumes additional area and power. A test-of-concept chip with a 15 × 15 SPAD pixels array was fabricated in a 0.18 µm 1P5M standard CMOS process and pinhole diffraction patterns were successfully captured thanks to the high sensitivity of the SPAD sensor. Under the faint light condition, a high-speed readout is verified by measurement and the robustness of the proposed architecture is successfully demonstrated.

  17. Test beam results of the first CMS double-sided strip module prototypes using the CBC2 read-out chip

    Energy Technology Data Exchange (ETDEWEB)

    Harb, Ali; Hauk, Johannes; Mussgiller, Andreas [DESY-Hamburg (Germany)

    2015-07-01

    The CMS Binary Chip 2 (CBC2) is a prototype version of the front-end readout ASIC to be used in the silicon stripmodules of the CMS outer tracker during the high-luminosity phase of the LHC. The CBC2 is produced in a 130 nm CMOS technology and bump-bonded to the hybrid of the double layer silicon strip modules, the so-called 2S modules. It has 254 input channels and is designed to provide an on-board trigger with the capability of cluster-width discrimination and high-momentum track identification. In November 2013 the first 2S module prototypes equipped with CBC2 were put under test at the DESY-II test beam facility. Data was collected exploiting a beam of positrons with an energy range of 2 to 4 GeV. The test setup, the event reconstruction, and the analysis results such as beam properties, alignment, clusters properties, and per-chip efficiency are presented.

  18. Submillisecond X-ray photon correlation spectroscopy from a pixel array detector with fast dual gating and no readout dead-time

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, Qingteng; Dufresne, Eric M.; Grybos, Pawel; Kmon, Piotr; Maj, Piotr; Narayanan, Suresh; Deptuch, Grzegorz W.; Szczygiel, Robert; Sandy, Alec

    2016-04-19

    Small-angle scattering X-ray photon correlation spectroscopy (XPCS) studies were performed using a novel photon-counting pixel array detector with dual counters for each pixel. Each counter can be read out independently from the other to ensure there is no readout dead-time between the neighboring frames. A maximum frame rate of 11.8 kHz was achieved. Results on test samples show good agreement with simple diffusion. The potential of extending the time resolution of XPCS beyond the limit set by the detector frame rate using dual counters is also discussed.

  19. Submillisecond X-ray photon correlation spectroscopy from a pixel array detector with fast dual gating and no readout dead-time.

    Science.gov (United States)

    Zhang, Qingteng; Dufresne, Eric M; Grybos, Pawel; Kmon, Piotr; Maj, Piotr; Narayanan, Suresh; Deptuch, Grzegorz W; Szczygiel, Robert; Sandy, Alec

    2016-05-01

    Small-angle scattering X-ray photon correlation spectroscopy (XPCS) studies were performed using a novel photon-counting pixel array detector with dual counters for each pixel. Each counter can be read out independently from the other to ensure there is no readout dead-time between the neighboring frames. A maximum frame rate of 11.8 kHz was achieved. Results on test samples show good agreement with simple diffusion. The potential of extending the time resolution of XPCS beyond the limit set by the detector frame rate using dual counters is also discussed.

  20. Enabling more capability within smaller pixels: advanced wafer-level process technologies for integration of focal plane arrays with readout electronics

    Science.gov (United States)

    Temple, Dorota S.; Vick, Erik P.; Lueck, Matthew R.; Malta, Dean; Skokan, Mark R.; Masterjohn, Christopher M.; Muzilla, Mark S.

    2014-05-01

    Over the past decade, the development of infrared focal plane arrays (FPAs) has seen two trends: decreasing of the pixel size and increasing of signal-processing capability at the device level. Enabling more capability within smaller pixels can be achieved through the use of advanced wafer-level processes for the integration of FPAs with silicon (Si) readout integrated circuits (ROICs). In this paper, we review the development of these wafer-level integration technologies, highlighting approaches in which the infrared sensor is integrated with three-dimensional ROIC stacks composed of multiple layers of Si circuitry interconnected using metal-filled through-silicon vias.

  1. GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

    NARCIS (Netherlands)

    Campbell, M.; Heijne, E.H.M.; Llopart, X.; Colas, P.; Giganon, A.; Giomataris, Y.; Fornaini, A.; Graaf, van der H.; Kluit, P.; Timmermans, J.; Visschers, J.L.; Schmitz, J.

    2005-01-01

    A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50 mm above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficien

  2. High-sensitivity high-throughput chip based biosensor array for multiplexed detection of heavy metals

    Science.gov (United States)

    Yan, Hai; Tang, Naimei; Jairo, Grace A.; Chakravarty, Swapnajit; Blake, Diane A.; Chen, Ray T.

    2016-03-01

    Heavy metal ions released into the environment from industrial processes lead to various health hazards. We propose an on-chip label-free detection approach that allows high-sensitivity and high-throughput detection of heavy metals. The sensing device consists of 2-dimensional photonic crystal microcavities that are combined by multimode interferometer to form a sensor array. We experimentally demonstrate the detection of cadmium-chelate conjugate with concentration as low as 5 parts-per-billion (ppb).

  3. A Design of ABC95 Array Computer Multi-function Interconnection Chips

    Institute of Scientific and Technical Information of China (English)

    2002-01-01

    ABC95 array computer is a multi-function network computer based on FPGA technology. A notable feature of ABC95 array computer is the support of complex interconnection, which determines that the computer must have enough I/O band and flexible communications between Pes. The authors designed the interconnecting network chips of ABC95 and realized a form of multi-function interconnection. The multi-function interconnecting network supports conflict-free access from processors to memory matrix and the MESH network of enhanced processors to processor communications. The design scheme has been proved feasible by experiment.

  4. Pixel readout chips in deep submicron CMOS for ALICE and LHCb tolerant to 10 Mrad and beyond

    NARCIS (Netherlands)

    Snoeys, W.; Burns, M.; Campbell, M.; Cantatore, E.; Cencelli, V.; Dinapoli, R.; Heijne, E.; Jarron, P.; Lamanna, P.; Minervini, D.; Morel, M.; O'Shea, V.; Quiquempoix, V.; San Segundo Bello, D.; Koningsveld, van B.; Wyllie, K.

    2001-01-01

    The ALICE1LHCB chip is a mixed-mode integrated circuit designed to read out silicon pixel detectors for two different applications: particle tracking in the ALICE Silicon Pixel Detector and particle identification in the LHCb Ring Imaging Cherenkov detector. To satisfy the different needs for these

  5. Offset correction system for 128-channel self-triggering readout chip with in-channel 5-bit energy measurement functionality

    Energy Technology Data Exchange (ETDEWEB)

    Otfinowski, P., E-mail: potfin@agh.edu.pl; Grybos, P.; Szczygiel, R.; Kasinski, K.

    2015-04-21

    We report on a novel, two-stage 8-bit trimming solution dedicated for multichannel systems with reduced trim DAC area occupancy. The presented design was used for comparator offset correction in a 128-channel particle tracking, self-triggering readout system and manufactured in 180 nm CMOS process. The 8-bit trim DAC has a range of ±165 mV, current consumption of 3.2 µA and occupies an area of 37 µm×17 µm in each channel, which corresponds to a 6-bit conventional current steering DAC with similar linearity.

  6. Design of On-Chip N-Fold Orbital Angular Momentum Multicasting Using V-Shaped Antenna Array

    Science.gov (United States)

    Du, Jing; Wang, Jian

    2015-01-01

    We design a V-shaped antenna array to realize on-chip multicasting from a single Gaussian beam to four orbital angular momentum (OAM) beams. A pattern search assisted iterative (PSI) algorithm is used to design an optimized continuous phase pattern which is further discretized to generate collinearly superimposed multiple OAM beams. Replacing the designed discrete phase pattern with corresponding V-shaped antennas, on-chip N-fold OAM multicasting is achieved. The designed on-chip 4-fold OAM multicasting exploiting V-shaped antenna array shows favorable operation performance with low crosstalk less than -15 dB. PMID:25951325

  7. Development of hybrid photon detectors with integrated silicon pixel readout for the RICH counters of LHCb

    CERN Document Server

    Alemi, M; Formenti, F; Gys, Thierry; Piedigrossi, D; Puertolas, D; Rosso, E; Snoeys, W; Wyllie, Ken H

    1999-01-01

    We report on the ongoing work towards a hybrid photon detector with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment at the Large Hadron Collider at CERN. The photon detector is based $9 on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a fast, binary readout chip with matching pixel electronics. The $9 performance of a half-scale prototype is presented, together with the developments and tests of a full-scale tube with large active area. Specific requirements for pixel front-end and readout electronics in LHCb are outlined, and $9 recent results obtained from pixel chips applicable to hybrid photon detector design are summarized.

  8. Fully parallel write/read in resistive synaptic array for accelerating on-chip learning

    Science.gov (United States)

    Gao, Ligang; Wang, I.-Ting; Chen, Pai-Yu; Vrudhula, Sarma; Seo, Jae-sun; Cao, Yu; Hou, Tuo-Hung; Yu, Shimeng

    2015-11-01

    A neuro-inspired computing paradigm beyond the von Neumann architecture is emerging and it generally takes advantage of massive parallelism and is aimed at complex tasks that involve intelligence and learning. The cross-point array architecture with synaptic devices has been proposed for on-chip implementation of the weighted sum and weight update in the learning algorithms. In this work, forming-free, silicon-process-compatible Ta/TaO x /TiO2/Ti synaptic devices are fabricated, in which >200 levels of conductance states could be continuously tuned by identical programming pulses. In order to demonstrate the advantages of parallelism of the cross-point array architecture, a novel fully parallel write scheme is designed and experimentally demonstrated in a small-scale crossbar array to accelerate the weight update in the training process, at a speed that is independent of the array size. Compared to the conventional row-by-row write scheme, it achieves >30× speed-up and >30× improvement in energy efficiency as projected in a large-scale array. If realistic synaptic device characteristics such as device variations are taken into an array-level simulation, the proposed array architecture is able to achieve ∼95% recognition accuracy of MNIST handwritten digits, which is close to the accuracy achieved by software using the ideal sparse coding algorithm.

  9. Photon counting readout pixel array in 0.18-μm CMOS technology for on-line gamma-ray imaging of 103palladium seeds for permanent breast seed implant (PBSI) brachytherapy

    Science.gov (United States)

    Goldan, A. H.; Karim, K. S.; Reznik, A.; Caldwell, C. B.; Rowlands, J. A.

    2008-03-01

    Permanent breast seed implant (PBSI) brachytherapy technique was recently introduced as an alternative to high dose rate (HDR) brachytherapy and involves the permanent implantation of radioactive 103Palladium seeds into the surgical cavity of the breast for cancer treatment. To enable accurate seed implantation, this research introduces a gamma camera based on a hybrid amorphous selenium detector and CMOS readout pixel architecture for real-time imaging of 103Palladium seeds during the PBSI procedure. A prototype chip was designed and fabricated in 0.18-μm n-well CMOS process. We present the experimental results obtained from this integrated photon counting readout pixel.

  10. The FE-I4 pixel readout system-on-chip resubmission for the insertable B-Layer project

    CERN Document Server

    Zivkovic, V; Garcia-Sciveres, M; Mekkaoui, A; Barbero, M; Darbo, G; Gnani, D; Hemperek, T; Menouni, M; Fougeron, D; Gensolen, F; Jensen, F; Caminada, L; Gromov, V; Kluit, R; Fleury, J; Krüger, H; Backhaus, M; Fang, X; Gonella, L; Rozanove, A; Arutinov, D

    2012-01-01

    The FE-I4 is a new pixel readout integrated circuit designed to meet the requirements of ATLAS experiment upgrades. The first samples of the FE-I4 engineering run (called FE-I4A) delivered promising results in terms of the requested performances. The FE-I4 team envisaged a number of modifications and fine-tuning before the actual exploitation, planned within the Insertable B-Layer (IBL) of ATLAS. As the IBL schedule was pushed significantly forward, a quick and efficient plan had to be devised for the FE-I4 redesign. This article will present the main objectives of the resubmission, together with the major changes that were a driving factor for this redesign. In addition, the top-level verification and test efforts of the FE-I4 will also be addressed.

  11. VLSI design of an RSA encryption/decryption chip using systolic array based architecture

    Science.gov (United States)

    Sun, Chi-Chia; Lin, Bor-Shing; Jan, Gene Eu; Lin, Jheng-Yi

    2016-09-01

    This article presents the VLSI design of a configurable RSA public key cryptosystem supporting the 512-bit, 1024-bit and 2048-bit based on Montgomery algorithm achieving comparable clock cycles of current relevant works but with smaller die size. We use binary method for the modular exponentiation and adopt Montgomery algorithm for the modular multiplication to simplify computational complexity, which, together with the systolic array concept for electric circuit designs effectively, lower the die size. The main architecture of the chip consists of four functional blocks, namely input/output modules, registers module, arithmetic module and control module. We applied the concept of systolic array to design the RSA encryption/decryption chip by using VHDL hardware language and verified using the TSMC/CIC 0.35 m 1P4 M technology. The die area of the 2048-bit RSA chip without the DFT is 3.9 × 3.9 mm2 (4.58 × 4.58 mm2 with DFT). Its average baud rate can reach 10.84 kbps under a 100 MHz clock.

  12. Nanocavity crossbar arrays for parallel electrochemical sensing on a chip

    Directory of Open Access Journals (Sweden)

    Enno Kätelhön

    2014-07-01

    Full Text Available We introduce a novel device for the mapping of redox-active compounds at high spatial resolution based on a crossbar electrode architecture. The sensor array is formed by two sets of 16 parallel band electrodes that are arranged perpendicular to each other on the wafer surface. At each intersection, the crossing bars are separated by a ca. 65 nm high nanocavity, which is stabilized by the surrounding passivation layer. During operation, perpendicular bar electrodes are biased to potentials above and below the redox potential of species under investigation, thus, enabling repeated subsequent reactions at the two electrodes. By this means, a redox cycling current is formed across the gap that can be measured externally. As the nanocavity devices feature a very high current amplification in redox cycling mode, individual sensing spots can be addressed in parallel, enabling high-throughput electrochemical imaging. This paper introduces the design of the device, discusses the fabrication process and demonstrates its capabilities in sequential and parallel data acquisition mode by using a hexacyanoferrate probe.

  13. Characterization results of the JUNGFRAU full scale readout ASIC

    Science.gov (United States)

    Mozzanica, A.; Bergamaschi, A.; Brueckner, M.; Cartier, S.; Dinapoli, R.; Greiffenberg, D.; Jungmann-Smith, J.; Maliakal, D.; Mezza, D.; Ramilli, M.; Ruder, C.; Schaedler, L.; Schmitt, B.; Shi, X.; Tinti, G.

    2016-02-01

    The two-dimensional pixel detector JUNGFRAU is designed for high performance photon science applications at free electron lasers and synchrotron light sources. It is developed for the SwissFEL currently under construction at the Paul Scherrer Institut, Switzerland. The detector is a hybrid pixel detector with a charge integration readout ASIC characterized by single photon sensitivity and a low noise performance over a dynamic range of 104 12 keV photons. Geometrically, a JUNGFRAU readout chip consists of 256×256 pixels of 75×75 μm2. The chips are bump bonded to 320 μm thick silicon sensors. Arrays of 2×4 chips are tiled to form modules of 4×8 cm2 area. Several multi-module systems with up to 16 Mpixels per system will be delivered to the two end stations at SwissFEL. The JUNGFRAU full scale readout ASIC and module design are presented along with characterization results of the first systems. Experiments from fluorescence X-ray, visible light illumination, and synchrotron irradiation are shown. The results include an electronic noise of ~50 electrons r.m.s., which enables single photon detection energies below 2 keV and a noise well below the Poisson statistical limit over the entire dynamic range. First imaging experiments are also shown.

  14. Microlens-array-enabled on-chip optical trapping and sorting.

    Science.gov (United States)

    Zhao, Xing; Sun, Yuyang; Bu, Jing; Zhu, Siwei; Yuan, X-C

    2011-01-20

    An on-chip optical trapping and sorting system composed of a microchamber and a microlens array (MLA) is demonstrated. The MLA focuses the incident light into multiple confocal spots to trap the particles within the microchamber. The SiO(2)/ZrO(2) solgel material is introduced in the fabrication of MLA for its unique optical and chemical characters. Moreover, in order to prove the effectiveness of the system, experimental demonstration of multibeam trapping and locked-in transport of micropolymer particles in the microchamber is implemented. The system may easily be integrated as microfluidic devices, offering a simple and efficient solution for optical trapping and sorting of biological particles in lab-on-a-chip technologies. PMID:21263729

  15. Capacitive micropressure sensors with underneath readout circuit using a standard CMOS process

    Science.gov (United States)

    Chang, Shihchen; Dai, Chingliang; Chiou, Jinghung; Chang, Peizen

    2001-08-01

    A capacitive micropressure sensor with readout circuits on a single chip is fabricated using commercial 0.35micrometers CMOS process technology and post-processing. The main break through feature of the chip is the positioning of its readout circuits under the pressure sensor, allowing the chip to be smaller. Post-processing included anisotropic dry etching and wet etching to remove the sacrificial layer, and the use of PECVD nitride to seal the etching holes of the pressure sensor. The sacrificial layer was the metal 3 layer of the standard 0.35 micrometers CMOS process. In addition, the readout circuit is divided into analog and digital parts, with the digital part being an alternate coupled RS flip- flop with four inverters that sharpened the output wave. Moreover, the analog part is employed switched capacitor methodology. The pressure sensor contained an 8 X 8 sensing cells array, and the total area of the pressure sensor chip is 2mmx2 mm. In addition to illustrating the design and fabrication of the capacitive pressure sensor, this investigation demonstrates the simulation and testing results of the readout circuit.

  16. Rapid, single-molecule assays in nano/micro-fluidic chips with arrays of closely spaced parallel channels fabricated by femtosecond laser machining.

    Science.gov (United States)

    Canfield, Brian K; King, Jason K; Robinson, William N; Hofmeister, William H; Davis, Lloyd M

    2014-08-20

    Cost-effective pharmaceutical drug discovery depends on increasing assay throughput while reducing reagent needs. To this end, we are developing an ultrasensitive, fluorescence-based platform that incorporates a nano/micro-fluidic chip with an array of closely spaced channels for parallelized optical readout of single-molecule assays. Here we describe the use of direct femtosecond laser machining to fabricate several hundred closely spaced channels on the surfaces of fused silica substrates. The channels are sealed by bonding to a microscope cover slip spin-coated with a thin film of poly(dimethylsiloxane). Single-molecule detection experiments are conducted using a custom-built, wide-field microscope. The array of channels is epi-illuminated by a line-generating red diode laser, resulting in a line focus just a few microns thick across a 500 micron field of view. A dilute aqueous solution of fluorescently labeled biomolecules is loaded into the device and fluorescence is detected with an electron-multiplying CCD camera, allowing acquisition rates up to 7 kHz for each microchannel. Matched digital filtering based on experimental parameters is used to perform an initial, rapid assessment of detected fluorescence. More detailed analysis is obtained through fluorescence correlation spectroscopy. Simulated fluorescence data is shown to agree well with experimental values.

  17. Rapid, Single-Molecule Assays in Nano/Micro-Fluidic Chips with Arrays of Closely Spaced Parallel Channels Fabricated by Femtosecond Laser Machining

    Directory of Open Access Journals (Sweden)

    Brian K. Canfield

    2014-08-01

    Full Text Available Cost-effective pharmaceutical drug discovery depends on increasing assay throughput while reducing reagent needs. To this end, we are developing an ultrasensitive, fluorescence-based platform that incorporates a nano/micro-fluidic chip with an array of closely spaced channels for parallelized optical readout of single-molecule assays. Here we describe the use of direct femtosecond laser machining to fabricate several hundred closely spaced channels on the surfaces of fused silica substrates. The channels are sealed by bonding to a microscope cover slip spin-coated with a thin film of poly(dimethylsiloxane. Single-molecule detection experiments are conducted using a custom-built, wide-field microscope. The array of channels is epi-illuminated by a line-generating red diode laser, resulting in a line focus just a few microns thick across a 500 micron field of view. A dilute aqueous solution of fluorescently labeled biomolecules is loaded into the device and fluorescence is detected with an electron-multiplying CCD camera, allowing acquisition rates up to 7 kHz for each microchannel. Matched digital filtering based on experimental parameters is used to perform an initial, rapid assessment of detected fluorescence. More detailed analysis is obtained through fluorescence correlation spectroscopy. Simulated fluorescence data is shown to agree well with experimental values.

  18. Rapid, single-molecule assays in nano/micro-fluidic chips with arrays of closely spaced parallel channels fabricated by femtosecond laser machining.

    Science.gov (United States)

    Canfield, Brian K; King, Jason K; Robinson, William N; Hofmeister, William H; Davis, Lloyd M

    2014-01-01

    Cost-effective pharmaceutical drug discovery depends on increasing assay throughput while reducing reagent needs. To this end, we are developing an ultrasensitive, fluorescence-based platform that incorporates a nano/micro-fluidic chip with an array of closely spaced channels for parallelized optical readout of single-molecule assays. Here we describe the use of direct femtosecond laser machining to fabricate several hundred closely spaced channels on the surfaces of fused silica substrates. The channels are sealed by bonding to a microscope cover slip spin-coated with a thin film of poly(dimethylsiloxane). Single-molecule detection experiments are conducted using a custom-built, wide-field microscope. The array of channels is epi-illuminated by a line-generating red diode laser, resulting in a line focus just a few microns thick across a 500 micron field of view. A dilute aqueous solution of fluorescently labeled biomolecules is loaded into the device and fluorescence is detected with an electron-multiplying CCD camera, allowing acquisition rates up to 7 kHz for each microchannel. Matched digital filtering based on experimental parameters is used to perform an initial, rapid assessment of detected fluorescence. More detailed analysis is obtained through fluorescence correlation spectroscopy. Simulated fluorescence data is shown to agree well with experimental values. PMID:25140634

  19. Readout electronics for the ATLAS semiconductor tracker

    International Nuclear Information System (INIS)

    The binary readout architecture as a base-line and the analogue one as a fall-forward option have been adopted recently by the ATLAS semiconductor tracker group for the readout of silicon strip detectors. A brief overview of different architectures considered before as well as the status of the binary readout development will be presented. A new idea of the binary readout architecture employing a dual threshold scheme will be discussed and new results obtained for the full analogue readout chip realised in the DMILL technology will be reported. (orig.)

  20. Microtrap arrays on magnetic film atom chips for quantum information science

    CERN Document Server

    Leung, V Y F; van Druten, N J; Spreeuw, R J C

    2011-01-01

    We present two different strategies for developing a quantum information science platform, based on our experimental results with magnetic microtrap arrays on a magnetic-film atom chip. The first strategy aims for mesoscopic ensemble qubits in a lattice of ~5 {\\mu}m period, so that qubits can be individually addressed and interactions can be mediated by Rydberg excitations. The second strategy aims for direct quantum simulators using sub-optical lattices of ~100 nm period. These would allow the realization of condensed matter inspired quantum many-body systems, such as Hubbard models in new parameter regimes. The two approaches raise quite different issues, some of which are identified and discussed.

  1. Development of a prototype PET scanner with depth-of-interaction measurement using solid-state photomultiplier arrays and parallel readout electronics

    Science.gov (United States)

    Shao, Yiping; Sun, Xishan; Lan, Kejian A.; Bircher, Chad; Lou, Kai; Deng, Zhi

    2014-03-01

    In this study, we developed a prototype animal PET by applying several novel technologies to use solid-state photomultiplier (SSPM) arrays to measure the depth of interaction (DOI) and improve imaging performance. Each PET detector has an 8 × 8 array of about 1.9 × 1.9 × 30.0 mm3 lutetium-yttrium-oxyorthosilicate scintillators, with each end optically connected to an SSPM array (16 channels in a 4 × 4 matrix) through a light guide to enable continuous DOI measurement. Each SSPM has an active area of about 3 × 3 mm2, and its output is read by a custom-developed application-specific integrated circuit to directly convert analogue signals to digital timing pulses that encode the interaction information. These pulses are transferred to and are decoded by a field-programmable gate array-based time-to-digital convertor for coincident event selection and data acquisition. The independent readout of each SSPM and the parallel signal process can significantly improve the signal-to-noise ratio and enable the use of flexible algorithms for different data processes. The prototype PET consists of two rotating detector panels on a portable gantry with four detectors in each panel to provide 16 mm axial and variable transaxial field-of-view (FOV) sizes. List-mode ordered subset expectation maximization image reconstruction was implemented. The measured mean energy, coincidence timing and DOI resolution for a crystal were about 17.6%, 2.8 ns and 5.6 mm, respectively. The measured transaxial resolutions at the center of the FOV were 2.0 mm and 2.3 mm for images reconstructed with and without DOI, respectively. In addition, the resolutions across the FOV with DOI were substantially better than those without DOI. The quality of PET images of both a hot-rod phantom and mouse acquired with DOI was much higher than that of images obtained without DOI. This study demonstrates that SSPM arrays and advanced readout/processing electronics can be used to develop a practical DOI

  2. Readout architecture of the CMS pixel detector

    CERN Document Server

    Baur, R

    2001-01-01

    In this paper we describe the readout architecture of the CMS pixel chip. In column drain architecture the complex tasks of data buffering and trigger verification are performed in the circuit periphery. This allows to use a rather simple pixel unit cell which requires only a small number of transistors. The column periphery logic is designed for readout and trigger rates expected for full LHC luminosity. At LHC the high particle flux can create single event upsets in the readout chips. At small radii the upsets of logic cells could severely affect the performance of the pixel detector readout. We have therefore performed a measurement of the upset rate at the PSI pion beam and describe the consequences for the design of the readout chip. (5 refs).

  3. DigiCam - Fully Digital Compact Read-out and Trigger Electronics for the SST-1M Telescope proposed for the Cherenkov Telescope Array

    CERN Document Server

    Rajda, P; Bilnik, W.; Błocki, J.; Bogacz, L.; Bulik, T.; Cadoux, F.; Christov, A.; Curyło, M.; della Volpe, D.; Dyrda, M.; Favre, Y.; Frankowski, A.; Grudnik, Ł.; Grudzińska, M.; Heller, M.; Idźkowski, B.; Jamrozy, M.; Janiak, M.; Kasperek, J.; Lalik, K.; Lyard, E.; Mach, E.; Mandat, D.; Marszałek, A.; Michałowski, J.; Moderski, R.; Rameez, M.; Montaruli, T.; Neronov, A.; Niemiec, J.; Ostrowski, M.; Paśko, P.; Pech, M.; Porcelli, A.; Prandini, E.; Schioppa, E. jr; Schovanek, P.; Seweryn, K.; Skowron, K.; Sliusar, V.; Sowiński, M.; Stawarz, Ł.; Stodulska, M.; Stodulski, M.; Toscano, S.; Pujadas, I. Troyano; Walter, R.; Więcek, M.; Zagdański, A.; Żychowski, P.

    2015-01-01

    The SST-1M is one of three prototype small-sized telescope designs proposed for the Cherenkov Telescope Array, and is built by a consortium of Polish and Swiss institutions. The SST-1M will operate with DigiCam - an innovative, compact camera with fully digital read-out and trigger electronics. A high level of integration will be achieved by massively deploying state-of-the-art multi-gigabit transmission channels, beginning from the ADC flash converters, through the internal data and trigger signals transmission over backplanes and cables, to the camera's server link. Such an approach makes it possible to design the camera to fit the size and weight requirements of the SST-1M exactly, and provide low power consumption, high reliability and long lifetime. The structure of the digital electronics will be presented, along with main physical building blocks and the internal architecture of FPGA functional subsystems.

  4. Front-End Electronics for the Array Readout of a Microwave Kinetic Inductance Detector Towards Observation of Cosmic Microwave Background Polarization

    Science.gov (United States)

    Ishitsuka, H.; Ikeno, M.; Oguri, S.; Tajima, O.; Tomita, N.; Uchida, T.

    2016-07-01

    Precise measurements of polarization patterns in cosmic microwave background (CMB) provide deep knowledge about the begin of the Universe. The GroundBIRD experiment aims to measure the CMB polarization by using microwave kinetic inductance detector (MKID) arrays. The MKID is suited to multiplexing. One of our requirements is a MUX factor (the number of readout channels for a single wire pair) of at least 100. If we make frequency combs of the MKIDs with 2-MHz spacing, a bandwidth of 200 MHz satisfies 100 MUX. The analog electronics must consist of an analog-to-digital converter (ADC), digital-to-analog converter (DAC), and local oscillator. We developed our own analog electronics board " RHEA." Two outputs/inputs of DAC/ADC with a 200-MHz clock provide an effective bandwidth of 200 MHz. The RHEA allows us to measure both the amplitude and phase responses of each MKID simultaneously. These data are continuously sampled at a high rate (e.g., 1 kSPS) and with no dead time. We achieved 12 and 14 bits resolution for ADC and DAC, respectively. This corresponds to achieve that our electronics achieved low noise: 1/1000 compared with the detector noise. We also achieved low power consumption compared with that of other electronics development for other experiments. Another important feature is that the board is completely separated from the digital part. Each user can choose their preferred field-programmable array. With the combination of the Kintex-7 evaluation kit from Xilinx, we demonstrated readout of MKID response.

  5. An investigation into the fabrication and combustion performance of porous silicon nanoenergetic array chips

    Science.gov (United States)

    Wang, Shouxu; Shen, Ruiqi; Ye, Yinghua; Hu, Yan

    2012-11-01

    An investigation into the ignitions and combustions of porous silicon (PS) nanoenergetic material array chips (nECs) at different ignition voltages was performed. The PS nECs were fabricated by integrating PS nanoenergetic material (nEMs) matrices and Cr-microbridges (microigniters) on the surface of silicon substrates. The combustion of PS nECs was in ambient air. Its ignition and combustion were investigated by a testing system and an optical high-speed camera. Experimental results revealed that the combustion delay time of PS nEMs increased from 8.0 × 10-5 s to 1.1 × 10-4 s with the decrement of ignition voltages from 140 to 80 V. The scope of ignition energy ranged from 0.153 to 0.287 mJ by calculations. The reaction type was deflagration, from the analysis of the high-speed video of PS nECs. The comprehensive experimental results indicated that the combustion of PS nECs was ignited by the synergic effect of the heat and the plasma. The ignition experiments suggested that Cr-microbridges were reliable igniters to trigger the self-sustained combustion of PS nECs. The strong plume of flame emitted from the surface of PS nECs indicated that the PS nECs may be applied as micro/nano igniter chips and microthruster chips.

  6. Model based on-chip 13bits ADC design dedicated to uncooled infrared focal plane arrays

    Science.gov (United States)

    Dupont, Benoit; Robert, Patrick; Dupret, Antoine; Villard, Patrick; Pochic, David

    2007-10-01

    This paper presents an on-chip 13 bits 10 M/S Analog to Digital Converter (ADC) specifically designed for infrared bolometric image sensor. Bolometric infrared sensors are MEMs based thermal sensors, which covers a large spectrum of infrared applications, ranging from night vision to predictive industrial maintenance and medical imaging. With the current move towards submicron technologies, the demand for more integrated, smarter sensors and microsystems has dramatically increased. This trend has strengthened the need of on-chip ADC as the interface between the analog core and the digital processing electronic. However designing an on-chip ADC dedicated to focal plane array raises many questions about its architecture and its performance requirements. To take into account those specific needs, a high level model has been developed prior to the actual design. In this paper, we present the trade-offs of ADC design linked to infrared key performance parameters and bolometric technology detection method. The original development scheme, based on system level modeling, is also discussed. Finally we present the actual design and the measured performances.

  7. Picoliter Well Array Chip-Based Digital Recombinase Polymerase Amplification for Absolute Quantification of Nucleic Acids

    Science.gov (United States)

    Li, Zhao; Liu, Yong; Wei, Qingquan; Liu, Yuanjie; Liu, Wenwen; Zhang, Xuelian; Yu, Yude

    2016-01-01

    Absolute, precise quantification methods expand the scope of nucleic acids research and have many practical applications. Digital polymerase chain reaction (dPCR) is a powerful method for nucleic acid detection and absolute quantification. However, it requires thermal cycling and accurate temperature control, which are difficult in resource-limited conditions. Accordingly, isothermal methods, such as recombinase polymerase amplification (RPA), are more attractive. We developed a picoliter well array (PWA) chip with 27,000 consistently sized picoliter reactions (314 pL) for isothermal DNA quantification using digital RPA (dRPA) at 39°C. Sample loading using a scraping liquid blade was simple, fast, and required small reagent volumes (i.e., <20 μL). Passivating the chip surface using a methoxy-PEG-silane agent effectively eliminated cross-contamination during dRPA. Our creative optical design enabled wide-field fluorescence imaging in situ and both end-point and real-time analyses of picoliter wells in a 6-cm2 area. It was not necessary to use scan shooting and stitch serial small images together. Using this method, we quantified serial dilutions of a Listeria monocytogenes gDNA stock solution from 9 × 10-1 to 4 × 10-3 copies per well with an average error of less than 11% (N = 15). Overall dRPA-on-chip processing required less than 30 min, which was a 4-fold decrease compared to dPCR, requiring approximately 2 h. dRPA on the PWA chip provides a simple and highly sensitive method to quantify nucleic acids without thermal cycling or precise micropump/microvalve control. It has applications in fast field analysis and critical clinical diagnostics under resource-limited settings. PMID:27074005

  8. Reconfigurable laser arrays with capillary fill microfluidics for chip-based flow cytometry (Conference Presentation)

    Science.gov (United States)

    Thomas, Robert

    2016-03-01

    Low cost, portable chip based flow cytometry has great potential for applications in resource poor and point of care settings. Typical approaches utilise low cost silicon or glass substrates with light emission and detection performed either off-chip using external equipment or incorporated on-chip using `pick and place' diode lasers and photo-detectors. The former approach adds cost and limits portability while the sub-micron alignment tolerances imposed by the application make the latter impractical for all but the simplest of systems. Use of an optically active semiconductor substrate, on the other hand, overcomes these limitations by allowing multiple laser/detector arrays to be formed in the substrate itself using high resolution lithographic techniques. The capacity for multiple emitters and detectors on a single chip not only enables parallel measurement for increased throughput but also allows multiple measurements to be performed on each cell as it passes through the system. Several different experiments can be performed simultaneously and throughput demand can be reduced with the facility for error checking. Furthermore, the fast switching times inherent with semiconductor lasers allows the active sections of the device to be reconfigured on a sub-microsecond time scale providing additional functionality. This is demonstrated here in a capillary fill system using pairs of laser/detectors that are operated in pulsed mode and alternated between lasing and detecting in an interleaved manner. Passing cells are alternately interrogated from opposing directions providing information that can be used to correct for differences in lateral cell position and ultimately differentiate blood cell type.

  9. HuMiChip: Development of a Functional Gene Array for the Study of Human Microbiomes

    Energy Technology Data Exchange (ETDEWEB)

    Tu, Q.; Deng, Ye; Lin, Lu; Hemme, Chris L.; He, Zhili; Zhou, Jizhong

    2010-05-17

    Microbiomes play very important roles in terms of nutrition, health and disease by interacting with their hosts. Based on sequence data currently available in public domains, we have developed a functional gene array to monitor both organismal and functional gene profiles of normal microbiota in human and mouse hosts, and such an array is called human and mouse microbiota array, HMM-Chip. First, seed sequences were identified from KEGG databases, and used to construct a seed database (seedDB) containing 136 gene families in 19 metabolic pathways closely related to human and mouse microbiomes. Second, a mother database (motherDB) was constructed with 81 genomes of bacterial strains with 54 from gut and 27 from oral environments, and 16 metagenomes, and used for selection of genes and probe design. Gene prediction was performed by Glimmer3 for bacterial genomes, and by the Metagene program for metagenomes. In total, 228,240 and 801,599 genes were identified for bacterial genomes and metagenomes, respectively. Then the motherDB was searched against the seedDB using the HMMer program, and gene sequences in the motherDB that were highly homologous with seed sequences in the seedDB were used for probe design by the CommOligo software. Different degrees of specific probes, including gene-specific, inclusive and exclusive group-specific probes were selected. All candidate probes were checked against the motherDB and NCBI databases for specificity. Finally, 7,763 probes covering 91.2percent (12,601 out of 13,814) HMMer confirmed sequences from 75 bacterial genomes and 16 metagenomes were selected. This developed HMM-Chip is able to detect the diversity and abundance of functional genes, the gene expression of microbial communities, and potentially, the interactions of microorganisms and their hosts.

  10. Design and implementation of GM-APD array readout circuit for infrared imaging%GM-APD阵列型红外传感读出电路设计与实现

    Institute of Scientific and Technical Information of China (English)

    吴金; 袁德军; 王灿; 陈浩; 郑丽霞; 孙伟锋

    2016-01-01

    基于盖革模式(GM)雪崩光电二极管(GM-APD)探测阵列,设计了一种可用于红外3D成像的高性能红外传感读出电路(ROIC).该电路系统主要由主动淬火电路(AQC)、时间数字转换电路(TDC)和其他时序控制电路3个模块组成.AQC与TDC共同构成像素电路,在其余模块的配合下,由AQC电路检测GM-APD传感器产生的电流信号,TDC电路进行光子飞行时间( TOF)的计量,并转换为数字信号输出,从而实现更好的噪声抑制,更高的探测灵敏度.该电路采用CSMC 0.5μm标准CMOS工艺流片,阵列规模为8×8,像元中心距离100μm,芯片测试结果表明,电路功能良好,在250 MHz时钟驱动下,芯片可达到1 ns的时间分辨率,该电路可用于面阵结构红外探测系统或焦平面阵列.%Based on an avalanche photodiode APD detecting array working in Geiger mode GM-APD performance infrared sensor readout integrated circuit ROIC used for infrared 3D three-dimensional imaging is proposed. The system mainly consists of three functional modules including active quenching circuit AQC time-to-digital converter TDC circuit and other timing controller circuit. Each AQC and TDC circuit together constitutes the pixel circuit.Under the cooperation with other modules the current signal generated by the GM-APD sensor is detected by the AQC and the photon time-of-flight TOF is measured and converted to a digital signal output to achieve a better noise suppression and a higher detection sensitivity by the TDC.The ROIC circuit is fabricated by the CSMC 0.5 μm standard CMOS technology.The array size is 8 ×8 and the center distance of two adjacent cells is 100 μm.The measurement results of the chip show that the performance of the circuit is good and the chip can achieve 1 ns time resolution with a 250 MHz reference clock and the circuit can be used in the array structure of the infrared detection system or focal plane

  11. GM-APD阵列型红外传感读出电路设计与实现%Design and implementation of GM-APD array readout circuit for infrared imaging

    Institute of Scientific and Technical Information of China (English)

    吴金; 袁德军; 王灿; 陈浩; 郑丽霞; 孙伟锋

    2016-01-01

    基于盖革模式(GM)雪崩光电二极管(GM-APD)探测阵列,设计了一种可用于红外3D成像的高性能红外传感读出电路(ROIC).该电路系统主要由主动淬火电路(AQC)、时间数字转换电路(TDC)和其他时序控制电路3个模块组成.AQC与TDC共同构成像素电路,在其余模块的配合下,由AQC电路检测GM-APD传感器产生的电流信号,TDC电路进行光子飞行时间( TOF)的计量,并转换为数字信号输出,从而实现更好的噪声抑制,更高的探测灵敏度.该电路采用CSMC 0.5μm标准CMOS工艺流片,阵列规模为8×8,像元中心距离100μm,芯片测试结果表明,电路功能良好,在250 MHz时钟驱动下,芯片可达到1 ns的时间分辨率,该电路可用于面阵结构红外探测系统或焦平面阵列.%Based on an avalanche photodiode APD detecting array working in Geiger mode GM-APD performance infrared sensor readout integrated circuit ROIC used for infrared 3D three-dimensional imaging is proposed. The system mainly consists of three functional modules including active quenching circuit AQC time-to-digital converter TDC circuit and other timing controller circuit. Each AQC and TDC circuit together constitutes the pixel circuit.Under the cooperation with other modules the current signal generated by the GM-APD sensor is detected by the AQC and the photon time-of-flight TOF is measured and converted to a digital signal output to achieve a better noise suppression and a higher detection sensitivity by the TDC.The ROIC circuit is fabricated by the CSMC 0.5 μm standard CMOS technology.The array size is 8 ×8 and the center distance of two adjacent cells is 100 μm.The measurement results of the chip show that the performance of the circuit is good and the chip can achieve 1 ns time resolution with a 250 MHz reference clock and the circuit can be used in the array structure of the infrared detection system or focal plane

  12. Studies of an array of PbF2 Cherenkov crystals with large-area SiPM readout

    OpenAIRE

    Fienberg, A. T.; Alonzi, L. P.; Anastasi, A.; Bjorkquist, R.; Cauz, D.; Fatemi, R.; Ferrari, C.; Fioretti, A.; Frankenthal, A.; Gabbanini, C.; Gibbons, L. K.; Giovanetti, K.; Goadhouse, S. D.; Gohn, W. P.; Gorringe, T. P.

    2014-01-01

    The electromagnetic calorimeter for the new muon (g-2) experiment at Fermilab will consist of arrays of PbF2 Cherenkov crystals read out by large-area silicon photo-multiplier (SiPM) sensors. We report here on measurements and simulations using 2.0 -- 4.5 GeV electrons with a 28-element prototype array. All data were obtained using fast waveform digitizers to accurately capture signal pulse shapes versus energy, impact position, angle, and crystal wrapping. The SiPMs were gain matched using a...

  13. Color uniformity and data simulation in high-power RGB LED modules using different LED-chips arrays

    Science.gov (United States)

    Tu, Yan; Jin, Shangzhong; Wang, Yanhua; Dou, Liangliang

    2007-11-01

    The continuing research efforts in white light created by mixing red, green and blue light emitting diodes (RGB LED) will allow their applications in high quality lighting systems in the (near) future. There are still many issues to tackle in this kind of light source, for instance the color uniformity and the change of color-render property owing to the change of LED's temperature. In this paper we simulate the effects on color uniformity of the near-field light distribution due to different LED-chips arrays (at optimum packaging density for uniform irradiance) using High-Power RGB LED-chips. The results showing the color uniformity of near-field which can be achieved with different RGB LED-chips arrays are presented. Several configurations of RGB LED-chips arrays and relevant data for color variation are given respectively. An analysis of luminous efficacy of radiation (LER) and color rendering index (CRI) of this source is performed, which are affected by the peak wavelength, spectral width, and the output peak emission power ratio of LED-chips.

  14. Stress response of Caenorhabditis elegans induced by space crowding in a micro-column array chip.

    Science.gov (United States)

    Wang, Xixian; Tang, Lichun; Xia, Yuyang; Hu, Liang; Feng, Xiaojun; Du, Wei; Liu, Bi-Feng

    2013-04-01

    Crowding stress has been reported to play an important role in affecting physiological behaviour. To study this process, a reliable analytical method under confined space is essential. In this work, we demonstrated a microfluidic approach for investigating physiological responses of C. elegans to confined spaces. The PDMS microfluidic chip consisting of arrays of micro-columns enabled us to mimic different crowding conditions by changing the intervals among micro-columns. C. elegans were transferred into this micro-column array and the subcellular distribution of DAF-16, which is a well-known transcription factor regulating different stress responses, was monitored for analysing the physiological responses to the confined spaces. We found that the worms exhibited a gradual increase in DAF-16 nuclear localization in the micro-column array with intervals from 200 μm to 40 μm. Moreover, the results showed that the absence of food and crowding stress could cooperate to promote increased DAF-16 nuclear localization. Finally, loss-of-function mutations in mec-4 and mec-10, which are amiloride-sensitive Na(+) channel genes expressed in all six gentle touch neurons, accelerated the velocity of DAF-16 nuclear localization, induced by confined space, revealing that mec-4/mec-10 were not required for this stress response. Thus, this device will provide a versatile, reliable and controllable platform for crowding stress studies.

  15. Electrostatically focused addressable field emission array chips (AFEA's) for high-speed massively parallel maskless digital E-beam direct write lithography and scanning electron microscopy

    Science.gov (United States)

    Thomas, Clarence E.; Baylor, Larry R.; Voelkl, Edgar; Simpson, Michael L.; Paulus, Michael J.; Lowndes, Douglas H.; Whealton, John H.; Whitson, John C.; Wilgen, John B.

    2002-12-24

    Systems and methods are described for addressable field emission array (AFEA) chips. A method of operating an addressable field-emission array, includes: generating a plurality of electron beams from a pluralitly of emitters that compose the addressable field-emission array; and focusing at least one of the plurality of electron beams with an on-chip electrostatic focusing stack. The systems and methods provide advantages including the avoidance of space-charge blow-up.

  16. An array of cold-electron bolometers with SIN tunnel junctions and JFET readout for cosmology instruments

    International Nuclear Information System (INIS)

    A novel concept of the parallel/series array of Cold-Electron Bolometers (CEB) with Superconductor-Insulator-Normal (SIN) Tunnel Junctions has been proposed. The concept was developed specially for matching the CEB with JFET amplifier at conditions of high optical power load. The CEB is a planar antenna-coupled superconducting detector with high sensitivity. For combination of effective HF operation and low noise properties the current-biased CEBs are connected in series for DC and in parallel for HF signal. A signal is concentrated from an antenna to the absorber through the capacitance of the tunnel junctions and through additional capacitance for coupling of superconducting islands. Using array of CEBs the applications can be considerably extended to higher power load by distributing the power between N CEBs and decreasing the electron temperature. Due to increased responsivity the noise matching is so effective that photon NEP could be easily achieved at 300 mK with a room temperature JFET for wide range of optical power loads. The concept of the CEB array has been developed for the BOOMERanG balloon telescope and other Cosmology instruments

  17. Low-power 12-bit superconducting analog-to-digital converter for cryogenic focal plane array readouts

    Science.gov (United States)

    Rylov, Sergey V.; Robertazzi, R. P.

    1996-06-01

    Superconducting Analog-to-Digital Converters (ADCs) are attractive for use on cryogenic focal plane arrays because of their ultra-low power consumption and their ability to operate at cryogenic temperatures. We have developed a 12 bit ADC based on Nb thin film superconducting integrated circuit technology which dissipates less than 0.44 mW while in operation at 4.2 K. Extensions of this deign to lower junction critical currents would allow the production of an ADC which dissipates less than 0.1 mW when fully biased. The ADC had at least 9.75 effective bits of resolution for 20 kHz input signals, limited by the harmonic distortions of the signal source. We estimate that the ultimate resolution of this ADC can be greater than 20 bits at 10 MHz bandwidth with our current 2.5 micron fabrication process. Potential applications for this device include focal plane array read out electronics for low temperature (4.2 K and below) imaging arrays, such as those being used on the SIRTF mission being planned by NASA. Other applications include high precision instrumentation for metrology uses.

  18. Compact, Low-power and Precision Timing Photodetector Readout

    Energy Technology Data Exchange (ETDEWEB)

    Varner, Gary S.; Ruckman, Larry L.; /Hawaii U.; Schwiening, Jochen; Vavra, Jaroslav; /SLAC

    2011-06-14

    Photodetector readout for next generation high event rate particle identification and single-photon detection requires a digitizer capable of integrated recording of dense arrays of sensor elements with high analog bandwidth (precision timing) and large record depth, in a cost-effective, compact and low-power way. Simply stated, one cannot do better than having a high-fidelity 'oscilloscope on a chip' for every sensor channel. A firs version of the Buffered Large Analog Bandwidth (BLAB1) ASIC has been designed based upon the lessons learned from the development of the Large Analog Bandwidth Recorder and Digitizer with Ordered Readout (LABRADOR) ASIC. While this LABRADOR ASIC has been very successful and forms the readout basis of a generation of new, large-scale radio neutrino detectors, its limited sampling depth is a major drawback. To address this shortcoming, a prototype intended for photodetector readout has been designed and fabricated with 64k deep sampling at multi-GSa/s operation. An evaluation system has been constructed for instrumentation of Time-Of-Propagation (TOP) and focusing DIRC prototypes and test results will be reported.

  19. Design of primary optics for LED chip array in road lighting application.

    Science.gov (United States)

    Wang, Shang; Wang, Kai; Chen, Fei; Liu, Sheng

    2011-07-01

    In this study, we proposed an effective optical design method to solve the problem of prescribed illuminance for LED chip array packaging (LCAP). With this method, light energy redistribution can be obtained by optimizing meshing parameters on the target. Not only can it deal with light controlling of extended source, but also improve the uniformity of both illuminance and luminance for road lighting as well. As an example, we designed a 16W LED packaging with a smooth primary freeform lens for general road lighting. The simulation results demonstrated that optical performance of this lens can meet the requirements of Commission Internationale del'Eclairage (CIE) quite well. Longitudinal and overall uniformities are 0.7 and 0.5 respectively, and relative optical efficiency of luminaire can be enhanced 19.6% in theory compared with traditional optics. PMID:21747539

  20. Flexible multi-electrode array with integrated bendable CMOS-chip for implantable systems.

    Science.gov (United States)

    Winkin, N; Mokwa, W

    2012-01-01

    Micro-electrodes and micro-electrode arrays (MEAs) for stimulating neurons or recording action potentials are widely used in medical applications or biological research. For medical implants in many applications like brain implants or retinal implants there is a need for flexible MEAs with a large area and a large number of stimulation electrodes. In this work a flexible MEA with an embedded flexible silicon dummy CMOS-chip facing these challenges has been designed, manufactured and characterized. This approach offers the possibility by connecting and addressing several of these MEAs via a bus system, to increase the number and the density of electrodes significantly. This paper describes the design and fabrication process. Results on the mechanical and electrical behavior will be given and possible improvements for medical applications by this novel approach will be discussed.

  1. Piezoresistive polymer composites for cantilever readout

    DEFF Research Database (Denmark)

    Lillemose, Michael

    the piezoresistive readout. A two- and four-probe electrode chip, for measuring the strain sensitivity of the materials, have been designed and fabricated with standard cleanroom technology. A thin lm layer of polymer material is structured on the chips and by insertion in a four-point bending xture, the deposited...

  2. Cascaded active silicon microresonator array cross-connect circuits for WDM networks-on-chip

    Science.gov (United States)

    Poon, Andrew W.; Xu, Fang; Luo, Xianshu

    2008-02-01

    We propose a design of an optical switch on a silicon chip comprising a 5 × 5 array of cascaded waveguide-crossing-coupled microring resonator-based switches for photonic networks-on-chip applications. We adopt our recently demonstrated design of multimode-interference (MMI)-based wire waveguide crossings, instead of conventional plain waveguide crossings, for the merits of low loss and low crosstalk. The microring resonator is integrated with a lateral p-i-n diode for carrier-injection-based GHz-speed on-off switching. All 25 microring resonators are assumed to be identical within a relatively wide resonance line width. The optical circuit switch can employ a single wavelength channel or multiple wavelength channels that are spaced by the microring resonator free spectral range. We analyze the potential performance of the proposed photonic network in terms of (i) light path cross-connections loss budget, and (ii) DC on-off power consumption for establishing a light path. As a proof-of-concept, our initial experiments on cascaded passive silicon MMI-crossing-coupled microring resonators demonstrate 3.6-Gbit/s non-return-to-zero data transmissions at on- and off-resonance wavelengths.

  3. High-speed DNA genotyping using microfabricated capillary array electrophoresis chips

    Energy Technology Data Exchange (ETDEWEB)

    Woolley, A.T.; Sensabaugh, G.F.; Mathies, R.A. [Univ. of California, Berkeley, CA (United States)

    1997-06-01

    Capillary array electrophoresis (CAE) chips have been designed and fabricated with the capacity to rapidly (<160 s) analyze 12 different samples in parallel. Detection of all lanes with 0.3 s temporal resolution was achieved using a laser-excited confocal-fluorescence scanner. The operation and capabilities of these CAE microdevices were first determined by performing electrophoretic separations of pBR322 MspI DNA samples. Genotyping of HLA-H, a candidate gene for the diagnosis of hereditary hemochromatosis, was then performed to demonstrate the rapid analysis of biologically relevant samples. Two-color multiplex fluorescence detection of HLA-H genotypes was accomplished by prelabeling the standard pBR322 MspI DNA ladder with a red emitting bisintercalation dye (butyl TOTIN) and on-column labeling of the HLA-H DNA with thiazole orange. This work establishes the feasibility of using CAE chips for high-speed, high-throughput genotyping. 44 refs., 7 figs.

  4. Specific detection of oxytetracycline using DNA aptamer-immobilized interdigitated array electrode chip

    International Nuclear Information System (INIS)

    An electrochemical sensing system for oxytetracycline (OTC) detection was developed using ssDNA aptamer immobilized on gold interdigitated array (IDA) electrode chip. A highly specific ssDNA aptamer that bind to OTC with high affinity was employed to discriminate other tetracyclines (TCs), such as doxycycline (DOX) and tetracycline (TET). The immobilized thiol-modified aptamer on gold electrode chip served as a biorecognition element for the target molecules and the electrochemical signals generated from interactions between the aptamers and the target molecules was evaluated by cyclic voltammetry (CV) and square wave voltammetry (SWV). The current decrease due to the interference of bound OTC, DOX or TET was analyzed with the electron flow produced by a redox reaction between ferro- and ferricyanide. The specificity of developed EC-biosensor for OTC was highly distinguishable from the structurally similar antibiotics (DOX and TET). The dynamic range was determined to be 1-100 nM of OTC concentration in semi-logarithmic coordinates

  5. Specific detection of oxytetracycline using DNA aptamer-immobilized interdigitated array electrode chip

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Yeon Seok; Niazi, Javed H. [School of Life Sciences and Biotechnology, Korea University, Anam-dong, Seongbuk-gu, Seoul 136-701 (Korea, Republic of); Gu, Man Bock [School of Life Sciences and Biotechnology, Korea University, Anam-dong, Seongbuk-gu, Seoul 136-701 (Korea, Republic of)], E-mail: mbgu@korea.ac.kr

    2009-02-23

    An electrochemical sensing system for oxytetracycline (OTC) detection was developed using ssDNA aptamer immobilized on gold interdigitated array (IDA) electrode chip. A highly specific ssDNA aptamer that bind to OTC with high affinity was employed to discriminate other tetracyclines (TCs), such as doxycycline (DOX) and tetracycline (TET). The immobilized thiol-modified aptamer on gold electrode chip served as a biorecognition element for the target molecules and the electrochemical signals generated from interactions between the aptamers and the target molecules was evaluated by cyclic voltammetry (CV) and square wave voltammetry (SWV). The current decrease due to the interference of bound OTC, DOX or TET was analyzed with the electron flow produced by a redox reaction between ferro- and ferricyanide. The specificity of developed EC-biosensor for OTC was highly distinguishable from the structurally similar antibiotics (DOX and TET). The dynamic range was determined to be 1-100 nM of OTC concentration in semi-logarithmic coordinates.

  6. Single-Cell Electric Lysis on an Electroosmotic-Driven Microfluidic Chip with Arrays of Microwells

    Directory of Open Access Journals (Sweden)

    Yu-Hung Chen

    2012-05-01

    Full Text Available Accurate analysis at the single-cell level has become a highly attractive tool for investigating cellular content. An electroosmotic-driven microfluidic chip with arrays of 30-µm-diameter microwells was developed for single-cell electric lysis in the present study. The cellular occupancy in the microwells when the applied voltage was 5 V (82.4% was slightly higher than that at an applied voltage of 10 V (81.8%. When the applied voltage was increased to 15 V, the cellular occupancy in the microwells dropped to 64.3%. More than 50% of the occupied microwells contain individual cells. The results of electric lysis experiments at the single-cell level indicate that the cells were gradually lysed as the DC voltage of 30 V was applied; the cell was fully lysed after 25 s. Single-cell electric lysis was demonstrated in the proposed microfluidic chip, which is suitable for high-throughput cell lysis.

  7. Specifications of analog-to-digital converter for uncooled infrared readout circuits

    Science.gov (United States)

    Robert, Patrick; Durand, Alain; Gravot, Vincent; Pochic, David; Tissot, Jean-Luc

    2011-10-01

    This paper presents how to specify an ADC to digitalize the analog video of the uncooled infrared readout circuit. In a first part the main features will be discussed to select the right resolution, SNR, THD and ENOB of the converter. In a second part the characteristics more specifically sensitive for an ADC integrated in the readout circuit will be presented: architecture, power consumption, electrical dynamic range, crosstalk issues. Indeed, the increasing demand for integrated functions in uncooled readout circuits leads to on-chip ADC design as interface between the internal analog core and the digital processing electronic. In addition this IP could be seen as an inescapable link to integrate also NUC, BPR or all other processing functions on-chip. However specifying an on-chip ADC dedicated to focal plane array raises many questions about its architecture and its performance requirements. We show two architectural approaches are needed to cover the different sensor features in term of array size and frame speed. Finally we will conclude with a trade-off between external or internal approach taking into account the application of the camera, the cost and the ADC state of art.

  8. Architecture of a modular, multichannel readout system for dense electrochemical biosensor microarrays

    International Nuclear Information System (INIS)

    The architecture of a modular, multichannel readout system for dense electrochemical microarrays, targeting Lab-on-a-Chip applications, is presented. This approach promotes efficient component reusability through a hybrid multiplexing methodology, maintaining high levels of sampling performance and accuracy. Two readout modes are offered, which can be dynamically interchanged following signal profiling, to cater for both rapid signal transitions and weak current responses. Additionally, functional extensions to the described architecture are discussed, which provide the system with multi-biasing capabilities. A prototype integrated circuit of the proposed architecture’s analog core and a supporting board were implemented to verify the working principles. The system was evaluated using standard loads, as well as electrochemical sensor arrays. Through a range of operating conditions and loads, the prototype exhibited a highly linear response and accurately delivered the readout of input signals with fast transitions and wide dynamic ranges. (paper)

  9. Development of the photomultiplier tube readout system for the first Large-Sized Telescope of the Cherenkov Telescope Array

    OpenAIRE

    Masuda, Shu; Konno, Yusuke; Barrio, Juan Abel; Bigas, Oscar Blanch; Delgado, Carlos; Coromina, Lluís Freixas; Gunji, Shuichi; Hadasch, Daniela; Hatanaka, Kenichiro; Ikeno, Masahiro; Laguna, Jose Maria Illa; Inome, Yusuke; Ishio, Kazuma; Katagiri, Hideaki; Kubo, Hidetoshi

    2015-01-01

    The Cherenkov Telescope Array (CTA) is the next generation ground-based very high energy gamma-ray observatory. The Large-Sized Telescope (LST) of CTA targets 20 GeV -- 1 TeV gamma rays and has 1855 photomultiplier tubes (PMTs) installed in the focal plane camera. With the 23 m mirror dish, the night sky background (NSB) rate amounts to several hundreds MHz per pixel. In order to record clean images of gamma-ray showers with minimal NSB contamination, a fast sampling of the signal waveform is...

  10. Ultra-low power ADC on chip for high-performance IR detector

    Science.gov (United States)

    Decaens, Gilbert; Zecri, Michel; Maillart, Patrick; Advent, Frédéric; Baud, Laurent; Parola, Stephen; Billon-Lanfrey, David; Pistone, Frédéric; Martin, Sébastien

    2009-05-01

    The InfraRed staring arrays developed by SOFRADIR are more and more compact and offer system solutions for wide range of IR wavebands. IR detectors have been taken to an even more advanced level of sophistication to achieve staring arrays high performances. Latest developments have also been focused on the silicon readout circuit. Digital conversion on chip is one of the recent progresses in this field of activity. In order to match each system requirements, on chip high performance ultra low power ADCs have been developed. Beyond the performance aspects, digital focal plane arrays can be considered as the first step towards low cost Dewar family, since they allow for a more simple electrical interface on Dewar designs and on chip image processing. Recent results concerning these new readout circuit architectures are presented in this paper.

  11. Studies of an array of PbF$_2$ Cherenkov crystals with large-area SiPM readout

    Energy Technology Data Exchange (ETDEWEB)

    Fienberg, A.T.; et al.

    2015-05-21

    The electromagnetic calorimeter for the new muon (g-2) experiment at Fermilab will consist of arrays of PbF2 Cherenkov crystals read out by large-area silicon photo-multiplier (SiPM) sensors. We report here on measurements and simulations using 2.0 -- 4.5 GeV electrons with a 28-element prototype array. All data were obtained using fast waveform digitizers to accurately capture signal pulse shapes versus energy, impact position, angle, and crystal wrapping. The SiPMs were gain matched using a laser-based calibration system, which also provided a stabilization procedure that allowed gain correction to a level of 1e-4 per hour. After accounting for longitudinal fluctuation losses, those crystals wrapped in a white, diffusive wrapping exhibited an energy resolution sigma/E of (3.4 +- 0.1) % per sqrt(E/GeV), while those wrapped in a black, absorptive wrapping had (4.6 +- 0.3) % per sqrt(E/GeV). The white-wrapped crystals---having nearly twice the total light collection---display a generally wider and impact-position-dependent pulse shape owing to the dynamics of the light propagation, in comparison to the black-wrapped crystals, which have a narrower pulse shape that is insensitive to impact position.

  12. Studies of an array of PbF2 Cherenkov crystals with large-area SiPM readout

    Science.gov (United States)

    Fienberg, A. T.; Alonzi, L. P.; Anastasi, A.; Bjorkquist, R.; Cauz, D.; Fatemi, R.; Ferrari, C.; Fioretti, A.; Frankenthal, A.; Gabbanini, C.; Gibbons, L. K.; Giovanetti, K.; Goadhouse, S. D.; Gohn, W. P.; Gorringe, T. P.; Hertzog, D. W.; Iacovacci, M.; Kammel, P.; Kaspar, J.; Kiburg, B.; Li, L.; Mastroianni, S.; Pauletta, G.; Peterson, D. A.; Počanić, D.; Smith, M. W.; Sweigart, D. A.; Tishchenko, V.; Venanzoni, G.; Van Wechel, T. D.; Wall, K. B.; Winter, P.; Yai, K.

    2015-05-01

    The electromagnetic calorimeter for the new muon (g - 2) experiment at Fermilab will consist of arrays of PbF2 Cherenkov crystals read out by large-area silicon photo-multiplier (SiPM) sensors. We report here on measurements and simulations using 2.0-4.5 GeV electrons with a 28-element prototype array. All data were obtained using fast waveform digitizers to accurately capture signal pulse shapes vs. energy, impact position, angle, and crystal wrapping. The SiPMs were gain matched using a laser-based calibration system, which also provided a stabilization procedure that allowed gain correction to a level of 10-4 per hour. After accounting for longitudinal fluctuation losses, those crystals wrapped in a white, diffusive wrapping exhibited an energy resolution σ/E of (3.4 ± 0.1) % /√{ E / GeV }, while those wrapped in a black, absorptive wrapping had (4.6 ± 0.3) % /√{ E / GeV }. The white-wrapped crystals-having nearly twice the total light collection-display a generally wider and impact-position-dependent pulse shape owing to the dynamics of the light propagation, in comparison to the black-wrapped crystals, which have a narrower pulse shape that is insensitive to impact position.

  13. Studies of an array of PbF2 Cherenkov crystals with large-area SiPM readout

    CERN Document Server

    Fienberg, A T; Anastasi, A; Bjorkquist, R; Cauz, D; Fatemi, R; Ferrari, C; Fioretti, A; Frankenthal, A; Gabbanini, C; Gibbons, L K; Giovanetti, K; Goadhouse, S D; Gohn, W P; Gorringe, T P; Hertzog, D W; Iacovacci, M; Kammel, P; Kaspar, J; Kiburg, B; Li, L; Mastroianni, S; Pauletta, G; Peterson, D A; Pocanic, D; Smith, M W; Sweigart, D A; Tishchenko, V; Venanzoni, G; Van Wechel, T D; Wall, K B; Winter, P; Yai, K

    2014-01-01

    The electromagnetic calorimeter for the new muon (g-2) experiment at Fermilab will consist of arrays of PbF2 Cherenkov crystals read out by large-area silicon photo-multiplier (SiPM) sensors. We report here on measurements and simulations using 2.0 -- 4.5 GeV electrons with a 28-element prototype array. All data were obtained using fast waveform digitizers to accurately capture signal pulse shapes versus energy, impact position, angle, and crystal wrapping. The SiPMs were gain matched using a laser-based calibration system, which also provided a stabilization procedure that allowed gain correction to a level of 1e-4 per hour. After accounting for longitudinal fluctuation losses, those crystals wrapped in a white, diffusive wrapping exhibited an energy resolution sigma/E of (3.4 +- 0.1) % per sqrt(E/GeV), while those wrapped in a black, absorptive wrapping had (4.6 +- 0.3) % per sqrt(E/GeV). The white-wrapped crystals---having nearly twice the total light collection---display a generally wider and impact-posit...

  14. Portable, Easy-to-Operate, and Antifouling Microcapsule Array Chips Fabricated by 3D Ice Printing for Visual Target Detection.

    Science.gov (United States)

    Zhang, Hong-Ze; Zhang, Fang-Ting; Zhang, Xiao-Hui; Huang, Dong; Zhou, Ying-Lin; Li, Zhi-Hong; Zhang, Xin-Xiang

    2015-06-16

    Herein, we proposed a portable, easy-to-operate, and antifouling microcapsule array chip for target detection. This prepackaged chip was fabricated by innovative and cost-effective 3D ice printing integrating with photopolymerization sealing which could eliminate complicated preparation of wet chemistry and effectively resist outside contaminants. Only a small volume of sample (2 μL for each microcapsule) was consumed to fulfill the assay. All the reagents required for the analysis were stored in ice form within the microcapsule before use, which guaranteed the long-term stability of microcapsule array chips. Nitrite and glucose were chosen as models for proof of concept to achieve an instant quantitative detection by naked eyes without the need of external sophisticated instruments. The simplicity, low cost, and small sample consumption endowed ice-printing microcapsule array chips with potential commercial value in the fields of on-site environmental monitoring, medical diagnostics, and rapid high-throughput point-of-care quantitative assay.

  15. YBa2Cu3O7-δ dc SQUID array for multichannel magnetometry and multichannel flip-chip current sensors

    International Nuclear Information System (INIS)

    We have prepared arrays of single-layer washer-type dc superconducting quantum interference devices (SQUIDs) on 10 mm 10 mm bicrystal substrates. Each SQUID in the array is equipped with its own modulation loop, which makes a separate operation of them possible. Arrays containing nine or 11 dc SQUIDs have been tested and the crosstalk between neighbouring channels has been found to be 5%. The field sensitivity of the SQUIDs is 85 nT Φ0-1 and 105 nT Φ0-1 for the nine- and 11-device array, respectively. The equivalent flux noise is typically ≤ 20 μΦ0 Hz-1/2 down to 1 Hz with ac bias reversal. A field resolution of less than 2.1 pT Hz-1/2 has been obtained for at least eight channels on a chip. By using multiturn YBa2Cu3O7-δ input coils and mounting them in a flip-chip configuration together with the single-layer dc SQUIDs we have been able to build three-channel current sensors. The current sensitivity equals 3-3.5 μA Φ0-1 depending on the alignment of the flip-chip configuration. The current resolution of the devices is -1/2. We show the possibility of building sensitive magnetometers by connecting the input coil of these current sensors to a normal-conducting pickup antenna. (author)

  16. Depth-of-interaction measurement in a single-layer crystal array with a single-ended readout using digital silicon photomultiplier.

    Science.gov (United States)

    Lee, Min Sun; Lee, Jae Sung

    2015-08-21

    We present the first experimental evaluation of a depth-of-interaction (DOI) positron emission tomography (PET) detector using a digital silicon photomultiplier (dSiPM). To measure DOI information from a mono-layer array of scintillation crystals with a single-ended readout, our group has previously proposed and developed a new method based on light spread using triangular reflectors. Since this method relies on measurement of the light distribution, dSiPM, which has a fully digital interface, has several merits for our DOI measurement. The DOI PET detector comprised of a dSiPM sensor (DPC-3200-22-44) coupled with a 14   ×   14 array of 2 mm  ×  2 mm  ×  20 mm unpolished LGSO crystals. All crystals were covered with triangular reflectors. To obtain a good performance of the DOI PET detector, several parameters of detector were selected as a preliminary experiment. Detector performance was evaluated with the selected parameters and the optimal experimental setup, and a DOI measurement was conducted by irradiating the crystal block at five DOI positions spaced at intervals of 4 mm. Maximum-likelihood estimation was employed for DOI positioning and the optimal DOI estimation scheme was also investigated in this study. As a result, the DOI PET detector showed clear crystal identification. The energy resolution (full-width at half-maximum (FWHM)) averaged over all depths was 10.21%  ±  0.15% at 511 keV, and time resolution averaged over all depths was 1198.61   ±   39.70 ps FWHM. The average DOI positioning accuracy for all depths was 74.22%  ±  6.77%, which equates to DOI resolution of 4.67 mm. Energy and DOI resolutions were uniform over all crystal positions except for the back parts of the array. Furthermore, additional simulation studies were conducted to verify the results of our DOI measurement method that is combined with dSiPM technology. In conclusion, our continuous DOI PET detector

  17. Fabrication and demonstration of 1 × 8 silicon–silica multi-chip switch based on optical phased array

    Science.gov (United States)

    Katayose, Satomi; Hashizume, Yasuaki; Itoh, Mikitaka

    2016-08-01

    We experimentally demonstrated a 1 × 8 silicon–silica hybrid thermo-optic switch based on an optical phased array using a multi-chip integration technique. The switch consists of a silicon chip with optical phase shifters and two silica-based planar lightwave circuit (PLC) chips composed of optical couplers and fiber connections. We adopted a rib waveguide as the silicon waveguide to reduce the coupling loss and increase the alignment tolerance for coupling between silicon and silica waveguides. As a result, we achieved a fast switching response of 81 µs, a high extinction ratio of over 18 dB and a low insertion loss of 4.9–8.1 dB including a silicon–silica coupling loss of 0.5 ± 0.3 dB at a wavelength of 1.55 µm.

  18. A scalable multi-chip architecture to realise large-format microshutter arrays for coded aperture applications

    Science.gov (United States)

    McNie, Mark E.; King, David O.; Smith, Gilbert W.; Stone, Steven M.; Brown, Alan G.; Gordon, Neil T.; Slinger, Christopher W.; Cannon, Kevin; Riches, Stephen; Rogers, Stanley

    2009-08-01

    Coded aperture imaging has been used for astronomical applications for several years. Typical implementations used a fixed mask pattern and are designed to operate in the X-Ray or gamma ray bands. Recently applications have emerged in the visible and infra red bands for low cost lens-less imaging systems and system studies have shown that considerable advantages in image resolution may accrue from the use of multiple different images of the same scene - requiring a reconfigurable mask. Previously we reported on the realization of a 2x2cm single chip mask in the mid-IR based on polysilicon micro-opto-electro-mechanical systems (MOEMS) technology and its integration with ASIC drive electronics using conventional wire bonding. The MOEMS architecture employs interference effects to modulate incident light - achieved by tuning a large array of asymmetric Fabry-Perot optical cavities via an applied voltage and uses a hysteretic row/column scheme for addressing. In this paper we present the latest transmission results in the mid-IR band (3-5μm) and report on progress in developing a scalable architecture based on a tiled approach using multiple 2 x 2cm MOEMS chips with associated control ASICs integrated using flip chip technology. Initial work has focused on a 2 x 2 tiled array as a stepping stone towards an 8 x 8 array.

  19. Application of multielectrode array (MEA) chips for the evaluation of mixtures neurotoxicity

    International Nuclear Information System (INIS)

    Cortical neurons grown on multielectrode array (MEA) chips have been shown to be a valuable alternative method to study electrophysiological properties of the central nervous system neurons and to perform functional toxicological screening. Here we studied the effects of binary mixtures on neuronal networks cultured on MEAs. We have considered compounds with similar and different mode-of-action (MoA) to characterize and assess their combined effects. Individual and binary mixture dose–response curves based on spontaneous neuronal activity have been generated and the IC50 has been considered as the end-point for neurotoxicity assessment. The two classical approaches of mixtures toxicity studies: concentration addition (CA) and independent action (IA) have been applied to compare calculated and experimental results. Nuclear magnetic resonance (NMR) spectroscopy has been employed to confirm no chemical reaction or complexation between mixtures components. The results suggest that both CA and IA are able to predict the toxicity of the mixture and that the combination of in vitro test methods with theoretical dose–response models has a strong potential as an alternative tool for the prediction of mixtures neurotoxicity.

  20. Development of micropump-actuated negative pressure pinched injection for parallel electrophoresis on array microfluidic chip.

    Science.gov (United States)

    Li, Bowei; Jiang, Lei; Xie, Hua; Gao, Yan; Qin, Jianhua; Lin, Bingcheng

    2009-09-01

    A micropump-actuated negative pressure pinched injection method is developed for parallel electrophoresis on a multi-channel LIF detection system. The system has a home-made device that could individually control 16-port solenoid valves and a high-voltage power supply. The laser beam is excitated and distributes to the array separation channels for detection. The hybrid Glass-PDMS microfluidic chip comprises two common reservoirs, four separation channels coupled to their respective pneumatic micropumps and two reference channels. Due to use of pressure as a driving force, the proposed method has no sample bias effect for separation. There is only one high-voltage supply needed for separation without relying on the number of channels, which is significant for high-throughput analysis, and the time for sample loading is shortened to 1 s. In addition, the integrated micropumps can provide the versatile interface for coupling with other function units to satisfy the complicated demands. The performance is verified by separation of DNA marker and Hepatitis B virus DNA samples. And this method is also expected to show the potential throughput for the DNA analysis in the field of disease diagnosis. PMID:19681052

  1. Noise evaluation and improvement of the LAL-RAL microplex read-out chip for the DELPHI μ-vertex detector

    International Nuclear Information System (INIS)

    Some modification concerning the microplex MX3 128 channels chip (made by Rutherford Group) have been done. The noise is reduced by a factor of 3. The evaluation method and the new geometry are presented. This chip will be used for the DELPHI μ-vertex detector. (orig.)

  2. Fully digital pixel readout architecture with a current-mode A/D converter

    Science.gov (United States)

    Eshraghian, Kamran; Lachowicz, Stefan W.

    2001-11-01

    Camera-on-a-CMOS chip will be an inevitable component of future intelligent vision systems. However, up till now, the dominant format of data in imaging devices is still analog. The analog photocurrent or sampled voltage is transferred to the ADC via a column or a column/row bus. Moreover, in the active pixel configuration the area occupied by circuitry reduces significantly the fill factor, so that there are heavy constraints imposed on the size of the circuits used. In this paper a concept of back illuminated focal plane is presented. The system consists of two chips bonded face to face using Indium bumps. The top chip, which is the seeing chip, is thinned and the light signal is applied to the bottom surface. The bottom chip is the processing chip and it contains a distributed array of analog-to digital converters. As the seeing chip is fully dedicated to photosensors the fill factor can be increased from 25-40% possible on a single plane to over 95% with two planes. The analog-to-digital converters are algorithmic current-mode converters, where one-bit cell is implemented in the processing area facing one-pixel. Eight such cells are cascaded to form an 8-bit converter. As a result, a fully digital pixel readout is obtained.

  3. Low-noise readout circuit for uncooled infrared FPA

    Science.gov (United States)

    Tanaka, Akio; Chiba, Kazuhiro; Endoh, Tsutomu; Okuyama, Kuniyuki; Kawahara, Akihiro; Iida, Kiyoshi; Tsukamoto, Nanao

    2000-12-01

    A low-noise architecture for uncooled microbolometer focal plane arrays is described. The on-chip readout circuit contains an integration circuit in which the bolometer current is directly injected into a capacitor, and exhibits extremely low noise with no decrease in signal. The simple configuration of the integration circuit makes it possible to operate more circuits in parallel, and increases the integration time and number of pixels. The bias circuit for the integration circuit is formed on the chip to reduce the effect of changes in the substrate temperature. The equivalent input noise, in which all readout noise is converted into that at the bolometer node, was 6.2(mu) V rms. A noise at this level is so low that can loosen the required TCR in the bolometer material. A 37-micrometers -pitch 320 x 240 ROIC was fabricated, and its expected NETD was 67-34 mK at a TCR of 1-2%/K. This architecture makes it possible to produce low-cost miniature cameras.

  4. Data readout system utilizing photonic integrated circuit

    International Nuclear Information System (INIS)

    We describe a novel optical solution for data readout systems. The core of the system is an Indium-Phosphide photonic integrated circuit performing as a front-end readout unit. It functions as an optical serializer in which the serialization of the input signal is provided by means of on-chip optical delay lines. The circuit employs electro-optic phase shifters to build amplitude modulators, power splitters for signal distribution, semiconductor optical amplifiers for signal amplification as well as on-chip reflectors. We present the concept of the system, the design and first characterization results of the devices that were fabricated in a multi-project wafer run

  5. Data readout system utilizing photonic integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Stopiński, S., E-mail: S.Stopinski@tue.nl [COBRA Research Institute, Eindhoven University of Technology (Netherlands); Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Malinowski, M.; Piramidowicz, R. [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Smit, M.K.; Leijtens, X.J.M. [COBRA Research Institute, Eindhoven University of Technology (Netherlands)

    2013-10-11

    We describe a novel optical solution for data readout systems. The core of the system is an Indium-Phosphide photonic integrated circuit performing as a front-end readout unit. It functions as an optical serializer in which the serialization of the input signal is provided by means of on-chip optical delay lines. The circuit employs electro-optic phase shifters to build amplitude modulators, power splitters for signal distribution, semiconductor optical amplifiers for signal amplification as well as on-chip reflectors. We present the concept of the system, the design and first characterization results of the devices that were fabricated in a multi-project wafer run.

  6. YBa2Cu3O7- dc SQUID array for multichannel magnetometry and multichannel flip-chip current sensors

    Science.gov (United States)

    Ramos, J.; Zakosarenko, V.; IJsselsteijn, R.; Stolz, R.; Schultze, V.; Chwala, A.; Hoenig, H. E.; Meyer, H.-G.

    1999-09-01

    We have prepared arrays of single-layer washer-type dc superconducting quantum interference devices (SQUIDs) on 10 mm × 10 mm bicrystal substrates. Each SQUID in the array is equipped with its own modulation loop, which makes a separate operation of them possible. Arrays containing nine or 11 dc SQUIDs have been tested and the crosstalk between neighbouring channels has been found to be 5%. The field sensitivity of the SQUIDs is 85 nT icons/Journals/Common/Phi" ALT="Phi" ALIGN="TOP"/>0-1 and 105 nT icons/Journals/Common/Phi" ALT="Phi" ALIGN="TOP"/>0-1 for the nine- and 11-device array, respectively. The equivalent flux noise is typically icons/Journals/Common/le" ALT="le" ALIGN="TOP"/> 20 icons/Journals/Common/mu" ALT="mu" ALIGN="TOP"/>icons/Journals/Common/Phi" ALT="Phi" ALIGN="TOP"/>0 Hz-1/2 down to 1 Hz with ac bias reversal. A field resolution of less than 2.1 pT Hz-1/2 has been obtained for at least eight channels on a chip. By using multiturn YBa2Cu3O7-icons/Journals/Common/delta" ALT="delta" ALIGN="MIDDLE"/> input coils and mounting them in a flip-chip configuration together with the single-layer dc SQUIDs we have been able to build three-channel current sensors. The current sensitivity equals 3-3.5 icons/Journals/Common/mu" ALT="mu" ALIGN="TOP"/>A icons/Journals/Common/Phi" ALT="Phi" ALIGN="TOP"/>0-1 depending on the alignment of the flip-chip configuration. The current resolution of the devices is coil of these current sensors to a normal-conducting pickup antenna.

  7. Thermal chip fabrication with arrays of sensors and heaters for micro-scale impingement cooling heat transfer analysis and measurements.

    Science.gov (United States)

    Shen, C H; Gau, C

    2004-07-30

    The design and fabrication for a thermal chip with an array of temperature sensors and heaters for study of micro-jet impingement cooling heat transfer process are presented. This thermal chip can minimize the heat loss from the system to the ambient and provide a uniform heat flux along the wall, thus local heat transfer processes along the wall can be measured and obtained. The fabrication procedure presented can reach a chip yield of 100%, and every one of the sensors and heaters on the chip is in good condition. In addition, micro-jet impingement cooling experiments are performed to obtain the micro-scale local heat transfer Nusselt number along the wall. Flow visualization for the micro-impinging jet is also made. The experimental results indicate that both the micro-scale impinging jet flow structure and the heat transfer process along the wall is significantly different from the case of large-scale jet impingement cooling process. PMID:15142582

  8. Nanowire array chips for molecular typing of rare trafficking leukocytes with application to neurodegenerative pathology

    Science.gov (United States)

    Kwak, Minsuk; Kim, Dong-Joo; Lee, Mi-Ri; Wu, Yu; Han, Lin; Lee, Sang-Kwon; Fan, Rong

    2014-05-01

    Despite the presence of the blood-brain barrier (BBB) that restricts the entry of immune cells and mediators into the central nervous system (CNS), a small number of peripheral leukocytes can traverse the BBB and infiltrate into the CNS. The cerebrospinal fluid (CSF) is one of the major routes through which trafficking leukocytes migrate into the CNS. Therefore, the number of leukocytes and their phenotypic compositions in the CSF may represent important sources to investigate immune-to-brain interactions or diagnose and monitor neurodegenerative diseases. Due to the paucity of trafficking leucocytes in the CSF, a technology capable of efficient isolation, enumeration, and molecular typing of these cells in the clinical settings has not been achieved. In this study, we report on a biofunctionalized silicon nanowire array chip for highly efficient capture and multiplexed phenotyping of rare trafficking leukocytes in small quantities (50 microliters) of clinical CSF specimens collected from neurodegenerative disease patients. The antibody coated 3D nanostructured materials exhibited vastly improved rare cell capture efficiency due to high-affinity binding and enhanced cell-substrate interactions. Moreover, our platform creates multiple cell capture interfaces, each of which can selectively isolate specific leukocyte phenotypes. A comparison with the traditional immunophenotyping using flow cytometry demonstrated that our novel silicon nanowire-based rare cell analysis platform can perform rapid detection and simultaneous molecular characterization of heterogeneous immune cells. Multiplexed molecular typing of rare leukocytes in CSF samples collected from Alzheimer's disease patients revealed the elevation of white blood cell counts and significant alterations in the distribution of major leukocyte phenotypes. Our technology represents a practical tool for potentially diagnosing and monitoring the pathogenesis of neurodegenerative diseases by allowing an effective

  9. A High-Speed, Event-Driven, Active Pixel Sensor Readout for Photon-Counting Microchannel Plate Detectors

    Science.gov (United States)

    Kimble, Randy A.; Pain, Bedabrata; Norton, Timothy J.; Haas, J. Patrick; Oegerle, William R. (Technical Monitor)

    2002-01-01

    Silicon array readouts for microchannel plate intensifiers offer several attractive features. In this class of detector, the electron cloud output of the MCP intensifier is converted to visible light by a phosphor; that light is then fiber-optically coupled to the silicon array. In photon-counting mode, the resulting light splashes on the silicon array are recognized and centroided to fractional pixel accuracy by off-chip electronics. This process can result in very high (MCP-limited) spatial resolution while operating at a modest MCP gain (desirable for dynamic range and long term stability). The principal limitation of intensified CCD systems of this type is their severely limited local dynamic range, as accurate photon counting is achieved only if there are not overlapping event splashes within the frame time of the device. This problem can be ameliorated somewhat by processing events only in pre-selected windows of interest of by using an addressable charge injection device (CID) for the readout array. We are currently pursuing the development of an intriguing alternative readout concept based on using an event-driven CMOS Active Pixel Sensor. APS technology permits the incorporation of discriminator circuitry within each pixel. When coupled with suitable CMOS logic outside the array area, the discriminator circuitry can be used to trigger the readout of small sub-array windows only when and where an event splash has been detected, completely eliminating the local dynamic range problem, while achieving a high global count rate capability and maintaining high spatial resolution. We elaborate on this concept and present our progress toward implementing an event-driven APS readout.

  10. Single-Cell-Arrayed Agarose Chip for in Situ Analysis of Cytotoxicity and Genotoxicity of DNA Cross-Linking Agents.

    Science.gov (United States)

    Li, Lili; Wang, Weixing; Ding, Mingyu; Luo, Guoan; Liang, Qionglin

    2016-07-01

    Development of approach or device to allow continuous multiple measurements, such as integrating cytotoxic and genotoxic analysis, is quite appealing for study of the drug's activity and mechanism of action or resistance. In this study, a single-cell-arrayed agarose chip system was developed to combine cell cultivation with subsequent in situ analysis of cytotoxicity and genotoxicity of the chemotherapeutic agent. The modified alkaline comet assay coupled with the Live/Dead assay was used to monitor the interstrand cross-links (ICLs) formation and the cytotoxic effects in different glioma cell lines. In addition, the ICL-induced double strand breaks (DSBs) was measured on the chip to reflect the level of ICLs indirectly. Compared with the traditional methods, the microarray agarose device offers higher throughput, reproducibility, and robustness, exhibiting good potential for high-content drug screening. PMID:27269449

  11. A low power low noise amplifier for a 128 channel detector read-out integrated circuit

    International Nuclear Information System (INIS)

    This paper describes the design of a low power, low noise CMOS amplifier. The amplifier was designed using the folded cascade configuration and was implemented on a 3μm double polysilicon process. The amplifier is part of a 128 channel charge amplifier array chip for use in the read-out of radiation detectors with many channels. Aspects of the amplifier design such as band-width, pulse response, and noise are discussed and the effects of individual transistors are shown thereby relating circuit performance to process parameters; circuit test results are presented and radiation test results are included. (author)

  12. A novel read-out IC allowing microbolometers to operate with high frame rate

    Science.gov (United States)

    Zhou, Yun; Lv, Jian; Wang, LuXia; Que, LongCheng; Jiang, YaDong

    2012-10-01

    This paper presents a new Read_out IC (ROIC) that uses two shared capacitances for integral and sampling. At similar power consumption and chip area, this ROIC architecture achieves a higher frame rate compared with the conventional architecture. A 384×288 uncooled microbolometer focal plane array (FPA) based on the proposed circuit was implemented on silicon using a 0.5 μm CMOS technology. Measurements show the proposed architecture enables the frame rate increase of 6.8% using the same master clock.

  13. Evaluation of in-plane local stress distribution in stacked IC chip using dynamic random access memory cell array for highly reliable three-dimensional IC

    Science.gov (United States)

    Tanikawa, Seiya; Kino, Hisashi; Fukushima, Takafumi; Koyanagi, Mitsumasa; Tanaka, Tetsu

    2016-04-01

    As three-dimensional (3D) ICs have many advantages, IC performances can be enhanced without scaling down of transistor size. However, 3D IC has mechanical stresses inside Si substrates owing to its 3D stacking structure, which induces negative effects on transistor performances such as carrier mobility changes. One of the mechanical stresses is local bending stress due to organic adhesive shrinkage among stacked IC chips. In this paper, we have proposed an evaluation method for in-plane local stress distribution in the stacked IC chips using retention time modulation of a dynamic random access memory (DRAM) cell array. We fabricated a test structure composed of a DRAM chip bonded on a Si interposer with dummy Cu/Sn microbumps. As a result, we clarified that the DRAM cell array can precisely evaluate the in-plane local stress distribution in the stacked IC chips.

  14. Large-scale analysis of antisense transcription in wheat using the Affymetrix GeneChip Wheat Genome Array

    Directory of Open Access Journals (Sweden)

    Settles Matthew L

    2009-05-01

    Full Text Available Abstract Background Natural antisense transcripts (NATs are transcripts of the opposite DNA strand to the sense-strand either at the same locus (cis-encoded or a different locus (trans-encoded. They can affect gene expression at multiple stages including transcription, RNA processing and transport, and translation. NATs give rise to sense-antisense transcript pairs and the number of these identified has escalated greatly with the availability of DNA sequencing resources and public databases. Traditionally, NATs were identified by the alignment of full-length cDNAs or expressed sequence tags to genome sequences, but an alternative method for large-scale detection of sense-antisense transcript pairs involves the use of microarrays. In this study we developed a novel protocol to assay sense- and antisense-strand transcription on the 55 K Affymetrix GeneChip Wheat Genome Array, which is a 3' in vitro transcription (3'IVT expression array. We selected five different tissue types for assay to enable maximum discovery, and used the 'Chinese Spring' wheat genotype because most of the wheat GeneChip probe sequences were based on its genomic sequence. This study is the first report of using a 3'IVT expression array to discover the expression of natural sense-antisense transcript pairs, and may be considered as proof-of-concept. Results By using alternative target preparation schemes, both the sense- and antisense-strand derived transcripts were labeled and hybridized to the Wheat GeneChip. Quality assurance verified that successful hybridization did occur in the antisense-strand assay. A stringent threshold for positive hybridization was applied, which resulted in the identification of 110 sense-antisense transcript pairs, as well as 80 potentially antisense-specific transcripts. Strand-specific RT-PCR validated the microarray observations, and showed that antisense transcription is likely to be tissue specific. For the annotated sense

  15. A Robust and Low-Complexity Gas Recognition Technique for On-Chip Tin-Oxide Gas Sensor Array

    Directory of Open Access Journals (Sweden)

    Farid Flitti

    2008-01-01

    Full Text Available Gas recognition is a new emerging research area with many civil, military, and industrial applications. The success of any gas recognition system depends on its computational complexity and its robustness. In this work, we propose a new low-complexity recognition method which is tested and successfully validated for tin-oxide gas sensor array chip. The recognition system is based on a vector angle similarity measure between the query gas and the representatives of the different gas classes. The latter are obtained using a clustering algorithm based on the same measure within the training data set. Experimented results on our in-house gas sensors array show more than 98% of correct recognition. The robustness of the proposed method is tested by recognizing gas measurements with simulated drift. Less than 1% of performance degradation is noted at the worst case scenario which represents a significant improvement when compared to the current state-of-the-art.

  16. \\title{Test beam results of the first CMS\\\\double-sided strip module prototypes\\\\using the CBC2 read-out chip}

    CERN Document Server

    Harb, Ali; Hauk, Johannes

    2016-01-01

    In November 2013 the first 2S-$p_{T}$ module prototypes equipped with the CBC chips were put to test at the DESY-II test beam facility. Data were collected exploiting a beam of positrons with an energy ranging from 2~to 4 GeV. In this paper the test setup and the results are presented.

  17. A microfluidic chip with a U-shaped microstructure array for multicellular spheroid formation, culturing and analysis

    International Nuclear Information System (INIS)

    Multicellular spheroids (MCS), formed by self-assembly of single cells, are commonly used as a three-dimensional cell culture model to bridge the gap between in vitro monolayer culture and in vivo tissues. However, current methods for MCS generation and analysis still suffer drawbacks such as being labor-intensive and of poor controllability, and are not suitable for high-throughput applications. This study demonstrates a novel microfluidic chip to facilitate MCS formation, culturing and analysis. The chip contains an array of U-shaped microstructures fabricated by photopolymerizing the poly(ethylene glycol) diacrylate hydrogel through defining the ultraviolet light exposure pattern with a photomask. The geometry of the U-shaped microstructures allowed trapping cells into the pocket through the actions of fluid flow and the force of gravity. The hydrogel is non-adherent for cells, promoting the formation of MCS. Its permselective property also facilitates exchange of nutrients and waste for MCS, while providing protection of MCS from shearing stress during the medium perfusion. Heterotypic MCS can be formed easily by manipulating the cell trapping steps. Subsequent drug susceptibility analysis and long-term culture could also be achieved within the same chip. This MCS formation and culture platform can be used as a micro-scale bioreactor and applied in many cell biology and drug testing studies. (paper)

  18. ChIP-on-chip analysis methods for Affymetrix tiling arrays.

    Science.gov (United States)

    Yoder, Sean J

    2015-01-01

    Although the ChIP-sequencing has gained significant attraction recently, ChIP analysis using microarrays is still an attractive option due to the low cost, ease of analysis, and access to legacy and public data sets. The analysis of ChIP-Chip data entails a multistep approach that requires several different applications to progress from the initial stages of raw data analysis to the identification and characterization of ChIP binding sites. There are multiple approaches to data analysis and there are several applications available for each stage of the analysis pipeline. Each application must be evaluated for its suitability for the particular experiment as well as the investigator's background with computational tools. This chapter is a review of the commonly available applications for Affymetrix ChIP-Chip data analysis, as well as the general workflow of a ChIP-Chip analysis approach. The purpose of the chapter is to allow the researcher to better select the appropriate applications and provide them with the direction necessary to proceed with a ChIP-Chip analysis.

  19. An All-Digital, Time-gated 128x128 SPAD Array for On-chip, Filter-less Fluorescence Detection

    OpenAIRE

    Maruyama, Yuki; Charbon, Edoardo

    2011-01-01

    This paper presents an on-chip, filter-less fluorescence detector using an all-digital, time-resolved imager based on a CMOS single-photon detector array with limited in situ processing. The device comprises an array of pixels capable of detecting single photons integrated with time gating circuitry and a 1-bit memory. The sensor allows on-chip, filter-less fluorescence detection and fluorescence lifetime imaging microscopy (FLIM) for micro total analysis systems (μ-TAS) and point-of-care tes...

  20. A vertically integrated pixel readout device for the Vertex Detector at the International Linear Collider

    Energy Technology Data Exchange (ETDEWEB)

    Deptuch, Grzegorz; Christian, David; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom; /Fermilab

    2008-12-01

    3D-Integrated Circuit technology enables higher densities of electronic circuitry per unit area without the use of nanoscale processes. It is advantageous for mixed mode design with precise analog circuitry because processes with conservative feature sizes typically present lower process dispersions and tolerate higher power supply voltages, resulting in larger separation of a signal from the noise floor. Heterogeneous wafers (different foundries or different process families) may be combined with some 3D integration methods, leading to the optimization of each tier in the 3D stack. Tracking and vertexing in future High-Energy Physics (HEP) experiments involves construction of detectors composed of up to a few billions of channels. Readout electronics must record the position and time of each measurement with the highest achievable precision. This paper reviews a prototype of the first 3D readout chip for HEP, designed for a vertex detector at the International Linear Collider. The prototype features 20 x 20 {micro}m{sup 2} pixels, laid out in an array of 64 x 64 elements and was fabricated in a 3-tier 0.18 {micro}m Fully Depleted SOI CMOS process at MIT-Lincoln Laboratory. The tests showed correct functional operation of the structure. The chip performs a zero-suppressed readout. Successive submissions are planned in a commercial 3D bulk 0.13 {micro}m CMOS process to overcome some of the disadvantages of an FDSOI process.

  1. A Prototype Scalable Readout System for Micro-pattern Gas Detectors

    CERN Document Server

    Zheng, Qi-Bin; Tian, Jing; Li, Cheng; Feng, Chang-Qing; An, Qi

    2016-01-01

    A scalable readout system (SRS) is designed to provide a general solution for different micro-pattern gas detectors. The system mainly consists of three kinds of modules: the ASIC card, the Adapter card and the Front-End Card (FEC). The ASIC cards, mounted with particular ASIC chips, are designed for receiving detector signals. The Adapter card is in charge of digitizing the output signals from several ASIC cards. The FEC, edged-mounted with the Adapter, has a FPGA-based reconfigurable logic and I/O interfaces, allowing users to choose various ASIC cards and Adapters for different types of detectors. The FEC transfers data through Gigabit Ethernet protocol realized by a TCP processor (SiTCP) IP core in field-programmable gate arrays (FPGA). The readout system can be tailored to specific sizes to adapt to the experiment scales and readout requirements. In this paper, two kinds of multi-channel ASIC chips, VA140 and AGET, are applied to verify the concept of this SRS architecture. Based on this VA140 or AGET SR...

  2. PANDA straw tube detectors and readout

    Science.gov (United States)

    Strzempek, P.

    2016-07-01

    PANDA is a detector under construction dedicated to studies of production and interaction of particles in the charmonium mass range using antiproton beams in the momentum range of 1.5 - 15 GeV/c at the Facility for Antiproton and Ion Research (FAIR) in Darmstadt. PANDA consists of two spectrometers: a Target Spectrometer with a superconducting solenoid and a Forward Spectrometer using a large dipole magnet and covering the most forward angles (Θ detectors. The expected high count rates, reaching up to 1 MHz/straw, are one of the main challenges for the detectors and associated readout electronics. The paper presents the readout chain of the tracking system and the results of tests performed with realistic prototype setups. The readout chain consists of a newly developed ASIC chip (PASTTREC ) with amplification, signal shaping, tail cancellation, discriminator stages and Time Readout Boards as digitizer boards.

  3. An ac bridge readout for bolometric detectors

    Science.gov (United States)

    Rieke, F. M.; Lange, A. E.; Beeman, J. W.; Haller, E. E.

    1989-01-01

    The authors have developed a bolometer readout circuit which greatly improves the low-frequency stability of bolometric detectors. The circuit uses an ac bias voltage and two matched bolometers and allows stable dc bolometer operation for integration times greater than 10 s. In astronomical applications the readout allows for qualitatively different observation modes (e.g. staring or slow-drift scanning) which are particularly well suited for space observations and for the use of arrays. In many applications the readout can increase sensitivity. The authors present noise spectra for 4He temperature bolometers with no excess noise at frequencies greater than 0.1 Hz. The measured optical responsivity of a bolometer operated with the present readout is the same as that of a bolometer operated with a conventional readout.

  4. Optimised cantilever biosensor with piezoresistive read-out

    DEFF Research Database (Denmark)

    Rasmussen, Peter; Thaysen, J.; Hansen, Ole;

    2003-01-01

    We present a cantilever-based biochemical sensor with piezoresistive read-out which has been optimised for measuring surface stress. The resistors and the electrical wiring on the chip are encapsulated in low-pressure chemical vapor deposition (LPCVD) silicon nitride, so that the chip is well...

  5. Antennas for Terahertz Applications: Focal Plane Arrays and On-chip Non-contact Measurement Probes

    Science.gov (United States)

    Trichopoulos, Georgios C.

    The terahertz (THz) band provides unique sensing opportunities that enable several important applications such as biomedical imaging, remote non-destructive inspection of packaged goods, and security screening. THz waves can penetrate most materials and can provide unique spectral information in the 0.1--10 THz band with high resolution. In contrast, other imaging modalities, like infrared (IR), suffer from low penetration depths and are thus not attractive for non-destructive evaluation. However, state-of-the-art THz imaging systems typically employ mechanical raster scans using a single detector to acquire two-dimensional images. Such devices tend to be bulky and complicated due to the mechanical parts, and are thus rather expensive to develop and operate. Thus, large-format (e.g. 100x100 pixels) and all-electronics based THz imaging systems are badly needed to alleviate the space, weight and power (SWAP) factors and enable cost effective utilization of THz waves for sensing and high-data-rate communications. In contrast, photonic sensors are very compact because light can couple directly to the photodiode without residing to radiation coupling topologies. However, in the THz band, due to the longer wavelengths and much lower photon energies, highly efficient antennas with optimized input impedance have to be integrated with THz sensors. Here, we implement novel antenna engineering techniques that are optimized to take advantage of recent technological advances in solid-state THz sensing devices. For example, large-format focal plane arrays (FPAs) have been the Achilles' heel of THz imaging systems. Typically, optical components (lenses, mirrors) are employed in order to improve the optical performance of FPAs, however, antenna sensors suffer from degraded performance when they are far from the optical axis, thus minimizing the number of useful FPA elements. By modifying the radiation pattern of FPA antennas we manage to alleviate the off-axis aberration

  6. A Compute Environment of ABC95 Array Computer Based on Multi-FPGA Chip

    Institute of Scientific and Technical Information of China (English)

    2000-01-01

    ABC95 array computer is a multi-function network's computer based on FPGA technology, The multi-function network supports processors conflict-free access data from memory and supports processors access data from processors based on enhanced MESH network.ABC95 instruction's system includes control instructions, scalar instructions, vectors instructions.Mostly net-work instructions are introduced.A programming environment of ABC95 array computer assemble language is designed.A programming environment of ABC95 array computer for VC++ is advanced.It includes load function of ABC95 array computer program and data, store function, run function and so on.Specially, The data type of ABC95 array computer conflict-free access is defined.The results show that these technologies can develop programmer of ABC95 array computer effectively.

  7. Miniaturization of a micro-optics array for highly sensitive and parallel detection on an injection moulded lab-on-a-chip

    DEFF Research Database (Denmark)

    Hung, Tran Quang; Sun, Yi; Poulsen, Carl Esben;

    2015-01-01

    A miniaturised array of supercritical angle fluorescence (SAF) micro-optics embedded in a microfluidic chamber was fabricated by injection moulding. The fabricated chip could enhance the fluorescence signal around 46 times compared to a conventional microscope. Collection of the fluorescence signal...

  8. Readout of the upgraded ALICE-ITS

    Science.gov (United States)

    Szczepankiewicz, A.

    2016-07-01

    The ALICE experiment will undergo a major upgrade during the second long shutdown of the CERN LHC. As part of this program, the present Inner Tracking System (ITS), which employs different layers of hybrid pixels, silicon drift and strip detectors, will be replaced by a completely new tracker composed of seven layers of monolithic active pixel sensors. The upgraded ITS will have more than twelve billion pixels in total, producing 300 Gbit/s of data when tracking 50 kHz Pb-Pb events. Two families of pixel chips realized with the TowerJazz CMOS imaging process have been developed as candidate sensors: the ALPIDE, which uses a proprietary readout and sparsification mechanism and the MISTRAL-O, based on a proven rolling shutter architecture. Both chips can operate in continuous mode, with the ALPIDE also supporting triggered operations. As the communication IP blocks are shared among the two chip families, it has been possible to develop a common Readout Electronics. All the sensor components (analog stages, state machines, buffers, FIFOs, etc.) have been modelled in a system level simulation, which has been extensively used to optimize both the sensor and the whole readout chain design in an iterative process. This contribution covers the progress of the R&D efforts and the overall expected performance of the ALICE-ITS readout system.

  9. Triggered mesa-top single photon emitter arrays and on-chip integration with dielectric nanoantenna-waveguide systems

    CERN Document Server

    Zhang, Jiefei; Lu, Siyuan; Madhukar, Anupam

    2016-01-01

    Nanophotonic quantum information processing systems require spatially ordered, spectrally uniform single photon sources (SPSs), integrated on-chip with co-designed light manipulating elements providing emission rate enhancement, emitted photon guidance, and lossless propagation. Towards this objective, we introduce and report on systems comprising an SPS array with each SPS surrounded by a dielectric building block (DBB) based multifunctional light manipulation unit (LMU). For the SPS array, we report triggered single photon emission at 77K from GaAs(001)/InGaAs single quantum dots (SQDs) grown selectively on top of nanomesas using the approach of substrate-encoded size-reducing epitaxy (SESRE). Systematic temperature and power dependent photoluminescence (PL), PL excitation, time-resolved PL, and emission statistics studies reveal high spectral uniformity and single photon emission at 77.4K with $g^{(2)}$(0) of 0.24 $\\pm$ 0.07. The SESRE based SPS arrays, following growth of a planarizing overlayer, are read...

  10. Electrostatically focused addressable field emission array chips (AFEA's) for high-speed massively parallel maskless digital E-beam direct write lithography and scanning electron microscopy

    Energy Technology Data Exchange (ETDEWEB)

    Thomas, Clarence E. (Knoxville, TN); Baylor, Larry R. (Farragut, TN); Voelkl, Edgar (Oak Ridge, TN); Simpson, Michael L. (Knoxville, TN); Paulus, Michael J. (Knoxville, TN); Lowndes, Douglas H. (Knoxville, TN); Whealton, John H. (Oak Ridge, TN); Whitson, John C. (Clinton, TN); Wilgen, John B. (Oak Ridge, TN)

    2002-12-24

    Systems and methods are described for addressable field emission array (AFEA) chips. A method of operating an addressable field-emission array, includes: generating a plurality of electron beams from a pluralitly of emitters that compose the addressable field-emission array; and focusing at least one of the plurality of electron beams with an on-chip electrostatic focusing stack. The systems and methods provide advantages including the avoidance of space-charge blow-up.

  11. From understanding cellular function to novel drug discovery: the role of planar patch-clamp array chip technology

    Directory of Open Access Journals (Sweden)

    Christophe ePy

    2011-10-01

    Full Text Available All excitable cell functions rely upon ion channels that are embedded in their plasma membrane. Perturbations of ion channel structure or function result in pathologies ranging from cardiac dysfunction to neurodegenerative disorders. Consequently, to understand the functions of excitable cells and to remedy their pathophysiology, it is important to understand the ion channel functions under various experimental conditions – including exposure to novel drug targets. Glass pipette patch-clamp is the state of the art technique to monitor the intrinsic and synaptic properties of neurons. However, this technique is labor-intensive and has low data throughput. Planar patch-clamp chips, integrated into automated systems, offer high throughputs but are limited to isolated cells from suspensions, resulting in questionable models of true physiological function, and are unsuitable for studies involving neuronal communication. Multi-electrode arrays (MEA, in contrast, have the ability to monitor network activity by measuring local field potentials from multiple extracellular sites, but specific ion channel activity is challenging to extract from these multiplexed signals. Here we describe a novel planar patch-clamp chip technology that enables the simultaneous high resolution electrophysiological interrogation of individual neurons at multiple sites in synaptically connected neuronal networks, thereby combining the advantages of MEA and patch-clamp techniques. Each neuron can be probed through an aperture that connects to a dedicated subterranean microfluidic channel. Neurons growing in networks are aligned to the apertures by physisorbed or chemisorbed chemical cues. In this review, we describe the design and fabrication process of these chips, the approach to the chemical patterning for cell placement, and present physiological data from cultured neuronal cells.

  12. The readout system of the MAGIC-II Cherenkov Telescope

    CERN Document Server

    Tescaro, D; Barcelo, M; Bitossi, M; Cortina, J; Fras, M; Hadasch, D; Illa, J M; Martínez, M; Mazin, D; Paoletti, R; Pegna, R

    2009-01-01

    In this contribution we describe the hardware, firmware and software components of the readout system of the MAGIC-II Cherenkov telescope on the Canary island La Palma. The PMT analog signals are transmitted by means of optical fibers from the MAGIC-II camera to the 80 m away counting house where they are routed to the new high bandwidth and fully programmable receiver boards (MONSTER), which convert back the signals from optical to electrical ones. Then the signals are split, one half provide the input signals for the level ONE trigger system while the other half is sent to the digitizing units. The fast Cherenkov pulses are sampled by low-power Domino Ring Sampler chips (DRS2) and temporarily stored in an array of 1024 capacitors. Signals are sampled at the ultra-fast speed of 2 GSample/s, which allows a very precise measurement of the signal arrival times in all pixels. They are then digitized with 12-bit resolution by an external ADC readout at 40 MHz speed. The Domino samplers are integrated in the newly...

  13. The Investigation of Die Back Edge Cracking in Flip Chip Ceramic Ball Grid Array Package (FC-CBGA

    Directory of Open Access Journals (Sweden)

    Zainudin Kornain

    2011-09-01

    Full Text Available The cracking between die back edge and top fillet for Flip Chip Ceramic Ball Grid Array (FC-CBGA package due to thermal cycling have been investigated in this study. Finite Element Analysis (FEA model was used to analyze the effect of fillet geometry and material properties of underfill upon stresses along the die back edge. The thermo-mechanical properties of commercial underfill were obtained by using Thermal Mechanical Analyzer (TMA and Dynamic Mechanical Analyzer (DMA as the input for the simulation. Die stress distribution for different fillet height and width were generated to depict variation of stress due thermal loading and the variations of tensile stress were discussed for parameter optimization. The effect of different underfill material properties were discussed as well for thermal stress reliability improvement.

  14. On-chip supercapacitors with ultrahigh volumetric performance based on electrochemically co-deposited CuO/polypyrrole nanosheet arrays

    Science.gov (United States)

    Qian, Tao; Zhou, Jinqiu; Xu, Na; Yang, Tingzhou; Shen, Xiaowei; Liu, Xuejun; Wu, Shishan; Yan, Chenglin

    2015-10-01

    We introduce a new method for fabricating unique on-chip supercapacitors based on CuO/polypyrrole core/shell nanosheet arrays by means of direct electrochemical co-deposition on interdigital-like electrodes. The prepared all-solid-state device demonstrates exceptionally high specific capacitance of 1275.5 F cm-3 (˜40 times larger than that of CuO-only supercapacitors) and high-energy-density of 28.35 mWh cm-3, which are both significantly greater than other solid-state supercapacitors. More importantly, the device maintains approximately 100% capacity retention at 2.5 A cm-3 after 3000 cycles. The in situ co-deposition of CuO/polypyrrole nanosheets on interdigital substrate enables effective charge transport, electrode fabrication integrity, and device integration. Because of their high energy, power density, and stable cycling stability, these newly developed on-chip supercapacitors permit fast, reliable applications in portable and miniaturized electronic devices.

  15. Development of novel on-chip, customer-design spiral biasing adaptor on for Si drift detectors and detector arrays for X-ray and nuclear physics experiments

    Energy Technology Data Exchange (ETDEWEB)

    Li, Zheng, E-mail: lizheng@xtu.edu.cn [School of Materials, Optoelectronics and Physics, Xiangtan University, Xiangtan, Hunan 411105 (China); Chen, Wei [Brookhaven National Laboratory, Upton, NY 11973 (United States)

    2014-11-21

    A novel on-chip, customer-design spiral biasing adaptor (SBA) has been developed. A single SBA is used for biasing a Si drift detector (SDD) and SDD array. The use of an SBA reduces the biasing current. This paper shows the calculation of the geometry of an SBA and an SDD to get the best drift field in the SDD and SDD array. Prototype SBAs have been fabricated to verify the concept. Electrical measurements on these SBAs are in agreement with the expectations. The new SDD array with an SBA can be used for X-ray detection and in nuclear physics experiments.

  16. ExonMiner: Web service for analysis of GeneChip Exon array data

    OpenAIRE

    Imoto Seiya; Saito Ayumu; Nagasaki Masao; Yoshida Ryo; Numata Kazuyuki; Miyano Satoru

    2008-01-01

    Abstract Background Some splicing isoform-specific transcriptional regulations are related to disease. Therefore, detection of disease specific splice variations is the first step for finding disease specific transcriptional regulations. Affymetrix Human Exon 1.0 ST Array can measure exon-level expression profiles that are suitable to find differentially expressed exons in genome-wide scale. However, exon array produces massive datasets that are more than we can handle and analyze on personal...

  17. A 2x2 multi-chip reconfigurable MOEMS mask: a stepping stone to large format microshutter arrays for coded aperture applications

    Science.gov (United States)

    McNie, Mark E.; Brown, Alan G.; King, David O.; Smith, Gilbert W.; Gordon, Neil T.; Riches, Stephen; Rogers, Stanley

    2010-08-01

    Coded aperture imaging has been used for astronomical applications for several years. Typical implementations used a fixed mask pattern and are designed to operate in the X-Ray or gamma ray bands. Recently applications have emerged in the visible and infra red bands for low cost lens-less imaging systems and system studies have shown that considerable advantages in image resolution may accrue from the use of multiple different images of the same scene - requiring a reconfigurable mask. Previously reported work focused on realising a 2x2cm single chip mask in the mid-IR based on polysilicon micro-optoelectro- mechanical systems (MOEMS) technology and its integration with ASIC drive electronics using conventional wire bonding. It employs interference effects to modulate incident light - achieved by tuning a large array of asymmetric Fabry-Perot optical cavities via an applied voltage and uses a hysteretic row/column scheme for addressing. In this paper we report on the latest results in the mid-IR for the single chip reconfigurable MOEMS mask, trials in scaling up to a mask based on a 2x2 multi-chip array and report on progress towards realising a large format mask comprising 44 MOEMS chips. We also explore the potential of such large, transmissive IR spatial light modulator arrays for other applications and in the current and alternative architectures.

  18. Optical Manipulation of Single Magnetic Beads in a Microwell Array on a Digital Microfluidic Chip.

    Science.gov (United States)

    Decrop, Deborah; Brans, Toon; Gijsenbergh, Pieter; Lu, Jiadi; Spasic, Dragana; Kokalj, Tadej; Beunis, Filip; Goos, Peter; Puers, Robert; Lammertyn, Jeroen

    2016-09-01

    The detection of single molecules in magnetic microbead microwell array formats revolutionized the development of digital bioassays. However, retrieval of individual magnetic beads from these arrays has not been realized until now despite having great potential for studying captured targets at the individual level. In this paper, optical tweezers were implemented on a digital microfluidic platform for accurate manipulation of single magnetic beads seeded in a microwell array. Successful optical trapping of magnetic beads was found to be dependent on Brownian motion of the beads, suggesting a 99% chance of trapping a vibrating bead. A tailor-made experimental design was used to screen the effect of bead type, ionic buffer strength, surfactant type, and concentration on the Brownian activity of beads in microwells. With the optimal conditions, the manipulation of magnetic beads was demonstrated by their trapping, retrieving, transporting, and repositioning to a desired microwell on the array. The presented platform combines the strengths of digital microfluidics, digital bioassays, and optical tweezers, resulting in a powerful dynamic microwell array system for single molecule and single cell studies.

  19. Characterization of the FE-I4B pixel readout chip production run for the ATLAS Insertable B-layer upgrade

    Science.gov (United States)

    Backhaus, M.

    2013-03-01

    The Insertable B-layer (IBL) is a fourth pixel layer that will be added inside the existing ATLAS pixel detector during the long LHC shutdown of 2013 and 2014. The new four layer pixel system will ensure excellent tracking, vertexing and b-tagging performance in the high luminosity pile-up conditions projected for the next LHC run. The peak luminosity is expected to reach 3·1034 cm-2s-1with an integrated luminosity over the IBL lifetime of 300 fb-1 corresponding to a design lifetime fluence of 5·1015 neqcm-2 and ionizing dose of 250 Mrad including safety factors. The production front-end electronics FE-I4B for the IBL has been fabricated at the end of 2011 and has been extensively characterized on diced ICs as well as at the wafer level. The production tests at the wafer level were performed during 2012. Selected results of the diced IC characterization are presented, including measurements of the on-chip voltage regulators. The IBL powering scheme, which was chosen based on these results, is described. Preliminary wafer to wafer distributions as well as yield calculations are given.

  20. Characterization of the FE-I4B pixel readout chip production run for the ATLAS Insertable B-layer upgrade

    CERN Document Server

    Backhaus, Malte

    2013-01-01

    The Insertable B-layer (IBL) is a fourth pixel layer that will be added inside the existing ATLAS pixel detector during the long LHC shutdown of 2013 and 2014. The new four layer pixel system will ensure excellent tracking, vertexing and b-tagging performance in the high luminosity pile-up conditions projected for the next LHC run. The peak luminosity is expected to reach 3 x 10^34 cm^-2 s^-1 with an integrated luminosity over the IBL lifetime of 300 fb^-1 corresponding to a design lifetime fluence of 5 x 10^15 n_eq cm^-2 and ionizing dose of 250 Mrad including safety factors. The production front-end electronics FE-I4B for the IBL has been fabricated at the end of 2011 and has been extensively characterized on diced ICs as well as at the wafer level. The production tests at the wafer level were performed during 2012. Selected results of the diced IC characterization are presented, including measurements of the on-chip voltage regulators. The IBL powering scheme, which was chosen based on these results, is de...

  1. Characterization of the FE-I4B pixel readout chip production run for the ATLAS Insertable B-layer upgrade

    CERN Document Server

    Backhaus, M

    2013-01-01

    The Insertable B-layer (IBL) is a fourth pixel layer that will be added inside the existing ATLAS pixel detector during the long LHC shutdown of 2013 and 2014. The new four layer pixel system will ensure excellent tracking, vertexing and b-tagging performance in the high luminosity pile-up conditions projected for the next LHC run. The peak luminosity is expected to reach 3• 10^34 cm^−2 s ^−1with an integrated luminosity over the IBL lifetime of 300 fb^−1 corresponding to a design lifetime fluence of 5 • 10^15 n_eqcm^−2 and ionizing dose of 250 Mrad including safety factors. The production front-end electronics FE-I4B for the IBL has been fabricated at the end of 2011 and has been extensively characterized on diced ICs as well as at the wafer level. The production tests at the wafer level were performed during 2012. Selected results of the diced IC characterization are presented, including measurements of the on-chip voltage regulators. The IBL powering scheme, which was chosen based on these resu...

  2. ExonMiner: Web service for analysis of GeneChip Exon array data

    Directory of Open Access Journals (Sweden)

    Imoto Seiya

    2008-11-01

    Full Text Available Abstract Background Some splicing isoform-specific transcriptional regulations are related to disease. Therefore, detection of disease specific splice variations is the first step for finding disease specific transcriptional regulations. Affymetrix Human Exon 1.0 ST Array can measure exon-level expression profiles that are suitable to find differentially expressed exons in genome-wide scale. However, exon array produces massive datasets that are more than we can handle and analyze on personal computer. Results We have developed ExonMiner that is the first all-in-one web service for analysis of exon array data to detect transcripts that have significantly different splicing patterns in two cells, e.g. normal and cancer cells. ExonMiner can perform the following analyses: (1 data normalization, (2 statistical analysis based on two-way ANOVA, (3 finding transcripts with significantly different splice patterns, (4 efficient visualization based on heatmaps and barplots, and (5 meta-analysis to detect exon level biomarkers. We implemented ExonMiner on a supercomputer system in order to perform genome-wide analysis for more than 300,000 transcripts in exon array data, which has the potential to reveal the aberrant splice variations in cancer cells as exon level biomarkers. Conclusion ExonMiner is well suited for analysis of exon array data and does not require any installation of software except for internet browsers. What all users need to do is to access the ExonMiner URL http://ae.hgc.jp/exonminer. Users can analyze full dataset of exon array data within hours by high-level statistical analysis with sound theoretical basis that finds aberrant splice variants as biomarkers.

  3. ExonMiner: Web service for analysis of GeneChip Exon array data

    Science.gov (United States)

    Numata, Kazuyuki; Yoshida, Ryo; Nagasaki, Masao; Saito, Ayumu; Imoto, Seiya; Miyano, Satoru

    2008-01-01

    Background Some splicing isoform-specific transcriptional regulations are related to disease. Therefore, detection of disease specific splice variations is the first step for finding disease specific transcriptional regulations. Affymetrix Human Exon 1.0 ST Array can measure exon-level expression profiles that are suitable to find differentially expressed exons in genome-wide scale. However, exon array produces massive datasets that are more than we can handle and analyze on personal computer. Results We have developed ExonMiner that is the first all-in-one web service for analysis of exon array data to detect transcripts that have significantly different splicing patterns in two cells, e.g. normal and cancer cells. ExonMiner can perform the following analyses: (1) data normalization, (2) statistical analysis based on two-way ANOVA, (3) finding transcripts with significantly different splice patterns, (4) efficient visualization based on heatmaps and barplots, and (5) meta-analysis to detect exon level biomarkers. We implemented ExonMiner on a supercomputer system in order to perform genome-wide analysis for more than 300,000 transcripts in exon array data, which has the potential to reveal the aberrant splice variations in cancer cells as exon level biomarkers. Conclusion ExonMiner is well suited for analysis of exon array data and does not require any installation of software except for internet browsers. What all users need to do is to access the ExonMiner URL . Users can analyze full dataset of exon array data within hours by high-level statistical analysis with sound theoretical basis that finds aberrant splice variants as biomarkers. PMID:19036125

  4. On-chip optical isolation via unidirectional Bloch oscillations in a waveguide array.

    Science.gov (United States)

    Kumar, Pradeep; Levy, Miguel

    2012-09-15

    We propose to use the unidirectionality of the optical Bloch oscillation phenomenon achievable in a magneto-optic asymmetric waveguide array to achieve optical isolation. At the 1.55 μm telecommunication wavelength, our isolator design exhibits an isolation ratio of 36 dB between forward- and backward-propagating waves. The proposed design consists of a waveguide array made in a silicon-on-insulator substrate with a magnetic garnet cover layer. A key role is played by the transverse-magnetic mode nonreciprocal phase shift effect.

  5. First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

    CERN Document Server

    Alemi, M; Gys, Thierry; Mikulec, B; Piedigrossi, D; Puertolas, D; Rosso, E; Schomaker, R; Snoeys, W; Wyllie, Ken H

    2000-01-01

    We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface...

  6. Pixel readout electronics development for the ALICE pixel vertex and LHCb RICH detector

    CERN Document Server

    Snoeys, W; Cantatore, E; Cencelli, V; Dinapoli, R; Heijne, Erik H M; Jarron, Pierre; Lamanna, P; Minervini, D; O'Shea, V; Quiquempoix, V; San Segundo-Bello, D; Van Koningsveld, B; Wyllie, Ken H

    2001-01-01

    The ALICE1LHCB pixel readout chip emerged from previous experience at CERN. The RD-19 collaboration provided the basis for the installation of a pixel system in the WA97 and NA57 experiments. Operation in these experiments was key in the understanding of the system issues. In parallel the RD-49 collaboration provided the basis to obtain radiation tolerance in commercial submicron CMOS through special circuit layout. The new ALICE1LMB chip was developed to serve two different applications: particle tracking in the ALICE Silicon Pixel Detector and particle identification in the LHCb Ring Imaging Cherenkov detector. To satisfy the different needs for these two experiments, the chip can be operated in two different modes. In tracking mode all the 50 mu m*435 mu m pixel cells in the 256*32 array are read out individually, whilst in particle identification mode they are combined in groups of 8 to form a 32*32 array of 400 mu m*425 mu m cells. The circuit is currently being manufactured in a commercial 0.25 mu m CMO...

  7. A low power cryogenic 512 × 512-pixel infrared readout integrated circuit with modified MOS device model

    Science.gov (United States)

    Zhao, Hongliang; Liu, Xinghui; Xu, Chao

    2013-11-01

    A low power cryogenic readout integrated circuit (ROIC) for 512 × 512-pixel infrared focal plane array (IRFPA) image system, is presented. In order to improve the precision of the circuit simulation at cryogenic temperatures, a modified MOS device model is proposed. The model is based on BSIM3 model, and uses correction parameters to describe carrier freeze-out effect at low temperatures to improve the fitting accuracy for low temperature MOS device simulation. A capacitive trans-impedance amplifier (CTIA) with inherent correlated double sampling (CDS) configuration is employed to realize a high performance readout interfacing circuit in a pixel area of 30 × 30 μm2. Optimized column readout timing and structure are applied to reduce the power consumption. The experimental chip fabricated by a standard 0.35 μm 2P4M CMOS process shows more than 10 MHz readout rate with less than 70 mW power consumption under 3.3 V supply voltage at 77-150 K operated temperatures. And it occupies an area of 18 × 17 mm2.

  8. Chromatin immunoprecipitation (ChIP) of plant transcription factors followed by sequencing (ChIP-SEQ) or hybridization to whole genome arrays (ChIP-CHIP)

    NARCIS (Netherlands)

    Kaufmann, K.; Muiño, J.M.; Østerås, M.; Farinelli, L.; Krajewski, P.; Angenent, G.C.

    2010-01-01

    Chromatin immunoprecipitation (ChIP) is a powerful technique to study interactions between transcription factors (TFs) and DNA in vivo. For genome-wide de novo discovery of TF-binding sites, the DNA that is obtained in ChIP experiments needs to be processed for sequence identification. The sequences

  9. High-flux ptychographic imaging using the new 55 µm-pixel detector ‘Lambda’ based on the Medipix3 readout chip

    Energy Technology Data Exchange (ETDEWEB)

    Wilke, R. N., E-mail: rwilke@gwdg.de; Wallentin, J.; Osterhoff, M. [University of Göttingen, Institute for X-ray Physics, Friedrich-Hund-Platz 1, 37077 Göttingen (Germany); Pennicard, D.; Zozulya, A.; Sprung, M. [Deutsches Elektronen-Synchrotron DESY, Notkestrasse 85, 22607 Hamburg (Germany); Salditt, T. [University of Göttingen, Institute for X-ray Physics, Friedrich-Hund-Platz 1, 37077 Göttingen (Germany)

    2014-11-01

    The Large Area Medipix-Based Detector Array (Lambda) has been used in a ptychographic imaging experiment on solar-cell nanowires. By using a semi-transparent central stop, the high flux density provided by nano-focusing Kirkpatrick–Baez mirrors can be fully exploited for high-resolution phase reconstructions. Suitable detection systems that are capable of recording high photon count rates with single-photon detection are instrumental for coherent X-ray imaging. The new single-photon-counting pixel detector ‘Lambda’ has been tested in a ptychographic imaging experiment on solar-cell nanowires using Kirkpatrick–Baez-focused 13.8 keV X-rays. Taking advantage of the high count rate of the Lambda and dynamic range expansion by the semi-transparent central stop, a high-dynamic-range diffraction signal covering more than seven orders of magnitude has been recorded, which corresponds to a photon flux density of about 10{sup 5} photons nm{sup −2} s{sup −1} or a flux of ∼10{sup 10} photons s{sup −1} on the sample. By comparison with data taken without the semi-transparent central stop, an increase in resolution by a factor of 3–4 is determined: from about 125 nm to about 38 nm for the nanowire and from about 83 nm to about 21 nm for the illuminating wavefield.

  10. The Study of Natural Unification for FPGA Array Chip%FPGA阵列芯片的自然统一研究

    Institute of Scientific and Technical Information of China (English)

    孙璐; 沈绪榜

    2013-01-01

    FPGA是1984年Rose Freeman发明的一种支持OLP计算模式的阵列芯片,实现了非数据并行算法计算的高效性.但是,OLP计算模式是采用VHDL/Verilog等硬件描述语言,通过逻辑设计将算法映射到FPGA阵列芯片上的,应用的抽象层次低,而且FPGA阵列芯片体系结构,与实现数据并行算法计算的GPU系统芯片体系结构是不统一的.为了克服FPGA阵列芯片的这两个缺点,本文研究了能够等效替代OLP计算模式及其FPGA阵列芯片的ILP计算模式及其APU系统芯片,并自然统一了ILP与DLP两种计算模式的系统芯片体系结构.%FPGA is invented by Rose Freeman in 1984, it is a kind of array chip for OLP computing paradigm, which has high efficiency of non-data parallel algorithm. But the algorithm is mapped by the logic design to the FPGA array chip with hardware describe language, such as VHDL or Verilog, that lower the level of applied abstraction. In addition, the architecture of FPGA array chip is not uniformed with GPU SoC for DLP computing. To overcome these two shortcomings, we studied the ILP computing paradigm and its APU SoC which can replace the OLP computing paradigm and its FPGA array chip equivalently, realized the natural unification of two architecture of SoC for ILP and DLP computing paradigms.

  11. High-performance semiconductor optical amplifier array for self-aligned packaging using Si V-groove flip-chip technique

    Science.gov (United States)

    Leclerc, D.; Brosson, P.; Pommereau, F.; Ngo, R.; Doussiere, P.; Mallecot, F.; Gavignet, P.; Wamsler, I.; Laube, G.; Hunziker, W.

    1995-05-01

    A high performance four-tilted stripe semiconductor optical amplifier array, with low polarization sensitivity and very low-gain ripple, compatible with self-aligned flip-chip mounting on a Si motherboard is reported. Up to 32 dB of internal gain with 2-dB polarization sensitivity is obtained. A multifiber module has been realized, following an almost static optical alignment procedure, showing no degradation of the SOA array performances. Fiber-to-fiber gain, measured on the four stripes, is 14.4 +/- 1.3 dB with a gain ripple below +/- 0.1 dB.

  12. CMOS readout integrated circuit involving pixel-level ADC for microbolometer FPAs

    Science.gov (United States)

    Hwang, C. H.; Kwon, I. W.; Lee, Y. S.; Lee, H. C.

    2008-04-01

    The function of most readout integrated circuits (ROIC) for microbolometer focal plane arrays (FPAs) is supplying a bias voltage to a microbolometer of each pixel, integrating the current of a microbolometer, and transferring the signals from pixels to the output of a chip. However, the scale down of CMOS technology allows the integration of other functions. In this paper, we proposed a CMOS ROIC involving a pixel-level analog-to-digital converter (ADC) for 320 × 240 microbolometer FPAs. Such integration would improve the performance of a ROIC at the reduced system cost and power consumption. The noise performance of a microbolometer is improved by using the pixelwise readout structure because integration time can be increased up to 1ms. A Pixel circuit is consisted of a background skimming circuit, a differential amplifier, an integration capacitor and a 10-bit DRAM. First, the microbolometer current is integrated for 1ms after the skimming current correction. The differential amplifier operates as an op-Amp and the integration capacitor makes negative feedback loop between an output and a negative input of the op-Amp. And then, the integrated signal voltage is converted to digital signals using a modified single slope ADC in a pixel when the differential amplifier operates as a comparator and the 10-bit DRAM stores values of a counter. This readout circuit is designed and fabricated using a standard 0.35μm 2-poly 3-metal CMOS technology.

  13. Silicon PIN diode hybrid arrays for charged particle detection: Building blocks for vertex detectors at the SSC

    Energy Technology Data Exchange (ETDEWEB)

    Kramer, G.; Gaalema, S.; Shapiro, S.L.; Dunwoodie, W.M.; Arens, J.F.; Jernigan, J.G.

    1989-05-01

    Two-dimensional arrays of solid state detectors have long been used in visible and infrared systems. Hybrid arrays with separately optimized detector and readout substrates have been extensively developed for infrared sensors. The characteristics and use of these infrared readout chips with silicon PIN diode arrays produced by MICRON SEMICONDUCTOR for detecting high-energy particles are reported. Some of these arrays have been produced in formats as large as 512 /times/ 512 pixels; others have been radiation hardened to total dose levels beyond 1 Mrad. Data generation rates of 380 megasamples/second have been achieved. Analog and digital signal transmission and processing techniques have also been developed to accept and reduce these high data rates. 9 refs., 15 figs., 2 tabs.

  14. High resolution on-chip optical filter array based on double subwavelength grating reflectors.

    Science.gov (United States)

    Horie, Yu; Arbabi, Amir; Han, Seunghoon; Faraon, Andrei

    2015-11-16

    An optical filter array consisting of vertical narrow-band Fabry-Pérot (FP) resonators formed by two highly reflective high contrast subwavelength grating mirrors is reported. The filters are designed to cover a wide range of operation wavelengths (Δλ/λ = 5%) just by changing the in-plane grating parameters while the device thickness is maintained constant. Operation in the telecom band with transmission efficiencies greater than 40% and quality factors greater than 1,000 are measured experimentally for filters fabricated on the same substrate. PMID:26698468

  15. Design and realisation of integrated circuits for the readout of pixel sensors in high-energy physics and biomedical imaging

    Energy Technology Data Exchange (ETDEWEB)

    Peric, I.

    2004-08-01

    Radiation tolerant pixel-readout chip for the ATLAS pixel detector has been designed, implemented in a deep-submicron CMOS technology and successfully tested. The chip contains readout-channels with complex analog and digital circuits. Chip for steering of the DEPFET active-pixel matrix has been implemented in a high-voltage CMOS technology. The chip contains channels which generate fast sequences of high-voltage signals. Detector containing this chip has been successfully tested. Pixel-readout test chip for an X-ray imaging pixel sensor has been designed, implemented in a CMOS technology and tested. Pixel-readout channels are able to simultaneously count the signals generated by passage of individual photons and to sum the total charge generated during exposure time. (orig.)

  16. System-on-chip field-programmable gate array design for onboard real-time hyperspectral unmixing

    Science.gov (United States)

    Nascimento, José M. P.; Véstias, Mário

    2016-01-01

    Hyperspectral instruments have been incorporated in satellite missions, providing large amounts of data of high spectral resolution of the Earth surface. This data can be used in remote sensing applications that often require a real-time or near-real-time response. To avoid delays between hyperspectral image acquisition and its interpretation, the last usually done on a ground station, onboard systems have emerged to process data, reducing the volume of information to transfer from the satellite to the ground station. For this purpose, compact reconfigurable hardware modules, such as field-programmable gate arrays (FPGAs), are widely used. This paper proposes an FPGA-based architecture for hyperspectral unmixing. This method based on the vertex component analysis (VCA) and it works without a dimensionality reduction preprocessing step. The architecture has been designed for a low-cost Xilinx Zynq board with a Zynq-7020 system-on-chip FPGA-based on the Artix-7 FPGA programmable logic and tested using real hyperspectral data. Experimental results indicate that the proposed implementation can achieve real-time processing, while maintaining the methods accuracy, which indicate the potential of the proposed platform to implement high-performance, low-cost embedded systems, opening perspectives for onboard hyperspectral image processing.

  17. Well-Oriented NanoWell Array Metrics for Digital NanoBioChip

    Science.gov (United States)

    Lee, Heayeon; Lee, Bongkuk; Kawai, Tomoji

    2008-03-01

    Recently many researchers have sought new paradigm for nanobiochip that can be miniaturized and integrated to produce intelligent analysis systems in numerous biotechnology. We have been tried to develop biocompatible materials based nanopatterning, self-assembly array to address challenging problem in nanobioscience. In this time, we describe the nanometrics geometry of a well-oriented nanowell (ONW) array derived from nanofabrication technology which can easily be employed for digital detection with a high S/N ratio, miniaturization, integrated assays and single molecule analysis. We fabricated the self-organized nanopatterning of copolymer as a platform of biomolecular nanoarry using nanolithography. We also present a strong specific antibody-antigen interaction on lipid-membrane modified gold surface using ONW. We believe these findings can be related to various nanobiochip applications. References 1. H.Y. Lee, T. Kawai, K.Y.Suh et al, Advanced Materials, In press (2007). 2. H.Y. Lee, T. Kawai et al, Appl. Phys. Lett. 89, (2006) 113901.

  18. Development of pixel readout integrated circuits for extreme rate and radiation

    CERN Document Server

    Garcia-Sciveres, M; CERN. Geneva. The LHC experiments Committee; LHCC

    2013-01-01

    Letter of Intent for RD Collaboration Proposal focused on development of a next generation pixel readout integrated circuits needed for high luminosity LHC detector upgrades. Brings together ATLAS and CMS pixel chip design communities.

  19. Antenna-coupled bolometer arrays using transition-edge sensors

    International Nuclear Information System (INIS)

    We are developing antenna-coupled Transition-Edge Sensor (TES) bolometer arrays for use in measurements of the CMB polarization. TES bolometers have many well-known advantages over conventional bolometers, such as increased speed, linearity, and the existence of readout multiplexers. Antenna-coupled bolometers use an on-chip planar antenna to couple light into the bolometer. The antenna directivity and polarization sensitivity, along with the potential for on-chip band defining filters and channelizing circuits, allow a significant increase in focal plane integration. This eliminates the bulky horns, quasioptical filters, dichroics, and polarizers which might otherwise be needed in a conventional bolometric system. This simplification will ease the construction of receivers with larger numbers of pixels. We report on the fabrication and optical testing of single antenna-coupled bolometer pixels with integrated band defining filters. We will also discuss current progress on fabrication of a bolometer array based on this design

  20. Chip-based molecularly imprinted monolithic capillary array columns coated GO/SiO2 for selective extraction and sensitive determination of rhodamine B in chili powder.

    Science.gov (United States)

    Zhai, Haiyun; Huang, Lu; Chen, Zuanguang; Su, Zihao; Yuan, Kaisong; Liang, Guohuan; Pan, Yufang

    2017-01-01

    A novel solid-phase extraction chip embedded with array columns of molecularly imprinted polymer-coated silanized graphene oxide (GO/SiO2-MISPE) was established to detect trace rhodamine B (RB) in chili powder. GO/SiO2-MISPE monolithic columns for RB detection were prepared by optimizing the supporting substrate, template, and polymerizing monomer under mild water bath conditions. Adsorption capacity and specificity, which are critical properties for the application of the GO/SiO2-MISPE monolithic column, were investigated. GO/SiO2-MIP was examined by scanning electron microscopy (SEM) and Fourier transform-infrared spectroscopy. The recovery and the intraday and interday relative standard deviations for RB ranged from 83.7% to 88.4% and 2.5% to 4.0% and the enrichment factors were higher than 110-fold. The chip-based array columns effectively eliminated impurities in chili powder, indicating that the chip-based GO/SiO2-MISPE method was reliable for RB detection in food samples using high-performance liquid chromatography. Accordingly, this method has direct applications for monitoring potentially harmful dyes in processed food. PMID:27507523

  1. Single-chip MEMS 5 × 5 and 20 × 20 double-pole single-throw switch arrays for automating telecommunication networks

    International Nuclear Information System (INIS)

    This paper reports on microelectromechanical (MEMS) switch arrays with 5 × 5 and 20 × 20 double-pole single-throw (DPST) switches embedded and packaged on a single chip, which are intended for automating main distribution frames in copper-wire telecommunication networks. Whenever a customer requests a change in his telecommunication services, the copper-wire network has to be reconfigured which is currently done manually by a costly physical re-routing of the connections in the main distribution frames. To reduce the costs, new methods for automating the network reconfiguration are sought after by the network providers. The presented devices comprise 5 × 5 or 20 × 20 double switches, which allow us to interconnect any of the 5 or 20 input lines to any of the 5 or 20 output lines. The switches are based on an electrostatic S-shaped film actuator with the switch contact on a flexible membrane, moving between a top and a bottom electrode. The devices are fabricated in two parts which are designed to be assembled using selective adhesive wafer bonding, resulting in a wafer-scale package of the switch array. The on-chip routing network consists of thick metal lines for low resistance and is embedded in bencocyclobutene (BCB) polymer layers. The packaged 5 × 5 switch arrays have a size of 6.7 × 6.4 mm2 and the 20 × 20 arrays are 14 × 10 mm2 large. The switch actuation voltages for closing/opening the switches averaged over an array were measured to be 21.2 V/15.3 V for the 5 × 5 array and 93.2 V/37.3 V for the 20 × 20 array, respectively. The total signal line resistances vary depending on the switch position within the array between 0.13 Ω and 0.56 Ω for the 5 × 5 array and between 0.08 Ω to 2.33 Ω for the 20 × 20 array, respectively. The average resistance of the switch contacts was determined to be 0.22 Ω with a standard deviation of 0.05 Ω

  2. Single-chip MEMS 5 × 5 and 20 × 20 double-pole single-throw switch arrays for automating telecommunication networks

    Science.gov (United States)

    Braun, S.; Oberhammer, J.; Stemme, G.

    2008-01-01

    This paper reports on microelectromechanical (MEMS) switch arrays with 5 × 5 and 20 × 20 double-pole single-throw (DPST) switches embedded and packaged on a single chip, which are intended for automating main distribution frames in copper-wire telecommunication networks. Whenever a customer requests a change in his telecommunication services, the copper-wire network has to be reconfigured which is currently done manually by a costly physical re-routing of the connections in the main distribution frames. To reduce the costs, new methods for automating the network reconfiguration are sought after by the network providers. The presented devices comprise 5 × 5 or 20 × 20 double switches, which allow us to interconnect any of the 5 or 20 input lines to any of the 5 or 20 output lines. The switches are based on an electrostatic S-shaped film actuator with the switch contact on a flexible membrane, moving between a top and a bottom electrode. The devices are fabricated in two parts which are designed to be assembled using selective adhesive wafer bonding, resulting in a wafer-scale package of the switch array. The on-chip routing network consists of thick metal lines for low resistance and is embedded in bencocyclobutene (BCB) polymer layers. The packaged 5 × 5 switch arrays have a size of 6.7 × 6.4 mm2 and the 20 × 20 arrays are 14 × 10 mm2 large. The switch actuation voltages for closing/opening the switches averaged over an array were measured to be 21.2 V/15.3 V for the 5 × 5 array and 93.2 V/37.3 V for the 20 × 20 array, respectively. The total signal line resistances vary depending on the switch position within the array between 0.13 Ω and 0.56 Ω for the 5 × 5 array and between 0.08 Ω to 2.33 Ω for the 20 × 20 array, respectively. The average resistance of the switch contacts was determined to be 0.22 Ω with a standard deviation of 0.05 Ω.

  3. Performance of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon Pixel readout for Cherenkov ring detection

    CERN Document Server

    Alemi, M; Bibby, J H; Campbell, M; Duane, A; Easo, S; Gys, Thierry; Halley, A W; Piedigrossi, D; Puertolas, D; Rosso, E; Simmons, B; Snoeys, W; Websdale, David M; Wotton, S A; Wyllie, Ken H

    1999-01-01

    We report on the first test beam performance of a hybrid photon detector prototype, using binary readout electronics, intended for use in the ring imaging Cherenkov detectors of the LHCb experiment at the CERN Large Hadron Collider. The photon detector is based on a cross-focussed image intensifier tube geometry. The anode consists of a silicon pixel array bump-bonded to a binary readout chip with matching pixel electronics. The detector has been installed in a quarter-scale prototype vessel of the LHCb ring imaging Cherenkov system. Focussed ring images produced by 120 GeV/c negative pions traversing an air radiator have been recorded. The observed light yield and Cherenkov angle resolution are discussed.

  4. A linear monolithic 4-6 on silicon IR detector array

    Science.gov (United States)

    Vandamme, J.; Vermeiren, J.; Zogg, H.; Masek, J.; Fabbricotti, M.

    1992-12-01

    A linear array of monolithically grown PbTe and PbSnSe detectors on (111)-Si for MWIR and TIR imaging applications was designed and processed. The array consists of a staggered row of 2 by 128 detectors on a 100 micrometers pitch. The readout circuitry, integrated on the Si substrate consists of a COS multiplexer with a direct injection input stage, a charge reduction stage and charge to voltage conversion stage for each individual detector. This XDI (MultipeXed Direct Injection) circuit also allows for on-chip nonuniformity compensation with a switched capacitor network.

  5. Characterization of Silicon Detector Readout Electronics

    Energy Technology Data Exchange (ETDEWEB)

    Jones, M. [Purdue U.

    2015-07-22

    Configuration and calibration of the front-end electronics typical of many silicon detector configurations were investigated in a lab activity based on a pair of strip sensors interfaced with FSSR2 read-out chips and an FPGA. This simple hardware configuration, originally developed for a telescope at the Fermilab Test Beam Facility, was used to measure thresholds and noise on individual readout channels and to study the influence that different configurations of the front-end electronics had on the observed levels of noise in the system. An understanding of the calibration and operation of this small detector system provided an opportunity to explore the architecture of larger systems such as those currently in use at LHC experiments.

  6. Microwave multiplex readout for superconducting sensors

    Science.gov (United States)

    Ferri, E.; Becker, D.; Bennett, D.; Faverzani, M.; Fowler, J.; Gard, J.; Giachero, A.; Hays-Wehle, J.; Hilton, G.; Maino, M.; Mates, J.; Puiu, A.; Nucciotti, A.; Reintsema, C.; Schmidt, D.; Swetz, D.; Ullom, J.; Vale, L.

    2016-07-01

    The absolute neutrino mass scale is still an outstanding challenge in both particle physics and cosmology. The calorimetric measurement of the energy released in a nuclear beta decay is a powerful tool to determine the effective electron-neutrino mass. In the last years, the progress on low temperature detector technologies has allowed to design large scale experiments aiming at pushing down the sensitivity on the neutrino mass below 1 eV. Even with outstanding performances in both energy (~ eV on keV) and time resolution (~ 1 μs) on the single channel, a large number of detectors working in parallel is required to reach a sub-eV sensitivity. Microwave frequency domain readout is the best available technique to readout large array of low temperature detectors, such as Transition Edge Sensors (TESs) or Microwave Kinetic Inductance Detectors (MKIDs). In this way a multiplex factor of the order of thousands can be reached, limited only by the bandwidth of the available commercial fast digitizers. This microwave multiplexing system will be used to readout the HOLMES detectors, an array of 1000 microcalorimeters based on TES sensors in which the 163Ho will be implanted. HOLMES is a new experiment for measuring the electron neutrino mass by means of the electron capture (EC) decay of 163Ho. We present here the microwave frequency multiplex which will be used in the HOLMES experiment and the microwave frequency multiplex used to readout the MKID detectors developed in Milan as well.

  7. Design of driving circuit for infrared focal plane array readout circuit%红外焦平面读出电路片上驱动电路设计

    Institute of Scientific and Technical Information of China (English)

    黄张成; 黄松垒; 张伟; 陈郁; 方家熊

    2011-01-01

    线列红外焦平面读出电路在正常工作时需要提供多路数字脉冲和多路直流偏置电压.本文基于0.5 μm CMOS工艺设计了一款驱动电路芯片,为电容负反馈放大型(CTIA)读出电路(ROIC)提供驱动信号.电路芯片采用带隙基准电路产生低噪声低温漂的直流偏置电压,采用数字逻辑电路生成CLK1,CLK2,RESET等八路数字脉冲.仿真及测试结果表明:驱动电路芯片输出的数字脉冲及偏置电压符合设计值,可驱动CTIA型线列红外焦平面读出电路稳定工作.%Readout integrated circuit (ROIC) of linear infrared focal plane array (FPA) with capacitive trans-impedance amplifier (CTIA) should be applied with clock pulses and DC bias voltage. In this paper,a method of designing clock pulses and DC voltage for linear infrared FPA CTIA ROIC is presented. The DC voltage ( about 2.6 V) is generated by bandgap reference circuit, and the eight clock pulses ( CLK1, CLK2, RESET, SH1N, SH1P, SH2N, SH2P and ST) are generated by a digital logic circuit with two input signals (CLK and LSYNC). Simulation and test results show that this driving circuit can drive FPA steadily.

  8. Design & fabrication of cantilever array biosensors

    Directory of Open Access Journals (Sweden)

    Anja Boisen

    2009-09-01

    Full Text Available Surface immobilization of functional receptors on microfabricated cantilever arrays offers a new paradigm for the development of biosensors based on nanomechanics. Microcantilever-based systems are capable of real-time, multiplexed detection of unlabeled disease markers in extremely small volumes of samples. Currently available fabrication technology will allow the integration of electronic readout and sample introduction into a single unit, decreasing the device size, detection time, and cost. Biosensing technologies based on microfabricated cantilever arrays involving multiple cantilevers, electronic processing, and even local telemetry on a single chip have the potential of satisfying the need for highly sensitive and selective multiple-target detection in very small samples. Here we will review the design and fabrication process of cantilever-based biosensors.

  9. Implementation of the Timepix ASIC in the Scalable Readout System

    Science.gov (United States)

    Lupberger, M.; Desch, K.; Kaminski, J.

    2016-09-01

    We report on the development of electronics hardware, FPGA firmware and software to provide a flexible multi-chip readout of the Timepix ASIC within the framework of the Scalable Readout System (SRS). The system features FPGA-based zero-suppression and the possibility to read out up to 4×8 chips with a single Front End Concentrator (FEC). By operating several FECs in parallel, in principle an arbitrary number of chips can be read out, exploiting the scaling features of SRS. Specifically, we tested the system with a setup consisting of 160 Timepix ASICs, operated as GridPix devices in a large TPC field cage in a 1 T magnetic field at a DESY test beam facility providing an electron beam of up to 6 GeV. We discuss the design choices, the dedicated hardware components, the FPGA firmware as well as the performance of the system in the test beam.

  10. Study and optimization of the spatial resolution for detectors with binary readout

    CERN Document Server

    Yonamine, Ryo; De Lentdecker, Gilles

    2016-01-01

    Using simulations and analytical approaches, we have studied single hit resolutions obtained with a binary readout, which is often proposed for high granularity detectors to reduce the generated data volume. Our simulations considering several parameters (e.g. strip pitch) show that the detector geometry and an electronics parameter of the binary readout chips could be optimized for binary readout to offer an equivalent spatial resolution to the one with an analogue readout. To understand the behavior as a function of simulation parameters, we developed analytical models that reproduce simulation results with a few parameters. The models can be used to optimize detector designs and operation conditions with regard to the spatial resolution.

  11. Increasing Electrochemiluminescence Intensity of a Wireless Electrode Array Chip by Thousands of Times Using a Diode for Sensitive Visual Detection by a Digital Camera.

    Science.gov (United States)

    Qi, Liming; Xia, Yong; Qi, Wenjing; Gao, Wenyue; Wu, Fengxia; Xu, Guobao

    2016-01-19

    Both a wireless electrochemiluminescence (ECL) electrode microarray chip and the dramatic increase in ECL by embedding a diode in an electromagnetic receiver coil have been first reported. The newly designed device consists of a chip and a transmitter. The chip has an electromagnetic receiver coil, a mini-diode, and a gold electrode array. The mini-diode can rectify alternating current into direct current and thus enhance ECL intensities by 18 thousand times, enabling a sensitive visual detection using common cameras or smart phones as low cost detectors. The detection limit of hydrogen peroxide using a digital camera is comparable to that using photomultiplier tube (PMT)-based detectors. Coupled with a PMT-based detector, the device can detect luminol with higher sensitivity with linear ranges from 10 nM to 1 mM. Because of the advantages including high sensitivity, high throughput, low cost, high portability, and simplicity, it is promising in point of care testing, drug screening, and high throughput analysis. PMID:26669809

  12. Recurrence Quantification Analysis of Spontaneous Electrophysiological Activity during Development: Characterization of In Vitro Neuronal Networks Cultured on Multi Electrode Array Chips

    Directory of Open Access Journals (Sweden)

    Antonio Novellino

    2010-01-01

    Full Text Available The combination of a nonlinear time series analysis technique, Recurrence Quantification Analysis (RQA based on Recurrence Plots (RPs, and traditional statistical analysis for neuronal electrophysiology is proposed in this paper as an innovative paradigm for studying the variation of spontaneous electrophysiological activity of in vitro Neuronal Networks (NNs coupled to Multielectrode Array (MEA chips. Recurrence, determinism, entropy, distance of activity patterns, and correlation in correspondence to spike and burst parameters (e.g., mean spiking rate, mean bursting rate, burst duration, spike in burst, etc. have been computed to characterize and assess the daily changes of the neuronal electrophysiology during neuronal network development and maturation. The results show the similarities/differences between several channels and time periods as well as the evolution of the spontaneous activity in the MEA chip. RPs could be used for graphically exploring possible neuronal dynamic breaking/changing points, whereas RQA parameters are suited for locating them. The combination of RQA with traditional approaches improves the identification, description, and prediction of electrophysiological changes and it will be used to allow intercomparison between results obtained from different MEA chips. Results suggest the proposed processing paradigm as a valuable tool to analyze neuronal activity for screening purposes (e.g., toxicology, neurodevelopmental toxicology.

  13. Design and Realisation of Integrated Circuits for the Readout of Pixel Sensors in High Energy Physics and Biomedical Imaging

    CERN Document Server

    Peric, Ivan

    2004-01-01

    Several application specific microchips (ASICs) for the readout of pixel detectors have been designed, tested and described in this thesis. The first chapter gives the detailed description of the pixel-readout chip for the ATLAS pixel detector (FEI). The chip is now in operation as the innermost electronic component of the ATLAS detector. The chip for steering of DEPFET matrix (SWITCHER) is described in the second chapter. The chip is implemented in a high-voltage CMOS technology, it generates fast high voltage signals. Finally, a novel pixel readout chip for a hybrid x-ray pixel detector based on direct conversion is introduced. The chip (CIX) has joint photon counting and integrating capability.

  14. Yarr: A PCIe based readout system for semiconductor tracking systems

    International Nuclear Information System (INIS)

    The Yarr readout system is a novel DAQ concept, using an FPGA board connected via PCIe to a computer, to read out semiconductor tracking systems. The system uses the FPGA as a reconfigurable IO interface which, in conjunction with the very high speed of the PCIe bus, enables a focus of processing the data stream coming from the pixel detector in software. Modern computer system could potentially make the need of custom signal processing hardware in readout systems obsolete and the Yarr readout system showcases this for FE-I4 chips, which are state-of-the-art readout chips used in the ATLAS Pixel Insertable B-Layer and developed for tracking in high multiplicity environments. The underlying concept of the Yarr readout system tries to move intelligence from hardware into the software without the loss of performance, which is made possible by modern multi-core processors. The FPGA board firmware acts like a buffer and does no further processing of the data stream, enabling rapid integration of new hardware due to minimal firmware minimisation.

  15. A 2.5 mW 370 mV/pF high linearity stray-immune symmetrical readout circuit for capacitive sensors

    Institute of Scientific and Technical Information of China (English)

    Zhou Kaimin; Wang Ziqiang; Zhang Chun; Wang Zhihua

    2012-01-01

    A stray-insensitive symmetrical capacitance-to-voltage converter for capacitive sensors is presented.By introducing a reference branch,a symmetrical readout circuit is realized.The linear input range is increased,and the systematic offsets of two input op-amps are cancelled.The common-mode noise and even-order distortion are also rejected.A chopper stabilization technique is adopted to further reduce the offset and flicker noise of the op-amps,and a Verilog-A-based varaetor is used to model the real variable sensing capacitor.Simulation results show that the output voltage of this proposed readout circuit responds correctly,while the under-test capacitance changes with a frequency of 1 kHz.A metal-insulator-metal capacitor array is designed on chip for measurement,and the measurement results show that this circuit achieves sensitivity of 370 mV/pF,linearity error below 1% and power consumption as low as 2.5 mW.This symmetrical readout circuit can respond to an FPGA controlled sensing capacitor array changed every 1 ms.

  16. Two dimensional array of piezoresistive nanomechanical Membrane-type Surface Stress Sensor (MSS) with improved sensitivity.

    Science.gov (United States)

    Yoshikawa, Genki; Akiyama, Terunobu; Loizeau, Frederic; Shiba, Kota; Gautsch, Sebastian; Nakayama, Tomonobu; Vettiger, Peter; de Rooij, Nico F; Aono, Masakazu

    2012-01-01

    We present a new generation of piezoresistive nanomechanical Membrane-type Surface stress Sensor (MSS) chips, which consist of a two dimensional array of MSS on a single chip. The implementation of several optimization techniques in the design and microfabrication improved the piezoresistive sensitivity by 3~4 times compared to the first generation MSS chip, resulting in a sensitivity about ~100 times better than a standard cantilever-type sensor and a few times better than optical read-out methods in terms of experimental signal-to-noise ratio. Since the integrated piezoresistive read-out of the MSS can meet practical requirements, such as compactness and not requiring bulky and expensive peripheral devices, the MSS is a promising transducer for nanomechanical sensing in the rapidly growing application fields in medicine, biology, security, and the environment. Specifically, its system compactness due to the integrated piezoresistive sensing makes the MSS concept attractive for the instruments used in mobile applications. In addition, the MSS can operate in opaque liquids, such as blood, where optical read-out techniques cannot be applied. PMID:23202237

  17. Two Dimensional Array of Piezoresistive Nanomechanical Membrane-Type Surface Stress Sensor (MSS with Improved Sensitivity

    Directory of Open Access Journals (Sweden)

    Nico F. de Rooij

    2012-11-01

    Full Text Available We present a new generation of piezoresistive nanomechanical Membrane-type Surface stress Sensor (MSS chips, which consist of a two dimensional array of MSS on a single chip. The implementation of several optimization techniques in the design and microfabrication improved the piezoresistive sensitivity by 3~4 times compared to the first generation MSS chip, resulting in a sensitivity about ~100 times better than a standard cantilever-type sensor and a few times better than optical read-out methods in terms of experimental signal-to-noise ratio. Since the integrated piezoresistive read-out of the MSS can meet practical requirements, such as compactness and not requiring bulky and expensive peripheral devices, the MSS is a promising transducer for nanomechanical sensing in the rapidly growing application fields in medicine, biology, security, and the environment. Specifically, its system compactness due to the integrated piezoresistive sensing makes the MSS concept attractive for the instruments used in mobile applications. In addition, the MSS can operate in opaque liquids, such as blood, where optical read-out techniques cannot be applied.

  18. Readout integrated circuit for microbolometer with an analog non-uniformity correction

    Science.gov (United States)

    Hwang, C. H.; Woo, D. H.; Lee, Y. S.; Lee, H. C.

    2005-10-01

    We have developed a microbolometer readout integrated circuit (ROIC) that corrects the non-uniformity in analog operation and acts in both normal mode and edge detection mode. A capacitive transimpedance amplifier (CTIA) has been employed as the input circuit of the microbolometer. Generally, when fabricating microbolometer focal plane arrays (FPAs), offset-error and gain-error in the inter-microbolometer are induced by fabrication error. They are shown as fixed pattern noise (FPN) in the infrared image. In the present study, a circuit correcting the offset-error and the gain-error in the normal mode by controlling the bias and the integration capacitance of the CTIA is proposed. This circuit does not require an additional DSP chip, and the non-uniformity is corrected before the analog to digital conversion (ADC). Thus, it can utilize 3-4 bits lower ADC compared to the conventional readout circuit. In the edge detection mode, after correcting the gain-error in two adjacent pixels, edge detection can be realized by subtracting their signal without the DSP. We have designed the suggested circuit to output a 10bit level effective infrared signal using 0.35um 2-poly 3-metal CMOS technology.

  19. The readout system for the LHCb Outer Tracker

    CERN Document Server

    Wiedner, D; Apeldorn, G; Bachmann, S; Bagaturia, Yu S; Bauer, T; Berkien, A; Blouw, J; Bos, E; Deisenroth, M; Dubitzki, R; Eisele, F; Guz, Yu; Haas, T; Hommels, B; Ketel, T; Knopf, J; Merk, M; Nardulli, J; Nedos, M; Pellegrino, A; Rausch, A; Rusnyak, R; Schwemmer, R; Simoni, E; Sluijk, T; Spaan, B; Spelt, J; Stange, U; Van Tilburg, J; Trunk, U; Tuning, N; Uwer, U; Vankow, P; Warda, K

    2007-01-01

    The LHCb Outer Tracker is composed of 55 000 straw drift tubes. The requirements for the OT electronics are the precise (1 ns) drift time measurement at 6 % occupancy and 1 MHz readout. Charge signals from the straw detector are amplified, shaped and discriminated by ATLAS ASDBLR chips. Drift-times are determined and stored in the OTIS TDC and put out to a GOL serializer at L0 accept. Optical fibres carry the data 90 m to the TELL1 acquisition board. The full readout chain performed well in an e- test beam.

  20. A Readout System for the LHCb Outer Tracker

    CERN Document Server

    Wiedner, D; Apeldorn , G; Bachmann, S; Bagaturi , I; Bauer, T; Berkien, A; Blouw, J; Bos, E; Deisenroth, M; Dubitzki, R; Eisele, F; Guz , Y; Haas, T; Hommels, B; Ketel, T; Knopf , J; Merk , M; Nardulli , J; Nedos, M; Pellegrino, A; Rausch, A; Rusnyak, R; Schwemmer, R; Simoni, E; Sluijk , T; Spaan, B; Spelt , J; Stange, U; van Tilburg, J; Trunk , U; Tuning , N; Uwer, U; Vankow , P; Warda, K

    2006-01-01

    The LHCb Outer Tracker is composed of 55 000 straw drift tubes. The requirements for the OT electronics are the precise (1 ns) drift time measurement at 6 % occupancy and 1 MHz readout. Charge signals from the straw detector are amplified, shaped and discriminated by ATLAS ASDBLR chips. Drift-times are determined and stored in the OTIS TDC and put out to a GOL serializer at L0 accept. Optical fibres carry the data 90 m to the TELL1 acquisition board. The full readout chain performed well in an e- test beam.

  1. The pixel readout system for the PHENIX pad chambers

    CERN Document Server

    Nilsson, P B; Bryan, W; Fraenkel, Zeev; Garpman, S; Greene, V; Gustafsson, Hans Åke; Jagadish, U; Lacey, R; Lauret, J; Mark, S K; Milov, A; Nikkinen, L; O'Brien, E; Oskarsson, A; Otterlund, I; Pinkenburg, C H; Ravinovich, I; Rose, A; Silvermyr, D; Sivertz, M; Smith, M; Stenlund, E; Svensson, T; Teodorescu, O; Tserruya, Itzhak; Xie, W; Young, G R; Österman, L

    1999-01-01

    A new concept for two-dimensional position readout of wire chambers is described. The basic idea is to use a cathode segmented into small pixels that are read out in specific groups (pads). The electronics is mounted on the outer face of the chamber with a chip-on-board technique, pushing the material thickness to a minimum. The system described here, containing 210 000 readout channels, will be used to read out the pad chambers in the PHENIX experiment at the Relativistic Heavy Ion Collider (RHIC).

  2. The pixel readout system for the PHENIX pad chambers

    International Nuclear Information System (INIS)

    A new concept for two-dimensional position readout of wire chambers is described. The basic idea is to use a cathode segmented into small pixels that are read out in specific groups (pads). The electronics is mounted on the outer face of the chamber with a chip-on-board technique, pushing the material thickness to a minimum. The system described here, containing 210 000 readout channels, will be used to read out the pad chambers in the PHENIX experiment at the Relativistic Heavy Ion Collider (RHIC)

  3. XAMPS Detectors Readout ASIC for LCLS

    Energy Technology Data Exchange (ETDEWEB)

    Dragone, A; /SLAC; Pratte, J.F.; Rehak, P.; /Brookhaven; Carini, G.A.; /BNL, NSLS; Herbst, R.; /SLAC; O' Connor, P.; /Brookhaven; Siddons, D.P.; /BNL, NSLS

    2008-12-18

    An ASIC for the readout of signals from X-ray Active Matrix Pixel Sensor (XAMPS) detectors to be used at the Linac Coherent Light Source (LCLS) is presented. The X-ray Pump Probe (XPP) instrument, for which the ASIC has been designed, requires a large input dynamic range on the order of 104 photons at 8 keV with a resolution of half a photon FWHM. Due to the size of the pixel and the length of the readout line, large input capacitance is expected, leading to stringent requirement on the noise optimization. Furthermore, the large number of pixels needed for a good position resolution and the fixed LCLS beam period impose limitations on the time available for the single pixel readout. Considering the periodic nature of the LCLS beam, the ASIC developed for this application is a time-variant system providing low-noise charge integration, filtering and correlated double sampling. In order to cope with the large input dynamic range a charge pump scheme implementing a zero-balance measurement method has been introduced. It provides an on chip 3-bit coarse digital conversion of the integrated charge. The residual charge is sampled using correlated double sampling into analog memory and measured with the required resolution. The first 64 channel prototype of the ASIC has been fabricated in TSMC CMOS 0.25 {micro}m technology. In this paper, the ASIC architecture and performances are presented.

  4. Flow-orthogonal bead oscillation in a microfluidic chip with a magnetic anisotropic flux-guide array

    DEFF Research Database (Denmark)

    Van Pelt, Stijn; Derks, Roy; Matteucci, Marco;

    2011-01-01

    A new concept for the manipulation of superparamagnetic beads inside a microfluidic chip is presented in this paper. The concept allows for bead actuation orthogonal to the flow direction inside a microchannel. Basic manipulation functionalities were studied by means of finite element simulations...

  5. Silicon on-chip side-coupled high-Q micro-cavities for the multiplexing of high sensitivity photonic crystal integrated sensors array

    Science.gov (United States)

    Yang, Daquan; Wang, Chunhong; Yuan, Wei; Wang, Bo; Yang, Yujie; Ji, Yuefeng

    2016-09-01

    A novel two-dimensional (2D) silicon (Si) photonic crystal (PC) α-H0-slot micro-cavity with high Q-factor and high sensitivity (S) is presented. Based on the proposed α-H0-Slot micro-cavities, an optimal design of photonic crystal integrated sensors array (PC-ISA) on monolithic silicon on insulator (SOI) is displayed. By using finite-difference time-domain (FDTD) method, the simulation results demonstrate that both large S of 200 nm/RIU (RIU=refractive index unit) and high Q-factor >104 at telecom wavelength range can be achieved simultaneously. And the sensor figure of merit (FOM)>7000 is featured, an order of magnitude improvement over previous 2D PC sensors array. In addition, for the proposed 2D PC-ISA device, each sensor unit is shown to independently shift its resonance wavelength in response to the changes in refractive index (RI) and does not perturb the others. Thus, it is potentially an ideal platform for realizing ultra-compact lab-on-a-chip applications with dense arrays of functionalized spots for multiplexed sensing, and also can be used as an opto-fluidic architecture for performing highly parallel detection of biochemical interactions in aqueous environments.

  6. Characterization of Ni/SnPb-TiW/Pt Flip Chip Interconnections in Silicon Pixel Detector Modules

    CERN Document Server

    Karadzhinova, Aneliya; Härkönen, Jaakko; Luukka, Panja-riina; Mäenpää, Teppo; Tuominen, Eija; Haeggstrom, Edward; Kalliopuska, Juha; Vahanen, Sami; Kassamakov, Ivan

    2014-01-01

    In contemporary high energy physics experiments, silicon detectors are essential for recording the trajectory of new particles generated by multiple simultaneous collisions. Modern particle tracking systems may feature 100 million channels, or pixels, which need to be individually connected to read-out chains. Silicon pixel detectors are typically connected to readout chips by flip-chip bonding using solder bumps. High-quality electro-mechanical flip-chip interconnects minimizes the number of dead read-out channels in the particle tracking system. Furthermore, the detector modules must endure handling during installation and withstand heat generation and cooling during operation. Silicon pixel detector modules were constructed by flip-chip bonding 16 readout chips to a single sensor. Eutectic SnPb solder bumps were deposited on the readout chips and the sensor chips were coated with TiW/Pt thin film UBM (under bump metallization). The modules were assembled at Advacam Ltd, Finland. We studied the uniformity o...

  7. Single-Readout High-Density Memristor Crossbar

    KAUST Repository

    Zidan, M. A.

    2016-01-07

    High-density memristor-crossbar architecture is a very promising technology for future computing systems. The simplicity of the gateless-crossbar structure is both its principal advantage and the source of undesired sneak-paths of current. This parasitic current could consume an enormous amount of energy and ruin the readout process. We introduce new adaptive-threshold readout techniques that utilize the locality and hierarchy properties of the computer-memory system to address the sneak-paths problem. The proposed methods require a single memory access per pixel for an array readout. Besides, the memristive crossbar consumes an order of magnitude less power than state-of-the-art readout techniques.

  8. Single-Readout High-Density Memristor Crossbar

    Science.gov (United States)

    Zidan, M. A.; Omran, H.; Naous, R.; Sultan, A.; Fahmy, H. A. H.; Lu, W. D.; Salama, K. N.

    2016-01-01

    High-density memristor-crossbar architecture is a very promising technology for future computing systems. The simplicity of the gateless-crossbar structure is both its principal advantage and the source of undesired sneak-paths of current. This parasitic current could consume an enormous amount of energy and ruin the readout process. We introduce new adaptive-threshold readout techniques that utilize the locality and hierarchy properties of the computer-memory system to address the sneak-paths problem. The proposed methods require a single memory access per pixel for an array readout. Besides, the memristive crossbar consumes an order of magnitude less power than state-of-the-art readout techniques.

  9. Dual-readout Calorimetry

    CERN Document Server

    Akchurin, N; Cardini, A.; Cascella, M.; Cei, F.; De Pedis, D.; Fracchia, S.; Franchino, S.; Fraternali, M.; Gaudio, G.; Genova, P.; Hauptman, J.; La Rotonda, L.; Lee, S.; Livan, M.; Meoni, E.; Moggi, A.; Pinci, D.; Policicchio, A.; Saraiva, J.G.; Sill, A.; Venturelli, T.; Wigmans, R.

    2013-01-01

    The RD52 Project at CERN is a pure instrumentation experiment whose goal is to un- derstand the fundamental limitations to hadronic energy resolution, and other aspects of energy measurement, in high energy calorimeters. We have found that dual-readout calorimetry provides heretofore unprecedented information event-by-event for energy resolution, linearity of response, ease and robustness of calibration, fidelity of data, and particle identification, including energy lost to binding energy in nuclear break-up. We believe that hadronic energy resolutions of {\\sigma}/E $\\approx$ 1 - 2% are within reach for dual-readout calorimeters, enabling for the first time comparable measurement preci- sions on electrons, photons, muons, and quarks (jets). We briefly describe our current progress and near-term future plans. Complete information on all aspects of our work is available at the RD52 website http://highenergy.phys.ttu.edu/dream/.

  10. A novel rabbit immunospot array assay on a chip allows for the rapid generation of rabbit monoclonal antibodies with high affinity.

    Directory of Open Access Journals (Sweden)

    Tatsuhiko Ozawa

    Full Text Available Antigen-specific rabbit monoclonal antibodies (RaMoAbs are useful due to their high specificity and high affinity, and the establishment of a comprehensive and rapid RaMoAb generation system has been highly anticipated. Here, we present a novel system using immunospot array assay on a chip (ISAAC technology in which we detect and retrieve antigen-specific antibody-secreting cells from the peripheral blood lymphocytes of antigen-immunized rabbits and produce antigen-specific RaMoAbs with 10(-12 M affinity within a time period of only 7 days. We have used this system to efficiently generate RaMoAbs that are specific to a phosphorylated signal-transducing molecule. Our system provides a new method for the comprehensive and rapid production of RaMoAbs, which may contribute to laboratory research and clinical applications.

  11. Genome-wide loss of heterozygosity and copy number alteration in esophageal squamous cell carcinoma using the Affymetrix GeneChip Mapping 10 K array

    Directory of Open Access Journals (Sweden)

    Goldstein Alisa M

    2006-11-01

    Full Text Available Abstract Background Esophageal squamous cell carcinoma (ESCC is a common malignancy worldwide. Comprehensive genomic characterization of ESCC will further our understanding of the carcinogenesis process in this disease. Results Genome-wide detection of chromosomal changes was performed using the Affymetrix GeneChip 10 K single nucleotide polymorphism (SNP array, including loss of heterozygosity (LOH and copy number alterations (CNA, for 26 pairs of matched germ-line and micro-dissected tumor DNA samples. LOH regions were identified by two methods – using Affymetrix's genotype call software and using Affymetrix's copy number alteration tool (CNAT software – and both approaches yielded similar results. Non-random LOH regions were found on 10 chromosomal arms (in decreasing order of frequency: 17p, 9p, 9q, 13q, 17q, 4q, 4p, 3p, 15q, and 5q, including 20 novel LOH regions (10 kb to 4.26 Mb. Fifteen CNA-loss regions (200 kb to 4.3 Mb and 36 CNA-gain regions (200 kb to 9.3 Mb were also identified. Conclusion These studies demonstrate that the Affymetrix 10 K SNP chip is a valid platform to integrate analyses of LOH and CNA. The comprehensive knowledge gained from this analysis will enable improved strategies to prevent, diagnose, and treat ESCC.

  12. Noise and mismatch optimization for capacitive MEMS readout

    Institute of Scientific and Technical Information of China (English)

    Zhang Chong; Wu Qisong; Yin Tao; Yang Haigang

    2009-01-01

    This paper presents a high precision CMOS readout circuit for a capacitive MEMS gyroscope. A continuous time topology is employed as well as the chopper noise cancelling technique. A detailed analysis of the noise and mismatch of the capacitive readout circuit is given. The analysis and measurement results have shown that thermal noise dominates in the proposed circuit, and several approaches should be used for both noise and mismatch optimization. The circuit chip operates under a single 5 V supply, and has a measured capacitance resolution of 0.2 aF/√Hz. With such a readout circuit, the gyroscope can accurately measure the angular rate with a sensitivity of 15.3 mV/°/s.

  13. Noise and mismatch optimization for capacitive MEMS readout

    Energy Technology Data Exchange (ETDEWEB)

    Zhang Chong; Wu Qisong; Yin Tao; Yang Haigang, E-mail: yanghg@mail.ie.ac.c [Institute of Electronics, Chinese Academy of Sciences, Beijing 100190 (China)

    2009-11-15

    This paper presents a high precision CMOS readout circuit for a capacitive MEMS gyroscope. A continuous time topology is employed as well as the chopper noise cancelling technique. A detailed analysis of the noise and mismatch of the capacitive readout circuit is given. The analysis and measurement results have shown that thermal noise dominates in the proposed circuit, and several approaches should be used for both noise and mismatch optimization. The circuit chip operates under a single 5 V supply, and has a measured capacitance resolution of 0.2 aF/sq rootHz. With such a readout circuit, the gyroscope can accurately measure the angular rate with a sensitivity of 15.3 mV/{sup 0}/s. (semiconductor integrated circuits)

  14. Fast batch injection analysis of H{sub 2}O{sub 2} using an array of Pt-modified gold microelectrodes obtained from split electronic chips

    Energy Technology Data Exchange (ETDEWEB)

    Pacheco, Bruno D.; Valerio, Jaqueline [Centro de Ciencias e Humanidades - Universidade Presbiteriana Mackenzie, Rua da Consolacao, 896, 01302-907 Sao Paulo, SP (Brazil); Angnes, Lucio [Departamento de Quimica Fundamental, Instituto de Quimica da USP, Av. Prof. Lineu Prestes, 748, 05508-000 Cidade Universitaria, Sao Paulo, SP (Brazil); Pedrotti, Jairo J., E-mail: jpedrotti@mackenzie.br [Centro de Ciencias e Humanidades - Universidade Presbiteriana Mackenzie, Rua da Consolacao, 896, 01302-907 Sao Paulo, SP (Brazil)

    2011-06-24

    Graphical abstract: Highlights: > An array of gold microelectrodes modified with Pt was used for batch injection analysis of H{sub 2}O{sub 2} in rainwater. > The microelectrode array (n = 14) was obtained from electronic chips developed for surface mounted device technology. > The analytical frequency of the method can attain 300 determinations per hour. > The volume-weighted mean concentration of H{sub 2}O{sub 2} in rainwater investigated (n = 25) was 14.2 {mu}mol L{sup -1}. - Abstract: A fast and robust analytical method for amperometric determination of hydrogen peroxide (H{sub 2}O{sub 2}) based on batch injection analysis (BIA) on an array of gold microelectrodes modified with platinum is proposed. The gold microelectrode array (n = 14) was obtained from electronic chips developed for surface mounted device technology (SMD), whose size offers advantages to adapt them in batch cells. The effect of the dispensing rate, volume injected, distance between the platinum microelectrodes and the pipette tip, as well as the volume of solution in the cell on the analytical response were evaluated. The method allows the H{sub 2}O{sub 2} amperometric determination in the concentration range from 0.8 {mu}mol L{sup -1} to 100 {mu}mol L{sup -1}. The analytical frequency can attain 300 determinations per hour and the detection limit was estimated in 0.34 {mu}mol L{sup -1} (3{sigma}). The anodic current peaks obtained after a series of 23 successive injections of 50 {mu}L of 25 {mu}mol L{sup -1} H{sub 2}O{sub 2} showed an RSD < 0.9%. To ensure the good selectivity to detect H{sub 2}O{sub 2}, its determination was performed in a differential mode, with selective destruction of the H{sub 2}O{sub 2} with catalase in 10 mmol L{sup -1} phosphate buffer solution. Practical application of the analytical procedure involved H{sub 2}O{sub 2} determination in rainwater of Sao Paulo City. A comparison of the results obtained by the proposed amperometric method with another one which

  15. Silicon on-chip 1D photonic crystal nanobeam bandstop filters for the parallel multiplexing of ultra-compact integrated sensor array.

    Science.gov (United States)

    Yang, Daquan; Wang, Chuan; Ji, Yuefeng

    2016-07-25

    We propose a novel multiplexed ultra-compact high-sensitivity one-dimensional (1D) photonic crystal (PC) nanobeam cavity sensor array on a monolithic silicon chip, referred to as Parallel Integrated 1D PC Nanobeam Cavity Sensor Array (PI-1DPC-NCSA). The performance of the device is investigated numerically with three-dimensional finite-difference time-domain (3D-FDTD) technique. The PI-1DPC-NCSA consists of multiple parallel-connected channels of integrated 1D PC nanobeam cavities/waveguides with gap separations. On each channel, by connecting two additional 1D PC nanobeam bandstop filters (1DPC-NBFs) to a 1D PC nanobeam cavity sensor (1DPC-NCS) in series, a transmission spectrum with a single targeted resonance is achieved for the purpose of multiplexed sensing applications. While the other spurious resonances are filtered out by the stop-band of 1DPC-NBF, multiple 1DPC-NCSs at different resonances can be connected in parallel without spectrum overlap. Furthermore, in order for all 1DPC-NCSs to be integrated into microarrays and to be interrogated simultaneously with a single input/output port, all channels are then connected in parallel by using a 1 × n taper-type equal power splitter and a n × 1 S-type power combiner in the input port and output port, respectively (n is the channel number). The concept model of PI-1DPC-NCSA is displayed with a 3-parallel-channel 1DPC-NCSs array containing series-connected 1DPC-NBFs. The bulk refractive index sensitivities as high as 112.6nm/RIU, 121.7nm/RIU, and 148.5nm/RIU are obtained (RIU = Refractive Index Unit). In particular, the footprint of the 3-parallel-channel PI-1DPC-NCSA is 4.5μm × 50μm (width × length), decreased by more than three orders of magnitude compared to 2D PC integrated sensor arrays. Thus, this is a promising platform for realizing ultra-compact lab-on-a-chip applications with high integration density and high parallel-multiplexing capabilities. PMID:27464080

  16. Application specific integrated circuit (ASIC) readout technologies for future ion beam analytical instruments

    Energy Technology Data Exchange (ETDEWEB)

    Whitlow, Harry J. E-mail: harry_j.whitlow@nuclear.lu.se

    2000-03-01

    New possibilities for ion beam analysis (IBA) are afforded by recent developments in detector technology which facilitate the parallel collection of data from a large number of channels. Application specific integrated circuit (ASIC) technologies, which have been widely employed for multi-channel readout systems in nuclear and particle physics, are more net-cost effective (160/channel for 1000 channels) and a more rational solution for readout of a large number of channels than afforded by conventional electronics. Based on results from existing and on-going chip designs, the possibilities and issues of ASIC readout technology are considered from the IBA viewpoint. Consideration is given to readout chip architecture and how the stringent resolution, linearity and stability requirements for IBA may be met. In addition the implications of the restrictions imposed by ASIC technology are discussed.

  17. Chip, Chip, Hooray!

    Science.gov (United States)

    Kelly, Susan

    2001-01-01

    Presents a science laboratory using different brands of potato chips in which students test their oiliness, size, thickness, saltiness, quality, and cost, then analyze the results to determine the best chip. Gives a brief history of potato chips. (YDS)

  18. A 400 KHz line rate 2048-pixel stitched SWIR linear array

    Science.gov (United States)

    Anchlia, Ankur; Vinella, Rosa M.; Gielen, Daphne; Wouters, Kristof; Vervenne, Vincent; Hooylaerts, Peter; Deroo, Pieter; Ruythooren, Wouter; De Gaspari, Danny; Das, Jo; Merken, Patrick

    2016-05-01

    Xenics has developed a family of stitched SWIR long linear arrays that operate up to 400 KHz of line rate. These arrays serve medical and industrial applications that require high line rates as well as space applications that require long linear arrays. The arrays are based on a modular ROIC design concept: modules of 512 pixels are stitched during fabrication to achieve 512, 1024 and 2048 pixel arrays. Each 512-pixel module has its own on-chip digital sequencer, analog readout chain and 4 output buffers. This modular concept enables a long array to run at a high line rates irrespective of the array length, which limits the line rate in a traditional linear array. The ROIC is flip-chipped with InGaAs detector arrays. The FPA has a pixel pitch of 12.5μm and has two pixel flavors: square (12.5μm) and rectangular (250μm). The frontend circuit is based on Capacitive Trans-impedance Amplifier (CTIA) to attain stable detector bias, and good linearity and signal integrity, especially at high speeds. The CTIA has an input auto-zero mechanism that allows to have low detector bias (<20mV). An on-chip Correlated Double Sample (CDS) facilitates removal of CTIA KTC and 1/f noise, and other offsets, achieving low noise performance. There are five gain modes in the FPA giving the full well range from 85Ke- to 40Me-. The measured input referred noise is 35e-rms in the highest gain mode. The FPA operates in Integrate While Read mode and, at a master clock rate of 60MHz and a minimum integration time of 1.4μs, achieves the highest line rate of 400 KHz. In this paper, design details and measurements results are presented in order to demonstrate the array performance.

  19. Read-out of the ATLAS diamond beam monitor

    Energy Technology Data Exchange (ETDEWEB)

    Agricola, Johannes; Grosse-Knetter, Joern; Quadt, Arnulf; Weingarten, Jens [II. Physikalisches Institut, Georg-August-Universitaet Goettingen (Germany)

    2015-07-01

    During the last shutdown of the Large Hadron Collider, a new Luminosity measurement device, the Diamond Beam Monitor (DBM), has been installed in the ATLAS experiment. It consists of Telescopes with diamond sensor modules that are equipped with the same front-end chip as the Insertable B-Layer (IBL), the FE-I4. It differs from IBL in that it has a separate trigger-less channel, the hitbus, which separately transmits an OR over a configurable subset of pixel discriminator outputs for each of the modules. This signal is generated by a separate chip, the Hitbus chip, which takes the OR outputs of each front-end and serializes it such that it is sampled once per bunch crossing. The commonalities allow the DBM to share a read-out system with IBL. Due to the hitbus channel, additional modifications have to be applied. How the hitbus data is decoded in the Back Of Crate card (BOC) and forwarded to the read-out system through the Read-Out Driver (ROD) is presented and discussed.

  20. Leakage analysis of crossbar memristor arrays

    KAUST Repository

    Zidan, Mohammed A.

    2014-07-01

    Crossbar memristor arrays provide a promising high density alternative for the current memory and storage technologies. These arrays suffer from parasitic current components that significantly increase the power consumption, and could ruin the readout operation. In this work we study the trade-off between the crossbar array density and the power consumption required for its readout. Our analysis is based on simulating full memristor arrays on a SPICE platform.

  1. NIKEL_AMC: Readout electronics for the NIKA2 experiment

    CERN Document Server

    Bourrion, O; Bouly, J L; Bouvier, J; Bosson, G; Calvo, M; Catalano, A; Goupy, J; Li, C; Macías-Pérez, J F; Monfardini, A; Tourres, D; Ponchant, N; Vescovi, C

    2016-01-01

    The New Iram Kid Arrays-2 (NIKA2) instrument, dedicated to mm-wave astronomy, uses microwave kinetic inductance detectors (KID) as sensors. The three arrays installed in the camera feature a total of 3300 KID. To instrument these detectors, a specifically designed electronics, composed of 20 readout boards and hosted in three microTCA crates, has been developed. The implemented solution and the achieved performances are presented in this paper.

  2. Digital pixel readout integrated circuit architectures for LWIR

    OpenAIRE

    Shafique, Atia; Yazıcı, Melik; Yazici, Melik; Kayahan, Hüseyin; Kayahan, Huseyin; Ceylan, Ömer; Ceylan, Omer; Gürbüz, Yaşar; Gurbuz, Yasar

    2015-01-01

    This paper presents and discusses digital pixel readout integrated circuit architectures for long wavelength infrared (LWIR) in CMOS technology. Presented architectures are designed for scanning and staring arrays type detectors respectively. For scanning arrays, digital time delay integration (TDI) is implemented on 8 pixels with sampling rate up to 3 using CMOS 180nm technology. Input referred noise of ROIC is below 750 rms electron meanwhile power dissipation is appreciably under 30mW. ROI...

  3. Development of an ASIC for CCD readout at the vertex detectors of the intrenational linear collider

    CERN Document Server

    Murray, P; Stefanov, K D; Woolliscroft, T

    2007-01-01

    The Linear Collider Flavour Identification Collaboration is developing sensors and readout electronics suitable for the International Linear Collider vertex detector. In order to achieve high data rates the proposed detector utilises column parallel CCDs, each read out by a custom designed ASIC. The prototype chip (CPR2) has 250 channels of electronics, each with a preamplifier, 5-bit flash ADC, data sparsification logic for identification of significant data clusters, and local memory for storage of data awaiting readout. CPR2 also has hierarchical 2-level data multiplexing and intermediate data memory, enabling readout of the sparsified data via the 5-bit data output bus.

  4. The AMS silicon tracker readout: performance results with minimum ionizing particles

    Energy Technology Data Exchange (ETDEWEB)

    Alpat, B.; Ambrosi, G.; Battiston, R.; Bourquin, M.; Burger, W.J. E-mail: william.burger@cern.ch; Extermann, P.; Chang, Y.H.; Hou, S.R.; Pauluzzi, M.; Produit, N.; Qiu, S.; Rapin, D.; Ribordy, M.; Toker, O.; Wu, S.X

    2000-01-01

    First results for the AMS silicon tracker readout performance are presented. Small 20.0x20.0x0.300 mm{sup 3} silicon microstrip detectors were installed in a 50 GeV electron beam at CERN. The detector readout consisted of prototypes of the tracker data reduction card equipped with a 12-bit ADC and the tracker frontend hybrid with VA{sub h}dr readout chips. The system performance is assessed in terms of signal-to-noise, position resolution, and efficiency.

  5. The Investigation on the TOT Readout Electronics Which is Based on the NINO Chip%基于NINO芯片的TOT读出电子学系统的研究

    Institute of Scientific and Technical Information of China (English)

    秦熙; 刘树彬; 安琪

    2012-01-01

    介绍了CERN设计的一款基于过阈时间法(Time - Over - Threshold)的ASIC芯片-NINO,并列出了一些基于NINO芯片设计的测试板的测试结果,用于评估该芯片在BES Ⅲ端盖TOF升级及在中子管位置灵敏探测器中的位置测量中应用的可能性.NINO芯片8通道高度集成,对实验电路板的设计和测试表明,其噪声抖动低(前沿噪声抖动约5.1 ps),可以满足TOT方法中高精度时间测量的要求.%The test result of the NINO chip which is based on the time over threshold (TOT) technique is described. The test is carried out to evaluate the possibility of applying the chip in the upgrade of BES III TOF and in the position measurement of Neutrino Position Sensitive Proportional Detector. The NINO chip is 8 channel integrated and of low noise ( 5.1 ps front edge jitter) which can serve high precision time measurement satisfactorily.

  6. Readout electronics development for the ATLAS silicon tracker

    Energy Technology Data Exchange (ETDEWEB)

    Borer, K. [Bern Univ. (Switzerland); Beringer, J. [Bern Univ. (Switzerland); Anghinolfi, F. [CERN, CH-1211 Geneva 23 (Switzerland); Aspell, P. [CERN, CH-1211 Geneva 23 (Switzerland); Chilingarov, A. [CERN, CH-1211 Geneva 23 (Switzerland)]|[Budker Institute of Nuclear Physics, Novosibirsk (Russian Federation); Jarron, P. [CERN, CH-1211 Geneva 23 (Switzerland); Heijne, E.H.M. [CERN, CH-1211 Geneva 23 (Switzerland); Santiard, J.C. [CERN, CH-1211 Geneva 23 (Switzerland); Verweij, H. [CERN, CH-1211 Geneva 23 (Switzerland); Goessling, C. [Institut fur Physik, Univ. Dortmund, D-4600 Dortmund (Germany); Lisowski, B. [Institut fur Physik, Univ. Dortmund, D-4600 Dortmund (Germany); Reichold, A. [Institut fur Physik, Univ. Dortmund, D-4600 Dortmund (Germany); Bonino, R. [DPNC, University of Geneva, CH-1211 Geneva 4 (Switzerland); Clark, A.G. [DPNC, University of Geneva, CH-1211 Geneva 4 (Switzerland); Kambara, H. [DPNC, University of Geneva, CH-1211 Geneva 4 (Switzerland); La Marra, D. [DPNC, University of Geneva, CH-1211 Geneva 4 (Switzerland); Leger, A. [DPNC, University of Geneva, CH-1211 Geneva 4 (Switzerland); Wu, X. [DPNC, University of Geneva, CH-1211 Geneva 4 (Switzerland); Richeux, J.P. [DPNC, University of Geneva, CH-1211 Geneva 4 (Switzerland); Taylor, G.N. [School of Physics, University of Melbourne, Parkville, Victoria 3052 (Australia); Fedotov, M. [Budker Institute of Nuclear Physics, Novosibirsk (Russian Federation); Kuper, E. [Budker Institute of Nuclear Physics, Novosibirsk (Russian Federation); Velikzhanin, Yu. [Budker Institute of Nuclear Physics, Novosibirsk (Russian Federation); Campbell, D. [Rutherford Appleton Laboratory, Chilton, Didcot, Oxon OX11 0QX (United Kingdom); Murray, P. [Rutherford Appleton Laboratory, Chilton, Didcot, Oxon OX11 0QX (United Kingdom); Seller, P. [Rutherford Appleton Laboratory, Chilton, Didcot, Oxon OX11 0QX (United Kingdom)

    1995-06-01

    We present the status of the development of the readout electronics for the large area silicon tracker of the ATLAS experiment at the LHC, carried out by the CERN RD2 project. Our basic readout concept is to integrate a fast amplifier, analog memory, sparse data scan circuit and analog-to-digital convertor (ADC) on a single VLSI chip. This architecture will provide full analog information of charged particle hits associated unambiguously to one LHC beam crossing, which is expected to be at a frequency of 40 MHz. The expected low occupancy of the ATLAS inner silicon detectors allows us to use a low speed (5 MHz) on-chip ADC with a multiplexing scheme. The functionality of the fast amplifier and analog memory have been demonstrated with various prototype chips. Most recently we have successfully tested improved versions of the amplifier and the analog memory. A piecewise linear ADC has been fabricated and performed satisfactorily up to 5 MHz. A new chip including amplifier, analog memory, memory controller, ADC, and data buffer has been designed and submitted for fabrication and will be tested on a prototype of the ATLAS silicon tracker module with realistic electrical and mechanical constraints. (orig.).

  7. Comparative Transcriptomic Profiling of Vitis vinifera Under High Light Using a Custom-Made Array and the Affymetrix GeneChip

    Institute of Scientific and Technical Information of China (English)

    Luisa C. Carvalho; Belmiro J. Vilela; Phil M. Mullineaux; Sara Am(a)ncio

    2011-01-01

    Understanding abiotic stress responses is one of the most important issues in plant research nowadays.Abiotic stress,including excess light,can promote the onset of oxidative stress through the accumulation of reactive oxygen species.Oxidative stress also arises when in vitro propagated plants are exposed to high light upon transfer to ex vitro.To determine whether the underlying pathways activated at the transfer of in vitro grapevine to ex vitro conditions reflect the processes occurring upon light stress,we used Vitis vinifera Affymetrix GeneChip (VvGA) and a custom array of genes responsive to light stress (LSCA) detected by real-time reverse transcriptase PCR (qRT-PCR).When gene-expression profiles were compared,‘protein metabolism and modification',‘signaling',and ‘anti-oxidative' genes were more represented in LSCA,while,in VvGA,‘cell wall metabolism' and ‘secondary metabolism' were the categories in which gene expression varied more significantly.The above functional categories confirm previous studies involving other types of abiotic stresses,enhancing the common attributes of abiotic stress defense pathways.The LSCA analysis of our experimental system detected strong response of heat shock genes,particularly the protein rescuing mechanism involving the cooperation of two ATP-dependent chaperone systems,Hsp100 and Hsp70,which showed an unusually late response during the recovery period,of extreme relevance to remove non-functional,potentially harmful polypeptides arising from misfolding,denaturation,or aggregation brought about by stress.The success of LSCA also proves the feasibility of a custommade qRT-PCR approach,particularly for species for which no GeneChip is available and for researchers dealing with a specific and focused problem.

  8. Bifurcation readout of a Josephson phase qubit

    International Nuclear Information System (INIS)

    The standard method to read out a Josephson phase qubit is using a dc-SQUID to measure the state-dependent magnetic flux of the qubit by switching to the non-superconducting state. This process generates heat directly on the qubit chip and quasi-particles in the circuitry. Both effects require a relatively long cool-down time after each switching event. This, together with the time needed to ramp up the bias current of the SQUID limits the repetition rate of the experiment. In our ongoing experiments we replace the standard readout scheme by a SQUID shunted by a capacitor. This nonlinear resonator is operated close to its bifurcation point between two oscillating states which depend on the qubit flux. The measurement is done by detecting either the resonance amplitude or phase shift of the reflected probe signal. We verified that our SQUID resonator works as linear resonator for low excitation powers and observed the periodic dependence of the resonance frequency on the externally applied magnetic flux. For higher excitation powers the device shows a hysteretic behavior between the two oscillating states. Current experiments are focused on a pulsed rf-readout to measure coherent evolution of the qubit states. We hope to achieve longer coherence times, perform faster measurements, and test non-destructive measurement schemes with Josephson phase qubits.

  9. Studies and development of a readout ASIC for pixelated CdTe detectors for space applications

    International Nuclear Information System (INIS)

    designed two ASICs. The first one, Caterpylar, is a test-chip, which enables the characterization of differently dimensioned CSA circuits to choose the most suitable one for the final application. It is optimized for readout of the target CdTe detector with 300 μm pixel pitch and the corresponding input parameters. With this circuit I have also analyzed possible filtering methods, in particular the semi-Gaussian shaping and the Multi-Correlated Double Sampling (MCDS). Their comparison is preceded by the theoretical analysis of these shapers. The second ASIC D2R1 is a complete readout circuit, containing 256 channels to readout CdTe detector with the same number of pixels, arranged in 16 *16 array. Each channel fits into a layout area of 300 μm - 300 μm. It is based on the MCDS processing with self-triggering capabilities. The mean electronic noise measured over all channels is 29 electrons rms when characterized without the detector. The corresponding power consumption is 315 μW/channel. With these results the future measurements with the detector give prospects for reaching an FWHM spectral resolution in the order of 600 eV at 60 keV. (author)

  10. Waveguide piezoelectric micromachined ultrasonic transducer array for short-range pulse-echo imaging

    Science.gov (United States)

    Lu, Y.; Tang, H.; Wang, Q.; Fung, S.; Tsai, J. M.; Daneman, M.; Boser, B. E.; Horsley, D. A.

    2015-05-01

    This paper presents an 8 × 24 element, 100 μm-pitch, 20 MHz ultrasound imager based on a piezoelectric micromachined ultrasonic transducer (PMUT) array having integrated acoustic waveguides. The 70 μm diameter, 220 μm long waveguides function both to direct acoustic waves and to confine acoustic energy, and also to provide mechanical protection for the PMUT array used for surface-imaging applications such as an ultrasonic fingerprint sensor. The imager consists of a PMUT array bonded with a CMOS ASIC using wafer-level conductive eutectic bonding. This construction allows each PMUT in the array to have a dedicated front-end receive amplifier, which together with on-chip analog multiplexing enables individual pixel read-out with high signal-to-noise ratio through minimized parasitic capacitance between the PMUT and the front-end amplifier. Finite element method simulations demonstrate that the waveguides preserve the pressure amplitude of acoustic pulses over distances of 600 μm. Moreover, the waveguide design demonstrated here enables pixel-by-pixel readout of the ultrasound image due to improved directivity of the PMUT by directing acoustic waves and creating a pressure field with greater spatial uniformity at the end of the waveguide. Pulse-echo imaging experiments conducted using a one-dimensional steel grating demonstrate the array's ability to form a two-dimensional image of a target.

  11. Study on 512×128 pixels InGaAs near infrared focal plane arrays

    Science.gov (United States)

    Li, Xue; Tang, Hengjing; Huang, Songlei; Shao, Xiumei; Li, Tao; Huang, Zhangcheng; Gong, Haimei

    2014-10-01

    It is well known that In0.53Ga0.47As epitaxial material is lattice-matched to InP substrate corresponding to the wavelength from 0.9μm to 1.7μm, which results to high quality material and good device characteristics at room temperature. In order to develop the near infrared multi-spectral imaging, 512×128 pixels InGaAs Near Infrared Focal Plane Arrays (FPAs) were studied. The n-InP/i-InGaAs/n-InP double hereto-structure epitaxial material was grown by MBE. The 512×128 back-illuminated planar InGaAs detector arrays were fabricated, including the improvement of passivation film, by grooving the diffusion masking layer, the P type electrode layer, In bump condition and so on. The photo-sensitive region has the diffusion area of 23×23μm2 and pixel pitch of 30×30μm2 . The 512×128 detector arrays were individually hybridized on readout integrated circuit(ROIC) by Indium bump based on flip-chip process to make focal plane arrays (FPAs). The ROIC is based on a capacitive trans-impedance amplifier with correlated double sampling and integrated while readout (IWR) mode with high readout velocity of every pixel resulting in low readout noise and high frame frequency. The average peak detectivity and the response non-uniformity of the FPAs are 1.63×1012 cmHz1/2/W and 5.9%, respectively. The power dissipation and frame frequency of the FPAs are about 180mW and 400Hz, respectively.

  12. Dedicated very front-end electronics for an ILC prototype hadronic calorimeter with SiPM read-out

    CERN Document Server

    de La Taille, C

    2008-01-01

    The SPIROC chip is a dedicated very front-end electronics for an ILC prototype hadronic calorimeter with Silicon photomultiplier (or MPPC) readout. This ASIC is due to equip a 10,000-channel demonstrator in 2009. SPIROC is an evolution of FLC_SiPM used for the ILC AHCAL physics prototype [1]. SPIROC was submitted in June 2007 and will be tested in September 2007. It embeds cutting edge features that fulfil ILC final detector requirements. It has been realized in 0.35m SiGe technology. It has been developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels needed. SPIROC is an auto-triggered, bi-gain, 36-channel ASIC which allows to measure on each channel the charge from one photoelectron to 2000 and the time with a 100ps accurate TDC. An analogue memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. A 12-bit Wilkinson ADC has been embedded to digitize the analogue memor...

  13. Development of solar-blind AIGaN 128×128 Ultraviolet Focal Plane Arrays

    Institute of Scientific and Technical Information of China (English)

    YUAN YongGang; ZHANG Yan; CHU KaiHui; LI XiangYang; ZHAO DeGang; YANG Hui

    2008-01-01

    This paper reports the development of solar-blind aluminum gallium nitride (AlGaN) 128×128 UV Focal Plane Arrays (FPAs). The back-illuminated hybrid FPA archi-tecture consists of an 128×128 back-illuminated AIGaN PIN detector array that is bump-mounted to a matching 128×128 silicon CMOS readout integrated circuit (ROIC) chip. The 128×128 p-i-n photodiode arrays with cuton and cutoff wave-lengths of 233 and 258 nm, with a sharp reduction in response to UVB (280-320 nm) light. Several examples of solar-blind images are provided. This solar-blind band FPA has much better application prospect.

  14. Development of solar-blind AlGaN 128x128 Ultraviolet Focal Plane Arrays

    Institute of Scientific and Technical Information of China (English)

    2008-01-01

    This paper reports the development of solar-blind aluminum gallium nitride (AlGaN) 128×128 UV Focal Plane Arrays (FPAs). The back-illuminated hybrid FPA archi- tecture consists of an 128x128 back-illuminated AlGaN PIN detector array that is bump-mounted to a matching 128x128 silicon CMOS readout integrated circuit (ROIC) chip. The 128×128 p-i-n photodiode arrays with cuton and cutoff wave-lengths of 233 and 258 nm, with a sharp reduction in response to UVB (280―320 nm) light. Several examples of solar-blind images are provided. This solar-blind band FPA has much better application prospect.

  15. Increased space-bandwidth product in pixel super-resolved lensfree on-chip microscopy

    Science.gov (United States)

    Greenbaum, Alon; Luo, Wei; Khademhosseinieh, Bahar; Su, Ting-Wei; Coskun, Ahmet F.; Ozcan, Aydogan

    2013-04-01

    Pixel-size limitation of lensfree on-chip microscopy can be circumvented by utilizing pixel-super-resolution techniques to synthesize a smaller effective pixel, improving the resolution. Here we report that by using the two-dimensional pixel-function of an image sensor-array as an input to lensfree image reconstruction, pixel-super-resolution can improve the numerical aperture of the reconstructed image by ~3 fold compared to a raw lensfree image. This improvement was confirmed using two different sensor-arrays that significantly vary in their pixel-sizes, circuit architectures and digital/optical readout mechanisms, empirically pointing to roughly the same space-bandwidth improvement factor regardless of the sensor-array employed in our set-up. Furthermore, such a pixel-count increase also renders our on-chip microscope into a Giga-pixel imager, where an effective pixel count of ~1.6-2.5 billion can be obtained with different sensors. Finally, using an ultra-violet light-emitting-diode, this platform resolves 225 nm grating lines and can be useful for wide-field on-chip imaging of nano-scale objects, e.g., multi-walled-carbon-nanotubes.

  16. Design of a 10-bit segmented current-steering digital-to-analog converter in CMOS 65 nm technology for the bias of new generation readout chips in high radiation environment

    International Nuclear Information System (INIS)

    A new pixel front end chip for HL-LHC experiments in CMOS 65nm technology is under development by the CERN RD53 collaboration together with the Chipix65 INFN project. This work describes the design of a 10-bit segmented current-steering Digital-to-Analog Converter (DAC) to provide a programmable bias current to the analog blocks of the circuit. The main requirements are monotonicity, good linearity, limited area consumption and radiation hardness up to 10 MGy. The DAC was prototyped and electrically tested, while irradiation tests will be performed in Autumn 2015

  17. Low Noise Readout Circuit for Biosensor SoC

    Institute of Scientific and Technical Information of China (English)

    PAN Yin-song; KONG Mou-fu; LI Xiang-quan; WANG Li

    2008-01-01

    Presented is a low noise interface circuit that is tuned to the needs of self-assembly monolayers biosensor SoC. The correlated double sampling(CDS) unit of the readout circuit can reduce 1/f noise, KTC noise and fixed noise of micro arrays effectively. The circuit is simulated in a 0.6 μm/level 7 standard CMOS process, and the simulated results show the output voltage has a good linearity with the transducing current of the micro arrays. This is a novel circuit including four amplifiers sharing a common half-circuit and the noise reducing CDS unit. It could be widely used for micro array biosensors.

  18. Timing and Readout Contorl in the LHCb Upgraded Readout System

    CERN Document Server

    Alessio, Federico

    2016-01-01

    In 2019, the LHCb experiment at CERN will undergo a major upgrade where its detectors electronics and entire readout system will be changed to read-out events at the full LHC rate of 40 MHz. In this paper, the new timing, trigger and readout control system for such upgrade is reviewed. Particular attention is given to the distribution of the clock, timing and synchronization information across the entire readout system using generic FTTH technology like Passive Optical Networks. Moreover the system will be responsible to generically control the Front-End electronics by transmitting configuration data and receiving monitoring data, offloading the software control system from the heavy task of manipulating complex protocols of thousands of Front-End electronics devices. The way in which this was implemented is here reviewed with a description of results from first implementations of the system, including usages in test-benches, implementation of techniques for timing distribution and latency control."

  19. Modeling and deformation analyzing of InSb focal plane arrays detector under thermal shock

    Science.gov (United States)

    Zhang, Xiaoling; Meng, Qingduan; Zhang, Liwen; Lv, Yanqiu

    2014-03-01

    A higher fracture probability appearing in indium antimonide (InSb) infrared focal plane arrays (IRFPAs) subjected to the thermal shock test, restricts its final yield. In light of the proposed equivalent method, where a 32 × 32 array is employed to replace the real 128 × 128 array, a three-dimensional modeling of InSb IRFPAs is developed to explore its deformation rules. To research the damage degree to the mechanical properties of InSb chip from the back surface thinning process, the elastic modulus of InSb chip along the normal direction is lessened. Simulation results show when the out-of-plane elastic modulus of InSb chip is set with 30% of its Young's modulus, the simulated Z-components of strain distribution agrees well with the top surface deformation features in 128 × 128 InSb IRFPAs fracture photographs, especially with the crack origination sites, the crack distribution and the global square checkerboard buckling pattern. Thus the Z-components of strain are selected to explore the deformation rules in the layered structure of InSb IRFPAs. Analyzing results show the top surface deformation of InSb IRFPAs originates from the thermal mismatch between the silicon readout integrated circuits (ROIC) and the intermediate layer above, made up of the alternating indium bump array and the reticular underfill. After passing through both the intermediate layer and the InSb chip, the deformation amplitude is reduced firstly from 2.23 μm to 0.24 μm, finally to 0.09 μm. Finally, von Mises stress criterion is employed to explain the causes that cracks always appear in the InSb chip.

  20. Readout electronics for multianode photomultiplier tubes with pad matrix anode layout

    International Nuclear Information System (INIS)

    We have developed economical readout concept for multianode photomultiplier tubes which have a matrix type pad anode layout. This style of anode layout is used in many position sensitive photomultiplier tubes such as R5900-M64 and recently available flat panel H8500 PMT from Hamamatsu Photonics, as well as the Burle PLANACO/spl trade/ 85011 PSPMT. All these PMTs have a matrix of 8/spl times/8 anode pads requiring signal readout from 64 outputs. The number of readout channels quickly increases in systems utilizing many of these PMTs. In order to reduce the number of active channels to be read we have employed a two-dimensional decoupling resistive matrix circuit. A decoupling resistive matrix was designed to convert the 2-D area readout into a projective two single coordinate readout, and, thereby, to simplify readout electronics. In the case of PMT array, the circuit permits ganging together signals from several of the photomultipliers in the same way as done in the cross-wire photomultiplier tube anode layout. We tested this readout concept in several compact gamma cameras designed and built at Jefferson Lab. The largest size array consists of 3/spl times/4 (12 total) of H8500 photomultiplier tubes with 768 individual anode pad outputs, which were decoupled into 32x+24y (56 total) readout channels, a reduction by factor - 14

  1. Novel Calibration Method for Switched Capacitor Arrays Enables Time Measurements with Sub- Picosecond Resolution

    CERN Document Server

    Stricker-Shaver, D A; Pichler, B J

    2014-01-01

    Switched capacitor arrays ASICs are becoming more and more popular for the readout of detector signals, since the sampling frequency of typically several gigasamples per second allows excellent pile-up rejection and time measurements. They suffer however from the fact that their sampling bins are not equidistant in time, given by limitations of the chip process. In the past, this limited time measurements of optimal signals to about 5-25 ps in accuracy, depending on the specific chip, even after careful time calibrations. This paper introduces a novel time calibration, which allows pushing this limit below 1 ps, and also determines the true sampling speed. Various test measurements with different boards based on the DRS4 ASIC indicate that the new calibration is valid over a wide temperature range and stable over time.

  2. Pixel readout electronics development for the ALICE pixel vertex and LHCb RICH detector

    NARCIS (Netherlands)

    Snoeys, W.; Campbell, M.; Cantatore, E.; Cencelli, V.; Dinapoli, R.; Heijne, E.; Jarron, P.; Lamanna, P.; Minervini, D.; O'Shea, V.; Quiquempoix, V.; San Segundo Bello, D.; Koningsveld, van B.; Wyllie, K.

    2001-01-01

    The ALICE1LHCB pixel readout chip emerged from previous experience at CERN. The RD-19 collaboration provided the basis for the installation of a pixel system in the WA97 and NA57 experiments. Operation in these experiments was key in the understanding of the system issues. In parallel the RD-49 coll

  3. Measurement of the Resonant Frequency of Nano-Scale Cantilevers by Hard Contact Readout

    DEFF Research Database (Denmark)

    Dohn, Søren; Hansen, Ole; Bolsen, A.

    2008-01-01

    to unavoidable stray capacitances in the system and provides very high resolution using simple low bandwidth off-chip electronics. Moreover, the detection method does not suffer from the common problem in electronic detection methods, where the strong actuation signals often contaminate the detected...... signal. The readout method is thereby ideally suited for portable sensor systems....

  4. Status on the development of front-end and readout electronics for large silicon trackers

    Indian Academy of Sciences (India)

    J David; M Dhellot; J-F Genat; F Kapusta; H Lebbolo; T-H Pham; F Rossel; A Savoy-Navarro; E Deumens; P Mallisse; D Fougeron; R Hermel; Y Karyotakis; S Vilalte

    2007-12-01

    Final results on a CMOS 0.18 m front-end chip for silicon strips readout are summarized and preliminary results on time measurement are discussed. The status of the next version in 0.13 m is briefly presented.

  5. Dissecting an alternative splicing analysis workflow for GeneChip® Exon 1.0 ST Affymetrix arrays

    Directory of Open Access Journals (Sweden)

    Calogero Raffaele A

    2008-11-01

    Full Text Available Abstract Background A new microarray platform (GeneChip® Exon 1.0 ST has recently been developed by Affymetrix http://www.affymetrix.com. This microarray platform changes the conventional view of transcript analysis since it allows the evaluation of the expression level of a transcript by querying each exon component. The Exon 1.0 ST platform does however raise some issues regarding the approaches to be used in identifying genome-wide alternative splicing events (ASEs. In this study an exon-level data analysis workflow is dissected in order to detect limit and strength of each step, thus modifying the overall workflow and thereby optimizing the detection of ASEs. Results This study was carried out using a semi-synthetic exon-skipping benchmark experiment embedding a total of 268 exon skipping events. Our results point out that summarization methods (RMA, PLIER do not affect the efficacy of statistical tools in detecting ASEs. However, data pre-filtering is mandatory if the detected number of false ASEs are to be reduced. MiDAS and Rank Product methods efficiently detect true ASEs but they suffer from the lack of multiple test error correction. The intersection of MiDAS and Rank Product results efficiently moderates the detection of false ASEs. Conclusion To optimize the detection of ASEs we propose the following workflow: i data pre-filtering, ii statistical selection of ASEs using both MiDAS and Rank Product, iii intersection of results derived from the two statistical analyses in order to moderate family-wise errors (FWER.

  6. NectarCAM : a camera for the medium size telescopes of the Cherenkov Telescope Array

    CERN Document Server

    Glicenstein, J-F; Barrio, J-A; Blanch~Bigas, O; Bolmont, J; Bouyjou, F; Brun, P; Chabanne, E; Champion, C; Colonges, S; Corona, P; Delagnes, E; Delgado, C; Ginzov, C Diaz; Durand, D; Ernenwein, J-P; Fegan, S; Ferreira, O; Fesquet, M; Fiasson, A; Fontaine, G; Fouque, N; Gascon, D; Giebels, B; Henault, F; Hermel, R; Hoffmann, D; Horan, D; Houles, J; Jean, P; Jocou, L; Karkar, S; Knoedlseder, J; Kossakowski, R; Lamanna, G; LeFlour, T; Lenain, J-P; Leveque, A; Louis, F; Martinez, G; Moudden, Y; Moulin, E; Nayman, P; Nunio, F; Olive, J-F; Panazol, J-L; Pavy, S; Petrucci, P-O; Pierre, E; Prast, J; Punch, M; Ramon, P; Rateau, S; Ravel, T; Rosier-Lees, S; Sanuy, A; Shayduk, M; Sizun, P-Y; Sulanke, K-H; Tavernet, J-P; Tejedor~Alvarez, L-A; Toussenel, F; Vasileiadis, G; Voisin, V; Waegebert, V; Wischnewski, R

    2015-01-01

    NectarCAM is a camera proposed for the medium-sized telescopes of the Cherenkov Telescope Array (CTA) covering the central energy range of ~100 GeV to ~30 TeV. It has a modular design and is based on the NECTAr chip, at the heart of which is a GHz sampling Switched Capacitor Array and a 12-bit Analog to Digital converter. The camera will be equipped with 265 7-photomultiplier modules, covering a field of view of 8 degrees. Each module includes the photomultiplier bases, high voltage supply, pre-amplifier, trigger, readout and Ethernet transceiver. The recorded events last between a few nanoseconds and tens of nanoseconds. The camera trigger will be flexible so as to minimize the read-out dead-time of the NECTAr chips. NectarCAM is designed to sustain a data rate of more than 4 kHz with less than 5\\% dead time. The camera concept, the design and tests of the various subcomponents and results of thermal and electrical prototypes are presented. The design includes the mechanical structure, cooling of the electro...

  7. Design trade-offs in ADC architectures dedicated to uncooled focal plane arrays

    Science.gov (United States)

    Robert, P.; Dupont, B.; Pochic, D.

    2008-04-01

    This paper presents two different architectures for the design of Analog to Digital Converters specifically adapted to infrared bolometric image sensors. Indeed, the increasing demand for integrated functions in uncooled readout circuits leads to on-chip ADC design as an interface between the internal analog core and the digital processing electronics. However specifying an on-chip ADC dedicated to focal plane array raises many questions about its architecture and its performance requirements. We will show that two architecture approaches are needed to cover the different sensor features in terms of array size and frame speed. A monolithic 14 bits ADC with a pipeline architecture, and a column 13 bits ADC with an original dual-ramp architecture, will be described. Finally, we will show measurement results to confirm the monolithic ADC is suitable for small array, as 160 x 120 with low frame speed, while a column ADC is more compliant for higher array, as 640 x 480 with a 60 Hz frame speed or 1024 x 768 arrays.

  8. Direct-Print Organic Photonics for Biodetection Chips

    Science.gov (United States)

    Sonnleitner, Max

    2008-03-01

    The development of commercial portable Biochip applications based on optical detection is hindered by the lack of imaging systems that can be directly integrated into the chip itself. Currently, fluorescence/luminescence signals are read out with power-hungry, bulky and expensive off-chip imaging systems, like CCD cameras or photomultiplier tubes. Here we present an enabling technology that for the first time allows cheap and easy integration of imaging systems directly into disposable Biochip systems. Our technology is based on organic semiconductor materials that can be processed in liquid form by inkjet and screen printing, in a process much faster and cheaper than the complicated fabrication of silicon-based imaging sensors. Organic photosensors can be printed on various substrate materials like plastic foil or glass or directly onto Biochip systems. The ultrathin photodiodes with an overall thickness of only 300 to 500 nm show quantum efficiencies better than 0.5 and linear light-response over 6 orders of magnitude. The pixel size can range from 50 to over 1000 μm and inkjet fabrication allows tailoring the sensor layout to the needs of the specific application. Single photodiodes, photodiode line-arrays or 2D arrays of photodiodes can be printed onto diverse materials. Besides the dramatically reduced production costs for printed photodiodes, the presented readout architecture allows detection of e.g. chemiluminescence signals with highest sensitivities and minimum crosstalk due to the close proximity of sample and printed photodiode.

  9. Josephson traveling-wave parametric amplifier for superconducting qubit readout

    Science.gov (United States)

    Macklin, Chris; Slichter, D. H.; Yaakobi, O.; Friedland, L.; Bolkhovsky, V.; Braje, D. A.; Fitch, G.; Oliver, W. D.; Siddiqi, I.

    2014-03-01

    Superconducting parametric amplifiers (paramps) have successfully demonstrated near quantum limited sensitivity, enabling single-shot qubit readout, feedback, and state tracking. However, these amplifiers are commonly limited to narrow bandwidth and modest dynamic range, and most require microwave circulators to separate input and output modes. These limitations stem from the use of a resonant non-linearity to achieve mixing between a signal and pump mode. Our traveling-wave parametric amplifier (TWPA) is based on a superconducting nonlinear Josephson junction transmission line, thereby inherently sidestepping the limitations associated with a cavity structure. We present theoretical predictions and experimental results, including improved gain and noise performance. We discuss transmon qubit readout in the circuit QED architecture using a TWPA. We also comment on promising architectures for chip-level integration and multiplexing. Work supported by IARPA.

  10. About Background Correction for LiF:Mg,Ti readout

    International Nuclear Information System (INIS)

    Nowadays, the regulations require an accurate and reliable measurement of exposures according to the principle of ALARA (As Low As Reasonably Achievable), which emphasizes the need to handle correctly the background issue. Background signals can be radiation and non-radiation related and are produced during the readout process in the TL reader systems. The source of the non-radiation related signals can be the reader itself or effects in the TL crystal due to heating. The main contributions from the reader are dark current and electronic spikes, which are monitored continuously during the readout of a batch of TLD cards. Their contribution is constant during normal operation and can be easily subtracted. Non-radiation related contributions from the TLD chips may be caused by dirt which may be present on the TLD cards or light emitted by the Teflon layer which covers the chips . These spurious signals can be detected by checking the shape of the glow curves. However, there is also a radiation related contribution originated by the exposure history of the specific chips. A TLD card contains TLD chips (most commonly LiF:Mg,Ti) held between two layers of Teflon, which are read out in routine work by using high heating rates. A readout temperature limitation of 300„aC is also set, as the Teflon may be damaged at higher temperatures. Besides, due to the high amount of cards used in a routine dosimetry laboratory, usually no annealing procedure is applied. As a result, the electronic traps of the TLD crystals are not completely emptied during routine readouts and previous exposures leave a residual record, which increases the background and makes it history dependent. This contribution is mostly unknown and cannot be predicted. Different attitudes were published in the literature to handle the TLD background issue. Clark et al. tried to fit a Boltzmann function to describe the background signal under the glow peak. Delgado and Gomez Ros (3) determined several regions in

  11. An analog CMOS chip set for neural networks with arbitrary topologies

    OpenAIRE

    Lansner, John; Lehmann, Torsten

    1993-01-01

    An analog CMOS chip set for implementations of artificial neural networks (ANNs) has been fabricated and tested. The chip set consists of two cascadable chips: a neuron chip and a synapse chip. Neurons on the neuron chips can be interconnected at random via synapses on the synapse chips thus implementing an ANN with arbitrary topology. The neuron test chip contains an array of 4 neurons with well defined hyperbolic tangent activation functions which is implemented by using parasitic lateral b...

  12. Identification of copy number variations in three Chinese horse breeds using 70K single nucleotide polymorphism BeadChip array.

    Science.gov (United States)

    Kader, Adiljan; Liu, Xuexue; Dong, Kunzhe; Song, Shen; Pan, Jianfei; Yang, Min; Chen, Xiaofei; He, Xiaohong; Jiang, Lin; Ma, Yuehui

    2016-10-01

    Copy number variation (CNV), an essential form of genetic variation, has been increasingly recognized as one promising genetic marker in the analysis of animal genomes. Here, we used the Equine 70K single nucleotide polymorphism genotyping array for the genome-wide detection of CNVs in 96 horses from three diverse Chinese breeds: Debao pony (DB), Mongolian horse (MG) and Yili horse (YL). A total of 287 CNVs were determined and merged into 122 CNV regions (CNVRs) ranging from 199 bp to 2344 kb in size and distributed in a heterogeneous manner on chromosomes. These CNVRs were integrated with seven existing reports to generate a composite genome-wide dataset of 1558 equine CNVRs, revealing 69 (56.6%) novel CNVRs. The majority (69.7%) of the 122 CNVRs overlapped with 438 genes, whereas 30.3% were located in intergenic regions. Most of these genes were associated with common CNVRs, which were shared by divergent horse breeds. As many as 60, 42 and 91 genes overlapping with the breed-specific ss were identified in DB, MG and YL respectively. Among these genes, FGF11, SPEM1, PPARG, CIDEB, HIVEP1 and GALR may have potential relevance to breed-specific traits. These findings provide valuable information for understanding the equine genome and facilitating association studies of economically important traits with equine CNVRs in the future. PMID:27440410

  13. RD Collaboration Proposal: Development of pixel readout integrated circuits for extreme rate and radiation

    CERN Document Server

    Chistiansen, J (CERN)

    2013-01-01

    This proposal describes a new RD collaboration to develop the next genrration of hybrid pixel readout chips for use in ATLAS and CMS PHase 2 upgrades. extrapolation of hybrid pixel technology to the HL-LHC presents major challenges on several fronts. Challenges include: smaller pixels to resolve tracks in boosted jets, much higher hit rates (1-2 GHz/cm2 ), unprecedented radiation tolerance (10 MGy), much higher output bandwidth, and large IC format with low power consumption in order to instrument large areas while keeping the material budget low. This collaboration is specifically focused on design of hybrid pixel readout chips, and not on more general chip design or on other aspects of hybrid pixel technology. Participants include 7 institutes on ATLAS and 7 on CMS, plus 2 on both experiments.

  14. Characterisation of low power readout electronics for a UV microchannel plate detector with cross-strip readout

    Science.gov (United States)

    Pfeifer, M.; Barnstedt, J.; Diebold, S.; Hermanutz, S.; Kalkuhl, C.; Kappelmann, N.; Schanz, T.; Schütze, B.; Werner, K.

    2014-07-01

    Astronomical observations in the ultraviolet (UV) wavelength range between 91 and 300nm are fundamental for the progress in astrophysics. Scientific success of future UV observatories raises the need for technology development in the areas of detectors, optical components, and their coatings. We develop solar blind and photon counting microchannel plate (MCP) UV detectors as a contribution to the progress in UV observation technology. New combinations of materials for the photocathode (see paper No. 9144-111, this volume, for details) as well as a cross-strip (XS) anode, having 64 strips on each layer, are used. Pre-amplification of the charge deposited onto the anode is performed by the Beetle chip designed at the Max-Planck-Institute for Nuclear Physics in Heidelberg for LHCb at CERN. It features 128 pre-amplifiers on one die and provides the analogue output in a four-fold serial stream. This stream is digitised by only four ADCs and is processed in an FPGA. This concept results in a reduced power consumption well below 10W as well as a reduced volume, weight and complexity of the readout electronics compared to existing cross-strip readouts. We developed an electronics prototype assembly and a setup in a vacuum chamber that is similar to the configuration in the final detector. The setup in the chamber is used for the burn-in of the MCPs as well as for tests of the readout electronics prototype assembly incorporating realistic signals. In this paper, information on the XS anodes as well as on the hybrid PCB carrying the Beetle pre-amplifier chip is shown. Details on the readout electronics design as well as details of the setup in the vacuum chamber are presented. An outlook to the next steps in the development process is given.

  15. Development of a small-scale protope of the GOSSIPO-2 chip in 0.13 um CMOS technology

    CERN Document Server

    Kluit, R; Gromov, V

    2007-01-01

    The GOSSIP (Gas On Slimmed Silicon Pixel) detector is a proposed alternative for silicon based pixel detectors. The Gossip Prototype (GOSSIPO) chip is being developed to serve as a prototype read-out chip for such a gas-filled detector. Thanks to the very low capacitance at the preamplifier input, the front-end of the chip demonstrates low-noise performance in combination with a fast peaking time and low analog power dissipation. Measurement of the drift time of every primary electron in the gas volume enables 3D reconstruction of the particle tracks. For this purpose a Time-to- Digital converter must be placed in each pixel. A small-scale prototype of the GOSSIP chip has been developed in the 0.13 μm CMOS technology. The prototype includes a 16 by 16 pixel array where each pixel is equipped with a front-end circuit, threshold DAC, and a 4-bit TDC. The chip is available for testing in May 2007 and after initial tests it will be postprocessed to build a prototype detector. This paper describes the detector de...

  16. Readout, first- and second-level triggers of the new Belle silicon vertex detector

    Science.gov (United States)

    Friedl, M.; Abe, R.; Abe, T.; Aihara, H.; Asano, Y.; Aso, T.; Bakich, A.; Browder, T.; Chang, M. C.; Chao, Y.; Chen, K. F.; Chidzik, S.; Dalseno, J.; Dowd, R.; Dragic, J.; Everton, C. W.; Fernholz, R.; Fujii, H.; Gao, Z. W.; Gordon, A.; Guo, Y. N.; Haba, J.; Hara, K.; Hara, T.; Harada, Y.; Haruyama, T.; Hasuko, K.; Hayashi, K.; Hazumi, M.; Heenan, E. M.; Higuchi, T.; Hirai, H.; Hitomi, N.; Igarashi, A.; Igarashi, Y.; Ikeda, H.; Ishino, H.; Itoh, K.; Iwaida, S.; Kaneko, J.; Kapusta, P.; Karawatzki, R.; Kasami, K.; Kawai, H.; Kawasaki, T.; Kibayashi, A.; Koike, S.; Korpar, S.; Križan, P.; Kurashiro, H.; Kusaka, A.; Lesiak, T.; Limosani, A.; Lin, W. C.; Marlow, D.; Matsumoto, H.; Mikami, Y.; Miyake, H.; Moloney, G. R.; Mori, T.; Nakadaira, T.; Nakano, Y.; Natkaniec, Z.; Nozaki, S.; Ohkubo, R.; Ohno, F.; Okuno, S.; Onuki, Y.; Ostrowicz, W.; Ozaki, H.; Peak, L.; Pernicka, M.; Rosen, M.; Rozanska, M.; Sato, N.; Schmid, S.; Shibata, T.; Stamen, R.; Stanič, S.; Steininger, H.; Sumisawa, K.; Suzuki, J.; Tajima, H.; Tajima, O.; Takahashi, K.; Takasaki, F.; Tamura, N.; Tanaka, M.; Taylor, G. N.; Terazaki, H.; Tomura, T.; Trabelsi, K.; Trischuk, W.; Tsuboyama, T.; Uchida, K.; Ueno, K.; Ueno, K.; Uozaki, N.; Ushiroda, Y.; Vahsen, S.; Varner, G.; Varvell, K.; Velikzhanin, Y. S.; Wang, C. C.; Wang, M. Z.; Watanabe, M.; Watanabe, Y.; Yamada, Y.; Yamamoto, H.; Yamashita, Y.; Yamashita, Y.; Yamauchi, M.; Yanai, H.; Yang, R.; Yasu, Y.; Yokoyama, M.; Ziegler, T.; Žontar, D.

    2004-12-01

    A major upgrade of the Silicon Vertex Detector (SVD 2.0) of the Belle experiment at the KEKB factory was installed along with new front-end and back-end electronics systems during the summer shutdown period in 2003 to cope with higher particle rates, improve the track resolution and meet the increasing requirements of radiation tolerance. The SVD 2.0 detector modules are read out by VA1TA chips which provide "fast or" (hit) signals that are combined by the back-end FADCTF modules to coarse, but immediate level 0 track trigger signals at rates of several tens of a kHz. Moreover, the digitized detector signals are compared to threshold lookup tables in the FADCTFs to pass on hit information on a single strip basis to the subsequent level 1.5 trigger system, which reduces the rate below the kHz range. Both FADCTF and level 1.5 electronics make use of parallel real-time processing in Field Programmable Gate Arrays (FPGAs), while further data acquisition and event building is done by PC farms running Linux. The new readout system hardware is described and the first results obtained with cosmics are shown.

  17. Planar Lithographed Superconducting LC Resonators for Frequency-Domain Multiplexed Readout Systems

    Science.gov (United States)

    Rotermund, K.; Barch, B.; Chapman, S.; Hattori, K.; Lee, A.; Palaio, N.; Shirley, I.; Suzuki, A.; Tran, C.

    2016-07-01

    Cosmic microwave background (CMB) polarization experiments are increasing the number of transition edge sensor (TES) bolometers to increase sensitivity. In order to maintain low thermal loading of the sub-Kelvin stage, the frequency-domain multiplexing (FDM) factor has to increase accordingly. FDM is achieved by placing TES bolometers in series with inductor-capacitor (LC) resonators, which select the readout frequency. The multiplexing factor can be raised with a large total readout bandwidth and small frequency spacing between channels. The inductance is kept constant to maintain a uniform readout bandwidth across detectors, while the maximum acceptable value is determined by bolometer stability. Current technology relies on commercially available ceramic chip capacitors. These have high scatter in their capacitance thereby requiring large frequency spacing. Furthermore, they have high equivalent series resistance (ESR) at higher frequencies and are time consuming and tedious to hand assemble via soldering. A solution lies in lithographed, planar spiral inductors (currently in use by some experiments) combined with interdigitated capacitors on a silicon (Si) substrate. To maintain reasonable device dimensions, we have reduced trace and gap widths of the LCs to 4 \\upmu m. We increased the inductance from 16 to 60 \\upmu H to achieve a higher packing density, a requirement for FDM systems with large multiplexing factors. Additionally, the Si substrate yields low ESR values across the entire frequency range and lithography makes mass production of LC pairs possible. We reduced mutual inductance between inductors by placing them in a checkerboard pattern with the capacitors, thereby increasing physical distances between adjacent inductors. We also reduce magnetic coupling of inductors with external sources by evaporating a superconducting ground plane onto the backside of the substrate. We report on the development of lithographed LCs in the 1-5 MHz range for use

  18. XPAD3: A new photon counting chip for X-ray CT-scanner

    International Nuclear Information System (INIS)

    The X-ray pixel chip with adaptable dynamics (XPAD3) circuit is the next generation of 2D X-ray photon counting imaging chip to be connected to a pixel sensor using the bump and flip-chip technologies. This circuit, designed in IBM 0.25 μm technology, contains 9600 pixels (130 μmx130 μm) distributed into 80 columns of 120 elements each. Its features have been improved to provide high-counting rate over 109 ph/pixel/mm2, high-dynamic range over 60 keV, very low-noise detection level of 100e- rms, energy window selection and fast image readout less than 2 ms/frame. An innovative architecture has been designed in order to prevent the digital circuits from bothering the very sensitive analogue parts placed in their neighbourhood. This allows to read the chip during acquisition while conserving the precise setting of the thresholds over the pixel array. Finally, the aim of this development is to combine several XPAD3 to form the PIXSCAN detector

  19. Development of the Photomultiplier-Tube Readout System for the CTA Large Size Telescope

    OpenAIRE

    Kubo, H; Paoletti, R.; Awane, Y; Bamba, A.; Barcelo, M.; Barrio, J.A.; Blanch, O.; Boix, J; Delgado, C; Fink, D.; Gascon, D.; Gunji, S; Hagiwara, R.; Hanabata, Y.; K. Hatanaka

    2013-01-01

    We have developed a prototype of the photomultiplier tube (PMT) readout system for the Cherenkov Telescope Array (CTA) Large Size Telescope (LST). Two thousand PMTs along with their readout systems are arranged on the focal plane of each telescope, with one readout system per 7-PMT cluster. The Cherenkov light pulses generated by the air showers are detected by the PMTs and amplified in a compact, low noise and wide dynamic range gain block. The output of this block is then digitized at a sam...

  20. Analysis techniques and performance of the Domino Ring Sampler version 4 based readout for the MAGIC telescopes

    CERN Document Server

    Sitarek, Julian; Mazin, Daniel; Paoletti, Riccardo; Tescaro, Diego

    2013-01-01

    Recently the readout of the MAGIC telescopes has been upgraded to a new system based on the Domino Ring Sampler version 4 chip. We present the analysis techniques and the signal extraction performance studies of this system. We study the behaviour of the baseline, the noise, the cross-talk, the linearity and the time resolution. We investigate also the optimal signal extraction. In addition we show some of the analysis techniques specific to the readout based on the Domino Ring Sampler version 2 chip, previously used in the MAGIC II telescope.

  1. Optimal and Robust Design Method for Two-Chip Out-of-Plane Microaccelerometers

    Directory of Open Access Journals (Sweden)

    Hyoungho Ko

    2010-11-01

    Full Text Available In this paper, an optimal and robust design method to implement a two-chip out-of-plane microaccelerometer system is presented. The two-chip microsystem consists of a MEMS chip for sensing the external acceleration and a CMOS chip for signal processing. An optimized design method to determine the device thickness, the sacrificial gap, and the vertical gap length of the M EMS sensing element is applied to minimize the fundamental noise level and also to achieve the robustness to the fabrication variations. In order to cancel out the offset and gain variations due to parasitic capacitances and process variations, a digitally trimmable architecture consisting of an 11 bit capacitor array is adopted in the analog front-end of the CMOS capacitive readout circuit. The out-of-plane microaccelerometer has the scale factor of 372 mV/g~389 mV/g, the output nonlinearity of 0.43% FSO~0.60% FSO, the input range of ±2 g and a bias instability of 122 μg~229 μg. The signal-to-noise ratio and the noise equivalent resolution are measured to be74.00 dB~75.23 dB and 180 μg/rtHz~190 μg/rtHz, respectively. The in-plane cross-axis sensitivities are measured to be 1.1%~1.9% and 0.3%~0.7% of the out-of-plane sensitivity, respectively. The results show that the optimal and robust design method for the MEMS sensing element and the highly trimmable capacity of the CMOS capacitive readout circuit are suitable to enhance the die-to-die uniformity of the packaged microsystem, without compromising the performance characteristics.

  2. NectarCAM, a camera for the medium sized telescopes of the Cherenkov Telescope Array

    CERN Document Server

    Glicenstein, J-F

    2016-01-01

    NectarCAM is a camera proposed for the medium-sized telescopes of the Cherenkov Telescope Array (CTA) which covers the core energy range of ~100 GeV to ~30 TeV. It has a modular design and is based on the NECTAr chip, at the heart of which is a GHz sampling Switched Capacitor Array and 12-bit Analog to Digital converter. The camera will be equipped with 265 7-photomultiplier modules, covering a field of view of 8 degrees. Each module includes photomultiplier bases, high voltage supply, pre-amplifier, trigger, readout and Ethernet transceiver. The recorded events last between a few nanoseconds and tens of nanoseconds. The expected performance of the camera are discussed. Prototypes of NectarCAM components have been built to validate the design. Preliminary results of a 19-module mini-camera are presented, as well as future plans for building and testing a full size camera.

  3. The CMS electromagnetic calorimeter readout

    CERN Document Server

    Martin, F

    1999-01-01

    CMS is a general-purpose detector designed for use in the large Hadron Collider (LHC) at CERN. The electromagnetic calorimeter will play an important role in electron and photon energy measurements. The benchmark process to evaluate and optimize its performance is H to gamma gamma in the intermediate mass range (90readout chain has to be optimized. This paper discusses the readout chain of the CMS electromagnetic calorimeter and preliminary results obtained from prototype components. (6 refs).

  4. Linear readout of object manifolds

    Science.gov (United States)

    Chung, SueYeon; Lee, Daniel D.; Sompolinsky, Haim

    2016-06-01

    Objects are represented in sensory systems by continuous manifolds due to sensitivity of neuronal responses to changes in physical features such as location, orientation, and intensity. What makes certain sensory representations better suited for invariant decoding of objects by downstream networks? We present a theory that characterizes the ability of a linear readout network, the perceptron, to classify objects from variable neural responses. We show how the readout perceptron capacity depends on the dimensionality, size, and shape of the object manifolds in its input neural representation.

  5. Conceptual design of a hybrid Ge:Ga detector array

    Science.gov (United States)

    Parry, C. M.

    1984-01-01

    For potential applications in space infrared astronomy missions such as the Space Infrared Telescope Facility and the Large Deployable Reflector, integrated arrays of long-wavelength detectors are desired. The results of a feasibility study which developed a design for applying integrated array techniques to a long-wavelength (gallium-doped germanium) material to achieve spectral coverage between 30 and 200 microns are presented. An approach which builds up a two-dimensional array by stacking linear detector modules is presented. The spectral response of the Ge:Ga detectors is extended to 200 microns by application of uniaxial stress to the stack of modules. The detectors are assembled with 1 mm spacing between the elements. Multiplexed readout of each module is accomplished with integration sampling of a metal-oxide-semiconductor (MOS) switch chip. Aspects of the overall design, including the anticipated level of particle effects on the array in the space environment, a transparent electrode design for 200 microns response, estimates of optical crosstalk, and mechanical stress design calculations are included.

  6. A digital readout system for the CMS Phase I Pixel Upgrade

    International Nuclear Information System (INIS)

    The Phase I Upgrade to the CMS Pixel Detector at the LHC features a new 400 Mb/s digital readout system. This new system utilizes upgraded custom ASICs, PSI46digv2.1 Read Out Chips and Token Bit Manager for data packaging, new optical links and changes to the Front End Drivers. We are reporting on the new architecture of the full readout chain, the new schema for data encoding/transmission, and the results of preliminary testing of the new optical components

  7. FDM Readout Assembly with Flexible, Superconducting Connection to Cryogenic kilo-Pixel TES Detectors

    Science.gov (United States)

    Bruijn, M. P.; van der Linden, A. J.; Ridder, M. L.; van Weers, H. J.

    2016-07-01

    We describe a new fabrication process for a superconducting, flexible, and demountable connector to a kilo-pixel transition edge sensor. The demountable part contains planar coils for inductive coupling, in particular suited for AC-biased frequency domain multiplexed readout. A fixed connection to a chip with superconducting LC filters and SQUID readout is made by gold bump bonding with a connection resistance of 1.1 {× } 10^{-4} Ω . The Nb-based connecting lines on the flexible part show a superconducting transition around 7 K, which enables testing of connectors and LC filters in a simple L-He setup.

  8. A digital readout system for the CMS Phase I Pixel Upgrade

    Science.gov (United States)

    Stringer, R.

    2015-04-01

    The Phase I Upgrade to the CMS Pixel Detector at the LHC features a new 400 Mb/s digital readout system. This new system utilizes upgraded custom ASICs, PSI46digv2.1 Read Out Chips and Token Bit Manager for data packaging, new optical links and changes to the Front End Drivers. We are reporting on the new architecture of the full readout chain, the new schema for data encoding/transmission, and the results of preliminary testing of the new optical components.

  9. A digital readout system for the CMS Phase I Pixel Upgrade

    CERN Document Server

    Stringer, Robert Wayne

    2015-01-01

    The Phase I Upgrade to the CMS Pixel Detector at the LHC features a new 400 Mb/s digital readout system. This new system utilizes upgraded custom ASICs, PSI46dig Read Out Chips (ROC) and Token Bit Manager (TBM08/09) for data packaging, new optical links, and changes to the Front End Drivers (FEDs). We will be presenting the new architecture of the full readout chain, the new schema for data encoding/transmission, and the results of preliminary testing of the new components.

  10. The TDCpix readout ASIC: A 75 ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Kluge, A., E-mail: alexander.kluge@cern.ch; Aglieri Rinella, G.; Bonacini, S.; Jarron, P.; Kaplon, J.; Morel, M.; Noy, M.; Perktold, L.; Poltorak, K.

    2013-12-21

    The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak flow of particles crossing the detector modules reaches 1.27 MHz/mm{sup 2} for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection efficiency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45×40 square pixels of 300×300μm{sup 2} and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low-jitter PLL, readout and control circuits. This contribution will describe the complete design of the final TDCpix ASIC. It will discuss design choices, the challenges faced and some of the lessons learned. Furthermore, experimental results from the testing of circuit prototypes will be presented. These demonstrate the achievement of key performance figures such as a time resolution of the processing chain of 75 ps rms with a laser sent to the center of the pixel and the capability of time stamping charged particles with an overall resolution below 200 ps rms. -- Highlights: • Feasibility demonstration of a silicon pixel detector with sub-ns time tagging capability. • Demonstrator detector assembly with a time resolution of 75 ps RMS with laser charge injection; 170 ps RMS with particle beam. • Design of trigger-less TDCpix ASIC with 1800 pixels, 720 TDC channels and 4 3.2 Gbit/s serializers.

  11. 亚波长金属块阵列的太赫兹传感芯片%Terahertz Sensing Chip of Sub-wavelength Metallic Arrays

    Institute of Scientific and Technical Information of China (English)

    王思江; 毛洪艳; 夏良平; 杨忠波; 魏东山; 崔洪亮; 杜春雷

    2016-01-01

    光波波段的生化传感器件已很常见且可实现单分子探测,但由于光波波长在纳米量级,制作出的器件的结构尺寸小、加工难度大、传感重复性较差。因此,本文提出一种亚波长金属块阵列结构的太赫兹(Terahertz, THz)传感芯片,在理论上基于法布里-珀罗(FP)共振建立了其传感模型,结合有限元方法分析了亚波长金属结构局域表面等离子体共振对其传感灵敏度的影响规律。然后采用正交光刻工艺制作出了结构均一的传感芯片,传感实验表明,该芯片对0.025 mol/L的D(+)-葡萄糖水溶液可产生53 GHz的频移量,传感灵敏度高,有望应用于高灵敏的太赫兹生物传感。%Recently, light wave band biochemical sensors of single molecule detection are common to be seen. However, because of the light wave’s nano-scale length, the devices of small size are difficult to process and have poor sensing repeatability. Therefore, we proposed a terahertz (Terahertz, THz) sensor chip constituted of simple sub-wavelength metal block arrays. In theory, we established its sensing model based on Fabry-Perot (FP) resonance, combined with the analysis of the influence of the localized surface plasmon resonance of sub-wavelength metal structure of sensitivity in the Finite Element Method (FEM). Based on this, a large area and homogeneous structure was fabricated with the orthogonal lithography. The experimental result indicates that the resonance frequency shift 53 GHz for 0.025 mol/L D(+)-Glucose solution, which possess high sensitivity. Our works can provide theoretical guidance for the design of high sensitive terahertz sensor.

  12. SPIROC: design and performances of a dedicated very front-end electronics for an ILC Analog Hadronic CALorimeter (AHCAL) prototype with SiPM read-out

    Science.gov (United States)

    Conforti Di Lorenzo, S.; Callier, S.; Fleury, J.; Dulucq, F.; De la Taille, C.; Chassard, G. Martin; Raux, L.; Seguin-Moreau, N.

    2013-01-01

    For the future e+ e- International Linear Collider (ILC) the ASIC SPIROC (Silicon Photomultiplier Integrated Read-Out Chip) was designed to read out the Analog Hadronic Calorimeter (AHCAL) equipped with Silicon Photomultiplier (SiPM). It is an evolution of the FLC_SiPM chip designed by the OMEGA group in 2005. SPIROC2 [1] was realized in AMS SiGe 0.35 μm technology [2] and developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of read-out channels. This ASIC is a very front-end read-out chip that integrates 36 self triggered channels with variable gain to achieve charge and time measurements. The charge measurement must be performed from 1 up to 2000 photo-electrons (p.e.) corresponding to 160 fC up to 320 pC for SiPM gain 106. The time measurement is performed with a coarse 12-bit counter related to the bunch crossing clock (up to 5 MHz) and a fine time ramp based on this clock (down to 200 ns) to achieve a resolution of 1 ns. An analog memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. The analog memory content (time and charge) is digitized thanks to an internal 12-bit Wilkinson ADC. The data is then stored in a 4kbytes RAM. A complex digital part is necessary to manage all these features and to transfer the data to the DAQ. SPIROC2 is the second generation of the SPIROC ASIC family designed in 2008 by the OMEGA group. A very similar version (SPIROC2c) was submitted in February 2012 to improve the noise performance and also to integrate a new TDC (Time to Digital Converter) structure. This paper describes SPIROC2 and SPIROC2c ASICs and illustrates the main characteristics thank to a series of measurements.

  13. High frame rate measurements of semiconductor pixel detector readout IC

    International Nuclear Information System (INIS)

    We report on high count rate and high frame rate measurements of a prototype IC named FPDR90, designed for readouts of hybrid pixel semiconductor detectors used for X-ray imaging applications. The FPDR90 is constructed in 90 nm CMOS technology and has dimensions of 4 mm×4 mm. Its main part is a matrix of 40×32 pixels with 100 μm×100 μm pixel size. The chip works in the single photon counting mode with two discriminators and two 16-bit ripple counters per pixel. The count rate per pixel depends on the effective CSA feedback resistance and can be set up to 6 Mcps. The FPDR90 can operate in the continuous readout mode, with zero dead time. Due to the architecture of digital blocks in pixel, one can select the number of bits read out from each counter from 1 to 16. Because in the FPDR90 prototype only one data output is available, the frame rate is 9 kfps and 72 kfps for 16 bits and 1 bit readout, respectively (with nominal clock frequency of 200 MHz).

  14. High frame rate measurements of semiconductor pixel detector readout IC

    Science.gov (United States)

    Szczygiel, R.; Grybos, P.; Maj, P.

    2012-07-01

    We report on high count rate and high frame rate measurements of a prototype IC named FPDR90, designed for readouts of hybrid pixel semiconductor detectors used for X-ray imaging applications. The FPDR90 is constructed in 90 nm CMOS technology and has dimensions of 4 mm×4 mm. Its main part is a matrix of 40×32 pixels with 100 μm×100 μm pixel size. The chip works in the single photon counting mode with two discriminators and two 16-bit ripple counters per pixel. The count rate per pixel depends on the effective CSA feedback resistance and can be set up to 6 Mcps. The FPDR90 can operate in the continuous readout mode, with zero dead time. Due to the architecture of digital blocks in pixel, one can select the number of bits read out from each counter from 1 to 16. Because in the FPDR90 prototype only one data output is available, the frame rate is 9 kfps and 72 kfps for 16 bits and 1 bit readout, respectively (with nominal clock frequency of 200 MHz).

  15. High frame rate measurements of semiconductor pixel detector readout IC

    Energy Technology Data Exchange (ETDEWEB)

    Szczygiel, R., E-mail: robert.szczygiel@agh.edu.pl [AGH University of Science and Technology, Department of Measurement and Instrumentation, Al. Mickiewicza 30, 30-059 Cracow (Poland); Grybos, P.; Maj, P. [AGH University of Science and Technology, Department of Measurement and Instrumentation, Al. Mickiewicza 30, 30-059 Cracow (Poland)

    2012-07-11

    We report on high count rate and high frame rate measurements of a prototype IC named FPDR90, designed for readouts of hybrid pixel semiconductor detectors used for X-ray imaging applications. The FPDR90 is constructed in 90 nm CMOS technology and has dimensions of 4 mm Multiplication-Sign 4 mm. Its main part is a matrix of 40 Multiplication-Sign 32 pixels with 100 {mu}m Multiplication-Sign 100 {mu}m pixel size. The chip works in the single photon counting mode with two discriminators and two 16-bit ripple counters per pixel. The count rate per pixel depends on the effective CSA feedback resistance and can be set up to 6 Mcps. The FPDR90 can operate in the continuous readout mode, with zero dead time. Due to the architecture of digital blocks in pixel, one can select the number of bits read out from each counter from 1 to 16. Because in the FPDR90 prototype only one data output is available, the frame rate is 9 kfps and 72 kfps for 16 bits and 1 bit readout, respectively (with nominal clock frequency of 200 MHz).

  16. A multichannel compact readout system for single photon detection: Design and performances

    Energy Technology Data Exchange (ETDEWEB)

    Argentieri, A.G. [Istituto Nazionale di Fisica Nucleare, via E. Orabona 4, 70126 Bari (Italy); Cisbani, E.; Colilli, S.; Cusanno, F. [Istituto Superiore di Sanita, viale Regina Elena 299, 00161 Roma (Italy); De Leo, R. [Istituto Nazionale di Fisica Nucleare, via E. Orabona 4, 70126 Bari (Italy); Fratoni, R.; Garibaldi, F.; Giuliani, F.; Gricia, M.; Lucentini, M. [Istituto Superiore di Sanita, viale Regina Elena 299, 00161 Roma (Italy); Marra, M. [Istituto Nazionale di Fisica Nucleare, via E. Orabona 4, 70126 Bari (Italy); Musico, Paolo, E-mail: Paolo.Musico@ge.infn.i [Istituto Nazionale di Fisica Nucleare, via Dodecaneso 33, 16146 Genova (Italy); Santavenere, F.; Torrioli, S. [Istituto Superiore di Sanita, viale Regina Elena 299, 00161 Roma (Italy)

    2010-05-21

    Optimal exploitation of Multi Anode PhotoMultiplier Tubes (MAPMT) as imaging devices requires the acquisition of a large number of independent channels; despite the rather wide demand, on-the-shelf electronics for this purpose does not exist. A compact independent channel readout system for an array of MAPMTs has been developed and tested . The system can handle up to 4096 independent channels, covering an area of about 20x20cm{sup 2} with pixel size of 3x3mm{sup 2}, using Hamamatsu H-9500 devices. The front-end is based on a 64 channels VLSI custom chip called MAROC, developed by IN2P3 Orsay (France) group, controlled by means of a Field Programmable Gate Array (FPGA) which implements configuration, triggering and data conversion controls. Up to 64 front-end cards can be housed in four backplanes and a central unit collects data from all of them, communicating with a control Personal Computer (PC) using an high speed USB 2.0 connection. A complete system has been built and tested. Eight Flat MAPMTs (256 anodes Hamamatsu H-9500) have been arranged on a boundary of a 3x3 matrix for a grand total of 2048 channels. This detector has been used to verify the performances of a focusing aerogel RICH prototype using an electron beam at the Frascati (Rome) INFN National Laboratory Beam Test Facility (BTF) during the last week of January 2009. Data analysis is ongoing: the first results are encouraging, showing that the Cherenkov rings are well identified by this system.

  17. A multichannel compact readout system for single photon detection: Design and performances

    Science.gov (United States)

    Argentieri, A. G.; Cisbani, E.; Colilli, S.; Cusanno, F.; De Leo, R.; Fratoni, R.; Garibaldi, F.; Giuliani, F.; Gricia, M.; Lucentini, M.; Marra, M.; Musico, Paolo; Santavenere, F.; Torrioli, S.

    2010-05-01

    Optimal exploitation of Multi Anode PhotoMultiplier Tubes (MAPMT) as imaging devices requires the acquisition of a large number of independent channels; despite the rather wide demand, on-the-shelf electronics for this purpose does not exist. A compact independent channel readout system for an array of MAPMTs has been developed and tested [1,2]. The system can handle up to 4096 independent channels, covering an area of about 20×20 cm2 with pixel size of 3×3 mm2, using Hamamatsu H-9500 devices. The front-end is based on a 64 channels VLSI custom chip called MAROC, developed by IN2P3 Orsay (France) group, controlled by means of a Field Programmable Gate Array (FPGA) which implements configuration, triggering and data conversion controls. Up to 64 front-end cards can be housed in four backplanes and a central unit collects data from all of them, communicating with a control Personal Computer (PC) using an high speed USB 2.0 connection. A complete system has been built and tested. Eight Flat MAPMTs (256 anodes Hamamatsu H-9500) have been arranged on a boundary of a 3×3 matrix for a grand total of 2048 channels. This detector has been used to verify the performances of a focusing aerogel RICH prototype using an electron beam at the Frascati (Rome) INFN National Laboratory Beam Test Facility (BTF) during the last week of January 2009. Data analysis is ongoing: the first results are encouraging, showing that the Cherenkov rings are well identified by this system.

  18. Titanium Dioxide Nanoparticle Humidity Microsensors Integrated with Circuitry on-a-Chip

    OpenAIRE

    Yu-Chih Hu; Ching-Liang Dai; Cheng-Chih Hsu

    2014-01-01

    A humidity microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.18 μm CMOS (complementary metal oxide semiconductor) process was presented. The integrated sensor chip consists of a humidity sensor and a readout circuit. The humidity sensor is composed of a sensitive film and interdigitated electrodes. The sensitive film is titanium dioxide prepared by the sol-gel method. The titanium dioxide is coated on the interdigitated electrodes. The humidity sensor r...

  19. FE-I4 pixel chip characterization with USBpix3 test system

    Energy Technology Data Exchange (ETDEWEB)

    Filimonov, Viacheslav; Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Janssen, Jens; Krueger, Hans; Pohl, David-Leon; Wermes, Norbert [University of Bonn, Bonn (Germany)

    2015-07-01

    The USBpix readout system is a small and light weighting test system for the ATLAS pixel readout chips. It is widely used to operate and characterize FE-I4 pixel modules in lab and test beam environments. For multi-chip modules the resources on the Multi-IO board, that is the central control unit of the readout system, are coming to their limits, which makes the simultaneous readout of more than one chip at a time challenging. Therefore an upgrade of the current USBpix system has been developed. The upgraded system is called USBpix3 - the main focus of the talk. Characterization of single chip FE-I4 modules was performed with USBpix3 prototype (digital, analog, threshold and source scans; tuning). PyBAR (Bonn ATLAS Readout in Python scripting language) was used as readout software. PyBAR consists of FEI4 DAQ and Data Analysis Libraries in Python. The presentation describes the USBpix3 system, results of FE-I4 modules characterization and preparation for the multi-chip module and multi-module readout with USBpix3.

  20. FE-I4 pixel chip characterization with USBpix3 test system

    International Nuclear Information System (INIS)

    The USBpix readout system is a small and light weighting test system for the ATLAS pixel readout chips. It is widely used to operate and characterize FE-I4 pixel modules in lab and test beam environments. For multi-chip modules the resources on the Multi-IO board, that is the central control unit of the readout system, are coming to their limits, which makes the simultaneous readout of more than one chip at a time challenging. Therefore an upgrade of the current USBpix system has been developed. The upgraded system is called USBpix3 - the main focus of the talk. Characterization of single chip FE-I4 modules was performed with USBpix3 prototype (digital, analog, threshold and source scans; tuning). PyBAR (Bonn ATLAS Readout in Python scripting language) was used as readout software. PyBAR consists of FEI4 DAQ and Data Analysis Libraries in Python. The presentation describes the USBpix3 system, results of FE-I4 modules characterization and preparation for the multi-chip module and multi-module readout with USBpix3.

  1. Smart pixel imaging with computational-imaging arrays

    Science.gov (United States)

    Fernandez-Cull, Christy; Tyrrell, Brian M.; D'Onofrio, Richard; Bolstad, Andrew; Lin, Joseph; Little, Jeffrey W.; Blackwell, Megan; Renzi, Matthew; Kelly, Mike

    2014-07-01

    Smart pixel imaging with computational-imaging arrays (SPICA) transfers image plane coding typically realized in the optical architecture to the digital domain of the focal plane array, thereby minimizing signal-to-noise losses associated with static filters or apertures and inherent diffraction concerns. MIT Lincoln Laboratory has been developing digitalpixel focal plane array (DFPA) devices for many years. In this work, we leverage legacy designs modified with new features to realize a computational imaging array (CIA) with advanced pixel-processing capabilities. We briefly review the use of DFPAs for on-chip background removal and image plane filtering. We focus on two digital readout integrated circuits (DROICS) as CIAs for two-dimensional (2D) transient target tracking and three-dimensional (3D) transient target estimation using per-pixel coded-apertures or flutter shutters. This paper describes two DROICs - a SWIR pixelprocessing imager (SWIR-PPI) and a Visible CIA (VISCIA). SWIR-PPI is a DROIC with a 1 kHz global frame rate with a maximum per-pixel shuttering rate of 100 MHz, such that each pixel can be modulated by a time-varying, pseudorandom, and duo-binary signal (+1,-1,0). Combining per-pixel time-domain coding and processing enables 3D (x,y,t) target estimation with limited loss of spatial resolution. We evaluate structured and pseudo-random encoding strategies and employ linear inversion and non-linear inversion using total-variation minimization to estimate a 3D data cube from a single 2D temporally-encoded measurement. The VISCIA DROIC, while low-resolution, has a 6 kHz global frame rate and simultaneously encodes eight periodic or aperiodic transient target signatures at a maximum rate of 50 MHz using eight 8-bit counters. By transferring pixel-based image plane coding to the DROIC and utilizing sophisticated processing, our CIAs enable on-chip temporal super-resolution.

  2. A microfluidic device for the automated electrical readout of low-density glass-slide microarrays.

    Science.gov (United States)

    Díaz-González, María; Salvador, J Pablo; Bonilla, Diana; Marco, M Pilar; Fernández-Sánchez, César; Baldi, Antoni

    2015-12-15

    Microarrays are a powerful platform for rapid and multiplexed analysis in a wide range of research fields. Electrical readout systems have emerged as an alternative to conventional optical methods for microarray analysis thanks to its potential advantages like low-cost, low-power and easy miniaturization of the required instrumentation. In this work an automated electrical readout system for low-cost glass-slide microarrays is described. The system enables the simultaneous conductimetric detection of up to 36 biorecognition events by incorporating an array of interdigitated electrode transducers. A polydimethylsiloxane microfluidic structure has been designed that creates microwells over the transducers and incorporates the microfluidic channels required for filling and draining them with readout and cleaning solutions, thus making the readout process fully automated. Since the capture biomolecules are not immobilized on the transducer surface this readout system is reusable, in contrast to previously reported electrochemical microarrays. A low-density microarray based on a competitive enzymatic immunoassay for atrazine detection was used to test the performance of the readout system. The electrical assay shows a detection limit of 0.22±0.03 μg L(-1) similar to that obtained with fluorescent detection and allows the direct determination of the pesticide in polluted water samples. These results proved that an electrical readout system such as the one presented in this work is a reliable and cost-effective alternative to fluorescence scanners for the analysis of low-density microarrays.

  3. Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

    Science.gov (United States)

    Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P. L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C. A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.; Mugnier, H.; Musa, L.; Puggioni, C.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Siddhanta, S.; Usai, G.; van Hoorne, J. W.; Yi, J.

    2015-06-01

    Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

  4. Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

    Energy Technology Data Exchange (ETDEWEB)

    Yang, P., E-mail: yangping0710@126.com [Central China Normal University, Wuhan (China); Aglieri, G.; Cavicchioli, C. [CERN, 1210 Geneva 23 (Switzerland); Chalmet, P.L. [MIND, Archamps (France); Chanlek, N. [Suranaree University of Technology, Nakhon Ratchasima (Thailand); Collu, A. [University of Cagliari, Cagliari (Italy); INFN (Italy); Gao, C. [Central China Normal University, Wuhan (China); Hillemanns, H.; Junique, A. [CERN, 1210 Geneva 23 (Switzerland); Kofarago, M. [CERN, 1210 Geneva 23 (Switzerland); University of Utrecht, Utrecht (Netherlands); Keil, M.; Kugathasan, T. [CERN, 1210 Geneva 23 (Switzerland); Kim, D. [Dongguk and Yonsei University, Seoul (Korea, Republic of); Kim, J. [Pusan National University, Busan (Korea, Republic of); Lattuca, A. [University of Torino, Torino (Italy); INFN (Italy); Marin Tobon, C.A. [CERN, 1210 Geneva 23 (Switzerland); Marras, D. [University of Cagliari, Cagliari (Italy); INFN (Italy); Mager, M.; Martinengo, P. [CERN, 1210 Geneva 23 (Switzerland); Mazza, G. [University of Torino, Torino (Italy); INFN (Italy); and others

    2015-06-11

    Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

  5. Radiopurity of Micromegas readout planes

    CERN Document Server

    Cebrian, S; Ferrer-Ribas, E; Galan, J; Giomataris, I; Gomez, H; Iguaz, F J; Irastorza, I G; Luzon, G; de Oliveira, R; Rodriguez, A; Segui, L; Tomas, A; Villar, J A

    2011-01-01

    Micromesh Gas Amplification Structures (Micromegas) are being used in an increasing number of Particle Physics applications since their conception fourteen years ago. More recently, they are being used or considered as readout of Time Projection Chambers (TPCs) in the field of Rare Event searches (dealing with dark matter, axions or double beta decay). In these experiments, the radiopurity of the detector components and surrounding materials is measured and finely controlled in order to keep the experimental background as low as possible. In the present paper, the first measurement of the radiopurity of Micromegas planes obtained by high purity germanium spectrometry in the low background facilities of the Canfranc Underground Laboratory (LSC) is presented. The obtained results prove that Micromegas readouts of the microbulk type are currently manufactured with radiopurity levels below 30 microBq/cm2 for Th and U chains and ~60 microBq/cm2 for 40K, already comparable to the cleanest detector components of the...

  6. Analysis techniques and performance of the Domino Ring Sampler version 4 based readout for the MAGIC telescopes

    Energy Technology Data Exchange (ETDEWEB)

    Sitarek, Julian, E-mail: dzuleq@gmail.com [IFAE, Edifici Cn., Campus UAB, E-08193 Bellaterra (Spain); Gaug, Markus, E-mail: Markus.Gaug@uab.cat [Física de les Radiacions, Departament de Física, Universitat Autònoma de Barcelona, 08193 Bellaterra (Spain); CERES, Universitat Autònoma de Barcelona-IEEC, 08193 Bellaterra (Spain); Mazin, Daniel, E-mail: mazin@mpp.mpg.de [Max-Planck-Institut für Physik, D-80805 München (Germany); Paoletti, Riccardo, E-mail: paoletti@pi.infn.it [Università di Siena, and INFN Pisa, I-53100 Siena (Italy); Tescaro, Diego, E-mail: diegot@ifae.es [Inst. de Astrofísica de Canarias, E-38200 La Laguna, Tenerife (Spain)

    2013-09-21

    Recently the readout of the MAGIC telescopes has been upgraded to a new system based on the Domino Ring Sampler version 4 chip. We present the analysis techniques and the signal extraction performance studies of this system. We study the behavior of the baseline, the noise, the cross-talk, the linearity and the time resolution. We investigate also the optimal signal extraction. In addition we show some of the analysis techniques specific to the readout based on the Domino Ring Sampler version 2 chip, previously used in the MAGIC II telescope. -- Highlights: • We perform studies of the DRS4 based readout of the MAGIC telescopes • Advanced pedestal subtraction procedure results in a stable baseline. • The noise of the system is below one photoelectron. • The calibration of the DRS4 time response gives time resolution of 0.2 ns. • Linearity is very good up to saturation at 750 phe.

  7. Readout boards for silicon detectors

    International Nuclear Information System (INIS)

    With ever increasing demands for greater miniaturization and the use of sophisticated circuitry in nuclear and particle physics experiments, the need for improved design of Printed Circuit Boards (PCBs) is becoming more important day by day. Interconnecting traces, parasitic components, grounding schemes and decoupling makes the design of the layout of PCBs as demanding as the design of the complex electrical circuit. An astute design of the readout boards is important in the success of the overall performance of the final system

  8. 用于微悬臂梁红外焦平面读出电路的片上ADC设计%Design of On-Chip ADC for Readout Circuit of Microcantilever-Based Infrared Focal Plane Array

    Institute of Scientific and Technical Information of China (English)

    曹君敏; 陈中建; 鲁文高; 张雅聪; 于晓梅; 赵宝瑛

    2010-01-01

    设计了一种用于微悬臂梁红外焦平面读出电路的片上ADC.该ADC采用流水线结构实现,采用带溢出检测的多位第一级和后级功耗逐级缩减的方案优化系统功耗,提高线性度.该设计采用0.35 μm 的CMOS工艺流片验证.测试结果表明: 5 V电源电压、10 M采样率时电路总功耗为98 mW,微分非线性和积分非线性分别为-0.8/0.836 LSB和-0.9/1.6 LSB;输入频率为1 MHz时,SFDR和SNDR分别为82和67 dB.

  9. Characterization of CdTe Sensors with Schottky Contacts Coupled to Charge-Integrating Pixel Array Detectors for X-Ray Science

    CERN Document Server

    Becker, Julian; Shanks, Katherine S; Philipp, Hugh T; Weiss, Joel T; Purohit, Prafull; Chamberlain, Darol; Ruff, Jacob P C; Gruner, Sol M

    2016-01-01

    Pixel Array Detectors (PADs) consist of an x-ray sensor layer bonded pixel-by-pixel to an underlying readout chip. This approach allows both the sensor and the custom pixel electronics to be tailored independently to best match the x-ray imaging requirements. Here we present characterizations of CdTe sensors hybridized with two different charge-integrating readout chips, the Keck PAD and the Mixed-Mode PAD (MM-PAD), both developed previously in our laboratory. The charge-integrating architecture of each of these PADs extends the instantaneous counting rate by many orders of magnitude beyond that obtainable with photon counting architectures. The Keck PAD chip consists of rapid, 8-frame, in-pixel storage elements with framing periods $<$150 ns. The second detector, the MM-PAD, has an extended dynamic range by utilizing an in-pixel overflow counter coupled with charge removal circuitry activated at each overflow. This allows the recording of signals from the single-photon level to tens of millions of x-rays/...

  10. Novel low area CMOS readout circuit for uncooled microbolometers with low noise

    Science.gov (United States)

    Lv, Jian; Jiang, Yadong; Zhou, Yun; Luo, Fengwu

    2009-05-01

    We propose a novel CMOS readout structure without sample and hold (SH) circuit for uncooled microbolometers. In this readout circuit, all the pixels in one row can be integrated simultaneously, and the readout integrated circuit (ROIC) area can be reduced by as much as 30%. Moreover, a single capacitor implementation of both capacitive transimpedance amplifier (CTIA) and correlated double sampling (CDS) is utilized to improve noise performance. An experimental 40x30 ROIC chip has been designed and fabricated with 0.5 μm CMOS technology. The test results show that the ROIC has good linearity with 260μV RMS total output noise voltage and 1800x650 μm2 total circuit area.

  11. A microsensor array for biochemical sensing

    NARCIS (Netherlands)

    Van Steenkiste, Filip; Baert, Kris; Debruyker, Dirk; Spiering, Vincent; Schoot, van der Bart; Arquint, Philippe; Born, Reinhard; Schumann, Klaus

    1997-01-01

    A microsensor array to measure chemical properties of biological liquids is presented. A hybrid integration technique is used to mount four sensor chips on a micro flow channel: a pressure, temperature, pH, combined pO2 and pCO2 sensor chip. This results in a microsensor array which is developed to

  12. Large-array Far-infrared Microwave Kinetic Inductance Detector Demonstration Project

    Data.gov (United States)

    National Aeronautics and Space Administration — Low return loss package design Improve amplifier mismatch at the package and chip interface Multi-branch MKID design to increase readout frequencies Silicon...

  13. The high granularity and large solid angle detection array EXPADES

    International Nuclear Information System (INIS)

    Highlights: • We realized a detection array for Exotic Radioactive Ion Beams. • High granularity (32 × 32 pixels 2 × 2 mm wide for 8 telescopes). • High solid angle (8 telescopes 64 × 64 mm wide in a cylindrical configuration covering up to 2.6 sr). • We tested each component of the array by both alpha particles and in-beam environment. • We measured the angular distribution for 17O elastic scattering on a 58Ni target. -- Abstract: The EXPADES (EXotic PArticle DEtection System) detector array consists of 16 Double Side Silicon Strip Detectors (DSSSD) with active areas of 64 × 64 mm2, arranged in 8 ΔE (40/50 μm)–E (300 μm) telescopes. All detector faces are segmented into 32 × 2-mm wide strips, ensuring a 2 × 2 mm2 pixel configuration. Eight ionization chambers can be alternatively used as ΔE stages or, if needed, as an additional third layer for more complex triple telescopes. The signals from silicon ΔE layers and from ionization chambers are read by standard electronics, while innovative 32-channel ASIC chips are employed for the readout of the E stages. The results of off-line tests with alpha sources and from the first in-beam experiment with a 17O beam are presented

  14. Lab-on-chip system combining a microfluidic-ELISA with an array of amorphous silicon photosensors for the detection of celiac disease epitopes

    Directory of Open Access Journals (Sweden)

    Francesca Costantini

    2015-12-01

    The correct operation of the developed lab-on-chip has been demonstrated using rabbit serum in the microfluidic ELISA. In particular, optimizing the dilution factors of both sera and Ig-HRP samples in the flowing solutions, the specific and non-specific antibodies against GPs can be successfully distinguished, showing the suitability of the presented device to effectively screen celiac disease epitopes.

  15. Detailed study of the column-based priority logic readout of Topmetal-II- CMOS pixel direct charge sensor

    CERN Document Server

    An, Mangmang; Gao, Chaosong; Han, Mikyung; Huang, Guangming; Ji, Rong; Li, Xiaoting; Mei, Yuan; Pei, Hua; Sun, Quan; Sun, Xiangming; Wang, Kai; Xiao, Le; Yang, Ping; Zhang, Wei; Zhou, Wei

    2016-01-01

    We present the detailed study of the digital readout of Topmetal-II- CMOS pixel direct charge sensor. Topmetal-II- is an integrated sensor with an array of 72X72 pixels each capable of directly collecting external charge through exposed metal electrodes in the topmost metal layer. In addition to the time-shared multiplexing readout of the analog output from Charge Sensitive Amplifiers in each pixel, hits are also generated through comparators with individually DAC settable thresholds in each pixel. The hits are read out via a column-based priority logic structure, retaining both hit location and time information. The in-array column-based priority logic is fully combinational hence there is no clock distributed in the pixel array. Sequential logic and clock are placed on the peripheral of the array. We studied the detailed working behavior and performance of this readout, and demonstrated its potential in imaging applications.

  16. BATS, the readout control of UA1

    Energy Technology Data Exchange (ETDEWEB)

    Botlo, M.; Dorenbosch, J.; Jimack, M.; Szoncso, F.; Taurok, A.; Walzel, G. (European Organization for Nuclear Research, Geneva (Switzerland))

    1991-04-15

    A steadily rising luminosity and different readout architectures for the various detector systems of UA1 required a new data flow control to minimize the dead time. BATS, a finite state machine conceived around two microprocessors in a single VME crate, improved flexibility and reliability. Compatibility with BATS streamlined all readout branches. BATS also proved to be a valuable asset in spotting readout problems and previously undetected data flow bottlenecks. (orig.).

  17. The fast readout system for the MAPMTs of COMPASS RICH-1

    CERN Document Server

    Abbon, P; Angerer, H; Birsa, R; Bordalo, P; Bradamante, Franco; Bressan, A; Chiosso, M; Ciliberti, P; Colantoni, M L; Dafni, T; Dalla Torre, S; Delagnes, E; Denisov, O; Deschamps, H; Díaz, V; Dibiase, N; Duic, V; Eyrich, W; Ferrero, A; Finger, M; Finger, M Jr; Fischer, H; Gerassimov, S; Giorgi, M; Gobbo, B; Hagemann, R; Von Harrach, D; Heinsius, F H; Joosten, R; Ketzer, B; Kolosov, V N; Königsmann, K C; Konorov, I; Kramer, Daniel; Kunne, F; Lehmann, A; Levorato, S; Maggiora, A; Magnon, A; Mann, A; Martin, A; Menon, G; Mutter, A; Nähle, O; Nerling, F; Neyret, D; Panzieri, D; Paul, S; Pesaro, G; Pizzolotto, C; Polak, J; Rebourgeard, P; Robinet, F; Rocco, E; Schiavon, P; Schill, C; Schoenmeier, P; Schröder, W; Silva, L; Slunecka, M; Sozzi, F; Steiger, L; Sulc, M; Svec, M; Takekawa, S; Tessarotto, F; Teufel, A; Wollny, H

    2008-01-01

    A fast readout system for the upgrade of the COMPASS RICH detector has been developed and successfully used for data taking in 2006 and 2007. The new readout system for the multi-anode PMTs in the central part of the photon detector of the RICH is based on the high-sensitivity MAD4 preamplifier-discriminator and the dead-time free F1-TDC chip characterized by high-resolution. The readout electronics has been designed taking into account the high photon flux in the central part of the detector and the requirement to run at high trigger rates up to 100 kHz with negligible dead-time. The system is designed in a very compact setup and mounted directly in front of the multi-anode photomultipliers. The data are digitized on the frontend boards and transferred via optical links to the readout system. The read-out electronics system is described in detail together with its measured performances.

  18. An analog CMOS chip set for neural networks with arbitrary topologies

    DEFF Research Database (Denmark)

    Lansner, John; Lehmann, Torsten

    1993-01-01

    An analog CMOS chip set for implementations of artificial neural networks (ANNs) has been fabricated and tested. The chip set consists of two cascadable chips: a neuron chip and a synapse chip. Neurons on the neuron chips can be interconnected at random via synapses on the synapse chips thus...... implementing an ANN with arbitrary topology. The neuron test chip contains an array of 4 neurons with well defined hyperbolic tangent activation functions which is implemented by using parasitic lateral bipolar transistors. The synapse test chip is a cascadable 4×4 matrix-vector multiplier with variable, 10-b...

  19. Development of a Standardised Readout System for Active Pixel Sensors in HV/HR-CMOS Technologies for ATLAS Inner Detector Upgrades

    International Nuclear Information System (INIS)

    The LHC Phase-II Upgrade results in new challenges for tracking detectors for example in terms of cost effectiveness, resolution and radiation hardness. Active Pixel Sensors in HV/HR-CMOS technologies show promising results coping with these challenges. In order to demonstrate the feasibility of hybrid modules with active CMOS sensors and readout chips for the future ATLAS Inner Tracker, ATLAS R and D activities have started. After introducing the basic concepts and the demonstrator program, the development of an ATLAS compatible readout system will be presented as well as tuning procedures and measurements with demonstrator modules to test the readout system

  20. PACIFIC: the readout ASIC for the SciFi Tracker of the upgraded LHCb detector

    Science.gov (United States)

    Mazorra, J.; Chanal, H.; Comerma, A.; Gascón, D.; Gómez, S.; Han, X.; Pillet, N.; Vandaele, R.

    2016-02-01

    The LHCb detector will be upgraded during the Long Shutdown 2 (LS2) of the LHC in order to cope with higher instantaneous luminosities and will switch to a 40 MHz readout rate using a trigger-less software based system. All front-end electronics will be replaced and several sub-detectors must be redesigned to cope with the higher detector occupancy and radiation damage. The current tracking detectors downstream of the LHCb dipole magnet will be replaced by the Scintillating Fibre (SciFi) Tracker. The SciFi Tracker will use scintillating fibres read out by Silicon Photomultipliers (SiPMs). State-of-the-art multi-channel SiPM arrays are being developed and a custom ASIC, called the low-Power ASIC for the sCIntillating FIbres traCker (PACIFIC), will be used to digitise the signals from the SiPMs. This article presents an overview of the R&D for the PACIFIC. It is a 64-channel ASIC implemented in 130 nm CMOS technology, aiming at a radiation tolerant design with a power consumption below 10 mW per channel. It interfaces directly with the SiPM anode through a current mode input, and provides a configurable non-linear 2-bit per channel digital output. The SiPM signal is acquired by a current conveyor and processed with a fast shaper and a gated integrator. The digitization is performed using a three threshold non-linear flash ADC operating at 40 MHz. Simulation and test results show the PACIFIC chip prototypes functioning well.

  1. Development of optical switching readout X-ray detector for high-speed imaging

    International Nuclear Information System (INIS)

    In this study, we demonstrated the feasibility of an X-ray detector with a dual amorphous-selenium (a-Se) layer using an optical switching readout for high-speed X-ray imaging. The X-ray detector consists of a negative voltage bias electrode; a thick a-Se layer for the photoelectric conversion of X-ray photons; an As2Se3 layer employed as an electron-trapping layer for accumulating latent images; a thin a-Se layer for optical readout; alternate opaque and transparent electrodes; and an optical light source for the optical switching readout. The line light of the optical light source, which has a peak wavelength of 470 nm, is operated line by line using electrical scanning for high-speed X-ray imaging. The developed X-ray detector has a pixel pitch of 200 μm with 512 channels. -- Highlights: •The feasibility of X-ray detector for high-speed imaging was demonstrated. •An a-Se was used for optical switching layer for signal charge readout. •As2Se3 layer was employed as electron-trapping layer for accumulating latent images. •The surface light source of blue lights was fabricated for optical switching readout. •The 2D array of readout light can be emitted linearly and scanned electrically line by line

  2. Four-channel readout ASIC for silicon pad detectors

    International Nuclear Information System (INIS)

    A custom front-end readout ASIC has been designed for silicon calorimeters supposed to be used in high-energy physics experiments. The ASIC was produced using BJT-JFET technology. It contains four channels of a fast low-noise charge-sensitive preamplifier (CSP) with inverting outputs summed by a linear adder (LA) followed by an RC-CR shaping amplifier (SA) with 30 ns peaking time. Availability of separate outputs of the CSPs and the LA makes it possible to join any number of silicon detector layers to obtain the longitudinal and transversal resolution required using only this ASIC in any silicon calorimeter minitower configuration. Noise performance is ENC=1800e-+18e-/pF at 30 ns peaking time for detector capacitance up to Cd=400 pF. Rise time is 8 ns at input capacitance Cd=100 pF. Power dissipation is less than 50 mW/ chip at voltage supply 5 V

  3. Delay grid multiplexing: simple time-based multiplexing and readout method for silicon photomultipliers

    Science.gov (United States)

    Won, Jun Yeon; Ko, Guen Bae; Lee, Jae Sung

    2016-10-01

    In this paper, we propose a fully time-based multiplexing and readout method that uses the principle of the global positioning system. Time-based multiplexing allows simplifying the multiplexing circuits where the only innate traces that connect the signal pins of the silicon photomultiplier (SiPM) channels to the readout channels are used as the multiplexing circuit. Every SiPM channel is connected to the delay grid that consists of the traces on a printed circuit board, and the inherent transit times from each SiPM channel to the readout channels encode the position information uniquely. Thus, the position of each SiPM can be identified using the time difference of arrival (TDOA) measurements. The proposed multiplexing can also allow simplification of the readout circuit using the time-to-digital converter (TDC) implemented in a field-programmable gate array (FPGA), where the time-over-threshold (ToT) is used to extract the energy information after multiplexing. In order to verify the proposed multiplexing method, we built a positron emission tomography (PET) detector that consisted of an array of 4  ×  4 LGSO crystals, each with a dimension of 3  ×  3  ×  20 mm3, and one- to-one coupled SiPM channels. We first employed the waveform sampler as an initial study, and then replaced the waveform sampler with an FPGA-TDC to further simplify the readout circuits. The 16 crystals were clearly resolved using only the time information obtained from the four readout channels. The coincidence resolving times (CRTs) were 382 and 406 ps FWHM when using the waveform sampler and the FPGA-TDC, respectively. The proposed simple multiplexing and readout methods can be useful for time-of-flight (TOF) PET scanners.

  4. Mimosa 32-ter Chip Characterisation

    CERN Document Server

    Behera, Arabinda

    2013-01-01

    The Inner Tracking System (ITS) is a very important part of the ALICE detector. Present ITS is made up of 6 coaxial layers of silicon detectors (2 SPD, 2 SDD and 2 SSD). This system has a lot of limitations. Its tracking efficiency and resolution is low. Its readout rate is also very slow. Its not possible to study charm and beauty baryons and mesons with this system. So the upcoming ITS Upgrade plan will try to overcome these shortcomings. A very crucial part in this plan is to replace the existing hybrid sensors by new and advanced Monolithic Active Pixel Sensors(MAPS). In MAPS the sensor and the electronics are embedded in the same chip. The MAPS will reduce the material budget, increase the readout rate and enhance the tracking efficiency and momentum resolution. In this report I will present the results for the Characterisation of MIMOSA 32-ter chip, which is a MAPS. My main aim is to calculate the Charge Collection Efficiency of different sectors of the chip and compare between them. And most importa...

  5. The readout electronics for Plastic Scintillator Detector of DAMPE

    Science.gov (United States)

    Kong, Jie; Yang, Haibo; Zhao, Hongyun; Su, Hong; Sun, Zhiyu; Yu, Yuhong; JingZhe, Zhang; Wang, XiaoHui; Liu, Jie; Xiao, Guoqing; Ma, Xinwen

    2016-07-01

    The Dark Matter Particle Explorer (DAMPE) satellite, which launched in December 2015, is designed to find the evidence of the existence of dark matter particles in the universe via the detection of the high-energy electrons and gamma-ray particles produced possibly by the annihilation of dark matter particles. Plastic Scintillator Detector (PSD) is one of major part of the satellite payload, which is comprised of a crossed pair of layers with 41 plastic scintillator-strips, each read out from both ends by the same Hamamatsu R4443MOD2 photo-multiplier tubes (PMTs). In order to extend linear dynamic range of detector, PMTs read out each plastic scintillator-strip separately with two dynode pickoffs. Therefore, the readout electronics system comprises of four Front-end boards to receive the pulses from 328 PMTs and implement charge measurement, which is based on the Application Specific Integrated Circuit (ASIC) chip VA160, 16 bits ADC and FPGA. The electronics of the detector has been designed following stringent requirements on mechanical and thermal stability, power consumption, radiation hardness and double redundancy. Various experiments are designed and implemented to check the performance of the electronics, some excellent results has been achieved.According to experimental results analysis, it is proved that the readout electronics works well.

  6. A Neuron- and a Synapse Chip for Artificial Neural Networks

    DEFF Research Database (Denmark)

    Lansner, John; Lehmann, Torsten

    1992-01-01

    A cascadable, analog, CMOS chip set has been developed for hardware implementations of artificial neural networks (ANN's):I) a neuron chip containing an array of neurons with hyperbolic tangent activation functions and adjustable gains, and II) a synapse chip (or a matrix-vector multiplier) where...

  7. DC readout experiment in Enhanced LIGO

    International Nuclear Information System (INIS)

    The two 4 km long gravitational wave detectors operated by the Laser Interferometer Gravitational-wave Observatory (LIGO) were modified in 2008 to read out the gravitational wave channel using the DC readout form of homodyne detection and to include an optical filter cavity at the output of the detector. As part of the upgrade to Enhanced LIGO, these modifications replaced the radio-frequency (RF) heterodyne system used previously. We describe the motivations for and the implementation of DC readout and the output mode cleaner in Enhanced LIGO. We present characterizations of the system, including measurements and models of the couplings of the noises from the laser source to the gravitational wave readout channel. We show that noise couplings using DC readout are improved over those for RF readout, and we find that the achieved shot-noise-limited sensitivity is consistent with modeled results. (paper)

  8. Superconducting chip receivers for imaging application

    NARCIS (Netherlands)

    Shitov, SV; Koshelets, VP; Ermakov, AB; Filippenko, LV; Baryshev, AM; Luinge, W; Gao, [No Value

    1999-01-01

    Experimental details of a unique superconducting imaging array receiver are discussed. Each pixel contains an internally pumped receiver chip mounted on the back of the elliptical microwave lens. Each chip comprises a quasi-optical SIS mixer integrated with a superconducting flux-flow oscillator (FF

  9. A Neuron- and a Synapse Chip for Artificial Neural Networks

    OpenAIRE

    Lansner, John; Lehmann, Torsten

    1992-01-01

    A cascadable, analog, CMOS chip set has been developed for hardware implementations of artificial neural networks (ANN's):I) a neuron chip containing an array of neurons with hyperbolic tangent activation functions and adjustable gains, and II) a synapse chip (or a matrix-vector multiplier) where the matrix is stored on-chip as differential voltages on capacitors. In principal any ANN configuration can be made using these chips. A neuron array of 4 neurons and a 4 × 4 matrix-vector multiplie...

  10. Multi-channel detector readout method and integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

    2004-05-18

    An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

  11. Multi-channel detector readout method and integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

    2006-12-12

    An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

  12. First implementation of the MEPHISTO binary readout architecture for strip detectors

    Science.gov (United States)

    Fischer, P.

    2001-04-01

    Today's front-end readout chips for multi-channel silicon strip detectors use pipeline-like structures for temporary storage of hit information until arrival of a trigger signal. This approach leads to large-area chips when long trigger latencies are necessary. The MEPHISTO architecture uses a different concept. Hit strips are identified in real time and only the relevant binary hit information is stored in FIFOs. For the typical occupancies in LHC detectors of ≈1 hit per clock cycle this architecture requires less than half the chip area of a typical binary pipeline. This reduces the system cost considerably. At a lower data rate, operation with very long trigger latencies or even without any trigger is possible due to the real-time data sparsification. The Mephisto II architecture is presented and the expected performance is discussed.

  13. First implementation of the MEPHISTO binary readout architecture for strip detectors

    Energy Technology Data Exchange (ETDEWEB)

    Fischer, P. E-mail: fischerp@physik.uni-bonn.de

    2001-04-01

    Today's front-end readout chips for multi-channel silicon strip detectors use pipeline-like structures for temporary storage of hit information until arrival of a trigger signal. This approach leads to large-area chips when long trigger latencies are necessary. The MEPHISTO architecture uses a different concept. Hit strips are identified in real time and only the relevant binary hit information is stored in FIFOs. For the typical occupancies in LHC detectors of {approx}1 hit per clock cycle this architecture requires less than half the chip area of a typical binary pipeline. This reduces the system cost considerably. At a lower data rate, operation with very long trigger latencies or even without any trigger is possible due to the real-time data sparsification. The Mephisto II architecture is presented and the expected performance is discussed.

  14. First implementation of the MEPHISTO binary readout architecture for strip detectors

    CERN Document Server

    Fischer, P

    2001-01-01

    Today's front-end readout chips for multi-channel silicon strip detectors use pipeline-like structures for temporary storage of hit information until arrival of a trigger signal. This approach leads to large-area chips when long trigger latencies are necessary. The MEPHISTO architecture uses a different concept. Hit strips are identified in real time and only the relevant binary hit information is stored in FIFOs. For the typical occupancies in LHC detectors of approximately=1 hit per dock cycle this architecture requires less than half the chip area of a typical binary pipeline. This reduces the system cost considerably. At a lower data rate, operation with very long trigger latencies or even without any trigger is possible due to the real-time data sparsification. The Mephisto II architecture is presented and the expected performance is discussed. (6 refs).

  15. Programmable synaptic chip for electronic neural networks

    Science.gov (United States)

    Moopenn, A.; Langenbacher, H.; Thakoor, A. P.; Khanna, S. K.

    1988-01-01

    A binary synaptic matrix chip has been developed for electronic neural networks. The matrix chip contains a programmable 32X32 array of 'long channel' NMOSFET binary connection elements implemented in a 3-micron bulk CMOS process. Since the neurons are kept off-chip, the synaptic chip serves as a 'cascadable' building block for a multi-chip synaptic network as large as 512X512 in size. As an alternative to the programmable NMOSFET (long channel) connection elements, tailored thin film resistors are deposited, in series with FET switches, on some CMOS test chips, to obtain the weak synaptic connections. Although deposition and patterning of the resistors require additional processing steps, they promise substantial savings in silicon area. The performance of synaptic chip in a 32-neuron breadboard system in an associative memory test application is discussed.

  16. Low Background Signal Readout Electronics for the MAJORANA DEMONSTRATOR

    CERN Document Server

    Guinn, I; Arnquist, I J; Avignone, F T; Baldenegro-Barrera, C X; Barabash, A S; Bertrand, F E; Bradley, A W; Brudanin, V; Busch, M; Buuck, M; Byram, D; Caldwell, A S; Chan, Y-D; Christofferson, C D; Cuesta, C; Detwiler, J A; Efremenko, Yu; Ejiri, H; Elliott, S R; Galindo-Uribarri, A; Gilliss, T; Giovanetti, G K; Goett, J; Green, M P; Gruszko, J; Guiseppe, V E; Henning, R; Hoppe, E W; Howard, S; Howe, M A; Jasinski, B R; Keeter, K J; Kidd, M F; Konovalov, S I; Kouzes, R T; LaFerriere, B D; Leon, J; MacMullin, J; Martin, R D; Meijer, S J; Mertens, S; Orrell, J L; O'Shaughnessy, C; Poon, A W P; Radford, D C; Rager, J; Rielage, K; Robertson, R G H; Romero-Romero, E; Shanks, B; Shirchenko, M; Snyder, N; Suriano, A M; Tedeschi, D; Trimble, J E; Varner, R L; Vasilyev, S; Vetter, K; Vorren, K; White, B R; Wilkerson, J F; Wiseman, C; Xu, W; Yakushev, E; Yu, C -H; Yumatov, V; Zhitnikov, I

    2015-01-01

    The MAJORANA Collaboration will seek neutrinoless double beta decay (0nbb) in 76Ge using isotopically enriched p-type point contact (PPC) high purity Germanium (HPGe) detectors. A tonne-scale array of HPGe detectors would require background levels below 1 count/ROI-tonne-year in the 4 keV region of interest (ROI) around the 2039 keV Q-value of the decay. In order to demonstrate the feasibility of such an experiment, the MAJORANA DEMONSTRATOR, a 40 kg HPGe detector array, is being constructed with a background goal of <3 counts/ROI-tonne-year, which is expected to scale down to <1 count/ROI-tonne-year for a tonne-scale experiment. The signal readout electronics, which must be placed in close proximity to the detectors, present a challenge toward reaching this background goal. This talk will discuss the materials and design used to construct signal readout electronics with low enough backgrounds for the MAJORANA DEMONSTRATOR.

  17. Low Background Signal Readout Electronics for the Majorana Demonstrator

    Energy Technology Data Exchange (ETDEWEB)

    Guinn, Ian [University of Washington; Rielage, Keith Robert [Los Alamos National Laboratory; Elliott, Steven Ray [Los Alamos National Laboratory; Xu, Wenqin [Los Alamos National Laboratory; Goett, John Jerome III [Los Alamos National Laboratory

    2015-06-11

    The MAJORANA Collaboration will seek neutrinoless double beta decay (0νββ) in 76Ge using isotopically enriched p-type point contact (PPC) high purity Germanium (HPGe) detectors. A tonne-scale array of HPGe detectors would require background levels below 1 count/ROI-tonne-year in the 4 keV region of interest (ROI) around the 2039 keV Q-value of the decay. In order to demonstrate the feasibility of such an experiment, the MAJORANA DEMONSTRATOR, a 40 kg HPGe detector array, is being constructed. The DEMONSTRATOR has a background goal of < 3 counts/ROI-tonne-year, which is expected to scale down to < 1 count/ROI-tonne-year for a one tonne experiment. The signal readout electronics, which must be placed in close proximity to the detectors, present a challenge toward reaching this background goal. This paper discusses the materials and design used to construct signal readout electronics with low enough backgrounds for the MAJORANA DEMONSTRATOR.

  18. Massively Parallel Atomic Force Microscope with Digital Holographic Readout

    International Nuclear Information System (INIS)

    Massively Parallel Scanning Probe Microscopy is an obvious path for data storage (E Grochowski, R F Hoyt, Future Trends in Hard disc Drives, IEEE Trans. Magn. 1996, 32, 1850- 1854; J L Griffin, S W Schlosser, G R Ganger and D F Nagle, Modeling and Performance of MEMS-Based Storage Devices, Proc. ACM SIGMETRICS, 2000). Current experimental systems still lay far behind Hard Disc Drive (HDD) or Digital Video Disk (DVD), be it in access speed, data throughput, storage density or cost per bit. This paper presents an entirely new approach with the promise to break several of these barriers. The key idea is readout of a Scanning Probes Microscope (SPM) array by Digital Holographic Microscopy (DHM). This technology directly gives phase information at each pixel of a CCD array. This means that no contact line to each individual SPM probes is needed. The data is directly available in parallel form. Moreover, the optical setup needs in principle no expensive components, optical (or, to a large extent, mechanical) imperfections being compensated in the signal processing, i.e. in electronics. This gives the system the potential for a low cost device with fast Terabit readout capability

  19. Radiation Mitigation Methods for Advanced Readout Array Project

    Data.gov (United States)

    National Aeronautics and Space Administration — NASA is interested in the development of advanced instruments and instrument components for planetary science missions. Specifically, an area of importance in...

  20. Calcinated gold nanoparticle arrays for on-chip, multiplexed and matrix-free mass spectrometric analysis of peptides and small molecules

    Science.gov (United States)

    Hinman, Samuel S.; Chen, Chih-Yuan; Duan, Jicheng; Cheng, Quan

    2016-01-01

    A patterned gold nanoparticle microarray, functionalized with a nanoscale silicate coating, has been developed for on-chip, high-throughput mass spectrometric analyses of biomolecules with minimal sample preparation and reagent costs. Fabrication was realized by the combination of layer-by-layer functionalization of the nanoparticles with suitable polyelectrolytes, followed by fluidic patterning of the glass microarray support and calcination for permanent fixation of the nano-coating. Performance of the microarray was evaluated for surface-assisted laser-desorption/ionization mass spectrometry (SALDI-MS), where the nano-silicate coating was found to enhance SALDI efficiency, resulting in comparable performance to some common organic matrices for small and medium sized molecules. Performance contributing factors of this material have been discussed; heat confinement and interband transition/plasmonic resonance may play important roles. Taking the accessibility of fabrication, performance, and reusability of this substrate together, the material developed here provides a new tool for multiplexed and chip-based mass spectrometric analysis.A patterned gold nanoparticle microarray, functionalized with a nanoscale silicate coating, has been developed for on-chip, high-throughput mass spectrometric analyses of biomolecules with minimal sample preparation and reagent costs. Fabrication was realized by the combination of layer-by-layer functionalization of the nanoparticles with suitable polyelectrolytes, followed by fluidic patterning of the glass microarray support and calcination for permanent fixation of the nano-coating. Performance of the microarray was evaluated for surface-assisted laser-desorption/ionization mass spectrometry (SALDI-MS), where the nano-silicate coating was found to enhance SALDI efficiency, resulting in comparable performance to some common organic matrices for small and medium sized molecules. Performance contributing factors of this material

  1. A 16 × 16 CMOS Capacitive Biosensor Array Towards Detection of Single Bacterial Cell.

    Science.gov (United States)

    Couniot, Numa; Francis, Laurent A; Flandre, Denis

    2016-04-01

    We present a 16 × 16 CMOS biosensor array aiming at impedance detection of whole-cell bacteria. Each 14 μm × 16 μm pixel comprises high-sensitive passivated microelectrodes connected to an innovative readout interface based on charge sharing principle for capacitance-to-voltage conversion and subthreshold gain stage to boost the sensitivity. Fabricated in a 0.25 μm CMOS process, the capacitive array was experimentally shown to perform accurate dielectric measurements of the electrolyte up to electrical conductivities of 0.05 S/m, with maximal sensitivity of 55 mV/fF and signal-to-noise ratio (SNR) of 37 dB. As biosensing proof of concept, real-time detection of Staphylococcus epidermidis binding events was experimentally demonstrated and provides detection limit of ca. 7 bacteria per pixel and sensitivity of 2.18 mV per bacterial cell. Models and simulations show good matching with experimental results and provide a comprehensive analysis of the sensor and circuit system. Advantages, challenges and limits of the proposed capacitive biosensor array are finally described with regards to literature. With its small area and low power consumption, the present capacitive array is particularly suitable for portable point-of-care (PoC) diagnosis tools and lab-on-chip (LoC) systems. PMID:25974947

  2. On-chip grating coupler array on the SOI platform for fan-in/fan-out of MCFs with low insertion loss and crosstalk

    DEFF Research Database (Denmark)

    Ding, Yunhong; Ye, Feihong; Peucheret, Christophe;

    2015-01-01

    We report the design and fabrication of a compact multi-core fiber fan-in/fan-out using a grating coupler array on the SOI platform. The grating couplers are fully-etched, enabling the whole circuit to be fabricated in a single lithography and etching step. Thanks to the apodized design for the g......We report the design and fabrication of a compact multi-core fiber fan-in/fan-out using a grating coupler array on the SOI platform. The grating couplers are fully-etched, enabling the whole circuit to be fabricated in a single lithography and etching step. Thanks to the apodized design...

  3. The read-out ASIC for the Space NUCLEON project

    International Nuclear Information System (INIS)

    This paper summarizes the design results for the read-out ASIC for the space NUCLEON project of the Russian Federal Space Agency ROSCOSMOS. The ASIC with a unique high dynamic range (1–40 000 mip) at low power consumption (< 1.5 mW per channel) has been developed. It allows to record signals of relativistic particles and nuclei with charges from Z = 1 up to Z > 50, generated by silicon detectors, having capacitances up to 100 pF. The chip structure includes 32 analog channels, each consisting of a charge sensitive amplifier (CSA) with a p-MOS input transistor (W = 8 mm, L = 0.5 μ m), a shaper (peaking time of 2 us) and a T and H circuit. The ASIC showed a 120 pC dynamic range at a SNR of 2.5 for the particles with minimal ionization energy (1 mip). The chip was fabricated by the 0.35 um CMOS process via Europractice and tested both at lab conditions and in the SPS beam at CERN

  4. A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications

    OpenAIRE

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

    2015-01-01

    We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to dig...

  5. Compact pulse width modulation circuitry for silicon photomultiplier readout.

    Science.gov (United States)

    Bieniosek, M F; Olcott, P D; Levin, C S

    2013-08-01

    The adoption of solid-state photodetectors for positron emission tomography (PET) system design and the interest in 3D interaction information from PET detectors has lead to an increasing number of readout channels in PET systems. To handle these additional readout channels, PET readout electronics should be simplified to reduce the power consumption, cost, and size of the electronics for a single channel. Pulse-width modulation (PWM), where detector pulses are converted to digital pulses with width proportional to the detected photon energy, promises to simplify PET readout by converting the signals to digital form at the beginning of the processing chain, and allowing a single time-to-digital converter to perform the data acquisition for many channels rather than routing many analogue channels and digitizing in the back end. Integrator based PWM systems, also known as charge-to-time converters (QTCs), are especially compact, reducing the front-end electronics to an op-amp integrator with a resistor discharge, and a comparator. QTCs, however, have a long dead-time during which dark count noise is integrated, reducing the output signal-to-noise ratio. This work presents a QTC based PWM circuit with a gated integrator that shows performance improvements over existing QTC based PWM. By opening and closing an analogue switch on the input of the integrator, the circuit can be controlled to integrate only the portions of the signal with a high signal-to-noise ratio. It also allows for multiplexing different detectors into the same PWM circuit while avoiding uncorrelated noise propagation between photodetector channels. Four gated integrator PWM circuits were built to readout the spatial channels of two position sensitive solid-state photomultiplier (PS-SSPM). Results show a 4 × 4 array 0.9 mm × 0.9 mm × 15 mm of LYSO crystals being identified on the 5 mm × 5 mm PS-SSPM at room temperature with no degradation for twofold multiplexing. In principle, much larger

  6. 60 GHz wireless data transfer for tracker readout systems—first studies and results

    Science.gov (United States)

    Dittmeier, S.; Berger, N.; Schöning, A.; Soltveit, H. K.; Wiedner, D.

    2014-11-01

    To allow highly granular trackers to contribute to first level trigger decisions or event filtering, a fast readout system with very high bandwidth is required. Space, power and material constraints, however, pose severe limitations on the maximum available bandwidth of electrical or optical data transfers. A new approach for the implementation of a fast readout system is the application of a wireless data transfer at a carrier frequency of 60 GHz. The available bandwidth of several GHz allows for data rates of multiple Gbps per link. 60 GHz transceiver chips can be produced with a small form factor and a high integration level. A prototype transceiver currently under development at the University of Heidelberg is briefly described in this paper. To allow easy and fast future testing of the chip's functionality, a bit error rate test has been developed with a commercially available transceiver. Crosstalk might be a big issue for a wireless readout system with many links in a tracking detector. Direct crosstalk can be avoided by using directive antennas, linearly polarized waves and frequency channeling. Reflections from tracking modules can be reduced by applying an absorbing material like graphite foam. Properties of different materials typically used in tracking detectors and graphite foam in the 60 GHz frequency range are presented. For data transmission tests, links using commercially available 60 GHz transmitters and receivers are used. Studies regarding crosstalk and the applicability of graphite foam, Kapton horn antennas and polarized waves are shown.

  7. Low noise - low power monolithic multiplexing readout electronics for silicon strip detectors

    International Nuclear Information System (INIS)

    A 128 channel readout chip suitable for readout with 50 μm pitch has been developed in CMOS technology. It provides signal amplification, parallel data storage and serial readout. Switched capacitor technique is used for noise reduction by multi correlated sampling and simultaneously for second stage amplification. Power consumption is controlled by an externally applied reference voltage thereby allowing for an optimization of speed and noise versus power consumption for the individual needs of the particular experiment. Pulsed mode operation for further reduction of heat dissipation is easily possible without cutting the supply voltages. Very good noise performance (250+45.CD[pF] electrons) low input impedance (Ceff > 200 pF) and large amplification (70 mV/fC) have been obtained at very low power consumption (1.6 mW per channel). The chip may be used for both synchronous (e.g. collider) and asynchronous (fixed target) applications where the time of the event is not known in advance. A second version with only 64 channels suitable for 100 μm pitch is in preparation. Further developments presently under way include the introduction of combined CMOS-JFET technology. (orig.)

  8. 60 GHz wireless data transfer for tracker readout systems—first studies and results

    International Nuclear Information System (INIS)

    To allow highly granular trackers to contribute to first level trigger decisions or event filtering, a fast readout system with very high bandwidth is required. Space, power and material constraints, however, pose severe limitations on the maximum available bandwidth of electrical or optical data transfers. A new approach for the implementation of a fast readout system is the application of a wireless data transfer at a carrier frequency of 60 GHz. The available bandwidth of several GHz allows for data rates of multiple Gbps per link. 60 GHz transceiver chips can be produced with a small form factor and a high integration level. A prototype transceiver currently under development at the University of Heidelberg is briefly described in this paper. To allow easy and fast future testing of the chip's functionality, a bit error rate test has been developed with a commercially available transceiver. Crosstalk might be a big issue for a wireless readout system with many links in a tracking detector. Direct crosstalk can be avoided by using directive antennas, linearly polarized waves and frequency channeling. Reflections from tracking modules can be reduced by applying an absorbing material like graphite foam. Properties of different materials typically used in tracking detectors and graphite foam in the 60 GHz frequency range are presented. For data transmission tests, links using commercially available 60 GHz transmitters and receivers are used. Studies regarding crosstalk and the applicability of graphite foam, Kapton horn antennas and polarized waves are shown

  9. Development and Commissioning of HARDROC based Readout for INO-ICAL Experiment

    CERN Document Server

    Kumar, Ashok; Phogat, Aman; Rafik, Md; Naimuddin, Md

    2016-01-01

    The Glass Resistive Plate Chambers (RPC) detectors are going to be used as an active element in the Iron calorimeter (ICAL) experiment at India-Based Neutrino Observatory (INO), which is constructed for studying atmospheric neutrinos. Though the RPC detector operational parameters are more or less in the final stage of being finalised, the readout electronics is still being developed using various technologies. The ICAL experiment will consist of about 29,000 RPC detectors of 2 m $\\times$ 2 m in size with each detector having 64 readout channels each in X and Y direction. The present study focusses on one of the possible multichannel readout system based upon SiGe 350 nm technology as an option for the INO-ICAL RPC detectors. The study includes integration and usage of 64 channels front end ASIC HARDROC chip in which 64 channels are handled independently to perform zero suppression. We will present the first testbench results using the HARDROC chip for their ultimate usage in INO-ICAL.

  10. Electronics and readout of a large area silicon detector for LHC

    Energy Technology Data Exchange (ETDEWEB)

    Borer, K.; Munday, D.J.; Parker, M.A.; Anghinolfi, F.; Aspell, P.; Campbell, M.; Chilingarov, A.; Jarron, P.; Heijne, E.H.M.; Santiard, J.C.; Scampoli, P.; Verweij, H.; Goessling, C.; Lisowski, B.; Reichold, A.; Spiwoks, R.; Tsesmelis, E.; Benslama, K.; Bonino, R.; Clark, A.G.; Couyoumtzelis, C.; Kambara, H.; Wu, X.; Fretwurst, E.; Lindstroem, G.; Schultz, T.; Bardos, R.A.; Gorfine, G.W.; Moorhead, G.F.; Taylor, G.N.; Tovey, S.N.; Bibby, J.H.; Hawkings, R.J.; Kundu, N.; Weidberg, A.; Campbell, D.; Murray, P.; Seller, P.; Teiger, J. (Univ. of Bern (Switzerland) Cavendish Lab., Univ. of Cambridge (United Kingdom) CERN, Geneva (Switzerland) Inst. fuer Physik, Univ. Dortmund (Germany) DPNC, Geneva Univ. (Switzerland) 1. Inst. fur Experimentalphysik, Hamburg (Germany) School of Physics, Univ. of Melbourne, Parkville, VIC (Australia) Dept. of Nuclear Physics, Oxford Univ. (United Kingdom) Rutherford Appleton Lab., Chilton, Didcot (United Kingdom) Centre d' Etudes Nucleaires de Saclay, 91 Gif

    1994-04-21

    The purpose of the RD2 project is to evaluate the feasibility of a silicon tracker and/or preshower detector for LHC. Irradiation studies with doses equivalent to those expected at LHC have been performed to determine the behavior of operational parameters such as leakage current, depletion voltage and charge collection during the life of the detector. The development of fast, dense, low power and low cost signal processing electronics is one of the major activities of the collaboration. We describe the first fully functional integrated analog memory chip with asynchronous read and write operations and level 1 trigger capture capabilities. A complete test beam system using this analog memory chip at 66 MHz has been successfully operated with RD2 prototype silicon detectors during various test runs. The flexibility of the electronics and readout have allowed us to easily interface our set-up to other data acquisition systems. Mechanical studies are in progress to design a silicon tracking detector with several million channels that may be operated at low (0-10 C) temperature, while maintaining the required geometrical precision. Prototype readout boards for such a detector are being developed and simulation studies are being performed to optimize the readout architecture. (orig.)

  11. Development of pixel readout integrated circuits for extreme rate and radiation

    CERN Multimedia

    Marconi, S; Loddo, F; Liberali, V; Rizzi, A; Bellazzini, R; Re, V; Minuti, M; Pangaud, P; Barbero, M B; Le dortz, O; Pacher, L; Hessey, N P; Kluit, R; Hinchliffe, I; Giubilato, P; Faccio, F; Pernegger, H; Krueger, H; Gensolen, F D; Vrba, V; Prydderch, M L; Bilei, G M; Da rocha rolo, M D; Fanucci, L; Grillo, A A; Michelis, S; Huegging, F G; Kishishita, T; Marchiori, G; Christian, D C; Kaestli, H C; Meier, B; Key-charriere, M; Andreazza, A; Traversi, G; De canio, F; Linssen, L; Dannheim, D; Conti, E; Hemperek, T; Menouni, M; Fougeron, D; Genat, J; Bomben, M; Marzocca, C; Demaria, N; Mazza, G; Monteil, E; Van bakel, N A; Palla, F; Grippo, M T; Magazzu, G; Ratti, L; Abbaneo, D; Crescioli, F; Deptuch, G W; Tomasek, L; Neue, G; De robertis, G; Passeri, D; Placidi, P; Gromov, V; Morsani, F; Paccagnella, A; Christiansen, J; Dho, E; Wermes, N; Rymaszewski, P; Rozanov, A; Wang, A; Lipton, R J; Havranek, M; Neviani, A; Karagounis, M; Godiot, S; Calderini, G; Seidel, S C; Horisberger, R P; Garcia-sciveres, M A; Stabile, A; Shojaii, S R; Beccherle, R; Manghisoni, M; Bacchetta, N; Bisello, D

    The present hybrid pixel detectors in operation at the LHC represent a major achievement. They deployed a new technology on an unprecedented scale and their success firmly established pixel tracking as indispensable for future HEP experiments. However, extrapolation of hybrid pixel technology to the HL-LHC presents major challenges on several fronts. We propose a new RD collaboration specifically focused on the development of pixel readout Integrated Circuits (IC). The IC challenges include: smaller pixels to resolve tracks in boosted jets, much higher hit rates (1-2 GHz/cm$^{2}$), unprecedented radiation tolerance (10 MGy), much higher output bandwidth, and large IC format with low power consumption in order to instrument large areas while keeping the material budget low. We propose a collaboration to design the next generation of hybrid pixel readout chips to enable the ATLAS and CMS Phase 2 pixel upgrades. This does not imply that ATLAS and CMS must use the same exact pixel readout chip, as most of the dev...

  12. On-chip grating coupler array on the SOI platform for fan-in/fan-out of MCFs with low insertion loss and crosstalk

    DEFF Research Database (Denmark)

    Ding, Yunhong; Ye, Feihong; Peucheret, Christophe;

    2015-01-01

    We report the design and fabrication of a compact multi-core fiber fan-in/fan-out using a grating coupler array on the SOI platform. The grating couplers are fully-etched, enabling the whole circuit to be fabricated in a single lithography and etching step. Thanks to the apodized design...

  13. Superconductor Microwave Kinetic Inductance Detectors: System Model of the Readout Electronics

    Directory of Open Access Journals (Sweden)

    F. Alimenti

    2009-06-01

    Full Text Available This paper deals with the readout electronics needed by superconductor Microwave Kinetic Inductance Detectors (MKIDs. MKIDs are typically implemented in the form of cryogenic-cooled high quality factor microwave resonator. The natural frequency of these resonators changes as a millimeter or sub-millimeter wave radiation impinges on the resonator itself. A quantitative system model of the readout electronics (very similar to that of a vector network analyzer has been implemented under ADS environment and tested by several simulation experiments. The developed model is a tool to further optimize the readout electronic and to design the frequency allocation of parallel-connected MKIDs resonators. The applications of MKIDs will be in microwave and millimeter-wave radiometric imaging as well as in radio-astronomy focal plane arrays.

  14. Development of a new photo-detector readout technique for PET and CT imaging

    CERN Document Server

    Powolny, François; Auffray, Etiennette; Dosanjh, Manjit; Jarron, Pierre; Kaplon, Jan; Lecoq, Paul; Meyer, T C; Trummer, Julia; Velitchko, Sandra

    2007-01-01

    In the framework of the European FP6's BioCare project, we develop a novel photo-detector readout technique to increase sensitivity and timing precision for molecular imaging in Positron Emission Tomography (PET) and Computer Tomography (CT). Within the Project's work packages, the CERN-BioCare group focuses on the development of a PET detection head suitable to process data from both PET and CT operation in one unit. The detector module consists of a LSO matrix coupled to an APD array. The signal is processed by a fast and low noise readout electronics recently developed for experiments at the Large Hadron Collider (LHC) at CERN. The functioning of the individual system components and the performance of the entire readout channel are presented.

  15. Evaluation of charge-integrating amplifier with silicon MOSFETs for cryogenic readout

    Science.gov (United States)

    Noda, Manabu; Shibai, Hiroshi; Watabe, Toyoki; Hirao, Takanori; Yoda, Hiroyuki; Nagata, Hirohisa; Nakagawa, Takao; Kawada, Mitsunobu

    1998-08-01

    Low-noise and low-power cryogenic readout electronics are developed for a focal plane instrument of the IR Imaging Surveyor. We measured the static characteristics and the noise spectra of several types of silicon MOSFETs at the cryogenic temperature where silicon JFETs do not work well due to the carrier freeze-out. The 'kink' behavior of n- channel MOSFETs was observed below the carrier freeze-out temperature, but it was not obvious for the p-channel MOSFET. It was demonstrated the p-channel MOSFETs can be used for the cryogenic readout electronics of the IRIS's far-IR array with an acceptable performance. The amplifier integrated with these MOSFETs showed low-noise at 2K under a low power consumption of 1 (mu) W per MOSFET. We now design and evaluate several circuits that are fabricated by the CMOS process for cryogenic readout.

  16. Low power readout electronics for a UV MCP detector with cross strip anode

    Science.gov (United States)

    Pfeifer, M.; Diebold, S.; Barnstedt, J.; Hermanutz, S.; Kalkuhl, C.; Kappelmann, N.; Schanz, T.; Werner, K.

    2014-03-01

    After the shutdown of the Hubble Space Telescope in a few years, new astronomical missions for the ultraviolet (UV) wavelength range between 91 and 300 nm with improved optics and detectors will be necessary. This fact drives our development of solar blind photon counting microchannel plate (MCP) UV detectors with high quantum efficiency, high spatial resolution, and low power readout electronics. We plan to use a cross-strip anode (XSA), which has a high spatial resolution and additionally allows a low gain operation of the MCPs which leads to an increased lifetime of the MCPs compared to detectors with other anode types. The main difficulty in implementing an XSA in a detector for space applications is the need for a (pre-) amplifier, a shaper, and an ADC for each of the strips, which means large power consumption and spatial requirements. The solution we are studying is the application of the so-called Beetle chip. This allows for an implementation of a readout electronics for an XSA with a power consumption of less then 10 W. For the tests of our readout electronics prototype, and for the burn-in of the MCPs, we recently finished a setup in a vacuum chamber that is similar to the configuration in the final detector. We present a brief overview of our detector design and details of the readout electronics setup as well as details of the setup in our vacuum chamber.

  17. Front-end electronics and readout system for the ILD TPC

    CERN Document Server

    Hedberg, V; Lundberg, B; Mjörnmark, U; Oskarsson, A; Österman, L; De Lentdecker, G; Yang, Y; Zhang, F

    2015-01-01

    A high resolution TPC is the main option for a central tracking detector at the future International Linear Collider (ILC). It is planned that the MPGD (Micro Pattern Gas Detector) technology will be used for the readout. A Large Prototype TPC at DESY has been used to test the performance of MPGDs in an electron beam of energies up to 6 GeV. The first step in the technology development was to demonstrate that the MPGDs are able to achieve the necessary performance set by the goals of ILC. For this ’proof of principle’ phase, the ALTRO front-end electronics from the ALICE TPC was used, modified to adapt to MPGD readout. The proof of principle has been verified and at present further improvement of the MPGD technology is going on, using the same readout electronics. The next step is the ’feasibility phase’, which aims at producing front-end electronics comparable in size (few mm2) to the readout pads of the TPC. This development work is based on the succeeding SALTRO16 chip, which combines the analogue ...

  18. A zirconium dioxide ammonia microsensor integrated with a readout circuit manufactured using the 0.18 μm CMOS process.

    Science.gov (United States)

    Lin, Guan-Ming; Dai, Ching-Liang; Yang, Ming-Zhi

    2013-03-15

    The study presents an ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.18 μm complementary metal oxide semiconductor (CMOS) process. The integrated sensor chip consists of a heater, an ammonia sensor and a readout circuit. The ammonia sensor is constructed by a sensitive film and the interdigitated electrodes. The sensitive film is zirconium dioxide that is coated on the interdigitated electrodes. The heater is used to provide a working temperature to the sensitive film. A post-process is employed to remove the sacrificial layer and to coat zirconium dioxide on the sensor. When the sensitive film adsorbs or desorbs ammonia gas, the sensor produces a change in resistance. The readout circuit converts the resistance variation of the sensor into the output voltage. The experiments show that the integrated ammonia sensor has a sensitivity of 4.1 mV/ppm.

  19. 5A Zirconium Dioxide Ammonia Microsensor Integrated with a Readout Circuit Manufactured Using the 0.18 μm CMOS Process

    Science.gov (United States)

    Lin, Guan-Ming; Dai, Ching-Liang; Yang, Ming-Zhi

    2013-01-01

    The study presents an ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.18 μm complementary metal oxide semiconductor (CMOS) process. The integrated sensor chip consists of a heater, an ammonia sensor and a readout circuit. The ammonia sensor is constructed by a sensitive film and the interdigitated electrodes. The sensitive film is zirconium dioxide that is coated on the interdigitated electrodes. The heater is used to provide a working temperature to the sensitive film. A post-process is employed to remove the sacrificial layer and to coat zirconium dioxide on the sensor. When the sensitive film adsorbs or desorbs ammonia gas, the sensor produces a change in resistance. The readout circuit converts the resistance variation of the sensor into the output voltage. The experiments show that the integrated ammonia sensor has a sensitivity of 4.1 mV/ppm. PMID:23503294

  20. A Zirconium Dioxide Ammonia Microsensor Integrated with a Readout Circuit Manufactured Using the 0.18 μm CMOS Process

    Directory of Open Access Journals (Sweden)

    Ming-Zhi Yang

    2013-03-01

    Full Text Available The study presents an ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.18 μm complementary metal oxide semiconductor (CMOS process. The integrated sensor chip consists of a heater, an ammonia sensor and a readout circuit. The ammonia sensor is constructed by a sensitive film and the interdigitated electrodes. The sensitive film is zirconium dioxide that is coated on the interdigitated electrodes. The heater is used to provide a working temperature to the sensitive film. A post-process is employed to remove the sacrificial layer and to coat zirconium dioxide on the sensor. When the sensitive film adsorbs or desorbs ammonia gas, the sensor produces a change in resistance. The readout circuit converts the resistance variation of the sensor into the output voltage. The experiments show that the integrated ammonia sensor has a sensitivity of 4.1 mV/ppm.