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Sample records for area metal-oxide-semiconductor electron

  1. Metal oxide semiconductor thin-film transistors for flexible electronics

    Science.gov (United States)

    Petti, Luisa; Münzenrieder, Niko; Vogt, Christian; Faber, Hendrik; Büthe, Lars; Cantarella, Giuseppe; Bottacchi, Francesca; Anthopoulos, Thomas D.; Tröster, Gerhard

    2016-06-01

    The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This review reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In particular

  2. Modeling of graphene metal-oxide-semiconductor field-effect transistors with gapless large-area graphene channels

    Science.gov (United States)

    Thiele, S. A.; Schaefer, J. A.; Schwierz, F.

    2010-05-01

    A quasianalytical modeling approach for graphene metal-oxide-semiconductor field-effect transistors (MOSFETs) with gapless large-area graphene channels is presented. The model allows the calculation of the I-V characteristics, the small-signal behavior, and the cutoff frequency of graphene MOSFETs. It applies a correct formulation of the density of states in large-area graphene to calculate the carrier-density-dependent quantum capacitance, a steady-state velocity-field characteristics with soft saturation to describe the carrier transport, and takes the source/drain series resistances into account. The modeled drain currents and transconductances show very good agreement with experimental data taken from the literature {Meric et al., [Nat. Nanotechnol. 3, 654 (2008)] and Kedzierski et al., [IEEE Electron Device Lett. 30, 745 (2009)]}. In particular, the model properly reproduces the peculiar saturation behavior of graphene MOSFETs with gapless channels.

  3. Performance of La2O3/InAlN/GaN metal-oxide-semiconductor high electron mobility transistors

    Institute of Scientific and Technical Information of China (English)

    Feng Qian; Li Qian; Xing Tao; Wang Qiang; Zhang Jin-Cheng; Hao Yue

    2012-01-01

    We report on the performance of La2O3/InAlN/GaN metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs) and InAlN/GaN high electron mobility transistors (HEMTs).The MOSHEMT presents a maximum drain current of 961 mA/mm at Vgs =4 V and a maximum transconductance of 130 mS/mm compared with 710 mA/mm at Vgs =1 V and 131 mS/mm for the HEMT device,while the gate leakage current in the reverse direction could be reduced by four orders of magnitude.Compared with the HEMT device of a similar geometry,MOSHEMT presents a large gate voltage swing and negligible current collapse.

  4. Ultrasonic fingerprint sensor using a piezoelectric micromachined ultrasonic transducer array integrated with complementary metal oxide semiconductor electronics

    Energy Technology Data Exchange (ETDEWEB)

    Lu, Y.; Fung, S.; Wang, Q.; Horsley, D. A. [Berkeley Sensor and Actuator Center, University of California, Davis, 1 Shields Avenue, Davis, California 95616 (United States); Tang, H.; Boser, B. E. [Berkeley Sensor and Actuator Center, University of California, Berkeley, California 94720 (United States); Tsai, J. M.; Daneman, M. [InvenSense, Inc., 1745 Technology Drive, San Jose, California 95110 (United States)

    2015-06-29

    This paper presents an ultrasonic fingerprint sensor based on a 24 × 8 array of 22 MHz piezoelectric micromachined ultrasonic transducers (PMUTs) with 100 μm pitch, fully integrated with 180 nm complementary metal oxide semiconductor (CMOS) circuitry through eutectic wafer bonding. Each PMUT is directly bonded to a dedicated CMOS receive amplifier, minimizing electrical parasitics and eliminating the need for through-silicon vias. The array frequency response and vibration mode-shape were characterized using laser Doppler vibrometry and verified via finite element method simulation. The array's acoustic output was measured using a hydrophone to be ∼14 kPa with a 28 V input, in reasonable agreement with predication from analytical calculation. Pulse-echo imaging of a 1D steel grating is demonstrated using electronic scanning of a 20 × 8 sub-array, resulting in 300 mV maximum received amplitude and 5:1 contrast ratio. Because the small size of this array limits the maximum image size, mechanical scanning was used to image a 2D polydimethylsiloxane fingerprint phantom (10 mm × 8 mm) at a 1.2 mm distance from the array.

  5. Effect of Edge Roughness on Electronic Transport in Graphene Nanoribbon Channel Metal Oxide Semiconductor Field-Effect Transistors

    OpenAIRE

    D Basu; Gilbert, M.J.; Register, L. F.; Macdonald, A. H.; Banerjee, S. K.

    2007-01-01

    Results of quantum mechanical simulations of the influence of edge disorder on transport in graphene nanoribbon metal oxide semiconductor field-effect transistors (MOSFETs) are reported. The addition of edge disorder significantly reduces ON-state currents and increases OFF-state currents, and introduces wide variability across devices. These effects decrease as ribbon widths increase and as edges become smoother. However the bandgap decreases with increasing width, thereby increasing the ban...

  6. Effect of edge roughness on electronic transport in graphene nanoribbon channel metal-oxide-semiconductor field-effect transistors

    Science.gov (United States)

    Basu, D.; Gilbert, M. J.; Register, L. F.; Banerjee, S. K.; MacDonald, A. H.

    2008-01-01

    Results of quantum mechanical simulations of the influence of edge disorder on transport in graphene nanoribbon metal-oxide-semiconductor field-effect transistors (MOSFETs) are reported. The addition of edge disorder significantly reduces ON-state currents and increases OFF-state currents, and introduces wide variability across devices. These effects decrease as ribbon widths increase and as edges become smoother. However, the band gap decreases with increasing width, thereby increasing the band-to-band tunneling mediated subthreshold leakage current even with perfect nanoribbons. These results suggest that without atomically precise edge control during fabrication, MOSFET performance gains through use of graphene will be difficult to achieve in complementary MOS applications.

  7. Real-time, multiplexed electrochemical DNA detection using an active complementary metal-oxide-semiconductor biosensor array with integrated sensor electronics.

    Science.gov (United States)

    Levine, Peter M; Gong, Ping; Levicky, Rastislav; Shepard, Kenneth L

    2009-03-15

    Optical biosensing based on fluorescence detection has arguably become the standard technique for quantifying extents of hybridization between surface-immobilized probes and fluorophore-labeled analyte targets in DNA microarrays. However, electrochemical detection techniques are emerging which could eliminate the need for physically bulky optical instrumentation, enabling the design of portable devices for point-of-care applications. Unlike fluorescence detection, which can function well using a passive substrate (one without integrated electronics), multiplexed electrochemical detection requires an electronically active substrate to analyze each array site and benefits from the addition of integrated electronic instrumentation to further reduce platform size and eliminate the electromagnetic interference that can result from bringing non-amplified signals off chip. We report on an active electrochemical biosensor array, constructed with a standard complementary metal-oxide-semiconductor (CMOS) technology, to perform quantitative DNA hybridization detection on chip using targets conjugated with ferrocene redox labels. A 4 x 4 array of gold working electrodes and integrated potentiostat electronics, consisting of control amplifiers and current-input analog-to-digital converters, on a custom-designed 5 mm x 3 mm CMOS chip drive redox reactions using cyclic voltammetry, sense DNA binding, and transmit digital data off chip for analysis. We demonstrate multiplexed and specific detection of DNA targets as well as real-time monitoring of hybridization, a task that is difficult, if not impossible, with traditional fluorescence-based microarrays.

  8. Design, Construction and Performance Evaluation of a Metal Oxide Semiconductor (MOS Based Machine Olfaction (Electronic Nose for Monitoring of Banana Ripeness

    Directory of Open Access Journals (Sweden)

    A Sanaeifar

    2016-04-01

    Full Text Available Aroma is one of the most important sensory properties of fruits and is particularly sensitive to the changes in fruit compounds. Gases involved in aroma of fruits are produced from the metabolic activities during ripening, harvest, post-harvest and storage stages. Therefore, the emitted aroma of fruits changes during the shelf-life period. The electronic nose (machine olfaction would simulate the human sense of smell to identify and realize the complex aromas by using an array of chemical sensors. In this research, a low cost electronic nose based on six metal oxide semiconductor (MOS sensors were designed, developed and implemented and its ability for monitoring changes in aroma fingerprint during ripening of banana was studied. The main components are used in the e-nose system include sampling system, an array of gas sensors, data acquisition system and an appropriate pattern recognition algorithm. Linear Discriminant Analysis (LDA technique was used for classification of the extracted features of e-nose signals. Based on the results, the classification accuracy of 97/3% was obtained. Results showed the high ability of e-nose for distinguishing between the stages of ripening. It is concluded that the system can be considered as a nondestructive tool for quality control during banana shelf-life.

  9. AlGaN/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistor with Polarized P(VDF-TrFE) Ferroelectric Polymer Gating

    Science.gov (United States)

    Liu, Xinke; Lu, Youming; Yu, Wenjie; Wu, Jing; He, Jiazhu; Tang, Dan; Liu, Zhihong; Somasuntharam, Pannirselvam; Zhu, Deliang; Liu, Wenjun; Cao, Peijiang; Han, Sun; Chen, Shaojun; Seow Tan, Leng

    2015-01-01

    Effect of a polarized P(VDF-TrFE) ferroelectric polymer gating on AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) was investigated. The P(VDF-TrFE) gating in the source/drain access regions of AlGaN/GaN MOS-HEMTs was positively polarized (i.e., partially positively charged hydrogen were aligned to the AlGaN surface) by an applied electric field, resulting in a shift-down of the conduction band at the AlGaN/GaN interface. This increases the 2-dimensional electron gas (2-DEG) density in the source/drain access region of the AlGaN/GaN heterostructure, and thereby reduces the source/drain series resistance. Detailed material characterization of the P(VDF-TrFE) ferroelectric film was also carried out using the atomic force microscopy (AFM), X-ray Diffraction (XRD), and ferroelectric hysteresis loop measurement. PMID:26364872

  10. Explanation of threshold voltage scaling in enhancement-mode InAlN/AlN-GaN metal oxide semiconductor high electron mobility transistors on Si substrates

    Energy Technology Data Exchange (ETDEWEB)

    Alexewicz, A., E-mail: alexander.alexewicz@tuwien.ac.at [Vienna University of Technology, Floragasse 7, 1040 Vienna (Austria); Ostermaier, C.; Henkel, C.; Bethge, O. [Vienna University of Technology, Floragasse 7, 1040 Vienna (Austria); Carlin, J.-F.; Lugani, L.; Grandjean, N. [Ecole Polytechnique Federale de Lausanne, Station 3, 1015 Lausanne (Switzerland); Bertagnolli, E.; Pogany, D.; Strasser, G. [Vienna University of Technology, Floragasse 7, 1040 Vienna (Austria)

    2012-07-31

    We present enhancement-mode GaN high electron mobility transistors on Si substrates with ZrO{sub 2} gate dielectrics of thicknesses t{sub ox} between 10 and 24 nm. The oxide interlayers between the InAlN/AlN barrier and gate metal allow raising the device threshold voltage up to + 2.3 V and reduce gate leakage current to less than 100 nA/mm with a high drain current on/off ratio of 4 orders of magnitude. We use a model that explains the observed linear dependence of the threshold voltage on t{sub ox} and allows determining fixed charges at the oxide/barrier interface. - Highlights: Black-Right-Pointing-Pointer Enhancement-mode InAlN/AlN-GaN high electron mobility transistor (HEMT) Black-Right-Pointing-Pointer Metal oxide semiconductor HEMT with ZrO{sub 2} gate oxide Black-Right-Pointing-Pointer Linear decrease of threshold voltage with increasing gate oxide thickness Black-Right-Pointing-Pointer A model explaining that dependence is presented. Black-Right-Pointing-Pointer This model allows determining fixed charges at the InAlN/ZrO{sub 2} interface.

  11. Atomic Layer Deposition of Gallium Oxide Films as Gate Dielectrics in AlGaN/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistors.

    Science.gov (United States)

    Shih, Huan-Yu; Chu, Fu-Chuan; Das, Atanu; Lee, Chia-Yu; Chen, Ming-Jang; Lin, Ray-Ming

    2016-12-01

    In this study, films of gallium oxide (Ga2O3) were prepared through remote plasma atomic layer deposition (RP-ALD) using triethylgallium and oxygen plasma. The chemical composition and optical properties of the Ga2O3 thin films were investigated; the saturation growth displayed a linear dependence with respect to the number of ALD cycles. These uniform ALD films exhibited excellent uniformity and smooth Ga2O3-GaN interfaces. An ALD Ga2O3 film was then used as the gate dielectric and surface passivation layer in a metal-oxide-semiconductor high-electron-mobility transistor (MOS-HEMT), which exhibited device performance superior to that of a corresponding conventional Schottky gate HEMT. Under similar bias conditions, the gate leakage currents of the MOS-HEMT were two orders of magnitude lower than those of the conventional HEMT, with the power-added efficiency enhanced by up to 9 %. The subthreshold swing and effective interfacial state density of the MOS-HEMT were 78 mV decade(-1) and 3.62 × 10(11) eV(-1) cm(-2), respectively. The direct-current and radio-frequency performances of the MOS-HEMT device were greater than those of the conventional HEMT. In addition, the flicker noise of the MOS-HEMT was lower than that of the conventional HEMT.

  12. Atomic Layer Deposition of Gallium Oxide Films as Gate Dielectrics in AlGaN/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistors

    Science.gov (United States)

    Shih, Huan-Yu; Chu, Fu-Chuan; Das, Atanu; Lee, Chia-Yu; Chen, Ming-Jang; Lin, Ray-Ming

    2016-04-01

    In this study, films of gallium oxide (Ga2O3) were prepared through remote plasma atomic layer deposition (RP-ALD) using triethylgallium and oxygen plasma. The chemical composition and optical properties of the Ga2O3 thin films were investigated; the saturation growth displayed a linear dependence with respect to the number of ALD cycles. These uniform ALD films exhibited excellent uniformity and smooth Ga2O3-GaN interfaces. An ALD Ga2O3 film was then used as the gate dielectric and surface passivation layer in a metal-oxide-semiconductor high-electron-mobility transistor (MOS-HEMT), which exhibited device performance superior to that of a corresponding conventional Schottky gate HEMT. Under similar bias conditions, the gate leakage currents of the MOS-HEMT were two orders of magnitude lower than those of the conventional HEMT, with the power-added efficiency enhanced by up to 9 %. The subthreshold swing and effective interfacial state density of the MOS-HEMT were 78 mV decade-1 and 3.62 × 1011 eV-1 cm-2, respectively. The direct-current and radio-frequency performances of the MOS-HEMT device were greater than those of the conventional HEMT. In addition, the flicker noise of the MOS-HEMT was lower than that of the conventional HEMT.

  13. Anisotropic high-k deposition for gate-last processing of metal-oxide-semiconductor field-effect transistor utilizing electron-cyclotron-resonance plasma sputtering

    Energy Technology Data Exchange (ETDEWEB)

    Kikuchi, Yoshiaki, E-mail: kikuchi.y.ao@m.titech.ac.jp; Gao, Jun; Sano, Takahiro; Ohmi, Shun-ichiro, E-mail: ohmi@ep.titech.ac.jp

    2012-01-31

    A high-k/metal gate structure has been investigated for application to state-of-the-art metal-oxide-semiconductor field-effect transistors. In the high-k/metal gate structure, the 32-nm technology node was realized by using the high-k-last, metal-last integration process. We investigated anisotropic deposition for 3-dimensional gate structures on Si substrates utilizing electron-cyclotron-resonance plasma sputtering to reduce parasitic capacitance. Anisotropic HfN film deposition was realized and the deposition thickness on the side wall was reduced with decreasing sputtering gas pressure, from 0.15 to 0.06 Pa, corresponding to Ar/N{sub 2} flow ratios of 20/1 and 5/1 sccm. The HfSiON gate insulator formed from the anisotropically deposited HfN film showed an equivalent-oxide-thickness of 2.1 nm and a gate leakage of 3.1 Multiplication-Sign 10{sup -6}A/cm{sup 2} at V{sub FB}-1.0. - Highlights: Black-Right-Pointing-Pointer High-k film deposition was controlled by the deposition pressure. Black-Right-Pointing-Pointer The pressure decreases with a reduction of gas flow rate during the high-k film deposition. Black-Right-Pointing-Pointer A flat band voltage shows negative shifts with reduction of gas flow rates. Black-Right-Pointing-Pointer A reason of the flat band voltage shift is an increase in Si-N bonding.

  14. Development of a Silicon Metal-Oxide-Semiconductor-Based Qubit Using Spin Exchange Interactions Alone

    Science.gov (United States)

    2016-03-31

    SECURITY CLASSIFICATION OF: The objective of this project is to implement an electron spin qubit system on a silicon metal-oxide- semiconductor ...Distribution Unlimited UU UU UU UU 31-03-2016 1-Nov-2010 30-Apr-2014 Final Report: Development of a Silicon Metal-Oxide- Semiconductor -Based Qubit Using Spin... Semiconductor -Based Qubit Using Spin Exchange Interactions Alone Report Title The objective of this project is to implement an electron spin qubit system on

  15. Surface potential determination in metal-oxide-semiconductor capacitors

    Science.gov (United States)

    Moragues, J. M.; Ciantar, E.; Jerisian, R.; Sagnes, B.; Oualid, J.

    1994-11-01

    Different methods using the relationship between surface potential Psi(sub S) and gate bias V(sub G) in metal-oxide-semiconductor (MOS) capacitors have been compared. These methods can be applied even if the doping profile is very abrupt and the interface state density very high. The shifts of midgap, flatband, and threshold voltages, observed after Fowler-Nordheim electron injection, and deduced from the various Psi(sub S(V (sub G)) relationships obtained by these different methods, are in good agreement. These shifts give the number of effective oxide trapped charges (N(sub ox)) per unit area and acceptor-like and donor-like interface states (N(sub SS)A and N(sub SS)D) which are created during the electron injection. We reveal that the number of positive charges created in the gate oxide, unlike the number of generated interface states, strongly depends on the position of the post-metallization annealing step in the process. After relaxation of the stressed MOS capacitors, most of the generated positive charges can be attributed, in the MOS capacitors studied, to hydrogen-related species. It seems that the interface states are essentially created by the recombination of holes generated by electron impact.

  16. Physical and electrical characteristics of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with rare earth Er{sub 2}O{sub 3} as a gate dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Lin, Ray-Ming, E-mail: rmlin@mail.cgu.edu.tw; Chu, Fu-Chuan; Das, Atanu; Liao, Sheng-Yu; Chou, Shu-Tsun; Chang, Liann-Be

    2013-10-01

    In this study, the rare earth erbium oxide (Er{sub 2}O{sub 3}) was deposited using an electron beam onto an AlGaN/GaN heterostructure to fabricate metal-oxide-semiconductor high-electron-mobility transistors (MOS–HEMTs) that exhibited device performance superior to that of a conventional HEMT. Under similar bias conditions, the gate leakage currents of these MOS–HEMT devices were four orders of magnitude lower than those of conventional Schottky gate HEMTs. The measured sub-threshold swing (SS) and the effective trap state density (N{sub t}) of the MOS–HEMT were 125 mV/decade and 4.3 × 10{sup 12} cm{sup −2}, respectively. The dielectric constant of the Er{sub 2}O{sub 3} layer in this study was 14, as determined through capacitance–voltage measurements. In addition, the gate–source reverse breakdown voltage increased from –166 V for the conventional HEMT to –196 V for the Er{sub 2}O{sub 3} MOS–HEMT. - Highlights: ► GaN/AlGaN/Er{sub 2}O{sub 3} metal-oxide semiconductor high electron mobility transistor ► Physical and electrical characteristics are presented. ► Electron beam evaporated Er{sub 2}O{sub 3} with excellent surface roughness ► Device exhibits reduced gate leakage current and improved I{sub ON}/I{sub OFF} ratio.

  17. Improved linearity and reliability in GaN metal-oxide-semiconductor high-electron-mobility transistors using nanolaminate La2O3/SiO2 gate dielectric

    Science.gov (United States)

    Hsu, Ching-Hsiang; Shih, Wang-Cheng; Lin, Yueh-Chin; Hsu, Heng-Tung; Hsu, Hisang-Hua; Huang, Yu-Xiang; Lin, Tai-Wei; Wu, Chia-Hsun; Wu, Wen-Hao; Maa, Jer-Shen; Iwai, Hiroshi; Kakushima, Kuniyuki; Chang, Edward Yi

    2016-04-01

    Improved device performance to enable high-linearity power applications has been discussed in this study. We have compared the La2O3/SiO2 AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) with other La2O3-based (La2O3/HfO2, La2O3/CeO2 and single La2O3) MOS-HEMTs. It was found that forming lanthanum silicate films can not only improve the dielectric quality but also can improve the device characteristics. The improved gate insulation, reliability, and linearity of the 8 nm La2O3/SiO2 MOS-HEMT were demonstrated.

  18. Enhanced two dimensional electron gas transport characteristics in Al{sub 2}O{sub 3}/AlInN/GaN metal-oxide-semiconductor high-electron-mobility transistors on Si substrate

    Energy Technology Data Exchange (ETDEWEB)

    Freedsman, J. J., E-mail: freedy54@gmail.com; Watanabe, A.; Urayama, Y. [Research Center for Nano-Devices and Advanced Materials, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466 8555 (Japan); Egawa, T., E-mail: egawa.takashi@nitech.ac.jp [Research Center for Nano-Devices and Advanced Materials, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466 8555 (Japan); Innovation Center for Multi-Business of Nitride Semiconductors, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466 8555 (Japan)

    2015-09-07

    The authors report on Al{sub 2}O{sub 3}/Al{sub 0.85}In{sub 0.15}N/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistor (MOS-HEMT) on Si fabricated by using atomic layer deposited Al{sub 2}O{sub 3} as gate insulator and passivation layer. The MOS-HEMT with the gate length of 2 μm exhibits excellent direct-current (dc) characteristics with a drain current maximum of 1270 mA/mm at a gate bias of 3 V and an off-state breakdown voltage of 180 V for a gate-drain spacing of 4 μm. Also, the 1 μm-gate MOS-HEMT shows good radio-frequency (rf) response such as current gain and maximum oscillation cut-off frequencies of 10 and 34 GHz, respectively. The capacitance-voltage characteristics at 1 MHz revealed significant increase in two-dimensional electron gas (2DEG) density for the MOS-HEMT compared to conventional Schottky barrier HEMTs. Analyses using drain-source conductivity measurements showed improvements in 2DEG transport characteristics for the MOS-HEMT. The enhancements in dc and rf performances of the Al{sub 2}O{sub 3}/Al{sub 0.85}In{sub 0.15}N/GaN MOS-HEMT are attributed to the improvements in 2DEG characteristics.

  19. Investigation of trap states in Al2O3 InAlN/GaN metal-oxide-semiconductor high-electron-mobility transistors

    Science.gov (United States)

    Zhang, Peng; Zhao, Sheng-Lei; Xue, Jun-Shuai; Zhu, Jie-Jie; Ma, Xiao-Hua; Zhang, Jin-Cheng; Hao, Yue

    2015-12-01

    In this paper the trapping effects in Al2O3/In0.17Al0.83N/GaN MOS-HEMT (here, HEMT stands for high electron mobility transistor) are investigated by frequency-dependent capacitance and conductance analysis. The trap states are found at both the Al2O3/InAlN and InAlN/GaN interface. Trap states in InAlN/GaN heterostructure are determined to have mixed de-trapping mechanisms, emission, and tunneling. Part of the electrons captured in the trap states are likely to tunnel into the two-dimensional electron gas (2DEG) channel under serious band bending and stronger electric field peak caused by high Al content in the InAlN barrier, which explains the opposite voltage dependence of time constant and relation between the time constant and energy of the trap states. Project supported by the Program for National Natural Science Foundation of China (Grant Nos. 61404100 and 61306017).

  20. Nanoscale Metal Oxide Semiconductors for Gas Sensing

    Science.gov (United States)

    Hunter, Gary W.; Evans, Laura; Xu, Jennifer C.; VanderWal, Randy L.; Berger, Gordon M.; Kulis, Michael J.

    2011-01-01

    A report describes the fabrication and testing of nanoscale metal oxide semiconductors (MOSs) for gas and chemical sensing. This document examines the relationship between processing approaches and resulting sensor behavior. This is a core question related to a range of applications of nanotechnology and a number of different synthesis methods are discussed: thermal evaporation- condensation (TEC), controlled oxidation, and electrospinning. Advantages and limitations of each technique are listed, providing a processing overview to developers of nanotechnology- based systems. The results of a significant amount of testing and comparison are also described. A comparison is made between SnO2, ZnO, and TiO2 single-crystal nanowires and SnO2 polycrystalline nanofibers for gas sensing. The TECsynthesized single-crystal nanowires offer uniform crystal surfaces, resistance to sintering, and their synthesis may be done apart from the substrate. The TECproduced nanowire response is very low, even at the operating temperature of 200 C. In contrast, the electrospun polycrystalline nanofiber response is high, suggesting that junction potentials are superior to a continuous surface depletion layer as a transduction mechanism for chemisorption. Using a catalyst deposited upon the surface in the form of nanoparticles yields dramatic gains in sensitivity for both nanostructured, one-dimensional forms. For the nanowire materials, the response magnitude and response rate uniformly increase with increasing operating temperature. Such changes are interpreted in terms of accelerated surface diffusional processes, yielding greater access to chemisorbed oxygen species and faster dissociative chemisorption, respectively. Regardless of operating temperature, sensitivity of the nanofibers is a factor of 10 to 100 greater than that of nanowires with the same catalyst for the same test condition. In summary, nanostructure appears critical to governing the reactivity, as measured by electrical

  1. Practical discrimination of good and bad cooked food using metal oxide semiconductor odour sensor

    OpenAIRE

    2013-01-01

    An increasing concentration of ammonia in cooked food is in direct proportion to the extent of decay. This fact is used to design an electronic nose (e-nose) based on metal oxide semiconductor odour sensor circuit capable of discriminating good and bad cooked food. On the basis of the data produced by the e-nose circuit, a feedforward multilayer neural network is designed and trained to recognize varying concentrations of ammonia in the food. Test results o...

  2. Floating substrate luminescence from silicon rich oxide metal-oxide-semiconductor devices

    Energy Technology Data Exchange (ETDEWEB)

    Morales-Sánchez, A., E-mail: alfredo.morales@cimav.edu.mx [Centro de Investigación en Materiales Avanzados S. C., Unidad Monterrey-PIIT, 66600 Apodaca, Nuevo León (Mexico); Domínguez, C. [Instituto de Microelectrónica de Barcelona, IMB-CNM (CSIC). 08193 Barcelona (Spain); Barreto, J. [Nanoscale Physics Research Laboratory, University of Birmingham, Birmingham, B15 2TT (United Kingdom); Aceves-Mijares, M. [INAOE, Electronics Department, Apartado 51, 72000 Puebla (Mexico); Licea-Jiménez, L. [Centro de Investigación en Materiales Avanzados S. C., Unidad Monterrey-PIIT, 66600 Apodaca, Nuevo León (Mexico); Luna-López, J.A.; Carrillo, J. [CIDS-ICUAP. Benemérita Universidad Autónoma de Puebla. 72570 Puebla (Mexico)

    2013-03-01

    The electro-optical properties of metal-oxide-semiconductor devices with embedded Si nanoparticles in silicon-rich (4 at.%) oxide films have been studied. Devices show intense visible continuous luminescence not only in the regular metal-oxide-semiconductor configuration, but when biased via surface electrodes (floating substrate) separated 10 μm. Electroluminescence manifests as extremely bright randomly scattered discrete spots on the gate area or the periphery of the devices depending on the bias direction. The mechanism responsible for the surface-electroluminescence has been related to the recombination of electron–hole pairs injected through enhanced current paths within the silicon-rich oxide film. - Highlights: ► Silicon rich oxide (SRO) based metal-oxide-semiconductor like luminescent devices. ► Electroluminescence (EL) in floating-substrate, horizontal electrodes configuration. ► EL is observed as multiple shining spots with surface electrodes. ► Preferential current paths established in the SRO between several electrodes.

  3. CMOS array design automation techniques. [metal oxide semiconductors

    Science.gov (United States)

    Ramondetta, P.; Feller, A.; Noto, R.; Lombardi, T.

    1975-01-01

    A low cost, quick turnaround technique for generating custom metal oxide semiconductor arrays using the standard cell approach was developed, implemented, tested and validated. Basic cell design topology and guidelines are defined based on an extensive analysis that includes circuit, layout, process, array topology and required performance considerations particularly high circuit speed.

  4. Single-photon imaging in complementary metal oxide semiconductor processes

    NARCIS (Netherlands)

    Charbon, E.

    2014-01-01

    This paper describes the basics of single-photon counting in complementary metal oxide semiconductors, through single-photon avalanche diodes (SPADs), and the making of miniaturized pixels with photon-counting capability based on SPADs. Some applications, which may take advantage of SPAD image senso

  5. High performance high-κ/metal gate complementary metal oxide semiconductor circuit element on flexible silicon

    KAUST Repository

    Sevilla, Galo T.

    2016-02-29

    Thinned silicon based complementary metal oxide semiconductor(CMOS)electronics can be physically flexible. To overcome challenges of limited thinning and damaging of devices originated from back grinding process, we show sequential reactive ion etching of silicon with the assistance from soft polymeric materials to efficiently achieve thinned (40 μm) and flexible (1.5 cm bending radius) silicon based functional CMOSinverters with high-κ/metal gate transistors. Notable advances through this study shows large area of silicon thinning with pre-fabricated high performance elements with ultra-large-scale-integration density (using 90 nm node technology) and then dicing of such large and thinned (seemingly fragile) pieces into smaller pieces using excimer laser. The impact of various mechanical bending and bending cycles show undeterred high performance of flexible siliconCMOSinverters. Future work will include transfer of diced silicon chips to destination site, interconnects, and packaging to obtain fully flexible electronic systems in CMOS compatible way.

  6. Memory effects in metal-oxide-semiconductor capacitors incorporating dispensed highly monodisperse 1 nm silicon nanoparticles

    Science.gov (United States)

    Nayfeh, Osama M.; Antoniadis, Dimitri A.; Mantey, Kevin; Nayfeh, Munir H.

    2007-04-01

    Metal-oxide-semiconductor capacitors containing various densities of ex situ produced, colloidal, highly monodisperse, spherical, 1nm silicon nanoparticles were fabricated and evaluated for potential use as charge storage elements in future nonvolatile memory devices. The capacitance-voltage characteristics are well behaved and agree with similarly fabricated zero-nanoparticle control samples and with an ideal simulation. Unlike larger particle systems, the demonstrated memory effect exhibits effectively pure hole storage. The nature of charging, hole type versus electron type may be understood in terms of the characteristics of ultrasmall silicon nanoparticles: large energy gap, large charging energy, and consequently a small electron affinity.

  7. Metal oxide semiconductors for dye degradation

    Energy Technology Data Exchange (ETDEWEB)

    Adhikari, Sangeeta; Sarkar, Debasish, E-mail: dsarkar@nitrkl.ac.in

    2015-12-15

    Highlights: • Hydrothermal synthesis of monoclinic and hexagonal WO{sub 3} nanostructures. • Nanocuboid and nanofiber growth using different structure directing agents. • WO{sub 3}–ZnO nanocomposites for dye degradation under UV and visible light. • High photocatalytic efficiency is achieved by 10 wt% monoclinic WO{sub 3}. • WO{sub 3} assists to trap hole in UV and arrests electron in visible light irradiation. - Abstract: Organic contaminants are a growing threat to the environment that widely demands their degradation by high efficient photocatalysts. Thus, the proposed research work primely focuses on the efficient degradation of methyl orange using designed WO{sub 3}–ZnO photocatalysts under both UV and visible light irradiation. Two different sets of WO{sub 3} nanostructures namely, monoclinic WO{sub 3} (m-WO{sub 3}) and hexagonal WO{sub 3} (h-WO{sub 3}) synthesizes in presence of a different structure directing agents. A specific dispersion technique allows the intimate contact of as-synthesized WO{sub 3} and ultra-violet active commercial ZnO photocatalyst in different weight variations. ZnO nanocrystal in presence of an optimum 10 wt% m-WO{sub 3} shows a high degree of photocatalytic activity under both UV and visible light irradiation compared to counterpart h-WO{sub 3}. Symmetrical monoclinic WO{sub 3} assists to trap hole in UV, but electron arresting mechanism predominates in visible irradiation. Coupling of monoclinic nanocuboid WO{sub 3} with ZnO proves to be a promising photocatalyst in both wavelengths.

  8. Large area and flexible electronics

    CERN Document Server

    Caironi, Mario

    2015-01-01

    From materials to applications, this ready reference covers the entire value chain from fundamentals via processing right up to devices, presenting different approaches to large-area electronics, thus enabling readers to compare materials, properties and performance.Divided into two parts, the first focuses on the materials used for the electronic functionality, covering organic and inorganic semiconductors, including vacuum and solution-processed metal-oxide semiconductors, nanomembranes and nanocrystals, as well as conductors and insulators. The second part reviews the devices and applicatio

  9. Effect of Oxide Layer in Metal-Oxide-Semiconductor Systems

    Directory of Open Access Journals (Sweden)

    Fan Jung-Chuan

    2016-01-01

    Full Text Available In this work, we investigate the electrical properties of oxide layer in the metal-oxide semiconductor field effect transistor (MOSFET. The thickness of oxide layer is proportional to square root of oxidation time. The feature of oxide layer thickness on the growth time is consistent with the Deal-Grove model effect. From the current-voltage measurement, it is found that the threshold voltages (Vt for MOSFETs with different oxide layer thicknesses are proportional to the square root of the gate-source voltages (Vgs. It is also noted that threshold voltage of MOSFET increases with the thickness of oxide layer. It indicates that the bulk effect of oxide dominates in this MOSFET structure.

  10. GaN Metal Oxide Semiconductor Field Effect Transistors

    Energy Technology Data Exchange (ETDEWEB)

    Ren, F.; Pearton, S.J.; Abernathy, C.R.; Baca, A.; Cheng, P.; Shul, R.J.; Chu, S.N.G.; Hong, M.; Lothian, J.R.; Schurman, M.J.

    1999-03-02

    A GaN based depletion mode metal oxide semiconductor field effect transistor (MOSFET) was demonstrated using Ga{sub 2}O{sub 3}(Gd{sub 2}O{sub 3}) as the gate dielectric. The MOS gate reverse breakdown voltage was > 35V which was significantly improved from 17V of Pt Schottky gate on the same material. A maximum extrinsic transconductance of 15 mS/mm was obtained at V{sub ds} = 30 V and device performance was limited by the contact resistance. A unity current gain cut-off frequency, f{sub {tau}}, and maximum frequency of oscillation, f{sub max} of 3.1 and 10.3 GHz, respectively, were measured at V{sub ds} = 25 V and V{sub gs} = {minus}20 V.

  11. Effective dose assessment in the maxillofacial region using thermoluminescent (TLD) and metal oxide semiconductor field-effect transistor (MOSFET) dosemeters: a comparative study

    NARCIS (Netherlands)

    Koivisto, J.; Schulze, D.; Wolff, J.; Rottke, D.

    2014-01-01

    Objectives: The objective of this study was to compare the performance of metal oxide semiconductor field-effect transistor (MOSFET) technology dosemeters with thermoluminescent dosemeters (TLDs) (TLD 100; Thermo Fisher Scientific, Waltham, MA) in the maxillofacial area. Methods: Organ and effective

  12. High-Performance WSe2 Complementary Metal Oxide Semiconductor Technology and Integrated Circuits.

    Science.gov (United States)

    Yu, Lili; Zubair, Ahmad; Santos, Elton J G; Zhang, Xu; Lin, Yuxuan; Zhang, Yuhao; Palacios, Tomás

    2015-08-12

    Because of their extraordinary structural and electrical properties, two-dimensional materials are currently being pursued for applications such as thin-film transistors and integrated circuit. One of the main challenges that still needs to be overcome for these applications is the fabrication of air-stable transistors with industry-compatible complementary metal oxide semiconductor (CMOS) technology. In this work, we experimentally demonstrate a novel high performance air-stable WSe2 CMOS technology with almost ideal voltage transfer characteristic, full logic swing and high noise margin with different supply voltages. More importantly, the inverter shows large voltage gain (∼38) and small static power (picowatts), paving the way for low power electronic system in 2D materials.

  13. Charge sensed Pauli blockade in a metal-oxide-semiconductor lateral double quantum dot.

    Science.gov (United States)

    Nguyen, Khoi T; Lilly, Michael P; Nielsen, Erik; Bishop, Nathan; Rahman, Rajib; Young, Ralph; Wendt, Joel; Dominguez, Jason; Pluym, Tammy; Stevens, Jeffery; Lu, Tzu-Ming; Muller, Richard; Carroll, Malcolm S

    2013-01-01

    We report Pauli blockade in a multielectron silicon metal-oxide-semiconductor double quantum dot with an integrated charge sensor. The current is rectified up to a blockade energy of 0.18 ± 0.03 meV. The blockade energy is analogous to singlet-triplet splitting in a two electron double quantum dot. Built-in imbalances of tunnel rates in the MOS DQD obfuscate some edges of the bias triangles. A method to extract the bias triangles is described, and a numeric rate-equation simulation is used to understand the effect of tunneling imbalances and finite temperature on charge stability (honeycomb) diagram, in particular the identification of missing and shifting edges. A bound on relaxation time of the triplet-like state is also obtained from this measurement.

  14. New Power Lateral Double Diffused Metal-Oxide-Semiconductor Transistor with a Folded Accumulation Layer

    Institute of Scientific and Technical Information of China (English)

    DUAN Bao-Xing; ZHANG Bo; LI Zhao-Ji

    2007-01-01

    A new lateral double diffused metal oxide semiconductor field effect transistor with a double-charge accumulation layer using a folded silicon substrate is proposed to improve the performance of the breakdown voltage and specific on-resistance. Three kinds of technologies, which are the additional electric field modulation effect, majority carrier accumulation and increasing the effective conduction area, are applied simultaneously by a semi-insulating polycrystalline silicon layer deposited over the top of thin oxide covering the drift region. It is indicated that by the simulator, the ideal silicon limits of the breakdown voltage and specific on-resistance have been broken due to the complete three-dimensional reduced surface field effect and the doubled majority carrier accumulation layer.

  15. Optimal design of an electret microphone metal-oxide-semiconductor field-effect transistor preamplifier.

    Science.gov (United States)

    van der Donk, A G; Bergveld, P

    1992-04-01

    A theoretical noise analysis of the combination of a capacitive microphone and a preamplifier containing a metal-oxide-semiconductor field-effect transistor (MOSFET) and a high-value resistive bias element is given. It is found that the output signal-to-noise ratio for a source follower and for a common-source circuit is almost the same. It is also shown that the output noise can be reduced by making the microphone capacitance as well as the bias resistor as large as possible, and furthermore by keeping the parasitic gate capacitances as low as possible and finally by using an optimum value for the gate area of the MOSFET. The main noise source is the thermal noise of the gate leakage resistance of the MOSFET. It is also shown that short-channel MOSFETs produce more thermal channel noise than longer channel devices.

  16. Models of second-order effects in metal-oxide-semiconductor field-effect transistors for computer applications

    Science.gov (United States)

    Benumof, Reuben; Zoutendyk, John; Coss, James

    1988-01-01

    Second-order effects in metal-oxide-semiconductor field-effect transistors (MOSFETs) are important for devices with dimensions of 2 microns or less. The short and narrow channel effects and drain-induced barrier lowering primarily affect threshold voltage, but formulas for drain current must also take these effects into account. In addition, the drain current is sensitive to channel length modulation due to pinch-off or velocity saturation and is diminished by electron mobility degradation due to normal and lateral electric fields in the channel. A model of a MOSFET including these considerations and emphasizing charge conservation is discussed.

  17. A complementary metal-oxide-semiconductor compatible monocantilever 12-point probe for conductivity measurements on the nanoscale

    OpenAIRE

    Gammelgaard, Lauge; Bøggild, Peter; Wells, J.W.; Handrup, K.; Hofmann, Ph.; Balslev, M.B.; Hansen, J.E.; Petersen, P.R.E

    2008-01-01

    We present a complementary metal-oxide-semiconductor compatible, nanoscale 12-point-probe based on TiW electrodes placed on a SiO2 monocantilever. Probes are mass fabricated on Si wafers by a combination of electron beam and UV lithography, realizing TiW electrode tips with a width down to 250 nm and a probe pitch of 500 nm. In-air four-point measurements have been performed on indium tin oxide, ruthenium, and titanium-tungsten, showing good agreement with values obtained by other four-point ...

  18. Metal oxide semiconductors for dye- and quantum-dot-sensitized solar cells.

    Science.gov (United States)

    Concina, Isabella; Vomiero, Alberto

    2015-04-17

    This Review provides a brief summary of the most recent research developments in the synthesis and application of nanostructured metal oxide semiconductors for dye sensitized and quantum dot sensitized solar cells. In these devices, the wide bandgap semiconducting oxide acts as the photoanode, which provides the scaffold for light harvesters (either dye molecules or quantum dots) and electron collection. For this reason, proper tailoring of the optical and electronic properties of the photoanode can significantly boost the functionalities of the operating device. Optimization of the functional properties relies with modulation of the shape and structure of the photoanode, as well as on application of different materials (TiO2, ZnO, SnO2) and/or composite systems, which allow fine tuning of electronic band structure. This aspect is critical because it determines exciton and charge dynamics in the photoelectrochemical system and is strictly connected to the photoconversion efficiency of the solar cell. The different strategies for increasing light harvesting and charge collection, inhibiting charge losses due to recombination phenomena, are reviewed thoroughly, highlighting the benefits of proper photoanode preparation, and its crucial role in the development of high efficiency dye sensitized and quantum dot sensitized solar cells. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  19. 2007 IEEE Device Research Conference: Tour de Force Multigate and Nanowire Metal Oxide Semiconductor Field-Effect Transistors and Their Application.

    Science.gov (United States)

    Zhang, Pengpeng; Mayer, Theresa S; Jackson, Thomas N

    2007-08-01

    Scaling of the conventional planar complementary metal oxide semiconductor (CMOS) faces many challenges. Top-down fabricated gate-all-around Si nanowire FinFETs, which are compatible with the CMOS processes, offer an opportunity to circumvent these limitations to boost the device scalability and performance. Beyond applications in CMOS technology, the thus fabricated Si nanowire arrays can be explored as biosensors, providing a possible route to multiplexed label-free electronic chips for molecular diagnostics.

  20. Silicon-on-insulator-based complementary metal oxide semiconductor integrated optoelectronic platform for biomedical applications

    Science.gov (United States)

    Mujeeb-U-Rahman, Muhammad; Scherer, Axel

    2016-12-01

    Microscale optical devices enabled by wireless power harvesting and telemetry facilitate manipulation and testing of localized biological environments (e.g., neural recording and stimulation, targeted delivery to cancer cells). Design of integrated microsystems utilizing optical power harvesting and telemetry will enable complex in vivo applications like actuating a single nerve, without the difficult requirement of extreme optical focusing or use of nanoparticles. Silicon-on-insulator (SOI)-based platforms provide a very powerful architecture for such miniaturized platforms as these can be used to fabricate both optoelectronic and microelectronic devices on the same substrate. Near-infrared biomedical optics can be effectively utilized for optical power harvesting to generate optimal results compared with other methods (e.g., RF and acoustic) at submillimeter size scales intended for such designs. We present design and integration techniques of optical power harvesting structures with complementary metal oxide semiconductor platforms using SOI technologies along with monolithically integrated electronics. Such platforms can become the basis of optoelectronic biomedical systems including implants and lab-on-chip systems.

  1. Switching Characteristics of Phase Change Memory Cell Integrated with Metal-Oxide Semiconductor Field Effect Transistor

    Institute of Scientific and Technical Information of China (English)

    XU Cheng; CHEN Bomy; LIU Bo; CHEN Yi-Feng; LIANG Shuang; SONG Zhi-Tang; FENG Song-Lin; WAN Xu-Dong; YANG Zuo-Ya; XIE Joseph

    2008-01-01

    A Ge2Sb2Te5 based phase change memory device cell integrated with metal-oxide semiconductor field effect transistor (MOSFET) is fabricated using standard 0.18 μm complementary metal-oxide semiconductor process technology.It shows steady switching characteristics in the dc current-voltage measurement.The phase changing phenomenon from crystalline state to amorphous state with a voltage pulse altitude of 2.0 V and pulse width of 50 ns is also obtained.These results show the feasibility of integrating phase change memory cell with MOSFET.

  2. Infrared rectification in a nanoantenna-coupled metal-oxide-semiconductor tunnel diode

    Science.gov (United States)

    Davids, Paul S.; Jarecki, Robert L.; Starbuck, Andrew; Burckel, D. Bruce; Kadlec, Emil A.; Ribaudo, Troy; Shaner, Eric A.; Peters, David W.

    2015-12-01

    Direct rectification of electromagnetic radiation is a well-established method for wireless power conversion in the microwave region of the spectrum, for which conversion efficiencies in excess of 84% have been demonstrated. Scaling to the infrared or optical part of the spectrum requires ultrafast rectification that can only be obtained by direct tunnelling. Many research groups have looked to plasmonics to overcome antenna-scaling limits and to increase the confinement. Recently, surface plasmons on heavily doped Si surfaces were investigated as a way of extending surface-mode confinement to the thermal infrared region. Here we combine a nanostructured metallic surface with a heavily doped Si infrared-reflective ground plane designed to confine infrared radiation in an active electronic direct-conversion device. The interplay of strong infrared photon-phonon coupling and electromagnetic confinement in nanoscale devices is demonstrated to have a large impact on ultrafast electronic tunnelling in metal-oxide-semiconductor (MOS) structures. Infrared dispersion of SiO2 near a longitudinal optical (LO) phonon mode gives large transverse-field confinement in a nanometre-scale oxide-tunnel gap as the wavelength-dependent permittivity changes from 1 to 0, which leads to enhanced electromagnetic fields at material interfaces and a rectified displacement current that provides a direct conversion of infrared radiation into electric current. The spectral and electrical signatures of the nanoantenna-coupled tunnel diodes are examined under broadband blackbody and quantum-cascade laser (QCL) illumination. In the region near the LO phonon resonance, we obtained a measured photoresponsivity of 2.7 mA W-1 cm-2 at -0.1 V.

  3. Infrared rectification in a nanoantenna-coupled metal-oxide-semiconductor tunnel diode.

    Science.gov (United States)

    Davids, Paul S; Jarecki, Robert L; Starbuck, Andrew; Burckel, D Bruce; Kadlec, Emil A; Ribaudo, Troy; Shaner, Eric A; Peters, David W

    2015-12-01

    Direct rectification of electromagnetic radiation is a well-established method for wireless power conversion in the microwave region of the spectrum, for which conversion efficiencies in excess of 84% have been demonstrated. Scaling to the infrared or optical part of the spectrum requires ultrafast rectification that can only be obtained by direct tunnelling. Many research groups have looked to plasmonics to overcome antenna-scaling limits and to increase the confinement. Recently, surface plasmons on heavily doped Si surfaces were investigated as a way of extending surface-mode confinement to the thermal infrared region. Here we combine a nanostructured metallic surface with a heavily doped Si infrared-reflective ground plane designed to confine infrared radiation in an active electronic direct-conversion device. The interplay of strong infrared photon-phonon coupling and electromagnetic confinement in nanoscale devices is demonstrated to have a large impact on ultrafast electronic tunnelling in metal-oxide-semiconductor (MOS) structures. Infrared dispersion of SiO2 near a longitudinal optical (LO) phonon mode gives large transverse-field confinement in a nanometre-scale oxide-tunnel gap as the wavelength-dependent permittivity changes from 1 to 0, which leads to enhanced electromagnetic fields at material interfaces and a rectified displacement current that provides a direct conversion of infrared radiation into electric current. The spectral and electrical signatures of the nanoantenna-coupled tunnel diodes are examined under broadband blackbody and quantum-cascade laser (QCL) illumination. In the region near the LO phonon resonance, we obtained a measured photoresponsivity of 2.7 mA W(-1) cm(-2) at -0.1 V.

  4. SOI metal-oxide-semiconductor field-effect transistor photon detector based on single-hole counting.

    Science.gov (United States)

    Du, Wei; Inokawa, Hiroshi; Satoh, Hiroaki; Ono, Atsushi

    2011-08-01

    In this Letter, a scaled-down silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET) is characterized as a photon detector, where photogenerated individual holes are trapped below the negatively biased gate and modulate stepwise the electron current flowing in the bottom channel induced by the positive substrate bias. The output waveforms exhibit clear separation of current levels corresponding to different numbers of trapped holes. Considering this capability of single-hole counting, a small dark count of less than 0.02 s(-1) at room temperature, and low operation voltage of 1 V, SOI MOSFET could be a unique photon-number-resolving detector if the small quantum efficiency were improved.

  5. Quantum-correlated photon pairs generated in a commercial 45nm complementary metal-oxide semiconductor microelectronics chip

    CERN Document Server

    Gentry, Cale M; Wade, Mark W; Stevens, Martin J; Dyer, Shellee D; Zeng, Xiaoge; Pavanello, Fabio; Gerrits, Thomas; Nam, Sae Woo; Mirin, Richard P; Popović, Miloš A

    2015-01-01

    Correlated photon pairs are a fundamental building block of quantum photonic systems. While pair sources have previously been integrated on silicon chips built using customized photonics manufacturing processes, these often take advantage of only a small fraction of the established techniques for microelectronics fabrication and have yet to be integrated in a process which also supports electronics. Here we report the first demonstration of quantum-correlated photon pair generation in a device fabricated in an unmodified advanced (sub-100nm) complementary metal-oxide-semiconductor (CMOS) process, alongside millions of working transistors. The microring resonator photon pair source is formed in the transistor layer structure, with the resonator core formed by the silicon layer typically used for the transistor body. With ultra-low continuous-wave on-chip pump powers ranging from 5 $\\mu$W to 400 $\\mu$W, we demonstrate pair generation rates between 165 Hz and 332 kHz using >80% efficient WSi superconducting nano...

  6. Electron Emission from Ultra-Large Area MOS Electron Emitters

    DEFF Research Database (Denmark)

    Thomsen, Lasse Bjørchmar; Nielsen, Gunver; Vendelbo, Søren Bastholm;

    2009-01-01

    Ultralarge metal-oxide-semiconductor (MOS) devices with an active oxide area of 1 cm2 have been fabricated for use as electron emitters. The MOS structures consist of a Si substrate, a SiO2 tunnel barrier (~5 nm), a Ti wetting layer (3–10 Å), and a Au top layer (5–60 nm). Electron emission from...... layer is varied from 3 to 10 Å which changes the emission efficiency by more than one order of magnitude. The apparent mean free path of ~5 eV electrons in Au is found to be 52 Å. Deposition of Cs on the Au film increased the electron emission efficiency to 4.3% at 4 V by lowering the work function....... Electron emission under high pressures (up to 2 bars) of Ar was observed. ©2009 American Vacuum Society...

  7. Mechanical anomaly impact on metal-oxide-semiconductor capacitors on flexible silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.

    2014-06-09

    We report the impact of mechanical anomaly on high-κ/metal-oxide-semiconductor capacitors built on flexible silicon (100) fabric. The mechanical tests include studying the effect of bending radius up to 5 mm minimum bending radius with respect to breakdown voltage and leakage current of the devices. We also report the effect of continuous mechanical stress on the breakdown voltage over extended periods of times.

  8. Ultralarge area MOS tunnel devices for electron emission

    DEFF Research Database (Denmark)

    Thomsen, Lasse Bjørchmar; Nielsen, Gunver; Vendelbo, Søren Bastholm;

    2007-01-01

    A comparative analysis of metal-oxide-semiconductor (MOS) capacitors by capacitance-voltage (C-V) and current-voltage (I-V) characteristics has been employed to characterize the thickness variations of the oxide on different length scales. Ultralarge area (1 cm(2)) ultrathin (similar to 5 nm oxide......) MOS capacitors have been fabricated to investigate their functionality and the variations in oxide thickness, with the use as future electron emission devices as the goal. I-V characteristics show very low leakage current and excellent agreement to the Fowler-Nordheim expression for the current...

  9. Determination of Fowler-Nordheim tunneling parameters in Metal-Oxide-Semiconductor structure including oxide field correction using a vertical optimization method

    Science.gov (United States)

    Toumi, S.; Ouennoughi, Z.; Strenger, K. C.; Frey, L.

    2016-08-01

    Current conduction mechanisms through a Metal-Oxide-Semiconductor structure are characterized via Fowler-Nordheim (FN) plots. The extraction of the FN parameters like the electron/hole effective mass in oxide mox and in semiconductor msc, the barrier height at the semiconductor-oxide interface ϕB, and the correction oxide voltage Vcorr for a MOS structure is made using a vertical optimization process on the current density without any assumption about ϕB or mox. An excellent agreement is obtained between the FN plots calculated with the FN parameters extracted using a vertical optimization process with the experimental one.

  10. Charge storage properties of InP quantum dots in GaAs metal-oxide-semiconductor based nonvolatile flash memory devices

    Science.gov (United States)

    Kundu, Souvik; Halder, Nripendra N.; Biswas, Pranab; Biswas, D.; Banerji, P.; Mukherjee, Rabibrata; Chakraborty, S.

    2012-11-01

    Metal organic vapor phase epitaxially grown 5 nm InP quantum dots (QDs) were embedded as charge storage elements between high-k control and tunneling dielectric layers in GaAs metal-oxide-semiconductor based nonvolatile memory devices. The QDs trap more electrons resulting in a large memory window (6.3 V) along with low leakage due to Coulomb blockade effect. 16.5% charge loss was found even after 105 s indicating its good charge storing potential. The programming and erasing operations were discussed with proposed band diagram.

  11. Anomalous output characteristic shift for the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Siyang; Zhang, Chunwei; Sun, Weifeng, E-mail: swffrog@seu.edu.cn [National ASIC System Engineering Research Center, Southeast University, Nanjing 210096 (China); Su, Wei; Wang, Shaorong; Ma, Shulang; Huang, Yu [CSMC Technologies Corporation, Wuxi 214061 (China)

    2014-04-14

    Anomalous output characteristic shift of the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer is investigated. It shows that the linear drain current has obvious decrease when the output characteristic of fresh device is measured for two consecutive times. The charge pumping experiments demonstrate that the decrease is not from hot-carrier degradation. The reduction of cross section area for the current flowing, which results from the squeezing of the depletion region surrounding the P-top layer, is responsible for the shift. Consequently, the current capability of this special device should be evaluated by the second measured output characteristic.

  12. III-V Metal-Oxide-Semiconductor Field-Effect Transistors with High κ Dielectrics

    Science.gov (United States)

    Hong, Minghwei; Kwo, J. Raynien; Tsai, Pei-chun; Chang, Yaochung; Huang, Mao-Lin; Chen, Chih-ping; Lin, Tsung-da

    2007-05-01

    Research efforts on achieving low interfacial density of states (Dit) as well as low electrical leakage currents on GaAs-based III-V compound semiconductors are reviewed. Emphasis is placed on ultra high vacuum (UHV) deposited Ga2O3(Gd2O3) and atomic layer deposition (ALD)-Al2O3 on GaAs and InGaAs. Ga2O3(Gd2O3), the novel oxide, which was electron-beam evaporated from a gallium-gadolinium-garnet target, has, for the first time, unpinned the Fermi level of the oxide/GaAs heterostructures. Interfacial chemical properties and band parameters of valence band offsets and conduction band offsets in the oxides/III-V heterostructures are studied and determined using X-ray photoelectron spectroscopy and electrical leakage transport measurements. The mechanism of III-V surface passivation is discussed. The mechanism of Fermi-level unpinning in ALD-Al2O3 ex-situ deposited on InGaAs were studied and unveiled. Systematic heat treatments under various gases and temperatures were studied to achieve low leakage currents of 10-8-10-9 A/cm2 and low Dit’s in the range of (4--9)× 1010 cm-2 eV-1 for Ga2O3(Gd2O3) on InGaAs. By removing moisture from the oxide, thermodynamic stability of the Ga2O3(Gd2O3)/GaAs heterostructures was achieved with high temperature annealing, which is needed for fabricating inversion-channel metal-oxide-semiconductor filed-effect transistors (MOSFET’s). The oxide remains amorphous and the interface remains intact with atomic smoothness and sharpness. Device performances of inversion-channel and depletion-mode III-V MOSFET’s are reviewed, again with emphasis on the devices using Ga2O3(Gd2O3) as the gate dielectric.

  13. Printable Ultrathin Metal Oxide Semiconductor-Based Conformal Biosensors.

    Science.gov (United States)

    Rim, You Seung; Bae, Sang-Hoon; Chen, Huajun; Yang, Jonathan L; Kim, Jaemyung; Andrews, Anne M; Weiss, Paul S; Yang, Yang; Tseng, Hsian-Rong

    2015-12-22

    Conformal bioelectronics enable wearable, noninvasive, and health-monitoring platforms. We demonstrate a simple and straightforward method for producing thin, sensitive In2O3-based conformal biosensors based on field-effect transistors using facile solution-based processing. One-step coating via aqueous In2O3 solution resulted in ultrathin (3.5 nm), high-density, uniform films over large areas. Conformal In2O3-based biosensors on ultrathin polyimide films displayed good device performance, low mechanical stress, and highly conformal contact determined using polydimethylsiloxane artificial skin having complex curvilinear surfaces or an artificial eye. Immobilized In2O3 field-effect transistors with self-assembled monolayers of NH2-terminated silanes functioned as pH sensors. Functionalization with glucose oxidase enabled d-glucose detection at physiologically relevant levels. The conformal ultrathin field-effect transistor biosensors developed here offer new opportunities for future wearable human technologies.

  14. Functional integrity of flexible n-channel metal-oxide-semiconductor field-effect transistors on a reversibly bistable platform

    Science.gov (United States)

    Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Rojas, Jhonathan P.; Aljedaani, Abdulrahman B.; Hussain, Muhammad M.

    2015-10-01

    Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal-oxide-semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.

  15. Nanomechanoelectronic signal transduction scheme with metal-oxide-semiconductor field-effect transistor-embedded microcantilevers

    Science.gov (United States)

    Tark, Soo-Hyun; Srivastava, Arvind; Chou, Stanley; Shekhawat, Gajendra; Dravid, Vinayak P.

    2009-03-01

    We explore various metal-oxide-semiconductor field-effect transistor (MOSFET)-embedded microcantilever designs to assess their performance as an efficient nanomechanoelectronic signal transduction platform for monitoring deflection in microcantilever-based phenomena such as biochemical sensing and actuation. The current-voltage characteristics of embedded MOSFETs show current noise in the nanoampere range with a large signal-to-noise ratio sufficient to provide measureable output signal. The change in drain current with cantilever deflection is consistent with the effect of stress on carrier mobility and drain current reported in previous studies, validating that the MOSFET cantilevers can directly transduce deflection of a microcantilever into reproducible change in electrical signal.

  16. Dual-Material Surrounding-Gate Metal-Oxide-Semiconductor Field Effect Transistors with Asymmetric Halo

    Institute of Scientific and Technical Information of China (English)

    LI Zun-Chao

    2009-01-01

    Asymmetrical halo and dual-material gate structure are used in the sub-100 nm surrounding-gate metal-oxide-semiconductor field effect transistor (MOSFET) to improve the performance. Using three-region parabolic po-tential distribution and universal boundary condition, analytical surface potential and threshold voltage models of the novel MOSFET are developed based on the solution of Poisson's equation. The performance of the MOS-FET is examined by the analytical models and the 3D numerical device simulator Davinci. It is shown that the novel MOSFET can suppress short channel effect and improve carrier transport efficiency. The derived analytical models agree well with Davinci.

  17. Comparative Study of SiO2, Al2O3, and BeO Ultrathin Interfacial Barrier Layers in Si Metal-Oxide-Semiconductor Devices

    Directory of Open Access Journals (Sweden)

    J. H. Yum

    2012-01-01

    Full Text Available In a previous study, we have demonstrated that beryllium oxide (BeO film grown by atomic layer deposition (ALD on Si and III-V MOS devices has excellent electrical and physical characteristics. In this paper, we compare the electrical characteristics of inserting an ultrathin interfacial barrier layer such as SiO2, Al2O3, or BeO between the HfO2 gate dielectric and Si substrate in metal oxide semiconductor capacitors (MOSCAPs and n-channel inversion type metal oxide semiconductor field effect transistors (MOSFETs. Si MOSCAPs and MOSFETs with a BeO/HfO2 gate stack exhibited high performance and reliability characteristics, including a 34% improvement in drive current, slightly better reduction in subthreshold swing, 42% increase in effective electron mobility at an electric field of 1 MV/cm, slightly low equivalent oxide thickness, less stress-induced flat-band voltage shift, less stress induced leakage current, and less interface charge.

  18. Analytic Circuit Model of Ballistic Nanowire Metal-Oxide-Semiconductor Field-Effect Transistor for Transient Analysis

    Science.gov (United States)

    Numata, Tatsuhiro; Uno, Shigeyasu; Kamakura, Yoshinari; Mori, Nobuya; Nakazato, Kazuo

    2013-04-01

    A fully analytic and explicit model of device properties in the ballistic transport in gate-all-around metal-oxide-semiconductor field-effect transistors (MOSFETs) is proposed, which enables circuit simulations. The electrostatic potential distribution in the wire cross section is approximated by a parabolic function. Using the applied potential, the energy levels of electrons are analytically obtained in terms of a single unknown parameter by perturbation theory. Ballistic current is obtained in terms of an unknown parameter using the analytic expression of the electron energy level and the current equation for ballistic transport. We analytically derive the parameter with a one-of-a-kind approximate methodology. With the obtained parameter, the fully analytic and explicit model of device properties such as energy levels, ballistic current, and effective capacitance is derived with satisfactory accuracy compared with the numerical simulation results. Finally, we perform a transient simulation using a circuit simulator, introducing our model to it as a Verilog-A script.

  19. Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

    Directory of Open Access Journals (Sweden)

    Paul C. McIntyre

    2012-07-01

    Full Text Available The literature on polar Gallium Nitride (GaN surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

  20. Signatures of Quantized Energy States in Solution-Processed Ultrathin Layers of Metal-Oxide Semiconductors and Their Devices

    KAUST Repository

    Labram, John G.

    2015-02-13

    Physical phenomena such as energy quantization have to-date been overlooked in solution-processed inorganic semiconducting layers, owing to heterogeneity in layer thickness uniformity unlike some of their vacuum-deposited counterparts. Recent reports of the growth of uniform, ultrathin (<5 nm) metal-oxide semiconductors from solution, however, have potentially opened the door to such phenomena manifesting themselves. Here, a theoretical framework is developed for energy quantization in inorganic semiconductor layers with appreciable surface roughness, as compared to the mean layer thickness, and present experimental evidence of the existence of quantized energy states in spin-cast layers of zinc oxide (ZnO). As-grown ZnO layers are found to be remarkably continuous and uniform with controllable thicknesses in the range 2-24 nm and exhibit a characteristic widening of the energy bandgap with reducing thickness in agreement with theoretical predictions. Using sequentially spin-cast layers of ZnO as the bulk semiconductor and quantum well materials, and gallium oxide or organic self-assembled monolayers as the barrier materials, two terminal electronic devices are demonstrated, the current-voltage characteristics of which resemble closely those of double-barrier resonant-tunneling diodes. As-fabricated all-oxide/hybrid devices exhibit a characteristic negative-differential conductance region with peak-to-valley ratios in the range 2-7.

  1. A Customized Metal Oxide Semiconductor-Based Gas Sensor Array for Onion Quality Evaluation: System Development and Characterization

    Directory of Open Access Journals (Sweden)

    Tharun Konduru

    2015-01-01

    Full Text Available A gas sensor array, consisting of seven Metal Oxide Semiconductor (MOS sensors that are sensitive to a wide range of organic volatile compounds was developed to detect rotten onions during storage. These MOS sensors were enclosed in a specially designed Teflon chamber equipped with a gas delivery system to pump volatiles from the onion samples into the chamber. The electronic circuit mainly comprised a microcontroller, non-volatile memory chip, and trickle-charge real time clock chip, serial communication chip, and parallel LCD panel. User preferences are communicated with the on-board microcontroller through a graphical user interface developed using LabVIEW. The developed gas sensor array was characterized and the discrimination potential was tested by exposing it to three different concentrations of acetone (ketone, acetonitrile (nitrile, ethyl acetate (ester, and ethanol (alcohol. The gas sensor array could differentiate the four chemicals of same concentrations and different concentrations within the chemical with significant difference. Experiment results also showed that the system was able to discriminate two concentrations (196 and 1964 ppm of methlypropyl sulfide and two concentrations (145 and 1452 ppm of 2-nonanone, two key volatile compounds emitted by rotten onions. As a proof of concept, the gas sensor array was able to achieve 89% correct classification of sour skin infected onions. The customized low-cost gas sensor array could be a useful tool to detect onion postharvest diseases in storage.

  2. A Customized Metal Oxide Semiconductor-Based Gas Sensor Array for Onion Quality Evaluation: System Development and Characterization

    Science.gov (United States)

    Konduru, Tharun; Rains, Glen C.; Li, Changying

    2015-01-01

    A gas sensor array, consisting of seven Metal Oxide Semiconductor (MOS) sensors that are sensitive to a wide range of organic volatile compounds was developed to detect rotten onions during storage. These MOS sensors were enclosed in a specially designed Teflon chamber equipped with a gas delivery system to pump volatiles from the onion samples into the chamber. The electronic circuit mainly comprised a microcontroller, non-volatile memory chip, and trickle-charge real time clock chip, serial communication chip, and parallel LCD panel. User preferences are communicated with the on-board microcontroller through a graphical user interface developed using LabVIEW. The developed gas sensor array was characterized and the discrimination potential was tested by exposing it to three different concentrations of acetone (ketone), acetonitrile (nitrile), ethyl acetate (ester), and ethanol (alcohol). The gas sensor array could differentiate the four chemicals of same concentrations and different concentrations within the chemical with significant difference. Experiment results also showed that the system was able to discriminate two concentrations (196 and 1964 ppm) of methlypropyl sulfide and two concentrations (145 and 1452 ppm) of 2-nonanone, two key volatile compounds emitted by rotten onions. As a proof of concept, the gas sensor array was able to achieve 89% correct classification of sour skin infected onions. The customized low-cost gas sensor array could be a useful tool to detect onion postharvest diseases in storage. PMID:25587975

  3. A customized metal oxide semiconductor-based gas sensor array for onion quality evaluation: system development and characterization.

    Science.gov (United States)

    Konduru, Tharun; Rains, Glen C; Li, Changying

    2015-01-12

    A gas sensor array, consisting of seven Metal Oxide Semiconductor (MOS) sensors that are sensitive to a wide range of organic volatile compounds was developed to detect rotten onions during storage. These MOS sensors were enclosed in a specially designed Teflon chamber equipped with a gas delivery system to pump volatiles from the onion samples into the chamber. The electronic circuit mainly comprised a microcontroller, non-volatile memory chip, and trickle-charge real time clock chip, serial communication chip, and parallel LCD panel. User preferences are communicated with the on-board microcontroller through a graphical user interface developed using LabVIEW. The developed gas sensor array was characterized and the discrimination potential was tested by exposing it to three different concentrations of acetone (ketone), acetonitrile (nitrile), ethyl acetate (ester), and ethanol (alcohol). The gas sensor array could differentiate the four chemicals of same concentrations and different concentrations within the chemical with significant difference. Experiment results also showed that the system was able to discriminate two concentrations (196 and 1964 ppm) of methlypropyl sulfide and two concentrations (145 and 1452 ppm) of 2-nonanone, two key volatile compounds emitted by rotten onions. As a proof of concept, the gas sensor array was able to achieve 89% correct classification of sour skin infected onions. The customized low-cost gas sensor array could be a useful tool to detect onion postharvest diseases in storage.

  4. Theoretical Study of Triboelectric-Potential Gated/Driven Metal-Oxide-Semiconductor Field-Effect Transistor.

    Science.gov (United States)

    Peng, Wenbo; Yu, Ruomeng; He, Yongning; Wang, Zhong Lin

    2016-04-26

    Triboelectric nanogenerator has drawn considerable attentions as a potential candidate for harvesting mechanical energies in our daily life. By utilizing the triboelectric potential generated through the coupling of contact electrification and electrostatic induction, the "tribotronics" has been introduced to tune/control the charge carrier transport behavior of silicon-based metal-oxide-semiconductor field-effect transistor (MOSFET). Here, we perform a theoretical study of the performances of tribotronic MOSFET gated by triboelectric potential in two working modes through finite element analysis. The drain-source current dependence on contact-electrification generated triboelectric charges, gap separation distance, and externally applied bias are investigated. The in-depth physical mechanism of the tribotronic MOSFET operations is thoroughly illustrated by calculating and analyzing the charge transfer process, voltage relationship to gap separation distance, and electric potential distribution. Moreover, a tribotronic MOSFET working concept is proposed, simulated and studied for performing self-powered FET and logic operations. This work provides a deep understanding of working mechanisms and design guidance of tribotronic MOSFET for potential applications in micro/nanoelectromechanical systems (MEMS/NEMS), human-machine interface, flexible electronics, and self-powered active sensors.

  5. Electron emission from MOS electron emitters with clean and cesium covered gold surface

    DEFF Research Database (Denmark)

    Nielsen, Gunver; Thomsen, Lasse Bjørchmar; Johansson, Martin;

    2009-01-01

    MOS (metal-oxide-semiconductor) electron emitters consisting of a Si substrate, a SiO2 tunnel barrier and a Ti (1 nm)/Au(7 nm) top-electrode, with an active area of 1 cm(2) have been produced and studied with surface science techniques under UHV (ultra high vacuum) conditions and their emission c...

  6. Characterization of metal oxide semiconductor field effect transistor dosimeters for application in clinical mammography.

    Science.gov (United States)

    Benevides, Luis A; Hintenlang, David E

    2006-02-01

    Five high-sensitivity metal oxide semiconductor field effect transistor dosimeters in the TN-502 and 1002 series (Thomson Nielsen Electronics Ltd., 25B, Northside Road, Ottawa, ON K2H8S1, Canada) were evaluated for use in the mammography x-ray energy range (22-50 kVp) as a tool to assist in the documentation of patient specific average glandular dose. The dosimeters were interfaced with the Patient Dose Verification System, model No. TN-RD 15, which consisted of a dosimeter reader and up to four dual bias power supplies. Two different dual bias power supplies were evaluated in this study, model No. TN-RD 22 in high-sensitivity mode and a very-high sensitivity prototype. Each bias supply accommodates up to five dosimeters for 20 dosimeters per system. Sensitivity of detectors, defined as the mV/C kg(-1), was measured free in air with the bubble side of the dosimeter facing the x-ray field with a constant exposure. All dosimeter models' angular response showed a marked decrease in response when oriented between 120 degrees and 150 degrees and between at 190 degrees and 220 degrees relative to the incident beam. Sensitivity was evaluated for Mo/Mo, Mo/Rh, and Rh/Rh target-filter combinations. The individual dosimeter model sensitiVity was 4.45 x 10(4) mV/C kg(-1) (11.47 mV R(-1)) for TN-502RDS(micro); 5.93 x 10(4) mV per C kg(-1) (15.31 mV R(-1)) for TN-1002RD; 6.06 x 10(4) mV/C kg(-1) (15.63 mV R(-1)) for TN-1002RDI; 9.49 x 10(4) mV per C kg(-1) (24.49 mV R(-1)) for TN-1002RDM (micro); and 11.20 x 10(4) mV/C kg(-1) (28.82 mV R(-1)) for TN-1002RDS (micro). The energy response is presented and is observed to vary with dosimeter model, generally increasing with tube potential through the mammography energy range. An intercomparison of the high-sensitivity mode of TN-RD-22 was made to the very-high sensitivity bias power supply using a Mo/Mo target-filter. The very-high sensitivity-bias power supply increased dosimeter response by 1.45 +/- 0.04 for dosimeter models TN

  7. InAs-based metal-oxide-semiconductor structure formation in low-energy Townsend discharge

    Science.gov (United States)

    Aksenov, M. S.; Kokhanovskii, A. Yu.; Polovodov, P. A.; Devyatova, S. F.; Golyashov, V. A.; Kozhukhov, A. S.; Prosvirin, I. P.; Khandarkhaeva, S. E.; Gutakovskii, A. K.; Valisheva, N. A.; Tereshchenko, O. E.

    2015-10-01

    We developed and applied a method of InAs passivation in the low-energy plasma of Townsend discharge. The controlled interface oxidation in the Ar:O2:CF4 gas mixture under visualization of gas discharge plasma allowed growing thin homogeneous films in the range of 5-15 nm thickness. Oxidation with the addition of CF4 in gas-discharge plasma led to the formation of In and As oxyfluorides with a wide insulating gap and isostructural interface with unpinned Fermi level behavior. The metal-oxide-semiconductor structure showed excellent capacitance-voltage characteristics: small frequency dispersion (<15 mV), density of interface states (Dit) in the gap below 5 × 1010 eV-1cm-2, and fixed charge (Qfix) below 5 × 1011 cm-2.

  8. Design and Fabrication of Complementary Metal-Oxide-Semiconductor Sensor Chip for Electrochemical Measurement

    Science.gov (United States)

    Yamazaki, Tomoyuki; Ikeda, Takaaki; Kano, Yoshiko; Takao, Hidekuni; Ishida, Makoto; Sawada, Kazuaki

    2010-04-01

    An electrochemical sensor has been developed on a single chip in which potentiostat and sensor electrodes are integrated. Sensor chips were fabricated using 5.0 µm complementary metal-oxide-semiconductor (CMOS) technology. All processes including the CMOS process, postprocessing for fabricating sensor electrodes and passivation layers, and packaging were performed at Toyohashi University of Technology. The integration makes it possible to measure electrochemical signals without having to use a bulky external electrochemical system. The potential between the working electrode and the reference electrode was controlled using an on-chip potentiostat composed of CMOS transistors. The chip characteristics were verified by electrochemical measurement, namely, by cyclic voltammetry. Potassium ferricyanide solution was measured to obtain results that fit well to the theoretical formula. A clear proportional relationship between peak height and the concentration of the sample solution was obtained using the proposed sensor chip, and the dynamic range obtained was 0.10 to 8.0 mM.

  9. Effect of Temperature on GaGdO/GaN Metal Oxide Semiconductor Field Effect Transistors

    Energy Technology Data Exchange (ETDEWEB)

    Abernathy, C.R.; Baca, A.; Chu, S.N.G.; Hong, M.; Lothian, J.R.; Marcus, M.A.; Pearton, S.J.; Ren, F.; Schurman, M.J.

    1998-10-14

    GaGdO was deposited on GaN for use as a gate dielectric in order to fabricate a depletion metal oxide semiconductor field effect transistor (MOSFET). This is the fmt demonstration of such a device in the III-Nitride system. Analysis of the effect of temperature on the device shows that gate leakage is significantly reduced at elevated temperature relative to a conventional metal semiconductor field effeet transistor (MESFET) fabricated on the same GaN layer. MOSFET device operation in fact improved upon heating to 400 C. Modeling of the effeet of temperature on contact resistance suggests that the improvement is due to a reduction in the parasitic resistances present in the device.

  10. Multifunctional silicon-based light emitting device in standard complementary metal-oxide-semiconductor technology

    Institute of Scientific and Technical Information of China (English)

    Wang Wei; Huang Bei-Ju; Dong Zan; Chen Hong-Da

    2011-01-01

    A three-terminal silicon-based light emitting device is proposed and fabricated in standard 0.35μm complementary metal-oxide-semiconductor technology. This device is capable of versatile working modes: it can emit visible to near infra-red (NIR) light (the spectrum ranges from 500 nm to 1000 nm) in reverse bias avalanche breakdown mode with working voltage between 8.35 V-12 V and emit NIR light (the spectrum ranges from 900 nm to 1300 nm) in the forward injection mode with working voltage below 2 V. An apparent modulation effect on the light intensity from the polysilicon gate is observed in the forward injection mode. Furthermore, when the gate oxide is broken down, NIR light is emitted from the polysilicon/oxide/silicon structure. Optoelectronic characteristics of the device working in different modes are measured and compared. The mechanisms behind these different emissions are explored.

  11. The electrical characteristics of metal-oxide-semiconductor field effect transistors fabricated on cubic silicon carbide

    CERN Document Server

    Ohshima, T; Ishida, Y

    2003-01-01

    The n-channel metal-oxide-semiconductor field effect transistors (MOSFETs) were fabricated on cubic silicon carbide (3C-SiC) epitaxial layers grown on 3C-SiC substrates. The gate oxide of the MOSFETs was formed using pyrogenic oxidation at 1100 degC. The 3C-SiC MOSFETs showed enhancement type behaviors after annealing at 200degC for 30 min in argon atmosphere. The maximum value of the effective channel mobility of the 3C-SiC MOSFETs was 260cm sup 2 /V centre dot s. The leakage current of gate oxide was of a few tens of nA/cm sup 2 at an electric field range below 8.5 MV/cm, and breakdown began around 8.5MV/cm. (author)

  12. Strained silicon/silicon germanium heterojunction n-channel metal oxide semiconductor field effect transistors

    CERN Document Server

    Olsen, S H

    2002-01-01

    Investigations into the performance of strained silicon/silicon-germanium (Si/SiGe) n-channel metal-oxide-semiconductor field effect transistors (MOSFETs) have been carried out. Theoretical predictions suggest that use of a strained Si/SiGe material system with advanced material properties compared with conventional silicon allows enhanced MOSFET device performance. This study has therefore investigated the practical feasibility of obtaining superior electrical performance using a Si/SiGe material system. The MOSFET devices consisted of a strained Si surface channel and were fabricated on relaxed SiGe material using a reduced thermal budget process in order to preserve the strain. Two batches of strained Si/SiGe devices fabricated on material grown by differing methods have been analysed and both showed good transistor action. A correlation of electrical and physical device data established that the electrical device behaviour was closely related to the SiGe material quality, which differed depending on growt...

  13. Physical model for trap-assisted inelastic tunneling in metal-oxide-semiconductor structures

    Science.gov (United States)

    Jiménez-Molinos, F.; Palma, A.; Gámiz, F.; Banqueri, J.; López-Villanueva, J. A.

    2001-10-01

    A physical model for trap-assisted inelastic tunnel current through potential barriers in semiconductor structures has been developed. The model is based on the theory of multiphonon transitions between detrapped and trapped states and the only fitting parameters are those of the traps (energy level and concentration) and the Huang-Rhys factor. Therefore, dependences of the trapping and detrapping processes on the bias, position, and temperature can be obtained with this model. The results of the model are compared with experimental data of stress induced leakage current in metal-oxide-semiconductor devices. The average energy loss has been obtained and an interpretation is given of the curves of average energy loss versus oxide voltage. This allows us to identify the entrance of the assisted tunnel current in the Fowler-Nordheim regime. In addition, the dependence of the tunnel current and average energy loss on the model parameters has been studied.

  14. Impedance analysis of Al2O3/H-terminated diamond metal-oxide-semiconductor structures

    Science.gov (United States)

    Liao, Meiyong; Liu, Jiangwei; Sang, Liwen; Coathup, David; Li, Jiangling; Imura, Masataka; Koide, Yasuo; Ye, Haitao

    2015-02-01

    Impedance spectroscopy (IS) analysis is carried out to investigate the electrical properties of the metal-oxide-semiconductor (MOS) structure fabricated on hydrogen-terminated single crystal diamond. The low-temperature atomic layer deposition Al2O3 is employed as the insulator in the MOS structure. By numerically analysing the impedance of the MOS structure at various biases, the equivalent circuit of the diamond MOS structure is derived, which is composed of two parallel capacitive and resistance pairs, in series connection with both resistance and inductance. The two capacitive components are resulted from the insulator, the hydrogenated-diamond surface, and their interface. The physical parameters such as the insulator capacitance are obtained, circumventing the series resistance and inductance effect. By comparing the IS and capacitance-voltage measurements, the frequency dispersion of the capacitance-voltage characteristic is discussed.

  15. Flexible complementary metal oxide semiconductor microelectrode arrays with applications in single cell characterization

    Science.gov (United States)

    Pajouhi, H.; Jou, A. Y.; Jain, R.; Ziabari, A.; Shakouri, A.; Savran, C. A.; Mohammadi, S.

    2015-11-01

    A highly flexible microelectrode array with an embedded complementary metal oxide semiconductor (CMOS) instrumentation amplifier suitable for sensing surfaces of biological entities is developed. The array is based on ultrathin CMOS islands that are thermally isolated from each other and are interconnected by meandered nano-scale wires that can adapt to cellular surfaces with micro-scale curvatures. CMOS temperature sensors are placed in the islands and are optimally biased to have high temperature sensitivity. While no live cell thermometry is conducted, a measured temperature sensitivity of 0.15 °C in the temperature range of 35 to 40 °C is achieved by utilizing a low noise CMOS lock-in amplifier implemented in the same technology. The monolithic nature of CMOS sensors and amplifier circuits and their versatile flexible interconnecting wires overcome the sensitivity and yield limitations of microelectrode arrays fabricated in competing technologies.

  16. Energy Harvesting Thermoelectric Generators Manufactured Using the Complementary Metal Oxide Semiconductor Process

    Directory of Open Access Journals (Sweden)

    Wen-Jung Tsai

    2013-02-01

    Full Text Available This paper presents the fabrication and characterization of energy harvesting thermoelectric micro generators using the commercial complementary metal oxide semiconductor (CMOS process. The micro generator consists of 33 thermocouples in series. Thermocouple materials are p-type and n-type polysilicon since they have a large Seebeck coefficient difference. The output power of the micro generator depends on the temperature difference in the hot and cold parts of the thermocouples. In order to increase this temperature difference, the hot part of the thermocouples is suspended to reduce heat-sinking. The micro generator needs a post-CMOS process to release the suspended structures of hot part, which the post-process includes an anisotropic dry etching to etch the sacrificial oxide layer and an isotropic dry etching to remove the silicon substrate. Experiments show that the output power of the micro generator is 9.4 mW at a temperature difference of 15 K.

  17. Energy harvesting thermoelectric generators manufactured using the complementary metal oxide semiconductor process.

    Science.gov (United States)

    Yang, Ming-Zhi; Wu, Chyan-Chyi; Dai, Ching-Liang; Tsai, Wen-Jung

    2013-02-08

    This paper presents the fabrication and characterization of energy harvesting thermoelectric micro generators using the commercial complementary metal oxide semiconductor (CMOS) process. The micro generator consists of 33 thermocouples in series. Thermocouple materials are p-type and n-type polysilicon since they have a large Seebeck coefficient difference. The output power of the micro generator depends on the temperature difference in the hot and cold parts of the thermocouples. In order to increase this temperature difference, the hot part of the thermocouples is suspended to reduce heat-sinking. The micro generator needs a post-CMOS process to release the suspended structures of hot part, which the post-process includes an anisotropic dry etching to etch the sacrificial oxide layer and an isotropic dry etching to remove the silicon substrate. Experiments show that the output power of the micro generator is 9.4 mW at a temperature difference of 15 K.

  18. Single carrier trapping and de-trapping in scaled silicon complementary metal-oxide-semiconductor field-effect transistors at low temperatures

    Science.gov (United States)

    Li, Zuo; Khaled Husain, Muhammad; Yoshimoto, Hiroyuki; Tani, Kazuki; Sasago, Yoshitaka; Hisamoto, Digh; Fletcher, Jonathan David; Kataoka, Masaya; Tsuchiya, Yoshishige; Saito, Shinichi

    2017-07-01

    The scaling of Silicon (Si) technology is approaching the physical limit, where various quantum effects such as direct tunnelling and quantum confinement are observed, even at room temperatures. We have measured standard complementary metal-oxide-semiconductor field-effect-transistors (CMOSFETs) with wide and short channels at low temperatures to observe single electron/hole characteristics due to local structural disturbances such as roughness and defects. In fact, we observed Coulomb blockades in sub-threshold regimes of both p-type and n-type Si CMOSFETs, showing the presence of quantum dots in the channels. The stability diagrams for the Coulomb blockade were explained by the potential minima due to poly-Si grains. We have also observed sharp current peaks at narrow bias windows at the edges of the Coulomb diamonds, showing resonant tunnelling of single carriers through charge traps.

  19. Characterization of Interface State in Silicon Carbide Metal Oxide Semiconductor Capacitors

    Science.gov (United States)

    Kao, Wei-Chieh

    Silicon carbide (SiC) has always been considered as an excellent material for high temperature and high power devices. Since SiC is the only compound semiconductor whose native oxide is silicon dioxide (SiO2), it puts SiC in a unique position. Although SiC metal oxide semiconductor (MOS) technology has made significant progress in recent years, there are still a number of issues to be overcome before more commercial SiC devices can enter the market. The prevailing issues surrounding SiC MOSFET devices are the low channel mobility, the low quality of the oxide layer and the high interface state density at the SiC/SiO2 interface. Consequently, there is a need for research to be performed in order to have a better understanding of the factors causing the poor SiC/SiO2 interface properties. In this work, we investigated the generation lifetime in SiC materials by using the pulsed metal oxide semiconductor (MOS) capacitor method and measured the interface state density distribution at the SiC/SiO2 interface by using the conductance measurement and the high-low frequency capacitance technique. These measurement techniques have been performed on n-type and p-type SiC MOS capacitors. In the course of our investigation, we observed fast interface states at semiconductor-dielectric interfaces in SiC MOS capacitors that underwent three different interface passivation processes, such states were detected in the nitrided samples but not observed in PSG-passivated samples. This result indicate that the lack of fast states at PSG-passivated interface is one of the main reasons for higher channel mobility in PSG MOSFETs. In addition, the effect of mobile ions in the oxide on the response time of interface states has been investigated. In the last chapter we propose additional methods of investigation that can help elucidate the origin of the particular interface states, enabling a more complete understanding of the SiC/SiO2 material system.

  20. Accurate geometry scalable complementary metal oxide semiconductor modelling of low-power 90 nm amplifier circuits

    Directory of Open Access Journals (Sweden)

    Apratim Roy

    2014-05-01

    Full Text Available This paper proposes a technique to accurately estimate radio frequency behaviour of low-power 90 nm amplifier circuits with geometry scalable discrete complementary metal oxide semiconductor (CMOS modelling. Rather than characterising individual elements, the scheme is able to predict gain, noise and reflection loss of low-noise amplifier (LNA architectures made with bias, active and passive components. It reduces number of model parameters by formulating dependent functions in symmetric distributed modelling and shows that simple fitting factors can account for extraneous (interconnect effects in LNA structure. Equivalent-circuit model equations based on physical structure and describing layout parasites are developed for major amplifier elements like metal–insulator–metal (MIM capacitor, spiral symmetric inductor, polysilicon (PS resistor and bulk RF transistor. The models are geometry scalable with respect to feature dimensions, i.e. MIM/PS width and length, outer-dimension/turns of planar inductor and channel-width/fingers of active device. Results obtained with the CMOS models are compared against measured literature data for two 1.2 V amplifier circuits where prediction accuracy for RF parameters (S(21, noise figure, S(11, S(22 lies within the range of 92–99%.

  1. Complementary metal oxide semiconductor-compatible silicon nanowire biofield-effect transistors as affinity biosensors.

    Science.gov (United States)

    Duan, Xuexin; Rajan, Nitin K; Izadi, Mohammad Hadi; Reed, Mark A

    2013-11-01

    Affinity biosensors use biorecognition elements and transducers to convert a biochemical event into a recordable signal. They provides the molecule binding information, which includes the dynamics of biomolecular association and dissociation, and the equilibrium association constant. Complementary metal oxide semiconductor-compatible silicon (Si) nanowires configured as a field-effect transistor (NW FET) have shown significant advantages for real-time, label-free and highly sensitive detection of a wide range of biomolecules. Most research has focused on reducing the detection limit of Si-NW FETs but has provided less information about the real binding parameters of the biomolecular interactions. Recently, Si-NW FETs have been demonstrated as affinity biosensors to quantify biomolecular binding affinities and kinetics. They open new applications for NW FETs in the nanomedicine field and will bring such sensor technology a step closer to commercial point-of-care applications. This article summarizes the recent advances in bioaffinity measurement using Si-NW FETs, with an emphasis on the different approaches used to address the issues of sensor calibration, regeneration, binding kinetic measurements, limit of detection, sensor surface modification, biomolecule charge screening, reference electrode integration and nonspecific molecular binding.

  2. Laser Doppler blood flow complementary metal oxide semiconductor imaging sensor with analog on-chip processing.

    Science.gov (United States)

    Gu, Quan; Hayes-Gill, Barrie R; Morgan, Stephen P

    2008-04-20

    A 4 x 4 pixel array with analog on-chip processing has been fabricated within a 0.35 mum complementary metal oxide semiconductor process as a prototype sensor for laser Doppler blood flow imaging. At each pixel the bandpass and frequency weighted filters necessary for processing laser Doppler blood flow signals have been designed and fabricated. Because of the space constraints of implementing an accurate omega(0.5) filter at the pixel level, this has been approximated using the "roll off" of a high-pass filter with a cutoff frequency set at 10 kHz. The sensor has been characterized using a modulated laser source. Fixed pattern noise is present that is demonstrated to be repeatable across the array and can be calibrated. Preliminary blood flow results on a finger before and after occlusion demonstrate that the sensor array provides the potential for a system that can be scaled to a larger number of pixels for blood flow imaging.

  3. Analysis of Interface Charge Densities for High-k Dielectric Materials based Metal Oxide Semiconductor Devices

    Science.gov (United States)

    Maity, N. P.; Thakur, R. R.; Maity, Reshmi; Thapa, R. K.; Baishya, S.

    2016-10-01

    In this paper, the interface charge densities (Dit) are studied and analyzed for ultra thin dielectric metal oxide semiconductor (MOS) devices using different high-k dielectric materials such as Al2O3, ZrO2 and HfO2. The Dit have been calculated by a new approach using conductance method and it indicates that by reducing the thickness of the oxide, the Dit increases and similar increase is also found by replacing SiO2 with high-k. For the same oxide thickness, SiO2 has the lowest Dit and found to be the order of 1011cm-2eV-1. Linear increase in Dit has been observed as the dielectric constant of the oxide increases. The Dit is found to be in good agreement with published fabrication results at p-type doping level of 1×1017cm-3. Numerical calculations and solutions are performed by MATLAB and device simulation is done by ATLAS.

  4. Ultralow power, high fill factor smart complementary metal oxide semiconductor image sensor with motion detection capability

    Science.gov (United States)

    Mahbod, Abbas; Karimiyan, Hossein

    2016-11-01

    Bandwidth saving, power consumption, and fill factor improvement are known as vitally important challenges image sensor designers face in order to accomplish high-performance imaging systems. This paper presents an ultralow power, high fill factor smart complementary metal oxide semiconductor (CMOS) image sensor with motion detection capability. In this efficient methodology, the amount of redundant data processed in unimportant frames has been reduced significantly, and therefore, the proposed imaging system consumes less power compared with counterpart imagers. Furthermore, a pixel structure is introduced that outputs two consecutive frame voltages in series, with the result that the pixel size is minimized and a higher fill factor is achieved. In order to simulate the image capturing procedure, a state-of-the-art approach based on MATLAB and HSPICE software is devised, which is another important achievement of this paper. The performance of this technique is demonstrated using a 64×64 pixel sensor designed in a 0.18-μm standard CMOS technology. The sensor chip consumes 0.2 mW of power while operating at 100 fps with a fill factor of 45%.

  5. Integrated Active Magnetic Probe in Silicon-on-Insulator Complementary Metal-Oxide-Semiconductor Technology

    Science.gov (United States)

    Aoyama, Satoshi; Kawahito, Shoji; Yamaguchi, Masahiro

    2006-09-01

    A novel magnetic probe has been designed and fabricated by 0.15 μm five-metal (4M + thick metal) silicon-on-insulator (SOI) complementary metal-oxide-semiconductor (CMOS) technology to achieve both a high sensitivity and a high spatial resolution. A detecting coil having metal multilayers, a two-stage differential amplifier, a differential-to-single-ended converter, and an output buffer are integrated on a single chip. The probe is referred to as an active probe, and it has a feature to distinguish magnetic field from detected electromagnetic emissions by means of a two-turn differential coil structure and a circuit technique using a wideband differential-to-single-ended converter with a high common-mode rejection. Measurement results show the effectiveness of the active magnetic probe with the function of on-chip amplification and electric field suppression, as well as electrical switching with common-mode voltage (Vcom). Moreover, for the first time, a magnetic field distribution is visualized with an active probe.

  6. Matrix-dependent Strain Distributions of Au and Ag Nanoparticles in a Metal-oxide-semiconductor-based Nonvolatile Memory Device

    OpenAIRE

    Honghua Huang; Ying Zhang; Wenyan Wei; Ting Yu; Xingfang Luo; Cailei Yuan

    2015-01-01

    The matrix-dependent strain distributions of Au and Ag nanoparticles in a metal-oxide-semiconductor based nonvolatile memory device are investigated by finite element calculations. The simulation results clearly indicate that both Au and Ag nanoparticles incur compressive strain by high-k Al2O3 and conventional SiO2 dielectrics. The strain distribution of nanoparticles is closely related to the surrounding matrix. Nanoparticles embedded in different matrices experience different compressive s...

  7. Transport properties of silicon complementary-metal-oxide semiconductor quantum well field-effect transistors

    Science.gov (United States)

    Naquin, Clint Alan

    Introducing explicit quantum transport into silicon (Si) transistors in a manner compatible with industrial fabrication has proven challenging, yet has the potential to transform the performance horizons of large scale integrated Si devices and circuits. Explicit quantum transport as evidenced by negative differential transconductances (NDTCs) has been observed in a set of quantum well (QW) n-channel metal-oxide-semiconductor (NMOS) transistors fabricated using industrial silicon complementary MOS processing. The QW potential was formed via lateral ion implantation doping on a commercial 45 nm technology node process line, and measurements of the transfer characteristics show NDTCs up to room temperature. Detailed gate length and temperature dependence characteristics of the NDTCs in these devices have been measured. Gate length dependence of NDTCs shows a correlation of the interface channel length with the number of NDTCs formed as well as with the gate voltage (VG) spacing between NDTCs. The VG spacing between multiple NDTCs suggests a quasi-parabolic QW potential profile. The temperature dependence is consistent with partial freeze-out of carrier concentration against a degenerately doped background. A folding amplifier frequency multiplier circuit using a single QW NMOS transistor to generate a folded current-voltage transfer function via a NDTC was demonstrated. Time domain data shows frequency doubling in the kHz range at room temperature, and Fourier analysis confirms that the output is dominated by the second harmonic of the input. De-embedding the circuit response characteristics from parasitic cable and contact impedances suggests that in the absence of parasitics the doubling bandwidth could be as high as 10 GHz in a monolithic integrated circuit, limited by the transresistance magnitude of the QW NMOS. This is the first example of a QW device fabricated by mainstream Si CMOS technology being used in a circuit application and establishes the feasibility

  8. Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device

    Science.gov (United States)

    Tripathi, Udbhav; Kaur, Ramneek

    2016-05-01

    Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

  9. Multichannel, time-resolved picosecond laser ultrasound imaging and spectroscopy with custom complementary metal-oxide-semiconductor detector.

    Science.gov (United States)

    Smith, Richard J; Light, Roger A; Sharples, Steve D; Johnston, Nicholas S; Pitter, Mark C; Somekh, Mike G

    2010-02-01

    This paper presents a multichannel, time-resolved picosecond laser ultrasound system that uses a custom complementary metal-oxide-semiconductor linear array detector. This novel sensor allows parallel phase-sensitive detection of very low contrast modulated signals with performance in each channel comparable to that of a discrete photodiode and a lock-in amplifier. Application of the instrument is demonstrated by parallelizing spatial measurements to produce two-dimensional thickness maps on a layered sample, and spectroscopic parallelization is demonstrated by presenting the measured Brillouin oscillations from a gallium arsenide wafer. This paper demonstrates the significant advantages of our approach to pump probe systems, especially picosecond ultrasonics.

  10. Memory effects in a Al/Ti:HfO{sub 2}/CuPc metal-oxide-semiconductor device

    Energy Technology Data Exchange (ETDEWEB)

    Tripathi, Udbhav, E-mail: udbhav1781996@gmail.com; Kaur, Ramneek [Department of Physics, Center of Advanced Study in Physics, Panjab University, Chandigarh-160 014 (India)

    2016-05-23

    Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO{sub 2}) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

  11. Impact of mechanical stress on gate tunneling currents of germanium and silicon p-type metal-oxide-semiconductor field-effect transistors and metal gate work function

    Science.gov (United States)

    Choi, Youn Sung; Numata, Toshinori; Nishida, Toshikazu; Harris, Rusty; Thompson, Scott E.

    2008-03-01

    Uniaxial four-point wafer bending stress-altered gate tunneling currents are measured for germanium (Ge)/silicon (Si) channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with HfO2/SiO2 gate dielectrics and TiN/P+ poly Si electrodes. Carrier separation is used to measure electron and hole currents. The strain-altered hole tunneling current from the p-type inversion layer of Ge is measured to be ˜4 times larger than that for the Si channel MOSFET, since the larger strain-induced valence band-edge splitting in Ge results in more hole repopulation into a subband with a smaller out-of-plane effective mass and a lower tunneling barrier height. The strain-altered electron tunneling current from the metal gate is measured and shown to change due to strain altering the metal work function as quantified by flatband voltage shift measurements of Si MOS capacitors with TaN electrodes.

  12. Detection of Zearalenone Using a Metal-Oxide-Semiconductor Field-Effect-Transistor-Based Biosensor Employing a Pt Reference Electrode

    Science.gov (United States)

    Lim, Byounghyun; Cho, Byunghyun; Shin, Jang-Kyoo; Choi, Ho-Jin; Seo, Sang-Ho; Choi, Sung-Wook; Chun, Hyang Sook

    2009-06-01

    We have fabricated a metal-oxide-semiconductor field-effect-transistor (MOSFET)-based biosensor for the detection of zearalenone using a standard complementary metal-oxide-semiconductor (CMOS) process. Au was used as the gate metal to immobilize a self-assembled monolayer (SAM) made of mercaptohexadecanoic acid (MHDA). The SAM was used to immobilize anti-zearalenone antibody. The carboxyl group of the SAM was bound to the anti-zearalenone antibody. Anti-zearalenone antibody and zearalenone were bound by an antigen-antibody reaction. The measurements were performed in phosphate buffered saline (PBS; pH 7.4) solution. A Pt electrode was employed as a reference electrode. The gate voltage of the sensor was applied using the Pt reference electrode. The binding of the SAM, anti-zearalenone antibody, and zearalenone caused a variation in the drain current of the MOSFET-based biosensor. To verify the interaction among the SAM, anti-zearalenone antibody, and zearalenone, surface plasmon resonance (SPR) measurements were performed.

  13. A novel planar vertical double-diffused metal-oxide-semiconductor field-effect transistor with inhomogeneous floating islands

    Institute of Scientific and Technical Information of China (English)

    Ren Min; Li Ze-Hong; Liu Xiao-Long; Xie Jia-Xiong; Deng Guang-Min; Zhang Bo

    2011-01-01

    A novel planar vertical double-diffused metal-oxide-semiconductor (VDMOS) structure with an ultra-low specific on-resistance (Ron,sp),whose distinctive feature is the use of inhomogeneous floating p-islands in the n-drift region,is proposed.The theoretical limit of its Ron,sp is deduced,the influence of structure parameters on the breakdown voltage (BV) and Ron,sp are investigated,and the optimized results with BV of 83 V and Ron,sp of 54 mΩ.mm2 are obtained.Simulations show that the inhomogencous-floating-islands metal-oxide-semiconductor field-effect transistor (MOSFET)has a superior “Ron,sp/BV” trade-off to the conventional VDMOS (a 38% reduction of Ron,sp with the same BV) and the homogeneous-floating-islands MOSFET (a 10% reduction of Ron,sp with the same BV).The inhomogeneous-floatingislands MOSFET also has a much better body-diode characteristic than the superjunction MOSFET.Its reverse recovery peak current,reverse recovery time and reverse recovery charge are about 50,80 and 40% of those of the superjunction MOSFET,respectively.

  14. Analytical modeling to design the vertically aligned Si-nanowire metal-oxide-semiconductor photosensors for direct color sensing with high spectral resolution

    Science.gov (United States)

    Sikdar, Subhrajit; Chowdhury, Basudev Nag; Ghosh, Ajay; Chattopadhyay, Sanatan

    2017-03-01

    In the current work, an analytical model for the design of vertically aligned silicon (Si) nanowire metal-oxide-semiconductor (MOS) capacitor based multi-color photodetectors has been developed for the detection of entire visible spectrum with high spectral resolution. The photogeneration phenomena within the nanostructures are analyzed in detail by developing a quantum field model associated with second quantization electron-photon field operators. The non-equilibrium Green's function (NEGF) formalism is employed to solve the relevant equations. The study shows that the proposed device with specified design of diameter-voltage combinations is capable of detecting 64 spectral bands of the entire visible spectrum (380 nm to700 nm) directly with a very high resolution of 5 nm wavelength. Such direct sensing of each wavelength is observed to be independent of the fluctuations of illumination intensity. The device is designed to obtain a full-width-at-half-maximum (FWHM) smaller than the spectral resolution (5 nm) for each wavelength of the visible range, which indicates a very high quality digital imaging/sensing method. Such devices may be a potential alternative for the future nanoelectronics based photodevices for superior sensing/imaging applications.

  15. Semi-classical noise investigation for sub-40nm metal-oxide-semiconductor field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Spathis, C., E-mail: cspathis@ece.upatras.gr; Birbas, A.; Georgakopoulou, K. [Department of Electrical and Computer Engineering, University of Patras, Patras 26500 (Greece)

    2015-08-15

    Device white noise levels in short channel Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) dictate the performance and reliability of high-frequency circuits ranging from high-speed microprocessors to Low-Noise Amplifiers (LNAs) and microwave circuits. Recent experimental noise measurements with very short devices demonstrate the existence of suppressed shot noise, contrary to the predictions of classical channel thermal noise models. In this work we show that, as the dimensions continue to shrink, shot noise has to be considered when the channel resistance becomes comparable to the barrier resistance at the source-channel junction. By adopting a semi-classical approach and taking retrospectively into account transport, short-channel and quantum effects, we investigate the partitioning between shot and thermal noise, and formulate a predictive model that describes the noise characteristics of modern devices.

  16. Ratiometric, filter-free optical sensor based on a complementary metal oxide semiconductor buried double junction photodiode.

    Science.gov (United States)

    Yung, Ka Yi; Zhan, Zhiyong; Titus, Albert H; Baker, Gary A; Bright, Frank V

    2015-07-16

    We report a complementary metal oxide semiconductor integrated circuit (CMOS IC) with a buried double junction (BDJ) photodiode that (i) provides a real-time output signal that is related to the intensity ratio at two emission wavelengths and (ii) simultaneously eliminates the need for an optical filter to block Rayleigh scatter. We demonstrate the BDJ platform performance for gaseous NH3 and aqueous pH detection. We also compare the BDJ performance to parallel results obtained by using a slew scanned fluorimeter (SSF). The BDJ results are functionally equivalent to the SSF results without the need for any wavelength filtering or monochromators and the BDJ platform is not prone to errors associated with source intensity fluctuations or sensor signal drift.

  17. Characterization of a complementary metal-oxide semiconductor operational amplifier from 300 to 4.2 K

    Science.gov (United States)

    Hastings, J. Todd; Ng, K.-W.

    1995-06-01

    We report the first operation of a commercially available complementary metal-oxide semiconductor operational amplifier, at liquid helium temperature. In addition, we have characterized several factors important to the practical application of such a circuit from room temperature down to 4.2 K. The temperature dependence and measurement techniques for open-loop gain, input offset voltage, input referred noise voltage, and quiescent current are presented. We will discuss our observations of low temperature behavior of the opamp with respect to others' previous results. This work represents an advancement over earlier studies which only reported opamp operation down to 77 or 30 K with measurements taken only at a limited number of temperatures instead of a broad range. Our data suggest that under special operating conditions the opamps can be effectively used with careful consideration of noise and gain performance. Input offset voltage levels and quiescent current (including power consumption) resemble normal room temperature operation.

  18. Extraction of Channel Length Independent Series Resistance for Deeply Scaled Metal-Oxide-Semiconductor Field-Effect Transistors

    Science.gov (United States)

    Ma, Li-Juan; Ji, Xiao-Li; Chen, Yuan-Cong; Xia, Hao-Guang; Zhu, Chen-Xin; Guo, Qiang; Yan, Feng

    2014-09-01

    The recently developed four Rsd extraction methods from a single device, involving the constant-mobility method, the direct Id—Vgs method, the conductance method and the Y-function method, are evaluated on 32 nm n-channel metal-oxide-semiconductor field-effect transistors (nMOSFETs). It is found that Rsd achieved from the constant-mobility method exhibits the channel length independent characteristics. The L-dependent Rsd extracted from the other three methods is proven to be associated with the gate-voltage-induced mobility degradation in the extraction procedures. Based on L-dependent behaviors of Rsd, a new method is proposed for accurate series resistance extraction on deeply scaled MOSFETs.

  19. HfxAlyO ternary dielectrics for InGaAs based metal-oxide-semiconductor capacitors

    Science.gov (United States)

    Krylov, Igor; Ritter, Dan; Eizenberg, Moshe

    2017-07-01

    The electrical properties of HfxAlyO compound dielectric films and the HfxAlyO/InGaAs interface are reported for various dielectric film compositions. Despite the same trimethylaluminum (TMA) pre-deposition treatment, dispersion in accumulation and capacitance-voltage (C-V) hysteresis increased with hafnium content. Different kinds of border traps were identified as being responsible for the phenomena. After anneal, the density of states in the HfxAlyO/InGaAs interface varied quite weakly with dielectric film composition. The optimal composition for obtaining high inversion charge density in metal oxide semiconductor gate stacks is determined by a tradeoff between leakage and dielectric constant, with the optimum atomic cation ratio ([Hf]/[Al]) of ˜1.

  20. Comparison of modification strategies towards enhanced charge carrier separation and photocatalytic degradation activity of metal oxide semiconductors (TiO2, WO3 and ZnO)

    Science.gov (United States)

    Kumar, S. Girish; Rao, K. S. R. Koteswara

    2017-01-01

    Metal oxide semiconductors (TiO2, WO3 and ZnO) finds unparalleled opportunity in wastewater purification under UV/visible light, largely encouraged by their divergent admirable features like stability, non-toxicity, ease of preparation, suitable band edge positions and facile generation of active oxygen species in the aqueous medium. However, the perennial failings of these photocatalysts emanates from the stumbling blocks like rapid charge carrier recombination and meager visible light response. In this review, tailoring the surface-bulk electronic structure through the calibrated and veritable approaches such as impurity doping, deposition with noble metals, sensitizing with other compounds (dyes, polymers, inorganic complexes and simple chelating ligands), hydrogenation process (annealing under hydrogen atmosphere), electronic integration with other semiconductors, modifying with carbon nanostructures, designing with exposed facets and tailoring with hierarchical morphologies to overcome their critical drawbacks are summarized. Taking into account the materials intrinsic properties, the pros and cons together with similarities and striking differences for each strategy in specific to TiO2, WO3 & ZnO are highlighted. These subtlety enunciates the primacy for improving the structure-electronic properties of metal oxides and credence to its fore in the practical applications. Future research must focus on comparing the performances of ZnO, TiO2 and WO3 in parallel to get insight into their photocatalytic behaviors. Such comparisons not only reveal the changed surface-electronic structure upon various modifications, but also shed light on charge carrier dynamics, free radical generation, structural stability and compatibility for photocatalytic reactions. It is envisioned that these cardinal tactics have profound implications and can be replicated to other semiconductor photocatalysts like CeO2, In2O3, Bi2O3, Fe2O3, BiVO4, AgX, BiOX (X = Cl, Br & I), Bi2WO6, Bi2MoO6

  1. Integration of crystalline orientated γ-Al2O3 films and complementary metal-oxide-semiconductor circuits on Si(1 0 0) substrate

    Science.gov (United States)

    Oishi, Koji; Akai, Daisuke; Ishida, Makoto

    2015-01-01

    In this paper, integration of crystalline orientated γ-Al2O3 films and complementary metal-oxide-semiconductor (CMOS) circuits on Si(1 0 0) substrate was reported. In this integration processes, crystalline γ-Al2O3 films need to be preserved their crystallinity during high temperature annealing processes of CMOS fabrication in order to prevent surface condition changes. The γ-Al2O3 films grown on Si substrates are annealed in the CMOS fabrication process conditions, drive-in annealing at 1150 °C in O2 atmosphere and wet annealing 1000 °C in H2O vapor atmosphere. Reflection high energy electron diffraction (RHEED) and x-ray diffraction (XRD) were used to characterize the crystallinity of γ-Al2O3 films after the annealing processes. Surface conditions of the films are analyzed and observed with X-ray photoelectron spectroscopy (XPS) and scanning electron microscope (SEM). As a result, RHEED patterns of the γ-Al2O3 films indicated that wet oxidation annealing was a critical process severally inferior surface condition of crystalline γ-Al2O3 films. XRD, XPS, and SEM investigation unveiled further details of the crystallinity changes on γ-Al2O3 films for each process. These results indicated passivation films were required to integrate γ-Al2O3 films with CMOS fabrication process. Therefore we proposed and introduced Si3N4/TEOS passivation films on γ-Al2O3 films in CMOS fabrication processes. At last, MOSFETs on γ-Al2O3 integrated Si(1 0 0) substrate were fabricated and characterized. The designed characteristics of MOSFETs were obtained on γ-Al2O3 integrated Si substrate.

  2. Origin of the performances degradation of two-dimensional-based metal-oxide-semiconductor field effect transistors in the sub-10 nm regime: A first-principles study

    Energy Technology Data Exchange (ETDEWEB)

    Lu, Anh Khoa Augustin [Semiconductor Physics Laboratory, Department of Physics and Astronomy, University of Leuven, Celestijnenlaan 200 D, B-3001 Leuven (Belgium); IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Pourtois, Geoffrey [IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Department of Chemistry, Plasmant Research Group, University of Antwerp, B-2610 Wilrijk-Antwerp (Belgium); Agarwal, Tarun [IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Department of Electrical Engineering, University of Leuven, Kasteelpark Arenberg 10, B-3001 Leuven (Belgium); Afzalian, Aryan [TSMC, Kapeldreef 75, B-3001 Leuven (Belgium); Radu, Iuliana P. [IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Houssa, Michel [Semiconductor Physics Laboratory, Department of Physics and Astronomy, University of Leuven, Celestijnenlaan 200 D, B-3001 Leuven (Belgium)

    2016-01-25

    The impact of the scaling of the channel length on the performances of metal-oxide-semiconductor field effect transistors, based on two-dimensional (2D) channel materials, is theoretically investigated, using density functional theory combined with the non-equilibrium Green's function method. It is found that the scaling of the channel length below 10 nm leads to strong device performance degradations. Our simulations reveal that this degradation is essentially due to the tunneling current flowing between the source and the drain in these aggressively scaled devices. It is shown that this electron tunneling process is modulated by the effective mass of the 2D channel material, and sets the limit of the scaling in future transistor designs.

  3. Research progress of high mobility germanium based metal oxide semiconductor devices%高迁移率 Ge沟道器件研究进展∗

    Institute of Scientific and Technical Information of China (English)

    安霞; 黄如; 李志强; 云全新; 林猛; 郭岳; 刘朋强; 黎明; 张兴

    2015-01-01

    Germanium based metal oxide semiconductor (MOS) device has been a research hotspot and considered as a po-tential candidate for future complementary MOS (CMOS) technology due to its high and symmetric carrier mobility. However, the poor quality of gate dielectric/channel interface significantly restricts the performance of germanium based MOS devices. Besides, the solid-solubility and activation concentration of dopants in Ge are both quite low, and the dopants diffuse fast in Ge, which makes it difficult to achieve ultra-shallow junction with high dopant concentration, especially for Ge NMOS devices. To solve these problems, different techniques are proposed and overviewed. The proposed nitrogen-plasma-passivation method can effectively suppress the regrowth of germanium sub-oxide and reduce the interface state density. Thus the performance of the fabricated Ge NMOS device is significantly improved. To enhance the n-type dopant ac-tivation in Ge, the multiple implantation technique and the multiple annealing technique are proposed. High electrical activation over 1 × 1020 cm−3 is achieved, and the corresponding contact resistivity is reduced to 3.8 × 10−7 Ω·cm2. Besides, the implantation after germanide (IAG) technique is first proposed to modulate the Schottky barrier height (SBH). The record-low electron SBH of 0.10 eV is obtained by IAG technique, and the optimized process window is given. In addition, the poor thermal stability of NiGe restricts the further improvement of performance of Ge MOS device. P and Sb co-implantation technique and novel ammonium fluoride pretreatment method are proposed to improve the thermal stability of NiGe. The electrical characteristic of NiGe/Ge diode is also improved simultaneously. The results provide the guidelines for further enhancing the performances of germanium-based MOS devices.

  4. Effect of NO annealing on charge traps in oxide insulator and transition layer for 4H-SiC metal-oxide-semiconductor devices

    Science.gov (United States)

    Jia, Yifan; Lv, Hongliang; Niu, Yingxi; Li, Ling; Song, Qingwen; Tang, Xiaoyan; Li, Chengzhan; Zhao, Yanli; Xiao, Li; Wang, Liangyong; Tang, Guangming; Zhang, Yimen; Zhang, Yuming

    2016-09-01

    The effect of nitric oxide (NO) annealing on charge traps in the oxide insulator and transition layer in n-type 4H-SiC metal-oxide-semiconductor (MOS) devices has been investigated using the time-dependent bias stress (TDBS), capacitance-voltage (C-V), and secondary ion mass spectroscopy (SIMS). It is revealed that two main categories of charge traps, near interface oxide traps (Nniot) and oxide traps (Not), have different responses to the TDBS and C-V characteristics in NO-annealed and Ar-annealed samples. The Nniot are mainly responsible for the hysteresis occurring in the bidirectional C-V characteristics, which are very close to the semiconductor interface and can readily exchange charges with the inner semiconductor. However, Not is mainly responsible for the TDBS induced C-V shifts. Electrons tunneling into the Not are hardly released quickly when suffering TDBS, resulting in the problem of the threshold voltage stability. Compared with the Ar-annealed sample, Nniot can be significantly suppressed by the NO annealing, but there is little improvement of Not. SIMS results demonstrate that the Nniot are distributed within the transition layer, which correlated with the existence of the excess silicon. During the NO annealing process, the excess Si atoms incorporate into nitrogen in the transition layer, allowing better relaxation of the interface strain and effectively reducing the width of the transition layer and the density of Nniot. Project supported by the National Natural Science Foundation of China (Grant Nos. 61404098 and 61274079), the Doctoral Fund of Ministry of Education of China (Grant No. 20130203120017), the National Key Basic Research Program of China (Grant No. 2015CB759600), the National Grid Science & Technology Project, China (Grant No. SGRI-WD-71-14-018), and the Key Specific Project in the National Science & Technology Program, China (Grant Nos. 2013ZX02305002-002 and 2015CB759600).

  5. Fluorescence-suppressed time-resolved Raman spectroscopy of pharmaceuticals using complementary metal-oxide semiconductor (CMOS) single-photon avalanche diode (SPAD) detector.

    Science.gov (United States)

    Rojalin, Tatu; Kurki, Lauri; Laaksonen, Timo; Viitala, Tapani; Kostamovaara, Juha; Gordon, Keith C; Galvis, Leonardo; Wachsmann-Hogiu, Sebastian; Strachan, Clare J; Yliperttula, Marjo

    2016-01-01

    In this work, we utilize a short-wavelength, 532-nm picosecond pulsed laser coupled with a time-gated complementary metal-oxide semiconductor (CMOS) single-photon avalanche diode (SPAD) detector to acquire Raman spectra of several drugs of interest. With this approach, we are able to reveal previously unseen Raman features and suppress the fluorescence background of these drugs. Compared to traditional Raman setups, the present time-resolved technique has two major improvements. First, it is possible to overcome the strong fluorescence background that usually interferes with the much weaker Raman spectra. Second, using the high photon energy excitation light source, we are able to generate a stronger Raman signal compared to traditional instruments. In addition, observations in the time domain can be performed, thus enabling new capabilities in the field of Raman and fluorescence spectroscopy. With this system, we demonstrate for the first time the possibility of recording fluorescence-suppressed Raman spectra of solid, amorphous and crystalline, and non-photoluminescent and photoluminescent drugs such as caffeine, ranitidine hydrochloride, and indomethacin (amorphous and crystalline forms). The raw data acquired by utilizing only the picosecond pulsed laser and a CMOS SPAD detector could be used for identifying the compounds directly without any data processing. Moreover, to validate the accuracy of this time-resolved technique, we present density functional theory (DFT) calculations for a widely used gastric acid inhibitor, ranitidine hydrochloride. The obtained time-resolved Raman peaks were identified based on the calculations and existing literature. Raman spectra using non-time-resolved setups with continuous-wave 785- and 532-nm excitation lasers were used as reference data. Overall, this demonstration of time-resolved Raman and fluorescence measurements with a CMOS SPAD detector shows promise in diverse areas, including fundamental chemical research, the

  6. A Novel Fully Depleted Air AlN Silicon-on-Insulator Metal-Oxide-Semiconductor Field Effect Transistor

    Institute of Scientific and Technical Information of China (English)

    YANG Yuan; GAO Yong; GONG Peng-Liang

    2008-01-01

    @@ A novel fully depleted air AlN silicon-on-insulator (SOI) metal-oxide-semiconductor field effect transistor (MOS-FET) is presented, which can eliminate the self-heating effect and solve the problem that the off-state current of SOI MOSFETs increases and the threshold voltage characteristics become worse when employing a high thermal conductivity material as a buried layer. The simulation results reveal that the lattice temperature in normal SOI devices is 75K higher than the atmosphere temperature, while the lattice temperature is just 4K higher than the atmosphere temperature resulting in less severe self-heating effect in air AlN SOI MOSFETs and AlN SOI MOSFETs. The on-state current of air AlN SOI MOSFETs is similar to the AlN SOI structure, and improves 12.3% more than that of normal SOI MOSFETs. The off-state current of AlN SOI is 6.7 times of normal SOI MOSFETs, while the counterpart of air AlN SOI MOSFETs is lower than that of SOI MOSFETs by two orders of magnitude. The threshold voltage change of air AlN SOI MOSFETs with different drain voltage is much less than that of AlN SOI devices, when the drain voltage is biased at 0.8 V, this difference is 28mV, so the threshold voltage change induced by employing high thermal conductivity material is cured.

  7. Exploiting sub-20-nm complementary metal-oxide semiconductor technology challenges to design affordable systems-on-chip

    Science.gov (United States)

    Vaidyanathan, Kaushik; Zhu, Qiuling; Liebmann, Lars; Lai, Kafai; Wu, Stephen; Liu, Renzhi; Liu, Yandong; Strojwas, Andzrej; Pileggi, Larry

    2015-01-01

    For the past four decades, cost and features have driven complementary metal-oxide semiconductor (CMOS) scaling. Severe lithography and material limitations seen below the 20-nm node, however, are challenging the fundamental premise of affordable CMOS scaling. Just continuing to co-optimize leaf cell circuit and layout designs with process technology does not enable us to exploit the challenges of sub-20-nm CMOS. For affordable scaling, it is imperative to work past sub-20-nm technology impediments while exploiting its features. To this end, we propose to broaden the scope of design technology co-optimization (DTCO) to be more holistic by including microarchitecture design and computer-aided design, along with circuits, layout, and process technology. Furthermore, we undertook such a holistic DTCO for all critical design elements such as embedded memory, standard cell logic, analog components, and physical synthesis in a 14-nm process. Measurements results from experimental designs in a representative 14-nm process from IBM demonstrate the efficacy of the proposed approach.

  8. Study of the tunnelling initiated leakage current through the carbon nanotube embedded gate oxide in metal oxide semiconductor structures

    Energy Technology Data Exchange (ETDEWEB)

    Chakraborty, Gargi; Sarkar, C K [Department of Electronics and Telecommunication Engineering, Jadavpur University, Kolkata (India); Lu, X B; Dai, J Y [Department of Applied Physics and Materials Research Center, Hong Kong Polytechnic University, Hong Kong (China)], E-mail: gargichakraborty0@yahoo.co.in, E-mail: phyhod@yahoo.co.in

    2008-06-25

    The tunnelling currents through the gate dielectric partly embedded with semiconducting single-wall carbon nanotubes in a silicon metal-oxide-semiconductor (MOS) structure have been investigated. The application of the gate voltage to such an MOS device results in the band bending at the interface of the partly embedded oxide dielectric and the surface of the silicon, initiating tunnelling through the gate oxide responsible for the gate leakage current whenever the thickness of the oxide is scaled. A model for silicon MOS structures, where carbon nanotubes are confined in a narrow layer embedded in the gate dielectric, is proposed to investigate the direct and the Fowler-Nordheim (FN) tunnelling currents of such systems. The idea of embedding such elements in the gate oxide is to assess the possibility for charge storage for memory device applications. Comparing the FN tunnelling onset voltage between the pure gate oxide and the gate oxide embedded with carbon nanotubes, it is found that the onset voltage decreases with the introduction of the nanotubes. The direct tunnelling current has also been studied at very low gate bias, for the thin oxide MOS structure which plays an important role in scaling down the MOS transistors. The FN tunnelling current has also been studied with varying nanotube diameter.

  9. Wide Spectral Characteristics of Si Photonic Crystal Mach-Zehnder Modulator Fabricated by Complementary Metal-Oxide-Semiconductor Process

    Directory of Open Access Journals (Sweden)

    Yosuke Hinakura

    2016-04-01

    Full Text Available Optical modulators for optical interconnects require a small size, small voltage, high speed and wide working spectrum. For this purpose, we developed Si slow-light Mach-Zehnder modulators via a 180 nm complementary metal-oxide-semiconductor process. We employed 200 μm lattice-shifted photonic crystal waveguides with interleaved p-n junctions as phase shifters. The group index spectrum of slow light was almost flat at ng ≈ 20 but exhibited ±10% fluctuation over a wavelength bandwidth of 20 nm. The cutoff frequency measured in this bandwidth ranged from 15 to 20 GHz; thus, clear open eyes were observed in the 25 Gbps modulation. However, the fluctuation in ng was reflected in the extinction ratio and bit-error rate. For a stable error-free operation, a 1 dB margin is necessary in the extinction ratio. In addition, we constructed a device with varied values of ng and confirmed that the extinction ratio at this speed was enhanced by larger ng up to 60. However, this larger ng reduced the cutoff frequency because of increased phase mismatch between slow light and radio frequency signals. Therefore, ng available for 25 Gbps modulation is limited to up to 40 for the current device design.

  10. Effect of Water Vapor and Surface Morphology on the Low Temperature Response of Metal Oxide Semiconductor Gas Sensors

    Directory of Open Access Journals (Sweden)

    Konrad Maier

    2015-09-01

    Full Text Available In this work the low temperature response of metal oxide semiconductor gas sensors is analyzed. Important characteristics of this low-temperature response are a pronounced selectivity to acid- and base-forming gases and a large disparity of response and recovery time constants which often leads to an integrator-type of gas response. We show that this kind of sensor performance is related to the trend of semiconductor gas sensors to adsorb water vapor in multi-layer form and that this ability is sensitively influenced by the surface morphology. In particular we show that surface roughness in the nanometer range enhances desorption of water from multi-layer adsorbates, enabling them to respond more swiftly to changes in the ambient humidity. Further experiments reveal that reactive gases, such as NO2 and NH3, which are easily absorbed in the water adsorbate layers, are more easily exchanged across the liquid/air interface when the humidity in the ambient air is high.

  11. Decal Electronics: Printable Packaged with 3D Printing High-Performance Flexible CMOS Electronic Systems

    KAUST Repository

    Sevilla, Galo T.

    2016-10-14

    High-performance complementary metal oxide semiconductor electronics are flexed, packaged using 3D printing as decal electronics, and then printed in roll-to-roll fashion for highly manufacturable printed flexible high-performance electronic systems.

  12. Effects of quantum coupling on the performance of metal-oxide-semiconductor field transistors

    Indian Academy of Sciences (India)

    Ling-Feng Mao

    2009-02-01

    Based on the analysis of the three-dimensional Schrödinger equation, the effects of quantum coupling between the transverse and the longitudinal components of channel electron motion on the performance of ballistic MOSFETs have been theoretically investigated by self-consistently solving the coupled Schrödinger–Poisson equations with the finite-difference method. The results show that the quantum coupling between the transverse and the longitudinal components of the electron motion can largely affect device performance. It suggests that the quantum coupling effect should be considered for the performance of a ballistic MOSFET due to the high injection velocity of the channel electron.

  13. Numerical Simulation of Tunneling Current in an Anisotropic Metal-Oxide-Semiconductor Capacitor

    Directory of Open Access Journals (Sweden)

    Khairurrijal khairurrijal

    2012-07-01

    Full Text Available In this paper, we have developed a model of the tunneling currents through a high-k dielectric stack in MOS capacitors with anisotropic masses. The transmittance was numerically calculated by employing a transfer matrix method and including longitudinal-transverse kinetic energy coupling which is represented by an electron phase velocity in the gate. The transmittance was then applied to calculate tunneling currents in TiN/HfSiOxN/SiO2/p-Si MOS capacitors. The calculated results show that as the gate electron velocity increases, the transmittance decreases and therefore the tunneling current reduces. The tunneling current becomes lower as the effective oxide thickness (EOT of HfSiOxN layer increases. When the incident electron passed through the barriers in the normal incident to the interface, the electron tunneling process becomes easier. It was also shown that the tunneling current was independent of the substrate orientation. Moreover, the model could be used in designing high speed MOS devices with low tunneling currents.

  14. Speed-Up Techniques for Complementary Metal Oxide Semiconductor Very Large Scale Integration.

    Science.gov (United States)

    1984-12-14

    have been assigned to the ground node by SPICE. This node must be determined and chnaged to 0 everywhere it %k| occurs in the filename.spice file. For...Surveillance and Electronic Warefare Reliability Engineering branch of the Material Management Acquisition Division of Sacramento Air Logistics Center

  15. Parameters affecting the accuracy of oxide thickness prediction in thin metal-oxide-semiconductor structures

    Science.gov (United States)

    Mohaidat, J. M.; Ahmad-Bitar, Riyad N.

    2004-01-01

    On the basis of the solution of the time dependent Schrödinger equation within the framework of the effective mass theory, a complete quantum mechanical electron tunneling through a biased square potential model with abrupt interfaces was deduced. Barriers of 3 eV height and widths up to 140 Å were investigated. Current density-voltage ( J- V) curves were computed for Al/SiO 2/ n+Si structure. The computed J- V curves exhibited oscillations at applied voltages above (Fowler-Nordheim tunneling) and below (direct tunneling) 3 V. For oxide thickness estimation, the position of the oscillation extrema from this quantum mechanical model were fitted to a wave interference formula and showed excellent agreement for oxide layer widths less than 50 Å. However, a systematic deviation appeared for layers larger than 50 Å. We show that the electron energy distribution at the injection layer and the electron effective mass on layers other than the oxide layer are important parameters for accurate oxide thickness estimation.

  16. Temperature-Independent Switching Rates for a Random Telegraph Signal in a Silicon Metal-Oxide-Semiconductor Field-Effect Transistor at Low Temperatures

    Energy Technology Data Exchange (ETDEWEB)

    Borland, Nick; Fleetwood, D.M.; Scofield, John H.

    1999-07-19

    We have observed discrete random telegraph signals (RTS'S) in the drain voltages of three, observed above 30 K were thermally activated. The switching rate for the only RTS observed below 30 K was thermally activated above 30 K but temperature-independent below 10 K. To our knowledge, this cross-over from thermal activation to tunneling behavior has not been previously observed for RTS's Metal-oxide-semiconductor field-effect transistors (MCEWETS) often exhibit relatively large levels of low-frequency (1/fl noise) [1,2]. Much evidence suggests that this noise is related to the capture all cases, switching rates have been thermally activated, often with different activation energies for capture and/or emission is accompanied by lattice relaxation. Though thermally activated behavior has sufficiently low temperatures [7,9]. While not observed in MOSFETS, cross-over from thermal activation to configurational tunneling has been observed for RTS's in junctions [13]. drain voltage was observed to randomly switch between two discrete levels, designated as Vup and Vdn, similar to RTS's reported by others [2,7'- 11 ]. We have characterized six RTS `S for temperatures above 30 K where thermally activated switching rates are observed. The properties of five of these have been the trap, i.e., the mean time a captured charge carrier spends in the trap before it is emitted. Similarly, we identify the mean time in the low resistance state ( trup in state Vup) as the capture time rc. F@ure 1 shows a typical time trace of the drain-voltage fluctuation &d(t)= Vd(t)+Vd>. This indicate that both the mean capture and emission times become independent of Tat low temperatures and where a= capture or emission, is temperature independent. The solid curve in Figure 3(a) (mean capture time) was obtained using a weighted nonlinear charge carriers are not in thermal equilibrium with the lattice, i.e., that while the lattice is being cooled Instead, we believe that the

  17. Metal-oxide-semiconductor capacitors and Schottky diodes studied with scanning microwave microscopy at 18 GHz

    Energy Technology Data Exchange (ETDEWEB)

    Kasper, M. [Christian Doppler Laboratory for Nanoscale Methods in Biophysics, Johannes Kepler University of Linz, Gruberstrasse 40, 4020 Linz (Austria); Gramse, G. [Biophysics Institute, Johannes Kepler University of Linz, Gruberstrasse 40, 4020 Linz (Austria); Hoffmann, J. [METAS, National Metrology Institute of Switzerland, Lindenweg 50, 3003 Bern-Wabern (Switzerland); Gaquiere, C. [MC2 technologies, 5 rue du Colibri, 59650 Villeneuve D' ascq (France); Feger, R.; Stelzer, A. [Institute for Communications Engineering and RF-Systems, Johannes Kepler University, Altenberger Str. 69, 4040 Linz (Austria); Smoliner, J. [Vienna University of Technology, Institute for Solid State Electronics, Floragasse 7, 1040 Vienna (Austria); Kienberger, F., E-mail: ferry-kienberger@keysight.com [Keysight Technologies Austria, Measurement Research Lab, Gruberstrasse 40, 4020 Linz (Austria)

    2014-11-14

    We measured the DC and RF impedance characteristics of micrometric metal-oxide-semiconductor (MOS) capacitors and Schottky diodes using scanning microwave microscopy (SMM). The SMM consisting of an atomic force microscopy (AFM) interfaced with a vector network analyser (VNA) was used to measure the reflection S11 coefficient of the metallic MOS and Schottky contact pads at 18 GHz as a function of the tip bias voltage. By controlling the SMM biasing conditions, the AFM tip was used to bias the Schottky contacts between reverse and forward mode. In reverse bias direction, the Schottky contacts showed mostly a change in the imaginary part of the admittance while in forward bias direction the change was mostly in the real part of the admittance. Reference MOS capacitors which are next to the Schottky diodes on the same sample were used to calibrate the SMM S11 data and convert it into capacitance values. Calibrated capacitance between 1–10 fF and 1/C{sup 2} spectroscopy curves were acquired on the different Schottky diodes as a function of the DC bias voltage following a linear behavior. Additionally, measurements were done directly with the AFM-tip in contact with the silicon substrate forming a nanoscale Schottky contact. Similar capacitance-voltage curves were obtained but with smaller values (30–300 aF) due to the corresponding smaller AFM-tip diameter. Calibrated capacitance images of both the MOS and Schottky contacts were acquired with nanoscale resolution at different tip-bias voltages.

  18. Electrical properties of metal-oxide-semiconductor structures with low-energy Ge-implanted and annealed thin gate oxides

    Science.gov (United States)

    Kapetanakis, E.; Normand, P.; Holliger, P.

    2008-03-01

    The electrical characteristics of low-energy (3keV) Ge-implanted and, subsequently, thermal annealed SiO2 layers are investigated through capacitance-voltage (C-V ) and conductance-voltage (G-V) measurements of metal-oxide-semiconductor capacitors. Particular emphasis is placed on the properties of such gate oxides for memory applications. Capacitance measurements at flatband voltage before and after the application of constant voltage stress in the accumulation regime indicate that the charge trapping behavior of the devices undergoes a major change after annealing at temperatures higher than 910°C. The latter change is identified as a relocation of Ge atoms mainly toward the upper portion of the oxide with a significant fraction of them leaving the oxide; a finding in harmony with secondary ion mass spectroscopy analysis. The interface trap density (Dit) for the thin (9-12nm) implanted oxides decreases with increasing annealing temperature, approaching at 950°C the Dit levels in the mid-1010eV-1cm-2 range of the nonimplanted samples. At elevated annealing temperatures (>1000°C), the device C-V characteristics are substantially disturbed. In this case, the presence of electrically active Ge atoms at an extended depth in the substrate modifies the intrinsic electrical properties of the n-Si substrate, lending a p-type conductivity character to the device high-frequency C-V curves. Substrate electrical modification is interpreted through a model that takes into account the formation of a SiO2/Ge-rich-Si /n-Si system. The SiO2/Ge-rich-Si interface presents very low Dit levels as revealed by conductance loss characteristics. The present study suggests that a combination of Ge implantation into SiO2 films and thermal annealing may be exploited in damage-free SiGe epitaxial growth technology based on Ge implantation.

  19. Chemistry integrated circuit: chemical system on a complementary metal oxide semiconductor integrated circuit.

    Science.gov (United States)

    Nakazato, Kazuo

    2014-03-28

    By integrating chemical reactions on a large-scale integration (LSI) chip, new types of device can be created. For biomedical applications, monolithically integrated sensor arrays for potentiometric, amperometric and impedimetric sensing of biomolecules have been developed. The potentiometric sensor array detects pH and redox reaction as a statistical distribution of fluctuations in time and space. For the amperometric sensor array, a microelectrode structure for measuring multiple currents at high speed has been proposed. The impedimetric sensor array is designed to measure impedance up to 10 MHz. The multimodal sensor array will enable synthetic analysis and make it possible to standardize biosensor chips. Another approach is to create new functional devices by integrating molecular systems with LSI chips, for example image sensors that incorporate biological materials with a sensor array. The quantum yield of the photoelectric conversion of photosynthesis is 100%, which is extremely difficult to achieve by artificial means. In a recently developed process, a molecular wire is plugged directly into a biological photosynthetic system to efficiently conduct electrons to a gold electrode. A single photon can be detected at room temperature using such a system combined with a molecular single-electron transistor.

  20. Chemistry integrated circuit: chemical system on a complementary metal oxide semiconductor integrated circuit

    Science.gov (United States)

    Nakazato, Kazuo

    2014-01-01

    By integrating chemical reactions on a large-scale integration (LSI) chip, new types of device can be created. For biomedical applications, monolithically integrated sensor arrays for potentiometric, amperometric and impedimetric sensing of biomolecules have been developed. The potentiometric sensor array detects pH and redox reaction as a statistical distribution of fluctuations in time and space. For the amperometric sensor array, a microelectrode structure for measuring multiple currents at high speed has been proposed. The impedimetric sensor array is designed to measure impedance up to 10 MHz. The multimodal sensor array will enable synthetic analysis and make it possible to standardize biosensor chips. Another approach is to create new functional devices by integrating molecular systems with LSI chips, for example image sensors that incorporate biological materials with a sensor array. The quantum yield of the photoelectric conversion of photosynthesis is 100%, which is extremely difficult to achieve by artificial means. In a recently developed process, a molecular wire is plugged directly into a biological photosynthetic system to efficiently conduct electrons to a gold electrode. A single photon can be detected at room temperature using such a system combined with a molecular single-electron transistor. PMID:24567475

  1. Low Temperature Processed Complementary Metal Oxide Semiconductor (CMOS) Device by Oxidation Effect from Capping Layer

    Science.gov (United States)

    Wang, Zhenwei; Al-Jawhari, Hala A.; Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Wei, Nini; Hedhili, M. N.; Alshareef, H. N.

    2015-04-01

    In this report, both p- and n-type tin oxide thin-film transistors (TFTs) were simultaneously achieved using single-step deposition of the tin oxide channel layer. The tuning of charge carrier polarity in the tin oxide channel is achieved by selectively depositing a copper oxide capping layer on top of tin oxide, which serves as an oxygen source, providing additional oxygen to form an n-type tin dioxide phase. The oxidation process can be realized by annealing at temperature as low as 190°C in air, which is significantly lower than the temperature generally required to form tin dioxide. Based on this approach, CMOS inverters based entirely on tin oxide TFTs were fabricated. Our method provides a solution to lower the process temperature for tin dioxide phase, which facilitates the application of this transparent oxide semiconductor in emerging electronic devices field.

  2. Band structure engineering strategies of metal oxide semiconductor nanowires and related nanostructures: A review

    Science.gov (United States)

    Piyadasa, Adimali; Wang, Sibo; Gao, Pu-Xian

    2017-07-01

    The electronic band structure of a solid state semiconductor determines many of its physical and chemical characteristics such as electrical, optical, physicochemical, and catalytic activity. Alteration or modification of the band structure could lead to significant changes in these physical and chemical characteristics, therefore we introduce new mechanisms of creating novel solid state materials with interesting properties. Over the past three decades, research on band structure engineering has allowed development of various methods to modify the band structure of engineered materials. Compared to bulk counterparts, nanostructures generally exhibit higher band structure modulation capabilities due to the quantum confinement effect, prominent surface effect, and higher strain limit. In this review we will discuss various band structure engineering strategies in semiconductor nanowires and other related nanostructures, mostly focusing on metal oxide systems. Several important strategies of band structure modulation are discussed in detail, such as doping, alloying, straining, interface and core-shell nanostructuring.

  3. Low Temperature Processed Complementary Metal Oxide Semiconductor (CMOS) Device by Oxidation Effect from Capping Layer

    KAUST Repository

    Wang, Zhenwei

    2015-04-20

    In this report, both p- and n-type tin oxide thin-film transistors (TFTs) were simultaneously achieved using single-step deposition of the tin oxide channel layer. The tuning of charge carrier polarity in the tin oxide channel is achieved by selectively depositing a copper oxide capping layer on top of tin oxide, which serves as an oxygen source, providing additional oxygen to form an n-type tin dioxide phase. The oxidation process can be realized by annealing at temperature as low as 190°C in air, which is significantly lower than the temperature generally required to form tin dioxide. Based on this approach, CMOS inverters based entirely on tin oxide TFTs were fabricated. Our method provides a solution to lower the process temperature for tin dioxide phase, which facilitates the application of this transparent oxide semiconductor in emerging electronic devices field.

  4. Electrosprayed Metal Oxide Semiconductor Films for Sensitive and Selective Detection of Hydrogen Sulfide

    Science.gov (United States)

    Ghimbeu, Camelia Matei; Lumbreras, Martine; Schoonman, Joop; Siadat, Maryam

    2009-01-01

    Semiconductor metal oxide films of copper-doped tin oxide (Cu-SnO2), tungsten oxide (WO3) and indium oxide (In2O3) were deposited on a platinum coated alumina substrate employing the electrostatic spray deposition technique (ESD). The morphology studied with scanning electron microscopy (SEM) and atomic force microscopy (AFM) shows porous homogeneous films comprising uniformly distributed aggregates of nano particles. The X-ray diffraction technique (XRD) proves the formation of crystalline phases with no impurities. Besides, the Raman cartographies provided information about the structural homogeneity. Some of the films are highly sensitive to low concentrations of H2S (10 ppm) at low operating temperatures (100 and 200 °C) and the best response in terms of Rair/Rgas is given by Cu-SnO2 films (2500) followed by WO3 (1200) and In2O3 (75). Moreover, all the films exhibit no cross-sensitivity to other reducing (SO2) or oxidizing (NO2) gases. PMID:22291557

  5. Metal oxide-based monolithic complementary metal oxide semiconductor gas sensor microsystem.

    Science.gov (United States)

    Graf, Markus; Barrettino, Diego; Taschini, Stefano; Hagleitner, Christoph; Hierlemann, Andreas; Baltes, Henry

    2004-08-01

    A fully integrated gas sensor microsystem is presented, which comprises for the first time a micro hot plate as well as advanced analog and digital circuitry on a single chip. The micro hot plate is coated with a nanocrystalline SnO2 thick film. The sensor chip is produced in an industrial 0.8-microm CMOS process with subsequent micromachining steps. A novel circular micro hot plate, which is 500 x 500 microm(2) in size, features an excellent temperature homogeneity of +/-2% over the heated area (300-microm diameter) and a high thermal efficiency of 6.0 degrees C/mW. A robust prototype package was developed, which relies on standard microelectronic packaging methods. Apart from a microcontroller board for managing chip communication and providing power supply and reference signals, no additional measurement equipment is needed. The on-chip digital temperature controller can accurately adjust the membrane temperature between 170 and 300 degrees C with an error of +/-2 degrees C. The on-chip logarithmic converter covers a wide measurement range between 1 kOmega and 10 MOmega. CO concentrations in the sub-parts-per-million range are detectable, and a resolution of +/-0.1 ppm CO was achieved, which renders the sensor capable of measuring CO concentrations at threshold levels.

  6. Electrical analysis of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors on flexible bulk mono-crystalline silicon

    KAUST Repository

    Ghoneim, Mohamed T.

    2015-06-01

    We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin (25 μm) silicon fabric which is peeled off using a CMOS compatible process from a standard bulk mono-crystalline silicon substrate. A lifetime projection is extracted using statistical analysis of the ramping voltage (Vramp) breakdown and time dependent dielectric breakdown data. The obtained flexible MOSCAPs operational voltages satisfying the 10 years lifetime benchmark are compared to those of the control MOSCAPs, which are not peeled off from the silicon wafer. © 2014 IEEE.

  7. High resolution imaging in cross-section of a metal-oxide-semiconductor field-effect-transistor using super-higher-order nonlinear dielectric microscopy

    Science.gov (United States)

    Chinone, N.; Yamasue, K.; Honda, K.; Cho, Y.

    2013-11-01

    Scanning nonlinear dielectric microscopy (SNDM) can evaluate carrier or charge distribution in semiconductor devices. High sensitivity to capacitance variation enables SNDM to measure the super-high-order (higher than 3rd) derivative of local capacitance-voltage (C-V) characteristics directly under the tip (dnC/dVn,n = 3, 4, ...). We demonstrate improvement of carrier density resolution by measurement of dnC/dVn,n = 1, 2, 3, 4 (super-higher-order method) in the cross-sectional observation of metal-oxide-semiconductor field-effect-transistor.

  8. Stress Characterization of 4H-SiC Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) using Raman Spectroscopy and the Finite Element Method.

    Science.gov (United States)

    Yoshikawa, Masanobu; Kosaka, Kenichi; Seki, Hirohumi; Kimoto, Tsunenobu

    2016-07-01

    We measured the depolarized and polarized Raman spectra of a 4H-SiC metal-oxide-semiconductor field-effect transistor (MOSFET) and found that compressive stress of approximately 20 MPa occurs under the source and gate electrodes and tensile stress of approximately 10 MPa occurs between the source and gate electrodes. The experimental result was in close agreement with the result obtained by calculation using the finite element method (FEM). A combination of Raman spectroscopy and FEM provides much data on the stresses in 4H-SiC MOSFET.

  9. Comparison of Ohmic contact resistances of n- and p-type Ge source/drain and their impact on transport characteristics of Ge metal oxide semiconductor field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Oh, Jungwoo, E-mail: jungwoo.oh@sematech.org [SEMATECH, 2706 Montopolis Drive, Austin, TX 78741 (United States); Huang, Jeff [SEMATECH, 2706 Montopolis Drive, Austin, TX 78741 (United States); Chen, Yen-Ting [Universityof Texas, Austin, TX (United States); Ok, Injo [SEMATECH, 2706 Montopolis Drive, Austin, TX 78741 (United States); Jeon, Kanghoon [Universityof California, Berkeley, CA (United States); Lee, Se-Hoon [Universityof Texas, Austin, TX (United States); Sassman, Barry; Loh, Wei-Yip [SEMATECH, 2706 Montopolis Drive, Austin, TX 78741 (United States); Lee, Hi-Deok [Chungnam National University (Korea, Republic of); Ko, Dea-Hong [Yonsei University (Korea, Republic of); Majhi, Prashant; Kirsch, Paul; Jammy, Raj [SEMATECH, 2706 Montopolis Drive, Austin, TX 78741 (United States)

    2011-10-31

    We report the results of a systematic study to understand low drive current of Ge-nMOSFET (metal-oxide-semiconductor field-effect transistor). The poor electron transport property is primarily attributed to the low dopant activation efficiency and high contact resistance. Results are supported by analyzing source/drain Ohmic metal contacts to n-type Ge using the transmission line method. Ni contacts to Ge nMOSFETs exhibit specific contact resistances of 10{sup -3}-10{sup -5} {Omega} cm{sup 2}, which is significantly higher than the 10{sup -7}-10{sup -8} {Omega} cm{sup 2} of Ni contacts to Ge pMOSFETs. The high resistance of Ni Ohmic contacts to n-type Ge is attributed mainly to insufficient dopant activation in Ge (or high sheet resistance) and a high tunneling barrier. Results obtained in this work identify one of the root causes of the lower than expected Ge nMOSFET transport issue, advancing high mobility Ge channel technology.

  10. Low Threshold Voltage and High Mobility N-Channel Metal-Oxide-Semiconductor Field-Effect Transistor Using Hf-Si/HfO2 Gate Stack Fabricated by Gate-Last Process

    Science.gov (United States)

    Ando, Takashi; Hirano, Tomoyuki; Tai, Kaori; Yamaguchi, Shinpei; Yoshida, Shinichi; Iwamoto, Hayato; Kadomura, Shingo; Watanabe, Heiji

    2010-01-01

    Systematic characterization of Hf-Si/HfO2 gate stacks revealed two mobility degradation modes. One is carrier scattering by fixed charges and/or trapped charges induced by the crystallization in the thick HfO2 case (inversion oxide thickness, Tinv> 1.6 nm). The other is the Hf penetration into the interfacial layer with the Si substrate in the thin HfO2 case (Tinv< 1.6 nm) for the Hf-rich electrode. It was demonstrated that careful optimization of the HfO2 thickness and the Hf-Si composition can suppress both modes. As a result, a high electron mobility equivalent to that of n+polycrystalline silicon (poly-Si)/SiO2 (248 cm2 V-1 s-1 at Eeff=1 MV/cm) was obtained at Tinv of 1.47 nm. Moreover, the effective work function of the optimized Hf-Si/HfO2 gate stack is located within 50 mV from the Si band edge (Ec). An extremely high Ion of 1165 µA/µm (at Ioff = 81 nA/µm) at Vdd=1.0 V was demonstrated for a 45 nm gate n-channel metal-oxide-semiconductor field-effect transistor (n-MOSFET) without strain enhanced technology.

  11. Transformational III-V Electronics

    KAUST Repository

    Nour, Maha A.

    2014-04-01

    Flexible electronics using III-V materials for nano-electronics with high electron mobility and optoelectronics with direct band gap are attractive for many applications. This thesis describes a complementary metal oxide semiconductor (CMOS) compatible process for transforming traditional III-V materials based electronics into flexible one. The thesis reports releasing 200 nm of Gallium Arsenide (GaAs) from 200 nm GaAs / 300 nm Aluminum Arsenide (AlAs) stack on GaAs substrate using diluted hydrofluoric acid (HF). This process enables releasing a single top layer compared to peeling off all layers with small sizes at the same time. This is done utilizing a network of release holes that contributes to the better transparency (45 % at 724 nm wavelengths) observed. Fabrication of metal oxide semiconductor capacitor (MOSCAPs) on GaAs is followed by releasing it to have devices on flexible 200 nm GaAs. Similarly, flexible GaSb and InP fabrication process is also reported to transform traditional electronics into large-area flexible electronics.

  12. Spin-dependent transport properties of a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor structure

    Energy Technology Data Exchange (ETDEWEB)

    Kanaki, Toshiki, E-mail: kanaki@cryst.t.u-tokyo.ac.jp; Asahara, Hirokatsu; Ohya, Shinobu, E-mail: ohya@cryst.t.u-tokyo.ac.jp; Tanaka, Masaaki, E-mail: masaaki@ee.t.u-tokyo.ac.jp [Department of Electrical Engineering and Information Systems, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656 (Japan)

    2015-12-14

    We fabricate a vertical spin metal-oxide-semiconductor field-effect transistor (spin-MOSFET) structure, which is composed of an epitaxial single-crystal heterostructure with a ferromagnetic-semiconductor GaMnAs source/drain, and investigate its spin-dependent transport properties. We modulate the drain-source current I{sub DS} by ∼±0.5% with a gate-source voltage of ±10.8 V and also modulate I{sub DS} by up to 60% with changing the magnetization configuration of the GaMnAs source/drain at 3.5 K. The magnetoresistance ratio is more than two orders of magnitude higher than that obtained in the previous studies on spin MOSFETs. Our result shows that a vertical structure is one of the hopeful candidates for spin MOSFET when the device size is reduced to a sub-micron or nanometer scale.

  13. Multi-frequency inversion-charge pumping for charge separation and mobility analysis in high-k/InGaAs metal-oxide-semiconductor field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Djara, V.; Cherkaoui, K.; Negara, M. A.; Hurley, P. K., E-mail: paul.hurley@tyndall.ie [Tyndall National Institute, University College Cork, Dyke Parade, Cork (Ireland)

    2015-11-28

    An alternative multi-frequency inversion-charge pumping (MFICP) technique was developed to directly separate the inversion charge density (N{sub inv}) from the trapped charge density in high-k/InGaAs metal-oxide-semiconductor field-effect transistors (MOSFETs). This approach relies on the fitting of the frequency response of border traps, obtained from inversion-charge pumping measurements performed over a wide range of frequencies at room temperature on a single MOSFET, using a modified charge trapping model. The obtained model yielded the capture time constant and density of border traps located at energy levels aligned with the InGaAs conduction band. Moreover, the combination of MFICP and pulsed I{sub d}-V{sub g} measurements enabled an accurate effective mobility vs N{sub inv} extraction and analysis. The data obtained using the MFICP approach are consistent with the most recent reports on high-k/InGaAs.

  14. Explicit Compact Surface-Potential and Drain-Current Models for Generic Asymmetric Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistors

    Science.gov (United States)

    Zhu, Zhaomin; Zhou, Xing; Chandrasekaran, Karthik; Rustagi, Subhash C.; See, Guan Huei

    2007-04-01

    In this paper, explicit surface potentials for undoped asymmetric-double-gate (a-DG) metal-oxide-semiconductor field-effect transistors (MOSFETs) suitable for compact model development are presented for the first time. The model is physically derived from Poisson’s equation in each region of operation and adopted in a unified regional approach. The proposed model is physically scalable with oxide/channel thicknesses and has been verified with generic implicit solutions for independent gate biases as well as for different gate/oxide materials. The model is extendable to silicon-on-insulator (SOI) and symmetric-DG (s-DG) MOSFETs. Finally, a continuous, explicit drain-current equation has been derived on the basis of the developed explicit surface-potential solutions.

  15. Mechanical stress effects on Pb(Zr,Ti)O3 thin-film ferroelectric capacitors embedded in a standard complementary metal-oxide-semiconductor process

    Science.gov (United States)

    Acosta, Antonio G.; Rodriguez, John A.; Nishida, Toshikazu

    2014-06-01

    We report experimental investigations of externally applied mechanical stress on 70 nm Pb(Zr,Ti)O3 ferroelectric capacitors embedded within a 130 nm complementary metal-oxide-semiconductor manufacturing process. An average increase in the remnant polarization of 3.37% per 100 MPa compressive uniaxial stress was observed. The maximum polarization increased by 2.68% per 100 MPa, while the cycling endurance was not affected by stress. The significant difference between experiment and the lattice distortion model suggests that two mechanisms are responsible for the polarization change. These results indicate that stress engineering may be used to enhance the signal margin in ferroelectric random access memory and enable technology scaling.

  16. Evaluation of a gate-first process for AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors with low ohmic annealing temperature

    Science.gov (United States)

    Liuan, Li; Jiaqi, Zhang; Yang, Liu; Jin-Ping, Ao

    2016-03-01

    In this paper, TiN/AlOx gated AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors (MOS-HFETs) were fabricated for gate-first process evaluation. By employing a low temperature ohmic process, ohmic contact can be obtained by annealing at 600 °C with the contact resistance approximately 1.6 Ω·mm. The ohmic annealing process also acts as a post-deposition annealing on the oxide film, resulting in good device performance. Those results demonstrated that the TiN/AlOx gated MOS-HFETs with low temperature ohmic process can be applied for self-aligned gate AlGaN/GaN MOS-HFETs. Project supported by the International Science and Technology Collaboration Program of China (Grant No. 2012DFG52260).

  17. High-gain complementary metal-oxide-semiconductor inverter based on multi-layer WSe2 field effect transistors without doping

    Science.gov (United States)

    Kang, Won-Mook; Cho, In-Tak; Roh, Jeongkyun; Lee, Changhee; Lee, Jong-Ho

    2016-10-01

    A high-gain complementary metal-oxide-semiconductor (CMOS) logic inverter was implemented by fabricating p- and n-type field effect transistors (FETs) based on multi-layer WSe2 on the same wafer. Au as a high work-function metal is contacted to WSe2 for the source/drain of the p-type FET. The n-type FET has an Al electrode contacted to WSe2 for the source/drain. Both FETs were designed to have similar on-current densities (>10-7 A μm-1) and high on/off current ratios (>106). The inverter shows excellent switching characteristics including relatively high voltage gains (>25) and high noise margins (>0.9) in the range of supply voltage from 2 V to 8 V. This work has a great significance in the realization of a CMOS logic gate based on WSe2 without an additional doping scheme.

  18. Structural and electrical characteristics of high-k/metal gate metal oxide semiconductor capacitors fabricated on flexible, semi-transparent silicon (100) fabric

    KAUST Repository

    Rojas, Jhonathan Prieto

    2013-02-12

    In pursuit of flexible computers with high performance devices, we demonstrate a generic process to fabricate 10 000 metal-oxide-semiconductor capacitors (MOSCAPs) with semiconductor industry\\'s most advanced high-k/metal gate stacks on widely used, inexpensive bulk silicon (100) wafers and then using a combination of iso-/anisotropic etching to release the top portion of the silicon with the already fabricated devices as a mechanically flexible (bending curvature of 133 m−1), optically semi-transparent silicon fabric (1.5 cm × 3 cm × 25 μm). The electrical characteristics show 3.7 nm effective oxide thickness, −0.2 V flat band voltage, and no hysteresis from the fabricated MOSCAPs.

  19. Temperature Dependent Electrical Transport in Al/Poly(4-vinyl phenol/p-GaAs Metal-Oxide-Semiconductor by Sol-Gel Spin Coating Method

    Directory of Open Access Journals (Sweden)

    Şadan Özden

    2016-01-01

    Full Text Available Deposition of poly(4-vinyl phenol insulator layer is carried out by applying the spin coating technique onto p-type GaAs substrate so as to create Al/poly(4-vinyl phenol/p-GaAs metal-oxide-semiconductor (MOS structure. Temperature was set to 80–320 K while the current-voltage (I-V characteristics of the structure were examined in the study. Ideality factor (n and barrier height (ϕb values found in the experiment ranged from 3.13 and 0.616 eV (320 K to 11.56 and 0.147 eV (80 K. Comparing the thermionic field emission theory and thermionic emission theory, the temperature dependent ideality factor behavior displayed that thermionic field emission theory is more valid than the latter. The calculated tunneling energy was 96 meV.

  20. Thick detection zone single-photon avalanche diode fabricated in 0.35 μm complementary metal-oxide semiconductors

    Science.gov (United States)

    Steindl, Bernhard; Enne, Reinhard; Zimmermann, Horst

    2015-05-01

    An avalanche photodiode (APD) fabricated in 0.35 μm high-voltage complementary metal-oxide semiconductor (CMOS) technology, which was originally optimized for linear mode applications, is characterized in Geiger mode operation. This work shows that the used design concept is also suitable for single-photon detection applications and achieves a photon detection efficiency of 22.1% at 785 nm due to a thick detection zone and 3.5 V excess bias. At this operation point, the single-photon APD achieves good results regarding afterpulsing probability (3.4%) and dark count rate (46 kHz) with respect to the large active diameter of 86 μm.

  1. Analysis, Design, and Optimization of Matched-Impedance Wide-Band Amplifiers With Multiple Feedback Loops Using 0.18 μm Complementary Metal Oxide Semiconductor Technology

    Science.gov (United States)

    Lin, Yo-Sheng; Lee, Tai-Hsing

    2004-10-01

    The realization of matched-impedance wide-band amplifier fabricated by 0.18 μm complementary metal oxide semiconductor (CMOS) process is reported. The technique of multiple feedback loops was used in the amplifier for terminal impedance matching and wide bandwidth simultaneously. The experimental results show that 3-dB bandwidth of 3 GHz and a gain of 10.7 dB with in-band input/output return loss more than 10 dB are obtained. These values agree well with those predicted from the analytic expressions derived for voltage gain, trans-impedance gain, bandwidth, and input/output return loss and impedance. In addition, the use of source capacitive peaking technique can improve the intrinsic over-damped characteristic of this amplifier.

  2. Device and Circuit Codesign Strategy for Application to Low-Noise Amplifier Based on Silicon Nanowire Metal-Oxide-Semiconductor Field Effect Transistors

    Science.gov (United States)

    Seongjae Cho,; Hee-Sauk Jhon,; Jung Hoon Lee,; Se Hwan Park,; Hyungcheol Shin,; Byung-Gook Park,

    2010-04-01

    In this study, a full-range approach from device level to circuit level design is performed for RF application of silicon nanowire (SNW) metal-oxide-semiconductor field effect transistors (MOSFETs). Both DC and AC analyses have been conducted to confirm the advantages of an SNW MOSFET over the conventional planar (CPL) MOSFET device having dimensional equivalence. Besides the intrinsic characteristic parameters, the extrinsic resistance and capacitance caused by wiring components are extracted from each device. On the basis of these intrinsic and extrinsic parameters, a multi-fingered 5.8 GHz low-noise amplifier (LNA) design adopting SNW MOSFETs has been achieved, which shows an improved gain of 17.5 dB and a noise figure of 3.1 dB over a CPL MOSFET LNA.

  3. Electrical hysteresis in p-GaN metal-oxide-semiconductor capacitor with atomic-layer-deposited Al2O3 as gate dielectric

    Science.gov (United States)

    Zhang, Kexiong; Liao, Meiyong; Imura, Masataka; Nabatame, Toshihide; Ohi, Akihiko; Sumiya, Masatomo; Koide, Yasuo; Sang, Liwen

    2016-12-01

    The electrical hysteresis in current-voltage (I-V) and capacitance-voltage characteristics was observed in an atomic-layer-deposited Al2O3/p-GaN metal-oxide-semiconductor capacitor (PMOSCAP). The absolute minimum leakage currents of the PMOSCAP for forward and backward I-V scans occurred not at 0 V but at -4.4 and +4.4 V, respectively. A negative flat-band voltage shift of 5.5 V was acquired with a capacitance step from +4.4 to +6.1 V during the forward scan. Mg surface accumulation on p-GaN was demonstrated to induce an Mg-Ga-Al-O oxidized layer with a trap density on the order of 1013 cm-2. The electrical hysteresis is attributed to the hole trapping and detrapping process in the traps of the Mg-Ga-Al-O layer via the Poole-Frenkel mechanism.

  4. Reduction in the interface-states density of metal-oxide-semiconductor field-effect transistors fabricated on high-index Si (114) surfaces by using an external magnetic field

    Energy Technology Data Exchange (ETDEWEB)

    Molina, J., E-mail: jmolina@inaoep.mx; De La Hidalga, J.; Gutierrez, E. [Electronics Department, National Institute of Astrophysics, Optics and Electronics, Tonantzintla, 72840 (Mexico)

    2014-08-14

    After fabrication of Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) devices on high-index silicon (114) surfaces, their threshold voltage (Vth) and interface-states density (Dit) characteristics were measured under the influence of an externally applied magnetic field of B = 6 μT at room temperature. The electron flow of the MOSFET's channel presents high anisotropy on Si (114), and this effect is enhanced by using an external magnetic field B, applied parallel to the Si (114) surface but perpendicular to the electron flow direction. This special configuration results in the channel electrons experiencing a Lorentzian force which pushes the electrons closer to the Si (114)-SiO{sub 2} interface and therefore to the special morphology of the Si (114) surface. Interestingly, Dit evaluation of n-type MOSFETs fabricated on Si (114) surfaces shows that the Si (114)-SiO{sub 2} interface is of high quality so that Dit as low as ∼10{sup 10 }cm{sup −2}·eV{sup −1} are obtained for MOSFETs with channels aligned at specific orientations. Additionally, using both a small positive Vds ≤ 100 mV and B = 6 μT, the former Dit is reduced by 35% in MOSFETs whose channels are aligned parallel to row-like nanostructures formed atop Si (114) surfaces (channels having a 90° rotation), whereas Dit is increased by 25% in MOSFETs whose channels are aligned perpendicular to these nanostructures (channels having a 0° rotation). From these results, the special morphology of a high-index Si (114) plane having nanochannels on its surface opens the possibility to reduce the electron-trapping characteristics of MOSFET devices having deep-submicron features and operating at very high frequencies.

  5. Selective Conversion from p-Type to n-Type of Printed Bottom-Gate Carbon Nanotube Thin-Film Transistors and Application in Complementary Metal-Oxide-Semiconductor Inverters.

    Science.gov (United States)

    Xu, Qiqi; Zhao, Jianwen; Pecunia, Vincenzo; Xu, Wenya; Zhou, Chunshan; Dou, Junyan; Gu, Weibing; Lin, Jian; Mo, Lixin; Zhao, Yanfei; Cui, Zheng

    2017-03-30

    The fabrication of printed high-performance and environmentally stable n-type single-walled carbon nanotube (SWCNT) transistors and their integration into complementary (i.e., complementary metal-oxide-semiconductor, CMOS) circuits are widely recognized as key to achieving the full potential of carbon nanotube electronics. Here, we report a simple, efficient, and robust method to convert the polarity of SWCNT thin-film transistors (TFTs) using cheap and readily available ethanolamine as an electron doping agent. Printed p-type bottom-gate SWCNT TFTs can be selectively converted into n-type by deposition of ethanolamine inks on the transistor active region via aerosol jet printing. Resulted n-type TFTs show excellent electrical properties with an on/off ratio of 10(6), effective mobility up to 30 cm(2) V(-1) s(-1), small hysteresis, and small subthreshold swing (90-140 mV dec(-1)), which are superior compared to the original p-type SWCNT devices. The n-type SWCNT TFTs also show good stability in air, and any deterioration of performance due to shelf storage can be fully recovered by a short low-temperature annealing. The easy polarity conversion process allows construction of CMOS circuitry. As an example, CMOS inverters were fabricated using printed p-type and n-type TFTs and exhibited a large noise margin (50 and 103% of 1/2 Vdd = 1 V) and a voltage gain as high as 30 (at Vdd = 1 V). Additionally, the CMOS inverters show full rail-to-rail output voltage swing and low power dissipation (0.1 μW at Vdd = 1 V). The new method paves the way to construct fully functional complex CMOS circuitry by printed TFTs.

  6. High-performance self-aligned inversion-channel In0.53Ga0.47As metal-oxide-semiconductor field-effect-transistors by in-situ atomic-layer-deposited HfO2

    Science.gov (United States)

    Lin, T. D.; Chang, W. H.; Chu, R. L.; Chang, Y. C.; Chang, Y. H.; Lee, M. Y.; Hong, P. F.; Chen, Min-Cheng; Kwo, J.; Hong, M.

    2013-12-01

    Self-aligned inversion-channel In0.53Ga0.47As metal-oxide-semiconductor field-effect-transistors (MOSFETs) have been fabricated using the gate dielectrics of in-situ directly atomic-layer-deposited (ALD) HfO2 followed by ALD-Al2O3. There were no surface pretreatments and no interfacial passivation/barrier layers prior to the ALD. TiN/Al2O3 (4 nm)/HfO2 (1 nm)/In0.53Ga0.47As/InP MOS capacitors exhibited well-behaved capacitance-voltage characteristics with true inversion behavior, low leakage current densities of ˜10-8 A/cm2 at ±1 MV/cm, and thermodynamic stability at high temperatures. Al2O3 (3 nm)/HfO2 (1 nm)/In0.53Ga0.47As MOSFETs of 1 μm gate length, with 700 °C-800 °C rapid thermal annealing in source/drain activation, have exhibited high extrinsic drain current (ID) of 1.5 mA/μm, transconductance (Gm) of 0.84 mS/μm, ION/IOFF of ˜104, low sub-threshold swing of 103 mV/decade, and field-effect electron mobility of 1100 cm2/V . s. The devices have also achieved very high intrinsic ID and Gm of 2 mA/μm and 1.2 mS/μm, respectively.

  7. A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

    Science.gov (United States)

    Jovanović, B.; Brum, R. M.; Torres, L.

    2014-04-01

    After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption.

  8. The Impact of HC1 Precleaning and Sulfur Passivation on the Al2O3/Ge Interface in Ge Metal-Oxide-Semiconductor Capacitors

    Institute of Scientific and Technical Information of China (English)

    XUE Bai-Qing; CHANG Hu-Dong; SUN Bing; WANG Sheng-Kai; LIU Hong-Gang

    2012-01-01

    Surface treatment for Ge substrates using hydrogen chlorine cleaning and chemical passivation are investigated on AuTi/Al2O3/Ge metal-oxide-semiconductor capacitors. After hydrogen chlorine cleaning, a smooth Ge surface almost free from native oxide is demonstrated by atomic force microscopy and x-ray photoelectron spectroscopy observations. Passivation using a hydrogen chlorine solution is found to form a chlorine-terminated surface, while aqueous ammonium sulfide pretreatment results in a surface terminated by Ge-S bonding. Compared with chlorine-passivated samples, the sulfur-passivated ones show less frequency dispersion and better thermal stability based on capacitance-voltage characterizations. The samples with HCl pre-cleaning and (NH4)2S passivation show less frequency dispersion than the HF pre-cleaning and (NH4)2S passivated ones. The surface treatment process using hydrogen chlorine cleaning followed by aqueous ammonium sulfide passivation demonstrates a promising way to improve gate dielectric/Ge interface quality.%Surface treatment for Ge substrates using hydrogen chlorine cleaning and chemical passivation are investigated on AuTi/Al2O3/Ge metal-oxide-semiconductor capacitors.After hydrogen chlorine cleaning,a smooth Ge surface almost free from native oxide is demonstrated by atomic force microscopy and x-ray photoelectron spectroscopy observations.Passivation using a hydrogen chlorine solution is found to form a chlorine-terminated surface,while aqueous ammonium sulfide pretreatment results in a surface terminated by Ge-S bonding.Compared with chlorine-passivated samples,the sulfur-passivated ones show less frequency dispersion and better thermal stability based on capacitance-voltage characterizations.The samples with HCl pre-cleaning and (NH4 )2S passivation show less frequency dispersion than the HF pre-cleaning and (NH4)2S passivated ones.The surface treatment process using hydrogen chlorine cleaning followed by aqueous ammonium sulfide

  9. High temperature behavior of multi-region direct current current-voltage spectroscopy and relationship with shallow-trench-isolation-based high-voltage laterally diffused metal-oxide-semiconductor field-effect-transistors reliability

    Science.gov (United States)

    He, Yandong; Zhang, Ganggang; Zhang, Xing

    2014-01-01

    With the process compatibility with the mainstream standard complementary metal-oxide-semiconductor (CMOS), shallow trench isolation (STI) based laterally diffused metal-oxide-semiconductor (LDMOS) devices have become popular for its better tradeoff between breakdown voltage and performance, especially for smart power applications. A multi-region direct current current-voltage (MR-DCIV) technique with spectroscopic features was demonstrated to map the interface state generation in the channel, accumulation and STI drift regions. High temperature behavior of MR-DCIV spectroscopy was analyzed and a physical model was verified. Degradation of STI-based LDMOS transistors under high temperature reverse bias (HTRB) stress is experimentally studied by MR-DCIV spectroscopy. The impact of interface state location on device electrical characteristics was investigated. Our results show that the major contribution to HTRB degradation, in term of the on-resistance degradation, was attributed to interface state generation under STI drift region.

  10. Determination of active doping in highly resistive boron doped silicon nanocrystals embedded in SiO{sub 2} by capacitance voltage measurement on inverted metal oxide semiconductor structure

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, Tian, E-mail: tianz@student.unsw.edu.au; Puthen-Veettil, Binesh; Wu, Lingfeng; Jia, Xuguang; Lin, Ziyun; Yang, Terry Chien-Jen; Conibeer, Gavin; Perez-Wurfl, Ivan [Australian Centre for Advanced Photovoltaics, UNSW Australia, Kensington, New South Wales 2052 (Australia)

    2015-10-21

    We investigate the Capacitance-Voltage (CV) measurement to study the electrically active boron doping in Si nanocrystals (ncSi) embedded in SiO{sub 2}. The ncSi thin films with high resistivity (200–400 Ω cm) can be measured by using an inverted metal oxide semiconductor (MOS) structure (Al/ncSi (B)/SiO{sub 2}/Si). This device structure eliminates the complications from the effects of lateral current flow and the high sheet resistance in standard lateral MOS structures. The characteristic MOS CV curves observed are consistent with the effective p-type doping. The CV modeling method is presented and used to evaluate the electrically active doping concentration. We find that the highly boron doped ncSi films have electrically active doping of 10{sup 18}–10{sup 19 }cm{sup −3} despite their high resistivity. The saturation of doping at about 1.4 × 10{sup 19 }cm{sup −3} and the low doping efficiency less than 5% are observed and discussed. The calculated effective mobility is in the order of 10{sup −3} cm{sup 2}/V s, indicating strong impurity/defect scattering effect that hinders carriers transport.

  11. Determination of active doping in highly resistive boron doped silicon nanocrystals embedded in SiO2 by capacitance voltage measurement on inverted metal oxide semiconductor structure

    Science.gov (United States)

    Zhang, Tian; Puthen-Veettil, Binesh; Wu, Lingfeng; Jia, Xuguang; Lin, Ziyun; Yang, Terry Chien-Jen; Conibeer, Gavin; Perez-Wurfl, Ivan

    2015-10-01

    We investigate the Capacitance-Voltage (CV) measurement to study the electrically active boron doping in Si nanocrystals (ncSi) embedded in SiO2. The ncSi thin films with high resistivity (200-400 Ω cm) can be measured by using an inverted metal oxide semiconductor (MOS) structure (Al/ncSi (B)/SiO2/Si). This device structure eliminates the complications from the effects of lateral current flow and the high sheet resistance in standard lateral MOS structures. The characteristic MOS CV curves observed are consistent with the effective p-type doping. The CV modeling method is presented and used to evaluate the electrically active doping concentration. We find that the highly boron doped ncSi films have electrically active doping of 1018-1019 cm-3 despite their high resistivity. The saturation of doping at about 1.4 × 1019 cm-3 and the low doping efficiency less than 5% are observed and discussed. The calculated effective mobility is in the order of 10-3 cm2/V s, indicating strong impurity/defect scattering effect that hinders carriers transport.

  12. Effects of substrate voltage on noise characteristics and hole lifetime in SOI metal-oxide-semiconductor field-effect transistor photon detector.

    Science.gov (United States)

    Putranto, Dedy Septono Catur; Priambodo, Purnomo Sidi; Hartanto, Djoko; Du, Wei; Satoh, Hiroaki; Ono, Atsushi; Inokawa, Hiroshi

    2014-09-08

    Low-frequency noise and hole lifetime in silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) are analyzed, considering their use in photon detection based on single-hole counting. The noise becomes minimum at around the transition point between front- and back-channel operations when the substrate voltage is varied, and increases largely on both negative and positive sides of the substrate voltage showing peculiar Lorentzian (generation-recombination) noise spectra. Hole lifetime is evaluated by the analysis of drain current histogram at different substrate voltages. It is found that the peaks in the histogram corresponding to the larger number of stored holes become higher as the substrate bias becomes larger. This can be attributed to the prolonged lifetime caused by the higher electric field inside the body of SOI MOSFET. It can be concluded that, once the inversion channel is induced for detection of the photo-generated holes, the small absolute substrate bias is favorable for short lifetime and low noise, leading to high-speed operation.

  13. Effects of Y incorporation in TaON gate dielectric on electrical performance of GaAs metal-oxide-semiconductor capacitor

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Li Ning; Choi, Hoi Wai; Lai, Pui To [Department of Electrical and Electronic Engineering, The University of Hong Kong (China); Xu, Jing Ping [School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan (China)

    2016-09-15

    In this study, GaAs metal-oxide-semiconductor (MOS) capacitors using Y-incorporated TaON as gate dielectric have been investigated. Experimental results show that the sample with a Y/(Y + Ta) atomic ratio of 27.6% exhibits the best device characteristics: high k value (22.9), low interfacestate density (9.0 x 10{sup 11} cm{sup -2} eV{sup -1}), small flatband voltage (1.05 V), small frequency dispersion and low gate leakage current (1.3 x 10{sup -5}A/cm{sup 2} at V{sub fb} + 1 V). These merits should be attributed to the complementary properties of Y{sub 2}O{sub 3} and Ta{sub 2}O{sub 5}:Y can effectively passivate the large amount of oxygen vacancies in Ta{sub 2}O{sub 5}, while the positively-charged oxygen vacancies in Ta{sub 2}O{sub 5} are capable of neutralizing the effects of the negative oxide charges in Y{sub 2}O{sub 3}. This work demonstrates that an appropriate doping of Y content in TaON gate dielectric can effectively improve the electrical performance for GaAs MOS devices. (copyright 2016 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  14. Thin film three-dimensional topological insulator metal-oxide-semiconductor field-effect-transistors: A candidate for sub-10 nm devices

    Energy Technology Data Exchange (ETDEWEB)

    Akhavan, N. D., E-mail: nima.dehdashti@uwa.edu.au; Jolley, G.; Umana-Membreno, G. A.; Antoszewski, J.; Faraone, L. [Department of Electrical, Electronic and Computer Engineering, University of Western Australia, Crawley, WA 6009 (Australia)

    2014-08-28

    Three-dimensional (3D) topological insulators (TI) are a new state of quantum matter in which surface states reside in the bulk insulating energy bandgap and are protected by time-reversal symmetry. It is possible to create an energy bandgap as a consequence of the interaction between the conduction band and valence band surface states from the opposite surfaces of a TI thin film, and the width of the bandgap can be controlled by the thin film thickness. The formation of an energy bandgap raises the possibility of thin-film TI-based metal-oxide-semiconductor field-effect-transistors (MOSFETs). In this paper, we explore the performance of MOSFETs based on thin film 3D-TI structures by employing quantum ballistic transport simulations using the effective continuous Hamiltonian with fitting parameters extracted from ab-initio calculations. We demonstrate that thin film transistors based on a 3D-TI structure provide similar electrical characteristics compared to a Si-MOSFET for gate lengths down to 10 nm. Thus, such a device can be a potential candidate to replace Si-based MOSFETs in the sub-10 nm regime.

  15. Mechanical Stress Evaluation of Si Metal-Oxide-Semiconductor Field-Effect Transistor Structure Using Polarized Ultraviolet Raman Spectroscopy Measurements and Calibrated Technology-Computer-Aided-Design Simulations

    Science.gov (United States)

    Satoh, Akira; Tada, Tetsuya; Poborchii, Vladimir; Kanayama, Toshihiko; Satoh, Shigeo; Arimoto, Hiroshi

    2012-01-01

    The mechanical stresses in Si metal-oxide-semiconductor field-effect transistors (MOSFETs) were evaluated by polarized UV Raman spectroscopy measurements and stress simulations. To calibrate stress parameters of the materials used in the Si MOSFETs, we compared measured and simulated Raman frequency shifts on the cleaved Si(110) surfaces of the MOSFETs. Consequently, we extracted intrinsic stress values of -400 MPa for a SiO2, -200 MPa for polycrystalline Si (poly-Si), 700 MPa for Ni silicide, 1250 MPa for a SiN tensile stress liner, and -3500 MPa for a SiN compressive stress liner by finding good agreement between the measured and simulated Raman shift distributions. To verify our stress simulation, we investigated the source/drain width dependences of Raman frequency shifts near the channel regions of Si MOSFETs by top-view Raman measurements. The calculated Raman frequency shifts agreed well with the results of polarized Raman measurements in terms of not only relative tendencies but also absolute Raman shift values.

  16. Strained Germanium-Tin (GeSn) P-Channel Metal-Oxide-Semiconductor Field-Effect Transistors Featuring High Effective Hole Mobility

    Science.gov (United States)

    Liu, Yan; Yan, Jing; Wang, Hongjuan; Cheng, Buwen; Han, Genquan

    2015-06-01

    Compressively strained and p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) are fabricated with low-temperature surface passivation. High crystallinity GeSn films epitaxially grown on a Ge(001) substrate are used for the device fabrication. The impacts of the Sn composition on the subthreshold swing , threshold voltage , on-state current , and effective hole mobility of the devices are investigated. GeSn pMOSFETs with different Sn compositions show a similar , indicating almost the same midgap density of interface states . A positive shift of with an increase of the Sn composition is observed. A pMOSFET exhibits a significant improvement in as compared to a device with a lower Sn composition, which is due to the superior hole mobility in a device with a higher Sn composition. pMOSFETs achieve a peak effective hole mobility of , which is much higher than that of devices. The enhancement of the compressive strain and chemical effect in the channel region with increased Sn composition leads to an improvement of.

  17. An accurate simulation study on capacitance-voltage characteristics of metal-oxide-semiconductor field-effect transistors in novel structures

    Science.gov (United States)

    Yu, Eunseon; Cho, Seongjae; Park, Byung-Gook

    2017-09-01

    An essential and important method for physical and electrical characterization of a metal-oxide-semiconductor (MOS) structure is the capacitance-voltage (C-V) measurement. Judging from the C-V characteristics of a MOS structure, we are allowed to predict the DC and AC behaviors of the field-effect transistor and extract a set of primary parameters. The MOS field-effect transistor (MOSFET) technology has evolved to enhance the gate controllability over the channel in order for effectively suppressing the short-channel effects (SCEs) unwantedly taking place as device scaling progresses. For the goal, numerous novel structures have been suggested for the advanced MOSFET devices. However, the C-V characteristics of such novel MOS structures have not been seldom studied in depth. In this work, we report the C-V characteristics of ultra-thin-body (UTB) MOSFETs on the bulk Si and silicon-on-insulator (SOI) substrates by rigorous technology computer-aided design (TCAD) simulation. For higher credibility and accuracy, quantum-mechanical models are activated and empirical material parameters are employed from the existing literature. The MOSFET structure and the material configurations are schemed referring advanced logic technology suggested by the most recent technology roadmap. The C-V characteristics of UTB MOSFETs having a floating body with extremely small volume are closely investigated.

  18. Note: A disposable x-ray camera based on mass produced complementary metal-oxide-semiconductor sensors and single-board computers

    Energy Technology Data Exchange (ETDEWEB)

    Hoidn, Oliver R.; Seidler, Gerald T., E-mail: seidler@uw.edu [Physics Department, University of Washington, Seattle, Washington 98195 (United States)

    2015-08-15

    We have integrated mass-produced commercial complementary metal-oxide-semiconductor (CMOS) image sensors and off-the-shelf single-board computers into an x-ray camera platform optimized for acquisition of x-ray spectra and radiographs at energies of 2–6 keV. The CMOS sensor and single-board computer are complemented by custom mounting and interface hardware that can be easily acquired from rapid prototyping services. For single-pixel detection events, i.e., events where the deposited energy from one photon is substantially localized in a single pixel, we establish ∼20% quantum efficiency at 2.6 keV with ∼190 eV resolution and a 100 kHz maximum detection rate. The detector platform’s useful intrinsic energy resolution, 5-μm pixel size, ease of use, and obvious potential for parallelization make it a promising candidate for many applications at synchrotron facilities, in laser-heating plasma physics studies, and in laboratory-based x-ray spectrometry.

  19. Achievement of low parasitic resistance in Ge n-channel metal-oxide-semiconductor field-effect transistor using an embedded TiN-source/drain structure

    Science.gov (United States)

    Nagatomi, Y.; Tateyama, T.; Tanaka, S.; Yamamoto, K.; Wang, D.; Nakashima, H.

    2017-03-01

    We investigated the source/drain (S/D) parasitic resistance (R P) of a Ge n-channel metal-oxide-semiconductor field-effect transistor (n-MOSFET) with TiN-S/D. The R P was as high as ∼1400 Ω, which is attributed to a very thin amorphous interlayer (a-IL) at a TiN/Ge interface. To solve this problem, n-MOSFETs with an embedded S/D structure were fabricated, of which the S/D was formed by the etching of a Ge layer using 0.03%-H2O2 solution followed by TiN sputter deposition. The electrical performances were investigated for devices with etching depths in the range of 2–22 nm. The devices with etching depths of 2–5 nm did not work. The devices with etching depths of 12–15 nm showed a quite normal transistor operation, and the R P was as low as ∼130 Ω, which is comparable to that of a p-MOSFET with PtGe-S/D. However, R Ps of the devices with etching depths of ∼22 nm was considerably high. The reason for these results is discussed on the basis of an a-IL formation at the sidewall of the engraved S/D region.

  20. Radiofrequency current source (RFCS) drive and decoupling technique for parallel transmit arrays using a high-power metal oxide semiconductor field-effect transistor (MOSFET).

    Science.gov (United States)

    Lee, Wonje; Boskamp, Eddy; Grist, Thomas; Kurpad, Krishna

    2009-07-01

    A radiofrequency current source (RFCS) design using a high-power metal oxide semiconductor field effect transistor (MOSFET) that enables independent current control for parallel transmit applications is presented. The design of an RFCS integrated with a series tuned transmitting loop and its associated control circuitry is described. The current source is operated in a gated class AB push-pull configuration for linear operation at high efficiency. The pulsed RF current amplitude driven into the low impedance transmitting loop was found to be relatively insensitive to the various loaded loop impedances ranging from 0.4 to 10.3 ohms, confirming current mode operation. The suppression of current induced by a neighboring loop was quantified as a function of center-to-center loop distance, and was measured to be 17 dB for nonoverlapping, adjacent loops. Deterministic manipulation of the B(1) field pattern was demonstrated by the independent control of RF phase and amplitude in a head-sized two-channel volume transmit array. It was found that a high-voltage rated RF power MOSFET with a minimum load resistance, exhibits current source behavior, which aids in transmit array design.

  1. Gate length and temperature dependence of negative differential transconductance in silicon quantum well metal-oxide-semiconductor field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Naquin, Clint; Lee, Mark [Department of Physics, University of Texas at Dallas, Richardson, Texas 75080 (United States); Edwards, Hal; Mathur, Guru; Chatterjee, Tathagata; Maggio, Ken [Texas Instruments Inc., Richardson, Texas 75243 (United States)

    2015-09-28

    Introducing quantum transport into silicon transistors in a manner compatible with industrial fabrication has the potential to transform the performance horizons of large scale integrated silicon devices and circuits. Explicit quantum transport as evidenced by negative differential transconductances (NDTCs) has been observed in a set of quantum well (QW) transistors fabricated using industrial silicon complementary metal-oxide-semiconductor processing. Detailed gate length and temperature dependence characteristics of the NDTCs in these devices have been measured. The QW potential was formed via lateral ion implantation doping on a commercial 45 nm technology node process line, and measurements of the transfer characteristics show NDTCs up to room temperature. Gate length dependence of NDTCs shows a correlation of the interface channel length with the number of NDTCs formed as well as with the gate voltage (V{sub G}) spacing between NDTCs. The V{sub G} spacing between multiple NDTCs suggests a quasi-parabolic QW potential profile. The temperature dependence is consistent with partial freeze-out of carrier concentration against a degenerately doped background.

  2. Modeling of anisotropic two-dimensional materials monolayer HfS{sub 2} and phosphorene metal-oxide semiconductor field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Chang, Jiwon [SEMATECH, 257 Fuller Rd #2200, Albany, New York 12203 (United States)

    2015-06-07

    Ballistic transport characteristics of metal-oxide semiconductor field effect transistors (MOSFETs) based on anisotropic two-dimensional materials monolayer HfS{sub 2} and phosphorene are explored through quantum transport simulations. We focus on the effects of the channel crystal orientation and the channel length scaling on device performances. Especially, the role of degenerate conduction band (CB) valleys in monolayer HfS{sub 2} is comprehensively analyzed. Benchmarking monolayer HfS{sub 2} with phosphorene MOSFETs, we predict that the effect of channel orientation on device performances is much weaker in monolayer HfS{sub 2} than in phosphorene due to the degenerate CB valleys of monolayer HfS{sub 2}. Our simulations also reveal that at 10 nm channel length scale, phosphorene MOSFETs outperform monolayer HfS{sub 2} MOSFETs in terms of the on-state current. However, it is observed that monolayer HfS{sub 2} MOSFETs may offer comparable, but a little bit degraded, device performances as compared with phosphorene MOSFETs at 5 nm channel length.

  3. The role of the substrate on the dispersion in accumulation in III-V compound semiconductor based metal-oxide-semiconductor gate stacks

    Energy Technology Data Exchange (ETDEWEB)

    Krylov, Igor, E-mail: krylov@tx.technion.ac.il [The Russell Berrie Nanotechnology Institute, Technion – Israel Institute of Technology, Haifa 32000 (Israel); Ritter, Dan [The Russell Berrie Nanotechnology Institute, Technion – Israel Institute of Technology, Haifa 32000 (Israel); Department of Electrical Engineering, Technion – Israel Institute of Technology, Haifa 32000 (Israel); Eizenberg, Moshe [The Russell Berrie Nanotechnology Institute, Technion – Israel Institute of Technology, Haifa 32000 (Israel); Department of Materials Science and Engineering, Technion – Israel Institute of Technology, Haifa 32000 (Israel)

    2015-09-07

    Dispersion in accumulation is a widely observed phenomenon in metal-oxide-semiconductor gate stacks based on III-V compound semiconductors. The physical origin of this phenomenon is attributed to border traps located in the dielectric material adjacent to the semiconductor. Here, we study the role of the semiconductor substrate on the electrical quality of the first layers at atomic layer deposited (ALD) dielectrics. For this purpose, either Al{sub 2}O{sub 3} or HfO{sub 2} dielectrics with variable thicknesses were deposited simultaneously on two technology important semiconductors—InGaAs and InP. Significantly larger dispersion was observed in InP based gate stacks compared to those based on InGaAs. The observed difference is attributed to a higher border trap density in dielectrics deposited on InP compared to those deposited on InGaAs. We therefore conclude that the substrate plays an important role in the determination of the electrical quality of the first dielectric monolayers deposited by ALD. An additional observation is that larger dispersion was obtained in HfO{sub 2} based capacitors compared to Al{sub 2}O{sub 3} based capacitors, deposited on the same semiconductor. This phenomenon is attributed to the lower conduction band offset rather than to a higher border trap density.

  4. GaAs metal-oxide-semiconductor based non-volatile flash memory devices with InAs quantum dots as charge storage nodes

    Energy Technology Data Exchange (ETDEWEB)

    Islam, Sk Masiul, E-mail: masiulelt@gmail.com; Chowdhury, Sisir; Sarkar, Krishnendu; Nagabhushan, B.; Banerji, P. [Materials Science Centre, Indian Institute of Technology, Kharagpur 721 302 (India); Chakraborty, S. [Applied Materials Science Division, Saha Institute of Nuclear Physics, 1/AF Bidhannagar, Sector-I, Kolkata 700 064 (India); Mukherjee, Rabibrata [Department of Chemical Engineering, Indian Institute of Technology, Kharagpur 721302 (India)

    2015-06-24

    Ultra-thin InP passivated GaAs metal-oxide-semiconductor based non-volatile flash memory devices were fabricated using InAs quantum dots (QDs) as charge storing elements by metal organic chemical vapor deposition technique to study the efficacy of the QDs as charge storage elements. The grown QDs were embedded between two high-k dielectric such as HfO{sub 2} and ZrO{sub 2}, which were used for tunneling and control oxide layers, respectively. The size and density of the QDs were found to be 5 nm and 1.8×10{sup 11} cm{sup −2}, respectively. The device with a structure Metal/ZrO{sub 2}/InAs QDs/HfO{sub 2}/GaAs/Metal shows maximum memory window equivalent to 6.87 V. The device also exhibits low leakage current density of the order of 10{sup −6} A/cm{sup 2} and reasonably good charge retention characteristics. The low value of leakage current in the fabricated memory device is attributed to the Coulomb blockade effect influenced by quantum confinement as well as reduction of interface trap states by ultra-thin InP passivation on GaAs prior to HfO{sub 2} deposition.

  5. Monolithic integration of a silicon nanowire field-effect transistors array on a complementary metal-oxide semiconductor chip for biochemical sensor applications.

    Science.gov (United States)

    Livi, Paolo; Kwiat, Moria; Shadmani, Amir; Pevzner, Alexander; Navarra, Giulio; Rothe, Jörg; Stettler, Alexander; Chen, Yihui; Patolsky, Fernando; Hierlemann, Andreas

    2015-10-06

    We present a monolithic complementary metal-oxide semiconductor (CMOS)-based sensor system comprising an array of silicon nanowire field-effect transistors (FETs) and the signal-conditioning circuitry on the same chip. The silicon nanowires were fabricated by chemical vapor deposition methods and then transferred to the CMOS chip, where Ti/Pd/Ti contacts had been patterned via e-beam lithography. The on-chip circuitry measures the current flowing through each nanowire FET upon applying a constant source-drain voltage. The analog signal is digitized on chip and then transmitted to a receiving unit. The system has been successfully fabricated and tested by acquiring I-V curves of the bare nanowire-based FETs. Furthermore, the sensing capabilities of the complete system have been demonstrated by recording current changes upon nanowire exposure to solutions of different pHs, as well as by detecting different concentrations of Troponin T biomarkers (cTnT) through antibody-functionalized nanowire FETs.

  6. Potentiometric Dye Imaging for Pheochromocytoma and Cortical Neurons with a Novel Measurement System Using an Integrated Complementary Metal-Oxide-Semiconductor Imaging Device

    Science.gov (United States)

    Kobayashi, Takuma; Tagawa, Ayato; Noda, Toshihiko; Sasagawa, Kiyotaka; Tokuda, Takashi; Hatanaka, Yumiko; Tamura, Hideki; Ishikawa, Yasuyuki; Shiosaka, Sadao; Ohta, Jun

    2010-11-01

    The combination of optical imaging with voltage-sensitive dyes is a powerful tool for studying the spatiotemporal patterns of neural activity and understanding the neural networks of the brain. To visualize the potential status of multiple neurons simultaneously using a compact instrument with high density and a wide range, we present a novel measurement system using an implantable biomedical photonic LSI device with a red absorptive light filter for voltage-sensitive dye imaging (BpLSI-red). The BpLSI-red was developed for sensing fluorescence by the on-chip LSI, which was designed by using complementary metal-oxide-semiconductor (CMOS) technology. A micro-electro-mechanical system (MEMS) microfabrication technique was used to postprocess the CMOS sensor chip; light-emitting diodes (LEDs) were integrated for illumination and to enable long-term cell culture. Using the device, we succeeded in visualizing the membrane potential of 2000-3000 cells and the process of depolarization of pheochromocytoma cells (PC12 cells) and mouse cerebral cortical neurons in a primary culture with cellular resolution. Therefore, our measurement application enables the detection of multiple neural activities simultaneously.

  7. Temperature dependence of frequency dispersion in III–V metal-oxide-semiconductor C-V and the capture/emission process of border traps

    Energy Technology Data Exchange (ETDEWEB)

    Vais, Abhitosh, E-mail: Abhitosh.Vais@imec.be; Martens, Koen; DeMeyer, Kristin [Department of Electrical Engineering, KU Leuven, B-3000 Leuven (Belgium); IMEC, Kapeldreef 75, B-3001 Leuven (Belgium); Lin, Han-Chung; Ivanov, Tsvetan; Collaert, Nadine; Thean, Aaron [IMEC, Kapeldreef 75, B-3001 Leuven (Belgium); Dou, Chunmeng [Frontier Research Center, Tokyo Institute of Technology, Yokohama 226-8502 (Japan); Xie, Qi; Maes, Jan [ASM International, B-3001 Leuven (Belgium); Tang, Fu; Givens, Michael [ASM International, Phoenix, Arizona 85034-7200 (United States); Raskin, Jean-Pierre [Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Universiteé Catholique de Louvain, B-1348 Louvain-la-Neuve (Belgium)

    2015-08-03

    This paper presents a detailed investigation of the temperature dependence of frequency dispersion observed in capacitance-voltage (C-V) measurements of III-V metal-oxide-semiconductor (MOS) devices. The dispersion in the accumulation region of the capacitance data is found to change from 4%–9% (per decade frequency) to ∼0% when the temperature is reduced from 300 K to 4 K in a wide range of MOS capacitors with different gate dielectrics and III-V substrates. We show that such significant temperature dependence of C-V frequency dispersion cannot be due to the temperature dependence of channel electrostatics, i.e., carrier density and surface potential. We also show that the temperature dependence of frequency dispersion, and hence, the capture/emission process of border traps can be modeled by a combination of tunneling and a “temperature-activated” process described by a non-radiative multi-phonon model, instead of a widely believed single-step elastic tunneling process.

  8. Optimization of Vertical Double-Diffused Metal-Oxide Semiconductor (VDMOS) Power Transistor Structure for Use in High Frequencies and Medical Devices.

    Science.gov (United States)

    Farhadi, Rozita; Farhadi, Bita

    2014-01-01

    Power transistors, such as the vertical, double-diffused, metal-oxide semiconductor (VDMOS), are used extensively in the amplifier circuits of medical devices. The aim of this research was to construct a VDMOS power transistor with an optimized structure to enhance the operation of medical devices. First, boron was implanted in silicon by implanting unclamped inductive switching (UIS) and a Faraday shield. The Faraday shield was implanted in order to replace the gate-field parasitic capacitor on the entry part of the device. Also, implanting the UIS was used in order to decrease the effect of parasitic bipolar junction transistor (BJT) of the VDMOS power transistor. The research tool used in this study was Silvaco software. By decreasing the transistor entry resistance in the optimized VDMOS structure, power losses and noise at the entry of the transistor were decreased, and, by increasing the breakdown voltage, the lifetime of the VDMOS transistor lifetime was increased, which resulted in increasing drain flow and decreasing Ron. This consequently resulted in enhancing the operation of high-frequency medical devices that use transistors, such as Radio Frequency (RF) and electrocardiograph machines.

  9. Investigation of Device Performance and Negative Bias Temperature Instability of Plasma Nitrided Oxide in Nanoscale p-Channel Metal-Oxide-Semiconductor Field-Effect Transistor's

    Science.gov (United States)

    Han, In-Shik; Ji, Hee-Hwan; Goo, Tae-Gyu; Yoo, Ook-Sang; Choi, Won-Ho; Na, Min-Ki; Kim, Yong-Goo; Park, Sung-Hyung; Lee, Heui-Seung; Kang, Young-Seok; Kim, Dae-Byung; Lee, Hi-Deok

    2008-04-01

    In this paper, we investigated the device performance and negative bias temperature instability (NBTI) degradation for thermally nitrided oxide (TNO) and plasma nitrided oxide (PNO) in nanoscale p-channel metal oxide semiconductor field effect transistor (PMOSFET). PNOs show the improvement of dielectric performance compared to TNO with no change of the device performance. PNOs also show the improvement of NBTI immunity than TNO at low temperature stress, whereas NBTI immunity of PNO with high N concentration can be worse than TNO at high temperature stress. Recovery effect of NBTI degradation of PNO is lower than that of TNO and it is increased as the N concentration is increased in PNO because the dissociated Si dangling bonds and generated positive oxide charges are repassivated and neutralized, respectively. Moreover, complete recovery of ΔVth is dominated by neutralization of positive oxide charges. Therefore, N contents at polycrystalline Si/SiO2 interface as well as N contents at Si/SiO2 interface can affect significantly on NBTI degradation and recovery effect.

  10. Real time in vivo imaging and measurement of serine protease activity in the mouse hippocampus using a dedicated complementary metal-oxide semiconductor imaging device.

    Science.gov (United States)

    Ng, David C; Tamura, Hideki; Tokuda, Takashi; Yamamoto, Akio; Matsuo, Masamichi; Nunoshita, Masahiro; Ishikawa, Yasuyuki; Shiosaka, Sadao; Ohta, Jun

    2006-09-30

    The aim of the present study is to demonstrate the application of complementary metal-oxide semiconductor (CMOS) imaging technology for studying the mouse brain. By using a dedicated CMOS image sensor, we have successfully imaged and measured brain serine protease activity in vivo, in real-time, and for an extended period of time. We have developed a biofluorescence imaging device by packaging the CMOS image sensor which enabled on-chip imaging configuration. In this configuration, no optics are required whereby an excitation filter is applied onto the sensor to replace the filter cube block found in conventional fluorescence microscopes. The fully packaged device measures 350 microm thick x 2.7 mm wide, consists of an array of 176 x 144 pixels, and is small enough for measurement inside a single hemisphere of the mouse brain, while still providing sufficient imaging resolution. In the experiment, intraperitoneally injected kainic acid induced upregulation of serine protease activity in the brain. These events were captured in real time by imaging and measuring the fluorescence from a fluorogenic substrate that detected this activity. The entire device, which weighs less than 1% of the body weight of the mouse, holds promise for studying freely moving animals.

  11. Dual Metal/High-k Gate-Last Complementary Metal-Oxide-Semiconductor Field-Effect Transistor with SiBN Film and Characteristic Behavior In Sub-1-nm Equivalent Oxide Thickness

    Science.gov (United States)

    Kikuchi, Yoshiaki; Wakabayashi, Hitoshi; Tsukamoto, Masanori; Nagashima, Naoki

    2011-08-01

    For the first time, dual metal/high-k gate-last complementary metal-oxide-semiconductor field-effect transistors (CMOSFETs) with low-dielectric-constant-material offset spacers and several gate oxide thicknesses were fabricated to improve CMOSFETs characteristics. Improvements of 23 aF/µm in parasitic capacitances were confirmed with a low-dielectric-constant material, and drive current improvements were also achieved with a thin gate oxide. The drive currents at 100 nA/µm off leakages in n-type metal-oxide-semiconductor (NMOS) were improved from 830 to 950 µA/µm and that in p-type metal-oxide-semiconductor (PMOS) were from 405 to 450 µA/µm with a reduction in gate oxide thickness. The thin gate oxide in PMOS was thinner than that in NMOS and the gate leakage was increased. However the gate leakage did not affect the off leakage below a gate length of about 44 nm. On the basis of this result, in these gate-last CMOSFETs, it is concluded that the transistors have potential for further reduction of the equivalent oxide thickness without an increase in off leakages at short gate lengths for high off leakage CMOSFETs. For low off leakage CMOSFETs, the optimization of wet process condition is needed to prevent the reduction of the 2 nm HfO2 thickness in PMOS during a wet process.

  12. Meat Quality Assessment by Electronic Nose (Machine Olfaction Technology

    Directory of Open Access Journals (Sweden)

    Sundar Balasubramanian

    2009-07-01

    Full Text Available Over the last twenty years, newly developed chemical sensor systems (so called “electronic noses” have made odor analyses possible. These systems involve various types of electronic chemical gas sensors with partial specificity, as well as suitable statistical methods enabling the recognition of complex odors. As commercial instruments have become available, a substantial increase in research into the application of electronic noses in the evaluation of volatile compounds in food, cosmetic and other items of everyday life is observed. At present, the commercial gas sensor technologies comprise metal oxide semiconductors, metal oxide semiconductor field effect transistors, organic conducting polymers, and piezoelectric crystal sensors. Further sensors based on fibreoptic, electrochemical and bi-metal principles are still in the developmental stage. Statistical analysis techniques range from simple graphical evaluation to multivariate analysis such as artificial neural network and radial basis function. The introduction of electronic noses into the area of food is envisaged for quality control, process monitoring, freshness evaluation, shelf-life investigation and authenticity assessment. Considerable work has already been carried out on meat, grains, coffee, mushrooms, cheese, sugar, fish, beer and other beverages, as well as on the odor quality evaluation of food packaging material. This paper describes the applications of these systems for meat quality assessment, where fast detection methods are essential for appropriate product management. The results suggest the possibility of using this new technology in meat handling.

  13. Impact of GaN cap on charges in Al₂O₃/(GaN/)AlGaN/GaN metal-oxide-semiconductor heterostructures analyzed by means of capacitance measurements and simulations

    Energy Technology Data Exchange (ETDEWEB)

    Ťapajna, M., E-mail: milan.tapajna@savba.sk; Jurkovič, M.; Válik, L.; Haščík, Š.; Gregušová, D.; Kuzmík, J. [Institute of Electrical Engineering, Slovak Academy of Sciences, Dúbravská cesta 9, 841 04 Bratislava (Slovakia); Brunner, F.; Cho, E.-M. [Ferdinand-Braun-Institut, Leibniz Institut für Höchstfrequenztechnik, Gustav-Kirchhoff-Strasse 4, 12489 Berlin (Germany); Hashizume, T. [Research Center for Integrated Quantum Electronics (RCIQE), Hokkaido University, 060-0814 Sapporo, Japan and JST-CREST, 102-0075 Tokyo (Japan)

    2014-09-14

    Oxide/semiconductor interface trap density (D{sub it}) and net charge of Al₂O₃/(GaN)/AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistor (MOS-HEMT) structures with and without GaN cap were comparatively analyzed using comprehensive capacitance measurements and simulations. D{sub it} distribution was determined in full band gap of the barrier using combination of three complementary capacitance techniques. A remarkably higher D{sub it} (∼5–8 × 10¹²eV⁻¹ cm⁻²) was found at trap energies ranging from EC-0.5 to 1 eV for structure with GaN cap compared to that (D{sub it} ∼ 2–3 × 10¹²eV⁻¹ cm⁻²) where the GaN cap was selectively etched away. D{sub it} distributions were then used for simulation of capacitance-voltage characteristics. A good agreement between experimental and simulated capacitance-voltage characteristics affected by interface traps suggests (i) that very high D{sub it} (>10¹³eV⁻¹ cm⁻²) close to the barrier conduction band edge hampers accumulation of free electron in the barrier layer and (ii) the higher D{sub it} centered about EC-0.6 eV can solely account for the increased C-V hysteresis observed for MOS-HEMT structure with GaN cap. Analysis of the threshold voltage dependence on Al₂O₃ thickness for both MOS-HEMT structures suggests that (i) positive charge, which compensates the surface polarization, is not necessarily formed during the growth of III-N heterostructure, and (ii) its density is similar to the total surface polarization charge of the GaN/AlGaN barrier, rather than surface polarization of the top GaN layer only. Some constraints for the positive surface compensating charge are discussed.

  14. Ge0.83Sn0.17 p-channel metal-oxide-semiconductor field-effect transistors: Impact of sulfur passivation on gate stack quality

    Science.gov (United States)

    Lei, Dian; Wang, Wei; Zhang, Zheng; Pan, Jisheng; Gong, Xiao; Liang, Gengchiau; Tok, Eng-Soon; Yeo, Yee-Chia

    2016-01-01

    The effect of room temperature sulfur passivation of the surface of Ge0.83Sn0.17 prior to high-k dielectric (HfO2) deposition is investigated. X-ray photoelectron spectroscopy (XPS) was used to examine the chemical bonding at the interface of HfO2 and Ge0.83Sn0.17. Sulfur passivation is found to be effective in suppressing the formation of both Ge oxides and Sn oxides. A comparison of XPS results for sulfur-passivated and non-passivated Ge0.83Sn0.17 samples shows that sulfur passivation of the GeSn surface could also suppress the surface segregation of Sn atoms. In addition, sulfur passivation reduces the interface trap density Dit at the high-k dielectric/Ge0.83Sn0.17 interface from the valence band edge to the midgap of Ge0.83Sn0.17, as compared with a non-passivated control. The impact of the improved Dit is demonstrated in Ge0.83Sn0.17 p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs). Ge0.83Sn0.17 p-MOSFETs with sulfur passivation show improved subthreshold swing S, intrinsic transconductance Gm,int, and effective hole mobility μeff as compared with the non-passivated control. At a high inversion carrier density Ninv of 1 × 1013 cm-2, sulfur passivation increases μeff by 25% in Ge0.83Sn0.17 p-MOSFETs.

  15. Sample size requirements for estimating effective dose from computed tomography using solid-state metal-oxide-semiconductor field-effect transistor dosimetry

    Science.gov (United States)

    Trattner, Sigal; Cheng, Bin; Pieniazek, Radoslaw L.; Hoffmann, Udo; Douglas, Pamela S.; Einstein, Andrew J.

    2014-01-01

    Purpose: Effective dose (ED) is a widely used metric for comparing ionizing radiation burden between different imaging modalities, scanners, and scan protocols. In computed tomography (CT), ED can be estimated by performing scans on an anthropomorphic phantom in which metal-oxide-semiconductor field-effect transistor (MOSFET) solid-state dosimeters have been placed to enable organ dose measurements. Here a statistical framework is established to determine the sample size (number of scans) needed for estimating ED to a desired precision and confidence, for a particular scanner and scan protocol, subject to practical limitations. Methods: The statistical scheme involves solving equations which minimize the sample size required for estimating ED to desired precision and confidence. It is subject to a constrained variation of the estimated ED and solved using the Lagrange multiplier method. The scheme incorporates measurement variation introduced both by MOSFET calibration, and by variation in MOSFET readings between repeated CT scans. Sample size requirements are illustrated on cardiac, chest, and abdomen–pelvis CT scans performed on a 320-row scanner and chest CT performed on a 16-row scanner. Results: Sample sizes for estimating ED vary considerably between scanners and protocols. Sample size increases as the required precision or confidence is higher and also as the anticipated ED is lower. For example, for a helical chest protocol, for 95% confidence and 5% precision for the ED, 30 measurements are required on the 320-row scanner and 11 on the 16-row scanner when the anticipated ED is 4 mSv; these sample sizes are 5 and 2, respectively, when the anticipated ED is 10 mSv. Conclusions: Applying the suggested scheme, it was found that even at modest sample sizes, it is feasible to estimate ED with high precision and a high degree of confidence. As CT technology develops enabling ED to be lowered, more MOSFET measurements are needed to estimate ED with the same

  16. Study of the Physics of Insulating Films as Related to the Reliability of Metal-Oxide-Semiconductor (MOS) Devices

    Science.gov (United States)

    1981-06-01

    which should rapidly develop in the 1980’s. The EAROMs described here may evolve into pure non-volatile random-access-memories ( NVRAMs ) if the cycling...substrate-Si interface. Future uses of DEIS stacks with or without faster switching times may be in the area of non-volatile random access memory ( NVRAM

  17. Equivalent oxide thickness scaling of Al2O3/Ge metal-oxide-semiconductor capacitors with ozone post oxidation

    Institute of Scientific and Technical Information of China (English)

    Sun Jia-Bao; Yang Zhou-Wei; Geng Yang; Lu Hong-Liang; Wu Wang-Ran; Ye Xiang-Dong; David Zhang Wei

    2013-01-01

    Aluminum-oxide films deposited as gate dielectrics on germanium (Ge) by atomic layer deposition were post oxidized in an ozone atmosphere.No additional interracial layer was detected by the high-resolution cross-sectional transmission electron microscopy and X-ray photoelectron spectroscopy measurements made after the ozone post oxidation (OPO) treatment.Decreases in the equivalent oxide thickness of the OPO-treated Al2O3/Ge MOS capacitors were confirmed.Furthermore,a continuous decrease in the gate leakage current was achieved with increasing OPO treatment time.The results can be attributed to the film quality having been improved by the OPO treatment.

  18. Biological Agent Sensing Integrated Circuit (BASIC): A New Complementary Metal-oxide-semiconductor (CMOS) Magnetic Biosensor System

    OpenAIRE

    2014-01-01

    Fast and accurate diagnosis is always in demand by modern medical professionals and in the area of national defense. At present, limitations of testing speed, sample conditions, and levels of precision exist under current technologies, which are usually slow and involve testing the specimen under laboratory conditions. Typically, these methods also involve several biochemical processing steps and subsequent detection of low energy luminescence or electrical changes, all of which reduce the sp...

  19. Image stacking approach to increase sensitivity of fluorescence detection using a low cost complementary metal-oxide-semiconductor (CMOS) webcam.

    Science.gov (United States)

    Balsam, Joshua; Bruck, Hugh Alan; Kostov, Yordan; Rasooly, Avraham

    2012-01-01

    Optical technologies are important for biological analysis. Current biomedical optical analyses rely on high-cost, high-sensitivity optical detectors such as photomultipliers, avalanched photodiodes or cooled CCD cameras. In contrast, Webcams, mobile phones and other popular consumer electronics use lower-sensitivity, lower-cost optical components such as photodiodes or CMOS sensors. In order for consumer electronics devices, such as webcams, to be useful for biomedical analysis, they must have increased sensitivity. We combined two strategies to increase the sensitivity of CMOS-based fluorescence detector. We captured hundreds of low sensitivity images using a Webcam in video mode, instead of a single image typically used in cooled CCD devices.We then used a computational approach consisting of an image stacking algorithm to remove the noise by combining all of the images into a single image. While video mode is widely used for dynamic scene imaging (e.g. movies or time-lapse photography), it is not used to capture a single static image, which removes noise and increases sensitivity by more than thirty fold. The portable, battery-operated Webcam-based fluorometer system developed here consists of five modules: (1) a low cost CMOS Webcam to monitor light emission, (2) a plate to perform assays, (3) filters and multi-wavelength LED illuminator for fluorophore excitation, (4) a portable computer to acquire and analyze images, and (5) image stacking software for image enhancement. The samples consisted of various concentrations of fluorescein, ranging from 30 μM to 1000 μM, in a 36-well miniature plate. In the single frame mode, the fluorometer's limit-of-detection (LOD) for fluorescein is ∼1000 μM, which is relatively insensitive. However, when used in video mode combined with image stacking enhancement, the LOD is dramatically reduced to 30 μM, sensitivity which is similar to that of state-of-the-art ELISA plate photomultiplier-based readers. Numerous medical

  20. Sustained hole inversion layer in a wide-bandgap metal-oxide semiconductor with enhanced tunnel current.

    Science.gov (United States)

    Shoute, Gem; Afshar, Amir; Muneshwar, Triratna; Cadien, Kenneth; Barlage, Douglas

    2016-02-04

    Wide-bandgap, metal-oxide thin-film transistors have been limited to low-power, n-type electronic applications because of the unipolar nature of these devices. Variations from the n-type field-effect transistor architecture have not been widely investigated as a result of the lack of available p-type wide-bandgap inorganic semiconductors. Here, we present a wide-bandgap metal-oxide n-type semiconductor that is able to sustain a strong p-type inversion layer using a high-dielectric-constant barrier dielectric when sourced with a heterogeneous p-type material. A demonstration of the utility of the inversion layer was also investigated and utilized as the controlling element in a unique tunnelling junction transistor. The resulting electrical performance of this prototype device exhibited among the highest reported current, power and transconductance densities. Further utilization of the p-type inversion layer is critical to unlocking the previously unexplored capability of metal-oxide thin-film transistors, such applications with next-generation display switches, sensors, radio frequency circuits and power converters.

  1. Sustained hole inversion layer in a wide-bandgap metal-oxide semiconductor with enhanced tunnel current

    Science.gov (United States)

    Shoute, Gem; Afshar, Amir; Muneshwar, Triratna; Cadien, Kenneth; Barlage, Douglas

    2016-02-01

    Wide-bandgap, metal-oxide thin-film transistors have been limited to low-power, n-type electronic applications because of the unipolar nature of these devices. Variations from the n-type field-effect transistor architecture have not been widely investigated as a result of the lack of available p-type wide-bandgap inorganic semiconductors. Here, we present a wide-bandgap metal-oxide n-type semiconductor that is able to sustain a strong p-type inversion layer using a high-dielectric-constant barrier dielectric when sourced with a heterogeneous p-type material. A demonstration of the utility of the inversion layer was also investigated and utilized as the controlling element in a unique tunnelling junction transistor. The resulting electrical performance of this prototype device exhibited among the highest reported current, power and transconductance densities. Further utilization of the p-type inversion layer is critical to unlocking the previously unexplored capability of metal-oxide thin-film transistors, such applications with next-generation display switches, sensors, radio frequency circuits and power converters.

  2. Modeling the dark current histogram induced by gold contamination in complementary-metal-oxide-semiconductor image sensors

    Science.gov (United States)

    Domengie, F.; Morin, P.; Bauza, D.

    2015-07-01

    We propose a model for dark current induced by metallic contamination in a CMOS image sensor. Based on Shockley-Read-Hall kinetics, the expression of dark current proposed accounts for the electric field enhanced emission factor due to the Poole-Frenkel barrier lowering and phonon-assisted tunneling mechanisms. To that aim, we considered the distribution of the electric field magnitude and metal atoms in the depth of the pixel. Poisson statistics were used to estimate the random distribution of metal atoms in each pixel for a given contamination dose. Then, we performed a Monte-Carlo-based simulation for each pixel to set the number of metal atoms the pixel contained and the enhancement factor each atom underwent, and obtained a histogram of the number of pixels versus dark current for the full sensor. Excellent agreement with the dark current histogram measured on an ion-implanted gold-contaminated imager has been achieved, in particular, for the description of the distribution tails due to the pixel regions in which the contaminant atoms undergo a large electric field. The agreement remains very good when increasing the temperature by 15 °C. We demonstrated that the amplification of the dark current generated for the typical electric fields encountered in the CMOS image sensors, which depends on the nature of the metal contaminant, may become very large at high electric field. The electron and hole emissions and the resulting enhancement factor are described as a function of the trap characteristics, electric field, and temperature.

  3. Modeling the dark current histogram induced by gold contamination in complementary-metal-oxide-semiconductor image sensors

    Energy Technology Data Exchange (ETDEWEB)

    Domengie, F., E-mail: florian.domengie@st.com; Morin, P. [STMicroelectronics Crolles 2 (SAS), 850 Rue Jean Monnet, 38926 Crolles Cedex (France); Bauza, D. [CNRS, IMEP-LAHC - Grenoble INP, Minatec: 3, rue Parvis Louis Néel, CS 50257, 38016 Grenoble Cedex 1 (France)

    2015-07-14

    We propose a model for dark current induced by metallic contamination in a CMOS image sensor. Based on Shockley-Read-Hall kinetics, the expression of dark current proposed accounts for the electric field enhanced emission factor due to the Poole-Frenkel barrier lowering and phonon-assisted tunneling mechanisms. To that aim, we considered the distribution of the electric field magnitude and metal atoms in the depth of the pixel. Poisson statistics were used to estimate the random distribution of metal atoms in each pixel for a given contamination dose. Then, we performed a Monte-Carlo-based simulation for each pixel to set the number of metal atoms the pixel contained and the enhancement factor each atom underwent, and obtained a histogram of the number of pixels versus dark current for the full sensor. Excellent agreement with the dark current histogram measured on an ion-implanted gold-contaminated imager has been achieved, in particular, for the description of the distribution tails due to the pixel regions in which the contaminant atoms undergo a large electric field. The agreement remains very good when increasing the temperature by 15 °C. We demonstrated that the amplification of the dark current generated for the typical electric fields encountered in the CMOS image sensors, which depends on the nature of the metal contaminant, may become very large at high electric field. The electron and hole emissions and the resulting enhancement factor are described as a function of the trap characteristics, electric field, and temperature.

  4. Interfacial band configuration and electrical properties of LaAlO3/Al2O3/hydrogenated-diamond metal-oxide-semiconductor field effect transistors

    Science.gov (United States)

    Liu, J. W.; Liao, M. Y.; Imura, M.; Oosato, H.; Watanabe, E.; Tanaka, A.; Iwai, H.; Koide, Y.

    2013-08-01

    In order to search a gate dielectric with high permittivity on hydrogenated-diamond (H-diamond), LaAlO3 films with thin Al2O3 buffer layers are fabricated on the H-diamond epilayers by sputtering-deposition (SD) and atomic layer deposition (ALD) techniques, respectively. Interfacial band configuration and electrical properties of the SD-LaAlO3/ALD-Al2O3/H-diamond metal-oxide-semiconductor field effect transistors (MOSFETs) with gate lengths of 10, 20, and 30 μm have been investigated. The valence and conduction band offsets of the SD-LaAlO3/ALD-Al2O3 structure are measured by X-ray photoelectron spectroscopy to be 1.1 ± 0.2 and 1.6 ± 0.2 eV, respectively. The valence band discontinuity between H-diamond and LaAlO3 is evaluated to be 4.0 ± 0.2 eV, showing that the MOS structure acts as the gate which controls a hole carrier density. The leakage current density of the SD-LaAlO3/ALD-Al2O3/H-diamond MOS diode is smaller than 10-8 A cm-2 at gate bias from -4 to 2 V. The capacitance-voltage curve in the depletion mode shows sharp dependence, small flat band voltage, and small hysteresis shift, which implies low positive and trapped charge densities. The MOSFETs show p-type channel and complete normally off characteristics with threshold voltages changing from -3.6 ± 0.1 to -5.0 ± 0.1 V dependent on the gate length. The drain current maximum and the extrinsic transconductance of the MOSFET with gate length of 10 μm are -7.5 mA mm-1 and 2.3 ± 0.1 mS mm-1, respectively. The enhancement mode SD-LaAlO3/ALD-Al2O3/H-diamond MOSFET is concluded to be suitable for the applications of high power and high frequency electrical devices.

  5. Dedicated optoelectronic stochastic parallel processor for real-time image processing: motion-detection demonstration and design of a hybrid complementary-metal-oxide semiconductor- self-electro-optic-device-based prototype.

    Science.gov (United States)

    Cassinelli, A; Chavel, P; Desmulliez, M P

    2001-12-10

    We report experimental results and performance analysis of a dedicated optoelectronic processor that implements stochastic optimization-based image-processing tasks in real time. We first show experimental results using a proof-of-principle-prototype demonstrator based on standard silicon-complementary-metal-oxide-semiconductor (CMOS) technology and liquid-crystal spatial light modulators. We then elaborate on the advantages of using a hybrid CMOS-self-electro-optic-device-based smart-pixel array to monolithically integrate photodetectors and modulators on the same chip, providing compact, high-bandwidth intrachip optoelectronic interconnects. We have modeled the operation of the monolithic processor, clearly showing system-performance improvement.

  6. Micropower electronics

    CERN Document Server

    Keonjian, Edward

    1964-01-01

    Micropower Electronics deals with the operation of modern electronic equipment at micropower levels and the problems associated with micropower electronics. Topics covered include the relations between minimum required power density and frequency response for semiconductor triode amplifiers; physical realization of digital logic circuits; micropower microelectronic subsystems; and metal-oxide-semiconductor field-effect devices for micropower logic circuitry. This book is comprised of 10 chapters and begins with an analysis of fundamental relationships and basic requirements pertinent to the ph

  7. High Performance Electronics on Flexible Silicon

    KAUST Repository

    Sevilla, Galo T.

    2016-09-01

    Over the last few years, flexible electronic systems have gained increased attention from researchers around the world because of their potential to create new applications such as flexible displays, flexible energy harvesters, artificial skin, and health monitoring systems that cannot be integrated with conventional wafer based complementary metal oxide semiconductor processes. Most of the current efforts to create flexible high performance devices are based on the use of organic semiconductors. However, inherent material\\'s limitations make them unsuitable for big data processing and high speed communications. The objective of my doctoral dissertation is to develop integration processes that allow the transformation of rigid high performance electronics into flexible ones while maintaining their performance and cost. In this work, two different techniques to transform inorganic complementary metal-oxide-semiconductor electronics into flexible ones have been developed using industry compatible processes. Furthermore, these techniques were used to realize flexible discrete devices and circuits which include metal-oxide-semiconductor field-effect-transistors, the first demonstration of flexible Fin-field-effect-transistors, and metal-oxide-semiconductors-based circuits. Finally, this thesis presents a new technique to package, integrate, and interconnect flexible high performance electronics using low cost additive manufacturing techniques such as 3D printing and inkjet printing. This thesis contains in depth studies on electrical, mechanical, and thermal properties of the fabricated devices.

  8. Understanding the role of buried interface charges in a metal-oxide-semiconductor stack of Ti/Al{sub 2}O{sub 3}/Si using hard x-ray photoelectron spectroscopy

    Energy Technology Data Exchange (ETDEWEB)

    Church, J. R.; Opila, R. L. [University of Delaware, Newark, Delaware 19711 (United States); Weiland, C. [Synchrotron Research, Inc., Upton, New York 11973 (United States)

    2015-04-27

    Hard X-ray photoelectron spectroscopy (HAXPES) analyses were carried out on metal-oxide-semiconductor (MOS) samples consisting of Si, thick and thin Al{sub 2}O{sub 3}, and a Ti metal cap. Using Si 1s and C 1s core levels for an energy reference, the Al 1s and Si 1s spectra were analyzed to reveal information about the location and roles of charges throughout the MOS layers. With different oxide thicknesses (2 nm and 23 nm), the depth sensitivity of HAXPES is exploited to probe different regions in the MOS structure. Post Ti deposition results indicated unexpected band alignment values between the thin and thick films, which are explained by the behavior of mobile charge within the Al{sub 2}O{sub 3} layer.

  9. Design and control of interface reaction between Al-based dielectrics and AlGaN layer in AlGaN/GaN metal-oxide-semiconductor structures

    Science.gov (United States)

    Watanabe, Kenta; Nozaki, Mikito; Yamada, Takahiro; Nakazawa, Satoshi; Anda, Yoshiharu; Ishida, Masahiro; Ueda, Tetsuzo; Yoshigoe, Akitaka; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

    2017-07-01

    Important clues for achieving well-behaved AlGaN/GaN metal-oxide-semiconductor (MOS) devices with Al-based gate dielectrics were systematically investigated on the basis of electrical and physical characterizations. We found that low-temperature deposition of alumina insulators on AlGaN surfaces is crucial to improve the interface quality, thermal stability, and variability of MOS devices by suppressing Ga diffusion into the gate oxides. Moreover, aluminum oxynitride grown in a reactive nitric atmosphere was proven to expand the optimal process window that would improve the interface quality and to enhance immunity against charge injection into the gate dielectrics. The results constitute common guidelines for achieving high-performance and reliable AlGaN/GaN MOS devices.

  10. Effect of Reverse Substrate Bias on Degradation of Ultra-Thin Gate-Oxide n-Channel Metal-Oxide-Semiconductor Field-Effect Transistors under Different Stress Modes

    Institute of Scientific and Technical Information of China (English)

    ZHAO Yao; XU Ming-Zhen; TAN Chang-Hua

    2005-01-01

    @@ Degradation of ultra-thin gate-oxide n-channel metal-oxide-semiconductor field-effect transistors with the halo structure has been studied under different stress modes with a reverse substrate bias. The device degradation under the same stress mode with different reverse substrate voltages has been characterized by monitoring the substrate current in a stressing process, which follows a simple power law. When the gate voltage is less than the critical value, the device degradation will first decrease and then increase with the increasing reverse sub strate voltage, otherwise, the device degradation will increase continuously. The critical value can be obtained by measuring the substrate current variation with the increases of reverse substrate voltage and gate voltage. The experimental results indicate that the stress mode with enhanced injection efficiency and smaller device degradation can be obtained when the gate voltage is less than the critical value with a proper reverse substratevoltage chosen.

  11. A comparison between HfO2/Al2O3 nano-laminates and ternary HfxAlyO compound as the dielectric material in InGaAs based metal-oxide-semiconductor (MOS) capacitors

    Science.gov (United States)

    Krylov, Igor; Pokroy, Boaz; Eizenberg, Moshe; Ritter, Dan

    2016-09-01

    We compare the electrical properties of HfO2/Al2O3 nano-laminates with those of the ternary HfxAlyO compound in metal oxide semiconductor (MOS) capacitors. The dielectrics were deposited by atomic layer deposition on InGaAs. Water, ozone, and oxygen plasma were tested as oxygen precursors, and best results were obtained using water. The total dielectric thickness was kept constant in our experiments. It was found that the effective dielectric constant increased and the leakage current decreased with the number of periods. Best results were obtained for the ternary compound. The effect of the sublayer thicknesses on the electrical properties of the interface was carefully investigated, as well as the role of post-metallization annealing. Possible explanations for the observed trends are provided. We conclude that the ternary HfxAlyO compound is more favorable than the nano-laminates approach for InGaAs based MOS transistor applications.

  12. Tinv Scaling and Gate Leakage Reduction for n-Type Metal Oxide Semiconductor Field Effect Transistor with HfSix/HfO2 Gate Stack by Interfacial Layer Formation Using Ozone-Water-Last Treatment

    Science.gov (United States)

    Oshiyama, Itaru; Tai, Kaori; Hirano, Tomoyuki; Yamaguchi, Shinpei; Tanaka, Kazuaki; Hagimoto, Yoshiya; Uemura, Takayuki; Ando, Takashi; Watanabe, Koji; Yamamoto, Ryo; Kanda, Saori; Wang, Junli; Tateshita, Yasushi; Wakabayashi, Hitoshi; Tagawa, Yukio; Tsukamoto, Masanori; Iwamoto, Hayato; Saito, Masaki; Oshima, Masaharu; Toyoda, Satoshi; Nagashima, Naoki; Kadomura, Shingo

    2008-04-01

    In this paper, we demonstrate a wet treatment for the HfSix/HfO2 gate stack of n-type metal oxide semiconductor field effect transistor (nMOSFET) fabricated by a gate-last process in order to scale down the electrical thickness at inversion state Tinv value and reduce the gate leakage Jg. As a result, we succeeded in scaling down Tinv to 1.41 nm without mobility or Jg degradation by ozone-water-last treatment. We found that a high-density interfacial layer (IFL) is formed owing to the ozone-water-last treatment, and Hf diffusion to the IFL is suppressed, which was analyzed by high-resolution angle-resolved spectroscopy.

  13. Inversion in the In0.53Ga0.47As metal-oxide-semiconductor system: Impact of the In0.53Ga0.47As doping concentration

    Science.gov (United States)

    O'Connor, É.; Cherkaoui, K.; Monaghan, S.; Sheehan, B.; Povey, I. M.; Hurley, P. K.

    2017-01-01

    In0.53Ga0.47As metal-oxide-semiconductor (MOS) capacitors with an Al2O3 gate oxide and a range of n and p-type In0.53Ga0.47As epitaxial concentrations were examined. Multi-frequency capacitance-voltage and conductance-voltage characterization exhibited minority carrier responses consistent with surface inversion. The measured minimum capacitance at high frequency (1 MHz) was in excellent agreement with the theoretical minimum capacitance calculated assuming an inverted surface. Minority carrier generation lifetimes, τg, extracted from experimentally measured transition frequencies, ωm, using physics based a.c. simulations, demonstrated a reduction in τg with increasing epitaxial doping concentration. The frequency scaled conductance, G/ω, in strong inversion allowed the estimation of accurate Cox values for these MOS devices.

  14. Real-time, multiplexed electrochemical DNA detection using an active complementary metal-oxide-semiconductor biosensor array with integrated sensor electronics

    OpenAIRE

    2008-01-01

    Optical biosensing based on fluorescence detection has arguably become the standard technique for quantifying extents of hybridization between surface-immobilized probes and fluorophore-labeled analyte targets in DNA microarrays. However, electrochemical detection techniques are emerging which could eliminate the need for physically bulky optical instrumentation, enabling the design of portable devices for point-of-care applications. Unlike fluorescence detection, which can function well usin...

  15. X-Ray-Diffraction Tests Of Irradiated Electronic Devices: II

    Science.gov (United States)

    Shaw, David C.; Lowry, Lynn E.; Barnes, Charles E.

    1993-01-01

    Report describes research on use of x-ray diffraction to measure stresses in metal conductors of complementary metal oxide/semiconductor (CMOS) integrated circuits exposed to ionizing radiation. Expanding upon report summarized in "X-Ray-Diffraction Tests Of Irradiated Electronic Devices: I" (NPO-18803), presenting data further suggesting relationship between electrical performances of circuits and stresses and strains in metal conductors.

  16. High-performance self-aligned inversion-channel In{sub 0.53}Ga{sub 0.47}As metal-oxide-semiconductor field-effect-transistors by in-situ atomic-layer-deposited HfO{sub 2}

    Energy Technology Data Exchange (ETDEWEB)

    Lin, T. D.; Chang, W. H.; Chang, Y. C.; Hong, M., E-mail: raynien@phys.nthu.edu.tw, E-mail: mhong@phys.ntu.edu.tw [Graduate Institute of Applied Physics and Department of Physics, National Taiwan University, Taipei 10617, Taiwan (China); Chu, R. L.; Chang, Y. H. [Department of Materials Science and Engineering, National Tsing Hua University, Hsinchu 30013, Taiwan (China); Lee, M. Y.; Hong, P. F.; Chen, Min-Cheng [National Nano Device Laboratories, Hsinchu 30076, Taiwan (China); Kwo, J., E-mail: raynien@phys.nthu.edu.tw, E-mail: mhong@phys.ntu.edu.tw [Department of Physics, National Tsing Hua University, Hsinchu 30013, Taiwan (China)

    2013-12-16

    Self-aligned inversion-channel In{sub 0.53}Ga{sub 0.47}As metal-oxide-semiconductor field-effect-transistors (MOSFETs) have been fabricated using the gate dielectrics of in-situ directly atomic-layer-deposited (ALD) HfO{sub 2} followed by ALD-Al{sub 2}O{sub 3}. There were no surface pretreatments and no interfacial passivation/barrier layers prior to the ALD. TiN/Al{sub 2}O{sub 3} (4 nm)/HfO{sub 2} (1 nm)/In{sub 0.53}Ga{sub 0.47}As/InP MOS capacitors exhibited well-behaved capacitance-voltage characteristics with true inversion behavior, low leakage current densities of ∼10{sup −8} A/cm{sup 2} at ±1 MV/cm, and thermodynamic stability at high temperatures. Al{sub 2}O{sub 3} (3 nm)/HfO{sub 2} (1 nm)/In{sub 0.53}Ga{sub 0.47}As MOSFETs of 1 μm gate length, with 700 °C–800 °C rapid thermal annealing in source/drain activation, have exhibited high extrinsic drain current (I{sub D}) of 1.5 mA/μm, transconductance (G{sub m}) of 0.84 mS/μm, I{sub ON}/I{sub OFF} of ∼10{sup 4}, low sub-threshold swing of 103 mV/decade, and field-effect electron mobility of 1100 cm{sup 2}/V · s. The devices have also achieved very high intrinsic I{sub D} and G{sub m} of 2 mA/μm and 1.2 mS/μm, respectively.

  17. Negative bias-and-temperature stress-assisted activation of oxygen-vacancy hole traps in 4H-silicon carbide metal-oxide-semiconductor field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Ettisserry, D. P., E-mail: deva@umd.edu, E-mail: neil@umd.edu; Goldsman, N., E-mail: deva@umd.edu, E-mail: neil@umd.edu; Akturk, A. [Department of Electrical and Computer Engineering, University of Maryland, College Park, Maryland 20742 (United States); Lelis, A. J. [U.S. Army Research Laboratory, 2800 Powder Mill Road, Adelphi, Maryland 20783 (United States)

    2015-07-28

    We use hybrid-functional density functional theory-based Charge Transition Levels (CTLs) to study the electrical activity of near-interfacial oxygen vacancies located in the oxide side of 4H-Silicon Carbide (4H-SiC) power Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs). Based on the “amorphousness” of their local atomic environment, oxygen vacancies are shown to introduce their CTLs either within (permanently electrically active) or outside of (electrically inactive) the 4H-SiC bandgap. The “permanently electrically active” centers are likely to cause threshold voltage (V{sub th}) instability at room temperature. On the other hand, we show that the “electrically inactive” defects could be transformed into various “electrically active” configurations under simultaneous application of negative bias and high temperature stresses. Based on this observation, we present a model for plausible oxygen vacancy defects that could be responsible for the recently observed excessive worsening of V{sub th} instability in 4H-SiC power MOSFETs under high temperature-and-gate bias stress. This model could also explain the recent electrically detected magnetic resonance observations in 4H-SiC MOSFETs.

  18. Mismatch of dielectric constants at the interface of nanometer metal-oxide-semiconductor devices with high- gate dielectric impacts on the inversion charge density

    Indian Academy of Sciences (India)

    Ling-Feng Mao

    2011-04-01

    The comparison of the inversion electron density between a nanometer metal-oxidesemiconductor (MOS) device with high- gate dielectric and a SiO2 MOS device with the same equivalent oxide thickness has been discussed. A fully self-consistent solution of the coupled Schrödinger–Poisson equations demonstrates that a larger dielectric-constant mismatch between the gate dielectric and silicon substrate can reduce electron density in the channel of a MOS device under inversion bias. Such a reduction in inversion electron density of the channel will increase with increase in gate voltage. A reduction in the charge density implies a reduction in the inversion electron density in the channel of a MOS device. It also implies that a larger dielectric constant of the gate dielectric might result in a reduction in the source–drain current and the gate leakage current.

  19. A 94GHz Temperature Compensated Low Noise Amplifier in 45nm Silicon-on-Insulator Complementary Metal-Oxide Semiconductor (SOI CMOS)

    Science.gov (United States)

    2014-01-01

    discovering techniques to build wide temperature range electronics for millimeter wave imaging applications. Realization of this plan has resulted in a...State Circuits. 41.12 (December 2006): 2992-2997. 8. De Vida , G., and G. Iannaccone. “An Ultra-Low Power, Temperature Compensated Voltage

  20. Phosphorus and boron diffusion paths in polycrystalline silicon gate of a trench-type three-dimensional metal-oxide-semiconductor field effect transistor investigated by atom probe tomography

    Energy Technology Data Exchange (ETDEWEB)

    Han, Bin, E-mail: hanbin@imr.tohoku.ac.jp; Takamizawa, Hisashi, E-mail: takamizawa.hisashi@jaea.go.jp; Shimizu, Yasuo; Inoue, Koji; Nagai, Yasuyoshi [The Oarai Center, Institute for Materials Research, Tohoku University, 2145-2 Narita, Oarai, Ibaraki 311-1313 (Japan); Yano, Fumiko [Department of Electrical Engineering, Faculty of Engineering, Tokyo City University, 1-28-1 Tamazutsumi, Setagaya-ku, Tokyo 158-8557 (Japan); Kunimune, Yorinobu [Renesas Semiconductor Manufacturing Co., Ltd., 1120 Shimokuzawa, Sagamihara, Kanagawa 252-5298 (Japan); Inoue, Masao; Nishida, Akio [Renesas Electronics Corporation, 751 Horiguchi, Hitachinaka, Ibaraki 312-8504 (Japan)

    2015-07-13

    The dopant (P and B) diffusion path in n- and p-types polycrystalline-Si gates of trench-type three-dimensional (3D) metal-oxide-semiconductor field-effect transistors (MOSFETs) were investigated using atom probe tomography, based on the annealing time dependence of the dopant distribution at 900 °C. Remarkable differences were observed between P and B diffusion behavior. In the initial stage of diffusion, P atoms diffuse into deeper regions from the implanted region along grain boundaries in the n-type polycrystalline-Si gate. With longer annealing times, segregation of P on the grain boundaries was observed; however, few P atoms were observed within the large grains or on the gate/gate oxide interface distant from grain boundaries. These results indicate that P atoms diffuse along grain boundaries much faster than through the bulk or along the gate/gate oxide interface. On the other hand, in the p-type polycrystalline-Si gate, segregation of B was observed only at the initial stage of diffusion. After further annealing, the B atoms became uniformly distributed, and no clear segregation of B was observed. Therefore, B atoms diffuse not only along the grain boundary but also through the bulk. Furthermore, B atoms diffused deeper than P atoms along the grain boundaries under the same annealing conditions. This information on the diffusion behavior of P and B is essential for optimizing annealing conditions in order to control the P and B distributions in the polycrystalline-Si gates of trench-type 3D MOSFETs.

  1. Ge{sub 0.83}Sn{sub 0.17} p-channel metal-oxide-semiconductor field-effect transistors: Impact of sulfur passivation on gate stack quality

    Energy Technology Data Exchange (ETDEWEB)

    Lei, Dian; Wang, Wei; Gong, Xiao, E-mail: elegong@nus.edu.sg, E-mail: yeo@ieee.org; Liang, Gengchiau; Yeo, Yee-Chia, E-mail: elegong@nus.edu.sg, E-mail: yeo@ieee.org [Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117576 (Singapore); Zhang, Zheng; Pan, Jisheng [Institute of Material Research and Engineering, A*STAR (Agency for Science, Technology and Research), 3 Research Link, Singapore 117602 (Singapore); Tok, Eng-Soon [Department of Physics, National University of Singapore, Singapore 117551 (Singapore)

    2016-01-14

    The effect of room temperature sulfur passivation of the surface of Ge{sub 0.83}Sn{sub 0.17} prior to high-k dielectric (HfO{sub 2}) deposition is investigated. X-ray photoelectron spectroscopy (XPS) was used to examine the chemical bonding at the interface of HfO{sub 2} and Ge{sub 0.83}Sn{sub 0.17}. Sulfur passivation is found to be effective in suppressing the formation of both Ge oxides and Sn oxides. A comparison of XPS results for sulfur-passivated and non-passivated Ge{sub 0.83}Sn{sub 0.17} samples shows that sulfur passivation of the GeSn surface could also suppress the surface segregation of Sn atoms. In addition, sulfur passivation reduces the interface trap density D{sub it} at the high-k dielectric/Ge{sub 0.83}Sn{sub 0.17} interface from the valence band edge to the midgap of Ge{sub 0.83}Sn{sub 0.17}, as compared with a non-passivated control. The impact of the improved D{sub it} is demonstrated in Ge{sub 0.83}Sn{sub 0.17} p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs). Ge{sub 0.83}Sn{sub 0.17} p-MOSFETs with sulfur passivation show improved subthreshold swing S, intrinsic transconductance G{sub m,int}, and effective hole mobility μ{sub eff} as compared with the non-passivated control. At a high inversion carrier density N{sub inv} of 1 × 10{sup 13 }cm{sup −2}, sulfur passivation increases μ{sub eff} by 25% in Ge{sub 0.83}Sn{sub 0.17} p-MOSFETs.

  2. Evaluation of clinical use of OneDose™ metal oxide semiconductor field-effect transistor detectors compared to thermoluminescent dosimeters to measure skin dose for adult patients with acute lymphoblastic leukemia

    Directory of Open Access Journals (Sweden)

    Huda Ibrahim Al-Mohammed

    2011-01-01

    Full Text Available Background: Total body irradiation is a protocol used to treat acute lymphoblastic leukemia in patients prior to their bone marrow transplant. It involves the treatment of the whole body using a large radiation field with extended source-skin distance. Therefore, it is important to measure and monitor the skin dose during the treatment. Thermoluminescent dosimeters (TLDs and the OneDose™ metal oxide semiconductor field effect transistor (MOSFET detectors are used during treatment delivery to measure the radiation dose and compare it with the target prescribed dose. Aims: The primary goal of this study was to measure the variation of skin dose using OneDose MOSFET detectors and TLD detectors, and compare the results with the target prescribed dose. The secondary aim was to evaluate the simplicity of use and determine if one system was superior to the other in clinical use. Material and Methods : The measurements involved twelve adult patients diagnosed with acute lymphoblastic leukemia. TLD and OneDose MOSFET dosimetry were performed at ten different anatomical sites of each patient. Results : The results showed that there was a variation between skin dose measured with OneDose MOSFET detectors and TLD in all patients. However, the variation was not significant. Furthermore, the results showed for every anatomical site there was no significant different between the prescribed dose and the dose measured by either TLD or OneDose MOSFET detectors. Conclusion: There were no significant differences between the OneDose MOSFET and TLDs in comparison to the target prescribed dose. However, OneDose MOSFET detectors give a direct read-out immediately after the treatment, and their simplicity of use to compare with TLD detectors may make them preferred for clinical use.

  3. Blue/pink/purple electroluminescence from metal-oxide-semiconductor devices fabricated by spin-coating of [tantalum:(gadolinium/praseodymium)] and (praseodymium:cerium) organic compounds on silicon

    Science.gov (United States)

    Ohzone, Takashi; Matsuda, Toshihiro; Fukuoka, Ryouhei; Hattori, Fumihiro; Iwata, Hideyuki

    2016-08-01

    Blue/pink/purple electroluminescence (EL) from metal-oxide-semiconductor (MOS) devices with an indium tin oxide (ITO)/[Gd/(Ta + Gd/Pr)/(Pr + Ce)-Si-O] insulator layer/n+-Si substrate surface is reported. The insulator layers were fabricated from organic liquid sources of Gd or (Ta + Gd/Pr)/(Pr + Ce) mixtures, which were spin-coated on the n+-Si substrate and annealed at 950 °C for 30 min in air. The EL emission could be observed by the naked eye in the dark in the Fowler-Nordheim (FN) tunnel current regions. Peak wavelengths in the measured EL spectra were independent of the positive current. The EL intensity ratio of ultraviolet (UV) to the visible range varied with the composition ratio of the (Ta + Gd) liquids, and an optimum Ta to Gd ratio existed for the strongest blue emission, which could be attributed to the Ta-related oxide/silicate. The pink EL of the device fabricated with the (\\text{Ta}:\\text{Pr} = 6:4) mixture ratio can be explained by EL emission peaks related to the Pr3+ ions. The purple EL observed from the (\\text{Pr}:\\text{Ce} = 6:4) device corresponds to the strong and broad emission profile near the 357 nm peak, which cannot be assigned to Ce3+ ions. The results suggest that the EL can be attributed to the double-layer oxides with different compositions in the MOS devices. The upper layer consists of various Ta-, Gd-, Pr-, and Ce-related oxides and their silicates, while the lower SiO x -rich layer contributes to the FN current due to the high electric field, and thus the various EL colors.

  4. Electrical properties of GaAs metal-oxide-semiconductor structure comprising Al2O3 gate oxide and AlN passivation layer fabricated in situ using a metal-organic vapor deposition/atomic layer deposition hybrid system

    Science.gov (United States)

    Aoki, Takeshi; Fukuhara, Noboru; Osada, Takenori; Sazawa, Hiroyuki; Hata, Masahiko; Inoue, Takayuki

    2015-08-01

    This paper presents a compressive study on the fabrication and optimization of GaAs metal-oxide-semiconductor (MOS) structures comprising a Al2O3 gate oxide, deposited via atomic layer deposition (ALD), with an AlN interfacial passivation layer prepared in situ via metal-organic chemical vapor deposition (MOCVD). The established protocol afforded self-limiting growth of Al2O3 in the atmospheric MOCVD reactor. Consequently, this enabled successive growth of MOCVD-formed AlN and ALD-formed Al2O3 layers on the GaAs substrate. The effects of AlN thickness, post-deposition anneal (PDA) conditions, and crystal orientation of the GaAs substrate on the electrical properties of the resulting MOS capacitors were investigated. Thin AlN passivation layers afforded incorporation of optimum amounts of nitrogen, leading to good capacitance-voltage (C-V) characteristics with reduced frequency dispersion. In contrast, excessively thick AlN passivation layers degraded the interface, thereby increasing the interfacial density of states (Dit) near the midgap and reducing the conduction band offset. To further improve the interface with the thin AlN passivation layers, the PDA conditions were optimized. Using wet nitrogen at 600 °C was effective to reduce Dit to below 2 × 1012 cm-2 eV-1. Using a (111)A substrate was also effective in reducing the frequency dispersion of accumulation capacitance, thus suggesting the suppression of traps in GaAs located near the dielectric/GaAs interface. The current findings suggest that using an atmosphere ALD process with in situ AlN passivation using the current MOCVD system could be an efficient solution to improving GaAs MOS interfaces.

  5. InxGa1-xSb Channel p-Metal-Oxide-Semiconductor Field Effect Transistors: Effect of Strain and Heterostructure Design

    Science.gov (United States)

    2011-07-06

    from 300 K to 80 K, ION increased up to 4 times due to the increase in the hole mobility, while IOFF decreased by a factor of 10 3, indi- cating a diode...N. A. Papanicolaou , and J. B. Boos, J. Cryst. Growth 312(1), 37 (2009). TABLE I. Surface roughness comparison with known values in silicon and...Bennett, N. A. Papanicolaou , M. G. Ancona, J. G. Cham- plain, R. Bass, and B. V. Shanabrook, Electron. Lett. 43, 834 (2007). 15A. Nainani, T. Irisawa, Z

  6. 超深亚微米互补金属氧化物半导体器件的剂量率效应∗%Dose-rate sensitivity of deep sub-micro complementary metal oxide semiconductor pro cess

    Institute of Scientific and Technical Information of China (English)

    郑齐文; 崔江维; 王汉宁; 周航; 余徳昭; 魏莹; 苏丹丹

    2016-01-01

    对0.18µm互补金属氧化物半导体(CMOS)工艺的N型金属氧化物半导体场效应晶体管(NMOSFET)及静态随机存储器(SRAM)开展了不同剂量率下的电离总剂量辐照试验研究.结果表明:在相同累积剂量, SRAM的低剂量率辐照损伤要略大于高剂量率辐照的损伤,并且低剂量率辐照损伤要远大于高剂量率辐照加与低剂量率辐照时间相同的室温退火后的损伤.虽然NMOSFET 低剂量率辐照损伤略小于高剂量率辐照损伤,但室温退火后,高剂量率辐照损伤同样要远小于低剂量率辐照损伤.研究结果表明0.18µm CMOS工艺器件的辐射损伤不是时间相关效应.利用数值模拟的方法提出了解释CMOS器件剂量率效应的理论模型.%Enhancing low dose rate sensitivity (ELDRS) in bipolar device is a major problem of liner circuit radiation hardness prediction for space application. ELDRS is usually attributed to space-charge effect. A key element is the difference in transport rate between holes and protons in SiO2. Interface-trap formation at high dose rate is reduced due to positive charge buildup in the Si/SiO2 interfacial region (due to the trapping of holes and/or protons) which reduces the flow rates of subsequent holes and protons (relative to the low-dose-rate case) from the bulk of the oxide to the Si/SiO2 interface. Generally speaking, the dose rate of metal oxide semiconductor (MOS) device is time dependent when annealing of radiation-induced charge is taken into account. The degradation of MOS device induced by the low dose rate irradiation is the same as that by high dose rate when annealing of radiation-induced charge is taken into account. However, radiation response of new generation MOS device is dominated by charge buildup in shallow trench isolation (STI) rather than gate oxide as older generation device. Unlike gate oxides, which are routinely grown by thermal oxidation, field oxides are produced using a wide variety of

  7. Effect of substrate bias on negative bias temperature instability of ultra-deep sub-micro p-channel metal-oxide-semiconductor field-effect transistors

    Institute of Scientific and Technical Information of China (English)

    Cao Yan-Rong; Hao Yue; Ma Xiao-Hua; Hu Shi-Gang

    2009-01-01

    The effect of substrate bias on the degradation during applying a negative bias temperature (NBT) stress is studied in this paper. With a smaller gate voltage stress applied, the degradation of negative bias temperature instability (NBTI) is enhanced, and there comes forth an inflexion point. The degradation pace turns larger when the substrate bias is higher than the inflexion point. The substrate hot holes can be injected into oxide and generate additional oxide traps, inducing an inflexion phenomenon. When a constant substrate bias stress is applied, as the gate voltage stress increases, an inflexion comes into being also. The higher gate voltage causes the electrons to tunnel into the substrate from the poly, thereby generating the electron-hole pairs by impact ionization. The holes generated by impact ionization and the holes from the substrate all can be accelerated to high energies by the substrate bias. More additional oxide traps can be produced, and correspondingly, the degradation is strengthened by the substrate bias. The results of the alternate stress experiment show that the interface traps generated by the hot holes cannot be annealed, which is different from those generated by common holes.

  8. Investigation of temperature dependent threshold voltage variation of Gd2O3/AlGaN/GaN metal-oxide-semiconductor heterostructure

    Directory of Open Access Journals (Sweden)

    Atanu Das

    2012-09-01

    Full Text Available Temperature dependent threshold voltage (Vth variation of GaN/AlGaN/Gd2O3/Ni-Au structure is investigated by capacitance-voltage measurement with temperature varying from 25°C to 150°C. The Vth of the Schottky device without oxide layer is slightly changed with respect to temperature. However, variation of Vth is observed for both as-deposited and annealed device owing to electron capture by the interface traps or bulk traps. The Vth shifts of 0.4V and 3.2V are obtained for as-deposited and annealed device respectively. For annealed device, electron capture process is not only restricted in the interface region but also extended into the crystalline Gd2O3 layer through Frenkel-Poole emission and hooping conduction, resulting in a larger Vth shift. The calculated trap density for as-deposited and annealed device is 3.28×1011∼1.12×1011 eV−1cm−2 and 1.74×1012∼7.33×1011 eV−1cm−2 respectively in measured temperature range. These results indicate that elevated temperature measurement is necessary to characterize GaN/AlGaN heterostructure based devices with oxide as gate dielectric.

  9. Controlling the interface charge density in GaN-based metal-oxide-semiconductor heterostructures by plasma oxidation of metal layers

    Energy Technology Data Exchange (ETDEWEB)

    Hahn, Herwig, E-mail: herwig.hahn@rwth-aachen.de; Kalisch, Holger; Vescan, Andrei [GaN Device Technology, RWTH Aachen University, 52074 Aachen (Germany); JARA-Fundamentals of Future Information Technologies, 52425 Jülich (Germany); Pécz, Béla [MTA EK MFA, Konkoly Thege Street 29-33, 1121 Budapest (Hungary); Kovács, András [JARA-Fundamentals of Future Information Technologies, 52425 Jülich (Germany); Ernst Ruska-Centre for Microscopy and Spectroscopy with Electrons (ER-C) and Forschungszentrum Jülich, Peter Grünberg Institut (PGI-5), 52425 Jülich (Germany); Heuken, Michael [GaN Device Technology, RWTH Aachen University, 52074 Aachen (Germany); AIXTRON SE, 52134 Herzogenrath (Germany)

    2015-06-07

    In recent years, investigating and engineering the oxide-semiconductor interface in GaN-based devices has come into focus. This has been driven by a large effort to increase the gate robustness and to obtain enhancement mode transistors. Since it has been shown that deep interface states act as fixed interface charge in the typical transistor operating regime, it appears desirable to intentionally incorporate negative interface charge, and thus, to allow for a positive shift in threshold voltage of transistors to realise enhancement mode behaviour. A rather new approach to obtain such negative charge is the plasma-oxidation of thin metal layers. In this study, we present transmission electron microscopy and energy dispersive X-ray spectroscopy analysis as well as electrical data for Al-, Ti-, and Zr-based thin oxide films on a GaN-based heterostructure. It is shown that the plasma-oxidised layers have a polycrystalline morphology. An interfacial amorphous oxide layer is only detectable in the case of Zr. In addition, all films exhibit net negative charge with varying densities. The Zr layer is providing a negative interface charge density of more than 1 × 10{sup 13 }cm{sup –2} allowing to considerably shift the threshold voltage to more positive values.

  10. On the origin of the mobility reduction in n- and p-metal-oxide-semiconductor field effect transistors with hafnium-based/metal gate stacks

    Science.gov (United States)

    Toniutti, P.; Palestri, P.; Esseni, D.; Driussi, F.; De Michielis, M.; Selmi, L.

    2012-08-01

    We examine the mobility reduction measured in hafnium-based dielectrics in n- and p-MOSFETs by means of extensive comparison between accurate multi-subband Monte Carlo simulations and experimental data for reasonably mature process technologies. We have considered scattering with remote (soft-optical) phonons and remote Coulomb interaction with single layers and dipole charges. A careful examination of model assumptions and limitations leads us to the conclusion that soft optical phonon scattering cannot quantitatively explain by itself the experimental mobility reduction reported by several groups for neither the electron nor the hole inversion layers. Experimental data can be reproduced only assuming consistently large concentrations of Coulomb scattering centers in the gate stack. However, the corresponding charge or dipole density would result in a large threshold voltage shift not observed in the experiments. We thus conclude that the main mechanisms responsible for the mobility reduction in MOSFETs featuring Hafnium-based high-κ dielectric have not been completely identified yet. Additional physical mechanisms that could reconcile simulations with experimental results are suggested and critically discussed.

  11. Negative differential resistance and effect of defects and deformations in MoS{sub 2} armchair nanoribbon metal-oxide-semiconductor field effect transistor

    Energy Technology Data Exchange (ETDEWEB)

    Sengupta, Amretashis, E-mail: amretashis@dese.iisc.ernet.in; Mahapatra, Santanu [Nano-Scale Device Research Laboratory, Department of Electronic Systems Engineering, Indian Institute of Science, Bangalore 560 012 (India)

    2013-11-21

    In this work, we present a study on the negative differential resistance (NDR) behavior and the impact of various deformations (like ripple, twist, wrap) and defects like vacancies and edge roughness on the electronic properties of short-channel MoS{sub 2} armchair nanoribbon MOSFETs. The effect of deformation (3°–7° twist or wrap and 0.3–0.7 Å ripple amplitude) and defects on a 10 nm MoS2 ANR FET is evaluated by the density functional tight binding theory and the non-equilibrium Green's function approach. We study the channel density of states, transmission spectra, and the I{sub D}–V{sub D} characteristics of such devices under the varying conditions, with focus on the NDR behavior. Our results show significant change in the NDR peak to valley ratio and the NDR window with such minor intrinsic deformations, especially with the ripple.

  12. Effects of series and parallel resistances on the C-V characteristics of silicon-based metal oxide semiconductor (MOS) devices

    Science.gov (United States)

    Omar, Rejaiba; Mohamed, Ben Amar; Adel, Matoussi

    2015-04-01

    This paper investigates the electrical behavior of the Al/SiO2/Si MOS structure. We have used the complex admittance method to develop an analytical model of total capacitance applied to our proposed equivalent circuit. The charge density, surface potential, semiconductor capacitance, flatband and threshold voltages have been determined by resolving the Poisson transport equations. This modeling is used to predict in particular the effects of frequency, parallel and series resistance on the capacitance-voltage characteristic. Results show that the variation of both frequency and parallel resistance causes strong dispersion of the C-V curves in the inversion regime. It also reveals that the series resistance influences the shape of C-V curves essentially in accumulation and inversion modes. A significant decrease of the accumulation capacitance is observed when R s increases in the range 200-50000 Ω. The degradation of the C-V magnitude is found to be more pronounced when the series resistance depends on the substrate doping density. When R s varies in the range 100 Ω-50 kΩ, it shows a decrease in the flatband voltage from -1.40 to -1.26 V and an increase in the threshold voltage negatively from -0.28 to -0.74 V, respectively. Good agreement has been observed between simulated and measured C-V curves obtained at high frequency. This study is necessary to control the adverse effects that disrupt the operation of the MOS structure in different regimes and optimizes the efficiency of such electronic device before manufacturing.

  13. WE-G-204-04: Focal Spot Deblurring For High Resolution Amorphous Selenium (aSe) Complementary Metal Oxide Semiconductor (CMOS) X-Ray Detector

    Energy Technology Data Exchange (ETDEWEB)

    Nagesh, S Setlur; Rana, R; Russ, M; Ionita, C; Bednarek, D; Rudin, S [Toshiba Stroke and Vascular Research Center, University at Buffalo, SUNY (United States)

    2015-06-15

    Purpose: CMOS-based aSe detectors compared to CsI-TFT-based flat panels have the advantages of higher spatial sampling due to smaller pixel size and decreased blurring characteristic of direct rather than indirect detection. For systems with such detectors, the limiting factor degrading image resolution then becomes the focal-spot geometric unsharpness. This effect can seriously limit the use of such detectors in areas such as cone beam computed tomography, clinical fluoroscopy and angiography. In this work a technique to remove the effect of focal-spot blur is presented for a simulated aSe detector. Method: To simulate images from an aSe detector affected with focal-spot blur, first a set of high-resolution images of a stent (FRED from Microvention, Inc.) were acquired using a 75µm pixel size Dexela-Perkin-Elmer detector and averaged to reduce quantum noise. Then the averaged image was blurred with a known Gaussian blur at two different magnifications to simulate an idealized focal spot. The blurred images were then deconvolved with a set of different Gaussian blurs to remove the effect of focal-spot blurring using a threshold-based, inverse-filtering method. Results: The blur was removed by deconvolving the images using a set of Gaussian functions for both magnifications. Selecting the correct function resulted in an image close to the original; however, selection of too wide a function would cause severe artifacts. Conclusion: Experimentally, focal-spot blur at different magnifications can be measured using a pin hole with a high resolution detector. This spread function can be used to deblur the input images that are acquired at corresponding magnifications to correct for the focal spot blur. For CBCT applications, the magnification of specific objects can be obtained using initial reconstructions then corrected for focal-spot blurring to improve resolution. Similarly, if object magnification can be determined such correction may be applied in fluoroscopy and

  14. Ultra-low power high temperature and radiation hard complementary metal-oxide-semiconductor (CMOS) silicon-on-insulator (SOI) voltage reference.

    Science.gov (United States)

    Boufouss, El Hafed; Francis, Laurent A; Kilchytska, Valeriya; Gérard, Pierre; Simon, Pascal; Flandre, Denis

    2013-12-13

    This paper presents an ultra-low power CMOS voltage reference circuit which is robust under biomedical extreme conditions, such as high temperature and high total ionized dose (TID) radiation. To achieve such performances, the voltage reference is designed in a suitable 130 nm Silicon-on-Insulator (SOI) industrial technology and is optimized to work in the subthreshold regime of the transistors. The design simulations have been performed over the temperature range of -40-200 °C and for different process corners. Robustness to radiation was simulated using custom model parameters including TID effects, such as mobilities and threshold voltages degradation. The proposed circuit has been tested up to high total radiation dose, i.e., 1 Mrad (Si) performed at three different temperatures (room temperature, 100 °C and 200 °C). The maximum drift of the reference voltage V(REF) depends on the considered temperature and on radiation dose; however, it remains lower than 10% of the mean value of 1.5 V. The typical power dissipation at 2.5 V supply voltage is about 20 μW at room temperature and only 75 μW at a high temperature of 200 °C. To understand the effects caused by the combination of high total ionizing dose and temperature on such voltage reference, the threshold voltages of the used SOI MOSFETs were extracted under different conditions. The evolution of V(REF) and power consumption with temperature and radiation dose can then be explained in terms of the different balance between fixed oxide charge and interface states build-up. The total occupied area including pad-ring is less than 0.09 mm2.

  15. Ultra-Low Power High Temperature and Radiation Hard Complementary Metal-Oxide-Semiconductor (CMOS Silicon-on-Insulator (SOI Voltage Reference

    Directory of Open Access Journals (Sweden)

    El Hafed Boufouss

    2013-12-01

    Full Text Available This paper presents an ultra-low power CMOS voltage reference circuit which is robust under biomedical extreme conditions, such as high temperature and high total ionized dose (TID radiation. To achieve such performances, the voltage reference is designed in a suitable 130 nm Silicon-on-Insulator (SOI industrial technology and is optimized to work in the subthreshold regime of the transistors. The design simulations have been performed over the temperature range of -40–200 °C and for different process corners. Robustness to radiation was simulated using custom model parameters including TID effects, such as mobilities and threshold voltages degradation. The proposed circuit has been tested up to high total radiation dose, i.e., 1 Mrad (Si performed at three different temperatures (room temperature, 100 °C and 200 °C. The maximum drift of the reference voltage VREF depends on the considered temperature and on radiation dose; however, it remains lower than 10% of the mean value of 1.5 V. The typical power dissipation at 2.5 V supply voltage is about 20 μW at room temperature and only 75 μ W at a high temperature of 200 °C. To understand the effects caused by the combination of high total ionizing dose and temperature on such voltage reference, the threshold voltages of the used SOI MOSFETs were extracted under different conditions. The evolution of VREF and power consumption with temperature and radiation dose can then be explained in terms of the different balance between fixed oxide charge and interface states build-up. The total occupied area including pad-ring is less than 0.09 mm2.

  16. Towards a chemiresistive sensor-integrated electronic nose: a review.

    Science.gov (United States)

    Chiu, Shih-Wen; Tang, Kea-Tiong

    2013-10-22

    Electronic noses have potential applications in daily life, but are restricted by their bulky size and high price. This review focuses on the use of chemiresistive gas sensors, metal-oxide semiconductor gas sensors and conductive polymer gas sensors in an electronic nose for system integration to reduce size and cost. The review covers the system design considerations and the complementary metal-oxide-semiconductor integrated technology for a chemiresistive gas sensor electronic nose, including the integrated sensor array, its readout interface, and pattern recognition hardware. In addition, the state-of-the-art technology integrated in the electronic nose is also presented, such as the sensing front-end chip, electronic nose signal processing chip, and the electronic nose system-on-chip.

  17. Towards a Chemiresistive Sensor-Integrated Electronic Nose: A Review

    Directory of Open Access Journals (Sweden)

    Kea-Tiong Tang

    2013-10-01

    Full Text Available Electronic noses have potential applications in daily life, but are restricted by their bulky size and high price. This review focuses on the use of chemiresistive gas sensors, metal-oxide semiconductor gas sensors and conductive polymer gas sensors in an electronic nose for system integration to reduce size and cost. The review covers the system design considerations and the complementary metal-oxide-semiconductor integrated technology for a chemiresistive gas sensor electronic nose, including the integrated sensor array, its readout interface, and pattern recognition hardware. In addition, the state-of-the-art technology integrated in the electronic nose is also presented, such as the sensing front-end chip, electronic nose signal processing chip, and the electronic nose system-on-chip.

  18. Mesoporous metal oxide semiconductor-clad waveguides

    Energy Technology Data Exchange (ETDEWEB)

    Miller, L.W.; Tejedor, M.I.; Nelson, B.P.; Anderson, M.A.

    1999-10-07

    Optical waveguides were prepared by depositing a sol gel-derived titania film onto a silica substrate. The titania film is mesoporous, with pore sizes ranging from 3 to 8 nm. Deposition of the titania does not change the critical angle to total internal reflection. Thus, the titania-coated waveguides propagate light in an attenuated total reflection mode, despite the relatively high refractive index (n = 1.8 in air) of the titania film relative to the silica substrate (n = 1.5). The optical and structural properties of these films suggest the possibility of developing efficient photocatalytic reactors or improved optical chemical sensors.

  19. Epitaxial GeSn film formed by solid phase epitaxy and its application to Yb{sub 2}O{sub 3}-gated GeSn metal-oxide-semiconductor capacitors with sub-nm equivalent oxide thickness

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Ching-Wei; Wu, Yung-Hsien; Hsieh, Ching-Heng; Lin, Chia-Chun [Department of Engineering and System Science, National Tsing Hua University, 300 Hsinchu, Taiwan (China)

    2014-11-17

    Through the technique of solid phase epitaxy (SPE), an epitaxial Ge{sub 0.955}Sn{sub 0.045} film was formed on a Ge substrate by depositing an amorphous GeSn film followed by a rapid thermal annealing at 550 °C. A process that uses a SiO{sub 2} capping layer on the amorphous GeSn film during SPE was proposed and it prevents Sn precipitation from occurring while maintaining a smooth surface due to the reduced surface mobility of Sn atoms. The high-quality epitaxial GeSn film was observed to have single crystal structure, uniform thickness and composition, and tiny surface roughness with root mean square of 0.56 nm. With a SnO{sub x}-free surface, Yb{sub 2}O{sub 3}-gated GeSn metal-oxide-semiconductor (MOS) capacitors with equivalent oxide thickness (EOT) of 0.55 nm were developed. A small amount of traps inside the Yb{sub 2}O{sub 3} was verified by negligible hysteresis in capacitance measurement. Low leakage current of 0.4 A/cm{sup 2} at gate bias of flatband voltage (V{sub FB})-1 V suggests the high quality of the gate dielectric. In addition, the feasibility of using Yb{sub 2}O{sub 3} to well passivate GeSn surface was also evidenced by the small interface trap density (D{sub it}) of 4.02 × 10{sup 11} eV{sup −1} cm{sup −2}, which can be attributed to smooth GeSn surface and Yb{sub 2}O{sub 3} valency passivation. Both leakage current and D{sub it} performance outperform other passivation techniques at sub-nm EOT regime. The proposed epitaxial GeSn film along with Yb{sub 2}O{sub 3} dielectric paves an alternative way to enable high-performance GeSn MOS devices.

  20. Interfacial band configuration and electrical properties of LaAlO{sub 3}/Al{sub 2}O{sub 3}/hydrogenated-diamond metal-oxide-semiconductor field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Liu, J. W.; Liao, M. Y.; Imura, M. [Optical and Electronic Materials Unit, National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan); Oosato, H.; Watanabe, E. [Nanofabrication Platform, NIMS, 1-2-1 Sengen, Tsukuba, Ibaraki 305-0047 (Japan); Tanaka, A.; Iwai, H. [Materials Analysis Station, NIMS, 1-2-1 Sengen, Tsukuba, Ibaraki 305-0047 (Japan); Koide, Y. [Optical and Electronic Materials Unit, National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan); Nanofabrication Platform, NIMS, 1-2-1 Sengen, Tsukuba, Ibaraki 305-0047 (Japan); Center of Materials Research for Low Carbon Emission, NIMS, 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan)

    2013-08-28

    In order to search a gate dielectric with high permittivity on hydrogenated-diamond (H-diamond), LaAlO{sub 3} films with thin Al{sub 2}O{sub 3} buffer layers are fabricated on the H-diamond epilayers by sputtering-deposition (SD) and atomic layer deposition (ALD) techniques, respectively. Interfacial band configuration and electrical properties of the SD-LaAlO{sub 3}/ALD-Al{sub 2}O{sub 3}/H-diamond metal-oxide-semiconductor field effect transistors (MOSFETs) with gate lengths of 10, 20, and 30 μm have been investigated. The valence and conduction band offsets of the SD-LaAlO{sub 3}/ALD-Al{sub 2}O{sub 3} structure are measured by X-ray photoelectron spectroscopy to be 1.1 ± 0.2 and 1.6 ± 0.2 eV, respectively. The valence band discontinuity between H-diamond and LaAlO{sub 3} is evaluated to be 4.0 ± 0.2 eV, showing that the MOS structure acts as the gate which controls a hole carrier density. The leakage current density of the SD-LaAlO{sub 3}/ALD-Al{sub 2}O{sub 3}/H-diamond MOS diode is smaller than 10{sup −8} A cm{sup −2} at gate bias from −4 to 2 V. The capacitance-voltage curve in the depletion mode shows sharp dependence, small flat band voltage, and small hysteresis shift, which implies low positive and trapped charge densities. The MOSFETs show p-type channel and complete normally off characteristics with threshold voltages changing from −3.6 ± 0.1 to −5.0 ± 0.1 V dependent on the gate length. The drain current maximum and the extrinsic transconductance of the MOSFET with gate length of 10 μm are −7.5 mA mm{sup −1} and 2.3 ± 0.1 mS mm{sup −1}, respectively. The enhancement mode SD-LaAlO{sub 3}/ALD-Al{sub 2}O{sub 3}/H-diamond MOSFET is concluded to be suitable for the applications of high power and high frequency electrical devices.

  1. Area efficient digital logic NOT gate using single electron box (SEB

    Directory of Open Access Journals (Sweden)

    Bahrepour Davoud

    2017-01-01

    Full Text Available The continuing scaling down of complementary metal oxide semiconductor (CMOS has led researchers to build new devices with nano dimensions, whose behavior will be interpreted based on quantum mechanics. Single-electron devices (SEDs are promising candidates for future VLSI applications, due to their ultra small dimensions and lower power consumption. In most SED based digital logic designs, a single gate is introduced and its performance discussed. While in the SED based circuits the fan out of designed gate circuit should be considered and measured. In the other words, cascaded SED based designs must work properly so that the next stage(s should be driven by the previous stage. In this paper, previously NOT gate based on single electron box (SEB which is an important structure in SED technology, is reviewed in order to obtain correct operation in series connections. The correct operation of the NOT gate is investigated in a buffer circuit which uses two connected NOT gate in series. Then, for achieving better performance the designed buffer circuit is improved by the use of scaling process.

  2. Gallium Nitride (GaN) High Power Electronics (FY11)

    Science.gov (United States)

    2012-01-01

    for HPE GaN high electron mobility transistors ( HEMTs ) compared to SiC metal-oxide-semiconductor field effect transistors (MOSFETs). Although a few...Figure 16. Asymmetric rocking curve for an HVPE film grown on an HVPE substrate. ............19 Figure 17. Schematic of a GaN /AlGaN HEMT structure grown...frequency (RF) HEMTs . These considerable investments can be leveraged for GaN HPE. Some people are concerned about the relative scarcity of gallium

  3. Dynamically controlled charge sensing of a few-electron silicon quantum dot

    Directory of Open Access Journals (Sweden)

    C. H. Yang

    2011-12-01

    Full Text Available We report charge sensing measurements of a silicon metal-oxide-semiconductor quantum dot using a single-electron transistor as a charge sensor with dynamic feedback control. Using digitally-controlled feedback, the sensor exhibits sensitive and robust detection of the charge state of the quantum dot, even in the presence of charge drifts and random charge upset events. The sensor enables the occupancy of the quantum dot to be probed down to the single electron level.

  4. Spin-Droplet State of an Interacting 2D Electron System

    OpenAIRE

    Teneh, N.; Kuntsevich, A. Yu.; Pudalov, V. M.; Reznikov, M.

    2012-01-01

    We report thermodynamic magnetization measurements of two-dimensional electrons in several high mobility Si metal-oxide-semiconductor field-effect transistors. We provide evidence for an easily polarizable electron state in a wide density range from insulating to deep into the metallic phase. The temperature and magnetic field dependence of the magnetization is consistent with the formation of large-spin droplets in the insulating phase. These droplets melt in the metallic phase with increasi...

  5. CMOS-Technology-Enabled Flexible and Stretchable Electronics for Internet of Everything Applications.

    Science.gov (United States)

    Hussain, Aftab M; Hussain, Muhammad M

    2016-06-01

    Flexible and stretchable electronics can dramatically enhance the application of electronics for the emerging Internet of Everything applications where people, processes, data and devices will be integrated and connected, to augment quality of life. Using naturally flexible and stretchable polymeric substrates in combination with emerging organic and molecular materials, nanowires, nanoribbons, nanotubes, and 2D atomic crystal structured materials, significant progress has been made in the general area of such electronics. However, high volume manufacturing, reliability and performance per cost remain elusive goals for wide commercialization of these electronics. On the other hand, highly sophisticated but extremely reliable, batch-fabrication-capable and mature complementary metal oxide semiconductor (CMOS)-based technology has facilitated tremendous growth of today's digital world using thin-film-based electronics; in particular, bulk monocrystalline silicon (100) which is used in most of the electronics existing today. However, one fundamental challenge is that state-of-the-art CMOS electronics are physically rigid and brittle. Therefore, in this work, how CMOS-technology-enabled flexible and stretchable electronics can be developed is discussed, with particular focus on bulk monocrystalline silicon (100). A comprehensive information base to realistically devise an integration strategy by rational design of materials, devices and processes for Internet of Everything electronics is offered.

  6. CMOS-Technology-Enabled Flexible and Stretchable Electronics for Internet of Everything Applications

    KAUST Repository

    Hussain, Aftab M.

    2015-11-26

    Flexible and stretchable electronics can dramatically enhance the application of electronics for the emerging Internet of Everything applications where people, processes, data and devices will be integrated and connected, to augment quality of life. Using naturally flexible and stretchable polymeric substrates in combination with emerging organic and molecular materials, nanowires, nanoribbons, nanotubes, and 2D atomic crystal structured materials, significant progress has been made in the general area of such electronics. However, high volume manufacturing, reliability and performance per cost remain elusive goals for wide commercialization of these electronics. On the other hand, highly sophisticated but extremely reliable, batch-fabrication-capable and mature complementary metal oxide semiconductor (CMOS)-based technology has facilitated tremendous growth of today\\'s digital world using thin-film-based electronics; in particular, bulk monocrystalline silicon (100) which is used in most of the electronics existing today. However, one fundamental challenge is that state-of-the-art CMOS electronics are physically rigid and brittle. Therefore, in this work, how CMOS-technology-enabled flexible and stretchable electronics can be developed is discussed, with particular focus on bulk monocrystalline silicon (100). A comprehensive information base to realistically devise an integration strategy by rational design of materials, devices and processes for Internet of Everything electronics is offered. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  7. An electronic nose for the detection of Sarin, Soman and Tabun mimics and interfering agents

    OpenAIRE

    2014-01-01

    An electronic nose system (E-nose) with metal oxide semiconductor sensors (MOS) has been designed to discriminate and quantify different chemical warfare agents (CWA) mimics. The E-nose consists of an array of commercial MOS for different gases, two sensors for temperature sensing, a sample handling system, a data acquisition system and a laptop with the data acquisition system control. With this device, discrimination studies have been carried out to detect specific CWA simulants...

  8. Investigation of gate leakage mechanism in Al{sub 2}O{sub 3}/Al{sub 0.55}Ga{sub 0.45}N/GaN metal-oxide-semiconductor high-electron-mobility transistors

    Energy Technology Data Exchange (ETDEWEB)

    Zhu, Jie-Jie; Ma, Xiao-Hua, E-mail: xhma@xidian.edu.cn; Hou, Bin; Chen, Wei-Wei [State Key Discipline Laboratory of Wide Bandgap Semiconductor Technology, School of Advanced Materials and Nanotechnology, Xidian University, Xi' an 710071 (China); Hao, Yue [State Key Discipline Laboratory of Wide Bandgap Semiconductor Technology, School of Advanced Materials and Nanotechnology, Xidian University, Xi' an 710071 (China); School of Microelectronics, Xidian University, Xi' an 710071 (China)

    2014-04-14

    The mechanism of both reverse and forward gate leakage currents in Al{sub 2}O{sub 3}/Al{sub 0.55}Ga{sub 0.45}N/GaN structures was studied in this Letter by temperature-dependent current-voltage measurement. Poole–Frenkel (PF) emission, an oxygen vacancy-assisted process, was deduced as the dominant mechanism at high-temperatures (>388 K), and the leakage current at mid-temperatures (<388 K) were found greatly impacted by temperature-independent tunneling current. The reverse PF mission current in low-field, mid-field, and high-field region were related to trap states with activation energy of 0.41 eV, 0.49 eV, and 0.71 eV, respectively, and the activation energy of trap states for forward PF emission current was derived as 0.65 eV.

  9. Double ellipsoid mo del for conductivity effective mass along [110] orientation in (100) Si-based strained p-channel metal-oxide-semiconductor%(100)Si基应变p型金属氧化物半导体[110]晶向电导率有效质量双椭球模型∗

    Institute of Scientific and Technical Information of China (English)

    宋建军; 包文涛; 张静; 唐昭焕; 谭开洲; 崔伟; 胡辉勇; 张鹤鸣

    2016-01-01

    The performance of a Si metal-oxide-semiconductor field-effect transistor can be enhanced effectively by the strain technology and the orientation engineering. For example, the [110] direction is usually used as the channel direction in the Si p-channel metal-oxide-semiconductor (PMOS) on ⟨100⟩ oriented substrate. While SunEdison company rotates the channel direction 45 degrees to the [100] direction, its hole mobility is 1.15 times larger than the hole mobility of the former. The orientation engineering is based on the anisotropy of the hole effective mass along different directions. The enhancement of carrier mobility naturally occurs when we choose the direction with the smaller carrier effective mass as the channel direction. However, according to the reported results in the literature, the hole effective mass values along the [110] and [100] orientation are about 0.6m0 and 0.29m0, respectively. The former is twice larger than the latter, which cannot explain that the experimental result increases 1.15 times. We find that the effective mass values along both the long axis and the short axis should be taken into consideration, and the value of 0.6m0 can only represent the long axis term by observing the equivalent energy diagram of the first sub-band in Si PMOS. In view of this, the double ellipsoid model is given for the conductivity effective mass along the [110] direction in (100) Si PMOS, which explains the reason why the hole mobility along the [100] direction is 1.15 times larger than that along the [110] direction in Si PMOS. And then, based on the E-k relation of the inversion layer in Si-based strained PMOS, we study the conductivity effective mass along the [110] direction in (100) Si-based strained PMOS by the above method. The results show that 1) the [110] oriented hole conductivity effective mass of biaxially strained Si PMOS can be calculated directly by its spherical equivalent energy diagram; 2) in the case of biaxially strained Si1

  10. Heterojunction oxide thin-film transistors with unprecedented electron mobility grown from solution

    Science.gov (United States)

    Faber, Hendrik; Das, Satyajit; Lin, Yen-Hung; Pliatsikas, Nikos; Zhao, Kui; Kehagias, Thomas; Dimitrakopulos, George; Amassian, Aram; Patsalas, Panos A.; Anthopoulos, Thomas D.

    2017-01-01

    Thin-film transistors made of solution-processed metal oxide semiconductors hold great promise for application in the emerging sector of large-area electronics. However, further advancement of the technology is hindered by limitations associated with the extrinsic electron transport properties of the often defect-prone oxides. We overcome this limitation by replacing the single-layer semiconductor channel with a low-dimensional, solution-grown In2O3/ZnO heterojunction. We find that In2O3/ZnO transistors exhibit band-like electron transport, with mobility values significantly higher than single-layer In2O3 and ZnO devices by a factor of 2 to 100. This marked improvement is shown to originate from the presence of free electrons confined on the plane of the atomically sharp heterointerface induced by the large conduction band offset between In2O3 and ZnO. Our finding underscores engineering of solution-grown metal oxide heterointerfaces as an alternative strategy to thin-film transistor development and has the potential for widespread technological applications. PMID:28435867

  11. Free form CMOS electronics: Physically flexible and stretchable

    KAUST Repository

    Hussain, Muhammad Mustafa

    2015-12-07

    Free form (physically flexible and stretchable) electronics can be used for applications which are unexplored today due to the rigid and brittle nature of the state-of-the-art electronics. Therefore, we show integration strategy to rationally design materials, processes and devices to transform advanced complementary metal oxide semiconductor (CMOS) electronics into flexible and stretchable one while retaining their high performance, energy efficiency, ultra-large-scale-integration (ULSI) density, reliability and performance over cost benefit to expand its applications for wearable, implantable and Internet-of-Everything electronics.

  12. L{sub g} = 100 nm In{sub 0.7}Ga{sub 0.3}As quantum well metal-oxide semiconductor field-effect transistors with atomic layer deposited beryllium oxide as interfacial layer

    Energy Technology Data Exchange (ETDEWEB)

    Koh, D., E-mail: dh.koh@utexas.edu, E-mail: Taewoo.Kim@sematech.org [Department of Electrical and Computer Engineering, Microelectronics Research Center, The University of Texas at Austin, Austin, Texas 78758 (United States); SEMATECH, Inc., Albany, New York 12203 (United States); Kwon, H. M. [Department of Electronics Engineering, Chungnam National University, Daejeon 305-764 (Korea, Republic of); Kim, T.-W., E-mail: dh.koh@utexas.edu, E-mail: Taewoo.Kim@sematech.org; Veksler, D.; Gilmer, D.; Kirsch, P. D. [SEMATECH, Inc., Albany, New York 12203 (United States); Kim, D.-H. [SEMATECH, Inc., Albany, New York 12203 (United States); GLOBALFOUNDRIES, Malta, New York 12020 (United States); Hudnall, Todd W. [Department of Chemistry and Biochemistry, Texas State University, San Marcos, Texas, 78666 (United States); Bielawski, Christopher W. [Department of Chemistry and Biochemistry, The University of Texas at Austin, Austin, Texas 78712 (United States); Maszara, W. [GLOBALFOUNDRIES, Santa Clara, California 95054 (United States); Banerjee, S. K. [Department of Electrical and Computer Engineering, Microelectronics Research Center, The University of Texas at Austin, Austin, Texas 78758 (United States)

    2014-04-21

    In this study, we have fabricated nanometer-scale channel length quantum-well (QW) metal-oxide-semiconductor field effect transistors (MOSFETs) incorporating beryllium oxide (BeO) as an interfacial layer. BeO has high thermal stability, excellent electrical insulating characteristics, and a large band-gap, which make it an attractive candidate for use as a gate dielectric in making MOSFETs. BeO can also act as a good diffusion barrier to oxygen owing to its small atomic bonding length. In this work, we have fabricated In{sub 0.53}Ga{sub 0.47}As MOS capacitors with BeO and Al{sub 2}O{sub 3} and compared their electrical characteristics. As interface passivation layer, BeO/HfO{sub 2} bilayer gate stack presented effective oxide thickness less 1 nm. Furthermore, we have demonstrated In{sub 0.7}Ga{sub 0.3}As QW MOSFETs with a BeO/HfO{sub 2} dielectric, showing a sub-threshold slope of 100 mV/dec, and a transconductance (g{sub m,max}) of 1.1 mS/μm, while displaying low values of gate leakage current. These results highlight the potential of atomic layer deposited BeO for use as a gate dielectric or interface passivation layer for III–V MOSFETs at the 7 nm technology node and/or beyond.

  13. The principle and application of metal oxide semiconductor field effect transistor detector during radiotherapy%金属氧化物半导体场效应晶体管剂量探测器的工作原理及在放射治疗中的应用

    Institute of Scientific and Technical Information of China (English)

    倪园园; 涂彧

    2008-01-01

    Metal oxide semiconductor field effect transistor (MOSFET) detector was used to measure radiation dose in space initially, and it was applied to medical domain in recent years. MOSFET detector had extent prospect in clinical field because it had the advantages that other nomal detectors couldn' t compare with. This article introduced the application of MOSFET detector in radiotherapy by summarizing its basic principle, the principle of measuring dose and the relative characteristics.%金属氧化物半导体场效应晶体管(MOSFET)探测器原用于空间系统的辐射测量,近几年才引入到医学领域.由于该探测器具有普通探测设备无法比拟的优点,因此在临床有广泛的应用前景.通过概述MOSFET 20探测器的基本工作原理、剂量探测原理及其相关特性,介绍了MOSFET探测器在放射治疗中的应用.

  14. Self-aligned inversion n-channel In 0.2Ga 0.8As/GaAs metal-oxide-semiconductor field-effect-transistors with TiN gate and Ga 2O 3(Gd 2O 3) dielectric

    Science.gov (United States)

    Chen, C. P.; Lin, T. D.; Lee, Y. J.; Chang, Y. C.; Hong, M.; Kwo, J.

    2008-10-01

    A self-aligned process for fabricating inversion n-channel metal-oxide-semiconductor field-effect-transistors (MOSFET's) of strained In 0.2Ga 0.8As on GaAs using TiN as gate metal and Ga 2O 3(Gd 2O 3) as high κ gate dielectric has been developed. A MOSFET with a 4 μm gate length and a 100 μm gate width exhibits a drain current of 1.5 mA/mm at Vg = 4 V and Vd = 2 V, a low gate leakage of extrinsic transconductance of 1.7 mS/mm at Vg = 3 V, Vd = 2 V, and an on/off ratio of ˜10 5 in drain current. For comparison, a TiN/Ga 2O 3(Gd 2O 3)/In 0.2Ga 0.8As MOS diode after rapid thermal annealing (RTA) to high temperatures of 750 °C exhibits excellent electrical and structural performances: a low leakage current density of 10 -8-10 -9 A/cm 2, well-behaved capacitance-voltage ( C- V) characteristics giving a high dielectric constant of ˜16 and a low interfacial density of state of ˜(2˜6) × 10 11 cm -2 eV -1, and an atomically sharp smooth Ga 2O 3(Gd 2O 3)/In 0.2Ga 0.8As interface.

  15. Characterization of commercial MOSFETS electron dosimetry; Caracterizacion de MOSFETS comerciales para dosimetria con electrones

    Energy Technology Data Exchange (ETDEWEB)

    Carvajal, M. A.; Simancas, F.; Guirado, D.; Banqueri, J.; Vilches, M.; Lallena, A. M.; Palma, A. J.

    2011-07-01

    In recent years there have been commercial dosimetry devices based on transistors Metal-Oxide-Semiconductor (MOSFET) having a number of advantages over traditional systems for dosimetry in medical applications. These include the portability of the sensor element and a reading process quick and relatively simple dose, linearity, and so on. The use of electron beams is important in modern radiotherapy include its use in intra-operative radiotherapy (RIO). This paper presents an initial characterization of different business models MOSFET, not specific for radiation detection, to demonstrate their potential as sensors for electron beam dosimetry. (Author)

  16. An area and power-efficient analog li-ion battery charger circuit.

    Science.gov (United States)

    Do Valle, Bruno; Wentz, Christian T; Sarpeshkar, Rahul

    2011-04-01

    The demand for greater battery life in low-power consumer electronics and implantable medical devices presents a need for improved energy efficiency in the management of small rechargeable cells. This paper describes an ultra-compact analog lithium-ion (Li-ion) battery charger with high energy efficiency. The charger presented here utilizes the tanh basis function of a subthreshold operational transconductance amplifier to smoothly transition between constant-current and constant-voltage charging regimes without the need for additional area- and power-consuming control circuitry. Current-domain circuitry for end-of-charge detection negates the need for precision-sense resistors in either the charging path or control loop. We show theoretically and experimentally that the low-frequency pole-zero nature of most battery impedances leads to inherent stability of the analog control loop. The circuit was fabricated in an AMI 0.5-μm complementary metal-oxide semiconductor process, and achieves 89.7% average power efficiency and an end voltage accuracy of 99.9% relative to the desired target 4.2 V, while consuming 0.16 mm(2) of chip area. To date and to the best of our knowledge, this design represents the most area-efficient and most energy-efficient battery charger circuit reported in the literature.

  17. Electronically Tunable Fractional Order All Pass Filter

    Science.gov (United States)

    Verma, Rakesh; Pandey, Neeta; Pandey, Rajeshwari

    2017-08-01

    In this paper, an electronically tunable fractional order all pass filter (FOAPF) based on operational transconductance amplifier (OTA) is presented. It uses two OTAs and single fractional order capacitor (FC) of non-integer order α to provide FOAPF of α order. Two different values of α, in particular 0.5 and 0.9, for FC are taken for investigation. The functionality of the proposal is verified through SPICE simulations using TSMC 0.18 μm Complementary Metal Oxide Semiconductor (CMOS) process parameters. Simulated and theoretical frequency and time domain responses are found to be in close agreement.

  18. Area-Selective Atomic Layer Deposition: Conformal Coating, Subnanometer Thickness Control, and Smart Positioning.

    Science.gov (United States)

    Fang, Ming; Ho, Johnny C

    2015-09-22

    Transistors have already been made three-dimensional (3D), with device channels (i.e., fins in trigate field-effect transistor (FinFET) technology) that are taller, thinner, and closer together in order to enhance device performance and lower active power consumption. As device scaling continues, these transistors will require more advanced, fabrication-enabling technologies for the conformal deposition of high-κ dielectric layers on their 3D channels with accurate position alignment and thickness control down to the subnanometer scale. Among many competing techniques, area-selective atomic layer deposition (AS-ALD) is a promising method that is well suited to the requirements without the use of complicated, complementary metal-oxide semiconductor (CMOS)-incompatible processes. However, further progress is limited by poor area selectivity for thicker films formed via a higher number of ALD cycles as well as the prolonged processing time. In this issue of ACS Nano, Professor Stacy Bent and her research group demonstrate a straightforward self-correcting ALD approach, combining selective deposition with a postprocess mild chemical etching, which enables selective deposition of dielectric films with thicknesses and processing times at least 10 times larger and 48 times shorter, respectively, than those obtained by conventional AS-ALD processes. These advances present an important technological breakthrough that may drive the AS-ALD technique a step closer toward industrial applications in electronics, catalysis, and photonics, etc. where more efficient device fabrication processes are needed.

  19. Nanometre-scale electronics with III-V compound semiconductors.

    Science.gov (United States)

    del Alamo, Jesús A

    2011-11-16

    For 50 years the exponential rise in the power of electronics has been fuelled by an increase in the density of silicon complementary metal-oxide-semiconductor (CMOS) transistors and improvements to their logic performance. But silicon transistor scaling is now reaching its limits, threatening to end the microelectronics revolution. Attention is turning to a family of materials that is well placed to address this problem: group III-V compound semiconductors. The outstanding electron transport properties of these materials might be central to the development of the first nanometre-scale logic transistors.

  20. Electronic structure of superlattices of graphene and hexagonal boron nitride

    KAUST Repository

    Kaloni, Thaneshwor P.

    2011-11-14

    We study the electronic structure of superlattices consisting of graphene and hexagonal boron nitride slabs, using ab initio density functional theory. We find that the system favors a short C–B bond length at the interface between the two component materials. A sizeable band gap at the Dirac point is opened for superlattices with single graphene layers but not for superlattices with graphene bilayers. The system is promising for applications in electronic devices such as field effect transistors and metal-oxide semiconductors.

  1. Multiobjective Genetic Algorithms Program for the Optimization of an OTA for Front-End Electronics

    Directory of Open Access Journals (Sweden)

    Abdelghani Dendouga

    2014-01-01

    Full Text Available The design of an interface to a specific sensor induces costs and design time mainly related to the analog part. So to reduce these costs, it should have been standardized like digital electronics. The aim of the present work is the elaboration of a method based on multiobjectives genetic algorithms (MOGAs to allow automated synthesis of analog and mixed systems. This proposed methodology is used to find the optimal dimensional transistor parameters (length and width in order to obtain operational amplifier performances for analog and mixed CMOS-(complementary metal oxide semiconductor- based circuit applications. Six performances are considered in this study, direct current (DC gain, unity-gain bandwidth (GBW, phase margin (PM, power consumption (P, area (A, and slew rate (SR. We used the Matlab optimization toolbox to implement the program. Also, by using variables obtained from genetic algorithms, the operational transconductance amplifier (OTA is simulated by using Cadence Virtuoso Spectre circuit simulator in standard TSMC (Taiwan Semiconductor Manufacturing Company RF 0.18 μm CMOS technology. A good agreement is observed between the program optimization and electric simulation.

  2. Hot-carrier-induced linear drain current and threshold voltage degradation for thin layer silicon-on-insulator field P-channel lateral double-diffused metal-oxide-semiconductor

    Energy Technology Data Exchange (ETDEWEB)

    Zhou, Xin; Qiao, Ming; He, Yitao; Li, Zhaoji; Zhang, Bo, E-mail: bozhang@uestc.edu.cn [State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, Sichuan 610054 (China)

    2015-11-16

    Hot-carrier-induced linear drain current (I{sub dlin}) and threshold voltage (V{sub th}) degradations for the thin layer SOI field p-channel lateral double-diffused MOS (pLDMOS) are investigated. Two competition degradation mechanisms are revealed and the hot-carrier conductance modulation model is proposed. In the channel, hot-hole injection induced positive oxide trapped charge and interface trap gives rise to the V{sub th} increasing and the channel conductance (G{sub ch}) decreasing, then reduces I{sub dlin}. In the p-drift region, hot-electron injection induced negative oxide trapped charge enhances the conductance of drift doping resistance (G{sub d}), and then increases I{sub dlin}. Consequently, the eventual I{sub dlin} degradation is controlled by the competition of the two mechanisms due to conductance modulation in the both regions. Based on the model, it is explained that the measured I{sub dlin} anomalously increases while the V{sub th} is increasing with power law. The thin layer field pLDMOS exhibits more severe V{sub th} instability compared with thick SOI layer structure; as a result, it should be seriously evaluated in actual application in switching circuit.

  3. Effect of Nitrogen Concentration on Low-Frequency Noise and Negative Bias Temperature Instability of p-Channel Metal-Oxide-Semiconductor Field-Effect Transistors with Nitrided Gate Oxide

    Science.gov (United States)

    Han, In-Shik; Kwon, Hyuk-Min; Bok, Jung-Deuk; Kwon, Sung-Kyu; Jung, Yi-Jung; Choi, Woon-il; Choi, Deuk-Sung; Lim, Min-Gyu; Chung, Yi-Sun; Lee, Jung-Hwan; Lee, Ga-Won; Lee, Hi-Deok

    2011-10-01

    In this paper, the dependence of negative bias temperature instability (NBTI) and low-frequency noise characteristics on the various nitrided gate oxides is reported. The threshold voltage shift (ΔVT) under NBTI stress for thermally nitrided oxide (TNO) was greater than that of plasma nitrided oxide (PNO), whereas the slopes of ΔVT versus stress time for PNO were similar to those for TNO. The flicker noise (1/f noise) characteristic of PNO was better than that of TNO by about 1 order of magnitude, although the 1/f noise of PNO showed almost the same dependence on the frequency as that of TNO. The carrier number fluctuation model due to the trapping and detrapping of electrons in oxide traps was found to be a dominant mechanism of flicker noise. The probability of the generation of drain current random telegraph signal (ID-RTS) noise shows similar values (70-78%) for all nitrided oxides, which shows that the generation of RTS noise is not greatly affected by the nitridation method or nitrogen concentration.

  4. Coulomb blockade in a Si channel gated by an Al single-electron transistor

    OpenAIRE

    Sun, L.; K. R. Brown; Kane, B. E.

    2007-01-01

    We incorporate an Al-AlO_x-Al single-electron transistor as the gate of a narrow (~100 nm) metal-oxide-semiconductor field-effect transistor (MOSFET). Near the MOSFET channel conductance threshold, we observe oscillations in the conductance associated with Coulomb blockade in the channel, revealing the formation of a Si single-electron transistor. Abrupt steps present in sweeps of the Al transistor conductance versus gate voltage are correlated with single-electron charging events in the Si t...

  5. Program Estimates Areas Required By Electronic Designs

    Science.gov (United States)

    Cox, Brian

    1995-01-01

    PSIZE computer program calculates space required for electronic design. Reads in parts-list file and file containing required area for each type of part. Both unit areas of components and inherent additional space requirements taken into account. Written by use of AWK utility for Sun4-series computers running SunOS 4.x and IBM PC-series and compatible computers running MS-DOS. Sun version (NPO-19589). PC version (NPO-19065).

  6. Large-area lanthanum hexaboride electron emitter

    Science.gov (United States)

    Goebel, D. M.; Hirooka, Y.; Sketchley, T. A.

    1985-09-01

    The characteristics of lanthanum-boron thermionic electron emitters are discussed, and a large-area, continuously operating cathode assembly and heater are described. Impurity production and structural problems involving the support of the LaB6 have been eliminated in the presented configuration. The performance of the cathode in a plasma discharge, where surface modification occurs by ion sputtering, is presented. Problem areas which affect lifetime and emission current capability are discussed.

  7. UV lithography-based protein patterning on silicon: Towards the integration of bioactive surfaces and CMOS electronics

    Energy Technology Data Exchange (ETDEWEB)

    Lenci, S., E-mail: silvia.lenci@iet.unipi.it [Dipartimento di Ingegneria dell' Informazione, via G.Caruso 16, Pisa I-56122 (Italy); Tedeschi, L. [Istituto di Fisiologia Clinica - CNR, via G. Moruzzi 1, Pisa I-56124 (Italy); Pieri, F. [Dipartimento di Ingegneria dell' Informazione, via G.Caruso 16, Pisa I-56122 (Italy); Domenici, C. [Istituto di Fisiologia Clinica - CNR, via G. Moruzzi 1, Pisa I-56124 (Italy)

    2011-08-01

    A simple and fast methodology for protein patterning on silicon substrates is presented, providing an insight into possible issues related to the interaction between biological and microelectronic technologies. The method makes use of standard photoresist lithography and is oriented towards the implementation of biosensors containing Complementary Metal-Oxide-Semiconductor (CMOS) conditioning circuitry. Silicon surfaces with photoresist patterns were prepared and hydroxylated by means of resist- and CMOS backend-compatible solutions. Subsequent aminosilane deposition and resist lift-off in organic solvents resulted into well-controlled amino-terminated geometries. The discussion is focused on resist- and CMOS-compatibility problems related to the used chemicals. Some samples underwent gold nanoparticle (Au NP) labeling and Scanning Electron Microscopy (SEM) observation, in order to investigate the quality of the silane layer. Antibodies were immobilized on other samples, which were subsequently exposed to a fluorescently labeled antigen. Fluorescence microscopy observation showed that this method provides spatially selective immobilization of protein layers onto APTES-patterned silicon samples, while preserving protein reactivity inside the desired areas and low non-specific adsorption elsewhere. Strong covalent biomolecule binding was achieved, giving stable protein layers, which allows stringent binding conditions and a good binding specificity, really useful for biosensing.

  8. Spin-droplet state of an interacting 2D electron system.

    Science.gov (United States)

    Teneh, N; Kuntsevich, A Yu; Pudalov, V M; Reznikov, M

    2012-11-30

    We report thermodynamic magnetization measurements of two-dimensional electrons in several high-mobility Si metal-oxide-semiconductor field-effect transistors. We provide evidence for an easily polarizable electron state in a wide density range from insulating to deep into the metallic phase. The temperature and magnetic field dependence of the magnetization is consistent with the formation of large-spin droplets in the insulating phase. These droplets melt in the metallic phase with increasing density and temperature, though they survive up to large densities.

  9. Impact of La{sub 2}O{sub 3} interfacial layers on InGaAs metal-oxide-semiconductor interface properties in Al{sub 2}O{sub 3}/La{sub 2}O{sub 3}/InGaAs gate stacks deposited by atomic-layer-deposition

    Energy Technology Data Exchange (ETDEWEB)

    Chang, C.-Y., E-mail: cychang@mosfet.t.u-tokyo.ac.jp; Takenaka, M.; Takagi, S. [Department of Electrical Engineering and Information Systems, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-0032 (Japan); JST-CREST, K' s Gobancho, 7 Gobancho, Chiyoda-ku, Tokyo 102-0076 (Japan); Ichikawa, O.; Osada, T.; Hata, M.; Yamada, H. [JST-CREST, K' s Gobancho, 7 Gobancho, Chiyoda-ku, Tokyo 102-0076 (Japan); Sumitomo Chemical Co. Ltd., 6 Kitahara, Tsukuba, Ibaraki 300-3294 (Japan)

    2015-08-28

    We examine the electrical properties of atomic layer deposition (ALD) La{sub 2}O{sub 3}/InGaAs and Al{sub 2}O{sub 3}/La{sub 2}O{sub 3}/InGaAs metal-oxide-semiconductor (MOS) capacitors. It is found that the thick ALD La{sub 2}O{sub 3}/InGaAs interface provides low interface state density (D{sub it}) with the minimum value of ∼3 × 10{sup 11} cm{sup −2} eV{sup −1}, which is attributable to the excellent La{sub 2}O{sub 3} passivation effect for InGaAs surfaces. It is observed, on the other hand, that there are a large amount of slow traps and border traps in La{sub 2}O{sub 3}. In order to simultaneously satisfy low D{sub it} and small hysteresis, the effectiveness of Al{sub 2}O{sub 3}/La{sub 2}O{sub 3}/InGaAs gate stacks with ultrathin La{sub 2}O{sub 3} interfacial layers is in addition evaluated. The reduction of the La{sub 2}O{sub 3} thickness to 0.4 nm in Al{sub 2}O{sub 3}/La{sub 2}O{sub 3}/InGaAs gate stacks leads to the decrease in hysteresis. On the other hand, D{sub it} of the Al{sub 2}O{sub 3}/La{sub 2}O{sub 3}/InGaAs interfaces becomes higher than that of the La{sub 2}O{sub 3}/InGaAs ones, attributable to the diffusion of Al{sub 2}O{sub 3} through La{sub 2}O{sub 3} into InGaAs and resulting modification of the La{sub 2}O{sub 3}/InGaAs interface structure. As a result of the effective passivation effect of La{sub 2}O{sub 3} on InGaAs, however, the Al{sub 2}O{sub 3}/10 cycle (0.4 nm) La{sub 2}O{sub 3}/InGaAs gate stacks can realize still lower D{sub it} with maintaining small hysteresis and low leakage current than the conventional Al{sub 2}O{sub 3}/InGaAs MOS interfaces.

  10. Radiation effects and soft errors in integrated circuits and electronic devices

    CERN Document Server

    Fleetwood, D M

    2004-01-01

    This book provides a detailed treatment of radiation effects in electronic devices, including effects at the material, device, and circuit levels. The emphasis is on transient effects caused by single ionizing particles (single-event effects and soft errors) and effects produced by the cumulative energy deposited by the radiation (total ionizing dose effects). Bipolar (Si and SiGe), metal-oxide-semiconductor (MOS), and compound semiconductor technologies are discussed. In addition to considering the specific issues associated with high-performance devices and technologies, the book includes th

  11. Analog electronics for radiation detection

    CERN Document Server

    2016-01-01

    Analog Electronics for Radiation Detection showcases the latest advances in readout electronics for particle, or radiation, detectors. Featuring chapters written by international experts in their respective fields, this authoritative text: Defines the main design parameters of front-end circuitry developed in microelectronics technologies Explains the basis for the use of complementary metal oxide semiconductor (CMOS) image sensors for the detection of charged particles and other non-consumer applications Delivers an in-depth review of analog-to-digital converters (ADCs), evaluating the pros and cons of ADCs integrated at the pixel, column, and per-chip levels Describes incremental sigma delta ADCs, time-to-digital converter (TDC) architectures, and digital pulse-processing techniques complementary to analog processing Examines the fundamental parameters and front-end types associated with silicon photomultipliers used for single visible-light photon detection Discusses pixel sensors ...

  12. Spin Dynamics of Electrons Confined in Silicon Heterostructures

    Science.gov (United States)

    Jock, Ryan Michael

    The spin states of electrons confined in silicon heterostructures have shown promise as qubits for quantum information processing. Recently, a host of single and few electron silicon quantum dot device architectures have arisen as implementations for quantum computation. These devices often combine regions of low density two-dimensional (2D) electrons, localized electrons, and interfaces depleted of electrons. Electron spin resonance (ESR) is a unique tool for probing the spin dynamics of both mobile and localized electrons at silicon heterointerfaces and investigating the effects limiting the ability to control electrons and their spin states in these structures. We use a continuous wave ESR method to examine localized 2D electron band-tail states at Si/SiO 2 interfaces in large area metal-oxide-semiconductor transistors. We compare two devices, fabricated in different laboratories, which display similar low temperature (4.2 K) peak mobilities. We find that one of the devices displays a smaller band-tail density of confined states and a shallower characteristic confinement. Thus, ESR reveals a difference in device quality, which is not apparent from mobility measurements, and is a valuable tool for evaluating the interface quality in Si/SiO2 heterostructures. Additionally, we use pulsed ESR techniques to study the spin dynamics of electrons confined in Si/SiGe heterostructures. For mobile 2D electrons, the density-dependent Dyakonov-Perel mechanism dominates spin relaxation. At low 2D densities, stronger electron-electron interactions cause an increase in the electron effective mass, leading to an increase in spin susceptibility. For very low densities, natural disorder localizes electrons at the silicon heterointerface. Naturally localized electrons in these structures display short spin relaxation times (ensembles of around 108 quantum dots in Si/SiGe heterostructures. By tailoring the device structure, a long electron spin relaxation time (T1 = 1.4 ms) is

  13. Electronics based on two-dimensional materials.

    Science.gov (United States)

    Fiori, Gianluca; Bonaccorso, Francesco; Iannaccone, Giuseppe; Palacios, Tomás; Neumaier, Daniel; Seabaugh, Alan; Banerjee, Sanjay K; Colombo, Luigi

    2014-10-01

    The compelling demand for higher performance and lower power consumption in electronic systems is the main driving force of the electronics industry's quest for devices and/or architectures based on new materials. Here, we provide a review of electronic devices based on two-dimensional materials, outlining their potential as a technological option beyond scaled complementary metal-oxide-semiconductor switches. We focus on the performance limits and advantages of these materials and associated technologies, when exploited for both digital and analog applications, focusing on the main figures of merit needed to meet industry requirements. We also discuss the use of two-dimensional materials as an enabling factor for flexible electronics and provide our perspectives on future developments.

  14. Electric properties of organic and mineral electronic components, design and modelling of a photovoltaic chain for a better exploitation of the solar energy; Proprietes electriques des composants electroniques mineraux et organiques, conception et modelisation d'une chaine photovoltaique pour une meilleure exploitation de l'energie solaire

    Energy Technology Data Exchange (ETDEWEB)

    Aziz, A

    2006-11-15

    The research carried out in this thesis relates to the mineral, organic electronic components and the photovoltaic systems. Concerning the mineral semiconductors, we modelled the conduction properties of the structures metal/oxide/semiconductor (MOS) strongly integrated in absence and in the presence of charges. We proposed a methodology allowing characterizing the ageing of structures MOS under injection of the Fowler Nordheim (FN) current type. Then, we studied the Schottky diodes in polymers of type metal/polymer/metal. We concluded that: The mechanism of the charges transfer, through the interface metal/polymer, is allotted to the thermo-ionic effect and could be affected by the lowering of the potential barrier to the interface metal/polymer. In the area of photovoltaic energy, we conceived and modelled a photovoltaic system of average power (100 W). We showed that the adaptation of the generator to the load allows a better exploitation of solar energy. This is carried out by the means of the converters controlled by an of type MPPT control provided with a detection circuit of dysfunction and restarting of the system. (author)

  15. Ion-beam synthesis of Ge{sub x}Si{sub 1-x} strained layers for high speed electronic device applications

    Energy Technology Data Exchange (ETDEWEB)

    Elliman, R.G.; Jiang, H.; Wong, W.C.; Kringhoj, P. [Australian National Univ., Canberra, ACT (Australia)

    1996-12-31

    It is shown that Ge{sub x}S{sub 1-x} strained layers can be fabricated by Ge implantation and solid-phase epitaxy and that the use of these layers can improve the performance of electronic devices. Several materials science issues are addressed, including the effect of Ge on solid-phase-epitaxy, the effect of oxidation on the implanted Ge distribution, and the effect of Ge on the oxidation rate of Si. The process is demonstrated for metal-oxide-semiconductor field-effect-transistors (MOSFETs). 6 refs., 5 figs.

  16. Proximity effect of electron beam lithography on single-electron transistors

    Indian Academy of Sciences (India)

    Shu-Fen Hu; Kuo-Dong Huang; Yue-Min Wan; Chin-Lung Sung

    2006-07-01

    A simple method, based on the proximity effect of electron beam lithography, alleviated by exposing various shapes in the pattern of incident electron exposures with various intensities, was applied to fabricate silicon point-contact devices. The drain current (d) of the device oscillates against gate voltage. The electrical characteristics of the single-electron transistor were observed to be consistent with the expected behavior of electron transport through gated quantum dots, up to 150 K. The dependence of the electrical characteristics on the dot size reveals that the d oscillation follows from the Coulomb blockade by poly-Si grains in the poly-Si dot. The method of fabrication of this device is completely compatible with complementary metal-oxide-semiconductor technology, raising the possibility of manufacturing large-scale integrated nanoelectronic systems.

  17. Single electron charging and transport in silicon rich oxide

    Energy Technology Data Exchange (ETDEWEB)

    Yu Zhenrui; Aceves-Mijares, Mariano; Cabrera, Marco Antonio Ipina [Department of Electronics, INAOE, Apartado 51, Puebla, Puebla 72000 (Mexico)

    2006-08-14

    Single electron charging and single electron tunnelling effects were observed in silicon rich oxide (SRO). The devices used in this study have an Al/SRO/Si metal-oxide-semiconductor-like structure, where the SRO layer was deposited using low pressure chemical vapour deposition. Two types of Si nanodots (NDs), interface NDs and bulk NDs, were identified by transmission electron microscopy measurements. Under electric field, charges from the Si substrate are transferred into the interface NDs that locate at the interface, and each interface ND traps only one carrier. As the voltage increases, conduction paths between the Al electrode and the silicon substrate are formed, and the conduction of electrons is via sequential tunnelling through the bulk NDs. Due to the Coulomb blockade effect, only one electron tunnels on each nanodot at a specific electric field. The transport of the electrons through the Si nanodots is due to the Poole-Frenkel mechanism in the voltage regime studied.

  18. Single-molecule electronics: from chemical design to functional devices.

    Science.gov (United States)

    Sun, Lanlan; Diaz-Fernandez, Yuri A; Gschneidtner, Tina A; Westerlund, Fredrik; Lara-Avila, Samuel; Moth-Poulsen, Kasper

    2014-11-07

    The use of single molecules in electronics represents the next limit of miniaturisation of electronic devices, which would enable us to continue the trend of aggressive downscaling of silicon-based electronic devices. More significantly, the fabrication, understanding and control of fully functional circuits at the single-molecule level could also open up the possibility of using molecules as devices with novel, not-foreseen functionalities beyond complementary metal-oxide semiconductor technology (CMOS). This review aims at highlighting the chemical design and synthesis of single molecule devices as well as their electrical and structural characterization, including a historical overview and the developments during the last 5 years. We discuss experimental techniques for fabrication of single-molecule junctions, the potential application of single-molecule junctions as molecular switches, and general physical phenomena in single-molecule electronic devices.

  19. Detective quantum efficiency of electron area detectors in electron microscopy

    Energy Technology Data Exchange (ETDEWEB)

    McMullan, G., E-mail: gm2@mrc-lmb.cam.ac.uk [MRC Laboratory of Molecular Biology, Hills Road, Cambridge CB2 0QH (United Kingdom); Chen, S.; Henderson, R.; Faruqi, A.R. [MRC Laboratory of Molecular Biology, Hills Road, Cambridge CB2 0QH (United Kingdom)

    2009-08-15

    Recent progress in detector design has created the need for a careful side-by-side comparison of the modulation transfer function (MTF) and resolution-dependent detective quantum efficiency (DQE) of existing electron detectors with those of detectors based on new technology. We present MTF and DQE measurements for four types of detector: Kodak SO-163 film, TVIPS 224 charge coupled device (CCD) detector, the Medipix2 hybrid pixel detector, and an experimental direct electron monolithic active pixel sensor (MAPS) detector. Film and CCD performance was measured at 120 and 300 keV, while results are presented for the Medipix2 at 120 keV and for the MAPS detector at 300 keV. In the case of film, the effects of electron backscattering from both the holder and the plastic support have been investigated. We also show that part of the response of the emulsion in film comes from light generated in the plastic support. Computer simulations of film and the MAPS detector have been carried out and show good agreement with experiment. The agreement enables us to conclude that the DQE of a backthinned direct electron MAPS detector is likely to be equal to, or better than, that of film at 300 keV.

  20. Detective quantum efficiency of electron area detectors in electron microscopy.

    Science.gov (United States)

    McMullan, G; Chen, S; Henderson, R; Faruqi, A R

    2009-08-01

    Recent progress in detector design has created the need for a careful side-by-side comparison of the modulation transfer function (MTF) and resolution-dependent detective quantum efficiency (DQE) of existing electron detectors with those of detectors based on new technology. We present MTF and DQE measurements for four types of detector: Kodak SO-163 film, TVIPS 224 charge coupled device (CCD) detector, the Medipix2 hybrid pixel detector, and an experimental direct electron monolithic active pixel sensor (MAPS) detector. Film and CCD performance was measured at 120 and 300 keV, while results are presented for the Medipix2 at 120 keV and for the MAPS detector at 300 keV. In the case of film, the effects of electron backscattering from both the holder and the plastic support have been investigated. We also show that part of the response of the emulsion in film comes from light generated in the plastic support. Computer simulations of film and the MAPS detector have been carried out and show good agreement with experiment. The agreement enables us to conclude that the DQE of a backthinned direct electron MAPS detector is likely to be equal to, or better than, that of film at 300 keV.

  1. An ultra-low-voltage electronic implementation of inertial neuron model with nonmonotonous Liao's activation function.

    Science.gov (United States)

    Kant, Nasir Ali; Dar, Mohamad Rafiq; Khanday, Farooq Ahmad

    2015-01-01

    The output of every neuron in neural network is specified by the employed activation function (AF) and therefore forms the heart of neural networks. As far as the design of artificial neural networks (ANNs) is concerned, hardware approach is preferred over software one because it promises the full utilization of the application potential of ANNs. Therefore, besides some arithmetic blocks, designing AF in hardware is the most important for designing ANN. While attempting to design the AF in hardware, the designs should be compatible with the modern Very Large Scale Integration (VLSI) design techniques. In this regard, the implemented designs should: only be in Metal Oxide Semiconductor (MOS) technology in order to be compatible with the digital designs, provide electronic tunability feature, and be able to operate at ultra-low voltage. Companding is one of the promising circuit design techniques for achieving these goals. In this paper, 0.5 V design of Liao's AF using sinh-domain technique is introduced. Furthermore, the function is tested by implementing inertial neuron model. The performance of the AF and inertial neuron model have been evaluated through simulation results, using the PSPICE software with the MOS transistor models provided by the 0.18-μm Taiwan Semiconductor Manufacturer Complementary Metal Oxide Semiconductor (TSM CMOS) process.

  2. A physically transient form of silicon electronics.

    Science.gov (United States)

    Hwang, Suk-Won; Tao, Hu; Kim, Dae-Hyeong; Cheng, Huanyu; Song, Jun-Kyul; Rill, Elliott; Brenckle, Mark A; Panilaitis, Bruce; Won, Sang Min; Kim, Yun-Soung; Song, Young Min; Yu, Ki Jun; Ameen, Abid; Li, Rui; Su, Yewang; Yang, Miaomiao; Kaplan, David L; Zakin, Mitchell R; Slepian, Marvin J; Huang, Yonggang; Omenetto, Fiorenzo G; Rogers, John A

    2012-09-28

    A remarkable feature of modern silicon electronics is its ability to remain physically invariant, almost indefinitely for practical purposes. Although this characteristic is a hallmark of applications of integrated circuits that exist today, there might be opportunities for systems that offer the opposite behavior, such as implantable devices that function for medically useful time frames but then completely disappear via resorption by the body. We report a set of materials, manufacturing schemes, device components, and theoretical design tools for a silicon-based complementary metal oxide semiconductor (CMOS) technology that has this type of transient behavior, together with integrated sensors, actuators, power supply systems, and wireless control strategies. An implantable transient device that acts as a programmable nonantibiotic bacteriocide provides a system-level example.

  3. 5-kW arcjet power electronics

    Science.gov (United States)

    Gruber, R. P.; Gott, R. W.; Haag, T. W.

    1989-01-01

    The initial design and evaluation of a 5 kW arcjet power electronics breadboard which as been integrated with a modified 1 kW design laboratory arcjet is presented. A single stage, 5 kW full bridge, pulse width modulated (PWM), power converter was developed which was phase shift regulated. The converter used metal oxide semiconductor field effect transistor (MOSFET) power switches and incorporated current mode control and an integral arcjet pulse ignition circuit. The unoptimized power efficiency was 93.5 and 93.9 percent at 5 kW and 50A output at input voltages of 130 and 150V, respectively. Line and load current regulation at 50A output was within one percent. The converter provided up to 6.6 kW to the arcjet with simulated ammonia used as a propellant.

  4. Characterization and Modeling of Power Electronics Device

    Directory of Open Access Journals (Sweden)

    Tandjaoui Mohammed Nasser

    2014-10-01

    Full Text Available During the three decades spent, the advances of high voltage/current semiconductor technology directly affect the power electronics converter technology and its progress. The developments of power semiconductors led successively to the appearance of the elements such as the Thyristors, and become commercially available. The various semiconductor devices can be classified into the way they can be controlled, uncontrolled category such as the Diode when it’s on or off state is controlled by the power circuit, and second category is the fully controlled such as the Metal Oxide Semiconductor Field Effect Transistor (MOSFET, and this category can be included a new hybrid devices such as the Insulated Gate Bipolar Transistor (IGBT, and the Gate Turn-off Thyristor (GTO. This paper describes the characteristics and modeling of several types of power semiconductor devices such as MOSFET, IGBT and GTO.

  5. A New Area to Fight: Electronic Cigarette

    Directory of Open Access Journals (Sweden)

    Şermin Börekçi

    2015-08-01

    Full Text Available Electronic cigarette (e-cigarette is spreading like an epidemic that threatens the public health. Last one year, e-cigarette use increased by 2 times in both adults and children, and just as the cigarette ads of 1950s and 1960s, e-cigarette ads are taking place in the television, radio, internet, magazines and in the all kinds of advertising media. E-sigara should be recognized as a serious health threat, and should be fought against it. The aim of this review is to show the effects of e-cigarette on health by the scientific evidences.

  6. Thin film transistors for flexible electronics: contacts, dielectrics and semiconductors.

    Science.gov (United States)

    Quevedo-Lopez, M A; Wondmagegn, W T; Alshareef, H N; Ramirez-Bon, R; Gnade, B E

    2011-06-01

    The development of low temperature, thin film transistor processes that have enabled flexible displays also present opportunities for flexible electronics and flexible integrated systems. Of particular interest are possible applications in flexible sensor systems for unattended ground sensors, smart medical bandages, electronic ID tags for geo-location, conformal antennas, radiation detectors, etc. In this paper, we review the impact of gate dielectrics, contacts and semiconductor materials on thin film transistors for flexible electronics applications. We present our recent results to fully integrate hybrid complementary metal oxide semiconductors comprising inorganic and organic-based materials. In particular, we demonstrate novel gate dielectric stacks and semiconducting materials. The impact of source and drain contacts on device performance is also discussed.

  7. Thin film transistors for flexible electronics: Contacts, dielectrics and semiconductors

    KAUST Repository

    Quevedo-López, Manuel Angel Quevedo

    2011-06-01

    The development of low temperature, thin film transistor processes that have enabled flexible displays also present opportunities for flexible electronics and flexible integrated systems. Of particular interest are possible applications in flexible sensor systems for unattended ground sensors, smart medical bandages, electronic ID tags for geo-location, conformal antennas, radiation detectors, etc. In this paper, we review the impact of gate dielectrics, contacts and semiconductor materials on thin film transistors for flexible electronics applications. We present our recent results to fully integrate hybrid complementary metal oxide semiconductors comprising inorganic and organic-based materials. In particular, we demonstrate novel gate dielectric stacks and semiconducting materials. The impact of source and drain contacts on device performance is also discussed. Copyright © 2011 American Scientific Publishers.

  8. Rotational total skin electron irradiation with a linear accelerator.

    Science.gov (United States)

    Reynard, Eric P; Evans, Michael D C; Devic, Slobodan; Parker, William; Freeman, Carolyn R; Roberge, David; Podgorsak, Ervin B

    2008-11-03

    The rotational total skin electron irradiation (RTSEI) technique at our institution has undergone several developments over the past few years. Replacement of the formerly used linear accelerator has prompted many modifications to the previous technique. With the current technique, the patient is treated with a single large field while standing on a rotating platform, at a source-to-surface distance of 380 cm. The electron field is produced by a Varian 21EX linear accelerator using the commercially available 6 MeV high dose rate total skin electron mode, along with a custom-built flattening filter. Ionization chambers, radiochromic film, and MOSFET (metal oxide semiconductor field effect transistor) detectors have been used to determine the dosimetric properties of this technique. Measurements investigating the stationary beam properties, the effects of full rotation, and the dose distributions to a humanoid phantom are reported. The current treatment technique and dose regimen are also described.

  9. Ink-Jet Printed CMOS Electronics from Oxide Semiconductors.

    Science.gov (United States)

    Garlapati, Suresh Kumar; Baby, Tessy Theres; Dehm, Simone; Hammad, Mohammed; Chakravadhanula, Venkata Sai Kiran; Kruk, Robert; Hahn, Horst; Dasgupta, Subho

    2015-08-05

    Complementary metal oxide semiconductor (CMOS) technology with high transconductance and signal gain is mandatory for practicable digital/analog logic electronics. However, high performance all-oxide CMOS logics are scarcely reported in the literature; specifically, not at all for solution-processed/printed transistors. As a major step toward solution-processed all-oxide electronics, here it is shown that using a highly efficient electrolyte-gating approach one can obtain printed and low-voltage operated oxide CMOS logics with high signal gain (≈21 at a supply voltage of only 1.5 V) and low static power dissipation. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  10. Reversibly Bistable Flexible Electronics

    KAUST Repository

    Alfaraj, Nasir

    2015-05-01

    Introducing the notion of transformational silicon electronics has paved the way for integrating various applications with silicon-based, modern, high-performance electronic circuits that are mechanically flexible and optically semitransparent. While maintaining large-scale production and prototyping rapidity, this flexible and translucent scheme demonstrates the potential to transform conventionally stiff electronic devices into thin and foldable ones without compromising long-term performance and reliability. In this work, we report on the fabrication and characterization of reversibly bistable flexible electronic switches that utilize flexible n-channel metal-oxide-semiconductor field-effect transistors. The transistors are fabricated initially on rigid (100) silicon substrates before they are peeled off. They can be used to control flexible batches of light-emitting diodes, demonstrating both the relative ease of scaling at minimum cost and maximum reliability and the feasibility of integration. The peeled-off silicon fabric is about 25 µm thick. The fabricated devices are transferred to a reversibly bistable flexible platform through which, for example, a flexible smartphone can be wrapped around a user’s wrist and can also be set back to its original mechanical position. Buckling and cyclic bending of such host platforms brings a completely new dimension to the development of flexible electronics, especially rollable displays.

  11. Development of a CMOS Route for Electron Pumps to Be Used in Quantum Metrology

    Directory of Open Access Journals (Sweden)

    Sylvain Barraud

    2016-03-01

    Full Text Available The definition of the ampere will change in the next few years. This electrical base unit of the S.I. will be redefined by fixing the value of the charge quantum, i.e., the electron charge e. As a result electron pumps will become the natural device for the mise en pratique of this new ampere. In the last years semiconductor electron pumps have emerged as the most advanced systems, both in terms of speed and precision. Another figure of merit for a metrological device would be its ability to be predictible and shared. For that reason a mature fabrication process would certainly be an advantage. In this article we present electron pumps made within a CMOS (Complementary Metal Oxide Semiconductor research facility on 300 mm silicon-on-insulator wafers, using advanced microelectronics tools and processes. We give an overview of the whole integration scheme and emphasize the fabrication steps which differ from the normal CMOS route.

  12. Electronics Engineering Department Thrust Area report FY'84

    Energy Technology Data Exchange (ETDEWEB)

    Minichino, C.; Phelps, P.L. (eds.)

    1984-01-01

    This report describes the work of the Electronics Engineering Department Thrust Areas for FY'84: diagnostics and microelectronic engineering; signal and control engineering; microwave and pulsed power engineering; computer-aided engineering; engineering modeling and simulation; and systems engineering. For each Thrust Area, an overview and a description of the goals and achievements of each project is provided.

  13. The 5-kW arcjet power electronics

    Science.gov (United States)

    Gruber, R. P.; Gott, R. W.; Haag, T. W.

    1989-01-01

    The initial design and evaluation of a 5 kW arcjet power electronics breadboard which as been integrated with a modified 1 kW design laboratory arcjet is presented. A single stage, 5 kW full bridge, pulse width modulated (PWM), power converter was developed which was phase shift regulated. The converter used metal oxide semiconductor field effect transistor (MOSFET) power switches and incorporated current mode control and an integral arcjet pulse ignition circuit. The unoptimized power efficiency was 93.5 and 93.9 percent at 5 kW and 50A output at input voltages of 130 and 150V, respectively. Line and load current regulation at 50A output was within one percent. The converter provided up to 6.6 kW to the arcjet with simulated ammonia used as a propellant.

  14. Novel multi-chromophor light absorber concepts for DSSCs for efficient electron injection

    Energy Technology Data Exchange (ETDEWEB)

    Schuetz, Robert; Strothkaemper, Christian; Bartelt, Andreas; Hannappel, Thomas; Eichberger, Rainer [Helmholtz-Zentrum Berlin fuer Materialien und Energie, Hahn-Meitner-Platz 1, 14109 Berlin (Germany); Fasting, Carlo [Institut fuer Organische Chemie, Freie Universitaet Berlin, Takustrasse 3, 14195 Berlin (Germany); Thomas, Inara [Helmholtz-Zentrum Berlin fuer Materialien und Energie, Hahn-Meitner-Platz 1, 14109 Berlin (Germany); Institut fuer Organische Chemie, Freie Universitaet Berlin, Takustrasse 3, 14195 Berlin (Germany)

    2011-07-01

    Dye sensitized solar cells (DSSCs) operate by injecting electrons from the excited state of a light-harvesting dye into the continuum of conduction band states of a wide bandgap semiconductor. The light harvesting efficiency of pure organic dyes is limited by a narrow spectral electronic transition. A beneficial broad ground state absorption in the VIS region can be achieved by applying a single molecular dye system with multiple chromophors involving a Foerster resonance energy transfer (FRET) mechanism for an efficient electron injection. A model donor acceptor dye system capable for FRET chemically linked to colloidal TiO{sub 2} and ZnO nanorod surfaces was investigated in UHV environment. We used VIS/NIR femtosecond transient absorption spectroscopy and optical pump terahertz probe spectroscopy to study the charge injection dynamics of the antenna system. Different chromophors attached to a novel scaffold/anchor system connecting the organic absorber unit to the metal oxide semiconductor were probed.

  15. Program For Local-Area-Network Electronic Mail

    Science.gov (United States)

    Weiner, Michael J.

    1989-01-01

    MailRoom is computer program for local-area network (LAN) electronic mail. Enables users of LAN to exchange electronically notes, letters, reminders, or any sort of communication via their computers. Links all users of LAN into communication circle in which messages created, sent, copied, printed, downloaded, uploaded, and deleted through series of menu-driven screens. Includes feature that enables users to determine whether messages sent have been read by receivers. Written in Microsoft QuickBasic.

  16. MOS Capacitance-Voltage Characteristics Ⅱ.Sensitivity of Electronic Trapping at Dopant Impurity from Parameter Variations

    Institute of Scientific and Technical Information of China (English)

    Jie Binbin; Sah Chihtang

    2011-01-01

    Low-frequency and high-frequency Capacitance-Voltage(C V)curves of Metal OxideSemiconductor Capacitors(MOSC),including electron and hole trapping at the dopant donor and acceptor impurities,are presented to illustrate giant trapping capacitances,from > 0.01Cox to > 10Cox.Five device and materials parameters are varied for fundamental trapping parameter characterization,and electrical and optical signal processing applications.Parameters include spatially constant concentration of the dopant-donor-impurity electron trap,NDD,the ground state electron trapping energy level depth measured from the conduction band edge,EC-ED,the degeneracy of the trapped electron at the ground state,gD,the device temperature,T,and the gate oxide thickness,xox.

  17. Semiconductor-based, large-area, flexible, electronic devices

    Science.gov (United States)

    Goyal, Amit

    2011-03-15

    Novel articles and methods to fabricate the same resulting in flexible, large-area, triaxially textured, single-crystal or single-crystal-like, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

  18. Plasmonic and electronic device-based integrated circuits and their characteristics

    Science.gov (United States)

    Sakai, H.; Okahisa, S.; Nakayama, Y.; Nakayama, K.; Fukuhara, M.; Kimura, Y.; Ishii, Y.; Fukuda, M.

    2016-11-01

    This paper presents a plasmonic circuit that has been monolithically integrated with electronic devices on a silicon substrate and then discusses the concept behind this circuit. To form the proposed circuit, two plasmonic waveguides and a detector are integrated with metal-oxide-semiconductor field-effect transistors (MOSFETs) on the substrate. In the circuit, intensity signals or coherent plasmonic signals are generated by coherent light at an operating wavelength at which silicon is transparent, and these signals propagate along the waveguides before they are converted into electrical signals by the detector. These electrical intensity and coherent signals then drive the MOSFETs during both DC and AC operation. The measured performances of the devices indicate that surface plasmon polaritons propagate on the metal surface at the speed of light and drive the electronic devices without any absorption in the silicon.

  19. Lithographically defined few-electron silicon quantum dots based on a silicon-on-insulator substrate

    Energy Technology Data Exchange (ETDEWEB)

    Horibe, Kosuke; Oda, Shunri [Department of Physical Electronics and Quantum Nanoelectronics Research Center, Tokyo Institute of Technology, 2-12-1 Ookayama, Meguro, Tokyo 152-8552 (Japan); Kodera, Tetsuo, E-mail: kodera.t.ac@m.titech.ac.jp [Department of Physical Electronics and Quantum Nanoelectronics Research Center, Tokyo Institute of Technology, 2-12-1 Ookayama, Meguro, Tokyo 152-8552 (Japan); Institute for Nano Quantum Information Electronics, The University of Tokyo, 4-6-1 Komaba, Meguro, Tokyo 153-8505 (Japan)

    2015-02-23

    Silicon quantum dot (QD) devices with a proximal single-electron transistor (SET) charge sensor have been fabricated in a metal-oxide-semiconductor structure based on a silicon-on-insulator substrate. The charge state of the QDs was clearly read out using the charge sensor via the SET current. The lithographically defined small QDs enabled clear observation of the few-electron regime of a single QD and a double QD by charge sensing. Tunnel coupling on tunnel barriers of the QDs can be controlled by tuning the top-gate voltages, which can be used for manipulation of the spin quantum bit via exchange interaction between tunnel-coupled QDs. The lithographically defined silicon QD device reported here is technologically simple and does not require electrical gates to create QD confinement potentials, which is advantageous for the integration of complicated constructs such as multiple QD structures with SET charge sensors for the purpose of spin-based quantum computing.

  20. A nanoCryotron comparator can connect single-flux quantum circuits to conventional electronics

    CERN Document Server

    Zhao, Qing-Yuan; Dane, Andrew E; Berggren, Karl K; Ortlepp, Thomas

    2016-01-01

    Integration with conventional electronics offers a straightforward and economical approach to upgrading existing superconducting technologies, such as scaling up superconducting detectors into large arrays and combining single flux quantum (SFQ) digital circuits with semiconductor logic and memories. However, direct output signals from superconducting devices (e.g., Josephson junctions) are usually not compatible with the input requirements of conventional devices (e.g., transistors). Here, we demonstrate the use of a single three-terminal superconducting-nanowire device, called the nanocryotron (nTron), as a digital comparator to combine SFQ circuits with mature semiconductor circuits such as complementary metal oxide semiconductor (CMOS) circuits. Since SFQ circuits can digitize output signals from general superconducting devices and CMOS circuits can interface existing CMOS-compatible electronics, our results demonstrate the feasibility of a general architecture that uses an nTron as an interface to realiz...

  1. Modification of a Scanning Tunneling Microscope for Measurement of Ballistic Electron Emission Microscopy

    Science.gov (United States)

    Hsieh, Satcher; Hong, Jeongmin; Bokor, Jeffrey

    2014-03-01

    Magnetic memory and logic devices show great promise for integration with, and even replacement of, conventional complementary metal-oxide-semiconductor (CMOS) architectures. In order to characterize materials and deposition techniques for these devices, ballistic electron emission microscopy (BEEM) is used. BEEM is a spatially resolved metrological tool most commonly used for subsurface interface structures at the nanometer scale. We modify a scanning tunneling microscope (STM) to perform BEEM measurement via design and fabrication of a novel sample stage. Furthermore, we design and fabricate an external magnetic field source that encapsulates the sample stage, setting the foundation for future measurement of ballistic electron magnetic microscopy (BEMM). Instrumentation of the device and characterization of a sample with an ohmic interface, Ni-Si, are implemented and discussed. With support from National Science Foundation Award ECCS-0939514.

  2. Gravure printing of graphene for large-area flexible electronics.

    Science.gov (United States)

    Secor, Ethan B; Lim, Sooman; Zhang, Heng; Frisbie, C Daniel; Francis, Lorraine F; Hersam, Mark C

    2014-07-09

    Gravure printing of graphene is demonstrated for the rapid production of conductive patterns on flexible substrates. Development of suitable inks and printing parameters enables the fabrication of patterns with a resolution down to 30 μm. A mild annealing step yields conductive lines with high reliability and uniformity, providing an efficient method for the integration of graphene into large-area printed and flexible electronics.

  3. Liquid nitrogen cooled integrated power electronics module with high current carrying capability and lower on resistance

    Science.gov (United States)

    Ye, Hua; Lee, Changwoo; Simon, Randy W.; Haldar, Pradeep; Hennessy, Michael J.; Mueller, Eduard K.

    2006-11-01

    This letter presents the development of high-performance integrated cryogenic power modules, where both driver components and power metal-oxide semiconductor field-effect transistors are integrated in a single package, to be used in a 50kW prototype cryogenic inverter operating at liquid nitrogen temperature. The authors have demonstrated a compact high-voltage, cryogenic integrated power module that exhibited more than 14 times improvement in on-resistance and continuous current carrying capability exceeding 40A. The modules are designed to operate at liquid nitrogen temperature with extreme thermal cycling. The power electronic modules are necessary components that provide control and switching for second generation, yttrium barium copper oxide-based high temperature superconductor devices including cables, motors, and generators.

  4. Biodegradable elastomers and silicon nanomembranes/nanoribbons for stretchable, transient electronics, and biosensors.

    Science.gov (United States)

    Hwang, Suk-Won; Lee, Chi Hwan; Cheng, Huanyu; Jeong, Jae-Woong; Kang, Seung-Kyun; Kim, Jae-Hwan; Shin, Jiho; Yang, Jian; Liu, Zhuangjian; Ameer, Guillermo A; Huang, Yonggang; Rogers, John A

    2015-05-13

    Transient electronics represents an emerging class of technology that exploits materials and/or device constructs that are capable of physically disappearing or disintegrating in a controlled manner at programmed rates or times. Inorganic semiconductor nanomaterials such as silicon nanomembranes/nanoribbons provide attractive choices for active elements in transistors, diodes and other essential components of overall systems that dissolve completely by hydrolysis in biofluids or groundwater. We describe here materials, mechanics, and design layouts to achieve this type of technology in stretchable configurations with biodegradable elastomers for substrate/encapsulation layers. Experimental and theoretical results illuminate the mechanical properties under large strain deformation. Circuit characterization of complementary metal-oxide-semiconductor inverters and individual transistors under various levels of applied loads validates the design strategies. Examples of biosensors demonstrate possibilities for stretchable, transient devices in biomedical applications.

  5. Flexible MEMS: A novel technology to fabricate flexible sensors and electronics

    Science.gov (United States)

    Tu, Hongen

    This dissertation presents the design and fabrication techniques used to fabricate flexible MEMS (Micro Electro Mechanical Systems) devices. MEMS devices and CMOS(Complementary Metal-Oxide-Semiconductor) circuits are traditionally fabricated on rigid substrates with inorganic semiconductor materials such as Silicon. However, it is highly desirable that functional elements like sensors, actuators or micro fluidic components to be fabricated on flexible substrates for a wide variety of applications. Due to the fact that flexible substrate is temperature sensitive, typically only low temperature materials, such as polymers, metals, and organic semiconductor materials, can be directly fabricated on flexible substrates. A novel technology based on XeF2(xenon difluoride) isotropic silicon etching and parylene conformal coating, which is able to monolithically incorporate high temperature materials and fluidic channels, was developed at Wayne State University. The technology was first implemented in the development of out-of-plane parylene microneedle arrays that can be individually addressed by integrated flexible micro-channels. These devices enable the delivery of chemicals with controlled temporal and spatial patterns and allow us to study neurotransmitter-based retinal prosthesis. The technology was further explored by adopting the conventional SOI-CMOS processes. High performance and high density CMOS circuits can be first fabricated on SOI wafers, and then be integrated into flexible substrates. Flexible p-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect-Transistors) were successfully integrated and tested. Integration of pressure sensors and flow sensors based on single crystal silicon has also been demonstrated. A novel smart yarn technology that enables the invisible integration of sensors and electronics into fabrics has been developed. The most significant advantage of this technology is its post-MEMS and post-CMOS compatibility. Various high

  6. Electron microscopy analysis of structural changes within white etching areas

    DEFF Research Database (Denmark)

    Diederichs, Annika Martina; Schwedt, A.; Mayer, J.

    2016-01-01

    In the present work, crack networks with white etching areas (WEAs) in cross-sections of bearings were investigated by a complementary use of SEM and TEM with the focus on the use of orientation contrast imaging and electron backscatter diffraction (EBSD). Orientation contrast imaging was used...... observed within WEAs. Using EBSD analysis, evidence was obtained that WEA formation and accompanying crack growth are without relation microstructural features. In addition, an inhomogeneous chemical structure of WEA as a result of carbide dissolution is revealed by analytical investigations....

  7. Electron channel mobility in silicon-doped Ga2O3 MOSFETs with a resistive buffer layer

    Science.gov (United States)

    Wong, Man Hoi; Sasaki, Kohei; Kuramata, Akito; Yamakoshi, Shigenobu; Higashiwaki, Masataka

    2016-12-01

    The electron mobility in depletion-mode lateral β-Ga2O3(010) metal-oxide-semiconductor field-effect transistors (MOSFETs) with an n-channel formed by Si-ion (Si+) implantation doping was extracted using low-field electrical measurements on FET structures. An undoped Ga2O3 buffer layer protected the channel against charge compensation by suppressing outdiffusion of deep Fe acceptors from the semi-insulating substrate. The molecular beam epitaxy growth temperature was identified as a key process parameter for eliminating parasitic conduction at the buffer/substrate growth interface. Devices with a resistive buffer showed room temperature channel mobilities of 90-100 cm2 V-1 s-1 at carrier concentrations of low- to mid-1017 cm-3, with small in-plane mobility anisotropy of 10-15% ascribable to anisotropic carrier scattering.

  8. Growth and Characterization of Silicon Carbide (SiC) Nanowires by Chemical Vapor Deposition (CVD) for Electronic Device Applications

    Science.gov (United States)

    Moore, Karina

    In recent years nanowires have gained a generous amount of interest because of the possible application of nanowires within electronic devices. A nanowire is a one dimensional semiconductor nanostructure with a diameter less than 100 nm. Nanowires have the potential to be a replacement for the present day complimentary metal oxide semiconductor (CMOS) technology; it is believed by 2020, a 5--6 nm gate length within field effect transistors (FET) would be realized and cease further miniaturization of electronic devices. SiC processes several unique chemical and physical properties that make it an attractive alternative to Si as a semiconductor material. Silicon carbide's properties make it a perfect candidate for applications such as high temperature sensors, x-ray emitters and high radiation sensors. The main objective of this thesis is to successfully grow silicon carbide nanowires on silicon substrates with the assistance of a metal catalyst, by the process of chemical vapor deposition (CVD). The contributions made by the work carried out in this thesis are broad. This is the first study that has carried out a comprehensive investigation into a wide range of metal catalyst for the growth of SiC nanowires by the process of chemical vapor deposition. The study proved that the surface tension interactions between the silicon substrate and the metal catalyst are the controlling factor in the determination of the diameter of the nanowires grown. This study also proved that the silicon substrate orientation has no impact on the growth of the nanowires, similar growth patterns occurred on both Si and Si substrates. The nanowires grown were characterized by a variety of different methods including scanning electron microscopy (SEM), energy dispersive x-ray spectroscopy (EDS) and raman spectroscopy. The effect of temperature, growth temperature, growth time and the catalyst type used are investigated to determine the most suitable conditions necessary for SiC nanowire

  9. MAILROOM- A LOCAL AREA NETWORK ELECTRONIC MAIL PROGRAM

    Science.gov (United States)

    Weiner, M. J.

    1994-01-01

    The Mailroom program is a Local Area Network (LAN) electronic mail program. It allows LAN users to electronically exchange notes, letters, reminders, or any sort of communication via their computer. The Mailroom program links all LAN users into a communication circle where messages can be created, sent, copied, printed, downloaded, uploaded, and deleted through a series of menu-driven screens. Mailroom includes a feature which allows users to determine if a message they have sent has been read by the receiver. Each user must be separately installed and removed from Mailroom as they join or leave the network. Mailroom comes with a program that accomplishes this with minimum of effort on the part of the Network Administrator/Manager. There is also a program that allows the Network Administrator/Manager to install Mailroom on each user's workstation so that on execution of Mailroom the user's station may be identified and the configurations settings activated. It will create its own configuration and data/supporting files during the setup and installation process. The Mailroom program is written in Microsoft QuickBasic. It was developed to run on networked IBM XT/ATs or compatibles and requires that all participating workstations share a common drive. It has been implemented under DOS 3.2 and has a memory requirement of 71K. Mailroom was developed in 1988.

  10. Transformational electronics are now reconfiguring

    Science.gov (United States)

    Rojas, Jhonathan P.; Hussain, Aftab M.; Arevalo, A.; Foulds, I. G.; Torres Sevilla, Galo A.; Nassar, Joanna M.; Hussain, Muhammad M.

    2015-05-01

    Current developments on enhancing our smart living experience are leveraging the increased interest for novel systems that can be compatible with foldable, wrinkled, wavy and complex geometries and surfaces, and thus become truly ubiquitous and easy to deploy. Therefore, relying on innovative structural designs we have been able to reconfigure the physical form of various materials, to achieve remarkable mechanical flexibility and stretchability, which provides us with the perfect platform to develop enhanced electronic systems for application in entertainment, healthcare, fitness and wellness, military and manufacturing industry. Based on these novel structural designs we have developed a siliconbased network of hexagonal islands connected through double-spiral springs, forming an ultra-stretchable (~1000%) array for full compliance to highly asymmetric shapes and surfaces, as well as a serpentine design used to show an ultrastretchable (~800%) and flexible, spatially reconfigurable, mobile, metallic thin film copper (Cu)-based, body-integrated and non-invasive thermal heater with wireless controlling capability, reusability, heating-adaptability and affordability due to low-cost complementary metal oxide semiconductor (CMOS)-compatible integration.

  11. Transformational electronics are now reconfiguring

    KAUST Repository

    Rojas, Jhonathan Prieto

    2015-05-22

    Current developments on enhancing our smart living experience are leveraging the increased interest for novel systems that can be compatible with foldable, wrinkled, wavy and complex geometries and surfaces, and thus become truly ubiquitous and easy to deploy. Therefore, relying on innovative structural designs we have been able to reconfigure the physical form of various materials, to achieve remarkable mechanical flexibility and stretchability, which provides us with the perfect platform to develop enhanced electronic systems for application in entertainment, healthcare, fitness and wellness, military and manufacturing industry. Based on these novel structural designs we have developed a siliconbased network of hexagonal islands connected through double-spiral springs, forming an ultra-stretchable (~1000%) array for full compliance to highly asymmetric shapes and surfaces, as well as a serpentine design used to show an ultrastretchable (~800%) and flexible, spatially reconfigurable, mobile, metallic thin film copper (Cu)-based, body-integrated and non-invasive thermal heater with wireless controlling capability, reusability, heating-adaptability and affordability due to low-cost complementary metal oxide semiconductor (CMOS)-compatible integration. © (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

  12. Enhancement mode AlGaN/GaN MOS high-electron-mobility transistors with ZrO2 gate dielectric deposited by atomic layer deposition

    Science.gov (United States)

    Anderson, Travis J.; Wheeler, Virginia D.; Shahin, David I.; Tadjer, Marko J.; Koehler, Andrew D.; Hobart, Karl D.; Christou, Aris; Kub, Francis J.; Eddy, Charles R., Jr.

    2016-07-01

    Advanced applications of AlGaN/GaN high-electron-mobility transistors (HEMTs) in high-power RF and power switching are driving the need for insulated gate technology. We present a metal-oxide-semiconductor (MOS) gate structure using atomic-layer-deposited ZrO2 as a high-k, high-breakdown gate dielectric for reduced gate leakage and a recessed barrier structure for enhancement mode operation. Compared to a Schottky metal-gate HEMT, the recessed MOS-HEMT structure demonstrated a reduction in the gate leakage current by 4 orders of magnitude and a threshold voltage shift of +6 V to a record +3.99 V, enabled by a combination of a recessed barrier structure and negative oxide charge.

  13. Energies of the X- and L-valleys in In{sub 0.53}Ga{sub 0.47}As from electronic structure calculations

    Energy Technology Data Exchange (ETDEWEB)

    Greene-Diniz, Gabriel; Greer, J. C. [Tyndall National Institute, Lee Maltings, Prospect Row, Cork (Ireland); Fischetti, M. V. [Department of Materials Science and Engineering, University of Texas at Dallas, 800 West Campbell Road RL10, Richardson, Texas 75080 (United States)

    2016-02-07

    Several theoretical electronic structure methods are applied to study the relative energies of the minima of the X- and L-conduction-band satellite valleys of In{sub x}Ga{sub 1−x}As with x = 0.53. This III-V semiconductor is a contender as a replacement for silicon in high-performance n-type metal-oxide-semiconductor transistors. The energy of the low-lying valleys relative to the conduction-band edge governs the population of channel carriers as the transistor is brought into inversion, hence determining current drive and switching properties at gate voltages above threshold. The calculations indicate that the position of the L- and X-valley minima are ∼1 eV and ∼1.2 eV, respectively, higher in energy with respect to the conduction-band minimum at the Γ-point.

  14. Energies of the X- and L-valleys in In0.53Ga0.47As from electronic structure calculations

    Science.gov (United States)

    Greene-Diniz, Gabriel; Fischetti, M. V.; Greer, J. C.

    2016-02-01

    Several theoretical electronic structure methods are applied to study the relative energies of the minima of the X- and L-conduction-band satellite valleys of InxGa1-xAs with x = 0.53. This III-V semiconductor is a contender as a replacement for silicon in high-performance n-type metal-oxide-semiconductor transistors. The energy of the low-lying valleys relative to the conduction-band edge governs the population of channel carriers as the transistor is brought into inversion, hence determining current drive and switching properties at gate voltages above threshold. The calculations indicate that the position of the L- and X-valley minima are ˜1 eV and ˜1.2 eV, respectively, higher in energy with respect to the conduction-band minimum at the Γ-point.

  15. Magnetic state dependent transient lateral photovoltaic effect in patterned ferromagnetic metal-oxide-semiconductor films

    Directory of Open Access Journals (Sweden)

    Isidoro Martinez

    2015-11-01

    Full Text Available We investigate the influence of an external magnetic field on the magnitude and dephasing of the transient lateral photovoltaic effect (T-LPE in lithographically patterned Co lines of widths of a few microns grown over naturally passivated p-type Si(100. The T-LPE peak-to-peak magnitude and dephasing, measured by lock-in or through the characteristic time of laser OFF exponential relaxation, exhibit a notable influence of the magnetization direction of the ferromagnetic overlayer. We show experimentally and by numerical simulations that the T-LPE magnitude is determined by the Co anisotropic magnetoresistance. On the other hand, the magnetic field dependence of the dephasing could be described by the influence of the Lorentz force acting perpendiculary to both the Co magnetization and the photocarrier drift directions. Our findings could stimulate the development of fast position sensitive detectors with magnetically tuned magnitude and phase responses.

  16. Synthesis Methods, Microscopy Characterization and Device Integration of Nanoscale Metal Oxide Semiconductors for Gas Sensing

    Directory of Open Access Journals (Sweden)

    Randy L. Vander Wal

    2009-09-01

    Full Text Available A comparison is made between SnO2, ZnO, and TiO2 single-crystal nanowires and SnO2 polycrystalline nanofibers for gas sensing. Both nanostructures possess a one-dimensional morphology. Different synthesis methods are used to produce these materials: thermal evaporation-condensation (TEC, controlled oxidation, and electrospinning. Advantages and limitations of each technique are listed. Practical issues associated with harvesting, purification, and integration of these materials into sensing devices are detailed. For comparison to the nascent form, these sensing materials are surface coated with Pd and Pt nanoparticles. Gas sensing tests, with respect to H2, are conducted at ambient and elevated temperatures. Comparative normalized responses and time constants for the catalyst and noncatalyst systems provide a basis for identification of the superior metal-oxide nanostructure and catalyst combination. With temperature-dependent data, Arrhenius analyses are made to determine activation energies for the catalyst-assisted systems.

  17. Transient lateral photovoltaic effect in patterned metal-oxide-semiconductor films

    CERN Document Server

    Cascales, J P; Diaz, D; Rodrigo, J A; Aliev, F G

    2014-01-01

    The time dependent transient lateral photovoltaic e?ect has been studied with us time resolution and with chopping frequencies in the kHz range, in lithographically patterned 21 nm thick, 5, 10 and 20 um wide and 1500 um long Co lines grown over naturally passivated p-type Si (100). We have observed a nearly linear dependence of the transitorial response with the laser spot position. A transitorial response with a sign change in the laser-off stage has been corroborated by numerical simulations. A qualitative explanation suggests a modi?cation of the drift-diffusion model by including the in uence of a local inductance. Our ?ndings indicate that the microstructuring of position sensitive detectors could improve their space-time resolution.

  18. Solar water splitting with a composite silicon/metal oxide semiconductor electrode

    Science.gov (United States)

    Nakato, Yoshihiro; Kato, Naoaki; Imanishi, Akihito; Sugiura, Takashi; Ogawa, Shunsuke; Yoshida, Norimitsu; Nonomura, Shuichi

    2006-08-01

    We have studied solar water splitting with a composite semiconductor electrode, composed of an n-i-p junction amorphous silicon (a-Si, E g~ 1.7 eV) layer, an indium tin oxide (ITO) layer, and a tungsten trioxide (WO 3, E g 2.8 eV) particulate layer. The n-i-p a-Si layer, which had more accurately a structure of n-type microcrystalline ( c) 3C-SiC:H (25 nm)/i-type a-Si:H (400 nm)/p-type a-SiC x:H (25 nm), was prepared on a TiO II-covered F-doped SnO II (FTO)/glass plate by a Hot-Wire CVD method. The ITO layer (100 nm thick) was deposited on the p-type a-Si by the DC magnetron sputtering method, and the WO3 particulate layer was formed by a doctor-blade method, using a colloidal solution of commercial WO 3 powder of 10-30 nm in diameter. The composite electrode thus prepared was finally heat-treated at 300°C for 1 h. The anodic (water oxidation) photocurrent for the composite electrode in 0.1 M Na IISO 4 yielded an IPCE (incident photon to current efficiency) of about 6 % at 400 nm and was stable for more than 24 h. Besides, the onset potential lay a little (by about 0.05 V) more negative than the equilibrium hydrogen evolution potential, indicating a possibility of solar water splitting with no external bias. A preliminary result for the water photooxidation with an "n- GaP/p-Si/Pt dot" electrode is also reported briefly.

  19. Micromachined vertical Hall magnetic field sensor in standard complementary metal oxide semiconductor technology

    Science.gov (United States)

    Paranjape, M.; Ristic, Lj.

    1992-06-01

    A novel 2D micromachined vertical Hall magnetic field sensor structure has been designed and fabricated using a commercially available 3 micron CMOS process. The device can detect two magnetic field components in the plane of the chip surface. The sensor exhibits a linear response and shows no cross-sensitivity between channels.

  20. Ultrasensitive mass sensor fully integrated with complementary metal-oxide-semiconductor circuitry

    DEFF Research Database (Denmark)

    Forsén, Esko Sebastian; Abadal, G.; Ghatnekar-Nilsson, S.;

    2005-01-01

    and display ultrasensitive mass detection in air. A mass sensitivity of 4 ag/Hz has been determined in air by placing a single glycerine drop, having a measured weight of 57 fg, at the apex of a cantilever and subsequently measuring a frequency shift of 14.8 kHz. CMOS integration enables electrostatic...

  1. Note: Complementary metal-oxide-semiconductor high voltage pulse generation circuits.

    Science.gov (United States)

    Sun, Jiwei; Wang, Pingshan

    2013-10-01

    We present two types of on-chip pulse generation circuits. The first is based on CMOS pulse-forming-lines (PFLs). It includes a four-stage charge pump, a four-stacked-MOSFET switch and a 5 mm long PFL. The circuit is implemented in a 0.13 μm CMOS process. Pulses of ~1.8 V amplitude with ~135 ps duration on a 50 Ω load are obtained. The obtained voltage is higher than 1.6 V, the rated operating voltage of the process. The second is a high-voltage Marx generator which also uses stacked MOSFETs as high voltage switches. The output voltage is 11.68 V, which is higher than the highest breakdown voltage (~10 V) of the CMOS process. These results significantly extend high-voltage pulse generation capabilities of CMOS technologies.

  2. A High-Speed Asynchronous Communication Technique for MOS (Metal-Oxide-Semiconductor) VLSI Systems.

    Science.gov (United States)

    1985-12-01

    by a well controlled amount; rather than use an active delay line the passive delay inherent in the pc board traces could be used. The transmission...in a synchronous system without a detailed analysis of the actual delays involved. The technique provides phase jitter inmunity of close to 1/4 of .~k

  3. Experimental characterization of the dominant multiple nodes charge collection mechanism in metal oxide-semiconductor transistors

    Science.gov (United States)

    Song, Ruiqiang; Chen, Shuming; Chi, Yaqing; Wu, Zhenyu; Liang, Bin; Chen, Jianjun; Xu, Jingyan; Hao, Peipei; Yu, Junting

    2017-06-01

    We propose an experimental method to investigate the dominant multiple node charge collection mechanism. A transistor array-based test structure is used to distinguish charge collection owing to the drift-diffusion and parasitic bipolar amplification effect. Heavy ion experimental results confirm that drift-diffusion dominates multiple node charge collection at low linear energy transfer (LET). However, the parasitic bipolar amplification effect dominates it at high LET. We also propose simple equations to determine the critical LET which may change the dominant multiple node charge collection mechanism. The calculated LET value is consistent with the heavy ion experimental results.

  4. Evaluation of radiation damage to Metal-Oxide-Semiconductor (MOS) devices

    Science.gov (United States)

    1982-12-01

    The purpose of these experiments was to provide qualitative and quantitative information on the effects of various hydrogen and nitrogen annealing treatments on the radiation hardness, or resistivity to damage, of MOS capacitors. Toward this end, the following tasks were performed: Construction of capacitor TO-5 packages for device evaluation; The experimental determination of the 1 MHz capacitance-voltage bias curves for both the pre- and post-irradiated capacitors; Evaluation of the change in Flat Band Voltage (Delta V sub fb) for the pre- and post-radiation stressed devices; Compilation of all 1 MHz data for cataloging purposes and the establishment of a benchmark for the new computer automated test system; and Reported data to the Contracting Officer's Technical Representative (COTR) on a case-by-case basis, as time was of the essence.

  5. Adsorption smoke detector made of thin-film metal-oxide semiconductor sensor

    CERN Document Server

    Adamian, A Z; Aroutiounian, V M

    2001-01-01

    Based on results of investigations of the thin-film smoke sensors made of Bi sub 2 O sub 3 , irresponsive to a change in relative humidity of the environment, an absorption smoke detector processing circuit, where investigated sensor is used as a sensitive element, is proposed. It is shown that such smoke detector is able to function reliably under conditions of high relative humidity of the environment (up to 100%) and it considerably exceeds the known smoke detectors by the sensitivity threshold.

  6. Synthesis Methods, Microscopy Characterization and Device Integration of Nanoscale Metal Oxide Semiconductors for Gas Sensing

    OpenAIRE

    Vander Wal, Randy L.; Berger, Gordon M.; Kulis, Michael J.; Hunter, Gary W; Laura Evans; Xu, Jennifer C.

    2009-01-01

    A comparison is made between SnO2, ZnO, and TiO2 single-crystal nanowires and SnO2 polycrystalline nanofibers for gas sensing. Both nanostructures possess a one-dimensional morphology. Different synthesis methods are used to produce these materials: thermal evaporation-condensation (TEC), controlled oxidation, and electrospinning. Advantages and limitations of each technique are listed. Practical issues associated with harvesting, purification, and integration of these materials into sensing ...

  7. Localized dielectric breakdown and antireflection coating in metal-oxide-semiconductor photoelectrodes

    Science.gov (United States)

    Ji, Li; Hsu, Hsien-Yi; Li, Xiaohan; Huang, Kai; Zhang, Ye; Lee, Jack C.; Bard, Allen J.; Yu, Edward T.

    2017-01-01

    Silicon-based photoelectrodes for solar fuel production have attracted great interest over the past decade, with the major challenge being silicon's vulnerability to corrosion. A metal-insulator-semiconductor architecture, in which an insulator film serves as a protection layer, can prevent corrosion but must also allow low-resistance carrier transport, generally leading to a trade-off between stability and efficiency. In this work, we propose and demonstrate a general method to decouple the two roles of the insulator by employing localized dielectric breakdown. This approach allows the insulator to be thick, which enhances stability, while enabling low-resistance carrier transport as required for efficiency. This method can be applied to various oxides, such as SiO2 and Al2O3. In addition, it is suitable for silicon, III-V compounds, and other optical absorbers for both photocathodes and photoanodes. Finally, the thick metal-oxide layer can serve as a thin-film antireflection coating, which increases light absorption efficiency.

  8. Superconductor digital electronics: Scalability and energy efficiency issues (Review Article)

    Science.gov (United States)

    Tolpygo, Sergey K.

    2016-05-01

    Superconductor digital electronics using Josephson junctions as ultrafast switches and magnetic-flux encoding of information was proposed over 30 years ago as a sub-terahertz clock frequency alternative to semiconductor electronics based on complementary metal-oxide-semiconductor (CMOS) transistors. Recently, interest in developing superconductor electronics has been renewed due to a search for energy saving solutions in applications related to high-performance computing. The current state of superconductor electronics and fabrication processes are reviewed in order to evaluate whether this electronics is scalable to a very large scale integration (VLSI) required to achieve computation complexities comparable to CMOS processors. A fully planarized process at MIT Lincoln Laboratory, perhaps the most advanced process developed so far for superconductor electronics, is used as an example. The process has nine superconducting layers: eight Nb wiring layers with the minimum feature size of 350 nm, and a thin superconducting layer for making compact high-kinetic-inductance bias inductors. All circuit layers are fully planarized using chemical mechanical planarization (CMP) of SiO2 interlayer dielectric. The physical limitations imposed on the circuit density by Josephson junctions, circuit inductors, shunt and bias resistors, etc., are discussed. Energy dissipation in superconducting circuits is also reviewed in order to estimate whether this technology, which requires cryogenic refrigeration, can be energy efficient. Fabrication process development required for increasing the density of superconductor digital circuits by a factor of ten and achieving densities above 107 Josephson junctions per cm2 is described.

  9. Progress in Group Ⅲ nitride semiconductor electronic devices

    Institute of Scientific and Technical Information of China (English)

    Hao Yue; Zhang Jinfeng; Shen Bo; Liu Xinyu

    2012-01-01

    Recently there has been a rapid domestic development in group Ⅲ nitride semiconductor electronic materials and devices.This paper reviews the important progress in GaN-based wide bandgap microelectronic materials and devices in the Key Program of the National Natural Science Foundation of China,which focuses on the research of the fundamental physical mechanisms of group Ⅲ nitride semiconductor electronic materials and devices with the aim to enhance the crystal quality and electric performance of GaN-based electronic materials,develop new GaN heterostructures,and eventually achieve high performance GaN microwave power devices.Some remarkable progresses achieved in the program will be introduced,including those in GaN high electron mobility transistors (HEMTs) and metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs) with novel high-k gate insulators,and material growth,defect analysis and material properties of InAlN/GaN heterostructures and HEMT fabrication,and quantum transport and spintronic properties ofGaN-based heterostructures,and highelectric-field electron transport properties of GaN material and GaN Gunn devices used in terahertz sources.

  10. Advanced CMOS Radiation Effects Testing and Analysis

    Science.gov (United States)

    Pellish, J. A.; Marshall, P. W.; Rodbell, K. P.; Gordon, M. S.; LaBel, K. A.; Schwank, J. R.; Dodds, N. A.; Castaneda, C. M.; Berg, M. D.; Kim, H. S.; Phan, A. M.; Seidleck, C. M.

    2014-01-01

    Presentation at the annual NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop (ETW). The material includes an update of progress in this NEPP task area over the past year, which includes testing, evaluation, and analysis of radiation effects data on the IBM 32 nm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) process. The testing was conducted using test vehicles supplied by directly by IBM.

  11. Prognostics of Power Electronics, Methods and Validation Experiments

    Science.gov (United States)

    Kulkarni, Chetan S.; Celaya, Jose R.; Biswas, Gautam; Goebel, Kai

    2012-01-01

    Abstract Failure of electronic devices is a concern for future electric aircrafts that will see an increase of electronics to drive and control safety-critical equipment throughout the aircraft. As a result, investigation of precursors to failure in electronics and prediction of remaining life of electronic components is of key importance. DC-DC power converters are power electronics systems employed typically as sourcing elements for avionics equipment. Current research efforts in prognostics for these power systems focuses on the identification of failure mechanisms and the development of accelerated aging methodologies and systems to accelerate the aging process of test devices, while continuously measuring key electrical and thermal parameters. Preliminary model-based prognostics algorithms have been developed making use of empirical degradation models and physics-inspired degradation model with focus on key components like electrolytic capacitors and power MOSFETs (metal-oxide-semiconductor-field-effect-transistor). This paper presents current results on the development of validation methods for prognostics algorithms of power electrolytic capacitors. Particularly, in the use of accelerated aging systems for algorithm validation. Validation of prognostics algorithms present difficulties in practice due to the lack of run-to-failure experiments in deployed systems. By using accelerated experiments, we circumvent this problem in order to define initial validation activities.

  12. Materials and processing approaches for foundry-compatible transient electronics

    Science.gov (United States)

    Chang, Jan-Kai; Fang, Hui; Bower, Christopher A.; Song, Enming; Yu, Xinge; Rogers, John A.

    2017-01-01

    Foundry-based routes to transient silicon electronic devices have the potential to serve as the manufacturing basis for “green” electronic devices, biodegradable implants, hardware secure data storage systems, and unrecoverable remote devices. This article introduces materials and processing approaches that enable state-of-the-art silicon complementary metal-oxide-semiconductor (CMOS) foundries to be leveraged for high-performance, water-soluble forms of electronics. The key elements are (i) collections of biodegradable electronic materials (e.g., silicon, tungsten, silicon nitride, silicon dioxide) and device architectures that are compatible with manufacturing procedures currently used in the integrated circuit industry, (ii) release schemes and transfer printing methods for integration of multiple ultrathin components formed in this way onto biodegradable polymer substrates, and (iii) planarization and metallization techniques to yield interconnected and fully functional systems. Various CMOS devices and circuit elements created in this fashion and detailed measurements of their electrical characteristics highlight the capabilities. Accelerated dissolution studies in aqueous environments reveal the chemical kinetics associated with the underlying transient behaviors. The results demonstrate the technical feasibility for using foundry-based routes to sophisticated forms of transient electronic devices, with functional capabilities and cost structures that could support diverse applications in the biomedical, military, industrial, and consumer industries. PMID:28652373

  13. Materials and processing approaches for foundry-compatible transient electronics

    Science.gov (United States)

    Chang, Jan-Kai; Fang, Hui; Bower, Christopher A.; Song, Enming; Yu, Xinge; Rogers, John A.

    2017-07-01

    Foundry-based routes to transient silicon electronic devices have the potential to serve as the manufacturing basis for “green” electronic devices, biodegradable implants, hardware secure data storage systems, and unrecoverable remote devices. This article introduces materials and processing approaches that enable state-of-the-art silicon complementary metal-oxide-semiconductor (CMOS) foundries to be leveraged for high-performance, water-soluble forms of electronics. The key elements are (i) collections of biodegradable electronic materials (e.g., silicon, tungsten, silicon nitride, silicon dioxide) and device architectures that are compatible with manufacturing procedures currently used in the integrated circuit industry, (ii) release schemes and transfer printing methods for integration of multiple ultrathin components formed in this way onto biodegradable polymer substrates, and (iii) planarization and metallization techniques to yield interconnected and fully functional systems. Various CMOS devices and circuit elements created in this fashion and detailed measurements of their electrical characteristics highlight the capabilities. Accelerated dissolution studies in aqueous environments reveal the chemical kinetics associated with the underlying transient behaviors. The results demonstrate the technical feasibility for using foundry-based routes to sophisticated forms of transient electronic devices, with functional capabilities and cost structures that could support diverse applications in the biomedical, military, industrial, and consumer industries.

  14. Small Area ROM Design for Embedded Applications

    Institute of Scientific and Technical Information of China (English)

    CUI Wei; WU Si-liang

    2007-01-01

    The compact full custom layout design of a 16 kbit mask-programmable compl ementary metal oxide semiconductor (CMOS) read only memory (ROM) with low power dissip ation is introduced. By optimizing storage cell size and peripheral circuit stru cture, the ROM has a small area of 0.050 mm2 with a power-delay product of 0.011 pJ/bit at +1.8 V. The high packing density and the excellent power-delay product have been achieved by using SMIC 0.18 μm 1P6M CMOS technology. A novel and simple sense amplifier/driver structure is presented which restores th e signal full swing efficiently and reduces the signal rising time by 2.4 ns , as well as the memory access time. The ROM has a fast access time of 8.6 n s. As a consequence, the layout design not only can be embedded into microprocessor system as its program memory, but also can be fabricated individually as ROM ASIC .

  15. Characterization of the electronic properties of magnetic and semiconductor devices using scanning probe techniques

    Science.gov (United States)

    Schaadt, Daniel Maria

    In the first part of this dissertation, scanning probe techniques are used in the study of localized charge deposition and subsequent transport in Co nanoclusters embedded in a SiO2 matrix are presented, and the application of this material in a hybrid magneto-electronic device for magnetic field sensing is described. Co nanoclusters are charged by applying a bias voltage pulse between a conductive tip and the sample, and electrostatic force microscopy is used to image charged areas. An exponential decay in the peak charge density is observed with decay times dependent on the nominal Co film thickness and on the sign of the deposited charge. The results are interpreted as a consequence of Coulomb-blockade effects. This study leads to the design of a hybrid magneto-electronic device, in which Co nanoclusters embedded in SiO2 are incorporated into the gate of a Si metal-oxide-semiconductor field-effect transistor. Current flow through the Co nanoclusters leads to a buildup of electronic charge within the gate, and consequently to a transistor threshold voltage shift that varies with applied external magnetic field. The shift in threshold voltage results in an exponential change in subthreshold current and a quadratic change in saturation current. A detailed analysis of the device operation is presented. The second part of this dissertation focuses on the characterization of electronic properties of GaN-based heterostructure devices. Scanning capacitance microscopy (SCM) and spectroscopy (SCS) are used to investigate lateral variations in the transistor threshold voltage and the frequency-dependent response of surface charges and of charge in the two-dimensional electron gas (2DEG). The technique is described in detail, electrostatic simulations performed to study the influence of the probe tip geometry on the measured dC/dV spectra are presented, and the limitations of the SCS technique in a variety of applications are evaluated. Features in SCM images and maps of

  16. Classification of buildings mold threat using electronic nose

    Science.gov (United States)

    Łagód, Grzegorz; Suchorab, Zbigniew; Guz, Łukasz; Sobczuk, Henryk

    2017-07-01

    Mold is considered to be one of the most important features of Sick Building Syndrome and is an important problem in current building industry. In many cases it is caused by the rising moisture of building envelopes surface and exaggerated humidity of indoor air. Concerning historical buildings it is mostly caused by outdated raising techniques among that is absence of horizontal isolation against moisture and hygroscopic materials applied for construction. Recent buildings also suffer problem of mold risk which is caused in many cases by hermetization leading to improper performance of gravitational ventilation systems that make suitable conditions for mold development. Basing on our research there is proposed a method of buildings mold threat classification using electronic nose, based on a gas sensors array which consists of MOS sensors (metal oxide semiconductor). Used device is frequently applied for air quality assessment in environmental engineering branches. Presented results show the interpretation of e-nose readouts of indoor air sampled in rooms threatened with mold development in comparison with clean reference rooms and synthetic air. Obtained multivariate data were processed, visualized and classified using a PCA (Principal Component Analysis) and ANN (Artificial Neural Network) methods. Described investigation confirmed that electronic nose - gas sensors array supported with data processing enables to classify air samples taken from different rooms affected with mold.

  17. Design of power electronics for TVC EMA systems

    Science.gov (United States)

    Nelms, R. Mark

    1993-08-01

    The Composite Development Division of the Propulsion Laboratory at Marshall Space Flight Center (MSFC) is currently developing a class of electromechanical actuators (EMA's) for use in space transportation applications such as thrust vector control (TVC) and propellant control valves (PCV). These high power servomechanisms will require rugged, reliable, and compact power electronic modules capable of modulating several hundred amperes of current at up to 270 volts. MSFC has selected the brushless dc motor for implementation in EMA's. This report presents the results of an investigation into the applicability of two new technologies, MOS-controlled thyristors (MCT's) and pulse density modulation (PDM), to the control of brushless dc motors in EMA systems. MCT's are new power semiconductor devices, which combine the high voltage and current capabilities of conventional thyristors and the low gate drive requirements of metal oxide semiconductor field effect transistors (MOSFET's). The commanded signals in a PDM system are synthesized using a series of sinusoidal pulses instead of a series of square pulses as in a pulse width modulation (PWM) system. A resonant dc link inverter is employed to generate the sinusoidal pulses in the PDM system. This inverter permits zero-voltage switching of all semiconductors which reduces switching losses and switching stresses. The objectives of this project are to develop and validate an analytical model of the MCT device when used in high power motor control applications and to design, fabricate, and test a prototype electronic circuit employing both MCT and PDM technology for controlling a brushless dc motor.

  18. Materials characterisation by angle-resolved scanning transmission electron microscopy

    Science.gov (United States)

    Müller-Caspary, Knut; Oppermann, Oliver; Grieb, Tim; Krause, Florian F.; Rosenauer, Andreas; Schowalter, Marco; Mehrtens, Thorsten; Beyer, Andreas; Volz, Kerstin; Potapov, Pavel

    2016-11-01

    Solid-state properties such as strain or chemical composition often leave characteristic fingerprints in the angular dependence of electron scattering. Scanning transmission electron microscopy (STEM) is dedicated to probe scattered intensity with atomic resolution, but it drastically lacks angular resolution. Here we report both a setup to exploit the explicit angular dependence of scattered intensity and applications of angle-resolved STEM to semiconductor nanostructures. Our method is applied to measure nitrogen content and specimen thickness in a GaNxAs1‑x layer independently at atomic resolution by evaluating two dedicated angular intervals. We demonstrate contrast formation due to strain and composition in a Si- based metal-oxide semiconductor field effect transistor (MOSFET) with GexSi1‑x stressors as a function of the angles used for imaging. To shed light on the validity of current theoretical approaches this data is compared with theory, namely the Rutherford approach and contemporary multislice simulations. Inconsistency is found for the Rutherford model in the whole angular range of 16–255 mrad. Contrary, the multislice simulations are applicable for angles larger than 35 mrad whereas a significant mismatch is observed at lower angles. This limitation of established simulations is discussed particularly on the basis of inelastic scattering.

  19. Design of power electronics for TVC EMA systems

    Science.gov (United States)

    Nelms, R. Mark

    1993-01-01

    The Composite Development Division of the Propulsion Laboratory at Marshall Space Flight Center (MSFC) is currently developing a class of electromechanical actuators (EMA's) for use in space transportation applications such as thrust vector control (TVC) and propellant control valves (PCV). These high power servomechanisms will require rugged, reliable, and compact power electronic modules capable of modulating several hundred amperes of current at up to 270 volts. MSFC has selected the brushless dc motor for implementation in EMA's. This report presents the results of an investigation into the applicability of two new technologies, MOS-controlled thyristors (MCT's) and pulse density modulation (PDM), to the control of brushless dc motors in EMA systems. MCT's are new power semiconductor devices, which combine the high voltage and current capabilities of conventional thyristors and the low gate drive requirements of metal oxide semiconductor field effect transistors (MOSFET's). The commanded signals in a PDM system are synthesized using a series of sinusoidal pulses instead of a series of square pulses as in a pulse width modulation (PWM) system. A resonant dc link inverter is employed to generate the sinusoidal pulses in the PDM system. This inverter permits zero-voltage switching of all semiconductors which reduces switching losses and switching stresses. The objectives of this project are to develop and validate an analytical model of the MCT device when used in high power motor control applications and to design, fabricate, and test a prototype electronic circuit employing both MCT and PDM technology for controlling a brushless dc motor.

  20. System and method for interfacing large-area electronics with integrated circuit devices

    Science.gov (United States)

    Verma, Naveen; Glisic, Branko; Sturm, James; Wagner, Sigurd

    2016-07-12

    A system and method for interfacing large-area electronics with integrated circuit devices is provided. The system may be implemented in an electronic device including a large area electronic (LAE) device disposed on a substrate. An integrated circuit IC is disposed on the substrate. A non-contact interface is disposed on the substrate and coupled between the LAE device and the IC. The non-contact interface is configured to provide at least one of a data acquisition path or control path between the LAE device and the IC.

  1. Ultra-Stretchable Interconnects for High-Density Stretchable Electronics

    Directory of Open Access Journals (Sweden)

    Salman Shafqat

    2017-09-01

    Full Text Available The exciting field of stretchable electronics (SE promises numerous novel applications, particularly in-body and medical diagnostics devices. However, future advanced SE miniature devices will require high-density, extremely stretchable interconnects with micron-scale footprints, which calls for proven standardized (complementary metal-oxide semiconductor (CMOS-type process recipes using bulk integrated circuit (IC microfabrication tools and fine-pitch photolithography patterning. Here, we address this combined challenge of microfabrication with extreme stretchability for high-density SE devices by introducing CMOS-enabled, free-standing, miniaturized interconnect structures that fully exploit their 3D kinematic freedom through an interplay of buckling, torsion, and bending to maximize stretchability. Integration with standard CMOS-type batch processing is assured by utilizing the Flex-to-Rigid (F2R post-processing technology to make the back-end-of-line interconnect structures free-standing, thus enabling the routine microfabrication of highly-stretchable interconnects. The performance and reproducibility of these free-standing structures is promising: an elastic stretch beyond 2000% and ultimate (plastic stretch beyond 3000%, with <0.3% resistance change, and >10 million cycles at 1000% stretch with <1% resistance change. This generic technology provides a new route to exciting highly-stretchable miniature devices.

  2. A nanocryotron comparator can connect single-flux-quantum circuits to conventional electronics

    Science.gov (United States)

    Zhao, Qing-Yuan; McCaughan, Adam N.; Dane, Andrew E.; Berggren, Karl K.; Ortlepp, Thomas

    2017-04-01

    Integration with conventional electronics offers a straightforward and economical approach to upgrading existing superconducting technologies, such as scaling up superconducting detectors into large arrays and combining single flux quantum (SFQ) digital circuits with semiconductor logic gates and memories. However, direct output signals from superconducting devices (e.g., Josephson junctions) are usually not compatible with the input requirements of conventional devices (e.g., transistors). Here, we demonstrate the use of a single three-terminal superconducting-nanowire device, called the nanocryotron (nTron), as a digital comparator to combine SFQ circuits with mature semiconductor circuits such as complementary metal oxide semiconductor (CMOS) circuits. Since SFQ circuits can digitize output signals from general superconducting devices and CMOS circuits can interface existing CMOS-compatible electronics, our results demonstrate the feasibility of a general architecture that uses an nTron as an interface to realize a ‘super-hybrid’ system consisting of superconducting detectors, superconducting quantum electronics, CMOS logic gates and memories, and other conventional electronics.

  3. Density of states in a two-dimensional electron gas: Impurity bands and band tails

    Science.gov (United States)

    Gold, A.; Serre, J.; Ghazali, A.

    1988-03-01

    We calculate the density of states of a two-dimensional electron gas in the presence of charged impurities within Klauder's best multiple-scattering approach. The silicon metal-oxide-semiconductor (MOS) system with impurities at the interface is studied in detail. The finite extension of the electron wave function into the bulk is included as well as various dependences of the density of states on the electron, the depletion, and the impurity densities. The transition from an impurity band at low impurity concentration to a band tail at high impurity concentration is found to take place at a certain impurity concentration. If the screening parameter of the electron gas is decreased, the impurity band shifts to lower energy. For low impurity density we find excited impurity bands. Our theory at least qualitatively explains conductivity and infrared-absorption experiments on impurity bands in sodium-doped MOS systems and deep band tails in the gap observed for high doping levels in these systems.

  4. Perturbation of the Electron Transport Mechanism by Proton Intercalation in Nanoporous TiO2 Films

    Energy Technology Data Exchange (ETDEWEB)

    Halverson, A. F.; Zhu, K.; Erslev, P. T.; Kim, J. Y.; Neale, N. R.; Frank, A. J.

    2012-04-11

    This study addresses a long-standing controversy about the electron-transport mechanism in porous metal oxide semiconductor films that are commonly used in dye-sensitized solar cells and related systems. We investigated, by temperature-dependent time-of-flight measurements, the influence of proton intercalation on the electron-transport properties of nanoporous TiO{sub 2} films exposed to an ethanol electrolyte containing different percentages of water (0-10%). These measurements revealed that increasing the water content in the electrolyte led to increased proton intercalation into the TiO{sub 2} films, slower transport, and a dramatic change in the dependence of the thermal activation energy (E{sub a}) of the electron diffusion coefficient on the photogenerated electron density in the films. Random walk simulations based on a microscopic model incorporating exponential conduction band tail (CBT) trap states combined with a proton-induced shallow trap level with a long residence time accounted for the observed effects of proton intercalation on E{sub a}. Application of this model to the experimental results explains the conditions under which E{sub a} dependence on the photoelectron density is consistent with multiple trapping in exponential CBT states and under which it appears at variance with this model.

  5. Modeling and simulation of electronic structure, material interface and random doping in nano electronic devices

    Science.gov (United States)

    Chen, Duan; Wei, Guo-Wei

    2010-01-01

    The miniaturization of nano-scale electronic devices, such as metal oxide semiconductor field effect transistors (MOSFETs), has given rise to a pressing demand in the new theoretical understanding and practical tactic for dealing with quantum mechanical effects in integrated circuits. Modeling and simulation of this class of problems have emerged as an important topic in applied and computational mathematics. This work presents mathematical models and computational algorithms for the simulation of nano-scale MOSFETs. We introduce a unified two-scale energy functional to describe the electrons and the continuum electrostatic potential of the nano-electronic device. This framework enables us to put microscopic and macroscopic descriptions in an equal footing at nano scale. By optimization of the energy functional, we derive consistently-coupled Poisson-Kohn-Sham equations. Additionally, layered structures are crucial to the electrostatic and transport properties of nano transistors. A material interface model is proposed for more accurate description of the electrostatics governed by the Poisson equation. Finally, a new individual dopant model that utilizes the Dirac delta function is proposed to understand the random doping effect in nano electronic devices. Two mathematical algorithms, the matched interface and boundary (MIB) method and the Dirichlet-to-Neumann mapping (DNM) technique, are introduced to improve the computational efficiency of nano-device simulations. Electronic structures are computed via subband decomposition and the transport properties, such as the I-V curves and electron density, are evaluated via the non-equilibrium Green's functions (NEGF) formalism. Two distinct device configurations, a double-gate MOSFET and a four-gate MOSFET, are considered in our three-dimensional numerical simulations. For these devices, the current fluctuation and voltage threshold lowering effect induced by the discrete dopant model are explored. Numerical convergence

  6. Modeling and simulation of electronic structure, material interface and random doping in nano-electronic devices

    Science.gov (United States)

    Chen, Duan; Wei, Guo-Wei

    2010-06-01

    The miniaturization of nano-scale electronic devices, such as metal oxide semiconductor field effect transistors (MOSFETs), has given rise to a pressing demand in the new theoretical understanding and practical tactic for dealing with quantum mechanical effects in integrated circuits. Modeling and simulation of this class of problems have emerged as an important topic in applied and computational mathematics. This work presents mathematical models and computational algorithms for the simulation of nano-scale MOSFETs. We introduce a unified two-scale energy functional to describe the electrons and the continuum electrostatic potential of the nano-electronic device. This framework enables us to put microscopic and macroscopic descriptions in an equal footing at nano-scale. By optimization of the energy functional, we derive consistently coupled Poisson-Kohn-Sham equations. Additionally, layered structures are crucial to the electrostatic and transport properties of nano-transistors. A material interface model is proposed for more accurate description of the electrostatics governed by the Poisson equation. Finally, a new individual dopant model that utilizes the Dirac delta function is proposed to understand the random doping effect in nano-electronic devices. Two mathematical algorithms, the matched interface and boundary (MIB) method and the Dirichlet-to-Neumann mapping (DNM) technique, are introduced to improve the computational efficiency of nano-device simulations. Electronic structures are computed via subband decomposition and the transport properties, such as the I- V curves and electron density, are evaluated via the non-equilibrium Green's functions (NEGF) formalism. Two distinct device configurations, a double-gate MOSFET and a four-gate MOSFET, are considered in our three-dimensional numerical simulations. For these devices, the current fluctuation and voltage threshold lowering effect induced by the discrete dopant model are explored. Numerical

  7. Locally Resolved Electron Emission Area and Unified View of Field Emission in Nanodiamond Films

    Energy Technology Data Exchange (ETDEWEB)

    Chubenko, Oksana; Baturin, Stanislav S.; Kovi, Kiran Kumar; Sumant, Anirudha V.; Baryshev, Sergey V.

    2017-09-01

    One of the common problems in case of field emission from polycrystalline diamond films, which typically have uniform surface morphology, is uncertainty in determining exact location of electron emission sites across the surface. Although several studies have suggested that grain boundaries are the main electron emission source, it is not particularly clear what makes some sites emit more than the others. It is also practically unclear how one could quantify the actual electron emission area and therefore field emission current per unit area. In this paper we study the effect of actual, locally resolved, field emission (FE) area on electron emission characteristics of uniform planar highly conductive nitrogen-incorporated ultrananocrystalline diamond ((N)UNCD) field emitters. It was routinely found that field emission from as-grown planar (N)UNCD films is always confined to a counted number of discrete emitting centers across the surface which varied in size and electron emissivity. It was established that the actual FE area critically depends on the applied electric field, as well as that the actual FE area and the overall electron emissivity improve with sp2 fraction present in the film irrespectively of the original substrate roughness and morphology. To quantify the actual FE area and its dependence on the applied electric field, imaging experiments were carried out in a vacuum system in a parallel-plate configuration with a specialty anode phosphor screen. Electron emission micrographs were taken concurrently with I-V characteristics measurements. In addition, a novel automated image processing algorithm was developed to process extensive imaging datasets and calculate emission area per image. By doing so, it was determined that the emitting area was always significantly smaller than the FE cathode surface area. Namely, the actual FE area would change from 5×10-3 % to 1.5 % of the total cathode area with the applied electric field increased. Finally and most

  8. One-chip electronic detection of DNA hybridization using precision impedance-based CMOS array sensor.

    Science.gov (United States)

    Lee, Kang-Ho; Lee, Jeong-Oen; Sohn, Mi-Jin; Lee, Byunghun; Choi, Suk-Hwan; Kim, Sang Kyu; Yoon, Jun-Bo; Cho, Gyu-Hyeong

    2010-12-15

    This paper describes a label-free and fully electronic detection method of DNA hybridization, which is achieved through the use of a 16×8 microarray sensor in conjunction with a new type of impedance spectroscopy constructed with standard complementary metal-oxide-semiconductor (CMOS) technology. The impedance-based method is based on changes in the reactive capacitance and the charge-transfer resistance after hybridization with complementary DNA targets. In previously published label-free techniques, the measured capacitance presented unstable capacitive properties due to the parallel resistance that is not infinite and can cause a leakage by discharging the charge on the capacitor. This paper presents an impedance extraction method that uses excitation by triangular wave voltage, which enables a reliable measurement of both C and R producing a highly sensitive sensor with a stable operation independent of external variables. The system was fabricated in an industrial 0.35-μm 4-metal 2-poly CMOS process, integrating working electrodes and readout electronics into one chip. The integrated readout, which uses a parasitic insensitive integrator, achieves an enlarged detection range and improved noise performance. The maximum average relative variations of C and R are 31.5% and 68.6%, respectively, after hybridization with a 1 μM target DNA. The proposed sensor allows quantitative evaluation of the molecule densities on the chip with distinguishable variation in the impedance. This fully electronic microsystem has great potential for use with bioanalytical tools and point-of-care diagnosis.

  9. High-resolution infrared detector and its electronic unit for space application

    Science.gov (United States)

    Meftah, M.; Montmessin, F.; Korablev, O.; Trokhimovsky, A.; Poiet, G.; Bel, J.-B.

    2015-05-01

    High-resolution infrared detector is used extensively for military and civilian purposes. Military applications include target acquisition, surveillance, night vision, and tracking. Civilian applications include, among others, scientific observations. For our space systems, we want to use the products developed by SOFRADIR Company. Thus, we have developed a space electronic unit that is used to control the high-resolution SCORPIO-MW infrared detector, which has a format of 640×512 pixels with 15μm×15μm pixel pitch. The detector within microelectronics based on infrared mid-wave (MW) complementary metal oxide semiconductors (CMOS) uses a micro-cooler in order to keep its temperature around 100 K. The standard wavelength range (3 to 5μm) is adapted to the 2.2 to 4.3μm wavelength range thanks to adaptation of the optical interface of the detector and with an antireflection coating. With our electronic system, we can acquire 3 images per second. To increase the signal to noise ratio, we have the opportunity to make a summation of 15 frames per image. Through this article, we will describe the space electronic system that we have developed in order to achieve space observations (e.g. Atmospheric Chemistry Suite package for ExoMars Trace Gas Orbiter).

  10. Optimizing electronic standard cell libraries for variability tolerance through the nano-CMOS grid.

    Science.gov (United States)

    Walker, James Alfred; Sinnott, Richard; Stewart, Gordon; Hilder, James A; Tyrrell, Andy M

    2010-08-28

    The project Meeting the Design Challenges of nano-CMOS Electronics (http://www.nanocmos.ac.uk) was funded by the Engineering and Physical Sciences Research Council to tackle the challenges facing the electronics industry caused by the decreasing scale of transistor devices, and the inherent variability that this exposes in devices and in the circuits and systems in which they are used. The project has developed a grid-based solution that supports the electronics design process, incorporating usage of large-scale high-performance computing (HPC) resources, data and metadata management and support for fine-grained security to protect commercially sensitive datasets. In this paper, we illustrate how the nano-CMOS (complementary metal oxide semiconductor) grid has been applied to optimize transistor dimensions within a standard cell library. The goal is to extract high-speed and low-power circuits which are more tolerant of the random fluctuations that will be prevalent in future technology nodes. Using statistically enhanced circuit simulation models based on three-dimensional atomistic device simulations, a genetic algorithm is presented that optimizes the device widths within a circuit using a multi-objective fitness function exploiting the nano-CMOS grid. The results show that the impact of threshold voltage variation can be reduced by optimizing transistor widths, and indicate that a similar method could be extended to the optimization of larger circuits.

  11. Progress in BazookaSPECT: High-Resolution, Dynamic Scintigraphy with Large-Area Imagers.

    Science.gov (United States)

    Miller, Brian W; Barber, H Bradford; Barrett, Harrison H; Liu, Zhonglin; Nagarkar, Vivek V; Furenlid, Lars R

    2012-08-12

    We present recent progress in BazookaSPECT, a high-resolution, photon-counting gamma-ray detector. It is a new class of scintillation detector that combines columnar scintillators, image intensifiers, and CCD (charge-coupled device) or CMOS (complementary metal-oxide semiconductors) sensors for high-resolution imaging. A key feature of the BazookaSPECT paradigm is the capability to easily design custom detectors in terms of the desired intrinsic detector resolution and event detection rate. This capability is possible because scintillation light is optically amplified by the image intensifier prior to being imaging onto the CCD/CMOS sensor, thereby allowing practically any consumer-grade CCD/CMOS sensor to be used for gamma-ray imaging. Recent efforts have been made to increase the detector area by incorporating fiber-optic tapers between the scintillator and image intensifier, resulting in a 16× increase in detector area. These large-area BazookaSPECT detectors can be used for full-body imaging and we present preliminary results of their use as dynamic scintigraphy imagers for mice and rats. Also, we discuss ongoing and future developments in BazookaSPECT and the improved event-detection rate capability that is achieved using Graphics Processing Units (GPUs), multi-core processors, and new high-speed, USB 3.0 CMOS cameras.

  12. Photoreactivity of ZnO nanoparticles in visible light: Effect of surface states on electron transfer reaction

    Science.gov (United States)

    Baruah, Sunandan; Sinha, Sudarson Sekhar; Ghosh, Barnali; Pal, Samir Kumar; Raychaudhuri, A. K.; Dutta, Joydeep

    2009-04-01

    Wide band gap metal oxide semiconductors such as zinc oxide (ZnO) show visible band photolysis that has been employed, among others, to degrade harmful organic contaminants into harmless mineral acids. Metal oxides show enhanced photocatalytic activity with the increase in electronic defects in the crystallites. By introducing defects into the crystal lattice of ZnO nanoparticles, we observe a redshift in the optical absorption shifting from the ultraviolet region to the visible region (400-700 nm), which is due to the creation of intermediate defect states that inhibit the electron hole recombination process. The defects were introduced by fast nucleation and growth of the nanoparticles by rapid heating using microwave irradiation and subsequent quenching during the precipitation reaction. To elucidate the nature of the photodegradation process, picosecond resolved time correlated single photon count (TCSPC) spectroscopy was carried out to record the electronic transitions resulting from the de-excitation of the electrons to their stable states. Photodegradation and TCSPC studies showed that defect engineered ZnO nanoparticles obtained through fast crystallization during growth lead to a faster initial degradation rate of methylene blue as compared to the conventionally synthesized nanoparticles.

  13. Catching the electron in action in real space inside a Ge-Si core-shell nanowire transistor.

    Science.gov (United States)

    Jaishi, Meghnath; Pati, Ranjit

    2017-09-21

    Catching the electron in action in real space inside a semiconductor Ge-Si core-shell nanowire field effect transistor (FET), which has been demonstrated (J. Xiang, W. Lu, Y. Hu, Y. Wu, H. Yan and C. M. Lieber, Nature, 2006, 441, 489) to outperform the state-of-the-art metal oxide semiconductor FET, is central to gaining unfathomable access into the origin of its functionality. Here, using a quantum transport approach that does not make any assumptions on electronic structure, charge, and potential profile of the device, we unravel the most probable tunneling pathway for electrons in a Ge-Si core-shell nanowire FET with orbital level spatial resolution, which demonstrates gate bias induced decoupling of electron transport between the core and the shell region. Our calculation yields excellent transistor characteristics as noticed in the experiment. Upon increasing the gate bias beyond a threshold value, we observe a rapid drop in drain current resulting in a gate bias driven negative differential resistance behavior and switching in the sign of trans-conductance. We attribute this anomalous behavior in drain current to the gate bias induced modification of the carrier transport pathway from the Ge core to the Si shell region of the nanowire channel. A new experiment involving a four probe junction is proposed to confirm our prediction on gate bias induced decoupling.

  14. Investigation of electronic quality of electrodeposited cadmium sulphide layers from thiourea precursor for use in large area electronics

    Energy Technology Data Exchange (ETDEWEB)

    Ojo, A.A., E-mail: chartell2006@yahoo.com; Dharmadasa, I.M.

    2016-09-01

    CdS layers used in thin film solar cells and other electronic devices are usually grown by wet chemical methods using CdCl{sub 2} as the Cadmium source and either Na{sub 2}S{sub 2}O{sub 3}, NH{sub 4}S{sub 2}O{sub 3} or NH{sub 2}CSNH{sub 2} as Sulphur sources. Obviously, one of the sulphur precursors should produce more suitable CdS layers required to give the highest performing devices. This can only be achieved by comprehensive experimental work on growth and characterisation of CdS layers from the above mentioned sulphur sources. This paper presents the results observed on CdS layers grown by electrodepositing using two electrode configuration and thiourea as the sulphur precursor. X-ray diffraction (XRD), Raman spectroscopy, optical absorption, scanning electron microscopy (SEM), energy-dispersive X-ray analysis (EDX) and photoelectrochemical (PEC) cell methods have been used to characterise the material properties. In order to test and study the electronic device quality of the layers, ohmic and rectifying contacts were fabricated on the electroplated layers. Schottky barriers, formed on the layers were also compared with previously reported work on Chemical Bath Deposited CBD-CdS layers and bulk single crystals of CdS. Comparatively, Schottky diodes fabricated on electroplated CdS layers using two-electrode system and thiourea precursor exhibit excellent electronic properties suitable for electronic devices such as thin film solar panels and large area display devices. - Highlights: • Precipitate-free electrodeposition of CdS is achievable using Thiourea precursor. • Electrodeposition of CdS using 2-electrode configuration. • The electrodeposited CdS shows excellent electronic properties. • Exploration of the effect of heat treatment temperature and heat treatment duration.

  15. The Multi-Chamber Electronic Nose—An Improved Olfaction Sensor for Mobile Robotics

    Directory of Open Access Journals (Sweden)

    Javier Gonzalez-Jimenez

    2011-06-01

    Full Text Available One of the major disadvantages of the use of Metal Oxide Semiconductor (MOS technology as a transducer for electronic gas sensing devices (e-noses is the long recovery period needed after each gas exposure. This severely restricts its usage in applications where the gas concentrations may change rapidly, as in mobile robotic olfaction, where allowing for sensor recovery forces the robot to move at a very low speed, almost incompatible with any practical robot operation. This paper describes the design of a new e-nose which overcomes, to a great extent, such a limitation. The proposed e-nose, called Multi-Chamber Electronic Nose (MCE-nose, comprises several identical sets of MOS sensors accommodated in separate chambers (four in our current prototype, which alternate between sensing and recovery states, providing, as a whole, a device capable of sensing changes in chemical concentrations faster. The utility and performance of the MCE-nose in mobile robotic olfaction is shown through several experiments involving rapid sensing of gas concentration and mobile robot gas mapping.

  16. The Multi-Chamber Electronic Nose--an improved olfaction sensor for mobile robotics.

    Science.gov (United States)

    Gonzalez-Jimenez, Javier; Monroy, Javier G; Blanco, Jose Luis

    2011-01-01

    One of the major disadvantages of the use of Metal Oxide Semiconductor (MOS) technology as a transducer for electronic gas sensing devices (e-noses) is the long recovery period needed after each gas exposure. This severely restricts its usage in applications where the gas concentrations may change rapidly, as in mobile robotic olfaction, where allowing for sensor recovery forces the robot to move at a very low speed, almost incompatible with any practical robot operation. This paper describes the design of a new e-nose which overcomes, to a great extent, such a limitation. The proposed e-nose, called Multi-Chamber Electronic Nose (MCE-nose), comprises several identical sets of MOS sensors accommodated in separate chambers (four in our current prototype), which alternate between sensing and recovery states, providing, as a whole, a device capable of sensing changes in chemical concentrations faster. The utility and performance of the MCE-nose in mobile robotic olfaction is shown through several experiments involving rapid sensing of gas concentration and mobile robot gas mapping.

  17. MOS-FET as a Current Sensor in Power Electronics Converters.

    Science.gov (United States)

    Pajer, Rok; Milanoviĉ, Miro; Premzel, Branko; Rodiĉ, Miran

    2015-07-24

    This paper presents a current sensing principle appropriate for use in power electronics' converters. This current measurement principle has been developed for metal oxide semiconductor field effect transistor (MOS-FET) and is based on U(DS) voltage measurement. In practice, shunt resistors and Hall effect sensors are usually used for these purposes, but the presented principle has many advantages. There is no need for additional circuit elements within high current paths, causing parasitic inductances and increased production complexity. The temperature dependence of MOS-FETs conductive resistance R(DS-ON) is considered in order to achieve the appropriate measurement accuracy. The "MOS-FET sensor" is also accompanied by a signal acquisition electronics circuit with an appropriate frequency bandwidth. The obtained analogue signal is therefore interposed to an A-D converter for further data acquisition. In order to achieve sufficient accuracy, a temperature compensation and appropriate approximation is used (R(DS-ON) = R(DS-ON)(θj)). The MOS-FET sensor is calibrated according to a reference sensor based on the Hall-effect principle. The program algorithm is executed on 32-bit ARM M4 MCU, STM32F407.

  18. Expandable Polymer Enabled Wirelessly Destructible High-Performance Solid State Electronics

    KAUST Repository

    Gumus, Abdurrahman

    2017-03-29

    In today\\'s digital age, the increasing dependence on information also makes us vulnerable to potential invasion of privacy and cyber security. Consider a scenario in which a hard drive is stolen, lost, or misplaced, which contains secured and valuable information. In such a case, it is important to have the ability to remotely destroy the sensitive part of the device (e.g., memory or processor) if it is not possible to regain it. Many emerging materials and even some traditional materials like silicon, aluminum, zinc oxide, tungsten, and magnesium, which are often used for logic processor and memory, show promise to be gradually dissolved upon exposure of various liquid medium. However, often these wet processes are too slow, fully destructive, and require assistance from the liquid materials and their suitable availability at the time of need. This study shows Joule heating effect induced thermal expansion and stress gradient between thermally expandable advanced polymeric material and flexible bulk monocrystalline silicon (100) to destroy high-performance solid state electronics as needed and under 10 s. This study also shows different stimuli-assisted smartphone-operated remote destructions of such complementary metal oxide semiconductor electronics.

  19. 总剂量效应致0.13µm部分耗尽绝缘体上硅N型金属氧化物半导体场效应晶体管热载流子增强效应∗%Enhanced channel hot carrier effect of 0.13 µm silicon-on-insulator N metal-oxide-semiconductor field-effect transistor induced by total ionizing dose effect

    Institute of Scientific and Technical Information of China (English)

    周航; 郑齐文; 崔江维; 余学峰; 郭旗; 任迪远; 余德昭; 苏丹丹

    2016-01-01

    . In order to analyze the physical mechanism of the experimental phenomena, the wide channel device is tested too, we also analyze the phenomenon of the decrease of the substrate current of the wide channel device. From the contrasts of pre-irradiated and unirradiated devices, and narrow and wide channel device test results, we can obtain the following conclusions: SOI devices (especially the narrow channel device) with additional ionization irradiation field induced by ionizing radiation enhance the rate of injecting electrons into the silicon dioxide, and produce oxide trap charge and interface states, which leads to the fact that the channel carrier scattering becomes stronger, transfer characteristic curve of the device, output characteristic curve, transconductance curves and the related parameters of VT, GMmax, IDSAT degradation degree increase. So, when designing 130 nm PD SOI NMOSFETs which are applied to the space environment, one should make a compromise between radiation resistance and HCI reliability.

  20. Characterization of strained semiconductor structures using transmission electron microscopy

    Energy Technology Data Exchange (ETDEWEB)

    Oezdoel, Vasfi Burak

    2011-08-15

    Today's state-of-the-art semiconductor electronic devices utilize the charge transport within very small volumes of the active device regions. The structural, chemical and optical material properties in these small dimensions can critically affect the performance of these devices. The present thesis is focused on the nanometer scale characterization of the strain state in semiconductor structures using transmission electron microscopy (TEM). Although high-resolution TEM has shown to provide the required accuracy at the nanometer scale, optimization of imaging conditions is necessary for accurate strain measurements. An alternative HRTEM method based on strain mapping on complex-valued exit face wave functions is developed to reduce the artifacts arising from objective lens aberrations. However, a much larger field of view is crucial for mapping strain in the active regions of complex structures like latest generation metal-oxide-semiconductor field-effect transistors (MOSFETs). To overcome this, a complementary approach based on electron holography is proposed. The technique relies on the reconstruction of the phase shifts in the diffracted electron beams from a focal series of dark-field images using recently developed exit-face wave function reconstruction algorithm. Combining high spatial resolution, better than 1 nm, with a field of view of about 1 {mu}m in each dimension, simultaneous strain measurements on the array of MOSFETs are possible. Owing to the much lower electron doses used in holography experiments when compared to conventional quantitative methods, the proposed approach allows to map compositional distribution in electron beam sensitive materials such as InGaN heterostructures without alteration of the original morphology and chemical composition. Moreover, dark-field holography experiments can be performed on thicker specimens than the ones required for high-resolution TEM, which in turn reduces the thin foil relaxation. (orig.)

  1. 6 MeV electron irradiation effects on electrical properties of Al/TiO{sub 2}/n-Si MOS capacitors

    Energy Technology Data Exchange (ETDEWEB)

    Laha, P. [Department of Applied Physics, Birla Institute of Technology, Mesra, Ranchi 835215 (India); Dahiwale, S.S. [Department of Physics, University of Pune, Pune 411007 (India); Banerjee, I. [Department of Applied Physics, Birla Institute of Technology, Mesra, Ranchi 835215 (India); Pabi, S.K. [Department of Metallurgical and Material Engineering, Indian Institute of Technology, Kharagpur 721302 (India); Kimd, D. [Department of Material Science and Engineering, Korea University, Seoul (Korea, Republic of); Barhai, P.K. [Department of Applied Physics, Birla Institute of Technology, Mesra, Ranchi 835215 (India); Bhoraskar, V.N. [Department of Physics, University of Pune, Pune 411007 (India); Mahapatra, S.K., E-mail: skmahapatra@bitmesra.ac.in [Department of Applied Physics, Birla Institute of Technology, Mesra, Ranchi 835215 (India)

    2011-12-01

    Highlights: {yields} The electron irradiation effects make variation in the device parameters. {yields} The device parameters changes due to percentage of defects and charge trapping. {yields} Leakage current of Al/TiO{sub 2}/n-Si changes due to interface dangling bonds. {yields} The leakage current mechanism of MOS structures is due to Poole-Frenkel effect. - Abstract: The irradiation effects of 6 MeV electrons on the electrical properties of Al/TiO{sub 2}/n-Si metal-oxide-semiconductor capacitors have been investigated. Nine Al/TiO{sub 2}/n-Si capacitors were fabricated using radio frequency magnetron sputtering and divided into three groups. Groups were irradiated with 6 MeV electrons at 10, 20, and 30 kGy doses, respectively, keeping the dose rate {approx}1 kGy/min. The variations in the capacitance-voltage and leakage current-voltage characteristics, in addition to the electrical parameters, such as conductance (G/{omega}), flat-band voltage, interface trap density and the surface charge density with electron dose were studied. The Poole-Frenkel coefficient of the MOS capacitors was determined from current-voltage characteristics. Possible mechanisms for the enhanced leakage current in the electron irradiated MOS capacitors are discussed.

  2. Large area CMOS active pixel sensor x-ray imager for digital breast tomosynthesis: Analysis, modeling, and characterization

    Energy Technology Data Exchange (ETDEWEB)

    Zhao, Chumin; Kanicki, Jerzy, E-mail: kanicki@eecs.umich.edu [Solid-State Electronics Laboratory, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan 48109 (United States); Konstantinidis, Anastasios C. [Department of Medical Physics and Biomedical Engineering, University College London, London WC1E 6BT, United Kingdom and Diagnostic Radiology and Radiation Protection, Christie Medical Physics and Engineering, The Christie NHS Foundation Trust, Manchester M20 4BX (United Kingdom); Patel, Tushita [Department of Physics, University of Virginia, Charlottesville, Virginia 22908 (United States)

    2015-11-15

    Purpose: Large area x-ray imagers based on complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology have been proposed for various medical imaging applications including digital breast tomosynthesis (DBT). The low electronic noise (50–300 e{sup −}) of CMOS APS x-ray imagers provides a possible route to shrink the pixel pitch to smaller than 75 μm for microcalcification detection and possible reduction of the DBT mean glandular dose (MGD). Methods: In this study, imaging performance of a large area (29 × 23 cm{sup 2}) CMOS APS x-ray imager [Dexela 2923 MAM (PerkinElmer, London)] with a pixel pitch of 75 μm was characterized and modeled. The authors developed a cascaded system model for CMOS APS x-ray imagers using both a broadband x-ray radiation and monochromatic synchrotron radiation. The experimental data including modulation transfer function, noise power spectrum, and detective quantum efficiency (DQE) were theoretically described using the proposed cascaded system model with satisfactory consistency to experimental results. Both high full well and low full well (LFW) modes of the Dexela 2923 MAM CMOS APS x-ray imager were characterized and modeled. The cascaded system analysis results were further used to extract the contrast-to-noise ratio (CNR) for microcalcifications with sizes of 165–400 μm at various MGDs. The impact of electronic noise on CNR was also evaluated. Results: The LFW mode shows better DQE at low air kerma (K{sub a} < 10 μGy) and should be used for DBT. At current DBT applications, air kerma (K{sub a} ∼ 10 μGy, broadband radiation of 28 kVp), DQE of more than 0.7 and ∼0.3 was achieved using the LFW mode at spatial frequency of 0.5 line pairs per millimeter (lp/mm) and Nyquist frequency ∼6.7 lp/mm, respectively. It is shown that microcalcifications of 165–400 μm in size can be resolved using a MGD range of 0.3–1 mGy, respectively. In comparison to a General Electric GEN2 prototype DBT system (at

  3. CMOS technology: a critical enabler for free-form electronics-based killer applications

    KAUST Repository

    Hussain, Muhammad Mustafa

    2016-05-17

    Complementary metal oxide semiconductor (CMOS) technology offers batch manufacturability by ultra-large-scaleintegration (ULSI) of high performance electronics with a performance/cost advantage and profound reliability. However, as of today their focus has been on rigid and bulky thin film based materials. Their applications have been limited to computation, communication, display and vehicular electronics. With the upcoming surge of Internet of Everything, we have critical opportunity to expand the world of electronics by bridging between CMOS technology and free form electronics which can be used as wearable, implantable and embedded form. The asymmetry of shape and softness of surface (skins) in natural living objects including human, other species, plants make them incompatible with the presently available uniformly shaped and rigidly structured today’s CMOS electronics. But if we can break this barrier then we can use the physically free form electronics for applications like plant monitoring for expansion of agricultural productivity and quality, we can find monitoring and treatment focused consumer healthcare electronics – and many more creative applications. In our view, the fundamental challenge is to engage the mass users to materialize their creative ideas. Present form of electronics are too complex to understand, to work with and to use. By deploying game changing additive manufacturing, low-cost raw materials, transfer printing along with CMOS technology, we can potentially stick high quality CMOS electronics on any existing objects and embed such electronics into any future objects that will be made. The end goal is to make them smart to augment the quality of our life. We use a particular example on implantable electronics (brain machine interface) and its integration strategy enabled by CMOS device design and technology run path. © (2016) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is

  4. CMOS technology: a critical enabler for free-form electronics-based killer applications

    Science.gov (United States)

    Hussain, Muhammad M.; Hussain, Aftab M.; Hanna, Amir

    2016-05-01

    Complementary metal oxide semiconductor (CMOS) technology offers batch manufacturability by ultra-large-scaleintegration (ULSI) of high performance electronics with a performance/cost advantage and profound reliability. However, as of today their focus has been on rigid and bulky thin film based materials. Their applications have been limited to computation, communication, display and vehicular electronics. With the upcoming surge of Internet of Everything, we have critical opportunity to expand the world of electronics by bridging between CMOS technology and free form electronics which can be used as wearable, implantable and embedded form. The asymmetry of shape and softness of surface (skins) in natural living objects including human, other species, plants make them incompatible with the presently available uniformly shaped and rigidly structured today's CMOS electronics. But if we can break this barrier then we can use the physically free form electronics for applications like plant monitoring for expansion of agricultural productivity and quality, we can find monitoring and treatment focused consumer healthcare electronics - and many more creative applications. In our view, the fundamental challenge is to engage the mass users to materialize their creative ideas. Present form of electronics are too complex to understand, to work with and to use. By deploying game changing additive manufacturing, low-cost raw materials, transfer printing along with CMOS technology, we can potentially stick high quality CMOS electronics on any existing objects and embed such electronics into any future objects that will be made. The end goal is to make them smart to augment the quality of our life. We use a particular example on implantable electronics (brain machine interface) and its integration strategy enabled by CMOS device design and technology run path.

  5. Study of the Physics of Insulating Films as Related to the Reliability of Metal-Oxide Semiconductor Devices

    Science.gov (United States)

    1981-07-01

    non-volatile Random-Access-Memory ( NVRAM ) structure might finally be obtained. The authors would like to acknowledge the critical reading of this... NVRAM operation, and with C.M. Osburn regarding processing. This Research was supported in part by the Defense Advanced Projects Agency, and was monitored

  6. Study of the Physics of Insulating Films as Related to the Reliability of Metal-Oxide Semiconductor Devices

    Science.gov (United States)

    1983-08-01

    W. Allen. AppI. Phys. Lett. 35. o I Nacional de Ciencia y Technologist (CONACyT) and Centro ( 19791. de Investigaciones y Estudios Avanzados del I.P.N...Sponsored in part by Consejo Nacional de Ciencia y Technologia (CONACyT) and Centro de Investigaciones y Estudios Avanzados del I.P.N. (CIEA). Mexico...Nacional de Ciencia y Technologia (CONACyT) and Centro de Investigaciones y Estudios Avanzados del I.P.N. (CIEA), Mexico. 1. C. Falcony, D.J. DiMaria

  7. Study of the Physics of Insulating Films as Related to the Reliability of Metal-Oxide-Semiconductor (MOS) Devices

    Science.gov (United States)

    1982-02-01

    Investigaciones Estudios Avanzados del I.P.N. (CIEA), Mexico. I. D.J. DiMaria. in The Physics of SiO, and Its Interfaces, ed. by S.T. Pantelides (Pergamon Press...10 - References ia) Sponsored in part by Consejo Nacional de Ciencia y Technologia (CONACyT) and Centro de Investigaciones y Estudios Avanzados del

  8. A Subthreshold Digital Library Using a Dynamic-Threshold Metal-Oxide Semiconductor (DTMOS) and Transmission Gate Logic

    Science.gov (United States)

    2014-09-01

    implementation of XOR/XNOR, making for a more modular nature to implement the common logic gates. The library is used to implement 1-bit full adders and a CIC...implementations. We validate such techniques through the design and simulation of inverters, full adders , and a five-stage cascaded integrator-comb (CIC...filter (inverter, XOR, NAND, flip flop, full adder , ripple carry adder , 26 bits). 2. Circuit Topology/Gate Design/Inverter and Gate Design Trade-Offs

  9. Synthesis Methods, Microscopy Characterization and Device Integration of Nanoscale Metal Oxide Semiconductors for Gas Sensing in Aerospace Applications

    Science.gov (United States)

    VanderWal, Randy L.; Berger, Gordon M.; Kulis, Michael J.; Hunter, Gary W.; Xu, Jennifer C.; Evans, Laura J.

    2009-01-01

    A comparison is made between SnO2, ZnO, and TiO2 single-crystal nanowires and SnO2 polycrystalline nanofibers for gas sensing. Both nanostructures possess a one-dimensional morphology. Different synthesis methods are used to produce these materials: thermal evaporation-condensation (TEC), controlled oxidation, and electrospinning. Advantages and limitations of each technique are listed. Practical issues associated with harvesting, purification, and integration of these materials into sensing devices are detailed. For comparison to the nascent form, these sensing materials are surface coated with Pd and Pt nanoparticles. Gas sensing tests, with respect to H2, are conducted at ambient and elevated temperatures. Comparative normalized responses and time constants for the catalyst and noncatalyst systems provide a basis for identification of the superior metal-oxide nanostructure and catalyst combination. With temperature-dependent data, Arrhenius analyses are made to determine an activation energy for the catalyst-assisted systems.

  10. Thin film complementary metal oxide semiconductor (CMOS) device using a single-step deposition of the channel layer

    KAUST Repository

    Nayak, Pradipta K.

    2014-04-14

    We report, for the first time, the use of a single step deposition of semiconductor channel layer to simultaneously achieve both n-and p-type transport in transparent oxide thin film transistors (TFTs). This effect is achieved by controlling the concentration of hydroxyl groups (OH-groups) in the underlying gate dielectrics. The semiconducting tin oxide layer was deposited at room temperature, and the maximum device fabrication temperature was 350C. Both n and p-type TFTs showed fairly comparable performance. A functional CMOS inverter was fabricated using this novel scheme, indicating the potential use of our approach for various practical applications.

  11. Influence of semiconductor barrier tunneling on the current-voltage characteristics of tunnel metal-oxide-semiconductor diodes

    DEFF Research Database (Denmark)

    Nielsen, Otto M.

    1983-01-01

    Current–voltage characteristics have been examined for Al–SiO2–pSi diodes with an interfacial oxide thickness of delta[approximately-equal-to]20 Å. The diodes were fabricated on and oriented substrates with an impurity concentration in the range of NA=1014–1016 cm−3. The results show that for low...... forward voltages, the diode current is increased with increased NA, but for higher forward voltages, the diode current is decreased as NA is increased. For the diodes examined in this work, the results presented lead to the conclusion that the diode current should be treated as a superposition...... of multistep tunneling recombination current and injected minority carrier diffusion current. This can explain the observed values of the diode quality factor n. The results also show that the voltage drop across the oxide Vox is increased with increased NA, with the result that the lowering of the minority...

  12. A new formulation for surface roughness limited mobility in bulk and ultra-thin-body metal-oxide-semiconductor transistors

    Science.gov (United States)

    Lizzit, Daniel; Esseni, David; Palestri, Pierpaolo; Selmi, Luca

    2014-12-01

    This paper presents a new model for the surface roughness (SR) limited mobility in MOS transistors. The model is suitable for bulk and thin body devices and explicitly takes into account the non linear relation between the displacement Δ of the interface position and the SR scattering matrix elements, which is found to significantly influence the r.m.s value (Δrms) of the interface roughness that is necessary to reproduce SR-limited mobility measurements. In particular, comparison with experimental mobility for bulk Si MOSFETs shows that with the new SR scattering model a good agreement with measured mobility can be obtained with Δrms values of about 0.2 nm, which is in good agreement with several AFM and TEM measurements. For thin body III-V MOSFETs, the proposed model predicts a weaker mobility degradation at small well thicknesses (Tw), compared to the Tw 6 behavior observed in Si extremely thin body devices.

  13. Performance analysis of boron nitride embedded armchair graphene nanoribbon metal-oxide-semiconductor field effect transistor with Stone Wales defects

    Science.gov (United States)

    Chanana, Anuja; Sengupta, Amretashis; Mahapatra, Santanu

    2014-01-01

    We study the performance of a hybrid Graphene-Boron Nitride armchair nanoribbon (a-GNR-BN) n-MOSFET at its ballistic transport limit. We consider three geometric configurations 3p, 3p + 1, and 3p + 2 of a-GNR-BN with BN atoms embedded on either side (2, 4, and 6 BN) on the GNR. Material properties like band gap, effective mass, and density of states of these H-passivated structures are evaluated using the Density Functional Theory. Using these material parameters, self-consistent Poisson-Schrodinger simulations are carried out under the Non Equilibrium Green's Function formalism to calculate the ballistic n-MOSFET device characteristics. For a hybrid nanoribbon of width ˜5 nm, the simulated ON current is found to be in the range of 265 μA-280 μA with an ON/OFF ratio 7.1 × 106-7.4 × 106 for a VDD = 0.68 V corresponding to 10 nm technology node. We further study the impact of randomly distributed Stone Wales (SW) defects in these hybrid structures and only 2.5% degradation of ON current is observed for SW defect density of 3.18%.

  14. Recovery of single event upset in advanced complementary metal-oxide semiconductor static random access memory cells

    Institute of Scientific and Technical Information of China (English)

    Qin Jun-Rui; Chen Shu-Ming; Liang Bin; Liu Bi-Wei

    2012-01-01

    Using computer-aided design three-dimensional (3D) simulation technology,the recovery mechanism of single event upset and the effects of spacing and hit angle on the recovery are studied.It is found that the multi-node charge collection plays a key role in recovery and shielding the charge sharing by adding guard rings.It cannot exhibit the recovery effect.It is also indicated that the upset linear energy transfer (LET) threshold is kept constant while the recovery LET threshold increases as the spacing increases. Additionally,the effect of incident angle on recovery is analysed and it is shown that a larger angle can bring about a stronger charge sharing effect,thus strengthening the recovery ability.

  15. Negative differential transconductance in silicon quantum well metal-oxide-semiconductor field effect/bipolar hybrid transistors

    Energy Technology Data Exchange (ETDEWEB)

    Naquin, Clint; Lee, Mark [Department of Physics, University of Texas at Dallas, Richardson, Texas 75080 (United States); Edwards, Hal; Mathur, Guru; Chatterjee, Tathagata; Maggio, Ken [Texas Instruments, Inc., Richardson, Texas 75243 (United States)

    2014-11-24

    Introducing explicit quantum transport into Si transistors in a manner amenable to industrial fabrication has proven challenging. Hybrid field-effect/bipolar Si transistors fabricated on an industrial 45 nm process line are shown to demonstrate explicit quantum transport signatures. These transistors incorporate a lateral ion implantation-defined quantum well (QW) whose potential depth is controlled by a gate voltage (V{sub G}). Quantum transport in the form of negative differential transconductance (NDTC) is observed to temperatures >200 K. The NDTC is tied to a non-monotonic dependence of bipolar current gain on V{sub G} that reduces drain-source current through the QW. These devices establish the feasibility of exploiting quantum transport to transform the performance horizons of Si devices fabricated in an industrially scalable manner.

  16. Charge noise analysis of metal oxide semiconductor dual-gate Si/SiGe quantum point contacts

    Energy Technology Data Exchange (ETDEWEB)

    Kamioka, J.; Oda, S. [Quantum Nanoelectronics Research Center, Tokyo Institute of Technology, 2-12-1-S9-11, Ookayama, Meguro-ku, Tokyo, 152-8552 (Japan); Kodera, T., E-mail: kodera.t.ac@m.titech.ac.jp [Quantum Nanoelectronics Research Center, Tokyo Institute of Technology, 2-12-1-S9-11, Ookayama, Meguro-ku, Tokyo, 152-8552 (Japan); Department of Physical Electronics, Tokyo Institute of Technology, 2-12-1-NE-25, Ookayama, Meguro-ku, Tokyo, 152-8552 (Japan); PRESTO, Japan Science and Technology Agency (JST), 4-1-8 Honcho, Kawaguchi, Saitama 332-0012 (Japan); Takeda, K.; Obata, T. [Department of Applied Physics, School of Engineering, The University of Tokyo, 7-3-1, Hongo, Bunkyo-ku, Tokyo 113-8656 (Japan); Tarucha, S. [Department of Applied Physics, School of Engineering, The University of Tokyo, 7-3-1, Hongo, Bunkyo-ku, Tokyo 113-8656 (Japan); RIKEN, Center for Emergent Matter Science (CEMS), 2-1, Hirosawa, Wako, Saitama 351-0198 (Japan)

    2014-05-28

    The frequency dependence of conductance noise through a gate-defined quantum point contact fabricated on a Si/SiGe modulation doped wafer is characterized. The 1/f{sup 2} noise, which is characteristic of random telegraph noise, is reduced by application of a negative bias on the global top gate to reduce the local gate voltage. Direct leakage from the large global gate voltage also causes random telegraph noise, and therefore, there is a suitable point to operate quantum dot measurement.

  17. A Programmable Difference-of-Gaussian Analog Complementary Metal Oxide Semiconductor Image Sensor Operating in the Subthreshold Regime

    Science.gov (United States)

    Wang, Zheye; Shibata, Tadashi

    2013-04-01

    A difference-of-Gaussian (DoG) analog CMOS image sensor architecture in which the kernel size and shape are made arbitrarily programmable has been developed based on the MOS subthreshold characteristics. The variability of MOS transistor threshold voltage causes a serious problem in the circuits operating in the subthreshold regime because the current varies exponentially depending on the threshold voltage. The problem has been alleviated by introducing a cancellation scheme employing a switched floating-gate MOS (neuMOS) circuitry. A proof-of-concept chip was designed in a 0.18-µm CMOS technology. The operation of the designed circuits was investigated by SPICE (simulation program with integrated circuit emphasis) simulation and their basic functions were demonstrated. A part of the core function, i.e., the generation of the Gaussian function profile, was confirmed by the measurement of a fabricated test circuit.

  18. Single Event Upset Rate Estimates for a 16-K CMOS (Complementary Metal Oxide Semiconductor) SRAM (Static Random Access Memory).

    Science.gov (United States)

    1986-09-30

    4 . ~**..ft.. ft . - - - ft SI TABLES 9 I. SA32~40 Single Event Upset Test, 1140-MeV Krypton, 9/l8/8~4. . .. .. .. .. .. .16 II. CRUP Simulation...cosmic ray interaction analysis described in the remainder of this report were calculated using the CRUP computer code 3 modified for funneling. The... CRUP code requires, as inputs, the size of a depletion region specified as a retangular parallel piped with dimensions a 9 b S c, the effective funnel

  19. A complementary metal-oxide-semiconductor compatible monocantilever 12-point probe for conductivity measurements on the nanoscale

    DEFF Research Database (Denmark)

    Gammelgaard, Lauge; Bøggild, Peter; Wells, J.W.

    2008-01-01

    and a probe pitch of 500 nm. In-air four-point measurements have been performed on indium tin oxide, ruthenium, and titanium-tungsten, showing good agreement with values obtained by other four-point probes. In-vacuum four-point resistance measurements have been performed on clean Bi(111) using different probe...

  20. MOS-FET as a Current Sensor in Power Electronics Converters

    Directory of Open Access Journals (Sweden)

    Rok Pajer

    2015-07-01

    Full Text Available This paper presents a current sensing principle appropriate for use in power electronics’ converters. This current measurement principle has been developed for metal oxide semiconductor field effect transistor (MOS-FET and is based on UDS voltage measurement. In practice, shunt resistors and Hall effect sensors are usually used for these purposes, but the presented principle has many advantages. There is no need for additional circuit elements within high current paths, causing parasitic inductances and increased production complexity. The temperature dependence of MOS-FETs conductive resistance RDS−ON is considered in order to achieve the appropriate measurement accuracy. The “MOS-FET sensor” is also accompanied by a signal acquisition electronics circuit with an appropriate frequency bandwidth. The obtained analogue signal is therefore interposed to an A-D converter for further data acquisition. In order to achieve sufficient accuracy, a temperature compensation and appropriate approximation is used (RDS−ON = RDS−ON(Vj. The MOS-FET sensor is calibrated according to a reference sensor based on the Hall-effect principle. The program algorithm is executed on 32-bit ARM M4 MCU, STM32F407.

  1. Role of hydrogen in volatile behaviour of defects in SiO2-based electronic devices

    Science.gov (United States)

    Wimmer, Yannick; El-Sayed, Al-Moatasem; Gös, Wolfgang; Grasser, Tibor; Shluger, Alexander L.

    2016-06-01

    Charge capture and emission by point defects in gate oxides of metal-oxide-semiconductor field-effect transistors (MOSFETs) strongly affect reliability and performance of electronic devices. Recent advances in experimental techniques used for probing defect properties have led to new insights into their characteristics. In particular, these experimental data show a repeated dis- and reappearance (the so-called volatility) of the defect-related signals. We use multiscale modelling to explain the charge capture and emission as well as defect volatility in amorphous SiO2 gate dielectrics. We first briefly discuss the recent experimental results and use a multiphonon charge capture model to describe the charge-trapping behaviour of defects in silicon-based MOSFETs. We then link this model to ab initio calculations that investigate the three most promising defect candidates. Statistical distributions of defect characteristics obtained from ab initio calculations in amorphous SiO2 are compared with the experimentally measured statistical properties of charge traps. This allows us to suggest an atomistic mechanism to explain the experimentally observed volatile behaviour of defects. We conclude that the hydroxyl-E' centre is a promising candidate to explain all the observed features, including defect volatility.

  2. Electronic nose guided determination of frying disposal time of sunflower oil using fuzzy logic analysis.

    Science.gov (United States)

    Upadhyay, Rohit; Sehwag, Sneha; Mishra, Hari Niwas

    2017-04-15

    An electronic nose (e-nose), having 18 metal oxide semiconductor (MOS) sensors, guided determination of frying disposal time of sunflower oil is reported. The ranking and screening of MOS sensors, specific for volatile organic compounds, was performed using fuzzy logic. A correlation was examined between rancidity indices of fried oil (total polar compounds (TPC), and triglyceride dimers-polymers (TGDP), among others) and e-nose based odor index. Fuzzy logic screened 6 MOS sensors (LY2/G, LY2/AA, LY2/GH, LY2/gCT1, T30/1, and P30/1) to deconvolute the rancid fried oils using hierarchical clustering on principal component space. A good relationship was noted between rancidity indices and odor index (R(2)>0.85). Based on maximum discard limits of rancidity indices (25% TPC and 10% TGDP), the frying disposal time of 15.2h (TPC) vs. 15.8h (e-nose) and 15.5h (TGDP) vs. 16.3h (e-nose) was determined. The demonstrated methodology holds a potential extension to different fried oils and products.

  3. Early detection of fungal contamination on green coffee by a MOX sensors based Electronic Nose

    Science.gov (United States)

    Sberveglieri, V.; Concina, I.; Falasconi, M.; Gobbi, E.; Pulvirenti, A.; Fava, P.

    2011-09-01

    Fungal growth can occur on green coffee beans along all the distribution chain, eventually bringing on health hazards to consumers, because of the production of toxic metabolites (mycotoxins) [1]. Besides, the sensorial contamination due to volatiles by-products of fungal metabolism could cause defects on coffee also after roasting. Therefore, it is necessary to devise strategies to detect and quantify fungal infection and toxin production at early stages of the food chain. One of the most promising techniques is the analysis of volatile compounds in the headspace gas surrounding the samples. The aim of this work was to verify the ability of the Electronic Nose (EN EOS835) to early detect the microbial contamination of Arabica green coffee. This EN is equipped with Metal Oxide Semiconductor sensor array. Gas chromatography coupled to mass spectrometry (GC-MS) analysis of the static headspace of non-contaminated Arabica green coffee samples was carried out to confirm the EN ability to provide satisfactory indications about the presence of contamination.

  4. The Acquisition of Electronic Books in the Area of Astronomy in the UNAM

    OpenAIRE

    Beatriz Juarez

    2014-01-01

    The high cost of electronic books (e-Books) in the present in addition to the low budget of the Astronomical Libraries of the National Autonomous University of Mexico (UNAM), led the three libraries in the area of Astronomy to become part of the Group of Libraries in the area of Sciences in 2011. This Group was motivated by the need of purchasing e-Books, which due to their high costs, made it impossible to acquire materials of interest for each library Therefore the Working Group in dedi...

  5. The 10 kW power electronics for hydrogen arcjets

    Science.gov (United States)

    Hamley, John A.; Pinero, Luis R.; Hill, Gerald M.

    1992-01-01

    A combination of emerging mission considerations such as 'launch on schedule', resource limitations, and the development of higher power spacecraft busses has resulted in renewed interest in high power hydrogen arcjet systems with specific impulses greater than 1000 s for Earth-space orbit transfer and maneuver applications. Solar electric propulsion systems with about 10 kW of power appear to offer payload benefits at acceptable trip times. This work outlines the design and development of 10 kW hydrogen arcjet power electronics and results of arcjet integration testing. The power electronics incorporated a full bridge switching topology similar to that employed in state of the art 5 kW power electronics, and the output filter included an output current averaging inductor with an integral pulse generation winding for arcjet ignition. Phase shifted, pulse width modulation with current mode control was used to regulate the current delivered to arcjet, and a low inductance power stage minimized switching transients. Hybrid power Metal Oxide Semiconductor Field Effect Transistors were used to minimize conduction losses. Switching losses were minimized using a fast response, optically isolated, totem-pole gate drive circuit. The input bus voltage for the unit was 150 V, with a maximum output voltage of 225 V. The switching frequency of 20 kHz was a compromise between mass savings and higher efficiency. Power conversion efficiencies in excess of 0.94 were demonstrated, along with steady state load current regulation of 1 percent. The power electronics were successfully integrated with a 10 kW laboratory hydrogen arcjet, and reliable, nondestructive starts and transitions to steady state operation were demonstrated. The estimated specific mass for a flight packaged unit was 2 kg/kW.

  6. Relevance of GaAs(001) surface electronic structure for high frequency dispersion on n-type accumulation capacitance

    Science.gov (United States)

    Pi, T. W.; Chen, W. S.; Lin, Y. H.; Cheng, Y. T.; Wei, G. J.; Lin, K. Y.; Cheng, C.-P.; Kwo, J.; Hong, M.

    2017-01-01

    This study investigates the origin of long-puzzled high frequency dispersion on the accumulation region of capacitance-voltage characteristics in an n-type GaAs-based metal-oxide-semiconductor. Probed adatoms with a high Pauling electronegativity, Ag and Au, unexpectedly donate charge to the contacted As/Ga atoms of as-grown α2 GaAs(001)-2 × 4 surfaces. The GaAs surface atoms behave as charge acceptors, and if not properly passivated, they would trap those electrons accumulated at the oxide and semiconductor interface under a positive bias. The exemplified core-level spectra of the Al2O3/n-GaAs(001)-2 × 4 and the Al2O3/n-GaAs(001)-4 × 6 interfaces exhibit remnant of pristine surface As emission, thereby causing high frequency dispersion in the accumulation region. For the p-type GaAs, electrons under a negatively biased condition are expelled from the interface, thereby avoiding becoming trapped.

  7. Atomic-Layer-Deposited SnO2 as Gate Electrode for Indium-Free Transparent Electronics

    KAUST Repository

    Alshammari, Fwzah H.

    2017-08-04

    Atomic-layer-deposited SnO2 is used as a gate electrode to replace indium tin oxide (ITO) in thin-film transistors and circuits for the first time. The SnO2 films deposited at 200 °C show low electrical resistivity of ≈3.1 × 10−3 Ω cm with ≈93% transparency in most of the visible range of the electromagnetic spectrum. Thin-film transistors fabricated with SnO2 gates show excellent transistor properties including saturation mobility of 15.3 cm2 V−1 s−1, a low subthreshold swing of ≈130 mV dec−1, a high on/off ratio of ≈109, and an excellent electrical stability under constant-voltage stressing conditions to the gate terminal. Moreover, the SnO2-gated thin-film transistors show excellent electrical characteristics when used in electronic circuits such as negative channel metal oxide semiconductor (NMOS) inverters and ring oscillators. The NMOS inverters exhibit a low propagation stage delay of ≈150 ns with high DC voltage gain of ≈382. A high oscillation frequency of ≈303 kHz is obtained from the output sinusoidal signal of the 11-stage NMOS inverter-based ring oscillators. These results show that SnO2 can effectively replace ITO in transparent electronics and sensor applications.

  8. Interfacial bonding and electronic structure of GaN/GaAs interface: A first-principles study

    Energy Technology Data Exchange (ETDEWEB)

    Cao, Ruyue; Zhang, Zhaofu; Wang, Changhong; Li, Haobo; Dong, Hong; Liu, Hui; Wang, Weichao, E-mail: weichaowang@nankai.edu.cn [College of Electronic Information and Optical Engineering, Nankai University, Tianjin 300071 (China); Xie, Xinjian [College of Materials Science, Hebei Technology University, Tianjin 300401 (China)

    2015-04-07

    Understanding of GaN interfacing with GaAs is crucial for GaN to be an effective interfacial layer between high-k oxides and III-V materials with the application in high-mobility metal-oxide-semiconductor field effect transistor (MOSFET) devices. Utilizing first principles calculations, here, we investigate the structural and electronic properties of the GaN/GaAs interface with respect to the interfacial nitrogen contents. The decrease of interfacial N contents leads to more Ga dangling bonds and As-As dimers. At the N-rich limit, the interface with N concentration of 87.5% shows the most stability. Furthermore, a strong band offsets dependence on the interfacial N concentration is also observed. The valance band offset of N7 with hybrid functional calculation is 0.51 eV. The electronic structure analysis shows that significant interface states exist in all the GaN/GaAs models with various N contents, which originate from the interfacial dangling bonds and some unsaturated Ga and N atoms. These large amounts of gap states result in Fermi level pinning and essentially degrade the device performance.

  9. Scenarios to explore the futures of the emerging technology of organic and large area electronics

    OpenAIRE

    Parandian, Alireza; Rip, Arie

    2013-01-01

    Emerging technologies pose challenges for futures research because of their uncertainties combined with promises. Actors are anticipating and acting strategically. Sociotechnical scenarios building on endogenous futures support and enlighten actors. Such scenarios contribute to “strategic intelligence” about the technologies and their embedding in society. Organic and large area electronics promise to substitute silicon-based technologies, but firms and potential users are reluctant to invest...

  10. Classical Gradual-Channel Modeling of Graphene Field-Effect Transistors (FETs)

    Science.gov (United States)

    2010-08-01

    application of a high-powered many-body analysis of the electronic degrees of freedom, which, in turn, predicts ferromagnetism , superconductivity , charge...metal- oxide semiconductor field-effect transistors (MOSFETs), high electron mobility transistors (HEMTs), metal semiconductor field-effect transistors...V current versus voltage MESFET metal semiconductor field-effect transistor MOSFET metal- oxide semiconductor field-effect transistor RF radio

  11. Large-area uniform electron doping of graphene by Ag nanofilm

    Directory of Open Access Journals (Sweden)

    Xiaopeng Guo

    2017-04-01

    Full Text Available Graphene has attracted much attention at various research fields due to its unique optical, electronic and mechanical properties. Up to now, graphene has not been widely used in optoelectronic fields due to the lack of large-area uniform doped graphene (n-doped and p-doped with smooth surface. Therefore, it is rather desired to develop some effective doping methods to extend graphene to optoelectronics. Here we developed a novel doping method to prepare large-area (> centimeter scale uniform doped graphene film with a nanoscale roughness(RMS roughness ∼1.4 nm, the method (nano-metal film doping method is simple but effective. Using this method electron doping (electron-injection may be easily realized by the simple thermal deposition of Ag nano-film on a transferred CVD graphene. The doping effectiveness has been proved by Raman spectroscopy and spectroscopic ellipsometry. Importantly, our method sheds light on some potential applications of graphene in optoelectronic devices such as photodetectors, LEDs, phototransistors, solar cells, lasers etc.

  12. Teleconsultation via a wide area network in real time and by electronic mail

    Science.gov (United States)

    Jiang, Zhimei; Chao, John T.; Chao, Woodrew; Chang, Kevin; Ho, Bruce K. T.

    1995-05-01

    A teleradiology system is severely limited in bandwidth compared to a departmental PACS. Therefore it must depend on innovative tools to allow efficient communication between the subspecialty radiologist and the referring physician at a remote site. Real time teleconsultation allows two parties to converse while viewing identical images and performing same image processing functions on them. By using an efficient protocol, the framing information for synchronizing the cursor, image layout and image processing functions can be transmitted with subsecond delay over a narrow bandwidth wide area network. For situations involving large time zone differences, an asynchronous communication using electronic mail may be appropriate. In this case, the synchronization of cursor motion and voice is preserved by the time-stamps in electronic mail messages. Multimedia capabilities including digitized voice, report formatting and electronic mailing must be integrated into a single application software that is easy to use by radiologists participating in the consultation session. Real time interaction can be implemented easily using standard modem connections. The protocol ensures that only key information for synchronization is sent to the other station in order to achieve the high speed required. Electronic mail and report formatting capabilities are integrated by using off-the-shelf multimedia software libraries. The system we are developing is on the Windows NT environment using Microsoft Foundation Classes. The same idea is applicable to the UNIX system as well. This paper shows that the real time and asynchronous teleconsultation can be achieved using standard computer hardware, software, and software development tools.

  13. Detection of Steel Fatigue Cracks with Strain Sensing Sheets Based on Large Area Electronics

    Directory of Open Access Journals (Sweden)

    Yao Yao

    2015-04-01

    Full Text Available Reliable early-stage damage detection requires continuous monitoring over large areas of structure, and with sensors of high spatial resolution. Technologies based on Large Area Electronics (LAE can enable direct sensing and can be scaled to the level required for Structural Health Monitoring (SHM of civil structures and infrastructure. Sensing sheets based on LAE contain dense arrangements of thin-film strain sensors, associated electronics and various control circuits deposited and integrated on a flexible polyimide substrate that can cover large areas of structures. This paper presents the development stage of a prototype strain sensing sheet based on LAE for crack detection and localization. Two types of sensing-sheet arrangements with size 6 × 6 inch (152 × 152 mm were designed and manufactured, one with a very dense arrangement of sensors and the other with a less dense arrangement of sensors. The sensing sheets were bonded to steel plates, which had a notch on the boundary, so the fatigue cracks could be generated under cyclic loading. The sensors within the sensing sheet that were close to the notch tip successfully detected the initialization of fatigue crack and localized the damage on the plate. The sensors that were away from the crack successfully detected the propagation of fatigue cracks based on the time history of the measured strain. The results of the tests have validated the general principles of the proposed sensing sheets for crack detection and identified advantages and challenges of the two tested designs.

  14. Detection of steel fatigue cracks with strain sensing sheets based on large area electronics.

    Science.gov (United States)

    Yao, Yao; Glisic, Branko

    2015-04-07

    Reliable early-stage damage detection requires continuous monitoring over large areas of structure, and with sensors of high spatial resolution. Technologies based on Large Area Electronics (LAE) can enable direct sensing and can be scaled to the level required for Structural Health Monitoring (SHM) of civil structures and infrastructure. Sensing sheets based on LAE contain dense arrangements of thin-film strain sensors, associated electronics and various control circuits deposited and integrated on a flexible polyimide substrate that can cover large areas of structures. This paper presents the development stage of a prototype strain sensing sheet based on LAE for crack detection and localization. Two types of sensing-sheet arrangements with size 6 × 6 inch (152 × 152 mm) were designed and manufactured, one with a very dense arrangement of sensors and the other with a less dense arrangement of sensors. The sensing sheets were bonded to steel plates, which had a notch on the boundary, so the fatigue cracks could be generated under cyclic loading. The sensors within the sensing sheet that were close to the notch tip successfully detected the initialization of fatigue crack and localized the damage on the plate. The sensors that were away from the crack successfully detected the propagation of fatigue cracks based on the time history of the measured strain. The results of the tests have validated the general principles of the proposed sensing sheets for crack detection and identified advantages and challenges of the two tested designs.

  15. Measurement of separate cosmic-ray electron and positron spectra with the Fermi Large Area Telescope

    CERN Document Server

    Ackermann, M; Allafort, A; Baldini, L; Barbiellini, G; Bastieri, D; Bechtol, K; Bellazzini, R; Berenji, B; Blandford, R D; Bloom, E D; Bonamente, E; Borgland, A W; Bouvier, A; Bregeon, J; Brigida, M; Bruel, P; Buehler, R; Buson, S; Caliandro, G A; Cameron, R A; Caraveo, P A; Casandjian, J M; Cecchi, C; Charles, E; Chekhtman, A; Cheung, C C; Chiang, J; Ciprini, S; Claus, R; Cohen-Tanugi, J; Conrad, J; Cutini, S; de Angelis, A; de Palma, F; Dermer, C D; Digel, S W; Silva, E do Couto e; Drell, P S; Drlica-Wagner, A; Favuzzi, C; Fegan, S J; Ferrara, E C; Focke, W B; Fortin, P; Fukazawa, Y; Funk, S; Fusco, P; Gargano, F; Gasparrini, D; Germani, S; Giglietto, N; Giommi, P; Giordano, F; Giroletti, M; Glanzman, T; Godfrey, G; Grenier, I A; Grove, J E; Guiriec, S; Gustafsson, M; Hadasch, D; Harding, A K; Hayashida, M; Hughes, R E; Jóhannesson, G; Johnson, A S; Kamae, T; Katagiri, H; Kataoka, J; Knödlseder, J; Kuss, M; Lande, J; Latronico, L; Lemoine-Goumard, M; Garde, M Llena; Longo, F; Loparco, F; Lovellette, M N; Lubrano, P; Madejski, G M; Mazziotta, M N; McEnery, J E; Michelson, P F; Mitthumsiri, W; Mizuno, T; Moiseev, A A; Monte, C; Monzani, M E; Morselli, A; Moskalenko, I V; Murgia, S; Nakamori, T; Nolan, P L; Norris, J P; Nuss, E; Ohno, M; Ohsugi, T; Okumura, A; Omodei, N; Ormes, E Orlando J F; Ozaki, M; Paneque, D; Parent, D; Pesce-Rollins, M; Pierbattista, M; Piron, F; Pivato, G; Porter, T A; Rainò, S; Rando, R; Razzano, M; Razzaque, S; Reimer, A; Reimer, O; Reposeur, T; Ritz, S; Romani, R W; Roth, M; Sadrozinski, H F -W; Sbarra, C; Schalk, T L; Sgrò, C; Siskind, E J; Spandre, G; Spinelli, P; Strong, A W; Takahashi, H; Takahashi, T; Tanaka, T; Thayer, J G; Thayer, J B; Tibaldo, L; Tinivella, M; Torres, D F; Tosti, G; Troja, E; Uchiyama, Y; Usher, T L; Vandenbroucke, J; Vasileiou, V; Vianello, G; Vitale, V; Waite, A P; Winer, B L; Wood, K S; Wood, M; Yang, Z; Zimmer, S

    2011-01-01

    We measured separate cosmic-ray electron and positron spectra with the Fermi Large Area Telescope. Because the instrument does not have an onboard magnet, we distinguish the two species by exploiting the Earth's shadow, which is offset in opposite directions for opposite charges due to the Earth's magnetic field. We estimate and subtract the cosmic-ray proton background using two different methods that produce consistent results. We report the electron-only spectrum, the positron-only spectrum, and the positron fraction between 20 GeV and 200 GeV. We confirm that the fraction rises with energy in the 20--100 GeV range and determine for the first time that it continues to rise between 100 and 200 GeV.

  16. New adders using hybrid circuit consisting of three-gate single-electron transistors (TG-SETs) and MOSFETs.

    Science.gov (United States)

    Yu, YunSeop; Choi, JungBum

    2007-11-01

    A half-adder (HA) and a full-adder (FA) using hybrid circuits combining three-gate single-electron transistors (TG-SETs) with metal-oxide-semiconductor field-effect-transistors (MOSFETs) are proposed. The proposed HA consists of three TG-SETs, two enhanced-mode NMOSFETs, and two depletion-mode NMOSFETs, and the proposed FA consists of eight TG-SETs, two enhanced-mode NMOSFETs, and two depletion-mode NMOSFETs. The complexities in the HA and the FA are 7 and 12, respectively, and the worst-case delays in the HA and the FA are 1.48 ns and 2.25 ns, respectively. Compared with the conventional CMOS FA with 0.35 microm technology, the proposed FA can be constructed with 0.43 of devices, and can operate with 3.5 of worst-case delay, 1/534 of average power consumption, and 1/152 of power-delay-product (PDP). The proposed HA and FA can be operated as a half-subtractor (HS) and a full-subtractor (FS) in the case when the levels of the control gates in the HA and the FA are fitly determined. The basic operations of the proposed HA and the proposed FA have been successfully confirmed through SPICE circuit simulation based on the physical device model of TG-SETs.

  17. A Low Noise CMOS Readout Based on a Polymer-Coated SAW Array for Miniature Electronic Nose.

    Science.gov (United States)

    Wu, Cheng-Chun; Liu, Szu-Chieh; Chiu, Shih-Wen; Tang, Kea-Tiong

    2016-10-25

    An electronic nose (E-Nose) is one of the applications for surface acoustic wave (SAW) sensors. In this paper, we present a low-noise complementary metal-oxide-semiconductor (CMOS) readout application-specific integrated circuit (ASIC) based on an SAW sensor array for achieving a miniature E-Nose. The center frequency of the SAW sensors was measured to be approximately 114 MHz. Because of interference between the sensors, we designed a low-noise CMOS frequency readout circuit to enable the SAW sensor to obtain frequency variation. The proposed circuit was fabricated in Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 μm 1P6M CMOS process technology. The total chip size was nearly 1203 × 1203 μm². The chip was operated at a supply voltage of 1 V for a digital circuit and 1.8 V for an analog circuit. The least measurable difference between frequencies was 4 Hz. The detection limit of the system, when estimated using methanol and ethanol, was 0.1 ppm. Their linearity was in the range of 0.1 to 26,000 ppm. The power consumption levels of the analog and digital circuits were 1.742 mW and 761 μW, respectively.

  18. The Silicon Tracker Readout Electronics of the Gamma-ray Large Area Space Telescope

    Energy Technology Data Exchange (ETDEWEB)

    Baldini, Luca; Brez, Alessandro; Himel, Thomas; Hirayama, Masaharu; Johnson, R.P.; Kroeger, Wilko; Latronico, Luca; Minuti, Massimo; Nelson, David; Rando, Riccardo; Sadrozinski, H.F.-W.; Sgro, Carmelo; Spandre, Gloria; Spencer, E.N.; Sugizaki, Mutsumi; Tajima, Hiro; Cohen-Tanugi, Johann; Ziegler, Marcus; /Pisa U. /INFN, Pisa /SLAC /Maryland

    2006-02-27

    A unique electronics system has been built and tested for reading signals from the silicon-strip detectors of the Gamma-ray Large Area Space Telescope mission. The system amplifies and processes signals from 884,736 36-cm strips using only 160 W of power, and it achieves close to 100% detection efficiency with noise occupancy sufficiently low to allow it to self trigger. The design of the readout system is described, and results are presented from ground-based testing of the completed detector system.

  19. Gate field induced switching of electronic current in Si-Ge Core-Shell nanowire quantum dots: A first principles study

    Science.gov (United States)

    Dhungana, Kamal B.; Jaishi, Meghnath; Pati, Ranjit

    Core-shell nanowires are formed by varying the radial composition of the nanowires. One of the most widely studied core-shell nanowire groups in recent years is the Si-Ge and Ge-Si core-shell nanowires. Compared to their pristine counterparts, they are reported to have superior electronic properties. For example, the scaled ON state current value in a Ge-Si core-shell nanowire field effect transistor (FET) is reported to be three to four times higher than that observed in state-of-the-art-metal oxide semiconductor FET (MOSFET) (Nature, 441, 489 (2006)). Here, we study the transport properties of the pristine Si and Si-Ge core-shell nanowire quantum dots of similar dimension to understand the superior performance of Si-Ge core-shell nanowire field effect transistor. Our calculations yield excellent gate field induced switching behavior in current for both pristine Si and Si-Ge core-shell hetero-structure nanowire quantum dots. The threshold gate bias for ON/OFF switching in the Si-Ge core-shell nanowire is found to be much smaller than that found in the pristine Si nanowire. A single particle many-body Green's function approach in conjunction with density functional theory is employed to calculate the electronic current.

  20. Sensing sheets based on large area electronics for fatigue crack detection

    Science.gov (United States)

    Yao, Yao; Glisic, Branko

    2015-03-01

    Reliable early-stage damage detection requires continuous structural health monitoring (SHM) over large areas of structure, and with high spatial resolution of sensors. This paper presents the development stage of prototype strain sensing sheets based on Large Area Electronics (LAE), in which thin-film strain gauges and control circuits are integrated on the flexible electronics and deposited on a polyimide sheet that can cover large areas. These sensing sheets were applied for fatigue crack detection on small-scale steel plates. Two types of sensing-sheet interconnects were designed and manufactured, and dense arrays of strain gauge sensors were assembled onto the interconnects. In total, four (two for each design type) strain sensing sheets were created and tested, which were sensitive to strain at virtually every point over the whole sensing sheet area. The sensing sheets were bonded to small-scale steel plates, which had a notch on the boundary so that fatigue cracks could be generated under cyclic loading. The fatigue tests were carried out at the Carleton Laboratory of Columbia University, and the steel plates were attached through a fixture to the loading machine that applied cyclic fatigue load. Fatigue cracks then occurred and propagated across the steel plates, leading to the failure of these test samples. The strain sensor that was close to the notch successfully detected the initialization of fatigue crack and localized the damage on the plate. The strain sensor that was away from the crack successfully detected the propagation of fatigue crack based on the time history of measured strain. Overall, the results of the fatigue tests validated general principles of the strain sensing sheets for crack detection.

  1. Structural and Electrical Analysis of Various MOSFET Designs

    Directory of Open Access Journals (Sweden)

    Pallavi Choudhary

    2015-03-01

    Full Text Available Invention of Transistor is the foundation of electronics industry. Metal Oxide Semiconductor Field Effect Transistor (MOSFET has been the key to the development of nano electronics technology. This paper offers a brief review of some of the most popular MOSFET structure designs. The scaling down of planar bulk MOSFET proposed by the Moore’s Law has been saturated due to short channel effects and DIBL. Due to this alternative approaches has been considered to overcome the problems at lower node technology. SOI and FinFET technologies are promising candidates in this area.

  2. Radiation Status of Sub-65 nm Electronics

    Science.gov (United States)

    Pellish, Jonathan A.

    2011-01-01

    Ultra-scaled complementary metal oxide semiconductor (CMOS) includes commercial foundry capabilities at and below the 65 nm technology node Radiation evaluations take place using standard products and test characterization vehicles (memories, logic/latch chains, etc.) NEPP focus is two-fold: (1) Conduct early radiation evaluations to ascertain viability for future NASA missions (i.e. leverage commercial technology development). (2) Uncover gaps in current testing methodologies and mechanism comprehension -- early risk mitigation.

  3. Multiscale examination and modeling of electron transport in nanoscale materials and devices

    Science.gov (United States)

    Banyai, Douglas R.

    For half a century the integrated circuits (ICs) that make up the heart of electronic devices have been steadily improving by shrinking at an exponential rate. However, as the current crop of ICs get smaller and the insulating layers involved become thinner, electrons leak through due to quantum mechanical tunneling. This is one of several issues which will bring an end to this incredible streak of exponential improvement of this type of transistor device, after which future improvements will have to come from employing fundamentally different transistor architecture rather than fine tuning and miniaturizing the metal-oxide-semiconductor field effect transistors (MOSFETs) in use today. Several new transistor designs, some designed and built here at Michigan Tech, involve electrons tunneling their way through arrays of nanoparticles. We use a multi-scale approach to model these devices and study their behavior. For investigating the tunneling characteristics of the individual junctions, we use a first-principles approach to model conduction between sub-nanometer gold particles. To estimate the change in energy due to the movement of individual electrons, we use the finite element method to calculate electrostatic capacitances. The kinetic Monte Carlo method allows us to use our knowledge of these details to simulate the dynamics of an entire device---sometimes consisting of hundreds of individual particles---and watch as a device 'turns on' and starts conducting an electric current. Scanning tunneling microscopy (STM) and the closely related scanning tunneling spectroscopy (STS) are a family of powerful experimental techniques that allow for the probing and imaging of surfaces and molecules at atomic resolution. However, interpretation of the results often requires comparison with theoretical and computational models. We have developed a new method for calculating STM topographs and STS spectra. This method combines an established method for approximating the

  4. Large area stress distribution in crystalline materials calculated from lattice deformation identified by electron backscatter diffraction.

    Science.gov (United States)

    Shao, Yongliang; Zhang, Lei; Hao, Xiaopeng; Wu, Yongzhong; Dai, Yuanbin; Tian, Yuan; Huo, Qin

    2014-08-05

    We report a method to obtain the stress of crystalline materials directly from lattice deformation by Hooke's law. The lattice deformation was calculated using the crystallographic orientations obtained from electron backscatter diffraction (EBSD) technology. The stress distribution over a large area was obtained efficiently and accurately using this method. Wurtzite structure gallium nitride (GaN) crystal was used as the example of a hexagonal crystal system. With this method, the stress distribution of a GaN crystal was obtained. Raman spectroscopy was used to verify the stress distribution. The cause of the stress distribution found in the GaN crystal was discussed from theoretical analysis and EBSD data. Other properties related to lattice deformation, such as piezoelectricity, can also be analyzed by this novel approach based on EBSD data.

  5. A Web Service and Interface for Remote Electronic Device Characterization (PREPRINT)

    Science.gov (United States)

    2011-01-01

    the WWW interface. User WWW Server Keithley 2602 Nanotube, graphene or Intel CMOS erver GPIB it l 1 Nanotube, graphene or Si MOSFET Electrical...Educational technology, engineering education, MOSFETs , online services, transistors The authors are...and metal-oxide-semiconductor field effect transistors ( MOSFETs ). Theoretical studies alone cannot provide students with a complete understanding

  6. Combined Effects of Radio Frequency and Electron Radiation on CMOS Inverters

    Science.gov (United States)

    2011-03-01

    complementary metal oxide semiconductor) inverter. According to Sedra and Smith, for any IC technology, the basic circuit element is the logic inverter...Adel Sedra and Kenneth C. Smith, Microelectronic Circuits. New York: Oxford University Press, 2004. [7] B. Wilson. (2008, May) CMOS Logic

  7. Band offsets and electronic structures of interface between In{sub 0.5}Ga{sub 0.5}As and InP

    Energy Technology Data Exchange (ETDEWEB)

    Cai, Genwang [School of Physical Science and Engineering and Key Laboratory of Materials Physics of Ministry of Education of China, Zhengzhou University, Zhengzhou 450052 (China); College of Science, Henan University of Technology, Zhengzhou 450001 (China); Wang, Changhong; Wang, Weichao [College of Electronic Information and Optical Engineering, Nankai University, Tianjin 300071 (China); Liang, Erjun, E-mail: ejliang@zzu.edu.cn [School of Physical Science and Engineering and Key Laboratory of Materials Physics of Ministry of Education of China, Zhengzhou University, Zhengzhou 450052 (China)

    2016-02-07

    III–V semiconductor interfacing with high-κ gate oxide is crucial for the high mobility metal-oxide-semiconductor field transistor device. With density functional theory calculations, we explored the band offsets and electronic structures of the In{sub 0.5}Ga{sub 0.5}As/InP interfaces with various interfacial bondings. Among six different bonding interfaces, we found that P-In(Ga) bonding interface showed the highest stability. Local density of states calculations was adopted to calculate the band offsets. Except for the metallic interface, we noticed that neither valence band offset nor conduction band offset depended on the interfacial bondings. For the most stable P-In(Ga) interface, we did not observe any gap states. Furthermore, we explored the P-In(Ga) interfaces with interfacial P-As exchange defects, which slightly modified the interface stability and the band offsets but did not produce any gap states. These findings provide solid evidence that InP could serve as a promising interfacial passivation layer between III–V material and high-κ oxide in the application of high mobility devices.

  8. HfO_2and ZrO2 : Comparison of Structures and Thermodynamic and Electronic Properties Based on Ab Initio Calculations and Experiment

    Science.gov (United States)

    Demkov, Alexander A.; Navrotsky, Alexandra

    2001-03-01

    The International Technology Roadmap for Semiconductors (ITRS) predicts that the strategy of scaling complementary metal-oxide-semiconductor (CMOS) devices will come to an abrupt end around the year 2012. The main reason for this will be the unacceptably high leakage current through the silicon dioxide gate with a thickness below 20 ÅFinding a gate insulator alternative to SiO2 has proven to be far from trivial. Hafnium and zirconium dioxides and silicates have been recently considered as gate dielectrics with intermediate dielectric constants. Hafnia and ziconia are important ceramic materials as well, and their phase relations are rather well studied. There is also interest in hafnia as a constituent of ceramic waste forms for plutonium, based on its refractory nature and high neutron absorption cross section. We use a combination of the ab-initio calculations and calorimetry to investigate thermodynamic and electronic properties of hafnia and zirconia. We describe the cubic to tetragonal phase transition in the fluorite structure by computing the total energy surface for zone-edge distortions correct to fourth order in the soft-mode displacement with the strain coupling renormalization included. We compare the two materials using some simple chemical concepts.

  9. Technology of integrated self-aligned E/D-mode n++GaN/InAlN/AlN/GaN MOS HEMTs for mixed-signal electronics

    Science.gov (United States)

    Blaho, M.; Gregušová, D.; Haščík, Š.; Seifertová, A.; Ťapajna, M.; Šoltýs, J.; Šatka, A.; Nagy, L.; Chvála, A.; Marek, J.; Carlin, J.-F.; Grandjean, N.; Konstantinidis, G.; Kuzmík, J.

    2016-06-01

    We describe the technology and performance of integrated enhancement/depletion (E/D)-mode n++GaN/InAlN/AlN/GaN HEMTs with a self-aligned metal-oxide-semiconductor (MOS) gate structure. An identical starting epi-structure was used for both types of devices without the additional need for a contacts regrowth. The n++GaN cap layer was etched away in the gate trenches of the E-mode HEMT while it was left intact for the D-mode HEMT. The plasma etching process was shown to be highly selective between the cap and the InAlN barrier and also to polish the InAlN surface. However, different GaN etching initiation times inside and outside the mesa region were obtained. Gate contacts were isolated using a dielectric layer deposited at low temperature through an e-beam resist to retain the self-aligned approach. Feasibility of the approach for future fast GaN-based mixed-signal electronic circuits was shown by obtaining alternative HEMT threshold voltage values of +0.8 V and -2.6 V, invariant maximal output current of ˜0.35 A mm-1 despite large source-to-drain distances and by demonstrating a functional logic invertor.

  10. Modulating Cationic Ratios for High-Performance Transparent Solution-Processed Electronics.

    Science.gov (United States)

    John, Rohit Abraham; Nguyen, Anh Chien; Chen, Yuxin; Shukla, Sudhanshu; Chen, Shi; Mathews, Nripan

    2016-01-20

    Amorphous oxide semiconductors such as indium zinc tin oxide (IZTO) are considered favorites to serve as channel materials for thin film transistors (TFTs) because they combine high charge carrier mobility with high optical transmittance, allowing for the development of transparent electronics. Although the influence of relative cationic concentrations in determining the electronic properties have been studied in sputtered and PLD films, the development of printed transparent electronics hinges on such dependencies being explored for solution-processed systems. Here, we study solution-processed indium zinc tin oxide thin film transistors (TFTs) to investigate variation in their electrical properties with change in cationic composition. Charge transport mobility ranging from 0.3 to 20.3 cm(2)/(V s), subthreshold swing ranging from 1.2 to 8.4 V/dec, threshold voltage ranging from -50 to 5 V, and drain current on-off ratio ranging from 3 to 6 orders of magnitude were obtained by examining different compositions of the semiconductor films. Mobility was found to increase with the incorporation of large cations such as In(3+) and Sn(4+) due to the vast s-orbital overlap they can achieve when compared to the intercationic distance. Subthreshold swing decreased with an increase in Zn(2+) concentration due to reduced interfacial state formation between the semiconductor and dielectric. The optimized transistor obtained at a compositional ratio of In/Zn/Sn = 1:1:1, exhibited a high field-effect mobility of 8.62 cm(2)/(V s), subthreshold swing of 1.75 V/dec, and current on-off ratio of 10(6). Such impressive performances reaffirm the promise of amorphous metal oxide semiconductors for printed electronics.

  11. The Acquisition of Electronic Books in the Area of Astronomy in the UNAM

    Science.gov (United States)

    Juarez, B.

    2015-04-01

    The current high cost of electronic books coupled with the low budget for the astronomy libraries of the National Autonomous University of Mexico (UNAM) has led to the three libraries in the area of Astronomy to become part of the Group of Libraries in the area of sciences, which happened in 2011. This group was formed to support the purchasing of e-books: because of their high costs, it was impossible to acquire materials of interest for each library. As a result, a working group was formed to prepare lists of e-books to purchase in order to avoid duplication, acquire all needed titles, and combine resources. The goal was to purchase e-books from large publishing companies such as Springer and Elsevier, and also Cambridge UP, Oxford UP, World Scientific, Astronomical Society of the Pacific, and others. Through these joint purchases, the three campus Astronomy libraries — University City, Ensenada, and Morelia — have benefited from the acquisition of e-books from 2010 to 2013. This paper will present the ways the working group functioned, the policies that needed to be followed with regards to the selection and acquisition of e-books, and the benefits at both the Library and Group level.

  12. Using an electronic nose for determining the spoilage of vacuum-packaged beef.

    Science.gov (United States)

    Blixt, Y; Borch, E

    1999-02-02

    The use of an electronic nose in the quantitative determination of the degree of spoilage of vacuum-packaged beef was evaluated. Beef from four different slaughterhouses was sliced, vacuum-packaged and stored at 4 degrees C for 8 weeks. Samples were withdrawn for bacterial (aerobic bacteria, lactic acid bacteria, Brochothrix thermosphacta, Pseudomonas and Enterobacteriaceae) and sensorial analyses and analysis of the volatile compounds during the storage period. A trained panel was used for the sensorial evaluations. The volatile compounds were analysed using an electronic nose containing a sensory array composed of 10 metal oxide semiconductor field-effect transistors, four Tagushi type sensors and one CO2-sensitive sensor. Four of the 15 sensors were excluded due to lack of response or overloading. Partial least-squares regression was used to define the mathematical relationships between the degree of spoilage of vacuum-packaged beef, as determined by the sensory panel, and the signal magnitudes of the sensors of the electronic nose. The mathematical models were validated after 6 months using a new set of samples. The stability of the sensors during this period was examined and it was shown that the sensitivity of five of the 11 sensors used had changed. Using the six remaining sensors, the signal patterns obtained from the meat from the different slaughterhouses did not change over a period of 6 months. It was shown that the degree of spoilage, as calculated using a model based on two Tagushi sensors, correlated well with the degree of spoilage determined by the sensory panel (r2 = 0.94).

  13. Gas Electron Multipliers: Development of large area GEMs and spherical GEMs

    CERN Document Server

    Duarte Pinto, Serge; Brock, Ian

    2011-01-01

    Gaseous radiation detectors have been a crucial part of high-energy physics instrumentation since the 1960s, when the first multiwire proportional counters were built. In the 1990s the first micropattern gas detectors (MPGDs) saw the light; with sub-millimeter feature sizes these novel detectors were faster and more accurate than their predecessors. The gas electron multiplier (GEM) is one of the most successful of these technologies. It is a charge multiplication structure made from a copper clad polymer foil, pierced with a regular and dense pattern of holes. I will describe the properties and the application of GEMs and GEM detectors, and the research and development I have done on this technology. Two of the main objectives were the development of large area GEMs (~m^2) for particle physics experiments and GEMs with a spherical shape for x-ray or neutron diffraction detectors. Both have been realized, and the new techniques involved are finding their way to applications in research and industry.

  14. Structural and electrical properties of large area epitaxial VO2 films grown by electron beam evaporation

    Science.gov (United States)

    Théry, V.; Boulle, A.; Crunteanu, A.; Orlianges, J. C.; Beaumont, A.; Mayet, R.; Mennai, A.; Cosset, F.; Bessaudou, A.; Fabert, M.

    2017-02-01

    Large area (up to 4 squared inches) epitaxial VO2 films, with a uniform thickness and exhibiting an abrupt metal-insulator transition with a resistivity ratio as high as 2.85 × 10 4 , have been grown on (001)-oriented sapphire substrates by electron beam evaporation. The lattice distortions (mosaicity) and the level of strain in the films have been assessed by X-ray diffraction. It is demonstrated that the films grow in a domain-matching mode where the distortions are confined close to the interface which allows growth of high-quality materials despite the high film-substrate lattice mismatch. It is further shown that a post-deposition high-temperature oxygen annealing step is crucial to ensure the correct film stoichiometry and provide the best structural and electrical properties. Alternatively, it is possible to obtain high quality films with a RF discharge during deposition, which hence do not require the additional annealing step. Such films exhibit similar electrical properties and only slightly degraded structural properties.

  15. Development of large area, pico-second resolution photo-detectors and associated readout electronics

    Energy Technology Data Exchange (ETDEWEB)

    Grabas, H.; Oberla, E. [Enrico Fermi Inst., Univ. of Chicago, Chicago, IL 60637 (United States); Attenkoffer, K. [Argonne National Laboratory, Argonne, IL 60439 (United States); Bogdan, M.; Frisch, H. J. [Enrico Fermi Inst., Univ. of Chicago, Chicago, IL 60637 (United States); Genat, J. F. [LPNHE, CNRS/IN2P3/LPNHE, Paris 75252 (France); Northrop, R. [Enrico Fermi Inst., Univ. of Chicago, Chicago, IL 60637 (United States); May, E. N. [Argonne National Laboratory, Argonne, IL 60439 (United States); Varner, G. S. [Univ. of Hawaii, Honolulu, HI 96822 (United States); Wetstein, M. [Argonne National Laboratory, Argonne, IL 60439 (United States)

    2011-07-01

    The Large Area Pico-second Photo-detectors described in this contribution incorporate a photo-cathode and a borosilicate glass capillary Micro-Channel Plate (MCP) pair functionalized by atomic layer deposition (ALD) of separate resistive and electron secondary emitters materials. They may be used for biomedical imaging purposes, a remarkable opportunity to apply technologies developed in HEP having the potential to make major advances in the medical world, in particular for Positron Emission Tomography (PET). If daisy-chained and coupled to fast transmission lines read at both ends, they could be implemented in very large dimensions. Initial testing with matched pairs of small glass capillary test has demonstrated gains of the order of 105 to 106. Compared to other fast imaging devices, these photo-detectors are expected to provide timing resolutions in the 10-100 ps range, and two-dimension position in the sub-millimeter range. A 6-channel readout ASIC has been designed in 130 nm CMOS technology and tested. As a result, fast analog sampling up to 17 GS/s has been obtained, the intrinsic analog bandwidth being presently under evaluation. The digitization in parallel of several cells in two microseconds allows getting off-chip digital data read at a maximum rate of 40 MHz. Digital Signal Processing of the sampled waveforms is expected achieving the timing and space resolutions obtained with digital oscilloscopes. (authors)

  16. Gas electron multipliers. Development of large area GEMS and spherical GEMS

    Energy Technology Data Exchange (ETDEWEB)

    Pinto, Serge Duarte

    2011-08-15

    Gaseous radiation detectors have been a crucial part of high-energy physics instrumentation since the 1960s, when the first multiwire proportional counters were built. In the 1990s the first micropattern gas detectors (MPGDS) saw the light; with sub-millimeter feature sizes these novel detectors were faster and more accurate than their predecessors. The gas electron multiplier (GEM) is one of the most successful of these technologies. It is a charge multiplication structure made from a copper clad polymer foil, pierced with a regular and dense pattern of holes. I describe the properties and the application of GEMs and GEM. detectors, and the research and development I have done on this technology. Two of the main objectives were the development of large area GEMs ({proportional_to}m{sup 2}) for particle physics experiments and GEMs with a spherical shape for X-ray or neutron diffraction detectors. Both have been realized, and the new techniques involved are finding their way to applications in research and industry. (orig.)

  17. Hair mercury concentrations and associated factors in an electronic waste recycling area, Guiyu, China

    Energy Technology Data Exchange (ETDEWEB)

    Ni, Wenqing [Department of Preventive Medicine, Shantou University Medical College, Shantou 515041, Guangdong (China); Chen, Yaowen [Central Laboratory of Shantou University, Shantou 515063, Guangdong (China); Huang, Yue; Wang, Xiaoling [Department of Preventive Medicine, Shantou University Medical College, Shantou 515041, Guangdong (China); Zhang, Gairong [Central Laboratory of Shantou University, Shantou 515063, Guangdong (China); Luo, Jiayi [Department of Preventive Medicine, Shantou University Medical College, Shantou 515041, Guangdong (China); Wu, Kusheng, E-mail: kswu@stu.edu.cn [Department of Preventive Medicine, Shantou University Medical College, Shantou 515041, Guangdong (China)

    2014-01-15

    Objective: Toxic heavy metals are released to the environment constantly from unregulated electronic waste (e-waste) recycling in Guiyu, China, and thus may contribute to the elevation of mercury (Hg) and other heavy metals levels in human hair. We aimed to investigate concentrations of mercury in hair from Guiyu and potential risk factors and compared them with those from a control area where no e-waste processing occurs. Methods: A total of 285 human hair samples were collected from three villages (including Beilin, Xianma, and Huamei) of Guiyu (n=205) and the control area, Jinping district of Shantou city (n=80). All the volunteers were administered a questionnaire regarding socio-demographic characteristics and other possible factors contributed to hair mercury concentration. Hair mercury concentration was analyzed by hydride generation atomic fluorescence spectrometry (AFS). Results: Our results suggested that hair mercury concentrations in volunteers of Guiyu (median, 0.99; range, 0.18–3.98 μg/g) were significantly higher than those of Jinping (median, 0.59; range, 0.12–1.63 μg/g). We also observed a higher over-limit ratio (>1 μg/g according to USEPA) in Guiyu than in Jinping (48.29% vs. 11.25%, P<0.001). Logistic regression model showed that the variables of living house also served as an e-waste workshop, work related to e-waste, family income, time of residence in Guiyu, the distance between home and waste incineration, and fish intake were associated with hair mercury concentration. After multiple stepwise regression analysis, in the Guiyu samples, hair mercury concentration was found positively associated with the time residence in Guiyu (β=0.299, P<0.001), and frequency of shellfish intake (β=0.184, P=0.016); and negatively associated with the distance between home and waste incineration (β=−0.190, P=0.015) and whether house also served as e-waste workshop (β=−0.278, P=0.001). Conclusions: This study investigated human mercury exposure

  18. Hair mercury concentrations and associated factors in an electronic waste recycling area, Guiyu, China.

    Science.gov (United States)

    Ni, Wenqing; Chen, Yaowen; Huang, Yue; Wang, Xiaoling; Zhang, Gairong; Luo, Jiayi; Wu, Kusheng

    2014-01-01

    Toxic heavy metals are released to the environment constantly from unregulated electronic waste (e-waste) recycling in Guiyu, China, and thus may contribute to the elevation of mercury (Hg) and other heavy metals levels in human hair. We aimed to investigate concentrations of mercury in hair from Guiyu and potential risk factors and compared them with those from a control area where no e-waste processing occurs. A total of 285 human hair samples were collected from three villages (including Beilin, Xianma, and Huamei) of Guiyu (n=205) and the control area, Jinping district of Shantou city (n=80). All the volunteers were administered a questionnaire regarding socio-demographic characteristics and other possible factors contributed to hair mercury concentration. Hair mercury concentration was analyzed by hydride generation atomic fluorescence spectrometry (AFS). Our results suggested that hair mercury concentrations in volunteers of Guiyu (median, 0.99; range, 0.18-3.98μg/g) were significantly higher than those of Jinping (median, 0.59; range, 0.12-1.63μg/g). We also observed a higher over-limit ratio (>1μg/g according to USEPA) in Guiyu than in Jinping (48.29% vs. 11.25%, P<0.001). Logistic regression model showed that the variables of living house also served as an e-waste workshop, work related to e-waste, family income, time of residence in Guiyu, the distance between home and waste incineration, and fish intake were associated with hair mercury concentration. After multiple stepwise regression analysis, in the Guiyu samples, hair mercury concentration was found positively associated with the time residence in Guiyu (β=0.299, P<0.001), and frequency of shellfish intake (β=0.184, P=0.016); and negatively associated with the distance between home and waste incineration (β=-0.190, P=0.015) and whether house also served as e-waste workshop (β=-0.278, P=0.001). This study investigated human mercury exposure and suggested elevated hair mercury concentrations in

  19. Ab initio structure determination of nanocrystals of organic pharmaceutical compounds by electron diffraction at room temperature using a Timepix quantum area direct electron detector

    Energy Technology Data Exchange (ETDEWEB)

    Genderen, E. van; Clabbers, M. T. B. [Biophysical Structural Chemistry, Leiden University, Einsteinweg 55, 2333 CC Leiden (Netherlands); Center for Cellular Imaging and NanoAnalytics (C-CINA), Biozentrum, University of Basel, CH-4058 Basel (Switzerland); Das, P. P. [Nanomegas SPRL, Boulevard Edmond Machtens 79, B 1080, Brussels (Belgium); Stewart, A. [Department of Physics and Energy, Materials and Surface Science Institute (MSSI), University of Limerick, Limerick (Ireland); Nederlof, I. [Biophysical Structural Chemistry, Leiden University, Einsteinweg 55, 2333 CC Leiden (Netherlands); Amsterdam Scientific Instruments, Postbus 41882, 1009 DB Amsterdam (Netherlands); Barentsen, K. C. [Biophysical Structural Chemistry, Leiden University, Einsteinweg 55, 2333 CC Leiden (Netherlands); Portillo, Q. [Nanomegas SPRL, Boulevard Edmond Machtens 79, B 1080, Brussels (Belgium); Centres Científics i Tecnològics de la Universitat de Barcelona, University of Barcelona, Carrer de Lluís Solé i Sabaris, 1-3, Barcelona (Spain); Pannu, N. S. [Biophysical Structural Chemistry, Leiden University, Einsteinweg 55, 2333 CC Leiden (Netherlands); Nicolopoulos, S. [Nanomegas SPRL, Boulevard Edmond Machtens 79, B 1080, Brussels (Belgium); Gruene, T., E-mail: tim.gruene@psi.ch [Biology and Chemistry, Laboratory of Biomolecular Research, Paul Scherrer Institute (PSI), 5232 Villigen (Switzerland); Abrahams, J. P., E-mail: tim.gruene@psi.ch [Biophysical Structural Chemistry, Leiden University, Einsteinweg 55, 2333 CC Leiden (Netherlands); Center for Cellular Imaging and NanoAnalytics (C-CINA), Biozentrum, University of Basel, CH-4058 Basel (Switzerland); Biology and Chemistry, Laboratory of Biomolecular Research, Paul Scherrer Institute (PSI), 5232 Villigen (Switzerland)

    2016-02-05

    A specialized quantum area detector for electron diffraction studies makes it possible to solve the structure of small organic compound nanocrystals in non-cryo conditions by direct methods. Until recently, structure determination by transmission electron microscopy of beam-sensitive three-dimensional nanocrystals required electron diffraction tomography data collection at liquid-nitrogen temperature, in order to reduce radiation damage. Here it is shown that the novel Timepix detector combines a high dynamic range with a very high signal-to-noise ratio and single-electron sensitivity, enabling ab initio phasing of beam-sensitive organic compounds. Low-dose electron diffraction data (∼0.013 e{sup −} Å{sup −2} s{sup −1}) were collected at room temperature with the rotation method. It was ascertained that the data were of sufficient quality for structure solution using direct methods using software developed for X-ray crystallography (XDS, SHELX) and for electron crystallography (ADT3D/PETS, SIR2014)

  20. Laser Direct Write micro-fabrication of large area electronics on flexible substrates

    Science.gov (United States)

    Zacharatos, F.; Makrygianni, M.; Geremia, R.; Biver, E.; Karnakis, D.; Leyder, S.; Puerto, D.; Delaporte, P.; Zergioti, I.

    2016-06-01

    To date, Laser Direct Write (LDW) techniques, such as Laser Induced Forward Transfer (LIFT), selective laser ablation and selective laser sintering of metal nanoparticle (NP) ink layers are receiving growing attention for the printing of uniform and well-defined conductive patterns with resolution down to 10 μm. For flexible substrates in particular, selective laser sintering of such NP patterns has been widely applied, as a low temperature and high resolution process compatible with large area electronics. In this work, LDW of silver NP inks has been carried out on polyethylene-terephthalate (PET), polyethylene-naphthalate (PEN) and polyimide (PI) substrates to achieve low electrical resistivity electrodes. In more detail, high speed short pulsed (picosecond and nanosecond) lasers with repetition rates up to 1 MHz were used to print (LIFT) metal NP inks. We thus achieved uniform and continuous patterns with a minimum feature size of 1 μm and a total footprint larger than 1 cm2. Next, the printed patterns were laser sintered with ns pulses at 532 nm over a wide laser fluence window, resulting in an electrical resistivity of 10 μΩ cm. We carried out spatial beam shaping experiments to achieve a top-hat laser intensity profile and employed selective laser ablation of thin films (thickness on the order of 100 nm) to produce silver micro-electrodes with a resolution on the order of 10 μm and a low line edge roughness. Laser sintering was combined with laser ablation to constitute a fully autonomous micro-patterning technique of metallic micro-features, with a 10 μm resolution and geometrical characteristics tuned for interdigitated electrodes for sensor applications.

  1. A comparison of echocardiographic and electron beam computed tomographic assessment of aortic valve area in patients with valvular aortic stenosis

    NARCIS (Netherlands)

    Piers, Lieuwe H.; Dikkers, Riksta; Tio, Rene A.; van den Berg, Maarten P.; Willems, Tineke P.; Zijlstra, Felix; Oudkerk, Matthijs

    2007-01-01

    The purpose of this study was to compare electron beam computed tomography (EBT) with transthoracic echocardiography (TTE) in determining aortic valve area (AVA). Thirty patients (9 females, 21 males) underwent a contrast-enhanced EBT scan (e-Speed, GE, San Francisco, CA, USA) and TTE within 17 +/-

  2. Determination of the volume-specific surface area by using transmission electron tomography for characterization and definition of nanomaterials

    Directory of Open Access Journals (Sweden)

    Francisco Michel

    2011-05-01

    Full Text Available Abstract Background Transmission electron microscopy (TEM remains an important technique to investigate the size, shape and surface characteristics of particles at the nanometer scale. Resulting micrographs are two dimensional projections of objects and their interpretation can be difficult. Recently, electron tomography (ET is increasingly used to reveal the morphology of nanomaterials (NM in 3D. In this study, we examined the feasibility to visualize and measure silica and gold NM in suspension using conventional bright field electron tomography. Results The general morphology of gold and silica NM was visualized in 3D by conventional TEM in bright field mode. In orthoslices of the examined NM the surface features of a NM could be seen and measured without interference of higher or lower lying structures inherent to conventional TEM. Segmentation by isosurface rendering allowed visualizing the 3D information of an electron tomographic reconstruction in greater detail than digital slicing. From the 3D reconstructions, the surface area and the volume of the examined NM could be estimated directly and the volume-specific surface area (VSSA was calculated. The mean VSSA of all examined NM was significantly larger than the threshold of 60 m2/cm3. The high correlation between the measured values of area and volume gold nanoparticles with a known spherical morphology and the areas and volumes calculated from the equivalent circle diameter (ECD of projected nanoparticles (NP indicates that the values measured from electron tomographic reconstructions are valid for these gold particles. Conclusion The characterization and definition of the examined gold and silica NM can benefit from application of conventional bright field electron tomography: the NM can be visualized in 3D, while surface features and the VSSA can be measured.

  3. Performance Comparison of Fuzzy ARTMAP and LDA in Qualitative Classification of Iranian Rosa damascena Essential Oils by an Electronic Nose.

    Science.gov (United States)

    Gorji-Chakespari, Abbas; Nikbakht, Ali Mohammad; Sefidkon, Fatemeh; Ghasemi-Varnamkhasti, Mahdi; Brezmes, Jesús; Llobet, Eduard

    2016-05-04

    Quality control of essential oils is an important topic in industrial processing of medicinal and aromatic plants. In this paper, the performance of Fuzzy Adaptive Resonant Theory Map (ARTMAP) and linear discriminant analysis (LDA) algorithms are compared in the specific task of quality classification of Rosa damascene essential oil samples (one of the most famous and valuable essential oils in the world) using an electronic nose (EN) system based on seven metal oxide semiconductor (MOS) sensors. First, with the aid of a GC-MS analysis, samples of Rosa damascene essential oils were classified into three different categories (low, middle, and high quality, classes C1, C2, and C3, respectively) based on the total percent of the most crucial qualitative compounds. An ad-hoc electronic nose (EN) system was implemented to sense the samples and acquire signals. Forty-nine features were extracted from the EN sensor matrix (seven parameters to describe each sensor curve response). The extracted features were ordered in relevance by the intra/inter variance criterion (Vr), also known as the Fisher discriminant. A leave-one-out cross validation technique was implemented for estimating the classification accuracy reached by both algorithms. Success rates were calculated using 10, 20, 30, and the entire selected features from the response of the sensor array. The results revealed a maximum classification accuracy of 99% when applying the Fuzzy ARTMAP algorithm and 82% for LDA, using the first 10 features in both cases. Further classification results explained that sub-optimal performance is likely to occur when all the response features are applied. It was found that an electronic nose system employing a Fuzzy ARTMAP classifier could become an accurate, easy, and inexpensive alternative tool for qualitative control in the production of Rosa damascene essential oil.

  4. Performance Comparison of Fuzzy ARTMAP and LDA in Qualitative Classification of Iranian Rosa damascena Essential Oils by an Electronic Nose

    Directory of Open Access Journals (Sweden)

    Abbas Gorji-Chakespari

    2016-05-01

    Full Text Available Quality control of essential oils is an important topic in industrial processing of medicinal and aromatic plants. In this paper, the performance of Fuzzy Adaptive Resonant Theory Map (ARTMAP and linear discriminant analysis (LDA algorithms are compared in the specific task of quality classification of Rosa damascene essential oil samples (one of the most famous and valuable essential oils in the world using an electronic nose (EN system based on seven metal oxide semiconductor (MOS sensors. First, with the aid of a GC-MS analysis, samples of Rosa damascene essential oils were classified into three different categories (low, middle, and high quality, classes C1, C2, and C3, respectively based on the total percent of the most crucial qualitative compounds. An ad-hoc electronic nose (EN system was implemented to sense the samples and acquire signals. Forty-nine features were extracted from the EN sensor matrix (seven parameters to describe each sensor curve response. The extracted features were ordered in relevance by the intra/inter variance criterion (Vr, also known as the Fisher discriminant. A leave-one-out cross validation technique was implemented for estimating the classification accuracy reached by both algorithms. Success rates were calculated using 10, 20, 30, and the entire selected features from the response of the sensor array. The results revealed a maximum classification accuracy of 99% when applying the Fuzzy ARTMAP algorithm and 82% for LDA, using the first 10 features in both cases. Further classification results explained that sub-optimal performance is likely to occur when all the response features are applied. It was found that an electronic nose system employing a Fuzzy ARTMAP classifier could become an accurate, easy, and inexpensive alternative tool for qualitative control in the production of Rosa damascene essential oil.

  5. Top-down Fabrication and Enhanced Active Area Electronic Characteristics of Amorphous Oxide Nanoribbons for Flexible Electronics.

    Science.gov (United States)

    Jang, Hyun-June; Joong Lee, Ki; Jo, Kwang-Won; Katz, Howard E; Cho, Won-Ju; Shin, Yong-Beom

    2017-07-18

    Inorganic amorphous oxide semiconductor (AOS) materials such as amorphous InGaZnO (a-IGZO) possess mechanical flexibility and outstanding electrical properties, and have generated great interest for use in flexible and transparent electronic devices. In the past, however, AOS devices required higher activation energies, and hence higher processing temperatures, than organic ones to neutralize defects. It is well known that one-dimensional nanowires tend to have better carrier mobility and mechanical strength along with fewer defects than the corresponding two-dimensional films, but until now it has been difficult, costly, and impractical to fabricate such nanowires in proper alignments by either "bottom-up" growth techniques or by "top-down" e-beam lithography. Here we show a top-down, cost-effective, and scalable approach for the fabrication of parallel, laterally oriented AOS nanoribbons based on lift-off and nano-imprinting. High mobility (132 cm(2)/Vs), electrical stability, and transparency are obtained in a-IGZO nanoribbons, compared to the planar films of the same a-IGZO semiconductor.

  6. Preliminary design of CERN Future Circular Collider tunnel: first evaluation of the radiation environment in critical areas for electronics

    Science.gov (United States)

    Infantino, Angelo; Alía, Rubén García; Besana, Maria Ilaria; Brugger, Markus; Cerutti, Francesco

    2017-09-01

    As part of its post-LHC high energy physics program, CERN is conducting a study for a new proton-proton collider, called Future Circular Collider (FCC-hh), running at center-of-mass energies of up to 100 TeV in a new 100 km tunnel. The study includes a 90-350 GeV lepton collider (FCC-ee) as well as a lepton-hadron option (FCC-he). In this work, FLUKA Monte Carlo simulation was extensively used to perform a first evaluation of the radiation environment in critical areas for electronics in the FCC-hh tunnel. The model of the tunnel was created based on the original civil engineering studies already performed and further integrated in the existing FLUKA models of the beam line. The radiation levels in critical areas, such as the racks for electronics and cables, power converters, service areas, local tunnel extensions was evaluated.

  7. Laser Direct Write micro-fabrication of large area electronics on flexible substrates

    Energy Technology Data Exchange (ETDEWEB)

    Zacharatos, F.; Makrygianni, M. [National Technical University of Athens, Physics Department, Zografou Campus, 15780 (Greece); Geremia, R.; Biver, E.; Karnakis, D. [Oxford Lasers Ltd, Unit 8 Moorbrook Park, Oxfordshire OX11 7HP (United Kingdom); Leyder, S.; Puerto, D.; Delaporte, P. [Aix-Marseille University, CNRS, LP3 – UMR 7341, 13288 Marseille Cedex 9 (France); Zergioti, I., E-mail: zergioti@central.ntua.gr [National Technical University of Athens, Physics Department, Zografou Campus, 15780 (Greece)

    2016-06-30

    Highlights: • Laser Direct Writing of metallic patterns with a minimum feature size of 1 μm. • Selective Laser Ablation of 50 nm thick metal films on flexible substrates. • Selective Laser sintering resulting in an electrical resistivity of 9 μΩ cm. • Laser fabrication of interdigitated electrodes for sensor applications. - Abstract: To date, Laser Direct Write (LDW) techniques, such as Laser Induced Forward Transfer (LIFT), selective laser ablation and selective laser sintering of metal nanoparticle (NP) ink layers are receiving growing attention for the printing of uniform and well-defined conductive patterns with resolution down to 10 μm. For flexible substrates in particular, selective laser sintering of such NP patterns has been widely applied, as a low temperature and high resolution process compatible with large area electronics. In this work, LDW of silver NP inks has been carried out on polyethylene-terephthalate (PET), polyethylene-naphthalate (PEN) and polyimide (PI) substrates to achieve low electrical resistivity electrodes. In more detail, high speed short pulsed (picosecond and nanosecond) lasers with repetition rates up to 1 MHz were used to print (LIFT) metal NP inks. We thus achieved uniform and continuous patterns with a minimum feature size of 1 μm and a total footprint larger than 1 cm{sup 2}. Next, the printed patterns were laser sintered with ns pulses at 532 nm over a wide laser fluence window, resulting in an electrical resistivity of 10 μΩ cm. We carried out spatial beam shaping experiments to achieve a top-hat laser intensity profile and employed selective laser ablation of thin films (thickness on the order of 100 nm) to produce silver micro-electrodes with a resolution on the order of 10 μm and a low line edge roughness. Laser sintering was combined with laser ablation to constitute a fully autonomous micro-patterning technique of metallic micro-features, with a 10 μm resolution and geometrical characteristics tuned for

  8. Silicon passivation study under low energy electron irradiation conditions; Etude de la passivation du silicium dans des conditions d'irradiation electronique de faible energie

    Energy Technology Data Exchange (ETDEWEB)

    Cluzel, R.

    2010-11-29

    Backside illuminated thinned CMOS (Complementary Metal Oxide Semiconductor) imaging system is a technology developed to increase the signal to noise ratio and the sensibility of such sensors. This configuration is adapted to the electrons detection from the energy range of [1 - 12 keV]. The impinging electron creates by multiplication several hundreds of secondary electrons close to the surface. A P{sup ++} highly-doped passivation layer of the rear face is required to reduce the secondary electron surface recombination rate. Thanks to the potential barrier induced by the P{sup ++} layer, the passivation layer increases the collected charges number and so the sensor collection gain. The goal of this study is to develop some experimental methods in order to determine the effect of six different passivation processes on the collection gain. Beforehand, the energy profile deposited by an incident electron is studied with the combination of Monte-Carlo simulations and some analytical calculations. The final collection gain model shows that the mirror effect from the passivation layer is a key factor at high energies whereas the passivation layer has to be as thin as possible at low energies. A first experimental setup which consists in irradiating P{sup ++}/N large diodes allows to study the passivation process impacts on the surface recombinations. Thanks to a second setup based on a single event upset directly on thinned CMOS sensor, passivation techniques are discriminated in term of mirror effect and the implied spreading charges. The doping atoms activation laser annealing is turn out to be a multiplication gain inhomogeneity source impacting directly the matrix uniformity. (author)

  9. Monolithic Ge-on-Si lasers for large-scale electronic-photonic integration

    Science.gov (United States)

    Liu, Jifeng; Kimerling, Lionel C.; Michel, Jurgen

    2012-09-01

    A silicon-based monolithic laser source has long been envisioned as a key enabling component for large-scale electronic-photonic integration in future generations of high-performance computation and communication systems. In this paper we present a comprehensive review on the development of monolithic Ge-on-Si lasers for this application. Starting with a historical review of light emission from the direct gap transition of Ge dating back to the 1960s, we focus on the rapid progress in band-engineered Ge-on-Si lasers in the past five years after a nearly 30-year gap in this research field. Ge has become an interesting candidate for active devices in Si photonics in the past decade due to its pseudo-direct gap behavior and compatibility with Si complementary metal oxide semiconductor (CMOS) processing. In 2007, we proposed combing tensile strain with n-type doping to compensate the energy difference between the direct and indirect band gap of Ge, thereby achieving net optical gain for CMOS-compatible diode lasers. Here we systematically present theoretical modeling, material growth methods, spontaneous emission, optical gain, and lasing under optical and electrical pumping from band-engineered Ge-on-Si, culminated by recently demonstrated electrically pumped Ge-on-Si lasers with >1 mW output in the communication wavelength window of 1500-1700 nm. The broad gain spectrum enables on-chip wavelength division multiplexing. A unique feature of band-engineered pseudo-direct gap Ge light emitters is that the emission intensity increases with temperature, exactly opposite to conventional direct gap semiconductor light-emitting devices. This extraordinary thermal anti-quenching behavior greatly facilitates monolithic integration on Si microchips where temperatures can reach up to 80 °C during operation. The same band-engineering approach can be extended to other pseudo-direct gap semiconductors, allowing us to achieve efficient light emission at wavelengths previously

  10. Single-chip electron spin resonance detectors operating at 50 GHz, 92 GHz, and 146 GHz

    Science.gov (United States)

    Matheoud, Alessandro V.; Gualco, Gabriele; Jeong, Minki; Zivkovic, Ivica; Brugger, Jürgen; Rønnow, Henrik M.; Anders, Jens; Boero, Giovanni

    2017-05-01

    We report on the design and characterization of single-chip electron spin resonance (ESR) detectors operating at 50 GHz, 92 GHz, and 146 GHz. The core of the single-chip ESR detectors is an integrated LC-oscillator, formed by a single turn aluminum planar coil, a metal-oxide-metal capacitor, and two metal-oxide semiconductor field effect transistors used as negative resistance network. On the same chip, a second, nominally identical, LC-oscillator together with a mixer and an output buffer are also integrated. Thanks to the slightly asymmetric capacitance of the mixer inputs, a signal at a few hundreds of MHz is obtained at the output of the mixer. The mixer is used for frequency down-conversion, with the aim to obtain an output signal at a frequency easily manageable off-chip. The coil diameters are 120 μm, 70 μm, and 45 μm for the U-band, W-band, and the D-band oscillators, respectively. The experimental frequency noises at 100 kHz offset from the carrier are 90 Hz/Hz1/2, 300 Hz/Hz1/2, and 700 Hz/Hz1/2 at 300 K, respectively. The ESR spectra are obtained by measuring the frequency variations of the single-chip oscillators as a function of the applied magnetic field. The experimental spin sensitivities, as measured with a sample of α,γ-bisdiphenylene-β-phenylallyl (BDPA)/benzene complex, are 1 × 108 spins/Hz1/2, 4 × 107 spins/Hz1/2, 2 × 107 spins/Hz1/2 at 300 K, respectively. We also show the possibility to perform experiments up to 360 GHz by means of the higher harmonics in the microwave field produced by the integrated single-chip LC-oscillators.

  11. Photoelectrochemistry, Electronic Structure, and Bandgap Sizes of Semiconducting Cu(I)-Niobates and Cu(I)-Tantalates

    Energy Technology Data Exchange (ETDEWEB)

    Maggard, Paul A.

    2013-11-14

    Semiconducting metal-oxides have remained of intense research interest owing to their potential for achieving efficient solar-driven photocatalytic reactions in aqueous solutions that occur as a result of their bandgap excitation. The photocatalytic reduction of water or carbon dioxide to generate hydrogen or hydrocarbon fuels, respectively, can be driven on p-type (photocathodic) electrodes with suitable band energies. However, metal-oxide semiconductors are typically difficult to dope as p-type with a high mobility of carriers. The supported research led to the discovery of new p-type Cu(I)-niobate and Cu(I)-tantalate film electrodes that can be prepared on FTO glass. New high-purity flux syntheses and the full structural determination of several Cu(I)-containing niobates and tantalates have been completed, as well as new investigations of their optical and photoelectrochemical properties and electronic structures via density-functional theory calculations. For example, CuNbO3, Cu5Ta11O30 and CuNb3O8 were prepared in high purity and their structures were characterized by both single-crystal and powder X-ray diffraction techniques. These two classes of Cu(I)-containing compounds exhibit optical bandgap sizes ranging from ~1.3 eV to ~2.6 eV. Photoelectrochemical measurements of these compounds show strong photon-driven cathodic currents that confirm the p-type semiconductor behavior of CuNbO3, CuNb3O8, and Cu5Ta11O30. Incident-photon-to-current efficiencies are measured that approach greater than ~1%. Electronic-structure calculations based on density functional theory reveal the visible-light absorption stems from a nearly-direct bandgap transition involving a copper-to-niobium or tantalum (d10 to d0) charge-transfer excitations.

  12. Stretchable Multichannel Electromyography Sensor Array Covering Large Area for Controlling Home Electronics with Distinguishable Signals from Multiple Muscles.

    Science.gov (United States)

    Kim, Namyun; Lim, Taehoon; Song, Kwangsun; Yang, Sung; Lee, Jongho

    2016-08-17

    Physiological signals provide important information for biomedical applications and, more recently, in the form of wearable electronics for active interactions between bodies and external environments. Multiple physiological sensors are often required to map distinct signals from multiple points over large areas for more diverse applications. In this paper, we present a reusable, multichannel, surface electromyography (EMG) sensor array that covers multiple muscles over relatively large areas, with compliant designs that provide different levels of stiffness for repetitive uses, without backing layers. Mechanical and electrical characteristics along with distinct measurements from different muscles demonstrate the feasibility of the concept. The results should be useful to actively control devices in the environment with one array of wearable sensors, as demonstrated with home electronics.

  13. Hybrid gate dielectric materials for unconventional electronic circuitry.

    Science.gov (United States)

    Ha, Young-Geun; Everaerts, Ken; Hersam, Mark C; Marks, Tobin J

    2014-04-15

    Recent advances in semiconductor performance made possible by organic π-electron molecules, carbon-based nanomaterials, and metal oxides have been a central scientific and technological research focus over the past decade in the quest for flexible and transparent electronic products. However, advances in semiconductor materials require corresponding advances in compatible gate dielectric materials, which must exhibit excellent electrical properties such as large capacitance, high breakdown strength, low leakage current density, and mechanical flexibility on arbitrary substrates. Historically, conventional silicon dioxide (SiO2) has dominated electronics as the preferred gate dielectric material in complementary metal oxide semiconductor (CMOS) integrated transistor circuitry. However, it does not satisfy many of the performance requirements for the aforementioned semiconductors due to its relatively low dielectric constant and intransigent processability. High-k inorganics such as hafnium dioxide (HfO2) or zirconium dioxide (ZrO2) offer some increases in performance, but scientists have great difficulty depositing these materials as smooth films at temperatures compatible with flexible plastic substrates. While various organic polymers are accessible via chemical synthesis and readily form films from solution, they typically exhibit low capacitances, and the corresponding transistors operate at unacceptably high voltages. More recently, researchers have combined the favorable properties of high-k metal oxides and π-electron organics to form processable, structurally well-defined, and robust self-assembled multilayer nanodielectrics, which enable high-performance transistors with a wide variety of unconventional semiconductors. In this Account, we review recent advances in organic-inorganic hybrid gate dielectrics, fabricated by multilayer self-assembly, and their remarkable synergy with unconventional semiconductors. We first discuss the principals and functional

  14. Gargamelle in the West Area - control room for the external electronic detectors

    CERN Multimedia

    1977-01-01

    Four electronic detectors complementing Gargamelle were installed in 1977, among them the external muon identifier (EMI), consisting of two arrays of multiwire proportional chambers separated by an iron wall (see Annual Report 1977 p. 84). The photo shows the control room close to the West Gargamelle Hall (Bld. 185).

  15. EDITORIAL: Synaptic electronics Synaptic electronics

    Science.gov (United States)

    Demming, Anna; Gimzewski, James K.; Vuillaume, Dominique

    2013-09-01

    neuromorphic circuit composed of a nanoscale 1-kbit resistive random-access memory (RRAM) cross-point array of synapses and complementary metal-oxide-semiconductor (CMOS) neuron circuits [13]; a WO3-x-based nanoionics device from Masakazu Aono's group with a wide scale of reprogrammable memorization functions [14]; a new spike-timing dependent plasticity scheme based on a MOS transistor as a selector and a RRAM as a variable resistance device [15]; a new hybrid memristor-CMOS neuromorphic circuit [16]; and a photo-assisted atomic switch [17]. Synaptic electronics evidently has many emerging facets, and Duygu Kuzum, Shimeng Yu, and H-S Philip Wong in the US provide a review of the field, including the materials, devices and applications [18]. In embracing the expertise acquired over thousands of years of evolution, biomimetics and bio-inspired design is a common, smart approach to technological innovation. Yet in successfully mimicking the physiological mechanisms of the human mind synaptic electronics research has a potential impact that is arguably unprecedented. That the quirks and eccentricities recently unearthed in the behaviour of nanomaterials should lend themselves so accommodatingly to emulating synaptic functions promises some very exciting developments in the field, as the articles in this special issue emphasize. References [1] von Neumann J (ed) 2012 The Computer and the Brain 3rd edn (Yale: Yale University Press) [2] Strukov D B, Snider G S, Stewart D R and Williams R S 2008 The missing memristor found Nature 453 80-3 [3] Chua L O 1971 Memristor—the missing circuit element IEEE Trans. Circuit Theory 18 507-19 [4] Chua L O 2013 Memristor, Hodgkin-Huxley, and Edge of Chaos Nanotechnology 24 383001 [5] Pickett M D and Williams R S 2013 Phase transitions enable computational universality in neuristor-based cellular automata Nanotechnology 24 384002 [6] Cruz-Albrecht J M, Derosier T and Srinivasa N 2013 Scalable neural chip with synaptic electronics using CMOS

  16. Flexible and printable paper-based strain sensors for wearable and large-area green electronics

    Science.gov (United States)

    Liao, Xinqin; Zhang, Zheng; Liao, Qingliang; Liang, Qijie; Ou, Yang; Xu, Minxuan; Li, Minghua; Zhang, Guangjie; Zhang, Yue

    2016-06-01

    Paper-based (PB) green electronics is an emerging and potentially game-changing technology due to ease of recycling/disposal, the economics of manufacture and the applicability to flexible electronics. Herein, new-type printable PB strain sensors (PPBSSs) from graphite glue (graphite powder and methylcellulose) have been fabricated. The graphite glue is exposed to thermal annealing to produce surface micro/nano cracks, which are very sensitive to compressive or tensile strain. The devices exhibit a gauge factor of 804.9, response time of 19.6 ms and strain resolution of 0.038%, all performance indicators attaining and even surpassing most of the recently reported strain sensors. Due to the distinctive sensing properties, flexibility and robustness, the PPBSSs are suitable for monitoring of diverse conditions such as structural strain, vibrational motion, human muscular movements and visual control.Paper-based (PB) green electronics is an emerging and potentially game-changing technology due to ease of recycling/disposal, the economics of manufacture and the applicability to flexible electronics. Herein, new-type printable PB strain sensors (PPBSSs) from graphite glue (graphite powder and methylcellulose) have been fabricated. The graphite glue is exposed to thermal annealing to produce surface micro/nano cracks, which are very sensitive to compressive or tensile strain. The devices exhibit a gauge factor of 804.9, response time of 19.6 ms and strain resolution of 0.038%, all performance indicators attaining and even surpassing most of the recently reported strain sensors. Due to the distinctive sensing properties, flexibility and robustness, the PPBSSs are suitable for monitoring of diverse conditions such as structural strain, vibrational motion, human muscular movements and visual control. Electronic supplementary information (ESI) available. See DOI: 10.1039/c6nr02172g

  17. Macroscopic and high-throughput printing of aligned nanostructured polymer semiconductors for MHz large-area electronics

    Science.gov (United States)

    Bucella, Sadir G.; Luzio, Alessandro; Gann, Eliot; Thomsen, Lars; McNeill, Christopher R.; Pace, Giuseppina; Perinot, Andrea; Chen, Zhihua; Facchetti, Antonio; Caironi, Mario

    2015-09-01

    High-mobility semiconducting polymers offer the opportunity to develop flexible and large-area electronics for several applications, including wearable, portable and distributed sensors, monitoring and actuating devices. An enabler of this technology is a scalable printing process achieving uniform electrical performances over large area. As opposed to the deposition of highly crystalline films, orientational alignment of polymer chains, albeit commonly achieved by non-scalable/slow bulk alignment schemes, is a more robust approach towards large-area electronics. By combining pre-aggregating solvents for formulating the semiconductor and by adopting a room temperature wired bar-coating technique, here we demonstrate the fast deposition of submonolayers and nanostructured films of a model electron-transporting polymer. Our approach enables directional self-assembling of polymer chains exhibiting large transport anisotropy and a mobility up to 6.4 cm2 V-1 s-1, allowing very simple device architectures to operate at 3.3 MHz. Thus, the proposed deposition strategy is exceptionally promising for mass manufacturing of high-performance polymer circuits.

  18. Cost-effective clinical uses of wide-area networks: electronic mail as telemedicine.

    Science.gov (United States)

    Worth, E. R.; Patrick, T. B.; Klimczak, J. C.; Reid, J. C.

    1995-01-01

    Electronic mail (E-mail) is widely used as a means of communication in the medical community. E-mail is clearly inexpensive when compared to two-way, fully interactive, real-time, video telemedicine. By content analysis of 200 consecutive messages, we show E-mail to be a low-cost use of computer networks, supporting a wide range of physician decision-making. PMID:8563405

  19. Application of backscatter electrons for large area imaging of cavities produced by neutron irradiation

    Science.gov (United States)

    Pastukhov, V. I.; Averin, S. A.; Panchenko, V. L.; Portnykh, I. A.; Freyer, P. D.; Giannuzzi, L. A.; Garner, F. A.

    2016-11-01

    It is shown that with proper optimization, backscattered electrons in a scanning electron microscope can produce images of cavity distribution in austenitic steels over a large specimen surface for a depth of ∼500-700 nm, eliminating the need for electropolishing or multiple specimen production. This technique is especially useful for quantifying cavity structures when the specimen is known or suspected to contain very heterogeneous distributions of cavities. Examples are shown for cold-worked EK-164, a very heterogeneously-swelling Russian fast reactor fuel cladding steel and also for AISI 304, a homogeneously-swelling Western steel used for major structural components of light water cooled reactors. This non-destructive overview method of quantifying cavity distribution can be used to direct the location and number of required focused ion beam prepared transmission electron microscopy specimens for examination of either neutron or ion-irradiated specimens. This technique can also be applied in stereo mode to quantify the depth dependence of cavity distributions.

  20. Design and Analysis of CMOS-Compatible III-V Compound Electron-Hole Bilayer Tunneling Field-Effect Transistor for Ultra-Low-Power Applications.

    Science.gov (United States)

    Kim, Sung Yoon; Seo, Jae Hwa; Yoon, Young Jun; Lee, Ho-Young; Lee, Seong Min; Cho, Seongjae; Kang, In Man

    2015-10-01

    In this work, we design and analyze complementary metal-oxide-semiconductor (CMOS)-compatible III-V compound electron-hole bilayer (EHB) tunneling field-effect transistors (TFETs) by using two-dimensional (2D) technology computer-aided design (TCAD) simulations. A recently proposed EHB TFET exploits a bias-induced band-to-band tunneling (BTBT) across the electron-hole bilayer by an electric field from the top and bottom gates. This is in contrast to conventional planar p(+)-p(-)-n TFETs, which utilize BTBT across the source-to-channel junction. We applied III-V compound semiconductor materials to the EHB TFETs in order to enhance the current drivability and switching performance. Devices based on various compound semiconductor materials have been designed and analyzed in terms of their primary DC characteristics. In addition, the operational principles were validated by close examination of the electron concentrations and energy-band diagrams under various operation conditions. The simulation results of the optimally designed In0.533Ga0.47As EHB TFET show outstanding performance, with an on-state current (Ion) of 249.5 μA/μm, subthreshold swing (S) of 11.4 mV/dec, and threshold voltage (Vth) of 50 mV at VDS = 0.5 V. Based on the DC-optimized InGaAs EHB TFET, the CMOS inverter circuit was simulated in views of static and dynamic behaviors of the p-channel device with exchanges between top and bottom gates or between source and drain electrodes maintaining the device structure.

  1. Water soluble nano-scale transient material germanium oxide for zero toxic waste based environmentally benign nano-manufacturing

    Science.gov (United States)

    Almuslem, A. S.; Hanna, A. N.; Yapici, T.; Wehbe, N.; Diallo, E. M.; Kutbee, A. T.; Bahabry, R. R.; Hussain, M. M.

    2017-02-01

    In the recent past, with the advent of transient electronics for mostly implantable and secured electronic applications, the whole field effect transistor structure has been dissolved in a variety of chemicals. Here, we show simple water soluble nano-scale (sub-10 nm) germanium oxide (GeO2) as the dissolvable component to remove the functional structures of metal oxide semiconductor devices and then reuse the expensive germanium substrate again for functional device fabrication. This way, in addition to transiency, we also show an environmentally friendly manufacturing process for a complementary metal oxide semiconductor (CMOS) technology. Every year, trillions of complementary metal oxide semiconductor (CMOS) electronics are manufactured and billions are disposed, which extend the harmful impact to our environment. Therefore, this is a key study to show a pragmatic approach for water soluble high performance electronics for environmentally friendly manufacturing and bioresorbable electronic applications.

  2. Water soluble nano-scale transient material germanium oxide for zero toxic waste based environmentally benign nano-manufacturing

    KAUST Repository

    Almuslem, A. S.

    2017-02-14

    In the recent past, with the advent of transient electronics for mostly implantable and secured electronic applications, the whole field effect transistor structure has been dissolved in a variety of chemicals. Here, we show simple water soluble nano-scale (sub-10 nm) germanium oxide (GeO) as the dissolvable component to remove the functional structures of metal oxide semiconductor devices and then reuse the expensive germanium substrate again for functional device fabrication. This way, in addition to transiency, we also show an environmentally friendly manufacturing process for a complementary metal oxide semiconductor (CMOS) technology. Every year, trillions of complementary metal oxide semiconductor (CMOS) electronics are manufactured and billions are disposed, which extend the harmful impact to our environment. Therefore, this is a key study to show a pragmatic approach for water soluble high performance electronics for environmentally friendly manufacturing and bioresorbable electronic applications.

  3. Electron tunneling through alkanedithiol self-assembled monolayers in large-area molecular junctions

    NARCIS (Netherlands)

    Akkerman, Hylke B.; Naber, Ronald C. G.; Jongbloed, Bert; van Hal, Paul A.; Blom, Paul W. M.; de Leeuw, Dago M.; de Boer, Bert

    2007-01-01

    The electrical transport through self-assembled monolayers of alkanedithiols was studied in large-area molecular junctions and described by the Simmons model [Simmons JIG (1963) J Appi Phys 34:1793-1803 and 2581-2590] for tunneling through a practical barrier, i.e., a rectangular barrier with the im

  4. Optimization of the electron collection efficiency of a large area MCP-PMT for the JUNO experiment

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Lin, E-mail: chenlin@opt.cn [State Key Laboratory of Transient Optics and Photonics, Xi’an Institute of Optics and Precision Mechanics (XIOPM), Chinese Academy of Sciences (CAS), Xi’an 710119 (China); Graduate School of Chinese Academy of Sciences (CAS), Beijing 100049 (China); Xi’an Jiaotong University, Xi’an 710049 (China); Tian, Jinshou [Graduate School of Chinese Academy of Sciences (CAS), Beijing 100049 (China); Liu, Chunliang [Xi’an Jiaotong University, Xi’an 710049 (China); Wang, Yifang; Zhao, Tianchi [Institute of High Energy Physics (IHEP) of CAS, Beijing 100049 (China); Liu, Hulin; Wei, Yonglin; Sai, Xiaofeng [Graduate School of Chinese Academy of Sciences (CAS), Beijing 100049 (China); Chen, Ping [State Key Laboratory of Transient Optics and Photonics, Xi’an Institute of Optics and Precision Mechanics (XIOPM), Chinese Academy of Sciences (CAS), Xi’an 710119 (China); Graduate School of Chinese Academy of Sciences (CAS), Beijing 100049 (China); Wang, Xing; Lu, Yu [Graduate School of Chinese Academy of Sciences (CAS), Beijing 100049 (China); Hui, Dandan; Guo, Lehui [State Key Laboratory of Transient Optics and Photonics, Xi’an Institute of Optics and Precision Mechanics (XIOPM), Chinese Academy of Sciences (CAS), Xi’an 710119 (China); Graduate School of Chinese Academy of Sciences (CAS), Beijing 100049 (China); Liu, Shulin; Qian, Sen; Xia, Jingkai; Yan, Baojun; Zhu, Na [Institute of High Energy Physics (IHEP) of CAS, Beijing 100049 (China); Sun, Jianning; Si, Shuguang [North Night Vision Technology (NNVT) CO., LTD, Nanjing 210110 (China); and others

    2016-08-11

    A novel large-area (20-inch) photomultiplier tube based on microchannel plate (MCP-PMTs) is proposed for the Jiangmen Underground Neutrino Observatory (JUNO) experiment. Its photoelectron collection efficiency C{sub e} is limited by the MCP open area fraction (A{sub open}). This efficiency is studied as a function of the angular (θ), energy (E) distributions of electrons in the input charge cloud and the potential difference (U) between the PMT photocathode and the MCP input surface, considering secondary electron emission from the MCP input electrode. In CST Studio Suite, Finite Integral Technique and Monte Carlo method are combined to investigate the dependence of C{sub e} on θ, E and U. Results predict that C{sub e} can exceed A{sub open}, and are applied to optimize the structure and operational parameters of the 20-inch MCP-PMT prototype. C{sub e} of the optimized MCP-PMT is expected to reach 81.2%. Finally, the reduction of the penetration depth of the MCP input electrode layer and the deposition of a high secondary electron yield material on the MCP are proposed to further optimize C{sub e}.

  5. Electronics and readout of a large area silicon detector for LHC

    Energy Technology Data Exchange (ETDEWEB)

    Borer, K.; Munday, D.J.; Parker, M.A.; Anghinolfi, F.; Aspell, P.; Campbell, M.; Chilingarov, A.; Jarron, P.; Heijne, E.H.M.; Santiard, J.C.; Scampoli, P.; Verweij, H.; Goessling, C.; Lisowski, B.; Reichold, A.; Spiwoks, R.; Tsesmelis, E.; Benslama, K.; Bonino, R.; Clark, A.G.; Couyoumtzelis, C.; Kambara, H.; Wu, X.; Fretwurst, E.; Lindstroem, G.; Schultz, T.; Bardos, R.A.; Gorfine, G.W.; Moorhead, G.F.; Taylor, G.N.; Tovey, S.N.; Bibby, J.H.; Hawkings, R.J.; Kundu, N.; Weidberg, A.; Campbell, D.; Murray, P.; Seller, P.; Teiger, J. (Univ. of Bern (Switzerland) Cavendish Lab., Univ. of Cambridge (United Kingdom) CERN, Geneva (Switzerland) Inst. fuer Physik, Univ. Dortmund (Germany) DPNC, Geneva Univ. (Switzerland) 1. Inst. fur Experimentalphysik, Hamburg (Germany) School of Physics, Univ. of Melbourne, Parkville, VIC (Australia) Dept. of Nuclear Physics, Oxford Univ. (United Kingdom) Rutherford Appleton Lab., Chilton, Didcot (United Kingdom) Centre d' Etudes Nucleaires de Saclay, 91 Gif

    1994-04-21

    The purpose of the RD2 project is to evaluate the feasibility of a silicon tracker and/or preshower detector for LHC. Irradiation studies with doses equivalent to those expected at LHC have been performed to determine the behavior of operational parameters such as leakage current, depletion voltage and charge collection during the life of the detector. The development of fast, dense, low power and low cost signal processing electronics is one of the major activities of the collaboration. We describe the first fully functional integrated analog memory chip with asynchronous read and write operations and level 1 trigger capture capabilities. A complete test beam system using this analog memory chip at 66 MHz has been successfully operated with RD2 prototype silicon detectors during various test runs. The flexibility of the electronics and readout have allowed us to easily interface our set-up to other data acquisition systems. Mechanical studies are in progress to design a silicon tracking detector with several million channels that may be operated at low (0-10 C) temperature, while maintaining the required geometrical precision. Prototype readout boards for such a detector are being developed and simulation studies are being performed to optimize the readout architecture. (orig.)

  6. Electronics and readout of a large area silicon detector for LHC

    Science.gov (United States)

    Borer, K.; Munday, D. J.; Parker, M. A.; Anghinolfi, F.; Aspell, P.; Campbell, M.; Chilingarov, A.; Jarron, P.; Heijne, E. H. M.; Santiard, J. C.; Scampoli, P.; Verweij, H.; Gössling, C.; Lisowski, B.; Reichold, A.; Spiwoks, R.; Tsesmelis, E.; Benslama, K.; Bonino, R.; Clark, A. G.; Couyoumtzelis, C.; Kambara, H.; Wu, X.; Fretwurst, E.; Lindstroem, G.; Schultz, T.; Bardos, R. A.; Gorfine, G. W.; Moorhead, G. F.; Taylor, G. N.; Tovey, S. N.; Bibby, J. H.; Hawkings, R. J.; Kundu, N.; Weidberg, A.; Campbell, D.; Murray, P.; Seller, P.; Teiger, J.

    1994-04-01

    The purpose of the RD2 project is to evaluate the feasibility of a silicon tracker and/or preshower detector for LHC. Irradiation studies with doses equivalent to those expected at LHC have been performed to determine the behavior of operational parameters such as leakage current, depletion voltage and charge collection during the life of the detector. The development of fast, dense, low power and low cost signal processing electronics is one of the major activities of the collaboration. We describe the first fully functional integrated analog memory chip with asynchronous read and write operations and level 1 trigger capture capabilities. A complete test beam system using this analog memory chip at 66 MHz has been successfully operated with RD2 prototype silicon detectors during various test runs. The flexibility of the electronics and readout have allowed us to easily interface our set-up to other data acquistion systems. Mechanical studies are in progress to design a silicon tracking detector with several million channels that may be operated at low (0-10°C) temperature, while maintaining the required geometrical precision. Prototype readout boards for such a detector are being developed and simulation studies are being performed to optimize the readout architecture.

  7. The study of a new PARRNe experimental area using an electron linac close to the Orsay tandem

    CERN Document Server

    Essabaa, S; Ausset, P; Baronick, J P; Bergot, J P; Boulot, A; Clapier, F; Coacolo, J L; Curaudeau, J M; Dupont, F; Galès, Sydney; Gardès, D; Grialou, D; Ibrahim, F; Junquera, T; Kandry-Rody, S; Lefort, H; Le Scornet, J C; Lesrel, J; M'Garrech, S; Müller, A C; Rouvière, N; Tkatchenko, A; Waast, B; Rinolfi, Louis; Rossat, G; Bienvenu, G; Bourdon, J C; Garvey, Terence; Jacquemard, B; Omeich, M

    2002-01-01

    The Production of neutron-rich radioactive nuclei through fission is currently prime of research interest for the future radioactive beam facilities. For example in the EURISOL[1] project, photo-fission and fast neutron induced fission are proposed. The photo-fission cross-section for 238U is about 0.16 barn (against 1.6 barn for fast neutrons of 40 MeV) but the conversion electrons/gammas is much more efficient than that of deuterons/neutrons. It was necessary, to test this new method of production, to carry out, in equivalent conditions, an experiment of the type PARRNe-1 using a 50 MeV electron beam. In April 2001, production of fission fragments induced by gammas proved to be successful. Bremsstrahlung gamma rays were produced by the few nA-50 MeV electron beam delivered by the CERN LEP Injector Linac (LIL). This promising alternative has stimulated the study of a new experimental area at IPNO based on an electron Linac close to the Tandem, through a collaboration with LAL and CERN PS groups.

  8. Large area mold fabrication for the nanoimprint lithography using electron beam lithography

    Institute of Scientific and Technical Information of China (English)

    2010-01-01

    The mold fabrication is a critical issue for the development of nanoimprint lithography as an effective low-cost and mass production process.This paper describes the fabrication process developed to fabricate the large area nanoimprint molds on the silicon wafers.The optimization of e-beam exposure dose and pattern design is presented.The overlayer process is developed to improve the field stitching accuracy of e-beam exposure,and around 10 nm field stitching accuracy is obtained.By means of the optimization of the e-beam exposure dose,pattern design and overlayer process,large area nanoimprint molds having dense line structures with around 10 nm field stitching accuracy have been fabricated.The fabricated mold was used to imprint commercial imprinting resist.

  9. Laser-assisted reduction of graphene oxide for paper based large area flexible electronics

    Science.gov (United States)

    Balliu, E.; Andersson, H.; Engholm, M.; Forsberg, S.; Olin, H.

    2016-03-01

    In this work we present a promising method for fabrication of conductive tracks on paper based substrates by laser assisted reduction of Graphene Oxide (GO). Printed electronics on paper based substrates is be coming more popular due to lower cost and recyclability. Fabrication of conductive tracks is of great importance where metal, carbon and polymer inks are commonly used. An emerging option is reduced graphene oxide (r-GO), which can be a good conductor. Here we have evaluated reduction of GO by using a 532 nm laser source, showing promising results with a decrease of sheet resistance from >100 M Ω/Sqr for unreduced GO down to 126 Ω/Sqr. without any observable damage to the paper substrates.

  10. Electronic maps for terminal area navigation: effects of frame of reference and dimensionality.

    Science.gov (United States)

    Wickens, C D; Liang, C C; Prevett, T; Olmos, O

    1996-01-01

    Two experiments are reported that contrast rotating versus fixed electronic map displays, which pilots used for a simulated approach to a landing. In Experiment 1, a rotating versus fixed-map display was experimentally crossed with a two-dimensional (2D) versus three-dimensional (3D) view (perspective map) as pilots' ability to maintain the flight path and demonstrate awareness of the location of surrounding terrain features were assessed. Rotating displays supported better flight path guidance and did not substantially harm performance on terrain awareness tasks. 3D displays led to a substantial cost for vertical control but did not differ from 2D displays in lateral control. In Experiment 2, pilots flew with the rotating 2D display and with an improved version of the rotating 3D display, designed to reduce the ambiguity of representing altitude information. Vertical control improved as a result of the 3D display design improvement, but lateral control did not. The results are discussed in terms of the costs and benefits of presenting information in 3D, ego-referenced format for both flight path control and terrain awareness.

  11. Heavy metal contamination of surface soil in electronic waste dismantling area: site investigation and source-apportionment analysis.

    Science.gov (United States)

    Jinhui Li; Huabo Duan; Pixing Shi

    2011-07-01

    The dismantling and disposal of electronic waste (e-waste) in developing countries is causing increasing concern because of its impacts on the environment and risks to human health. Heavy-metal concentrations in the surface soils of Guiyu (Guangdong Province, China) were monitored to determine the status of heavy-metal contamination on e-waste dismantling area with a more than 20 years history. Two metalloids and nine metals were selected for investigation. This paper also attempts to compare the data among a variety of e-waste dismantling areas, after reviewing a number of heavy-metal contamination-related studies in such areas in China over the past decade. In addition, source apportionment of heavy metal in the surface soil of these areas has been analysed. Both the MSW open-burning sites probably contained invaluable e-waste and abandoned sites formerly involved in informal recycling activities are the new sources of soil-based environmental pollution in Guiyu. Although printed circuit board waste is thought to be the main source of heavy-metal emissions during e-waste processing, requirement is necessary to soundly manage the plastic separated from e-waste, which mostly contains heavy metals and other toxic substances.

  12. Comeback of epitaxial graphene for electronics: large-area growth of bilayer-free graphene on SiC

    Science.gov (United States)

    Kruskopf, Mattias; Momeni Pakdehi, Davood; Pierz, Klaus; Wundrack, Stefan; Stosch, Rainer; Dziomba, Thorsten; Götz, Martin; Baringhaus, Jens; Aprojanz, Johannes; Tegenkamp, Christoph; Lidzba, Jakob; Seyller, Thomas; Hohls, Frank; Ahlers, Franz J.; Schumacher, Hans W.

    2016-12-01

    We present a new fabrication method for epitaxial graphene on SiC which enables the growth of ultra-smooth defect- and bilayer-free graphene sheets with an unprecedented reproducibility, a necessary prerequisite for wafer-scale fabrication of high quality graphene-based electronic devices. The inherent but unfavorable formation of high SiC surface terrace steps during high temperature sublimation growth is suppressed by rapid formation of the graphene buffer layer which stabilizes the SiC surface. The enhanced nucleation is enforced by decomposition of deposited polymer adsorbate which acts as a carbon source. Unique to this method are the conservation of mainly 0.25 and 0.5 nm high surface steps and the formation of bilayer-free graphene on an area only limited by the size of the sample. This makes the polymer-assisted sublimation growth technique a promising method for commercial wafer scale epitaxial graphene fabrication. The extraordinary electronic quality is evidenced by quantum resistance metrology at 4.2 K showing ultra-high precision and high electron mobility on mm scale devices comparable to state-of-the-art graphene.

  13. Comparison of junctionless and inversion-mode p-type metal-oxide-semiconductor field-effect transistors in presence of hole-phonon interactions

    Energy Technology Data Exchange (ETDEWEB)

    Dib, E., E-mail: elias.dib@for.unipi.it [Dipartimento di Ingegneria dell' Informazione, Università di Pisa, 56122 Pisa (Italy); Carrillo-Nuñez, H. [Integrated Systems Laboratory ETH Zürich, Gloriastrasse 35, 8092 Zürich (Switzerland); Cavassilas, N.; Bescond, M. [IM2NP, UMR CNRS 6242, Bât. IRPHE, Technopôle de Château-Gombert, 13384 Marseille Cedex 13 (France)

    2016-01-28

    Junctionless transistors are being considered as one of the alternatives to conventional metal-oxide field-effect transistors. In this work, it is then presented a simulation study of silicon double-gated p-type junctionless transistors compared with its inversion-mode counterpart. The quantum transport problem is solved within the non-equilibrium Green's function formalism, whereas hole-phonon interactions are tackled by means of the self-consistent Born approximation. Our findings show that junctionless transistors should perform as good as a conventional transistor only for ultra-thin channels, with the disadvantage of requiring higher supply voltages in thicker channel configurations.

  14. Electrical properties of Ge metal-oxide-semiconductor capacitors with high-k La2O3 gate dielectric incorporated by N or/and Ti

    Science.gov (United States)

    Huoxi, Xu; Jingping, Xu

    2016-06-01

    LaON, LaTiO and LaTiON films are deposited as gate dielectrics by incorporating N or/and Ti into La2O3 using the sputtering method to fabricate Ge MOS capacitors, and the electrical properties of the devices are carefully examined. LaON/Ge capacitors exhibit the best interface quality, gate leakage property and device reliability, but a smaller k value (14.9). LaTiO/Ge capacitors exhibit a higher k value (22.7), but a deteriorated interface quality, gate leakage property and device reliability. LaTiON/Ge capacitors exhibit the highest k value (24.6), and a relatively better interface quality (3.1 × 1011 eV-1 cm-2), gate leakage property (3.6 × 10-3 A/cm2 at V g = 1 V + V fb) and device reliability. Therefore, LaTiON is more suitable for high performance Ge MOS devices as a gate dielectric than LaON and LaTiO materials. Project supported by the National Natural Science Foundation of China (No. 61274112), the Natural Science Foundation of Hubei Province (No. 2011CDB165), and the Scientific Research Program of Huanggang Normal University (No. 2012028803).

  15. A New Structure of Silicon-on-Insulator Metal-Oxide-Semiconductor Field Effect Transistor to Suppress the Floating Body Effect

    Institute of Scientific and Technical Information of China (English)

    朱鸣; 林青; 张正选; 林成鲁

    2003-01-01

    Considering that the silicon-on-insulator (SOI) devices have an inherent floating body effect, which may cause substantial influences in the performance of SOI device and circuit, we propose a novel device structure to suppress the floating body effect. In the new structure there is a buried p+ region under the n+ source and that region is extended to outside of the source, and this additional p+ region provides a path for accumulated holes to flow out of the body. Numerical simulations were carried out with Medici, and the output characteristics and gate characteristics were compared with those of conventional SOI counterparts. The simulated results show the suppression of floating body effect in the novel SOI device as expected.

  16. A hybrid magnetic/complementary metal oxide semiconductor process design kit for the design of low-power non-volatile logic circuits

    Science.gov (United States)

    Di Pendina, G.; Prenat, G.; Dieny, B.; Torki, K.

    2012-04-01

    Since the advent of the MOS transistor, the performance of microelectronic circuits has followed Moore's law, stating that their speed and density would double every 18 months. Today, this trend tends to get out of breath: the continuously decreasing size of devices and increasing operation frequency result in power consumption and heating issues. Among the solutions investigated to circumvent these limitations, the use of non-volatile devices appears particularly promising. It allows easing, for example, the power gating technique, which consists in cutting-off the power supply of inactive blocks without losing information, drastically reducing the standby power consumption. In this approach, the advantages of magnetic tunnel junctions (MTJs) compared with other non-volatile devices allow one to design hybrid CMOS/magnetic circuits with high performance and new functionalities. Designing such circuits requires integrating MTJs in standard microelectronics design suites. This is performed by means of a process design kit (PDK) for the hybrid CMOS/magnetic technology. We present here a full magnetic PDK, which contains a compact model of the MTJ for electrical simulation, technology files for layout and physical verifications, and standard cells for the design of complex logic circuits and which is compatible with standard design suites. This PDK allows designers to accurately and comfortably design high-performance hybrid CMOS/magnetic logic circuits in the same way as standard CMOS circuits.

  17. A third-order complementary metal-oxide-semiconductor sigma-delta modulator operating between 4.2 K and 300 K

    Science.gov (United States)

    Okcan, Burak; Gielen, Georges; Van Hoof, Chris

    2012-02-01

    This paper presents a third-order switched-capacitor sigma-delta modulator implemented in a standard 0.35-μm CMOS process. It operates from 300 K down to 4.2 K, achieving 70.8 dB signal-to-noise-plus-distortion ratio (SNDR) in a signal bandwidth of 5 kHz with a sampling frequency of 500 kHz at 300 K. The modulator utilizes an operational transconductance amplifier in its loop filter, whose architecture has been optimized in order to eliminate the cryogenic anomalies below the freeze-out temperature. At 4.2 K, the modulator achieves 67.7 dB SNDR consuming 21.17 μA current from a 3.3 V supply.

  18. Si{sub 1-x}Ge{sub x} metal-oxide-semiconductor capacitors with HfTaO{sub x} gate dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Mallik, S., E-mail: sandi.iitkgp@gmail.com [Dept. of Electronics and ECE, Indian Institute of Technology, Kharagpur 721302 (India); Mahata, C.; Hota, M.K. [Dept. of Electronics and ECE, Indian Institute of Technology, Kharagpur 721302 (India); Sarkar, C.K. [Dept. of Electronics and Telecommunication Engineering, Jadavpur University, Jadavpur, Kolkata 700032 (India); Maiti, C.K. [Dept. of Electronics and ECE, Indian Institute of Technology, Kharagpur 721302 (India)

    2011-10-31

    Interfacial reactions and electrical properties of RF sputter deposited HfTaO{sub x} high-k gate dielectric films on Si{sub 1-x}Ge{sub x} (x = 19%) are investigated. X-ray photoelectron spectroscopic analyses indicate an interfacial layer containing GeO{sub x}, Hf silicate, SiO{sub x} (layer of Hf-Si-Ge-O) formation during deposition of HfTaO{sub x}. No evidence of Ta-silicate or Ta incorporation was found at the interface. The crystallization temperature of HfTaO{sub x} film is found to increase significantly after annealing beyond 500 deg. C (for 5 min) along with the incorporation of Ta. HfTaO{sub x} films (with 18% Ta) remain amorphous up to about 500 deg. C anneal. Electrical characterization of post deposition annealed (in oxygen at 600 deg. C) samples showed; capacitance equivalent thickness of {approx} 4.3-5.7 nm, hysteresis of 0.5-0.8 V, and interface state density = 1.2-3.8 x 10{sup 12} cm{sup -2} eV{sup -1}. The valence and conduction band offsets were determined from X-ray photoelectron spectroscopy spectra after careful analyses of the experimental data and removal of binding energy shift induced by differential charging phenomena occurring during X-ray photoelectron spectroscopic measurements. The valence and conduction band offsets were found to be 2.45 {+-} 0.05 and 2.31 {+-} 0.05 eV, respectively, and a band gap of 5.8 {+-} 05 eV was found for annealed samples.

  19. Estimation of mean-glandular dose from monitoring breast entrance skin air kerma using a high sensitivity metal oxide semiconductor field effect transistor (MOSFET) dosimeter system in mammography.

    Science.gov (United States)

    Dong, S L; Chu, T C; Lee, J S; Lan, G Y; Wu, T H; Yeh, Y H; Hwang, J J

    2002-12-01

    Estimation of mean-glandular dose (MGD) has been investigated in recent years due to the potential risks of radiation-induced carcinogenesis associated with the mammographic examination for diagnostic radiology. In this study, a new technique for immediate readout of breast entrance skin air kerma (BESAK) using high sensitivity MOSFET dosimeter after mammographic projection was introduced and a formula for the prediction of tube output with exposure records was developed. A series of appropriate conversion factors was applied to the MGD determination from the BESAK. The study results showed that signal response of the high sensitivity MOSFET exhibited excellent linearity within mammographic dose ranges, and that the energy dependence was less than 3% for each anode/filter combination at the tube potentials 25-30 kV. Good agreement was observed between the BESAK and the tube exposure output measurement for breasts thicker than 30 mm. In addition, the air kerma estimated from our prediction formula provided sufficient accuracy for thinner breasts. The average MGD from 120 Asian females was 1.5 mGy, comparable to other studies. Our results suggest that the high sensitivity MOSFET dosimeter system is a good candidate for immediately readout of BESAK after mammographic procedures.

  20. Work function tuning of plasma-enhanced atomic layer deposited WC{sub x}N{sub y} electrodes for metal/oxide/semiconductor devices

    Energy Technology Data Exchange (ETDEWEB)

    Zonensain, Oren; Fadida, Sivan; Eizenberg, Moshe [Department of Materials Science and Engineering, Technion-Israel Institute of Technology, Haifa 32000 (Israel); Fisher, Ilanit; Gao, Juwen; Chattopadhyay, Kaushik; Harm, Greg; Mountsier, Tom; Danek, Michal [Lam Research Corporation, 4000 N. First Street, San Jose, California 95134 (United States)

    2015-02-23

    One of the main challenges facing the integration of metals as gate electrodes in advanced MOS devices is control over the Fermi level position at the metal/dielectric interface. In this study, we demonstrate the ability to tune the effective work function (EWF) of W-based electrodes by process modifications of the atomic layer deposited (ALD) films. Tungsten carbo-nitrides (WC{sub x}N{sub y}) films were deposited via plasma-enhanced and/or thermal ALD processes using organometallic precursors. The process modifications enabled us to control the stoichiometry of the WC{sub x}N{sub y} films. Deposition in hydrogen plasma (without nitrogen based reactant) resulted in a stoichiometry of WC{sub 0.4} with primarily W-C chemical bonding, as determined by x-ray photoelectron spectroscopy. These films yielded a relatively low EWF of 4.2 ± 0.1 eV. The introduction of nitrogen based reactant to the plasma or the thermal ALD deposition resulted in a stoichiometry of WC{sub 0.1}N{sub 0.6–0.8} with predominantly W-N chemical bonding. These films produced a high EWF of 4.7 ± 0.1 eV.

  1. A method for the assessment of oxide charge density and centroid in metal-oxide-semiconductor structures after uniform gate stress

    Science.gov (United States)

    Kies, R.; Egilsson, T.; Ghibaudo, G.; Pananakakis, G.

    1996-06-01

    A method for the extraction of the oxide charge density and distribution centroid based on the exploitation of the Fowler plot derivative characteristics is proposed. To this end, the modification of the tunnel transparency due to the presence of charge within the tunneling region is accounted for. Simple analytical formulas which enable the oxide charge density and centroid to be extracted from the maximum Fowler derivative and its electric field position are derived. The comparison with the DiMaria method confirms the overall consistency of the new approach. The impact of negative charge within the oxide on the apparent Fowler barrier height, which can be deduced from the slope of the Fowler plots after uniform gate stress is also analyzed. Finally, it is pointed out that this method permits the oxide trapping properties to be studied even though only one bias polarization can be utilized for the test structure.

  2. Channel length scaling and the impact of metal gate work function on the performance of double gate-metal oxide semiconductor field-effect transistors

    Indian Academy of Sciences (India)

    D Rechem; S Latreche; C Gontrand

    2009-03-01

    In this paper, we study the effects of short channel on double gate MOSFETs. We evaluate the variation of the threshold voltage, the subthreshold slope, the leakage current and the drain-induced barrier lowering when channel length CH decreases. Further- more, quantum effects on the performance of DG-MOSFETs are addressed and discussed. We also study the influence of metal gate work function on the performance of nanoscale MOSFETs. We use a self-consistent Poisson–Schrödinger solver in two dimensions over the entire device. A good agreement with numerical simulation results is obtained.

  3. Effect of atomic layer deposition growth temperature on the interfacial characteristics of HfO{sub 2}/p-GaAs metal-oxide-semiconductor capacitors

    Energy Technology Data Exchange (ETDEWEB)

    Liu, C.; Zhang, Y. M.; Zhang, Y. M.; Lv, H. L., E-mail: hllv@mail.xidian.edu.cn [School of Microelectronics, Xidian University and Key Laboratory of Wide Band-Gap Semiconductor Materials and Devices, Xi' an 710071 (China)

    2014-12-14

    The effect of atomic layer deposition (ALD) growth temperature on the interfacial characteristics of p-GaAs MOS capacitors with ALD HfO{sub 2} high-k dielectric using tetrakis(ethylmethyl)amino halfnium precursor is investigated in this study. Using the combination of capacitance-voltage (C-V) and X-ray photoelectron spectroscopy (XPS) measurements, ALD growth temperature is found to play a large role in controlling the reaction between interfacial oxides and precursor and ultimately determining the interface properties. The reduction of surface oxides is observed to be insignificant for ALD at 200 °C, while markedly pronounced for growth at 300 °C. The corresponding C-V characteristics are also shown to be ALD temperature dependent and match well with the XPS results. Thus, proper ALD process is crucial in optimizing the interface quality.

  4. Ultra-Low Power High Temperature and Radiation Hard Complementary Metal-Oxide-Semiconductor (CMOS) Silicon-on-Insulator (SOI) Voltage Reference

    OpenAIRE

    El Hafed Boufouss; Francis, Laurent A.; Valeriya Kilchytska; Pierre Gérard; Pascal Simon; Denis Flandre

    2013-01-01

    This paper presents an ultra-low power CMOS voltage reference circuit which is robust under biomedical extreme conditions, such as high temperature and high total ionized dose (TID) radiation. To achieve such performances, the voltage reference is designed in a suitable 130 nm Silicon-on-Insulator (SOI) industrial technology and is optimized to work in the subthreshold regime of the transistors. The design simulations have been performed over the temperature range of -40–200 °C and for differ...

  5. X-ray photoelectron spectroscopy and diffraction investigation of a metal-oxide-semiconductor heterostructure: Pt/Gd2O3/Si(111)

    Science.gov (United States)

    Ferrah, D.; El Kazzi, M.; Niu, G.; Botella, C.; Penuelas, J.; Robach, Y.; Louahadj, L.; Bachelet, R.; Largeau, L.; Saint-Girons, G.; Liu, Q.; Vilquin, B.; Grenet, G.

    2015-04-01

    Platinum thin films deposited by physical vapor deposition (PVD) on Gd2O3/Si(111) templates are investigated by X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), and X-ray photoelectron diffraction (XPD). Both XRD and XPD give clear evidence that Gd2O3 grows (111)-oriented and single-domain on Si(111) with mirror epitaxial relationship viz., [1bar10] Gd2O3(111)//[11bar0] Si(111). On Gd2O3/Si(111), Pt is partially crystallized with (111) orientation. There are two epitaxial domains and a slightly visible (111) fiber texture. The in-plane relationships of these Pt(111) domains with Gd2O3(111) are a direct one: [11bar0] Pt(111)//[11bar0] Gd2O3(111) and a mirror one: [1bar10] Pt(111)//[11bar0] Gd2O3(111). XPS reveals that Pt4f exhibits a metallic behavior even for small amounts of Pt but very small chemical shifts suggest that Pt environment is different at the interface with Gd2O3. These XPS chemical shifts have been correlated with features in XPD azimuth curves, which could be related with the existence of hexagonal α-PtO2(0001)layer.

  6. Self-Aligned, Extremely High Frequency III-V Metal-Oxide-Semiconductor Field-Effect Transistors on Rigid and Flexible Substrates

    Science.gov (United States)

    2012-06-29

    Goffman , M. F.; Bourgoin, J.-P. Appl. Phys. Lett. 2007, 90, 233108. (5) Nougaret, L.; Happy, H.; Dambrine, G.; Derycke, V.; Bourgoin, J.-P.; Green, A. A...Krishna, S.; Chueh, Y.-L.; Guo, J.; Javey, A. Nano Lett. 2012, 12, 2060−2066. (27) Chimot, N.; Derycke, V.; Goffman , M. F.; Bourgoin, J. P.; Happy, H

  7. A Novel Super-Junction Lateral Double-Diffused Metal-Oxide-Semiconductor Field Effect Transistor with n-Type Step Doping Buffer Layer

    Institute of Scientific and Technical Information of China (English)

    CHENG Jian-Bing; ZHANG Do; DUAN Bao-Xing; LI Zhao-Ji

    2008-01-01

    A novel super-junction lateral double-diffused metal-nxide-semiconductor field effect transistor(SJ-LDMOSFET)with n-type step doping buffer layer is proposed.The step doping buffer layer almost completely eliminates the substrate-assisted depletion effect.modulates lateral electric field and achieves nearly uniform surface field.On the other hand,the buffer layer also provides another conductive path and reduces on-state resistance.In short,the proposed LDMOSFET improves trade-off performance between breakdown voltage (BV)and specific on-state resistance Ron,sp.Compared with the conventional SJ-LDMOSFET,the simulation results indicate that the BV of the SSJ-LDMOSFET is increased from saturation voltage 121.7 V to 644.9 V;at the same time,the specific when the drift region length and the step number are taken as 48μm and 3,respectively.

  8. Study of the improvements in the electrical performance of solution-processed metal oxide thin-film transistors using self-assembled monolayers

    Science.gov (United States)

    Park, Jin-Woo; Kim, Hyungjoong; Kim, Dae Hwan; Lee, Mijung

    2014-10-01

    Thin-film transistors (TFTs) of a metal oxide semiconductor typically are transparent and have high mobility to be paid attention for back plane of displays. One of the most actively studied fabrication methods of metal oxide semiconductors is the solution processing (sol-gel) method, owing to its low-cost, simple and fast steps that ensure good product uniformity, and applicability to roll-to-roll processing. Our study focused on probing the electronic properties of solution-processed metal oxide TFTs. We have calculated the density of state (DOS) with monochromatic photonic capacitance-voltage (MPCV) measurements. Improvements in device are proved by electronic and photo-electronic methods.

  9. Effects of 6 MeV electron irradiation on the electrical properties and device parameters of Al/Al{sub 2}O{sub 3}/TiO{sub 2}/n-Si MOS capacitors

    Energy Technology Data Exchange (ETDEWEB)

    Laha, P.; Banerjee, I.; Barhai, P.K. [Department of Applied Physics, Birla Institute of Technology, Mesra, Ranchi 835215 (India); Das, A.K. [Laser and Plasma Technology Division, Bhabha Atomic Research Center, Mumbai 400085 (India); Bhoraskar, V.N. [Department of Physics, University of Pune, Ganeshkhind, Pune 411007 (India); Mahapatra, S.K., E-mail: skm@physics.ucla.edu [Department of Applied Physics, Birla Institute of Technology, Mesra, Ranchi 835215 (India)

    2012-07-15

    Highlights: Black-Right-Pointing-Pointer The electron irradiation effects make variation in the device parameters. Black-Right-Pointing-Pointer The device parameters changes due to percentage of defects and charge trapping. Black-Right-Pointing-Pointer Leakage current of Al/Al{sub 2}O{sub 3}/TiO{sub 2}/n-Si changes due to interface dangling bonds. Black-Right-Pointing-Pointer The leakage current mechanism of MOS structures is due to Poole-Frenkel effect. - Abstract: The effects of 6 MeV electron irradiation on the electrical properties and device parameter characteristics of Al/Al{sub 2}O{sub 3}/TiO{sub 2}/n-Si metal-oxide-semiconductor capacitors have been studied. Twelve Al/Al{sub 2}O{sub 3}/TiO{sub 2}/n-Si MOS capacitors were fabricated using r.f. magnetron sputtering and divided into four groups. The first group was not irradiated and treated as virgin. The rest were irradiated with 6 MeV electrons at doses 10, 20, and 30 kGy, maintaining the dose rate at {approx}1 kGy/min. Variations in crystallinity of the virgin and irradiated capacitors were studied using grazing incident X-ray diffraction. The thickness and in-depth elemental distributions of individual layers were determined using secondary ion mass apectrometry. Capacitance-voltage, conductance-voltage and leakage current-voltage characteristics of the virgin and irradiated samples were studied. The device parameters (flat band voltage, surface charge density and interface trap density of the virgin and irradiated structures) were determined. The electrical properties of the capacitors were investigated and the Poole-Frenkel coefficient of the capacitors was determined from leakage current measurements. The leakage current mechanism has been explained.

  10. Fabrication and characterization of gallium nitride electronic devices

    Science.gov (United States)

    Johnson, Jerry Wayne

    Gallium nitride (GaN)-based high electron mobility transistors (HEMTs), metal oxide semiconductor field effect transistors (MOSFETs), and Schottky rectifiers were fabricated and characterized. Novel dielectric materials Gd 2O3 and ScO were evaluated as potential gate dielectrics for GaN MOS applications. The devices presented herein show tremendous potential for elevated temperature, high frequency, and/or high voltage operation. AlGaN/GaN HEMTs were grown by MOCVD on sapphire and SiC substrates and by RF-MBE on sapphire substrates. Devices were fabricated with gate lengths from 100 nm to 1.2 mum. Drain current density approached 1 A/mm and extrinsic transconductance exceeded 200 mS/mm for small gate periphery devices. For the shortest gate length, a unity-gain cutoff frequency (fT) of 59 GHz and a maximum frequency of oscillation (fmax) of 90 GHz were extracted from measured scattering parameters. The experimental s-parameters were in excellent agreement with simulated results from small-signal linear modeling. Large signal characterization of 0.25 x 150 mum2 devices produced 2.75 W/mm at 3 GHz and 1.7 W/mm at 10 GHz. Devices fabricated on high thermal conductivity SiC substrates exhibited superior high temperature performance and a reduced density of threading dislocations. Novel gate dielectrics Gd2O3 and ScO were grown by gas source molecular beam epitaxy (GSMBE). Current-voltage (I-V) and capacitance-voltage (C-V) data were collected from MOS capacitors to evaluate the bulk and interfacial electrical properties of the insulators. Single crystal Gd2O 3 was demonstrated on GaN, but the resultant MOSFET exhibited a large gate leakage attributed to defects and dislocations in the oxide. MOSFETs with a stacked gate dielectric of Gd2O3/SiO2 were operational at a drain source bias of 80 V and a gate bias of +7 V. Bulk GaN templates grown by hydride vapor phase epitaxy (HYPE) were used to fabricate vertical geometry Schottky rectifiers. Size- and temperature

  11. Use of scalp hair as indicator of human exposure to heavy metals in an electronic waste recycling area.

    Science.gov (United States)

    Wang, Thanh; Fu, Jianjie; Wang, Yawei; Liao, Chunyang; Tao, Yongqing; Jiang, Guibin

    2009-01-01

    Scalp hair samples were collected at an electronic waste (e-waste) recycling area and analyzed for trace elements and heavy metals. Elevated levels were found for Cu and Pb with geometric means (GMs) at 39.8 and 49.5 microg/g, and the levels of all elements were found in the rank order Pb > Cu > Mn > Ba > Cr > Ni > Cd > As > V. Besides Cu and Pb, Cd (GM: 0.518 microg/g) was also found to be significantly higher compared to that in hair samples from control areas. Differences with age, gender, residence status and villages could be distinguished for most of the elements. The high levels of Cd, Cu and Pb were likely found to be originated from e-waste related activities, and specific sources were discussed. This study shows that human scalp hair could be a useful biomarker to assess the extent of heavy metal exposure to workers and residents in areas with intensive e-waste recycling activities.

  12. Gas chromatography/olfactometry and electronic nose analyses of retronasal aroma of espresso and correlation with sensory evaluation by an artificial neural network.

    Science.gov (United States)

    Michishita, Tomomi; Akiyama, Masayuki; Hirano, Yuta; Ikeda, Michio; Sagara, Yasuyuki; Araki, Tetsuya

    2010-01-01

    To develop a method for evaluating and designing the retronasal aroma of espresso, sensory evaluation data was correlated with data obtained from gas chromatography/olfactometry (GC/O, CharmAnalysis™) and from an electronic nose system αFOX4000 (E-nose). The volatile compounds of various kinds of espresso (arabica coffee beans from 6 production countries: Brazil, Ethiopia, Guatemala, Colombia, Indonesia, and Tanzania; 3 roasting degrees for each country: L values, 18, 23, and 26) were collected with a retronasal aroma simulator (RAS) and examined by GC/O and E-nose. In addition, sensory descriptive analysis using a 7-point scale for RAS effluent gas was performed by 5 trained flavorists using sensory descriptors selected based on the frequency in use and coefficient of correlation. The charm values of 10 odor descriptions obtained from GC/O analysis exhibited the significant (P sensor resistances and factor analysis on the sensory evaluation scores showed that the differences of aroma characteristics among the roasting degrees were larger than those among the origins. Based on an artificial neural network (ANN) model applied to the data from GC/O analyses and sensory evaluations, the perceptual factor of the RAS aroma was predicted to be mainly affected by sweet-caramel, smoke-roast, and acidic odors. Also, 3 metal oxide semiconductor sensors (LY2/Gh, P30/1, and T40/1) of E-nose were selected for analyses of RAS aroma and correlated with the sensory descriptive scores by the ANN to support sensory evaluation.

  13. Analysis of phthalate esters in soils near an electronics manufacturing facility and from a non-industrialized area by gas purge microsyringe extraction and gas chromatography.

    Science.gov (United States)

    Wu, Wei; Hu, Jia; Wang, Jinqi; Chen, Xuerong; Yao, Na; Tao, Jing; Zhou, Yi-Kai

    2015-03-01

    Here, a novel technique is described for the extraction and quantitative determination of six phthalate esters (PAEs) from soils by gas purge microsyringe extraction and gas chromatography. Recovery of PAEs ranged from 81.4% to 120.3%, and the relative standard deviation (n=6) ranged from 5.3% to 10.5%. Soil samples were collected from roadsides, farmlands, residential areas, and non-cultivated areas in a non-industrialized region, and from the same land-use types within 1 km of an electronics manufacturing facility (n=142). Total PAEs varied from 2.21 to 157.62 mg kg(-1) in non-industrialized areas and from 8.63 to 171.64 mg kg(-1) in the electronics manufacturing area. PAE concentrations in the non-industrialized area were highest in farmland, followed (in decreasing order) by roadsides, residential areas, and non-cultivated soil. In the electronics manufacturing area, PAE concentrations were highest in roadside soils, followed by residential areas, farmland, and non-cultivated soils. Concentrations of dimethyl phthalate (DMP), diethyl phthalate (DEP), and di-n-butyl phthalate (DnBP) differed significantly (P<0.01) between the industrial and non-industrialized areas. Principal component analysis indicated that the strongest explanatory factor was related to DMP and DnBP in non-industrialized soils and to butyl benzyl phthalate (BBP) and DMP in soils near the electronics manufacturing facility. Congener-specific analysis confirmed that diethylhexyl phthalate (DEHP) was a predictive indication both in the non-industrialized area (r(2)=0.944, P<0.01) and the industrialized area (r(2)=0.860, P<0.01). The higher PAE contents in soils near the electronics manufacturing facility are of concern, considering the large quantities of electronic wastes generated with ongoing industrialization.

  14. A Comparative Study on the Selected Area Electron Diffraction Pattern of Fe Oxide/Au Core-shell Structured Nanoparticles

    Institute of Scientific and Technical Information of China (English)

    Qianghua LU; Kailun YAO; Dong XI; Zuli LIU; Xiaoping LUO; Qin NING

    2007-01-01

    The selected area electron diffraction (SAED) pattern of magnetic iron oxide core/gold shell nanoparticles has been studied. For the composite particles with mean size less than 10 nm, their SAED pattern is found to be different from either the pattern of pure Fe oxide nanoparticles or that of pure Au particles. Based on the fact that the ring diameters of these composite particles fit the characteristic relation for the fcc structure, the Au atoms on surfaces of the concerned particles are supposed to pack in a way more tightly than they usually do in pure Au nanoparticles. The driving force for this is the coherency strain which enables the shell material at the heterostructured interface to adapt the lattice parameters of the core.

  15. Charge pump-based MOSFET-only 1.5-bit pipelined ADC stage in digital CMOS technology

    Science.gov (United States)

    Singh, Anil; Agarwal, Alpana

    2016-10-01

    A simple low-power and low-area metal-oxide-semiconductor field-effect transistor-only fully differential 1.5-bit pipelined analog-to-digital converter stage is proposed and designed in Taiwan Semiconductor Manufacturing Company 0.18 μm-technology using BSIM3v3 parameters with supply voltage of 1.8 V in inexpensive digital complementary metal-oxide semiconductor (CMOS) technology. It is based on charge pump technique to achieve the desired voltage gain of 2, independent of capacitor mismatch and avoiding the need of power hungry operational amplifier-based architecture to reduce the power, Si area and cost. Various capacitances are implemented by metal-oxide semiconductor capacitors, offering compatibility with cheaper digital CMOS process in order to reduce the much required manufacturing cost.

  16. Analysis of phthalate esters in soils near an electronics manufacturing facility and from a non-industrialized area by gas purge microsyringe extraction and gas chromatography

    Energy Technology Data Exchange (ETDEWEB)

    Wu, Wei [MOE Key Laboratory of Environment and Health, Institute of Environmental Medicine, School of Public Health, Tongji Medical College, Huazhong University of Science and Technology, Wuhan, Hubei (China); Hu, Jia [Suzhou Center for Disease Prevention and Control, Suzhou, Jiangsu (China); Wang, Jinqi; Chen, Xuerong; Yao, Na [MOE Key Laboratory of Environment and Health, Institute of Environmental Medicine, School of Public Health, Tongji Medical College, Huazhong University of Science and Technology, Wuhan, Hubei (China); Tao, Jing, E-mail: jingtao1982@126.com [MOE Key Laboratory of Environment and Health, Institute of Environmental Medicine, School of Public Health, Tongji Medical College, Huazhong University of Science and Technology, Wuhan, Hubei (China); Zhou, Yi-Kai, E-mail: zhouyk@mails.tjmu.edu.cn [MOE Key Laboratory of Environment and Health, Institute of Environmental Medicine, School of Public Health, Tongji Medical College, Huazhong University of Science and Technology, Wuhan, Hubei (China)

    2015-03-01

    Here, a novel technique is described for the extraction and quantitative determination of six phthalate esters (PAEs) from soils by gas purge microsyringe extraction and gas chromatography. Recovery of PAEs ranged from 81.4% to 120.3%, and the relative standard deviation (n = 6) ranged from 5.3% to 10.5%. Soil samples were collected from roadsides, farmlands, residential areas, and non-cultivated areas in a non-industrialized region, and from the same land-use types within 1 km of an electronics manufacturing facility (n = 142). Total PAEs varied from 2.21 to 157.62 mg kg{sup −1} in non-industrialized areas and from 8.63 to 171.64 mg kg{sup −1} in the electronics manufacturing area. PAE concentrations in the non-industrialized area were highest in farmland, followed (in decreasing order) by roadsides, residential areas, and non-cultivated soil. In the electronics manufacturing area, PAE concentrations were highest in roadside soils, followed by residential areas, farmland, and non-cultivated soils. Concentrations of dimethyl phthalate (DMP), diethyl phthalate (DEP), and di-n-butyl phthalate (DnBP) differed significantly (P < 0.01) between the industrial and non-industrialized areas. Principal component analysis indicated that the strongest explanatory factor was related to DMP and DnBP in non-industrialized soils and to butyl benzyl phthalate (BBP) and DMP in soils near the electronics manufacturing facility. Congener-specific analysis confirmed that diethylhexyl phthalate (DEHP) was a predictive indication both in the non-industrialized area (r{sup 2} = 0.944, P < 0.01) and the industrialized area (r{sup 2} = 0.860, P < 0.01). The higher PAE contents in soils near the electronics manufacturing facility are of concern, considering the large quantities of electronic wastes generated with ongoing industrialization. - Highlights: • A new method for determining phthalate esters in soil samples was developed. • Investigate six phthalates near an industry and a

  17. Low-cost high-quality crystalline germanium based flexible devices

    KAUST Repository

    Nassar, Joanna M.

    2014-06-16

    High performance flexible electronics promise innovative future technology for various interactive applications for the pursuit of low-cost, light-weight, and multi-functional devices. Thus, here we show a complementary metal oxide semiconductor (CMOS) compatible fabrication of flexible metal-oxide-semiconductor capacitors (MOSCAPs) with high-κ/metal gate stack, using a physical vapor deposition (PVD) cost-effective technique to obtain a high-quality Ge channel. We report outstanding bending radius ~1.25 mm and semi-transparency of 30%.

  18. Polybrominated diphenyl ethers in chicken tissues and eggs from an electronic waste recycling area in southeast China

    Institute of Scientific and Technical Information of China (English)

    Xiaofei Qin; Yongjian Yang; Zhanfen Qin; Yan Li; Yaxian Zhao; Xijuan Xia; Shishuai Yan; Mi Tian; Xingru Zhao; Xiaobai XU

    2011-01-01

    The levels and distributions of polybrominated diphenyl ethers (PBDEs) in chicken tissues from an electronic waste (e-waste)recycling area in southeast China were investigated. Human dietary intake by local residents via chicken muscle and eggs was estimated.The mean PBDEs concentrations in tissues ranged from 15.2 to 3138.1 ng/g lipid weight (lw) and in egg the concentration was 563.5 ng/g lw. The results showed that the level of total PBDEs (∑PBDEs) in the chicken tissue was 2-3 orders of magnitude higher than those reported in the literature. The large difference of ΣPBDEs concentrations between tissues confirmed that the distribution of PBDEs in tissues depend on tissue-specificity rather than the “lipid-compartment”. BDE-209 was the predominant congener (82.5%-94.7% of ∑PBDEs) in all chicken tissues except in brain (34.7% of ∑PBDEs), which indicated that deca-BDE (the major commercial PBDE formulation comprising 65%-70% of total production) was major pollution source in this area and could be bioaccumulated in terrestrial animals. The dietary PBDEs intake of the local residents from chicken muscle and egg, assuming only local bred chickens and eggs were consumed, ranged from 2.2 to 22.5 ng/(day·kg body weight (bw)) with a mean value of 13.5 ng/(day.kg bw), which was one order of magnitude higher than the value reported in previous studies for consumption of all foodstuffs.

  19. 独立分量分析在伤口感染监测电子鼻技术中的应用%Independent Component Analysis for Wound Infection Using Electronic Nose Technology

    Institute of Scientific and Technical Information of China (English)

    徐姗; 田逢春; 杨先一; 闫嘉; 冯敬伟

    2011-01-01

    A method based on the electronic nose(e-nose)and independent component analysis( ICA) is presented to solve the time-consuming and complicated operation which appeared in traditional diagnosis method of wound infection. The gas sensor array of this e-nose consists of six metal oxide semiconductor sensors,which respond to the seven common pathogens in wound infection. The KBF( Radius Basis Function ) neural network is used for pattern recognition after pre-processing of the ICA. The results show that pre-processing of the gas sensor array measurement data by the ICA can simplify the structure of neural network, with the computation complexity reduced and the recognition accuracy of the wound infection pathogens increased.%针对传统的伤口感染诊断方法耗时长,操作复杂等问题,提出了一种基于电子鼻和独立分量分析(ICA)的方法来检测常见的伤口感染痛原菌.该电子鼻的传感器阵列由6个金属氧化物半导体传感器组成,分别对七种常见病原菌产生响应,然后利用RBF神经网络对经ICA预处理后的数据进行识别.结果表明,ICA对气体传感器阵列测量数据进行预处理,可以简化神经网络的结构,减少计算量,并能提高伤口感染病原菌识别的准确率.

  20. AlGaN/GaN high electron mobility transistors with selective area grown p-GaN gates

    Science.gov (United States)

    Yuliang, Huang; Lian, Zhang; Zhe, Cheng; Yun, Zhang; Yujie, Ai; Yongbing, Zhao; Hongxi, Lu; Junxi, Wang; Jinmin, Li

    2016-11-01

    We report a selective area growth (SAG) method to define the p-GaN gate of AlGaN/GaN high electron mobility transistors (HEMTs) by metal-organic chemical vapor deposition. Compared with Schottky gate HEMTs, the SAG p-GaN gate HEMTs show more positive threshold voltage (V th) and better gate control ability. The influence of Cp2Mg flux of SAG p-GaN gate on the AlGaN/GaN HEMTs has also been studied. With the increasing Cp2Mg from 0.16 μmol/min to 0.20 μmol/min, the V th raises from -0.67 V to -0.37 V. The maximum transconductance of the SAG HEMT at a drain voltage of 10 V is 113.9 mS/mm while that value of the Schottky HEMT is 51.6 mS/mm. The SAG method paves a promising way for achieving p-GaN gate normally-off AlGaN/GaN HEMTs without dry etching damage. Project supported by the National Natural Sciences Foundation of China (Nos. 61376090, 61306008) and the National High Technology Program of China (No. 2014AA032606).

  1. Tests of innovative photon detectors and integrated electronics for the large-area CLAS12 ring-imaging Cherenkov detector

    Energy Technology Data Exchange (ETDEWEB)

    Contalbrigo, Marco [INFN, Ferrara, Italy

    2015-07-01

    A large area ring-imaging Cherenkov detector has been designed to provide clean hadron identification capability in the momentum range from 3 GeV/c to 8 GeV/c for the CLAS12 experiments at the upgraded 12 GeV continuous electron beam accelerator facility of Jefferson Lab. Its aim is to study the 3D nucleon structure in the yet poorly explored valence region by deep-inelastic scattering, and to perform precision measurements in hadron spectroscopy. The adopted solution foresees a novel hybrid optics design based on an aerogel radiator, composite mirrors and a densely packed and highly segmented photon detector. Cherenkov light will either be imaged directly (forward tracks) or after two mirror reflections (large angle tracks). Extensive tests have been performed on Hamamatsu H8500 and novel flat multi-anode photomultipliers under development and on various types of silicon photomultipliers. A large scale prototype based on 28 H8500 MA-PMTs has been realized and tested with few GeV/c hadron beams at the T9 test-beam facility of CERN. In addition a small prototype was used to study the response of customized SiPM matrices within a temperature interval ranging from 25 down to –25 °C. The preliminary results of the individual photon detector tests and of the prototype performance at the test-beams are here reported.

  2. Tests of innovative photon detectors and integrated electronics for the large-area CLAS12 ring-imaging Cherenkov detector

    Energy Technology Data Exchange (ETDEWEB)

    Contalbrigo, M., E-mail: contalbrigo@fe.infn.it

    2015-07-01

    A large area ring-imaging Cherenkov detector has been designed to provide clean hadron identification capability in the momentum range from 3 GeV/c to 8 GeV/c for the CLAS12 experiments at the upgraded 12 GeV continuous electron beam accelerator facility of Jefferson Lab. Its aim is to study the 3D nucleon structure in the yet poorly explored valence region by deep-inelastic scattering, and to perform precision measurements in hadron spectroscopy. The adopted solution foresees a novel hybrid optics design based on an aerogel radiator, composite mirrors and a densely packed and highly segmented photon detector. Cherenkov light will either be imaged directly (forward tracks) or after two mirror reflections (large angle tracks). Extensive tests have been performed on Hamamatsu H8500 and novel flat multi-anode photomultipliers under development and on various types of silicon photomultipliers. A large scale prototype based on 28 H8500 MA-PMTs has been realized and tested with few GeV/c hadron beams at the T9 test-beam facility of CERN. In addition a small prototype was used to study the response of customized SiPM matrices within a temperature interval ranging from 25 down to −25 °C. The preliminary results of the individual photon detector tests and of the prototype performance at the test-beams are here reported.

  3. Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

    KAUST Repository

    Fahad, Hossain M.

    2011-10-12

    We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

  4. BP 神经网络在电子鼻分类识别多品牌白酒中的应用研究%The APPlication Research of the BP Neural Network in Electronic Nose Classification and Recognition with Different Brands Liquor

    Institute of Scientific and Technical Information of China (English)

    陈秀丽; 赵爱娟; 卫世乾

    2014-01-01

    由于 MQ3、MQ4、TGS813、TGS26204个金属氧化物半导体组成的气体传感器阵列对酒精气体及有机物交叉敏感,据此建立实时数据采集系统,并提出稳态特征值和动态特征值的提取方法,进而结合 BP神经网络识别方法,通过所建立的电子鼻系统对3种不同品牌白酒进行了分类识别实验.结果表明:电子鼻系统对不同品牌白酒的识别率稳态特征时达90.0%,动态特征时达83.3%.%Based on the sensors array made up of MQ3、MQ4、TGS813、TGS2620 four metal oxide semiconductor sensors which are cross sensitive to alcohol gas and organic,the real-time data acquisition was established in this pa-per,and the method of the steady and dynamic characteristic value extraction was proposed. Combined with BP neu-ral network recognition,three kinds of liquor were conducted classification experiments by the electronic nose sys-tem. The results show that the recognition rate of electronic nose system is up to 90. 0% under the steady character-istic and 83. 3% under the dynamic characteristic for the different brands of liquor.

  5. Transformational Electronics: Towards Flexible Low-Cost High Mobility Channel Materials

    KAUST Repository

    Nassar, Joanna M.

    2014-05-01

    For the last four decades, Si CMOS technology has been advancing with Moore’s law prediction, working itself down to the sub-20 nm regime. However, fundamental problems and limitations arise with the down-scaling of transistors and thus new innovations needed to be discovered in order to further improve device performance without compromising power consumption and size. Thus, a lot of studies have focused on the development of new CMOS compatible architectures as well as the discovery of new high mobility channel materials that will allow further miniaturization of CMOS transistors and improvement of device performance. Pushing the limits even further, flexible and foldable electronics seem to be the new attractive topic. By being able to make our devices flexible through a CMOS compatible process, one will be able to integrate hundreds of billions of more transistors in a small volumetric space, allowing to increase the performance and speed of our electronics all together with making things thinner, lighter, smaller and even interactive with the human skin. Thus, in this thesis, we introduce for the first time a cost-effective CMOS compatible approach to make high-k/metal gate devices on flexible Germanium (Ge) and Silicon-Germanium (SiGe) platforms. In the first part, we will look at the various approaches in the literature that has been developed to get flexible platforms, as well as we will give a brief overview about epitaxial growth of Si1-xGex films. We will also examine the electrical properties of the Si1-xGex alloys up to Ge (x=1) and discuss how strain affects the band structure diagram, and thus the mobility of the material. We will also review the material growth properties as well as the state-of-the-art results on high mobility metal-oxide semiconductor capacitors (MOSCAPs) using strained SiGe films. Then, we will introduce the flexible process that we have developed, based on a cost-effective “trench-protect-release-reuse” approach, utilizing

  6. Ion age transport: developing devices beyond electronics

    Science.gov (United States)

    Demming, Anna

    2014-03-01

    molecules. 'This process should permit the thermal gating and controlled release of ionic drug molecules through the nanopores modified with thermoresponsive polymer chains across the membrane,' they explain. With their intrinsic nanoscale features, carbon nanomaterials often feature as possible nanochannel systems. The intrinsic two-dimensional nanochannel structures formed by carbon nanotubes led Jae Hyun Park, Susan Sinnott and Narayana Aluru to pursue molecular dynamics simulations of Y-junction carbon nanotubes. Their results suggest that when the nanotubes of the different arms of the Y have different diameters they could be used in a type of permselectivity to separate K+ and Cl- ions from a KCl solution [5]. Guohui Hu, Mao Mao and Sandip Ghosal in China and the US also used molecular dynamics simulations to investigate the mechanisms at play in the ionic transport of NaCl in solution through a graphene nanopore under an applied electric field. Their results confirm that the electric conductance is proportional to the nanopore [6], and help to understand how these structures can be exploited in applications. In fact nanopores were among the early suggestions for fast DNA sequencing as Massimiliano Di Ventra points out in his perspective [7]. If the pore is large enough to allow DNA bases through but small enough to allow only one to pass at a time, current values can be assigned to each base and the DNA sequenced by measuring the ionic currents. It is clear that at these scales the characteristics of transport phenomena can be hugely valuable for developing new technologies. In this issue Weihua Guan, Sylvia Xin Li and Mark Reed provide an overview of voltage-gated nanochannels in systems that have three or more terminals, similar to metal-oxide-semiconductor field-effect transistors [1]. They describe the potential profiles in the nanochannels and the theory behind some of the effects that originate from the nanoscale feature sizes such as ion permselectivity. They

  7. Characterization of high-k gate dielectrics by atomic-resolution electron microscopy: current progress and future prospects%高k栅介质原子分辨率的电镜表征:研究进展和展望

    Institute of Scientific and Technical Information of China (English)

    朱信华; 朱健民; 刘治国; 闵乃本

    2009-01-01

    As the downscaling of the feature sizes of complementary metal oxide semiconductor (CMOS) devices enters into the "nuno" era, nanoscale structural characterization at device dimensions becomes critical. A full structural analysis of processed semiconductor devices reqnires an ability to determine atomic positions and local chemical elements and electronic structure. Highresolution (analytical) transmission electron microscopes (HR (A)TEM ), which provide the microscopy techniques such as diffraction contrast imaging (smplimde contrast imaging), high-resolution TEM imaging (phase contrast imaging), selected area electron diffraction and convergent beam electron diffraction, and X-ray energy-dispersive spectroscopy (EDS) and electron energy loss spectroscopy (EELS), have become essential metrology tools in the semiconductor industry. Scanning transmission electron microscope (STEM) with high-angle annular dark field (HAADF) imaging (or Z-contrast incoherent imaging) can directly reveal the structure and chemistry of materials at the atomic scale, due to its imaging intensity being approximately proportional to the square of atomic number (Z) of element. By using Z-contrast imaging and high-resolved EELS spectroscopy, it is very powerful to determine the interfacial structures and the elemental/cbemical environment at/around interfaces within advanced CMOS gate stacks. In recent years the new development of aberration corrector (or, Cs-corrector) makes a revolutionizing the performance of HRTEM/STEM instruments, allowing one to achieve a spatial resolution better than 0.08 nm and an energy resolution better than 0.2 eV, thereby making the characterization of individual nanoscale device structure at sub-atomic scale available. The new generation HRTEM/STEM facility equipped with Cs-corrector will benefit high-k gate materials research in the new era. In this review, some basic principles and key features of atomic-resolution electron microscopy, and the associated high

  8. X-Ray-Diffraction Tests Of Irradiated Electronic Devices: I

    Science.gov (United States)

    Shaw, David C.; Lowry, Lynn E.; Barnes, Charles E.

    1993-01-01

    X-ray-diffraction tests performed on aluminum conductors in commercial HI1-507A complementary metal oxide/semiconductor (CMOS) integrated-circuit analog multiplexers, both before and after circuits exposed to ionizing radiation from Co(60) source, and after postirradiation annealing at ambient and elevated temperatures. Tests in addition to electrical tests performed to determine effects of irradiation and of postirradiation annealing on electrical operating characteristics of circuits. Investigators sought to determine whether relationship between effects of irradiation on devices and physical stresses within devices. X-ray diffraction potentially useful for nondestructive measurement of stresses.

  9. Structural, electronics and optical properties of CaO

    Energy Technology Data Exchange (ETDEWEB)

    Albuquerque, E L [Departamento de Fisica, Universidade Federal do Rio Grande do Norte 59072-970 Natal-RN (Brazil); Vasconcelos, M S [Departamento de Ciencias Exatas, Centro Federal de Educacao Tecnologica do Maranhao 65025-001 Sao Luis-MA (Brazil)], E-mail: eudenilson@dfte.ufrn.br

    2008-03-15

    The carrier effective masses of CaO in the cubic phase are estimated by ab initio calculations, which are used for the simulation of Si/CaO metal-oxide-semiconductor (MOS) devices by solving Schroedinger and Poisson equations self consistently. It is shown that higher switching speed, longer lifetimes, and higher endurance can be obtained replacing SiO{sub 2} by CaO as gate dielectric, suggesting promising biomedical applications for Si/CaO-based MOS devices due to the CaO bio-compatibility.

  10. Vacuum-thermal-evaporation: the route for roll-to-roll production of large-area organic electronic circuits

    Science.gov (United States)

    Taylor, D. M.

    2015-05-01

    Surprisingly little consideration is apparently being given to vacuum-evaporation as the route for the roll-to-roll (R2R) production of large-area organic electronic circuits. While considerable progress has been made by combining silicon lithographic approaches with solution processing, it is not obvious that these will be compatible with a low-cost, high-speed R2R process. Most efforts at achieving this ambition are directed at conventional solution printing approaches such as inkjet and gravure. This is surprising considering that vacuum-evaporation of organic semiconductors (OSCs) is already used commercially in the production of organic light emitting diode displays. Beginning from a discussion of the materials and geometrical parameters determining transistor performance and drawing on results from numerous publications, this review makes a case for vacuum-evaporation as an enabler of R2R organic circuit production. The potential of the vacuum route is benchmarked against solution approaches and found to be highly competitive. For example, evaporated small molecules tend to have higher mobility than printed OSCs. High resolution metal patterning on plastic films is already a low-cost commercial process for high-volume packaging applications. Similarly, solvent-free flash-evaporation and polymerization of thin films on plastic substrates is also a high-volume commercial process and has been shown capable of producing robust gate dielectrics. Reports of basic logic circuit elements produced in a vacuum R2R environment are reviewed and shown to be superior to all-solution printing approaches. Finally, the main issues that need to be resolved in order to fully develop the vacuum route to R2R circuit production are highlighted.

  11. Levels and risk factors of antimony contamination in human hair from an electronic waste recycling area, Guiyu, China.

    Science.gov (United States)

    Huang, Yue; Ni, Wenqing; Chen, Yaowen; Wang, Xiaoling; Zhang, Jingwen; Wu, Kusheng

    2015-05-01

    The primitive electronic waste (e-waste) recycling has brought a series of environmental pollutants in Guiyu, China. Antimony is one of the important metal contaminants and has aroused the global concerns recently. We aimed to investigate concentrations of antimony in human hair from Guiyu and compared them with those from a control area where no e-waste recycling exists, and assessed the potential risk factors. A total of 205 human hair samples from Guiyu and 80 samples from Jinping were collected for analysis. All volunteers were asked to complete a questionnaire including socio-demographic characteristics and other possible factors related to hair antimony exposure. The concentrations of hair antimony were analyzed using atomic absorption spectrophotometer. Our results indicated that the level of hair antimony in volunteers from Guiyu (median, 160.78; range, 6.99-4412.59 ng/g) was significantly higher than those from Jinping (median, 61.74; range, 2.98-628.43 ng/g). The residents who engaged in e-waste recycling activities in Guiyu had higher hair antimony concentrations than others (P < 0.001). There was no significant difference of hair antimony concentrations among different occupation types in e-waste recycling. Multiple stepwise regression analysis indicated that hair antimony concentrations were associated with education level (β = -0.064), the time of residence in Guiyu (β = 0.112), living house also served as e-waste workshop (β = 0.099), the work related to e-waste (β = 0.169), and smoking (β = 0.018). The elevated hair antimony concentrations implied that the residents in Guiyu might be at high risk of antimony contamination, especially the e-waste recycling workers. Work related to e-waste recycling activities and long-time residence in Guiyu contributed to the high hair antimony exposure.

  12. Next generation non-vacuum, maskless, low temperature nanoparticle ink laser digital direct metal patterning for a large area flexible electronics.

    Science.gov (United States)

    Yeo, Junyeob; Hong, Sukjoon; Lee, Daehoo; Hotz, Nico; Lee, Ming-Tsang; Grigoropoulos, Costas P; Ko, Seung Hwan

    2012-01-01

    Flexible electronics opened a new class of future electronics. The foldable, light and durable nature of flexible electronics allows vast flexibility in applications such as display, energy devices and mobile electronics. Even though conventional electronics fabrication methods are well developed for rigid substrates, direct application or slight modification of conventional processes for flexible electronics fabrication cannot work. The future flexible electronics fabrication requires totally new low-temperature process development optimized for flexible substrate and it should be based on new material too. Here we present a simple approach to developing a flexible electronics fabrication without using conventional vacuum deposition and photolithography. We found that direct metal patterning based on laser-induced local melting of metal nanoparticle ink is a promising low-temperature alternative to vacuum deposition- and photolithography-based conventional metal patterning processes. The "digital" nature of the proposed direct metal patterning process removes the need for expensive photomask and allows easy design modification and short turnaround time. This new process can be extremely useful for current small-volume, large-variety manufacturing paradigms. Besides, simple, scalable, fast and low-temperature processes can lead to cost-effective fabrication methods on a large-area polymer substrate. The developed process was successfully applied to demonstrate high-quality Ag patterning (2.1 µΩ·cm) and high-performance flexible organic field effect transistor arrays.

  13. Next generation non-vacuum, maskless, low temperature nanoparticle ink laser digital direct metal patterning for a large area flexible electronics.

    Directory of Open Access Journals (Sweden)

    Junyeob Yeo

    Full Text Available Flexible electronics opened a new class of future electronics. The foldable, light and durable nature of flexible electronics allows vast flexibility in applications such as display, energy devices and mobile electronics. Even though conventional electronics fabrication methods are well developed for rigid substrates, direct application or slight modification of conventional processes for flexible electronics fabrication cannot work. The future flexible electronics fabrication requires totally new low-temperature process development optimized for flexible substrate and it should be based on new material too. Here we present a simple approach to developing a flexible electronics fabrication without using conventional vacuum deposition and photolithography. We found that direct metal patterning based on laser-induced local melting of metal nanoparticle ink is a promising low-temperature alternative to vacuum deposition- and photolithography-based conventional metal patterning processes. The "digital" nature of the proposed direct metal patterning process removes the need for expensive photomask and allows easy design modification and short turnaround time. This new process can be extremely useful for current small-volume, large-variety manufacturing paradigms. Besides, simple, scalable, fast and low-temperature processes can lead to cost-effective fabrication methods on a large-area polymer substrate. The developed process was successfully applied to demonstrate high-quality Ag patterning (2.1 µΩ·cm and high-performance flexible organic field effect transistor arrays.

  14. Inkjet printing as a roll-to-roll compatible technology for the production of large area electronic devices on a pre-industrial scale

    NARCIS (Netherlands)

    Teunissen, P.; Rubingh, E.; Lammeren, T. van; Abbel, R.J.; Groen, P.

    2014-01-01

    Inkjet printing is a promising approach towards the solution processing of electronic devices on an industrial scale. Of particular interest is the production of high-end applications such as large area OLEDs on flexible substrates. Roll-to-roll (R2R) processing technologies involving inkjet printin

  15. Inkjet printing as a roll-to-roll compatible technology for the production of large area electronic devices on a pre-industrial scale

    NARCIS (Netherlands)

    Teunissen, P.; Rubingh, E.; Lammeren, T. van; Abbel, R.J.; Groen, P.

    2014-01-01

    Inkjet printing is a promising approach towards the solution processing of electronic devices on an industrial scale. Of particular interest is the production of high-end applications such as large area OLEDs on flexible substrates. Roll-to-roll (R2R) processing technologies involving inkjet

  16. Design and simulation of cellular nonlinear networks using single-electron tunneling transistor technology

    Science.gov (United States)

    Gerousis, Costa P.

    It is currently predicted that semiconductor device scaling will end at the 22-nm device feature size (7 nm physical channel length) according to the International Technology Roadmap for Semiconductors. The main challenge is then to develop innovative technologies that will extend the scaling beyond roadmap projection. Any new technology must be well matched with complementary metal oxide semiconductor (CMOS) technology and scaleable beyond CMOS scaling projections and must provide low-power high-speed signal processing. Nanotechnology will become an appealing option for developing devices for integrated circuits with dimensions and performances well beyond roadmap predictions. Such devices, based on the controllable transfer of charge between dots or 'islands', can take advantage of the quantum mechanical effects, such as tunneling and energy quantization, which would normally occur at the nanometer scale. An outstanding challenge is in arranging such nanodevices in new architectures that can be integrated on a single chip. In particular, locally interconnected architectures are believed to be necessary to alleviate the problems associated with increasing interconnect length and complexity in ultra-dense circuits. The goal of this work is to investigate the use of nanoelectronic structures in cellular non-linear network (CNN) architectures for potential application in future high-density and low-power CMOS-nanodevice hybrid circuits. The operation of the single-electron tunneling (SET) transistor is first reviewed, followed by a discussion of simple CNN linear architectures using a SET inverter topology as the basis for the non-linear transfer characteristics for individual cells to be used in analog processing arrays for image-processing applications. The basic SET CNN cell acts as a summing node that is capacitively coupled to the inputs and outputs of nearest neighbor cells. Monte Carlo simulation results are used to show CNN-like behavior in attempting to

  17. Computer simulation of laser annealing of a nanostructured surface

    NARCIS (Netherlands)

    Ivanov, D.; Marinov, I.; Gorbachev, Y.; Smirnov, A.; Krzhizhanovskaya, V.

    2010-01-01

    Laser annealing technology is used in mass production of new-generation semiconductor materials and nano-electronic devices like the MOS-based (metal-oxide-semiconductor) integrated circuits. Manufacturing sub-100 nm MOS devices demands application of ultra-shallow doping (junctions), which requires

  18. Echocardiographic and electron beam tomographic assessment of stenosis in patients with aortic valve disease: Gradient versus valve area

    NARCIS (Netherlands)

    Piers, Lieuwe Hendrik; Dikkers, Riksta; Tio, R.A.; van den Berg, M.P.; Willems, Els; Oudkerk, M.; Zijlstra, F.

    2006-01-01

    Background. Transthoracic echocardiography (TTE) is routinely used to evaluate aortic valve stenosis. However, it does not give reliable results in every patient. There is growing interest in electron-beam tomography (EBT) as a noninvasive cardiac imaging technique. The usefulness of EBT to evaluate

  19. Identification of high-risk areas for harbour porpoise Phocoena phocoena bycatch using remote electronic monitoring and satellite telemetry data

    DEFF Research Database (Denmark)

    Kindt-Larsen, Lotte; Berg, Casper Willestofte; Tougaard, J.

    2016-01-01

    and lower risk of porpoise bycatch. From May 2010 to April 2011, 4 commercial gillnet vessels were equipped with remote electronic monitoring (REM) systems. The REM system recorded time, GPS position and closed-circuit television (CCTV) footage of all gillnet hauls. REM data were used to identify fishing...

  20. Heterogeneous integration of GaAs pHEMT and Si CMOS on the same chip

    Science.gov (United States)

    Li-Shu, Wu; Yan, Zhao; Hong-Chang, Shen; You-Tao, Zhang; Tang-Sheng, Chen

    2016-06-01

    In this work, we demonstrate the technology of wafer-scale transistor-level heterogeneous integration of GaAs pseudomorphic high electron mobility transistors (pHEMTs) and Si complementary metal-oxide semiconductor (CMOS) on the same Silicon substrate. GaAs pHEMTs are vertical stacked at the top of the Si CMOS wafer using a wafer bonding technique, and the best alignment accuracy of 5 μm is obtained. As a circuit example, a wide band GaAs digital controlled switch is fabricated, which features the technologies of a digital control circuit in Si CMOS and a switch circuit in GaAs pHEMT, 15% smaller than the area of normal GaAs and Si CMOS circuits.

  1. Detection of a single magnetic microbead using a miniaturized silicon Hall sensor

    Science.gov (United States)

    Besse, Pierre-A.; Boero, Giovanni; Demierre, Michel; Pott, Vincent; Popovic, Radivoje

    2002-06-01

    Using a highly sensitive silicon Hall sensor fabricated in a standard complementary metal-oxide-semiconductor (CMOS) technology, we detect a single magnetic microbead of 2.8 μm in diameter. The miniaturized sensor has an active area of 2.4×2.4 μm2, a sensitivity of 175 V/AT and a resistance of 8.5 kΩ. Two detection methods, both exploiting the superparamagnetic behavior of the bead, are experimentally tested and their performances are compared. This work opens the way to the fabrication of low cost microsystems for biochemical applications based on the use of dense arrays of silicon Hall sensors and CMOS electronics.

  2. Graphene radio frequency receiver integrated circuit.

    Science.gov (United States)

    Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A; Haensch, Wilfried

    2014-01-01

    Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

  3. The Multidimensional Integrated Intelligent Imaging project (MI-3)

    Energy Technology Data Exchange (ETDEWEB)

    Allinson, N.; Anaxagoras, T. [Vision and Information Engineering, University of Sheffield (United Kingdom); Aveyard, J. [Laboratory for Environmental Gene Regulation, University of Liverpool (United Kingdom); Arvanitis, C. [Radiation Physics, University College, London (United Kingdom); Bates, R.; Blue, A. [Experimental Particle Physics, University of Glasgow (United Kingdom); Bohndiek, S. [Radiation Physics, University College, London (United Kingdom); Cabello, J. [Centre for Vision, Speech and Signal Processing, University of Surrey, Guildford (United Kingdom); Chen, L. [Electron Optics, Applied Electromagnetics and Electron Optics, University of York (United Kingdom); Chen, S. [MRC Laboratory for Molecular Biology, Cambridge (United Kingdom); Clark, A. [STFC Rutherford Appleton Laboratories (United Kingdom); Clayton, C. [Vision and Information Engineering, University of Sheffield (United Kingdom); Cook, E. [Radiation Physics, University College, London (United Kingdom); Cossins, A. [Laboratory for Environmental Gene Regulation, University of Liverpool (United Kingdom); Crooks, J. [STFC Rutherford Appleton Laboratories (United Kingdom); El-Gomati, M. [Electron Optics, Applied Electromagnetics and Electron Optics, University of York (United Kingdom); Evans, P.M. [Institute of Cancer Research, Sutton, Surrey SM2 5PT (United Kingdom)], E-mail: phil.evans@icr.ac.uk; Faruqi, W. [MRC Laboratory for Molecular Biology, Cambridge (United Kingdom); French, M. [STFC Rutherford Appleton Laboratories (United Kingdom); Gow, J. [Imaging for Space and Terrestrial Applications, Brunel University, London (United Kingdom)] (and others)

    2009-06-01

    MI-3 is a consortium of 11 universities and research laboratories whose mission is to develop complementary metal-oxide semiconductor (CMOS) active pixel sensors (APS) and to apply these sensors to a range of imaging challenges. A range of sensors has been developed: On-Pixel Intelligent CMOS (OPIC)-designed for in-pixel intelligence; FPN-designed to develop novel techniques for reducing fixed pattern noise; HDR-designed to develop novel techniques for increasing dynamic range; Vanilla/PEAPS-with digital and analogue modes and regions of interest, which has also been back-thinned; Large Area Sensor (LAS)-a novel, stitched LAS; and eLeNA-which develops a range of low noise pixels. Applications being developed include autoradiography, a gamma camera system, radiotherapy verification, tissue diffraction imaging, X-ray phase-contrast imaging, DNA sequencing and electron microscopy.

  4. A method of transferring G.T.S. benchmark value to survey area using electronic total station

    Digital Repository Service at National Institute of Oceanography (India)

    Ganesan, P.

    is impossible. In some places, GTS benchmarks are available within a kilometer distance and can be easily transferred to the survey area by fly leveling using an automatic Level instrument and a graduated leveling staff. But in most of the cases, GTS benchmarks...

  5. Holmium hafnate: An emerging electronic device material

    Energy Technology Data Exchange (ETDEWEB)

    Pavunny, Shojan P., E-mail: shojanpp@gmail.com, E-mail: rkatiyar@hpcf.upr.edu; Sharma, Yogesh; Kooriyattil, Sudheendran; Dugu, Sita; Katiyar, Rajesh K.; Katiyar, Ram S., E-mail: shojanpp@gmail.com, E-mail: rkatiyar@hpcf.upr.edu [Department of Physics and Institute for Functional Nanomaterials, University of Puerto Rico, P.O. Box 70377, San Juan, Puerto Rico 00936-8377 (United States); Scott, James F. [Department of Physics and Institute for Functional Nanomaterials, University of Puerto Rico, P.O. Box 70377, San Juan, Puerto Rico 00936-8377 (United States); Department of Physics, Cavendish Laboratory, University of Cambridge, Cambridge CB3 OHE (United Kingdom)

    2015-03-16

    We report structural, optical, charge transport, and temperature properties as well as the frequency dependence of the dielectric constant of Ho{sub 2}Hf{sub 2}O{sub 7} (HHO) which make this material desirable as an alternative high-k dielectric for future silicon technology devices. A high dielectric constant of ∼20 and very low dielectric loss of ∼0.1% are temperature and voltage independent at 100 kHz near ambient conditions. The Pt/HHO/Pt capacitor exhibits exceptionally low Schottky emission-based leakage currents. In combination with the large observed bandgap E{sub g} of 5.6 eV, determined by diffuse reflectance spectroscopy, our results reveal fundamental physics and materials science of the HHO metal oxide and its potential application as a high-k dielectric for the next generation of complementary metal-oxide-semiconductor devices.

  6. Holmium hafnate: An emerging electronic device material

    Science.gov (United States)

    Pavunny, Shojan P.; Sharma, Yogesh; Kooriyattil, Sudheendran; Dugu, Sita; Katiyar, Rajesh K.; Scott, James F.; Katiyar, Ram S.

    2015-03-01

    We report structural, optical, charge transport, and temperature properties as well as the frequency dependence of the dielectric constant of Ho2Hf2O7 (HHO) which make this material desirable as an alternative high-k dielectric for future silicon technology devices. A high dielectric constant of ˜20 and very low dielectric loss of ˜0.1% are temperature and voltage independent at 100 kHz near ambient conditions. The Pt/HHO/Pt capacitor exhibits exceptionally low Schottky emission-based leakage currents. In combination with the large observed bandgap Eg of 5.6 eV, determined by diffuse reflectance spectroscopy, our results reveal fundamental physics and materials science of the HHO metal oxide and its potential application as a high-k dielectric for the next generation of complementary metal-oxide-semiconductor devices.

  7. ULTRA LOW POWER SINGLE EDGE TRIGGERED DELAY FLIP FLOP BASED SHIFT REGISTERS USING 10-NANOMETER CARBON NANO TUBE FIELD EFFECT TRANSISTOR

    Directory of Open Access Journals (Sweden)

    Ravi Thiyagarajan

    2013-01-01

    Full Text Available Carbon Nano Tube Field Effect Transistor is currently considered as promising successor of Metal Oxide Semiconductor Field Effect Transistor. The scaling down of the Metal Oxide Semiconductor device faced serious limits like short channel effect, tunnelling through gate oxide layer, associated leakage currents and power dissipation when its dimension shrink down to 22 nanometer range. Further scaling of Metal Oxide Semiconductor Field Effect Transistor will result in performance degradation. In this study, an ultra low power Single Edge Triggered Delay Flip Flop and shift registers are designed using 10 nanometre Carbon Nano Tube Field Effect Transistor. The Carbon Nano Tube Field Effect Transistor is an efficient device to supplant the current Complementary Metal Oxide Semiconductor technology for its excellent electrical properties. The high electron and hole mobility of semiconductor nano tubes, their compatibility with high k gate dielectrics, enhanced electrostatics, reduced short channel effects and ability to readily form metal ohmic contacts make these miniaturized structures an ideal material for high performance, nanoscale transistors. To evaluate the performance of Ultra low power Single Edge Triggered Delay Flip Flop and shift registers using 10 nanometer Carbon Nano Tube Field Effect Transistor technology, the results are depicted by analyzing average power, delay, power delay product, rise time and fall time using HSPICE at 1GHz operating frequency.

  8. Large-Area Chemical Vapor Deposited MoS2 with Transparent Conducting Oxide Contacts toward Fully Transparent 2D Electronics

    KAUST Repository

    Dai, Zhenyu

    2017-09-08

    2D semiconductors are poised to revolutionize the future of electronics and photonics, much like transparent oxide conductors and semiconductors have revolutionized the display industry. Herein, these two types of materials are combined to realize fully transparent 2D electronic devices and circuits. Specifically, a large-area chemical vapor deposition process is developed to grow monolayer MoS2 continuous films, which are, for the first time, combined with transparent conducting oxide (TCO) contacts. Transparent conducting aluminum doped zinc oxide contacts are deposited by atomic layer deposition, with composition tuning to achieve optimal conductivity and band-offsets with MoS2. The optimized process gives fully transparent TCO/MoS2 2D electronics with average visible-range transmittance of 85%. The transistors show high mobility (4.2 cm2 V−1 s−1), fast switching speed (0.114 V dec−1), very low threshold voltage (0.69 V), and large switching ratio (4 × 108). To our knowledge, these are the lowest threshold voltage and subthreshold swing values reported for monolayer chemical vapor deposition MoS2 transistors. The transparent inverters show fast switching properties with a gain of 155 at a supply voltage of 10 V. The results demonstrate that transparent conducting oxides can be used as contact materials for 2D semiconductors, which opens new possibilities in 2D electronic and photonic applications.

  9. Rapid prediction of ochratoxin A-producing strains of Penicillium on dry-cured meat by MOS-based electronic nose.

    Science.gov (United States)

    Lippolis, Vincenzo; Ferrara, Massimo; Cervellieri, Salvatore; Damascelli, Anna; Epifani, Filomena; Pascale, Michelangelo; Perrone, Giancarlo

    2016-02-01

    The availability of rapid diagnostic methods for monitoring ochratoxigenic species during the seasoning processes for dry-cured meats is crucial and constitutes a key stage in order to prevent the risk of ochratoxin A (OTA) contamination. A rapid, easy-to-perform and non-invasive method using an electronic nose (e-nose) based on metal oxide semiconductors (MOS) was developed to discriminate dry-cured meat samples in two classes based on the fungal contamination: class P (samples contaminated by OTA-producing Penicillium strains) and class NP (samples contaminated by OTA non-producing Penicillium strains). Two OTA-producing strains of Penicillium nordicum and two OTA non-producing strains of Penicillium nalgiovense and Penicillium salamii, were tested. The feasibility of this approach was initially evaluated by e-nose analysis of 480 samples of both Yeast extract sucrose (YES) and meat-based agar media inoculated with the tested Penicillium strains and incubated up to 14 days. The high recognition percentages (higher than 82%) obtained by Discriminant Function Analysis (DFA), either in calibration and cross-validation (leave-more-out approach), for both YES and meat-based samples demonstrated the validity of the used approach. The e-nose method was subsequently developed and validated for the analysis of dry-cured meat samples. A total of 240 e-nose analyses were carried out using inoculated sausages, seasoned by a laboratory-scale process and sampled at 5, 7, 10 and 14 days. DFA provided calibration models that permitted discrimination of dry-cured meat samples after only 5 days of seasoning with mean recognition percentages in calibration and cross-validation of 98 and 88%, respectively. A further validation of the developed e-nose method was performed using 60 dry-cured meat samples produced by an industrial-scale seasoning process showing a total recognition percentage of 73%. The pattern of volatile compounds of dry-cured meat samples was identified and

  10. The effect of large-area pulsed electron beam melting on the corrosion and microstructure of a Ti6Al4V alloy

    Energy Technology Data Exchange (ETDEWEB)

    Walker, J.C., E-mail: j.walker@soton.ac.uk [National Centre for Advanced Tribology at Southampton (nCATS), University of Southampton, Southampton SO17 1BJ (United Kingdom); Murray, J.W. [Institute for Advanced Manufacturing, University of Nottingham, Nottingham NG7 2RD (United Kingdom); Nie, M.; Cook, R.B. [National Centre for Advanced Tribology at Southampton (nCATS), University of Southampton, Southampton SO17 1BJ (United Kingdom); Clare, A.T. [Institute for Advanced Manufacturing, University of Nottingham, Nottingham NG7 2RD (United Kingdom)

    2014-08-30

    Graphical abstract: - Highlights: • Ti–6Al–4V alloy was large area electron beam melted at 1.38 J/cm{sup 2} energy density. • An alpha prime martensitic phase transformation occurred at the surface. • The surface martensite enhanced the corrosion rate by two orders of magnitude. • The treatment reduced the surface roughness and improved surface wettability. - Abstract: The use of titanium alloys in biomedical applications continues to increase due to the excellent stiffness to weight ratio and high corrosion resistance. In order to improve the surface wettability and corrosion properties of a Ti–6Al–4V alloy, the surface treatment method, large area electron beam melting technique was investigated. Polished samples were subject to pulsed treatments of 1, 15 and 25 at 1.38 J/cm{sup 2} beam energy. Surface roughness and contact wetting angles were reduced as a result of the treatment. Microstructural analysis of the surface by XRD and FIB-TEM revealed a martensitic alpha prime phase formed as a result of the high cooling rates induced by the treatment. The presence of this homogenous martensite layer was shown to facilitate a compact passive oxide layer formation during corrosion, thus improving corrosion rates by several orders of magnitude compared to an untreated sample. Large area electron beam melting of Ti–6Al–4V induced a number of changes to the near surface microstructure of the samples, all of which could be used to tailor mechanical and corrosion properties to that of a desired application, without compromising the bulk material properties. These are explored in detail in this work.

  11. Single-grain Si TFTs for high-speed flexible electronics

    Science.gov (United States)

    Ishihara, Ryoichi; Chen, Tao; van der Zwan, Michiel; He, Ming; Schellevis, H.; Beenakker, Kees

    2011-03-01

    Existent flat-panel display is mechanically stiff because it requires external connection of IC chips. At its present stage, displays with a-Si, metal oxide semiconductor or organic TFTs require still external connection of data driver and controllers, because of their low carrier mobilities. We will review our recent progress on direct formation of high speed Si circuits fabricated with a plastic compatible temperature. Large Si grains with a diameter of 4 microns were formed on predetermined positions by a pulsed laser crystallization process with a plastic compatible temperature. High performance transistors were fabricated inside a single Si grain.

  12. The effect of large-area pulsed electron beam melting on the corrosion and microstructure of a Ti6Al4V alloy

    Science.gov (United States)

    Walker, J. C.; Murray, J. W.; Nie, M.; Cook, R. B.; Clare, A. T.

    2014-08-01

    The use of titanium alloys in biomedical applications continues to increase due to the excellent stiffness to weight ratio and high corrosion resistance. In order to improve the surface wettability and corrosion properties of a Ti-6Al-4V alloy, the surface treatment method, large area electron beam melting technique was investigated. Polished samples were subject to pulsed treatments of 1, 15 and 25 at 1.38 J/cm2 beam energy. Surface roughness and contact wetting angles were reduced as a result of the treatment. Microstructural analysis of the surface by XRD and FIB-TEM revealed a martensitic alpha prime phase formed as a result of the high cooling rates induced by the treatment. The presence of this homogenous martensite layer was shown to facilitate a compact passive oxide layer formation during corrosion, thus improving corrosion rates by several orders of magnitude compared to an untreated sample. Large area electron beam melting of Ti-6Al-4V induced a number of changes to the near surface microstructure of the samples, all of which could be used to tailor mechanical and corrosion properties to that of a desired application, without compromising the bulk material properties. These are explored in detail in this work.

  13. A feasibility study for the provision of electronic healthcare tools and services in areas of Greece, Cyprus and Italy

    Directory of Open Access Journals (Sweden)

    Konnis Georgios

    2011-06-01

    Full Text Available Abstract Background Through this paper, we present the initial steps for the creation of an integrated platform for the provision of a series of eHealth tools and services to both citizens and travelers in isolated areas of thesoutheast Mediterranean, and on board ships travelling across it. The platform was created through an INTERREG IIIB ARCHIMED project called INTERMED. Methods The support of primary healthcare, home care and the continuous education of physicians are the three major issues that the proposed platform is trying to facilitate. The proposed system is based on state-of-the-art telemedicine systems and is able to provide the following healthcare services: i Telecollaboration and teleconsultation services between remotely located healthcare providers, ii telemedicine services in emergencies, iii home telecare services for "at risk" citizens such as the elderly and patients with chronic diseases, and iv eLearning services for the continuous training through seminars of both healthcare personnel (physicians, nurses etc and persons supporting "at risk" citizens. These systems support data transmission over simple phone lines, internet connections, integrated services digital network/digital subscriber lines, satellite links, mobile networks (GPRS/3G, and wireless local area networks. The data corresponds, among others, to voice, vital biosignals, still medical images, video, and data used by eLearning applications. The proposed platform comprises several systems, each supporting different services. These were integrated using a common data storage and exchange scheme in order to achieve system interoperability in terms of software, language and national characteristics. Results The platform has been installed and evaluated in different rural and urban sites in Greece, Cyprus and Italy. The evaluation was mainly related to technical issues and user satisfaction. The selected sites are, among others, rural health centers, ambulances

  14. Detection of Adulteration in Argan Oil by Using an Electronic Nose and a Voltammetric Electronic Tongue

    Directory of Open Access Journals (Sweden)

    Madiha Bougrini

    2014-01-01

    Full Text Available Adulteration detection of argan oil is one of the main aspects of its quality control. Following recent fraud scandals, it is mandatory to ensure product quality and customer protection. The aim of this study is to detect the percentages of adulteration of argan oil with sunflower oil by using the combination of a voltammetric e-tongue and an e-nose based on metal oxide semiconductor sensors and pattern recognition techniques. Data analysis is performed by three pattern recognition methods: principal component analysis (PCA, discriminant factor analysis (DFA, and support vector machines (SVMs. Excellent results were obtained in the differentiation between unadulterated and adulterated argan oil with sunflower one. To the best of our knowledge, this is the first attempt to demonstrate whether the combined e-nose and e-tongue technologies could be successfully applied to the detection of adulteration of argan oil.

  15. [Pollution Characteristics and Ecological Risk of PBDEs in Water and Sediment from an Electronic Waste Dismantling Area in Taizhou].

    Science.gov (United States)

    Chen, Xiang-ping; Peng, Bao-qi; Lü, Su-ping; Chen, Qiang; Zhang, Yong; Huang, Chang-jiang; Dong, Qiao-xiang

    2016-05-15

    An e-waste dismantling industrial park of Taizhou was selected as the sampling center, within a radius of 16 km, and a total of 30 sampling sites were designed in three circles as follows: C (3 km), S (5-10 km) and R (10-16 km). Pollution characteristics and ecological risk of polybrominated diphenyl ethers (PBDEs) in water and sediments were investigated. The concentrations of PBDEs in water ranged from 9.4 to 57.2 ng · L⁻¹, with a mean value of 25.9 ng · L⁻¹; and 3.7 to 38,775 ng · g⁻¹, with an average of 2 779 ng · g⁻¹ in sediments. BDE-209 was the predominant congener. The spatial distribution patterns of PBDE levels in water and sediment were both in the following order: C > S > R. Furthermore, the concentrations of PBDEs in sediments showed significant negative correlation against the distance from the industrial park (P waste dismantling activity was one of the significant sources for PBDEs pollution. It was estimated that a total of 30. 7 t PBDEs (including 28. 9 t BDE- 209) was discharged into surrounding environment as a result of dismantling industrial activities in last 40 years. A preliminary ecological risk assessment for PBDEs in water and sediments was conducted by hazard quotient method. The results demonstrated that the Penta-BDEs in the center of e-waste dismantling area ( a radius of 1.5 km) was at particularly high risk level and could cause serious influence on the ecological safety and human health.

  16. Deposition of TiO2/Al2O3 bilayer on hydrogenated diamond for electronic devices: Capacitors, field-effect transistors, and logic inverters

    Science.gov (United States)

    Liu, J. W.; Liao, M. Y.; Imura, M.; Banal, R. G.; Koide, Y.

    2017-06-01

    The wide bandgap semiconductor diamond has been studied to develop high-power and high-frequency electronic devices. Here, high dielectric constant (high-k) TiO2/Al2O3 bilayers are deposited on hydrogenated diamond (H-diamond) channel layers using sputter deposition (SD) and atomic layer deposition (ALD) techniques. Thin ALD-Al2O3 films are employed as buffer layers for the SD-TiO2 and ALD-TiO2 on H-diamond to suppress plasma discharge effect and to decrease leakage current density (J), respectively. The electrical properties of the resulting TiO2/Al2O3/H-diamond metal-oxide-semiconductor (MOS) capacitors, MOS field-effect transistors (MOSFETs), and MOSFET logic inverters are investigated. With the same thickness (4.0 nm) for ALD-Al2O3 buffer layer, the ALD-TiO2/ALD-Al2O3/H-diamond MOS capacitor shows a lower J and better capacitance-voltage characteristics than the SD-TiO2/ALD-Al2O3/H-diamond capacitor. The maximum capacitance of the ALD-TiO2/ALD-Al2O3/H-diamond capacitor and the k value of the ALD-TiO2/ALD-Al2O3 bilayer are 0.83 μF cm-2 and 27.2, respectively. Valence band offset between ALD-TiO2 and H-diamond is calculated to be 2.3 ± 0.2 eV based on the element binding energies measured using an X-ray photoelectron spectroscopy technique. Both the SD-TiO2/ALD-Al2O3/H-diamond and ALD-TiO2/ALD-Al2O3/H-diamond MOSFETs show p-type, pinch-off, and enhancement mode characteristics with on/off current ratios around 109. The subthreshold swings of them are 115 and as low as 79 mV dec-1, respectively. The ALD-TiO2/ALD-Al2O3/H-diamond MOSFET logic inverters, when coupled with load resistors, show distinct inversion characteristics with gains of 6.2-12.7.

  17. Use of the Scanning Electron Microscope to Develop Knowledge About the Geological Source Area in Rocks by Comparing Relative Intensities of X-ray Peaks

    Science.gov (United States)

    Patterson, Casey; Quarles, C. A.

    2001-10-01

    Use of the Scanning Electron Microscope to Develop Knowledge About the Geological Source Area in Rocks by Comparing Relative Intensities of X-ray Peaks PATTERSON, C., Department of Geology, Department of Physics, Texas Christian University, QUARLES, C.A., Department of Physics, Texas Christian University, Fort Worth, Texas The generation of characteristic X-rays by use of the Scanning Electron Microscope (SEM) allows scientists of all fields to determine the elemental makeup of a sample under study. Geologically, circumstances exist where the mineralogical makeup of a rock sample is too fine-grained to determine with a hand lens or optical microscope. Knowledge of the mineralogical composition of a rock sample reflects on the rock type at the source area. This can ultimately allow geologists to determine ancient environments of deposition, including climate, as well as establish ideas on spatial events in geologic history. The rock sample used in this experiment was a piece of the Barnett Shale, taken from a petroleum source rock core at Mitchell Energy well T.P. Sims 2, drilled in Wise County, Texas. Once the sample is placed under the SEM and X-ray measurements are taken, the spectrum is then analyzed to label characteristic peak energies and match it with an element. Then, a first-order correction can be made for the absorption of lower energy photons by the Be window into the detector, the Au plating on the Si crystal, and for the Si crystal itself. Finally, a second-order correction can be made for the K-shell ionization cross section of each element seen on the X-ray spectrum. The resulting number of counts in each peak, after both corrections, represents an overall bulk chemical composition of the sample. With this information, one can analyze the data and logically deduce the amount and type of minerals in the sample, which, in turn, will allow for conclusions about the source area.

  18. Vertical distribution of polybrominated diphenyl ethers (PBDEs) in soil cores taken from a typical electronic waste polluted area in South China.

    Science.gov (United States)

    Yang, Z Z; Li, Y F; Hou, Y X; Liang, H Y; Qin, Z F; Fu, S

    2010-02-01

    37 PBDE congeners were analyzed at six different depths in two soil cores taken from a typical electronic waste polluted area in South China. The PBDEs were congregated in the surface layer (0-5 cm) of soil cores and were 29 times in MK and 18 times in NW higher than the second lower layers (5-10 cm). As a whole, the concentrations of PBDEs were decreased with the soil depth increased in two cores. Lower brominated PBDE had higher penetrability than the deca-BDE in soil. The deca-BDE could be detected in deeper soil layers (15-20 cm in MK and 20-30 cm in NW) and the percentage of deca-BDE decreased with the increase of depth.

  19. New Forms of Electronic Tools in the Information and Communication, Used for Creating the European Higher Education Area and in e-Learning Development

    Directory of Open Access Journals (Sweden)

    Monika Krakowska

    2008-06-01

    Full Text Available The article is on the issues of using new ICT tools in the European educational area and carrying joint research works. The subject of the research were the forms of the traditional and electronic communication used within the virtual HERN organisation - Higher Education of Network Reforms – established by representatives of the academic circles as well as decision-makers. Special attention was paid to the e-forum. Also, the role of the moderator was analysed with reference to the e-forum. The author tried to determine the reason for low attendance during the e-argument. A method of analysis of documents and participating observation was applied. A technique of the questionnaire form and a method of case study were used to examine a group of HERN users. Results demonstrated that partners were becoming more involved in forms of face-to-face communication, such as conferences, than into forms of electronic communication. The most important barriers in the e-communication that have been determined included technical, linguistic and time-related problems.

  20. 电子地图在大数据政工领域的应用%Application of Electronic Map in Big Data Political Work Area

    Institute of Scientific and Technical Information of China (English)

    李伟

    2015-01-01

    The information storm of big data is spawning a new round of military contest.From the perspective of interpreting and analysing data,the electronic map develops into a new view and tool gradually.This paper studies how to introduce the electronic map to the big data political work area,making the different types of data clear and easy to read.The main purpose is to provide a service to the political department for analysing and processing data and promote the innovation of political work.%大数据带来的信息风暴,正在引发新一轮军事较量。从解读分析数据的角度看,电子地图逐步发展成为一种新的观察视角和方法工具。文章研究如何将电子地图引入大数据政工领域,使不同的数据类型在地图分布上一目了然、简洁易读,以期更好地服务于政治机关分析处理数据,推动政治工作创新发展。