The trade-off between safety and efficiency in hydraulic architecture in 31 woody species in a karst area.

Science.gov (United States)

Fan, Da-Yong; Jie, Sheng-Lin; Liu, Chang-Cheng; Zhang, Xiang-Ying; Xu, Xin-Wu; Zhang, Shou-Ren; Xie, Zong-Qiang

2011-08-01

Karst topography is a special landscape shaped by the dissolution of one or more layers of soluble bedrock, usually carbonate rock such as limestone or dolomite. Due to subterranean drainage, overland flow, extraction of water by plants and evapotranspiration, there may be very limited surface water. The hydraulic architecture that plants use to adapt to karst topography is very interesting, but few systematic reports exist. The karst area in southwestern China is unique when compared with other karst areas at similar latitudes, because of its abundant precipitation, with rainfall concentrated in the growing season. In theory, resistance to water-stress-induced cavitation via air seeding should be accompanied by decreased pore hydraulic conductivity and stem hydraulic conductivity. However, evidence for such trade-offs across species is ambiguous. We measured the hydraulic structure and foliar stable carbon isotope ratios of 31 karst woody plants at three locations in Guizhou Province, China, to evaluate the functional coordination between resistance to cavitation and specific conductivity. We also applied phylogenetically independent contrast (PIC) analysis in situations where the inter-species correlations of functional traits may be biased on the potential similarity of closely related species. The average xylem tension measurement, at which 50% of hydraulic conductivity of the plants was lost (Ψ(50)), was only -1.27 MPa. Stem Ψ(50) was positively associated with specific conductance (K(s)) (P sapwood area:leaf area ratio) was negatively correlated with K(s) in both the traditional cross-species correlation and the corresponding PIC correlations (P < 0.01). The characteristics of hydraulic architecture measured in this study showed that karst plants in China are not highly cavitation-resistant species. This study also supports the idea that there may not be an evolutionary trade-off between resistance to cavitation and specific conductivity in woody

EH-GC: An Efficient and Secure Architecture of Energy Harvesting Green Cloud Infrastructure

Directory of Open Access Journals (Sweden)

Saurabh Singh

2017-04-01

Full Text Available Nowadays, the high power consumption of data centers is the biggest challenge to making cloud computing greener. Many researchers are still seeking effective solutions to reduce or harvest the energy produced at data centers. To address this challenge, we propose a green cloud infrastructure which provides security and efficiency based on energy harvesting (EH-GC. The EH-GC is basically focused on harvesting the heat energy produced by data centers in the Infrastructure-as-a-Service (IaaS infrastructure. A pyroelectric material is used to generate the electric current from heat using the Olsen cycle. In order to achieve efficient green cloud computing, the architecture utilizes a genetic algorithm for proper virtual machine allocation, taking into consideration less Service Level Agreement (SLA violations. The architecture utilizes Multivariate Correlation Analysis (MCA correlation analysis based on a triangular map area generation to detect Denial of Service (DoS attacks in the data center layer of the IaaS. Finally, the experimental analysis is explained based on the energy parameter, which proves that our model is efficient and secure, and that it efficiently reuses the energy emitted from the data center.

High Efficiency EBCOT with Parallel Coding Architecture for JPEG2000

Directory of Open Access Journals (Sweden)

Chiang Jen-Shiun

2006-01-01

Full Text Available This work presents a parallel context-modeling coding architecture and a matching arithmetic coder (MQ-coder for the embedded block coding (EBCOT unit of the JPEG2000 encoder. Tier-1 of the EBCOT consumes most of the computation time in a JPEG2000 encoding system. The proposed parallel architecture can increase the throughput rate of the context modeling. To match the high throughput rate of the parallel context-modeling architecture, an efficient pipelined architecture for context-based adaptive arithmetic encoder is proposed. This encoder of JPEG2000 can work at 180 MHz to encode one symbol each cycle. Compared with the previous context-modeling architectures, our parallel architectures can improve the throughput rate up to 25%.

Zinc oxide integrated area efficient high output low power wavy channel thin film transistor

International Nuclear Information System (INIS)

Hanna, A. N.; Ghoneim, M. T.; Bahabry, R. R.; Hussain, A. M.; Hussain, M. M.

2013-01-01

We report an atomic layer deposition based zinc oxide channel material integrated thin film transistor using wavy channel architecture allowing expansion of the transistor width in the vertical direction using the fin type features. The experimental devices show area efficiency, higher normalized output current, and relatively lower power consumption compared to the planar architecture. This performance gain is attributed to the increased device width and an enhanced applied electric field due to the architecture when compared to a back gated planar device with the same process conditions

Zinc oxide integrated area efficient high output low power wavy channel thin film transistor

KAUST Repository

Hanna, Amir; Ghoneim, Mohamed T.; Bahabry, Rabab R.; Hussain, Aftab M.; Hussain, Muhammad Mustafa

2013-01-01

We report an atomic layer deposition based zinc oxide channel material integrated thin film transistor using wavy channel architecture allowing expansion of the transistor width in the vertical direction using the fin type features. The experimental devices show area efficiency, higher normalized output current, and relatively lower power consumption compared to the planar architecture. This performance gain is attributed to the increased device width and an enhanced applied electric field due to the architecture when compared to a back gated planar device with the same process conditions.

Zinc oxide integrated area efficient high output low power wavy channel thin film transistor

KAUST Repository

Hanna, Amir

2013-11-26

We report an atomic layer deposition based zinc oxide channel material integrated thin film transistor using wavy channel architecture allowing expansion of the transistor width in the vertical direction using the fin type features. The experimental devices show area efficiency, higher normalized output current, and relatively lower power consumption compared to the planar architecture. This performance gain is attributed to the increased device width and an enhanced applied electric field due to the architecture when compared to a back gated planar device with the same process conditions.

High-Level Design Space and Flexibility Exploration for Adaptive, Energy-Efficient WCDMA Channel Estimation Architectures

Directory of Open Access Journals (Sweden)

Zoltán Endre Rákossy

2012-01-01

Full Text Available Due to the fast changing wireless communication standards coupled with strict performance constraints, the demand for flexible yet high-performance architectures is increasing. To tackle the flexibility requirement, software-defined radio (SDR is emerging as an obvious solution, where the underlying hardware implementation is tuned via software layers to the varied standards depending on power-performance and quality requirements leading to adaptable, cognitive radio. In this paper, we conduct a case study for representatives of two complexity classes of WCDMA channel estimation algorithms and explore the effect of flexibility on energy efficiency using different implementation options. Furthermore, we propose new design guidelines for both highly specialized architectures and highly flexible architectures using high-level synthesis, to enable the required performance and flexibility to support multiple applications. Our experiments with various design points show that the resulting architectures meet the performance constraints of WCDMA and a wide range of options are offered for tuning such architectures depending on power/performance/area constraints of SDR.

Learning Methods for Efficient Adoption of Contemporary Technologies in Architectural Design

Science.gov (United States)

Mahdavinejad, Mohammadjavad; Dehghani, Sohaib; Shahsavari, Fatemeh

2013-01-01

The interaction between technology and history is one of the most significant issues in achieving an efficient and progressive architecture in any era. This is a concept which stems from lesson of traditional architecture of Iran. Architecture as a part of art, has permanently been transforming just like a living organism. In fact, it has been…

Wavy channel Thin Film Transistor for area efficient, high performance and low power applications

KAUST Repository

Hanna, Amir

2014-06-01

We report a new Thin Film Transistor (TFT) architecture that allows expansion of the device width using wavy (continuous without separation) fin features - termed as wavy channel (WC) architecture. This architecture allows expansion of transistor width in a direction perpendicular to the substrate, thus not consuming extra chip area, achieving area efficiency. The devices have shown for a 13% increase in the device width resulting in a maximum 2.4x increase in \\'ON\\' current value of the WCTFT, when compared to planar devices consuming the same chip area, while using atomic layer deposition based zinc oxide (ZnO) as the channel material. The WCTFT devices also maintain similar \\'OFF\\' current value, similar to 100 pA, when compared to planar devices, thus not compromising on power consumption for performance which usually happens with larger width devices. This work offers a pragmatic opportunity to use WCTFTs as backplane circuitry for large-area high-resolution display applications without any limitation any TFT materials.

An efficient architecture for LVQ-SLM for PAPR reduction

International Nuclear Information System (INIS)

Khalid, S.; Yasin, M.

2010-01-01

In this paper we propose an efficient architecture for the implementation of a LVQ (Learning Vector Quantization)NN (Neural Network), used as a classifier, for PAPR (Peak to Average Power Ratio) reduction. A special feature of the implementation is a combinatorial module for nearest neighbor search that allows online execution of this important operation during classification. The LVQ classifier is programmed in Verilog and the entire circuit is synthesized on FPGAs (Field Programmable Gate Arrays) using Xilinx at the rate ISE (Integrated Software Environment) 8.1i. The model is implemented with 64 sub carriers, considering the parametric values of WLANs standard IEEE 802.11a. Using the architecture, efficient on-line classification is achieved. (author)

Passive solar energy-efficient architectural building Design ...

African Journals Online (AJOL)

In this paper analyses have been done on the climate data for various climatic regions in North Cyprus to obtain physical architectural building design specification with a view to develop passive solar energy-efficient building. It utilizes a computer program, ARCHIPAK, together with climate data (for 25 year period) to get ...

Improving crop nutrient efficiency through root architecture modifications.

Science.gov (United States)

Li, Xinxin; Zeng, Rensen; Liao, Hong

2016-03-01

Improving crop nutrient efficiency becomes an essential consideration for environmentally friendly and sustainable agriculture. Plant growth and development is dependent on 17 essential nutrient elements, among them, nitrogen (N) and phosphorus (P) are the two most important mineral nutrients. Hence it is not surprising that low N and/or low P availability in soils severely constrains crop growth and productivity, and thereby have become high priority targets for improving nutrient efficiency in crops. Root exploration largely determines the ability of plants to acquire mineral nutrients from soils. Therefore, root architecture, the 3-dimensional configuration of the plant's root system in the soil, is of great importance for improving crop nutrient efficiency. Furthermore, the symbiotic associations between host plants and arbuscular mycorrhiza fungi/rhizobial bacteria, are additional important strategies to enhance nutrient acquisition. In this review, we summarize the recent advances in the current understanding of crop species control of root architecture alterations in response to nutrient availability and root/microbe symbioses, through gene or QTL regulation, which results in enhanced nutrient acquisition. © 2015 Institute of Botany, Chinese Academy of Sciences.

Computer Architecture for Energy Efficient SFQ

Science.gov (United States)

2014-08-27

IBM Corporation (T.J. Watson Research Laboratory) 1101 Kitchawan Road Yorktown Heights, NY 10598 -0000 2 ABSTRACT Number of Papers published in peer...accomplished during this ARO-sponsored project at IBM Research to identify and model an energy efficient SFQ-based computer architecture. The... IBM Windsor Blue (WB), illustrated schematically in Figure 2. The basic building block of WB is a "tile" comprised of a 64-bit arithmetic logic unit

Area efficient decimation filter based on merged delay transformation for wireless applications

International Nuclear Information System (INIS)

Rashid, U.; Siddiq, F.; Muhammad, T.; Jamal, H.

2013-01-01

Expected by 2014 is the 4G standard for cellular wireless communications, which will improve bandwidth, connectivity and roaming for mobile and stationary devices, 4G and other wireless systems are currently hot topics of research and development in the communication field. In wireless technologies like Global System for Mobile (GSM), Digital Enhanced Cordless Telecommunications (DECT) and Wi-Fi, decimation filters are essential part of transceivers being used. This paper describes a decimation filter which is efficient in terms of both the power consumption and the area used. The architecture is based upon Merged Delay Transformation (MDT). The existing Merged Delay Transformed Infinite Impulse Response (IIR) architecture is power efficient but requires larger area. The proposed and existing filters were implemented on Field-Programmable Gate Array (FPGA). The computational cost of the proposed filter is reduced to (3N/2 + 1) and M-1 times reduction in the number of multipliers in comparison to the existing FIR filter is achieved. The power consumption and speed remain nearly the same. (author)

Fiber to the serving area: telephone-like star architecture for CATV

Science.gov (United States)

Fellows, David M.

1992-02-01

CATV systems traditionally use a tree and branch architecture to bring up to 550 MHz of analog bandwidth to every home in a franchise area. This changed slightly with the advent of AM fiber optic equipment, as fiber optics were used in an overlay fashion to reduce coaxial amplifier cascades and improve subscriber quality and reliability. Within the last year, fiber has economically replaced coaxial trunking. The resulting fiber to the serving area architecture combines fiber and coaxial stars for a network that looks much like the carrier serving area architectures used by telephone companies.

An Efficient Reconfigurable Architecture for Fingerprint Recognition

Directory of Open Access Journals (Sweden)

Satish S. Bhairannawar

2016-01-01

Full Text Available The fingerprint identification is an efficient biometric technique to authenticate human beings in real-time Big Data Analytics. In this paper, we propose an efficient Finite State Machine (FSM based reconfigurable architecture for fingerprint recognition. The fingerprint image is resized, and Compound Linear Binary Pattern (CLBP is applied on fingerprint, followed by histogram to obtain histogram CLBP features. Discrete Wavelet Transform (DWT Level 2 features are obtained by the same methodology. The novel matching score of CLBP is computed using histogram CLBP features of test image and fingerprint images in the database. Similarly, the DWT matching score is computed using DWT features of test image and fingerprint images in the database. Further, the matching scores of CLBP and DWT are fused with arithmetic equation using improvement factor. The performance parameters such as TSR (Total Success Rate, FAR (False Acceptance Rate, and FRR (False Rejection Rate are computed using fusion scores with correlation matching technique for FVC2004 DB3 Database. The proposed fusion based VLSI architecture is synthesized on Virtex xc5vlx30T-3 FPGA board using Finite State Machine resulting in optimized parameters.

Area and energy efficient high-performance ZnO wavy channel thin-film transistor

KAUST Repository

Hanna, Amir

2014-09-01

Increased output current while maintaining low power consumption in thin-film transistors (TFTs) is essential for future generation large-area high-resolution displays. Here, we show wavy channel (WC) architecture in TFT that allows the expansion of the transistor width in the direction perpendicular to the substrate through integrating continuous fin features on the underlying substrate. This architecture enables expanding the TFT width without consuming any additional chip area, thus enabling increased performance while maintaining the real estate integrity. The experimental WCTFTs show a linear increase in output current as a function of number of fins per device resulting in (3.5×) increase in output current when compared with planar counterparts that consume the same chip area. The new architecture also allows tuning the threshold voltage as a function of the number of fin features included in the device, as threshold voltage linearly decreased from 6.8 V for planar device to 2.6 V for WC devices with 32 fins. This makes the new architecture more power efficient as lower operation voltages could be used for WC devices compared with planar counterparts. It was also found that field effect mobility linearly increases with the number of fins included in the device, showing almost \\\\(1.8×) enhancements in the field effect mobility than that of the planar counterparts. This can be attributed to higher electric field in the channel due to the fin architecture and threshold voltage shift. © 2014 IEEE.

A high efficiency readout architecture for a large matrix of pixels.

Science.gov (United States)

Gabrielli, A.; Giorgi, F.; Villa, M.

2010-07-01

In this work we present a fast readout architecture for silicon pixel matrix sensors that has been designed to sustain very high rates, above 1 MHz/mm2 for matrices greater than 80k pixels. This logic can be implemented within MAPS (Monolithic Active Pixel Sensors), a kind of high resolution sensor that integrates on the same bulk the sensor matrix and the CMOS logic for readout, but it can be exploited also with other technologies. The proposed architecture is based on three main concepts. First of all, the readout of the hits is performed by activating one column at a time; all the fired pixels on the active column are read, sparsified and reset in parallel in one clock cycle. This implies the use of global signals across the sensor matrix. The consequent reduction of metal interconnections improves the active area while maintaining a high granularity (down to a pixel pitch of 40 μm). Secondly, the activation for readout takes place only for those columns overlapping with a certain fired area, thus reducing the sweeping time of the whole matrix and reducing the pixel dead-time. Third, the sparsification (x-y address labeling of the hits) is performed with a lower granularity with respect to single pixels, by addressing vertical zones of 8 pixels each. The fine-grain Y resolution is achieved by appending the zone pattern to the zone address of a hit. We show then the benefits of this technique in presence of clusters. We describe this architecture from a schematic point of view, then presenting the efficiency results obtained by VHDL simulations.

A high efficiency readout architecture for a large matrix of pixels

International Nuclear Information System (INIS)

Gabrielli, A; Giorgi, F; Villa, M

2010-01-01

In this work we present a fast readout architecture for silicon pixel matrix sensors that has been designed to sustain very high rates, above 1 MHz/mm 2 for matrices greater than 80k pixels. This logic can be implemented within MAPS (Monolithic Active Pixel Sensors), a kind of high resolution sensor that integrates on the same bulk the sensor matrix and the CMOS logic for readout, but it can be exploited also with other technologies. The proposed architecture is based on three main concepts. First of all, the readout of the hits is performed by activating one column at a time; all the fired pixels on the active column are read, sparsified and reset in parallel in one clock cycle. This implies the use of global signals across the sensor matrix. The consequent reduction of metal interconnections improves the active area while maintaining a high granularity (down to a pixel pitch of 40 μm). Secondly, the activation for readout takes place only for those columns overlapping with a certain fired area, thus reducing the sweeping time of the whole matrix and reducing the pixel dead-time. Third, the sparsification (x-y address labeling of the hits) is performed with a lower granularity with respect to single pixels, by addressing vertical zones of 8 pixels each. The fine-grain Y resolution is achieved by appending the zone pattern to the zone address of a hit. We show then the benefits of this technique in presence of clusters. We describe this architecture from a schematic point of view, then presenting the efficiency results obtained by VHDL simulations.

Efficient network-matrix architecture for general flow transport inspired by natural pinnate leaves.

Science.gov (United States)

Hu, Liguo; Zhou, Han; Zhu, Hanxing; Fan, Tongxiang; Zhang, Di

2014-11-14

Networks embedded in three dimensional matrices are beneficial to deliver physical flows to the matrices. Leaf architectures, pervasive natural network-matrix architectures, endow leaves with high transpiration rates and low water pressure drops, providing inspiration for efficient network-matrix architectures. In this study, the network-matrix model for general flow transport inspired by natural pinnate leaves is investigated analytically. The results indicate that the optimal network structure inspired by natural pinnate leaves can greatly reduce the maximum potential drop and the total potential drop caused by the flow through the network while maximizing the total flow rate through the matrix. These results can be used to design efficient networks in network-matrix architectures for a variety of practical applications, such as tissue engineering, cell culture, photovoltaic devices and heat transfer.

Efficient Sorting on the Tilera Manycore Architecture

Energy Technology Data Exchange (ETDEWEB)

Morari, Alessandro; Tumeo, Antonino; Villa, Oreste; Secchi, Simone; Valero, Mateo

2012-10-24

e present an efficient implementation of the radix sort algo- rithm for the Tilera TILEPro64 processor. The TILEPro64 is one of the first successful commercial manycore processors. It is com- posed of 64 tiles interconnected through multiple fast Networks- on-chip and features a fully coherent, shared distributed cache. The architecture has a large degree of flexibility, and allows various optimization strategies. We describe how we mapped the algorithm to this architecture. We present an in-depth analysis of the optimizations for each phase of the algorithm with respect to the processor’s sustained performance. We discuss the overall throughput reached by our radix sort implementation (up to 132 MK/s) and show that it provides comparable or better performance-per-watt with respect to state-of-the art implemen- tations on x86 processors and graphic processing units.

Centralized and Modular Architectures for Photovoltaic Panels with Improved Efficiency: Preprint

Energy Technology Data Exchange (ETDEWEB)

Dhakal, B.; Mancilla-David, F.; Muljadi, E.

2012-07-01

The most common type of photovoltaic installation in residential applications is the centralized architecture, but the performance of a centralized architecture is adversely affected when it is subject to partial shading effects due to clouds or surrounding obstacles, such as trees. An alternative modular approach can be implemented using several power converters with partial throughput power processing capability. This paper presents a detailed study of these two architectures for the same throughput power level and compares the overall efficiencies using a set of rapidly changing real solar irradiance data collected by the Solar Radiation Research Laboratory at the National Renewable Energy Laboratory.

An efficient architecture for the integration of sensor and actuator networks into the future internet

Science.gov (United States)

Schneider, J.; Klein, A.; Mannweiler, C.; Schotten, H. D.

2011-08-01

In the future, sensors will enable a large variety of new services in different domains. Important application areas are service adaptations in fixed and mobile environments, ambient assisted living, home automation, traffic management, as well as management of smart grids. All these applications will share a common property, the usage of networked sensors and actuators. To ensure an efficient deployment of such sensor-actuator networks, concepts and frameworks for managing and distributing sensor data as well as for triggering actuators need to be developed. In this paper, we present an architecture for integrating sensors and actuators into the future Internet. In our concept, all sensors and actuators are connected via gateways to the Internet, that will be used as comprehensive transport medium. Additionally, an entity is needed for registering all sensors and actuators, and managing sensor data requests. We decided to use a hierarchical structure, comparable to the Domain Name Service. This approach realizes a cost-efficient architecture disposing of "plug and play" capabilities and accounting for privacy issues.

The column architecture -- A novel architecture for event driven 2D pixel imagers

International Nuclear Information System (INIS)

Millaud, J.; Nygren, D.

1996-01-01

The authors describe an electronic architecture for two-dimensional pixel arrays that permits very large increases in rate capability for event- or data-driven applications relative to conventional x-y architectures. The column architecture also permits more efficient use of silicon area in applications requiring local buffering, frameless data acquisition, and it avoids entirely the problem of ambiguities that may arise in conventional approaches. Two examples of active implementation are described: high energy physics and protein crystallography

High-throughput sample adaptive offset hardware architecture for high-efficiency video coding

Science.gov (United States)

Zhou, Wei; Yan, Chang; Zhang, Jingzhi; Zhou, Xin

2018-03-01

A high-throughput hardware architecture for a sample adaptive offset (SAO) filter in the high-efficiency video coding video coding standard is presented. First, an implementation-friendly and simplified bitrate estimation method of rate-distortion cost calculation is proposed to reduce the computational complexity in the mode decision of SAO. Then, a high-throughput VLSI architecture for SAO is presented based on the proposed bitrate estimation method. Furthermore, multiparallel VLSI architecture for in-loop filters, which integrates both deblocking filter and SAO filter, is proposed. Six parallel strategies are applied in the proposed in-loop filters architecture to improve the system throughput and filtering speed. Experimental results show that the proposed in-loop filters architecture can achieve up to 48% higher throughput in comparison with prior work. The proposed architecture can reach a high-operating clock frequency of 297 MHz with TSMC 65-nm library and meet the real-time requirement of the in-loop filters for 8 K × 4 K video format at 132 fps.

Designing area optimized application-specific network-on-chip architectures while providing hard QoS guarantees.

Directory of Open Access Journals (Sweden)

Sajid Gul Khawaja

Full Text Available With the increase of transistors' density, popularity of System on Chip (SoC has increased exponentially. As a communication module for SoC, Network on Chip (NoC framework has been adapted as its backbone. In this paper, we propose a methodology for designing area-optimized application specific NoC while providing hard Quality of Service (QoS guarantees for real time flows. The novelty of the proposed system lies in derivation of a Mixed Integer Linear Programming model which is then used to generate a resource optimal Network on Chip (NoC topology and architecture while considering traffic and QoS requirements. We also present the micro-architectural design features used for enabling traffic and latency guarantees and discuss how the solution adapts for dynamic variations in the application traffic. The paper highlights the effectiveness of proposed method by generating resource efficient NoC solutions for both industrial and benchmark applications. The area-optimized results are generated in few seconds by proposed technique, without resorting to heuristics, even for an application with 48 traffic flows.

DART: A Functional-Level Reconfigurable Architecture for High Energy Efficiency

Directory of Open Access Journals (Sweden)

David Raphaël

2008-01-01

Full Text Available Abstract Flexibility becomes a major concern for the development of multimedia and mobile communication systems, as well as classical high-performance and low-energy consumption constraints. The use of general-purpose processors solves flexibility problems but fails to cope with the increasing demand for energy efficiency. This paper presents the DART architecture based on the functional-level reconfiguration paradigm which allows a significant improvement in energy efficiency. DART is built around a hierarchical interconnection network allowing high flexibility while keeping the power overhead low. To enable specific optimizations, DART supports two modes of reconfiguration. The compilation framework is built using compilation and high-level synthesis techniques. A 3G mobile communication application has been implemented as a proof of concept. The energy distribution within the architecture and the physical implementation are also discussed. Finally, the VLSI design of a 0.13  m CMOS SoC implementing a specialized DART cluster is presented.

DART: A Functional-Level Reconfigurable Architecture for High Energy Efficiency

Directory of Open Access Journals (Sweden)

Sébastien Pillement

2007-12-01

Full Text Available Flexibility becomes a major concern for the development of multimedia and mobile communication systems, as well as classical high-performance and low-energy consumption constraints. The use of general-purpose processors solves flexibility problems but fails to cope with the increasing demand for energy efficiency. This paper presents the DART architecture based on the functional-level reconfiguration paradigm which allows a significant improvement in energy efficiency. DART is built around a hierarchical interconnection network allowing high flexibility while keeping the power overhead low. To enable specific optimizations, DART supports two modes of reconfiguration. The compilation framework is built using compilation and high-level synthesis techniques. A 3G mobile communication application has been implemented as a proof of concept. The energy distribution within the architecture and the physical implementation are also discussed. Finally, the VLSI design of a 0.13 μm CMOS SoC implementing a specialized DART cluster is presented.

Area analysis of interconnection networks implemented on the honeycomb architecture

Energy Technology Data Exchange (ETDEWEB)

Milutinovic, D

1996-12-31

The are utilization of interconnection networks for parallel processing on one form of uniform parallel architecture of cellular type is analyzed. Formulae for the number of cells necessity to realize a networks and the efficiency factor of the system are derived. 15 refs.

DSP Architecture Design Essentials

CERN Document Server

Marković, Dejan

2012-01-01

In DSP Architecture Design Essentials, authors Dejan Marković and Robert W. Brodersen cover a key subject for the successful realization of DSP algorithms for communications, multimedia, and healthcare applications. The book addresses the need for DSP architecture design that maps advanced DSP algorithms to hardware in the most power- and area-efficient way. The key feature of this text is a design methodology based on a high-level design model that leads to hardware implementation with minimum power and area. The methodology includes algorithm-level considerations such as automated word-length reduction and intrinsic data properties that can be leveraged to reduce hardware complexity. From a high-level data-flow graph model, an architecture exploration methodology based on linear programming is used to create an array of architectural solutions tailored to the underlying hardware technology. The book is supplemented with online material: bibliography, design examples, CAD tutorials and custom software.

How to understand architectural quality when working with social housing areas

DEFF Research Database (Denmark)

Jensen, Kirstine Brøgger

2015-01-01

This paper debates how to understand architectural quality when working with social housing areas. The concept is discussed through three approaches: 1) Social housing is debated in relation to societal and historical contributions. 2) Well known definitions (from the old-timer Vitruvius...... to the current sustainability agenda) are outlined according to their pros´n cons when working with social housing areas. 3) On the ground of interviews with practitioners the everyday use and understanding of the concept is scrutinized In this vein the paper agitates that architectural quality in social housing...

Transforming the existing building stock to high performed energy efficient and experienced architecture

DEFF Research Database (Denmark)

Vestergaard, Inge

architectural heritage to energy efficiency and from architectural quality to sustainability. The first, second and third renovations are discussed from financial and sustainable view points. The role of housing related to the public energy supply system and the relation between the levels of renovation......The project Sustainable Renovation examines the challenge of the current and future architectural renovation of Danish suburbs which were designed in the period from 1945 to 1973. The research project takes its starting point in the perspectives of energy optimization and the fact that the building...

Energy-efficient buildings are environmentally friendly, architecturally attractive and economically compelling

International Nuclear Information System (INIS)

Wafa, Latifa Mohamed

2006-01-01

Standard building construction is wasteful, toxic, and is destroying the environment. It produced buildings that operate independently of its natural surrounding and depended heavily on mechanical systems that run with fossil fuel to create comfortable indoor environment. These buildings caused a wide range of health and environmental problems. The concern about the consequences of standard building construction have prompted countless experiments and design improvements to make built environment more energy efficient, less reliant on potentially limited fossil fuels and more reliant on renewable energy resources. The application of energy efficient technologies can make significant contribution to meeting the building and construction sector's energy demand, while at the same time providing better built environment, offering more comfortable living and working conditions for the users, cleaner and healthier in-outdoor environment, and cost no more to build. The proposes of the paper are to: 1-Promote the implementation of Energy-Efficient buildings through vigorous efforts, by engaging government agencies, design professions, engineers, and construction industry in the task of radically improving the performance of our buildings, neighborhoods, and cities. 2-Educate the general public (the consumers) that Energy-Efficient Building is good for their well-being, to their pocket and to the environment.3-Demonstrate that Energy-efficient Building are with highest standards of architecture design, the highest quality living and working environment and within a reasonable budget. The paper describes the technological options available for dealing sensibly with energy and focuses on the important areas of new building constructions and building refurbishment together with its specific energy requirements. The approach presented in this paper is just one of many methods of planning energy efficient buildings.This paper is part of the effort to promote Energy-efficient

Highly efficient phosphorescent blue and white organic light-emitting devices with simplified architectures

Energy Technology Data Exchange (ETDEWEB)

Chang, Chih-Hao, E-mail: chc@saturn.yzu.edu.tw [Department of Photonics Engineering, Yuan Ze University, Chung-Li, Taiwan 32003 (China); Ding, Yong-Shung; Hsieh, Po-Wei; Chang, Chien-Ping; Lin, Wei-Chieh [Department of Photonics Engineering, Yuan Ze University, Chung-Li, Taiwan 32003 (China); Chang, Hsin-Hua, E-mail: hhua3@mail.vnu.edu.tw [Department of Electro-Optical Engineering, Vanung University, Chung-Li, Taiwan 32061 (China)

2011-09-01

Blue phosphorescent organic light-emitting devices (PhOLEDs) with quantum efficiency close to the theoretical maximum were achieved by utilizing a double-layer architecture. Two wide-triplet-gap materials, 1,3-bis(9-carbazolyl)benzene and 1,3,5-tri[(3-pyridyl)-phen-3-yl]benzene, were employed in the emitting and electron-transport layers respectively. The opposite carrier-transport characteristics of these two materials were leveraged to define the exciton formation zone and thus increase the probability of recombination. The efficiency at practical luminance (100 cd/m{sup 2}) was as high as 20.8%, 47.7 cd/A and 31.2 lm/W, respectively. Furthermore, based on the design concept of this simplified architecture, efficient warmish-white PhOLEDs were developed. Such two-component white organic light-emitting devices exhibited rather stable colors over a wide brightness range and yielded electroluminescence efficiencies of 15.3%, 33.3 cd/A, and 22.7 lm/W in the forward directions.

Highly efficient phosphorescent blue and white organic light-emitting devices with simplified architectures

International Nuclear Information System (INIS)

Chang, Chih-Hao; Ding, Yong-Shung; Hsieh, Po-Wei; Chang, Chien-Ping; Lin, Wei-Chieh; Chang, Hsin-Hua

2011-01-01

Blue phosphorescent organic light-emitting devices (PhOLEDs) with quantum efficiency close to the theoretical maximum were achieved by utilizing a double-layer architecture. Two wide-triplet-gap materials, 1,3-bis(9-carbazolyl)benzene and 1,3,5-tri[(3-pyridyl)-phen-3-yl]benzene, were employed in the emitting and electron-transport layers respectively. The opposite carrier-transport characteristics of these two materials were leveraged to define the exciton formation zone and thus increase the probability of recombination. The efficiency at practical luminance (100 cd/m 2 ) was as high as 20.8%, 47.7 cd/A and 31.2 lm/W, respectively. Furthermore, based on the design concept of this simplified architecture, efficient warmish-white PhOLEDs were developed. Such two-component white organic light-emitting devices exhibited rather stable colors over a wide brightness range and yielded electroluminescence efficiencies of 15.3%, 33.3 cd/A, and 22.7 lm/W in the forward directions.

An efficient spectral crystal plasticity solver for GPU architectures

Science.gov (United States)

Malahe, Michael

2018-03-01

We present a spectral crystal plasticity (CP) solver for graphics processing unit (GPU) architectures that achieves a tenfold increase in efficiency over prior GPU solvers. The approach makes use of a database containing a spectral decomposition of CP simulations performed using a conventional iterative solver over a parameter space of crystal orientations and applied velocity gradients. The key improvements in efficiency come from reducing global memory transactions, exposing more instruction-level parallelism, reducing integer instructions and performing fast range reductions on trigonometric arguments. The scheme also makes more efficient use of memory than prior work, allowing for larger problems to be solved on a single GPU. We illustrate these improvements with a simulation of 390 million crystal grains on a consumer-grade GPU, which executes at a rate of 2.72 s per strain step.

High-Efficient Parallel CAVLC Encoders on Heterogeneous Multicore Architectures

Directory of Open Access Journals (Sweden)

H. Y. Su

2012-04-01

Full Text Available This article presents two high-efficient parallel realizations of the context-based adaptive variable length coding (CAVLC based on heterogeneous multicore processors. By optimizing the architecture of the CAVLC encoder, three kinds of dependences are eliminated or weaken, including the context-based data dependence, the memory accessing dependence and the control dependence. The CAVLC pipeline is divided into three stages: two scans, coding, and lag packing, and be implemented on two typical heterogeneous multicore architectures. One is a block-based SIMD parallel CAVLC encoder on multicore stream processor STORM. The other is a component-oriented SIMT parallel encoder on massively parallel architecture GPU. Both of them exploited rich data-level parallelism. Experiments results show that compared with the CPU version, more than 70 times of speedup can be obtained for STORM and over 50 times for GPU. The implementation of encoder on STORM can make a real-time processing for 1080p @30fps and GPU-based version can satisfy the requirements for 720p real-time encoding. The throughput of the presented CAVLC encoders is more than 10 times higher than that of published software encoders on DSP and multicore platforms.

Efficient universal computing architectures for decoding neural activity.

Directory of Open Access Journals (Sweden)

Benjamin I Rapoport

Full Text Available The ability to decode neural activity into meaningful control signals for prosthetic devices is critical to the development of clinically useful brain- machine interfaces (BMIs. Such systems require input from tens to hundreds of brain-implanted recording electrodes in order to deliver robust and accurate performance; in serving that primary function they should also minimize power dissipation in order to avoid damaging neural tissue; and they should transmit data wirelessly in order to minimize the risk of infection associated with chronic, transcutaneous implants. Electronic architectures for brain- machine interfaces must therefore minimize size and power consumption, while maximizing the ability to compress data to be transmitted over limited-bandwidth wireless channels. Here we present a system of extremely low computational complexity, designed for real-time decoding of neural signals, and suited for highly scalable implantable systems. Our programmable architecture is an explicit implementation of a universal computing machine emulating the dynamics of a network of integrate-and-fire neurons; it requires no arithmetic operations except for counting, and decodes neural signals using only computationally inexpensive logic operations. The simplicity of this architecture does not compromise its ability to compress raw neural data by factors greater than [Formula: see text]. We describe a set of decoding algorithms based on this computational architecture, one designed to operate within an implanted system, minimizing its power consumption and data transmission bandwidth; and a complementary set of algorithms for learning, programming the decoder, and postprocessing the decoded output, designed to operate in an external, nonimplanted unit. The implementation of the implantable portion is estimated to require fewer than 5000 operations per second. A proof-of-concept, 32-channel field-programmable gate array (FPGA implementation of this portion

ZnO@TiO2 Architectures for a High Efficiency Dye-Sensitized Solar Cell

International Nuclear Information System (INIS)

Lei, Jianfei; Liu, Shuli; Du, Kai; Lv, Shijie; Liu, Chaojie; Zhao, Lingzhi

2015-01-01

Graphical Abstract: A fast and improved electrochemical process was reported to fabricate ZnO@TiO 2 heterogeneous architectures with enhanced power conversion efficiency (ƞ = 2.16%). This paper focuses on achieving high dye loading via binding noncorrosive TiO 2 nanocones to the outermost layer, while retaining the excellent electron transport behavior of the ZnO-based internal layer. Display Omitted -- Highlights: • Nanoconic TiO 2 particles are loaded on the surface of aligned ZnO NWs successfully by a liquid phase deposition method. • ZnO@TiO 2 architectures exhibit high efficiency of the DSSCs. -- Abstract: Instead of the spin coating step, an improved electrochemical process is reported in this paper to prepare ZnO seeded substrates and ZnO nanowires (ZnO NWs). Vertically aligned ZnO NWs are deposited electrochemically on the ZnO seeded substrates directly forming backbones for loading nanoconic TiO 2 particles, and hence ZnO@TiO 2 heterogeneous architectures are obtained. When used as photoanode materials of the dye-sensitized solar cells (DSSCs), ZnO@TiO 2 architectures exhibit enhanced power conversion efficiency (PCE) of the DSSCs. Results of the solar cell testing show that addition of TiO 2 shells to the ZnO NWs significantly increases short circuit current (from 2.6 to 4.7 mA cm −2 ), open circuit voltage (from 0.53 V to 0.77 V) and fill factor (from 0.30 to 0.59). The PCE jumped from 0.4% for bare ZnO NWs to 2.16% for ZnO@TiO 2 architectures under 100 mW cm −2 of AM 1.5 G illumination

Survey on efficient linear solvers for porous media flow models on recent hardware architectures

International Nuclear Information System (INIS)

Anciaux-Sedrakian, Ani; Gratien, Jean-Marc; Guignon, Thomas; Gottschling, Peter

2014-01-01

In the past few years, High Performance Computing (HPC) technologies led to General Purpose Processing on Graphics Processing Units (GPGPU) and many-core architectures. These emerging technologies offer massive processing units and are interesting for porous media flow simulators may used for CO 2 geological sequestration or Enhanced Oil Recovery (EOR) simulation. However the crucial point is 'are current algorithms and software able to use these new technologies efficiently?' The resolution of large sparse linear systems, almost ill-conditioned, constitutes the most CPU-consuming part of such simulators. This paper proposes a survey on various solver and pre-conditioner algorithms, analyzes their efficiency and performance regarding these distinct architectures. Furthermore it proposes a novel approach based on a hybrid programming model for both GPU and many-core clusters. The proposed optimization techniques are validated through a Krylov subspace solver; BiCGStab and some pre-conditioners like ILU0 on GPU, multi-core and many-core architectures, on various large real study cases in EOR simulation. (authors)

An Area-Efficient Reconfigurable LDPC Decoder with Conflict Resolution

Science.gov (United States)

Zhou, Changsheng; Huang, Yuebin; Huang, Shuangqu; Chen, Yun; Zeng, Xiaoyang

Based on Turbo-Decoding Message-Passing (TDMP) and Normalized Min-Sum (NMS) algorithm, an area efficient LDPC decoder that supports both structured and unstructured LDPC codes is proposed in this paper. We introduce a solution to solve the memory access conflict problem caused by TDMP algorithm. We also arrange the main timing schedule carefully to handle the operations of our solution while avoiding much additional hardware consumption. To reduce the memory bits needed, the extrinsic message storing strategy is also optimized. Besides the extrinsic message recover and the accumulate operation are merged together. To verify our architecture, a LDPC decoder that supports both China Multimedia Mobile Broadcasting (CMMB) and Digital Terrestrial/ Television Multimedia Broadcasting (DTMB) standards is developed using SMIC 0.13µm standard CMOS process. The core area is 4.75mm2 and the maximum operating clock frequency is 200MHz. The estimated power consumption is 48.4mW at 25MHz for CMMB and 130.9mW at 50MHz for DTMB with 5 iterations and 1.2V supply.

Area efficient radix 4/sup 2/ 64 point pipeline fft architecture using modified csd multiplier

International Nuclear Information System (INIS)

Siddiq, F.; Muhammad, T.; Iqbal, M.

2014-01-01

A modified Fast Fourier Transform (FFT) based radix 42 algorithm for Orthogonal Frequency Division Multiplexing (OFDM) systems is presented. When compared with similar schemes like Canonic signed digit (CSD) Constant Multiplier, the modified CSD multiplier can provide a improvement of more than 36% in terms of multiplicative complexity. In Comparison of area being occupied the amount of Full adders is reduced by 32% and amount of half adders is reduced by 42%. The modified CSD multiplier scheme is implemented on Xilinx ISE 10.1 using Spartan-III XC3S1000 FPGA as a target device. The synthesis results of modified CSD Multiplier on Xilinx show efficient Twiddle Factor ROM Design and effective area reduction in comparison to CSD constant multiplier. (author)

An Efficient VLSI Architecture for Multi-Channel Spike Sorting Using a Generalized Hebbian Algorithm

Directory of Open Access Journals (Sweden)

Ying-Lun Chen

2015-08-01

Full Text Available A novel VLSI architecture for multi-channel online spike sorting is presented in this paper. In the architecture, the spike detection is based on nonlinear energy operator (NEO, and the feature extraction is carried out by the generalized Hebbian algorithm (GHA. To lower the power consumption and area costs of the circuits, all of the channels share the same core for spike detection and feature extraction operations. Each channel has dedicated buffers for storing the detected spikes and the principal components of that channel. The proposed circuit also contains a clock gating system supplying the clock to only the buffers of channels currently using the computation core to further reduce the power consumption. The architecture has been implemented by an application-specific integrated circuit (ASIC with 90-nm technology. Comparisons to the existing works show that the proposed architecture has lower power consumption and hardware area costs for real-time multi-channel spike detection and feature extraction.

An Efficient VLSI Architecture for Multi-Channel Spike Sorting Using a Generalized Hebbian Algorithm.

Science.gov (United States)

Chen, Ying-Lun; Hwang, Wen-Jyi; Ke, Chi-En

2015-08-13

A novel VLSI architecture for multi-channel online spike sorting is presented in this paper. In the architecture, the spike detection is based on nonlinear energy operator (NEO), and the feature extraction is carried out by the generalized Hebbian algorithm (GHA). To lower the power consumption and area costs of the circuits, all of the channels share the same core for spike detection and feature extraction operations. Each channel has dedicated buffers for storing the detected spikes and the principal components of that channel. The proposed circuit also contains a clock gating system supplying the clock to only the buffers of channels currently using the computation core to further reduce the power consumption. The architecture has been implemented by an application-specific integrated circuit (ASIC) with 90-nm technology. Comparisons to the existing works show that the proposed architecture has lower power consumption and hardware area costs for real-time multi-channel spike detection and feature extraction.

An Efficient VLSI Architecture for Multi-Channel Spike Sorting Using a Generalized Hebbian Algorithm

Science.gov (United States)

Chen, Ying-Lun; Hwang, Wen-Jyi; Ke, Chi-En

2015-01-01

A novel VLSI architecture for multi-channel online spike sorting is presented in this paper. In the architecture, the spike detection is based on nonlinear energy operator (NEO), and the feature extraction is carried out by the generalized Hebbian algorithm (GHA). To lower the power consumption and area costs of the circuits, all of the channels share the same core for spike detection and feature extraction operations. Each channel has dedicated buffers for storing the detected spikes and the principal components of that channel. The proposed circuit also contains a clock gating system supplying the clock to only the buffers of channels currently using the computation core to further reduce the power consumption. The architecture has been implemented by an application-specific integrated circuit (ASIC) with 90-nm technology. Comparisons to the existing works show that the proposed architecture has lower power consumption and hardware area costs for real-time multi-channel spike detection and feature extraction. PMID:26287193

Performance Analysis of Multiradio Transmitter with Polar or Cartesian Architectures Associated with High Efficiency Switched-Mode Power Amplifiers (invited paper

Directory of Open Access Journals (Sweden)

F. Robert

2010-12-01

Full Text Available This paper deals with wireless multi-radio transmitter architectures operating in the frequency band of 800 MHz – 6 GHz. As a consequence of the constant evolution in the communication systems, mobile transmitters must be able to operate at different frequency bands and modes according to existing standards specifications. The concept of a unique multiradio architecture is an evolution of the multistandard transceiver characterized by a parallelization of circuits for each standard. Multi-radio concept optimizes surface and power consumption. Transmitter architectures using sampling techniques and baseband ΣΔ or PWM coding of signals before their amplification appear as good candidates for multiradio transmitters for several reasons. They allow using high efficiency power amplifiers such as switched-mode PAs. They are highly flexible and easy to integrate because of their digital nature. But when the transmitter efficiency is considered, many elements have to be taken into account: signal coding efficiency, PA efficiency, RF filter. This paper investigates the interest of these architectures for a multiradio transmitter able to support existing wireless communications standards between 800 MHz and 6 GHz. It evaluates and compares the different possible architectures for WiMAX and LTE standards in terms of signal quality and transmitter power efficiency.

Research of Ancient Architectures in Jin-Fen Area Based on GIS&BIM Technology

Science.gov (United States)

Jia, Jing; Zheng, Qiuhong; Gao, Huiying; Sun, Hai

2017-05-01

The number of well-preserved ancient buildings located in Shanxi Province, enjoying the absolute maximum proportion of ancient architectures in China, is about 18418, among which, 9053 buildings have the structural style of wood frame. The value of the application of BIM (Building Information Modeling) and GIS (Geographic Information System) is gradually probed and testified in the corresponding fields of ancient architecture’s spatial distribution information management, routine maintenance and special conservation & restoration, the evaluation and simulation of related disasters, such as earthquake. The research objects are ancient architectures in JIN-FEN area, which were first investigated by Sicheng LIANG and recorded in his work of “Chinese ancient architectures survey report”. The research objects, i.e. the ancient architectures in Jin-Fen area include those in Sicheng LIANG’s investigation, and further adjustments were made through authors’ on-site investigation and literature searching & collection. During this research process, the spatial distributing Geodatabase of research objects is established utilizing GIS. The BIM components library for ancient buildings is formed combining on-site investigation data and precedent classic works, such as “Yingzao Fashi”, a treatise on architectural methods in Song Dynasty, “Yongle Encyclopedia” and “Gongcheng Zuofa Zeli”, case collections of engineering practice, by the Ministry of Construction of Qing Dynasty. A building of Guangsheng temple in Hongtong county is selected as an example to elaborate the BIM model construction process based on the BIM components library for ancient buildings. Based on the foregoing work results of spatial distribution data, attribute data of features, 3D graphic information and parametric building information model, the information management system for ancient architectures in Jin-Fen Area, utilizing GIS&BIM technology, could be constructed to support the

Efficient Numeric and Geometric Computations using Heterogeneous Shared Memory Architectures

Science.gov (United States)

2017-10-04

to the memory architectures of CPUs and GPUs to obtain good performance and result in good memory performance using cache management. These methods ...Accomplishments: The PI and students has developed new methods for path and ray tracing and their Report Date: 14-Oct-2017 INVESTIGATOR(S): Phone...The efficiency of our method makes it a good candidate for forming hybrid schemes with wave-based models. One possibility is to couple the ray curve

Efficient high-precision matrix algebra on parallel architectures for nonlinear combinatorial optimization

KAUST Repository

Gunnels, John; Lee, Jon; Margulies, Susan

2010-01-01

We provide a first demonstration of the idea that matrix-based algorithms for nonlinear combinatorial optimization problems can be efficiently implemented. Such algorithms were mainly conceived by theoretical computer scientists for proving efficiency. We are able to demonstrate the practicality of our approach by developing an implementation on a massively parallel architecture, and exploiting scalable and efficient parallel implementations of algorithms for ultra high-precision linear algebra. Additionally, we have delineated and implemented the necessary algorithmic and coding changes required in order to address problems several orders of magnitude larger, dealing with the limits of scalability from memory footprint, computational efficiency, reliability, and interconnect perspectives. © Springer and Mathematical Programming Society 2010.

Efficient high-precision matrix algebra on parallel architectures for nonlinear combinatorial optimization

KAUST Repository

Gunnels, John

2010-06-01

We provide a first demonstration of the idea that matrix-based algorithms for nonlinear combinatorial optimization problems can be efficiently implemented. Such algorithms were mainly conceived by theoretical computer scientists for proving efficiency. We are able to demonstrate the practicality of our approach by developing an implementation on a massively parallel architecture, and exploiting scalable and efficient parallel implementations of algorithms for ultra high-precision linear algebra. Additionally, we have delineated and implemented the necessary algorithmic and coding changes required in order to address problems several orders of magnitude larger, dealing with the limits of scalability from memory footprint, computational efficiency, reliability, and interconnect perspectives. © Springer and Mathematical Programming Society 2010.

Visualizing Metrics on Areas of Interest in Software Architecture Diagrams

NARCIS (Netherlands)

Byelas, Heorhiy; Telea, Alexandru; Eades, P; Ertl, T; Shen, HW

2009-01-01

We present a new method for the combined visualization of software architecture diagrams, Such as UML class diagrams or component diagrams, and software metrics defined on groups of diagram elements. Our method extends an existing rendering technique for the so-called areas of interest in system

Adventure of Architecture Example of Housing and Housing Areas

Directory of Open Access Journals (Sweden)

Ali Asasoğlu

2013-08-01

recent era and the underlying improvements. Instead of seeking an answer to these issues, the study, which summarizes the venture of architecture in the overall sense and focuses specifically on the issues regarding the formation of housing and housing sites, discusses the origin of the very problem. Raising awareness as the most important step of living in qualified urban environments and owning quality residential areas is also emphasized with the respective examples.

Can diversity in root architecture explain plant water use efficiency? A modeling study.

Science.gov (United States)

Tron, Stefania; Bodner, Gernot; Laio, Francesco; Ridolfi, Luca; Leitner, Daniel

2015-09-24

Drought stress is a dominant constraint to crop production. Breeding crops with adapted root systems for effective uptake of water represents a novel strategy to increase crop drought resistance. Due to complex interaction between root traits and high diversity of hydrological conditions, modeling provides important information for trait based selection. In this work we use a root architecture model combined with a soil-hydrological model to analyze whether there is a root system ideotype of general adaptation to drought or water uptake efficiency of root systems is a function of specific hydrological conditions. This was done by modeling transpiration of 48 root architectures in 16 drought scenarios with distinct soil textures, rainfall distributions, and initial soil moisture availability. We find that the efficiency in water uptake of root architecture is strictly dependent on the hydrological scenario. Even dense and deep root systems are not superior in water uptake under all hydrological scenarios. Our results demonstrate that mere architectural description is insufficient to find root systems of optimum functionality. We find that in environments with sufficient rainfall before the growing season, root depth represents the key trait for the exploration of stored water, especially in fine soils. Root density, instead, especially near the soil surface, becomes the most relevant trait for exploiting soil moisture when plant water supply is mainly provided by rainfall events during the root system development. We therefore concluded that trait based root breeding has to consider root systems with specific adaptation to the hydrology of the target environment.

Low power design of wireless endoscopy compression/communication architecture

Directory of Open Access Journals (Sweden)

Zitouni Abdelkrim

2018-05-01

Full Text Available A wireless endoscopy capsule represents an efficient device interesting on the examination of digestive diseases. Many performance criteria’s (silicon area, dissipated power, image quality, computational time, etc. need to be deeply studied.In this paper, our interest is the optimization of the indicated criteria. The proposed methodology is based on exploring the advantages of the DCT/DWT transforms by combining them into single architecture. For arithmetic operations, the MCLA technique is used. This architecture integrates also a CABAC entropy coder that supports all binarization schemes. AMBA/I2C architecture is developed for assuring optimized communication.The comparisons of the proposed architecture with the most popular methods explained in related works show efficient results in terms dissipated power, hardware cost, and computation speed. Keywords: Wireless endoscopy capsule, DCT/DWT image compression, CABAC entropy coder, AMBA/I2C multi-bus architecture

Confabulation Based Real-time Anomaly Detection for Wide-area Surveillance Using Heterogeneous High Performance Computing Architecture

Science.gov (United States)

2015-06-01

CONFABULATION BASED REAL-TIME ANOMALY DETECTION FOR WIDE-AREA SURVEILLANCE USING HETEROGENEOUS HIGH PERFORMANCE COMPUTING ARCHITECTURE SYRACUSE...DETECTION FOR WIDE-AREA SURVEILLANCE USING HETEROGENEOUS HIGH PERFORMANCE COMPUTING ARCHITECTURE 5a. CONTRACT NUMBER FA8750-12-1-0251 5b. GRANT...processors including graphic processor units (GPUs) and Intel Xeon Phi processors. Experimental results showed significant speedups, which can enable

Efficient Algorithm and Architecture of Critical-Band Transform for Low-Power Speech Applications

Directory of Open Access Journals (Sweden)

Gan Woon-Seng

2007-01-01

Full Text Available An efficient algorithm and its corresponding VLSI architecture for the critical-band transform (CBT are developed to approximate the critical-band filtering of the human ear. The CBT consists of a constant-bandwidth transform in the lower frequency range and a Brown constant- transform (CQT in the higher frequency range. The corresponding VLSI architecture is proposed to achieve significant power efficiency by reducing the computational complexity, using pipeline and parallel processing, and applying the supply voltage scaling technique. A 21-band Bark scale CBT processor with a sampling rate of 16 kHz is designed and simulated. Simulation results verify its suitability for performing short-time spectral analysis on speech. It has a better fitting on the human ear critical-band analysis, significantly fewer computations, and therefore is more energy-efficient than other methods. With a 0.35 m CMOS technology, it calculates a 160-point speech in 4.99 milliseconds at 234 kHz. The power dissipation is 15.6 W at 1.1 V. It achieves 82.1 power reduction as compared to a benchmark 256-point FFT processor.

Research of Ancient Architectures in Jin-Fen Area Based on GIS and BIM Technology

International Nuclear Information System (INIS)

Jia, Jing; Zheng, Qiuhong; Gao, Huiying; Sun, Hai

2017-01-01

The number of well-preserved ancient buildings located in Shanxi Province, enjoying the absolute maximum proportion of ancient architectures in China, is about 18418, among which, 9053 buildings have the structural style of wood frame. The value of the application of BIM (Building Information Modeling) and GIS (Geographic Information System) is gradually probed and testified in the corresponding fields of ancient architecture’s spatial distribution information management, routine maintenance and special conservation and restoration, the evaluation and simulation of related disasters, such as earthquake. The research objects are ancient architectures in JIN-FEN area, which were first investigated by Sicheng LIANG and recorded in his work of “Chinese ancient architectures survey report”. The research objects, i.e. the ancient architectures in Jin-Fen area include those in Sicheng LIANG’s investigation, and further adjustments were made through authors’ on-site investigation and literature searching and collection. During this research process, the spatial distributing Geodatabase of research objects is established utilizing GIS. The BIM components library for ancient buildings is formed combining on-site investigation data and precedent classic works, such as “Yingzao Fashi”, a treatise on architectural methods in Song Dynasty, “Yongle Encyclopedia” and “Gongcheng Zuofa Zeli”, case collections of engineering practice, by the Ministry of Construction of Qing Dynasty. A building of Guangsheng temple in Hongtong county is selected as an example to elaborate the BIM model construction process based on the BIM components library for ancient buildings. Based on the foregoing work results of spatial distribution data, attribute data of features, 3D graphic information and parametric building information model, the information management system for ancient architectures in Jin-Fen Area, utilizing GIS and BIM technology, could be constructed to support

How organisation of architecture documentation affects architectural knowledge retrieval

NARCIS (Netherlands)

de Graaf, K.A.; Liang, P.; Tang, A.; Vliet, J.C.

A common approach to software architecture documentation in industry projects is the use of file-based documents. This approach offers a single-dimensional arrangement of the architectural knowledge. Knowledge retrieval from file-based architecture documentation is efficient if the organisation of

A solvent- and vacuum-free route to large-area perovskite films for efficient solar modules

Science.gov (United States)

Chen, Han; Ye, Fei; Tang, Wentao; He, Jinjin; Yin, Maoshu; Wang, Yanbo; Xie, Fengxian; Bi, Enbing; Yang, Xudong; Grätzel, Michael; Han, Liyuan

2017-10-01

Recent advances in the use of organic-inorganic hybrid perovskites for optoelectronics have been rapid, with reported power conversion efficiencies of up to 22 per cent for perovskite solar cells. Improvements in stability have also enabled testing over a timescale of thousands of hours. However, large-scale deployment of such cells will also require the ability to produce large-area, uniformly high-quality perovskite films. A key challenge is to overcome the substantial reduction in power conversion efficiency when a small device is scaled up: a reduction from over 20 per cent to about 10 per cent is found when a common aperture area of about 0.1 square centimetres is increased to more than 25 square centimetres. Here we report a new deposition route for methyl ammonium lead halide perovskite films that does not rely on use of a common solvent or vacuum: rather, it relies on the rapid conversion of amine complex precursors to perovskite films, followed by a pressure application step. The deposited perovskite films were free of pin-holes and highly uniform. Importantly, the new deposition approach can be performed in air at low temperatures, facilitating fabrication of large-area perovskite devices. We reached a certified power conversion efficiency of 12.1 per cent with an aperture area of 36.1 square centimetres for a mesoporous TiO2-based perovskite solar module architecture.

An energy efficient and high speed architecture for convolution computing based on binary resistive random access memory

Science.gov (United States)

Liu, Chen; Han, Runze; Zhou, Zheng; Huang, Peng; Liu, Lifeng; Liu, Xiaoyan; Kang, Jinfeng

2018-04-01

In this work we present a novel convolution computing architecture based on metal oxide resistive random access memory (RRAM) to process the image data stored in the RRAM arrays. The proposed image storage architecture shows performances of better speed-device consumption efficiency compared with the previous kernel storage architecture. Further we improve the architecture for a high accuracy and low power computing by utilizing the binary storage and the series resistor. For a 28 × 28 image and 10 kernels with a size of 3 × 3, compared with the previous kernel storage approach, the newly proposed architecture shows excellent performances including: 1) almost 100% accuracy within 20% LRS variation and 90% HRS variation; 2) more than 67 times speed boost; 3) 71.4% energy saving.

The NILE system architecture: fault-tolerant, wide-area access to computing and data resources

International Nuclear Information System (INIS)

Ricciardi, Aleta; Ogg, Michael; Rothfus, Eric

1996-01-01

NILE is a multi-disciplinary project building a distributed computing environment for HEP. It provides wide-area, fault-tolerant, integrated access to processing and data resources for collaborators of the CLEO experiment, though the goals and principles are applicable to many domains. NILE has three main objectives: a realistic distributed system architecture design, the design of a robust data model, and a Fast-Track implementation providing a prototype design environment which will also be used by CLEO physicists. This paper focuses on the software and wide-area system architecture design and the computing issues involved in making NILE services highly-available. (author)

An efficient implementation of parallel molecular dynamics method on SMP cluster architecture

International Nuclear Information System (INIS)

Suzuki, Masaaki; Okuda, Hiroshi; Yagawa, Genki

2003-01-01

The authors have applied MPI/OpenMP hybrid parallel programming model to parallelize a molecular dynamics (MD) method on a symmetric multiprocessor (SMP) cluster architecture. In that architecture, it can be expected that the hybrid parallel programming model, which uses the message passing library such as MPI for inter-SMP node communication and the loop directive such as OpenMP for intra-SNP node parallelization, is the most effective one. In this study, the parallel performance of the hybrid style has been compared with that of conventional flat parallel programming style, which uses only MPI, both in cases the fast multipole method (FMM) is employed for computing long-distance interactions and that is not employed. The computer environments used here are Hitachi SR8000/MPP placed at the University of Tokyo. The results of calculation are as follows. Without FMM, the parallel efficiency using 16 SMP nodes (128 PEs) is: 90% with the hybrid style, 75% with the flat-MPI style for MD simulation with 33,402 atoms. With FMM, the parallel efficiency using 16 SMP nodes (128 PEs) is: 60% with the hybrid style, 48% with the flat-MPI style for MD simulation with 117,649 atoms. (author)

A memory-array architecture for computer vision

Energy Technology Data Exchange (ETDEWEB)

Balsara, P.T.

1989-01-01

With the fast advances in the area of computer vision and robotics there is a growing need for machines that can understand images at a very high speed. A conventional von Neumann computer is not suited for this purpose because it takes a tremendous amount of time to solve most typical image processing problems. Exploiting the inherent parallelism present in various vision tasks can significantly reduce the processing time. Fortunately, parallelism is increasingly affordable as hardware gets cheaper. Thus it is now imperative to study computer vision in a parallel processing framework. The author should first design a computational structure which is well suited for a wide range of vision tasks and then develop parallel algorithms which can run efficiently on this structure. Recent advances in VLSI technology have led to several proposals for parallel architectures for computer vision. In this thesis he demonstrates that a memory array architecture with efficient local and global communication capabilities can be used for high speed execution of a wide range of computer vision tasks. This architecture, called the Access Constrained Memory Array Architecture (ACMAA), is efficient for VLSI implementation because of its modular structure, simple interconnect and limited global control. Several parallel vision algorithms have been designed for this architecture. The choice of vision problems demonstrates the versatility of ACMAA for a wide range of vision tasks. These algorithms were simulated on a high level ACMAA simulator running on the Intel iPSC/2 hypercube, a parallel architecture. The results of this simulation are compared with those of sequential algorithms running on a single hypercube node. Details of the ACMAA processor architecture are also presented.

Examining the volume efficiency of the cortical architecture in a multi-processor network model.

Science.gov (United States)

Ruppin, E; Schwartz, E L; Yeshurun, Y

1993-01-01

The convoluted form of the sheet-like mammalian cortex naturally raises the question whether there is a simple geometrical reason for the prevalence of cortical architecture in the brains of higher vertebrates. Addressing this question, we present a formal analysis of the volume occupied by a massively connected network or processors (neurons) and then consider the pertaining cortical data. Three gross macroscopic features of cortical organization are examined: the segregation of white and gray matter, the circumferential organization of the gray matter around the white matter, and the folded cortical structure. Our results testify to the efficiency of cortical architecture.

Mixed-Signal Architectures for High-Efficiency and Low-Distortion Digital Audio Processing and Power Amplification

Directory of Open Access Journals (Sweden)

Pierangelo Terreni

2010-01-01

Full Text Available The paper addresses the algorithmic and architectural design of digital input power audio amplifiers. A modelling platform, based on a meet-in-the-middle approach between top-down and bottom-up design strategies, allows a fast but still accurate exploration of the mixed-signal design space. Different amplifier architectures are configured and compared to find optimal trade-offs among different cost-functions: low distortion, high efficiency, low circuit complexity and low sensitivity to parameter changes. A novel amplifier architecture is derived; its prototype implements digital processing IP macrocells (oversampler, interpolating filter, PWM cross-point deriver, noise shaper, multilevel PWM modulator, dead time compensator on a single low-complexity FPGA while off-chip components are used only for the power output stage (LC filter and power MOS bridge; no heatsink is required. The resulting digital input amplifier features a power efficiency higher than 90% and a total harmonic distortion down to 0.13% at power levels of tens of Watts. Discussions towards the full-silicon integration of the mixed-signal amplifier in embedded devices, using BCD technology and targeting power levels of few Watts, are also reported.

Area- and energy-efficient CORDIC accelerators in deep sub-micron CMOS technologies

Science.gov (United States)

Vishnoi, U.; Noll, T. G.

2012-09-01

The COordinate Rotate DIgital Computer (CORDIC) algorithm is a well known versatile approach and is widely applied in today's SoCs for especially but not restricted to digital communications. Dedicated CORDIC blocks can be implemented in deep sub-micron CMOS technologies at very low area and energy costs and are attractive to be used as hardware accelerators for Application Specific Instruction Processors (ASIPs). Thereby, overcoming the well known energy vs. flexibility conflict. Optimizing Global Navigation Satellite System (GNSS) receivers to reduce the hardware complexity is an important research topic at present. In such receivers CORDIC accelerators can be used for digital baseband processing (fixed-point) and in Position-Velocity-Time estimation (floating-point). A micro architecture well suited to such applications is presented. This architecture is parameterized according to the wordlengths as well as the number of iterations and can be easily extended for floating point data format. Moreover, area can be traded for throughput by partially or even fully unrolling the iterations, whereby the degree of pipelining is organized with one CORDIC iteration per cycle. From the architectural description, the macro layout can be generated fully automatically using an in-house datapath generator tool. Since the adders and shifters play an important role in optimizing the CORDIC block, they must be carefully optimized for high area and energy efficiency in the underlying technology. So, for this purpose carry-select adders and logarithmic shifters have been chosen. Device dimensioning was automatically optimized with respect to dynamic and static power, area and performance using the in-house tool. The fully sequential CORDIC block for fixed-point digital baseband processing features a wordlength of 16 bits, requires 5232 transistors, which is implemented in a 40-nm CMOS technology and occupies a silicon area of 1560 μm2 only. Maximum clock frequency from circuit

Towards an autonomous sensor architecture for persistent area protection

Science.gov (United States)

Thomas, Paul A.; Marshall, Gillian F.; Stubbins, Daniel J.; Faulkner, David A.

2016-10-01

The majority of sensor installations for area protection (e.g. critical national infrastructure, military forward operating bases, etc.) make use of banks of screens each containing one or more sensor feeds, such that the burden of combining data from the various sources, understanding the situation, and controlling the sensors all lies with the human operator. Any automation in the system is generally heavily bespoke for the particular installation, leading to an inflexible system which is difficult to change or upgrade. We have developed a modular system architecture consisting of intelligent autonomous sensor modules, a high level decision making module, a middleware integration layer and an end-user GUI. The modules are all effectively "plug and play", and we have demonstrated that it is relatively simple to incorporate legacy sensors into the architecture. We have extended our previously-reported SAPIENT demonstration system to operate with a larger number and variety of sensor modules, over an extended area, detecting and classifying a wider variety of "threat activities", both vehicular and pedestrian. We report the results of a demonstration of the SAPIENT system containing multiple autonomous sensor modules with a range of modalities including laser scanners, radar, TI, EO, acoustic and seismic sensors. They operate from a combination of mains, generator and battery power, and communicate with the central "hub" over Ethernet, point-to-point wireless links and Wi-Fi. The system has been configured to protect an extended area in a complex semi-urban environment. We discuss the operation of the SAPIENT system in a realistic demonstration environment (which included significant activity not under trial control), showing sensor cueing, multi-modal sensor fusion, threat prioritisation and target hand-off.

Rationally designed graphene-nanotube 3D architectures with a seamless nodal junction for efficient energy conversion and storage.

Science.gov (United States)

Xue, Yuhua; Ding, Yong; Niu, Jianbing; Xia, Zhenhai; Roy, Ajit; Chen, Hao; Qu, Jia; Wang, Zhong Lin; Dai, Liming

2015-09-01

One-dimensional (1D) carbon nanotubes (CNTs) and 2D single-atomic layer graphene have superior thermal, electrical, and mechanical properties. However, these nanomaterials exhibit poor out-of-plane properties due to the weak van der Waals interaction in the transverse direction between graphitic layers. Recent theoretical studies indicate that rationally designed 3D architectures could have desirable out-of-plane properties while maintaining in-plane properties by growing CNTs and graphene into 3D architectures with a seamless nodal junction. However, the experimental realization of seamlessly-bonded architectures remains a challenge. We developed a strategy of creating 3D graphene-CNT hollow fibers with radially aligned CNTs (RACNTs) seamlessly sheathed by a cylindrical graphene layer through a one-step chemical vapor deposition using an anodized aluminum wire template. By controlling the aluminum wire diameter and anodization time, the length of the RACNTs and diameter of the graphene hollow fiber can be tuned, enabling efficient energy conversion and storage. These fibers, with a controllable surface area, meso-/micropores, and superior electrical properties, are excellent electrode materials for all-solid-state wire-shaped supercapacitors with poly(vinyl alcohol)/H2SO4 as the electrolyte and binder, exhibiting a surface-specific capacitance of 89.4 mF/cm(2) and length-specific capacitance up to 23.9 mF/cm, - one to four times the corresponding record-high capacities reported for other fiber-like supercapacitors. Dye-sensitized solar cells, fabricated using the fiber as a counter electrode, showed a power conversion efficiency of 6.8% and outperformed their counterparts with an expensive Pt wire counter electrode by a factor of 2.5. These novel fiber-shaped graphene-RACNT energy conversion and storage devices are so flexible they can be woven into fabrics as power sources.

An Energy-Efficient and High-Quality Video Transmission Architecture in Wireless Video-Based Sensor Networks

Directory of Open Access Journals (Sweden)

Yasaman Samei

2008-08-01

Full Text Available Technological progress in the fields of Micro Electro-Mechanical Systems (MEMS and wireless communications and also the availability of CMOS cameras, microphones and small-scale array sensors, which may ubiquitously capture multimedia content from the field, have fostered the development of low-cost limited resources Wireless Video-based Sensor Networks (WVSN. With regards to the constraints of videobased sensor nodes and wireless sensor networks, a supporting video stream is not easy to implement with the present sensor network protocols. In this paper, a thorough architecture is presented for video transmission over WVSN called Energy-efficient and high-Quality Video transmission Architecture (EQV-Architecture. This architecture influences three layers of communication protocol stack and considers wireless video sensor nodes constraints like limited process and energy resources while video quality is preserved in the receiver side. Application, transport, and network layers are the layers in which the compression protocol, transport protocol, and routing protocol are proposed respectively, also a dropping scheme is presented in network layer. Simulation results over various environments with dissimilar conditions revealed the effectiveness of the architecture in improving the lifetime of the network as well as preserving the video quality.

An Energy-Efficient and High-Quality Video Transmission Architecture in Wireless Video-Based Sensor Networks.

Science.gov (United States)

Aghdasi, Hadi S; Abbaspour, Maghsoud; Moghadam, Mohsen Ebrahimi; Samei, Yasaman

2008-08-04

Technological progress in the fields of Micro Electro-Mechanical Systems (MEMS) and wireless communications and also the availability of CMOS cameras, microphones and small-scale array sensors, which may ubiquitously capture multimedia content from the field, have fostered the development of low-cost limited resources Wireless Video-based Sensor Networks (WVSN). With regards to the constraints of videobased sensor nodes and wireless sensor networks, a supporting video stream is not easy to implement with the present sensor network protocols. In this paper, a thorough architecture is presented for video transmission over WVSN called Energy-efficient and high-Quality Video transmission Architecture (EQV-Architecture). This architecture influences three layers of communication protocol stack and considers wireless video sensor nodes constraints like limited process and energy resources while video quality is preserved in the receiver side. Application, transport, and network layers are the layers in which the compression protocol, transport protocol, and routing protocol are proposed respectively, also a dropping scheme is presented in network layer. Simulation results over various environments with dissimilar conditions revealed the effectiveness of the architecture in improving the lifetime of the network as well as preserving the video quality.

Energy-efficient architecture of industrial facilities associated with the desalination of sea water

Directory of Open Access Journals (Sweden)

Gazizov Timur

2016-01-01

Full Text Available The article offers an actual solution of a problem of drinking water shortage in the territory of the Crimean coast, in the city of Sudak, Autonomous Republic of Crimea, Russia. The project includes a development of energy-efficient architecture, its implementation in industrial facilities, such as stations for seawater desalination and an active use of alternative energy sources.

Efficient Machine Learning Approach for Optimizing Scientific Computing Applications on Emerging HPC Architectures

Energy Technology Data Exchange (ETDEWEB)

Arumugam, Kamesh [Old Dominion Univ., Norfolk, VA (United States)

2017-05-01

Efficient parallel implementations of scientific applications on multi-core CPUs with accelerators such as GPUs and Xeon Phis is challenging. This requires - exploiting the data parallel architecture of the accelerator along with the vector pipelines of modern x86 CPU architectures, load balancing, and efficient memory transfer between different devices. It is relatively easy to meet these requirements for highly structured scientific applications. In contrast, a number of scientific and engineering applications are unstructured. Getting performance on accelerators for these applications is extremely challenging because many of these applications employ irregular algorithms which exhibit data-dependent control-ow and irregular memory accesses. Furthermore, these applications are often iterative with dependency between steps, and thus making it hard to parallelize across steps. As a result, parallelism in these applications is often limited to a single step. Numerical simulation of charged particles beam dynamics is one such application where the distribution of work and memory access pattern at each time step is irregular. Applications with these properties tend to present significant branch and memory divergence, load imbalance between different processor cores, and poor compute and memory utilization. Prior research on parallelizing such irregular applications have been focused around optimizing the irregular, data-dependent memory accesses and control-ow during a single step of the application independent of the other steps, with the assumption that these patterns are completely unpredictable. We observed that the structure of computation leading to control-ow divergence and irregular memory accesses in one step is similar to that in the next step. It is possible to predict this structure in the current step by observing the computation structure of previous steps. In this dissertation, we present novel machine learning based optimization techniques to address

Efficient Phase Unwrapping Architecture for Digital Holographic Microscopy

Directory of Open Access Journals (Sweden)

Wen-Jyi Hwang

2011-09-01

Full Text Available This paper presents a novel phase unwrapping architecture for accelerating the computational speed of digital holographic microscopy (DHM. A fast Fourier transform (FFT based phase unwrapping algorithm providing a minimum squared error solution is adopted for hardware implementation because of its simplicity and robustness to noise. The proposed architecture is realized in a pipeline fashion to maximize through put of thecomputation. Moreover, the number of hardware multipliers and dividers are minimized to reduce the hardware costs. The proposed architecture is used as a custom user logic in a system on programmable chip (SOPC for physical performance measurement. Experimental results reveal that the proposed architecture is effective for expediting the computational speed while consuming low hardware resources for designing an embedded DHM system.

Wavy Architecture Thin-Film Transistor for Ultrahigh Resolution Flexible Displays

KAUST Repository

Hanna, Amir Nabil; Kutbee, Arwa Talal; Subedi, Ram Chandra; Ooi, Boon S.; Hussain, Muhammad Mustafa

2017-01-01

A novel wavy-shaped thin-film-transistor (TFT) architecture, capable of achieving 70% higher drive current per unit chip area when compared with planar conventional TFT architectures, is reported for flexible display application. The transistor, due to its atypical architecture, does not alter the turn-on voltage or the OFF current values, leading to higher performance without compromising static power consumption. The concept behind this architecture is expanding the transistor's width vertically through grooved trenches in a structural layer deposited on a flexible substrate. Operation of zinc oxide (ZnO)-based TFTs is shown down to a bending radius of 5 mm with no degradation in the electrical performance or cracks in the gate stack. Finally, flexible low-power LEDs driven by the respective currents of the novel wavy, and conventional coplanar architectures are demonstrated, where the novel architecture is able to drive the LED at 2 × the output power, 3 versus 1.5 mW, which demonstrates the potential use for ultrahigh resolution displays in an area efficient manner.

Wavy Architecture Thin-Film Transistor for Ultrahigh Resolution Flexible Displays

KAUST Repository

Hanna, Amir Nabil

2017-11-13

A novel wavy-shaped thin-film-transistor (TFT) architecture, capable of achieving 70% higher drive current per unit chip area when compared with planar conventional TFT architectures, is reported for flexible display application. The transistor, due to its atypical architecture, does not alter the turn-on voltage or the OFF current values, leading to higher performance without compromising static power consumption. The concept behind this architecture is expanding the transistor\\'s width vertically through grooved trenches in a structural layer deposited on a flexible substrate. Operation of zinc oxide (ZnO)-based TFTs is shown down to a bending radius of 5 mm with no degradation in the electrical performance or cracks in the gate stack. Finally, flexible low-power LEDs driven by the respective currents of the novel wavy, and conventional coplanar architectures are demonstrated, where the novel architecture is able to drive the LED at 2 × the output power, 3 versus 1.5 mW, which demonstrates the potential use for ultrahigh resolution displays in an area efficient manner.

Efficient Architecture and Implementation of Vector Median Filter in Co-Design Context

Directory of Open Access Journals (Sweden)

N. Masmoudi

2007-09-01

Full Text Available This work presents an efficient fast parallel architecture of the Vector Median Filter (VMF using combined hardware/software (HW/SW implementation. The hardware part of the system is implemented using VHDL language, whereas the software part is developed using C/C++ language. The software part of the embedded system uses the NIOS-II softcore processor and the operating system used is μClinux. The comparison between the software and HW/SW solutions shows that adding a hardware part in the design attempts to speed up the filtering process compared to the software solution. This efficient embedded system implementation can perform well in several image processing applications.

A learnable parallel processing architecture towards unity of memory and computing.

Science.gov (United States)

Li, H; Gao, B; Chen, Z; Zhao, Y; Huang, P; Ye, H; Liu, L; Liu, X; Kang, J

2015-08-14

Developing energy-efficient parallel information processing systems beyond von Neumann architecture is a long-standing goal of modern information technologies. The widely used von Neumann computer architecture separates memory and computing units, which leads to energy-hungry data movement when computers work. In order to meet the need of efficient information processing for the data-driven applications such as big data and Internet of Things, an energy-efficient processing architecture beyond von Neumann is critical for the information society. Here we show a non-von Neumann architecture built of resistive switching (RS) devices named "iMemComp", where memory and logic are unified with single-type devices. Leveraging nonvolatile nature and structural parallelism of crossbar RS arrays, we have equipped "iMemComp" with capabilities of computing in parallel and learning user-defined logic functions for large-scale information processing tasks. Such architecture eliminates the energy-hungry data movement in von Neumann computers. Compared with contemporary silicon technology, adder circuits based on "iMemComp" can improve the speed by 76.8% and the power dissipation by 60.3%, together with a 700 times aggressive reduction in the circuit area.

A learnable parallel processing architecture towards unity of memory and computing

Science.gov (United States)

Li, H.; Gao, B.; Chen, Z.; Zhao, Y.; Huang, P.; Ye, H.; Liu, L.; Liu, X.; Kang, J.

2015-08-01

Developing energy-efficient parallel information processing systems beyond von Neumann architecture is a long-standing goal of modern information technologies. The widely used von Neumann computer architecture separates memory and computing units, which leads to energy-hungry data movement when computers work. In order to meet the need of efficient information processing for the data-driven applications such as big data and Internet of Things, an energy-efficient processing architecture beyond von Neumann is critical for the information society. Here we show a non-von Neumann architecture built of resistive switching (RS) devices named “iMemComp”, where memory and logic are unified with single-type devices. Leveraging nonvolatile nature and structural parallelism of crossbar RS arrays, we have equipped “iMemComp” with capabilities of computing in parallel and learning user-defined logic functions for large-scale information processing tasks. Such architecture eliminates the energy-hungry data movement in von Neumann computers. Compared with contemporary silicon technology, adder circuits based on “iMemComp” can improve the speed by 76.8% and the power dissipation by 60.3%, together with a 700 times aggressive reduction in the circuit area.

Multiscale transparent electrode architecture for efficient light management and carrier collection in solar cells.

Science.gov (United States)

Boccard, Mathieu; Battaglia, Corsin; Hänni, Simon; Söderström, Karin; Escarré, Jordi; Nicolay, Sylvain; Meillaud, Fanny; Despeisse, Matthieu; Ballif, Christophe

2012-03-14

The challenge for all photovoltaic technologies is to maximize light absorption, to convert photons with minimal losses into electric charges, and to efficiently extract them to the electrical circuit. For thin-film solar cells, all these tasks rely heavily on the transparent front electrode. Here we present a multiscale electrode architecture that allows us to achieve efficiencies as high as 14.1% with a thin-film silicon tandem solar cell employing only 3 μm of silicon. Our approach combines the versatility of nanoimprint lithography, the unusually high carrier mobility of hydrogenated indium oxide (over 100 cm(2)/V/s), and the unequaled light-scattering properties of self-textured zinc oxide. A multiscale texture provides light trapping over a broad wavelength range while ensuring an optimum morphology for the growth of high-quality silicon layers. A conductive bilayer stack guarantees carrier extraction while minimizing parasitic absorption losses. The tunability accessible through such multiscale electrode architecture offers unprecedented possibilities to address the trade-off between cell optical and electrical performance. © 2012 American Chemical Society

A highly efficient 3D level-set grain growth algorithm tailored for ccNUMA architecture

Science.gov (United States)

Mießen, C.; Velinov, N.; Gottstein, G.; Barrales-Mora, L. A.

2017-12-01

A highly efficient simulation model for 2D and 3D grain growth was developed based on the level-set method. The model introduces modern computational concepts to achieve excellent performance on parallel computer architectures. Strong scalability was measured on cache-coherent non-uniform memory access (ccNUMA) architectures. To achieve this, the proposed approach considers the application of local level-set functions at the grain level. Ideal and non-ideal grain growth was simulated in 3D with the objective to study the evolution of statistical representative volume elements in polycrystals. In addition, microstructure evolution in an anisotropic magnetic material affected by an external magnetic field was simulated.

Cyto- and receptor architecture of area 32 in human and macaque brains.

Science.gov (United States)

Palomero-Gallagher, Nicola; Zilles, Karl; Schleicher, Axel; Vogt, Brent A

2013-10-01

Human area 32 plays crucial roles in emotion and memory consolidation. It has subgenual (s32), pregenual (p32), dorsal, and midcingulate components. We seek to determine whether macaque area 32 has subgenual and pregenual subdivisions and the extent to which they are comparable to those in humans by means of NeuN immunohistochemistry and multireceptor analysis of laminar profiles. The macaque has areas s32 and p32. In s32, layer IIIa/b neurons are larger than those of layer IIIc. This relationship is reversed in p32. Layer Va is thicker and Vb thinner in s32. Area p32 contains higher kainate, benzodiazepine (BZ), and serotonin (5-HT)1A but lower N-methyl-D-aspartate (NMDA) and α2 receptor densities. Most differences were found in layers I, II, and VI. Together, these differences support the dual nature of macaque area 32. Comparative analysis of human and macaque s32 and p32 supports equivalences in cyto- and receptor architecture. Although there are differences in mean areal receptor densities, there are considerable similarities at the layer level. Laminar receptor distribution patterns in each area are comparable in the two species in layers III-Va for kainate, NMDA, γ-aminobutyric acid (GABA)B , BZ, and 5-HT1A receptors. Multivariate statistical analysis of laminar receptor densities revealed that human s32 is more similar to macaque s32 and p32 than to human p32. Thus, macaque 32 is more complex than hitherto known. Our data suggest a homologous neural architecture in anterior cingulate s32 and p32 in human and macaque brains. © 2013 Wiley Periodicals, Inc.

Architecture in the Islamic Civilization: Muslim Building or Islamic Architecture

OpenAIRE

Yassin, Ayat Ali; Utaberta, Dr. Nangkula

2012-01-01

The main problem of the theory in the arena of islamic architecture is affected by some of its Westernthoughts, and stereotyping the islamic architecture according to Western thoughts; this leads to the breakdownof the foundations in the islamic architecture. It is a myth that islamic architecture is subjected to theinfluence from foreign architectures. This paper will highlight the dialectical concept of islamic architecture ormuslim buildings and the areas of recognition in islamic architec...

Complementarity and Area-Efficiency in the Prioritization of the Global Protected Area Network.

Directory of Open Access Journals (Sweden)

Peter Kullberg

Full Text Available Complementarity and cost-efficiency are widely used principles for protected area network design. Despite the wide use and robust theoretical underpinnings, their effects on the performance and patterns of priority areas are rarely studied in detail. Here we compare two approaches for identifying the management priority areas inside the global protected area network: 1 a scoring-based approach, used in recently published analysis and 2 a spatial prioritization method, which accounts for complementarity and area-efficiency. Using the same IUCN species distribution data the complementarity method found an equal-area set of priority areas with double the mean species ranges covered compared to the scoring-based approach. The complementarity set also had 72% more species with full ranges covered, and lacked any coverage only for half of the species compared to the scoring approach. Protected areas in our complementarity-based solution were on average smaller and geographically more scattered. The large difference between the two solutions highlights the need for critical thinking about the selected prioritization method. According to our analysis, accounting for complementarity and area-efficiency can lead to considerable improvements when setting management priorities for the global protected area network.

Complementarity and Area-Efficiency in the Prioritization of the Global Protected Area Network.

Science.gov (United States)

Kullberg, Peter; Toivonen, Tuuli; Montesino Pouzols, Federico; Lehtomäki, Joona; Di Minin, Enrico; Moilanen, Atte

2015-01-01

Complementarity and cost-efficiency are widely used principles for protected area network design. Despite the wide use and robust theoretical underpinnings, their effects on the performance and patterns of priority areas are rarely studied in detail. Here we compare two approaches for identifying the management priority areas inside the global protected area network: 1) a scoring-based approach, used in recently published analysis and 2) a spatial prioritization method, which accounts for complementarity and area-efficiency. Using the same IUCN species distribution data the complementarity method found an equal-area set of priority areas with double the mean species ranges covered compared to the scoring-based approach. The complementarity set also had 72% more species with full ranges covered, and lacked any coverage only for half of the species compared to the scoring approach. Protected areas in our complementarity-based solution were on average smaller and geographically more scattered. The large difference between the two solutions highlights the need for critical thinking about the selected prioritization method. According to our analysis, accounting for complementarity and area-efficiency can lead to considerable improvements when setting management priorities for the global protected area network.

A State-Based Modeling Approach for Efficient Performance Evaluation of Embedded System Architectures at Transaction Level

Directory of Open Access Journals (Sweden)

Anthony Barreteau

2012-01-01

Full Text Available Abstract models are necessary to assist system architects in the evaluation process of hardware/software architectures and to cope with the still increasing complexity of embedded systems. Efficient methods are required to create reliable models of system architectures and to allow early performance evaluation and fast exploration of the design space. In this paper, we present a specific transaction level modeling approach for performance evaluation of hardware/software architectures. This approach relies on a generic execution model that exhibits light modeling effort. Created models are used to evaluate by simulation expected processing and memory resources according to various architectures. The proposed execution model relies on a specific computation method defined to improve the simulation speed of transaction level models. The benefits of the proposed approach are highlighted through two case studies. The first case study is a didactic example illustrating the modeling approach. In this example, a simulation speed-up by a factor of 7,62 is achieved by using the proposed computation method. The second case study concerns the analysis of a communication receiver supporting part of the physical layer of the LTE protocol. In this case study, architecture exploration is led in order to improve the allocation of processing functions.

Architecture of Environmental Engineering

DEFF Research Database (Denmark)

Wenzel, Henrik; Alting, Leo

2006-01-01

An architecture of Environmental Engineering has been developed comprising the various disciplines and tools involved. It identifies industry as the major actor and target group, and it builds on the concept of Eco-efficiency. To improve Eco-efficiency, there is a limited number of intervention......-efficiency is the aim of Environmental Engineering, the discipline of synthesis – design and creation of solutions – will form a core pillar of the architecture. Other disciplines of Environmental Engineering exist forming the necessary background and frame for the synthesis. Environmental Engineering, thus, in essence...... comprise the disciplines of: management, system description & inventory, analysis & assessment, prioritisation, synthesis, and communication, each existing at all levels of intervention. The developed architecture of Environmental Engineering, thus, consists of thirty individual disciplines, within each...

Architecture of Environmental Engineering

DEFF Research Database (Denmark)

Wenzel, Henrik; Alting, Leo

2004-01-01

An architecture of Environmental Engineering has been developed comprising the various disciplines and tools involved. It identifies industry as the major actor and target group, and it builds on the concept of Eco-efficiency. To improve Eco-efficiency, there is a limited number of intervention...... of Eco-efficiency is the aim of Environmental Engineering, the discipline of synthesis – design and creation of solutions – will form a core pillar of the architecture. Other disciplines of Environmental Engineering exist forming the necessary background and frame for the synthesis. Environmental...... Engineering, thus, in essence comprise the disciplines of: management, system description & inventory, analysis & assessment, prioritisation, synthesis, and communication, each existing at all levels of intervention. The developed architecture of Environmental Engineering, thus, consists of thirty individual...

Area-based management and fishing efficiency

NARCIS (Netherlands)

Marchal, P.; Ulrich, C.; Pastoors, M.

2002-01-01

The scope of this study is to investigate the extent to which area-based management may have influenced the fishing efficiency of the Danish and Dutch demersal fleets harvesting cod, plaice and sole in the North Sea. Special consideration is given to the `plaice box', a restricted area where fishing

Area-based management and fishing efficiency

DEFF Research Database (Denmark)

Marchal, P.; Ulrich, Clara; Pastoors, M.

2002-01-01

The scope of this study is to investigate the extent to which area-based management may have influenced the fishing efficiency of the Danish and Dutch demersal fleets harvesting cod, plaice and sole in the North Sea. Special consideration is given to the 'plaice box', a restricted area where...... fishing is prohibited to towed-gear fleets of horsepower exceeding 300 hp. An index of fishing power is calculated as the log-ratio between the catch per unit effort (CPUE) of any vessel and some survey abundance index. Annual trends in fishing are calculated as the year-effect derived from a general...... linear model (GLM) analysis of the index of fishing power. The fishing efficiency of Danish gill-netters and, to some extent, Danish seiners, has overall increased inside the 'plaice box', whilst remaining relatively stable outside. However, the fishing efficiency of the other exemption fleets has...

Enterprise architecture evaluation using architecture framework and UML stereotypes

Directory of Open Access Journals (Sweden)

Narges Shahi

2014-08-01

Full Text Available There is an increasing need for enterprise architecture in numerous organizations with complicated systems with various processes. Support for information technology, organizational units whose elements maintain complex relationships increases. Enterprise architecture is so effective that its non-use in organizations is regarded as their institutional inability in efficient information technology management. The enterprise architecture process generally consists of three phases including strategic programing of information technology, enterprise architecture programing and enterprise architecture implementation. Each phase must be implemented sequentially and one single flaw in each phase may result in a flaw in the whole architecture and, consequently, in extra costs and time. If a model is mapped for the issue and then it is evaluated before enterprise architecture implementation in the second phase, the possible flaws in implementation process are prevented. In this study, the processes of enterprise architecture are illustrated through UML diagrams, and the architecture is evaluated in programming phase through transforming the UML diagrams to Petri nets. The results indicate that the high costs of the implementation phase will be reduced.

Architecture and Fault Identification of Wide-area Protection System

Directory of Open Access Journals (Sweden)

Yuxue Wang

2012-09-01

Full Text Available Wide-area protection system (WAPS is widely studied for the purpose of improvng the performance of conventional backup protection. In this paper, the system architecture of WAPS is proposed and its key technologies are discussed in view of engineering projects. So a mixed structurecentralized-distributed structure which is more suitable for WAPS in limited power grid region, is obtained based on the advantages of the centralized structure and distributed structure. Furthermore, regional distance protection algorithm was taken as an example to illustrate the functions of the constituent units. Faulted components can be detected based on multi-source imformation fuse in the algorithm. And the algorithm cannot only improve the selectivity, the rapidity, and the reliability of relaying protection but also has high fault tolerant capability. A simulation of 220 kV grid systems in Easter Hubei province shows the effectiveness of the wide-area protection system presented by this paper.

A new efficient algorithmic-based SEU tolerant system architecture

International Nuclear Information System (INIS)

Blaquiere, Y.; Gagne, G.; Savaria, Y.; Evequoz, C.

1995-01-01

A new ABFT architecture is proposed to tolerate multiple SEU with low overheads. This architecture memorizes operands on a stack upon error detection and it corrects errors by recomputing. This allows uninterrupted input data stream to be processed without data loss

Energy-Efficient Transmissions for Remote Wireless Sensor Networks: An Integrated HAP/Satellite Architecture for Emergency Scenarios.

Science.gov (United States)

Dong, Feihong; Li, Hongjun; Gong, Xiangwu; Liu, Quan; Wang, Jingchao

2015-09-03

A typical application scenario of remote wireless sensor networks (WSNs) is identified as an emergency scenario. One of the greatest design challenges for communications in emergency scenarios is energy-efficient transmission, due to scarce electrical energy in large-scale natural and man-made disasters. Integrated high altitude platform (HAP)/satellite networks are expected to optimally meet emergency communication requirements. In this paper, a novel integrated HAP/satellite (IHS) architecture is proposed, and three segments of the architecture are investigated in detail. The concept of link-state advertisement (LSA) is designed in a slow flat Rician fading channel. The LSA is received and processed by the terminal to estimate the link state information, which can significantly reduce the energy consumption at the terminal end. Furthermore, the transmission power requirements of the HAPs and terminals are derived using the gradient descent and differential equation methods. The energy consumption is modeled at both the source and system level. An innovative and adaptive algorithm is given for the energy-efficient path selection. The simulation results validate the effectiveness of the proposed adaptive algorithm. It is shown that the proposed adaptive algorithm can significantly improve energy efficiency when combined with the LSA and the energy consumption estimation.

Energy-Efficient Transmissions for Remote Wireless Sensor Networks: An Integrated HAP/Satellite Architecture for Emergency Scenarios

Science.gov (United States)

Dong, Feihong; Li, Hongjun; Gong, Xiangwu; Liu, Quan; Wang, Jingchao

2015-01-01

A typical application scenario of remote wireless sensor networks (WSNs) is identified as an emergency scenario. One of the greatest design challenges for communications in emergency scenarios is energy-efficient transmission, due to scarce electrical energy in large-scale natural and man-made disasters. Integrated high altitude platform (HAP)/satellite networks are expected to optimally meet emergency communication requirements. In this paper, a novel integrated HAP/satellite (IHS) architecture is proposed, and three segments of the architecture are investigated in detail. The concept of link-state advertisement (LSA) is designed in a slow flat Rician fading channel. The LSA is received and processed by the terminal to estimate the link state information, which can significantly reduce the energy consumption at the terminal end. Furthermore, the transmission power requirements of the HAPs and terminals are derived using the gradient descent and differential equation methods. The energy consumption is modeled at both the source and system level. An innovative and adaptive algorithm is given for the energy-efficient path selection. The simulation results validate the effectiveness of the proposed adaptive algorithm. It is shown that the proposed adaptive algorithm can significantly improve energy efficiency when combined with the LSA and the energy consumption estimation. PMID:26404292

Energy-Efficient Transmissions for Remote Wireless Sensor Networks: An Integrated HAP/Satellite Architecture for Emergency Scenarios

Directory of Open Access Journals (Sweden)

Feihong Dong

2015-09-01

Full Text Available A typical application scenario of remote wireless sensor networks (WSNs is identified as an emergency scenario. One of the greatest design challenges for communications in emergency scenarios is energy-efficient transmission, due to scarce electrical energy in large-scale natural and man-made disasters. Integrated high altitude platform (HAP/satellite networks are expected to optimally meet emergency communication requirements. In this paper, a novel integrated HAP/satellite (IHS architecture is proposed, and three segments of the architecture are investigated in detail. The concept of link-state advertisement (LSA is designed in a slow flat Rician fading channel. The LSA is received and processed by the terminal to estimate the link state information, which can significantly reduce the energy consumption at the terminal end. Furthermore, the transmission power requirements of the HAPs and terminals are derived using the gradient descent and differential equation methods. The energy consumption is modeled at both the source and system level. An innovative and adaptive algorithm is given for the energy-efficient path selection. The simulation results validate the effectiveness of the proposed adaptive algorithm. It is shown that the proposed adaptive algorithm can significantly improve energy efficiency when combined with the LSA and the energy consumption estimation.

An Energy-Efficient Multi-Tier Architecture for Fall Detection Using Smartphones.

Science.gov (United States)

Guvensan, M Amac; Kansiz, A Oguz; Camgoz, N Cihan; Turkmen, H Irem; Yavuz, A Gokhan; Karsligil, M Elif

2017-06-23

Automatic detection of fall events is vital to providing fast medical assistance to the causality, particularly when the injury causes loss of consciousness. Optimization of the energy consumption of mobile applications, especially those which run 24/7 in the background, is essential for longer use of smartphones. In order to improve energy-efficiency without compromising on the fall detection performance, we propose a novel 3-tier architecture that combines simple thresholding methods with machine learning algorithms. The proposed method is implemented on a mobile application, called uSurvive, for Android smartphones. It runs as a background service and monitors the activities of a person in daily life and automatically sends a notification to the appropriate authorities and/or user defined contacts when it detects a fall. The performance of the proposed method was evaluated in terms of fall detection performance and energy consumption. Real life performance tests conducted on two different models of smartphone demonstrate that our 3-tier architecture with feature reduction could save up to 62% of energy compared to machine learning only solutions. In addition to this energy saving, the hybrid method has a 93% of accuracy, which is superior to thresholding methods and better than machine learning only solutions.

An energy-efficient architecture for internet of things systems

Science.gov (United States)

De Rango, Floriano; Barletta, Domenico; Imbrogno, Alessandro

2016-05-01

In this paper some of the motivations for energy-efficient communications in wireless systems are described by highlighting emerging trends and identifying some challenges that need to be addressed to enable novel, scalable and energy-efficient communications. So an architecture for Internet of Things systems is presented, the purpose of which is to minimize energy consumption by communication devices, protocols, networks, end-user systems and data centers. Some electrical devices have been designed with multiple communication interfaces, such as RF or WiFi, using open source technology; they have been analyzed under different working conditions. Some devices are programmed to communicate directly with a web server, others to communicate only with a special device that acts as a bridge between some devices and the web server. Communication parameters and device status have been changed dynamically according to different scenarios in order to have the most benefits in terms of energy cost and battery lifetime. So the way devices communicate with the web server or between each other and the way they try to obtain the information they need to be always up to date change dynamically in order to guarantee always the lowest energy consumption, a long lasting battery lifetime, the fastest responses and feedbacks and the best quality of service and communication for end users and inner devices of the system.

SELECTING NEURAL NETWORK ARCHITECTURE FOR INVESTMENT PROFITABILITY PREDICTIONS

Directory of Open Access Journals (Sweden)

Marijana Zekić-Sušac

2012-07-01

Full Text Available After production and operations, finance and investments are one of the mostfrequent areas of neural network applications in business. The lack of standardizedparadigms that can determine the efficiency of certain NN architectures in a particularproblem domain is still present. The selection of NN architecture needs to take intoconsideration the type of the problem, the nature of the data in the model, as well as somestrategies based on result comparison. The paper describes previous research in that areaand suggests a forward strategy for selecting best NN algorithm and structure. Since thestrategy includes both parameter-based and variable-based testings, it can be used forselecting NN architectures as well as for extracting models. The backpropagation, radialbasis,modular, LVQ and probabilistic neural network algorithms were used on twoindependent sets: stock market and credit scoring data. The results show that neuralnetworks give better accuracy comparing to multiple regression and logistic regressionmodels. Since it is model-independant, the strategy can be used by researchers andprofessionals in other areas of application.

From Smart-Eco Building to High-Performance Architecture: Optimization of Energy Consumption in Architecture of Developing Countries

Science.gov (United States)

Mahdavinejad, M.; Bitaab, N.

2017-08-01

Search for high-performance architecture and dreams of future architecture resulted in attempts towards meeting energy efficient architecture and planning in different aspects. Recent trends as a mean to meet future legacy in architecture are based on the idea of innovative technologies for resource efficient buildings, performative design, bio-inspired technologies etc. while there are meaningful differences between architecture of developed and developing countries. Significance of issue might be understood when the emerging cities are found interested in Dubaization and other related booming development doctrines. This paper is to analyze the level of developing countries’ success to achieve smart-eco buildings’ goals and objectives. Emerging cities of West of Asia are selected as case studies of the paper. The results of the paper show that the concept of high-performance architecture and smart-eco buildings are different in developing countries in comparison with developed countries. The paper is to mention five essential issues in order to improve future architecture of developing countries: 1- Integrated Strategies for Energy Efficiency, 2- Contextual Solutions, 3- Embedded and Initial Energy Assessment, 4- Staff and Occupancy Wellbeing, 5- Life-Cycle Monitoring.

Architectural freedom and industrialized architecture

DEFF Research Database (Denmark)

Vestergaard, Inge

2012-01-01

to explain that architecture can be thought as a complex and diverse design through customization, telling exactly the revitalized storey about the change to a contemporary sustainable and better performing expression in direct relation to the given context. Through the last couple of years we have...... expression in the specific housing area. It is the aim of this article to expand the different design strategies which architects can use – to give the individual project attitudes and designs with architectural quality. Through the customized component production it is possible to choose different...... for retrofit design. If we add the question of the installations e.g. ventilation to this systematic thinking of building technique we get a diverse and functional architecture, thereby creating a new and clearer story telling about new and smart system based thinking behind architectural expression....

Architectural freedom and industrialised architecture

DEFF Research Database (Denmark)

Vestergaard, Inge

2012-01-01

Architectural freedom and industrialized architecture. Inge Vestergaard, Associate Professor, Cand. Arch. Aarhus School of Architecture, Denmark Noerreport 20, 8000 Aarhus C Telephone +45 89 36 0000 E-mai l inge.vestergaard@aarch.dk Based on the repetitive architecture from the "building boom" 1960...... customization, telling exactly the revitalized storey about the change to a contemporary sustainable and better performed expression in direct relation to the given context. Through the last couple of years we have in Denmark been focusing a more sustainable and low energy building technique, which also include...... to the building physic problems a new industrialized period has started based on light weight elements basically made of wooden structures, faced with different suitable materials meant for individual expression for the specific housing area. It is the purpose of this article to widen up the different design...

Architecture Sustainability

NARCIS (Netherlands)

Avgeriou, Paris; Stal, Michael; Hilliard, Rich

2013-01-01

Software architecture is the foundation of software system development, encompassing a system's architects' and stakeholders' strategic decisions. A special issue of IEEE Software is intended to raise awareness of architecture sustainability issues and increase interest and work in the area. The

South Ural State University Campus: Architectural Development Concept in Accordance with International Standards

Science.gov (United States)

Shabiev, S. G.

2017-11-01

The article deals with the vital problem of the implementation of the Program to enhance the competitiveness of the South Ural State University (SUSU) among other scientific and educational centers, which defines the main objective - to form a world-class university. According to the set objective, the most important task is to build a landscaped campus, which can be efficiently solved by the architectural means. The solution of this task is based on the scientific methods of the territorial and architectural improvement of the main university building complex development in the northern academic area and the architectural and aesthetic improvement of the space structural arrangement of the buildings. The author analyzes the global practice of modern campuses in Russia and abroad based on the Internet resources. The author carried out some additional on-site surveys of foreign campuses in Australia, Canada and China. The essence of the architectural concept of the first university campus development stage lies in the science-based achievement of a harmonious architectural and space unity of solid and plane elements of the site development, landscape arrangement of the main building’s courtyard and the adjacent territories with an efficient use of the relief, water areas and planting, allotment of additional spaces for landscaped areas due to a split-level arrangement, including a landscaped platform, increase of the underground space utilization share with the arrangement of an underground car parking and an underground walkway considering the environmental requirements. Further, it is planned to use the author’s methodological approach for the southern academic and the northern residential university areas, which will allow to create a duly completed landscaped SUSU campus with a developed infrastructure according to the international standards.

A shared synapse architecture for efficient FPGA implementation of autoencoders.

Science.gov (United States)

Suzuki, Akihiro; Morie, Takashi; Tamukoh, Hakaru

2018-01-01

This paper proposes a shared synapse architecture for autoencoders (AEs), and implements an AE with the proposed architecture as a digital circuit on a field-programmable gate array (FPGA). In the proposed architecture, the values of the synapse weights are shared between the synapses of an input and a hidden layer, and between the synapses of a hidden and an output layer. This architecture utilizes less of the limited resources of an FPGA than an architecture which does not share the synapse weights, and reduces the amount of synapse modules used by half. For the proposed circuit to be implemented into various types of AEs, it utilizes three kinds of parameters; one to change the number of layers' units, one to change the bit width of an internal value, and a learning rate. By altering a network configuration using these parameters, the proposed architecture can be used to construct a stacked AE. The proposed circuits are logically synthesized, and the number of their resources is determined. Our experimental results show that single and stacked AE circuits utilizing the proposed shared synapse architecture operate as regular AEs and as regular stacked AEs. The scalability of the proposed circuit and the relationship between the bit widths and the learning results are also determined. The clock cycles of the proposed circuits are formulated, and this formula is used to estimate the theoretical performance of the circuit when the circuit is used to construct arbitrary networks.

Preserving urban objects of historicaland architectural heritage

Directory of Open Access Journals (Sweden)

Bal'zannikova Ekaterina Mikhailovna

2014-01-01

Full Text Available Large cities of central Russia were built under the influence of the factors that played an important role in protecting their population; natural resources and opportunities for trading were also essential. The industrial development and construction of large industrial facilities were significant for the formation of urban environment. As a result architectural monuments of great historical value that have a significant influence on the formation of the modern city image were preserved.Nowadays, a great number of buildings of historical and architectural heritage turned out to be in poor condition. Funding and its efficient use are rational means of saving the most valuable objects of historical and cultural heritage. In order to do this it is necessary to solve the problems of developing complex and effective measures for preserving these objectsThe existing method of preserving urban objects does not focus on urban architectural objects of historical and architectural value. It does not cover the study of urban development features in architectural and town-planning environment surrounding this object, it does not determine the historical and architectural value of the object and it does not identify the relationship of the object and the surrounding objects as well as architectural frame of the total area. That is why the existing method cannot be considered an appropriate system for preserving the objects of historical and architectural heritage.In order to avoid the disadvantages mentioned above and to increase tourist interest to the architecturally valuable buildings in urban areas, the author has proposed a complex approach to improve the method of reconstructing urban objects of great historical and architectural significance.The existing method of preserving historical objects includes the preparatory period of studying the degree of historical and architectural heritage wear and decay, developing the techniques for strengthening

A COMPARATIVE STUDY OF SYSTEM NETWORK ARCHITECTURE Vs DIGITAL NETWORK ARCHITECTURE

OpenAIRE

Seema; Mukesh Arya

2011-01-01

The efficient managing system of sources is mandatory for the successful running of any network. Here this paper describes the most popular network architectures one of developed by IBM, System Network Architecture (SNA) and other is Digital Network Architecture (DNA). As we know that the network standards and protocols are needed for the network developers as well as users. Some standards are The IEEE 802.3 standards (The Institute of Electrical and Electronics Engineers 1980) (LAN), IBM Sta...

Corrugation Architecture Enabled Ultraflexible Wafer-Scale High-Efficiency Monocrystalline Silicon Solar Cell

KAUST Repository

Bahabry, Rabab R.

2018-01-02

Advanced classes of modern application require new generation of versatile solar cells showcasing extreme mechanical resilience, large-scale, low cost, and excellent power conversion efficiency. Conventional crystalline silicon-based solar cells offer one of the most highly efficient power sources, but a key challenge remains to attain mechanical resilience while preserving electrical performance. A complementary metal oxide semiconductor-based integration strategy where corrugation architecture enables ultraflexible and low-cost solar cell modules from bulk monocrystalline large-scale (127 × 127 cm) silicon solar wafers with a 17% power conversion efficiency. This periodic corrugated array benefits from an interchangeable solar cell segmentation scheme which preserves the active silicon thickness of 240 μm and achieves flexibility via interdigitated back contacts. These cells can reversibly withstand high mechanical stress and can be deformed to zigzag and bifacial modules. These corrugation silicon-based solar cells offer ultraflexibility with high stability over 1000 bending cycles including convex and concave bending to broaden the application spectrum. Finally, the smallest bending radius of curvature lower than 140 μm of the back contacts is shown that carries the solar cells segments.

Corrugation Architecture Enabled Ultraflexible Wafer-Scale High-Efficiency Monocrystalline Silicon Solar Cell

KAUST Repository

Bahabry, Rabab R.; Kutbee, Arwa T.; Khan, Sherjeel M.; Sepulveda, Adrian C.; Wicaksono, Irmandy; Nour, Maha A.; Wehbe, Nimer; Almislem, Amani Saleh Saad; Ghoneim, Mohamed T.; Sevilla, Galo T.; Syed, Ahad; Shaikh, Sohail F.; Hussain, Muhammad Mustafa

2018-01-01

Advanced classes of modern application require new generation of versatile solar cells showcasing extreme mechanical resilience, large-scale, low cost, and excellent power conversion efficiency. Conventional crystalline silicon-based solar cells offer one of the most highly efficient power sources, but a key challenge remains to attain mechanical resilience while preserving electrical performance. A complementary metal oxide semiconductor-based integration strategy where corrugation architecture enables ultraflexible and low-cost solar cell modules from bulk monocrystalline large-scale (127 × 127 cm) silicon solar wafers with a 17% power conversion efficiency. This periodic corrugated array benefits from an interchangeable solar cell segmentation scheme which preserves the active silicon thickness of 240 μm and achieves flexibility via interdigitated back contacts. These cells can reversibly withstand high mechanical stress and can be deformed to zigzag and bifacial modules. These corrugation silicon-based solar cells offer ultraflexibility with high stability over 1000 bending cycles including convex and concave bending to broaden the application spectrum. Finally, the smallest bending radius of curvature lower than 140 μm of the back contacts is shown that carries the solar cells segments.

Development of Landscape Architecture through Geo-eco-tourism in Tropical Karst Area to Avoid Extractive Cement Industry for Dignified and Sustainable Environment and Life

Science.gov (United States)

Cahyanti, Pita A. B.; Agus, Cahyono

2017-08-01

Karst areas in Indonesia amounted to 154,000 km2, potentially for extractive cement and wall paint industries. Exploitation of karst caused serious problems on the environment, health and social culture of the local community. Even though, karst region as a natural and cultural world heritage also have potential environmental services such as water resources, carbon sink, biodiversity, unique landscapes, natural caves, natural attractions, archaeological sites and mystic areas. Landscape architectural management of in the concept of blue revolution through the empowerment of land resources (soil, water, minerals) and biological resources (plant, animal, human), not only have adding value of economy aspect but also our dignified and sustainable environment and life through health, environmental, social, cultural, technological and management aspects. Geo-eco-tourism offers the efficiency of investment, increased creative innovation, increased funding, job creation, social capital development, stimulation of the socio-entrepreneurship in community. Community based geo-eco-tourism in Gunung Kidul Yogyakarta rapidly growing lately due to the local government banned the exploitation of karst. Landscape architecture at the caves, white sand beaches, cliffs in karst areas that beautiful, artistic and have special rare natural architecture form of stalactite and stalagmite, become the new phenomenal interested object of geo-eco-tourism. Many hidden nature objects that had been deserted and creepy could be visited by many local and foreign tourists. Landscape architectural management on hilltops with a wide view of the universe and fresh, sunset and sunrise, the clouds country are a rare sight for modern community. Local cultural attractions, local culinary, home stay with local communities will be an added attraction, but the infrastructure and human resources should be developed. Traveler photographs that widespread rapidly through social media and mass media became a

The Management of Manufacturing-Oriented Informatics Systems Using Efficient and Flexible Architectures

Directory of Open Access Journals (Sweden)

Constantin Daniel AVRAM

2011-01-01

Full Text Available Industry and in particular the manufacturing-oriented sector has always been researched and innovated as a result of technological progress, diversification and differentiation among consumers' demands. A company that provides to its customers products matching perfectly their demands at competitive prices has a great advantage over its competitors. Manufacturing-oriented information systems are becoming more flexible and configurable and they require integration with the entire organization. This can be done using efficient software architectures that will allow the coexistence between commercial solutions and open source components while sharing computing resources organized in grid infrastructures and under the governance of powerful management tools.

Efficient Architectures for Low Latency and High Throughput Trading Systems on the JVM

Directory of Open Access Journals (Sweden)

Alexandru LIXANDRU

2013-01-01

Full Text Available The motivation for our research starts from the common belief that the Java platform is not suitable for implementing ultra-high performance applications. Java is one of the most widely used software development platform in the world, and it provides the means for rapid development of robust and complex applications that are easy to extend, ensuring short time-to-market of initial deliveries and throughout the lifetime of the system. The Java runtime environment, and especially the Java Virtual Machine, on top of which applications are executed, is the principal source of concerns in regards to its suitability in the electronic trading environment, mainly because of its implicit memory management. In this paper, we intend to identify some of the most common measures that can be taken, both at the Java runtime environment level and at the application architecture level, which can help Java applications achieve ultra-high performance. We also propose two efficient architectures for exchange trading systems that allow for ultra-low latencies and high throughput.

An Efficient Vital Area Identification Method

International Nuclear Information System (INIS)

Jung, Woo Sik

2017-01-01

A new Vital Area Identification (VAI) method was developed in this study for minimizing the burden of VAI procedure. It was accomplished by performing simplification of sabotage event trees or Probabilistic Safety Assessment (PSA) event trees at the very first stage of VAI procedure. Target sets and prevention sets are calculated from the sabotage fault tree. The rooms in the shortest (most economical) prevention set are selected and protected as vital areas. All physical protection is emphasized to protect these vital areas. All rooms in the protected area, the sabotage of which could lead to core damage, should be incorporated into sabotage fault tree. So, sabotage fault tree development is a very difficult task that requires high engineering costs. IAEA published INFCIRC/225/Rev.5 in 2011 which includes principal international guidelines for the physical protection of nuclear material and nuclear installations. A new efficient VAI method was developed and demonstrated in this study. Since this method drastically reduces VAI problem size, it provides very quick and economical VAI procedure. A consistent and integrated VAI procedure had been developed by taking advantage of PSA results, and more efficient VAI method was further developed in this study by inserting PSA event tree simplification at the initial stage of VAI procedure.

Efficiency of High Order Spectral Element Methods on Petascale Architectures

KAUST Repository

Hutchinson, Maxwell; Heinecke, Alexander; Pabst, Hans; Henry, Greg; Parsani, Matteo; Keyes, David E.

2016-01-01

High order methods for the solution of PDEs expose a tradeoff between computational cost and accuracy on a per degree of freedom basis. In many cases, the cost increases due to higher arithmetic intensity while affecting data movement minimally. As architectures tend towards wider vector instructions and expect higher arithmetic intensities, the best order for a particular simulation may change. This study highlights preferred orders by identifying the high order efficiency frontier of the spectral element method implemented in Nek5000 and NekBox: the set of orders and meshes that minimize computational cost at fixed accuracy. First, we extract Nek’s order-dependent computational kernels and demonstrate exceptional hardware utilization by hardware-aware implementations. Then, we perform productionscale calculations of the nonlinear single mode Rayleigh-Taylor instability on BlueGene/Q and Cray XC40-based supercomputers to highlight the influence of the architecture. Accuracy is defined with respect to physical observables, and computational costs are measured by the corehour charge of the entire application. The total number of grid points needed to achieve a given accuracy is reduced by increasing the polynomial order. On the XC40 and BlueGene/Q, polynomial orders as high as 31 and 15 come at no marginal cost per timestep, respectively. Taken together, these observations lead to a strong preference for high order discretizations that use fewer degrees of freedom. From a performance point of view, we demonstrate up to 60% full application bandwidth utilization at scale and achieve ≈1PFlop/s of compute performance in Nek’s most flop-intense methods.

Efficiency of High Order Spectral Element Methods on Petascale Architectures

KAUST Repository

Hutchinson, Maxwell

2016-06-14

High order methods for the solution of PDEs expose a tradeoff between computational cost and accuracy on a per degree of freedom basis. In many cases, the cost increases due to higher arithmetic intensity while affecting data movement minimally. As architectures tend towards wider vector instructions and expect higher arithmetic intensities, the best order for a particular simulation may change. This study highlights preferred orders by identifying the high order efficiency frontier of the spectral element method implemented in Nek5000 and NekBox: the set of orders and meshes that minimize computational cost at fixed accuracy. First, we extract Nek’s order-dependent computational kernels and demonstrate exceptional hardware utilization by hardware-aware implementations. Then, we perform productionscale calculations of the nonlinear single mode Rayleigh-Taylor instability on BlueGene/Q and Cray XC40-based supercomputers to highlight the influence of the architecture. Accuracy is defined with respect to physical observables, and computational costs are measured by the corehour charge of the entire application. The total number of grid points needed to achieve a given accuracy is reduced by increasing the polynomial order. On the XC40 and BlueGene/Q, polynomial orders as high as 31 and 15 come at no marginal cost per timestep, respectively. Taken together, these observations lead to a strong preference for high order discretizations that use fewer degrees of freedom. From a performance point of view, we demonstrate up to 60% full application bandwidth utilization at scale and achieve ≈1PFlop/s of compute performance in Nek’s most flop-intense methods.

Architectural freedom and industrialised architecture

DEFF Research Database (Denmark)

Vestergaard, Inge

2012-01-01

to the building physic problems a new industrialized period has started based on light weight elements basically made of wooden structures, faced with different suitable materials meant for individual expression for the specific housing area. It is the purpose of this article to widen up the different design...... to this systematic thinking of the building technique we get a diverse and functional architecture. Creating a new and clearer story telling about new and smart system based thinking behind the architectural expression....

Design process of an area-efficient photobioreactor

NARCIS (Netherlands)

Zijffers, J.F.; Janssen, M.G.J.; Tramper, J.; Wijffels, R.H.

2008-01-01

This article describes the design process of the Green Solar Collector (GSC), an area-efficient photobioreactor for the outdoor cultivation of microalgae. The overall goal has been to design a system in which all incident sunlight on the area covered by the reactor is delivered to the algae at such

Readout Architecture for Hybrid Pixel Readout Chips

CERN Document Server

AUTHOR|(SzGeCERN)694170; Westerlund, Tomi; Wyllie, Ken

The original contribution of this thesis to knowledge are novel digital readout architectures for hybrid pixel readout chips. The thesis presents asynchronous bus-based architecture, a data-node based column architecture and a network-based pixel matrix architecture for data transportation. It is shown that the data-node architecture achieves readout efficiency 99 % with half the output rate as a bus-based system. The network-based solution avoids ``broken'' columns due to some manufacturing errors, and it distributes internal data traffic more evenly across the pixel matrix than column-based architectures. An improvement of $>$ 10 % to the efficiency is achieved with uniform and non-uniform hit occupancies. Architectural design has been done using transaction level modeling ($TLM$) and sequential high-level design techniques for reducing the design and simulation time. It has been possible to simulate tens of column and full chip architectures using the high-level techniques. A decrease of $>$ 10 in run-time...

Heterogeneous reconfigurable processors for real-time baseband processing from algorithm to architecture

CERN Document Server

Zhang, Chenxin; Öwall, Viktor

2016-01-01

This book focuses on domain-specific heterogeneous reconfigurable architectures, demonstrating for readers a computing platform which is flexible enough to support multiple standards, multiple modes, and multiple algorithms. The content is multi-disciplinary, covering areas of wireless communication, computing architecture, and circuit design. The platform described provides real-time processing capability with reasonable implementation cost, achieving balanced trade-offs among flexibility, performance, and hardware costs. The authors discuss efficient design methods for wireless communication processing platforms, from both an algorithm and architecture design perspective. Coverage also includes computing platforms for different wireless technologies and standards, including MIMO, OFDM, Massive MIMO, DVB, WLAN, LTE/LTE-A, and 5G. •Discusses reconfigurable architectures, including hardware building blocks such as processing elements, memory sub-systems, Network-on-Chip (NoC), and dynamic hardware reconfigur...

Area and energy efficient high-performance ZnO wavy channel thin-film transistor

KAUST Repository

Hanna, Amir; Ghoneim, Mohamed T.; Bahabry, Rabab R.; Hussain, Aftab M.; Fahad, Hossain M.; Hussain, Muhammad Mustafa

2014-01-01

of the transistor width in the direction perpendicular to the substrate through integrating continuous fin features on the underlying substrate. This architecture enables expanding the TFT width without consuming any additional chip area, thus enabling increased

Are Nanotube Architectures More Advantageous Than Nanowire Architectures For Field Effect Transistors?

KAUST Repository

Fahad, Hossain M.

2012-06-27

Decade long research in 1D nanowire field effect transistors (FET) shows although it has ultra-low off-state leakage current and a single device uses a very small area, its drive current generation per device is extremely low. Thus it requires arrays of nanowires to be integrated together to achieve appreciable amount of current necessary for high performance computation causing an area penalty and compromised functionality. Here we show that a FET with a nanotube architecture and core-shell gate stacks is capable of achieving the desirable leakage characteristics of the nanowire FET while generating a much larger drive current with area efficiency. The core-shell gate stacks of silicon nanotube FETs tighten the electrostatic control and enable volume inversion mode operation leading to improved short channel behavior and enhanced performance. Our comparative study is based on semi-classical transport models with quantum confinement effects which offers new opportunity for future generation high performance computation.

Using Runtime Systems Tools to Implement Efficient Preconditioners for Heterogeneous Architectures

Directory of Open Access Journals (Sweden)

Roussel Adrien

2016-11-01

Full Text Available Solving large sparse linear systems is a time-consuming step in basin modeling or reservoir simulation. The choice of a robust preconditioner strongly impact the performance of the overall simulation. Heterogeneous architectures based on General Purpose computing on Graphic Processing Units (GPGPU or many-core architectures introduce programming challenges which can be managed in a transparent way for developer with the use of runtime systems. Nevertheless, algorithms need to be well suited for these massively parallel architectures. In this paper, we present preconditioning techniques which enable to take advantage of emerging architectures. We also present our task-based implementations through the use of the HARTS (Heterogeneous Abstract RunTime System runtime system, which aims to manage the recent architectures. We focus on two preconditoners. The first is ILU(0 preconditioner implemented on distributing memory systems. The second one is a multi-level domain decomposition method implemented on a shared-memory system. Obtained results are then presented on corresponding architectures, which open the way to discuss on the scalability of such methods according to numerical performances while keeping in mind that the next step is to propose a massively parallel implementations of these techniques.

Strategies in architectural design and urban planning in the context of energy efficiency in buildings

Directory of Open Access Journals (Sweden)

Vuksanović Dušan

2007-01-01

Full Text Available Some of the design concepts in architecture and urban planning, created on demands of energy efficiency, that apply in early stages of design process a schematic design, i.e. in the phase of creating the basis of architectural or planning solution, are analyzed in this paper. These design strategies have a role to be comprehensive enough to provide application of their key potentials, but at the same time they need to remain simple enough and not burden a designer with inadequate number of information. Design models for passive heating, passive cooling and natural lighting that refer to the buildings mainly have been considered, together with the principles for the settlements or building groups. Guiding a design concept towards the one of described design principles e.g. their application within the diurnal and seasonal cycles, depends on local climatic conditions and type of building (residential, commercial or educational. The presentation of a model is followed by the explanation of the phenomena of impacts/influences (climate program and answers (the concept, passive components related to a certain strategy, and by the illustration of a strategy on a realized object (case study. Issues of design strategies on energy efficiency are considered through different levels, e.g. through spatial organization, form and added components of buildings, as well as structure and characteristics of elements of external structures - facades and roofs.

A Systems Engineering Approach to Architecture Development

Science.gov (United States)

Di Pietro, David A.

2015-01-01

Architecture development is often conducted prior to system concept design when there is a need to determine the best-value mix of systems that works collectively in specific scenarios and time frames to accomplish a set of mission area objectives. While multiple architecture frameworks exist, they often require use of unique taxonomies and data structures. In contrast, this paper characterizes architecture development using terminology widely understood within the systems engineering community. Using a notional civil space architecture example, it employs a multi-tier framework to describe the enterprise level architecture and illustrates how results of lower tier, mission area architectures integrate into the enterprise architecture. It also presents practices for conducting effective mission area architecture studies, including establishing the trade space, developing functions and metrics, evaluating the ability of potential design solutions to meet the required functions, and expediting study execution through the use of iterative design cycles

A high throughput architecture for a low complexity soft-output demapping algorithm

Science.gov (United States)

Ali, I.; Wasenmüller, U.; Wehn, N.

2015-11-01

Iterative channel decoders such as Turbo-Code and LDPC decoders show exceptional performance and therefore they are a part of many wireless communication receivers nowadays. These decoders require a soft input, i.e., the logarithmic likelihood ratio (LLR) of the received bits with a typical quantization of 4 to 6 bits. For computing the LLR values from a received complex symbol, a soft demapper is employed in the receiver. The implementation cost of traditional soft-output demapping methods is relatively large in high order modulation systems, and therefore low complexity demapping algorithms are indispensable in low power receivers. In the presence of multiple wireless communication standards where each standard defines multiple modulation schemes, there is a need to have an efficient demapper architecture covering all the flexibility requirements of these standards. Another challenge associated with hardware implementation of the demapper is to achieve a very high throughput in double iterative systems, for instance, MIMO and Code-Aided Synchronization. In this paper, we present a comprehensive communication and hardware performance evaluation of low complexity soft-output demapping algorithms to select the best algorithm for implementation. The main goal of this work is to design a high throughput, flexible, and area efficient architecture. We describe architectures to execute the investigated algorithms. We implement these architectures on a FPGA device to evaluate their hardware performance. The work has resulted in a hardware architecture based on the figured out best low complexity algorithm delivering a high throughput of 166 Msymbols/second for Gray mapped 16-QAM modulation on Virtex-5. This efficient architecture occupies only 127 slice registers, 248 slice LUTs and 2 DSP48Es.

Chitin/clay microspheres with hierarchical architecture for highly efficient removal of organic dyes.

Science.gov (United States)

Xu, Rui; Mao, Jie; Peng, Na; Luo, Xiaogang; Chang, Chunyu

2018-05-15

Numerous adsorbents have been reported for efficient removal of dye from water, but the high cost raw materials and complicated fabrication process limit their practical applications. Herein, novel nanocomposite microspheres were fabricated from chitin and clay by a simple thermally induced sol-gel transition. Clay nanosheets were uniformly embedded in a nanofiber weaved chitin microsphere matrix, leading to their hierarchical architecture. Benefiting from this unique structure, microspheres could efficiently remove methylene blue (MB) through a spontaneous physic-sorption process which fit well with pseudo-second-order and Langmuir isotherm models. The maximal values of adsorption capability obtained by calculation and experiment were 152.2 and 156.7 mg g -1 , respectively. Chitin/clay microspheres (CCM2) could remove 99.99% MB from its aqueous solution (10 mg g -1 ) within 20 min. These findings provide insight into a new strategy for fabrication of dye adsorbents with hierarchical structure from low cost raw materials. Copyright © 2018 Elsevier Ltd. All rights reserved.

Power efficient and high performance VLSI architecture for AES algorithm

Directory of Open Access Journals (Sweden)

K. Kalaiselvi

2015-09-01

Full Text Available Advanced encryption standard (AES algorithm has been widely deployed in cryptographic applications. This work proposes a low power and high throughput implementation of AES algorithm using key expansion approach. We minimize the power consumption and critical path delay using the proposed high performance architecture. It supports both encryption and decryption using 256-bit keys with a throughput of 0.06 Gbps. The VHDL language is utilized for simulating the design and an FPGA chip has been used for the hardware implementations. Experimental results reveal that the proposed AES architectures offer superior performance than the existing VLSI architectures in terms of power, throughput and critical path delay.

Hardware Architecture of Polyphase Filter Banks Performing Embedded Resampling for Software-Defined Radio Front-Ends

DEFF Research Database (Denmark)

Awan, Mehmood-Ur-Rehman; Le Moullec, Yannick; Koch, Peter

2012-01-01

, and power optimization for field programmable gate array (FPGA) based architectures in an M -path polyphase filter bank with modified N -path polyphase filter. Such systems allow resampling by arbitrary ratios while simultaneously performing baseband aliasing from center frequencies at Nyquist zones......In this paper, we describe resource-efficient hardware architectures for software-defined radio (SDR) front-ends. These architectures are made efficient by using a polyphase channelizer that performs arbitrary sample rate changes, frequency selection, and bandwidth control. We discuss area, time...... that are not multiples of the output sample rate. A non-maximally decimated polyphase filter bank, where the number of data loads is not equal to the number of M subfilters, processes M subfilters in a time period that is either less than or greater than the M data-load’s time period. We present a load...

The Chameleon Architecture for Streaming DSP Applications

NARCIS (Netherlands)

Bergmann, N.; Smit, Gerardus Johannes Maria; Kokkeler, Andre B.J.; Platzner, M.; Wolkotte, P.T.; Teich, J.; Holzenspies, P.K.F.; van de Burgwal, M.D.; Heysters, P.M.

2007-01-01

We focus on architectures for streaming DSP applications such as wireless baseband processing and image processing. We aim at a single generic architecture that is capable of dealing with different DSP applications. This architecture has to be energy efficient and fault tolerant. We introduce a

Communication and Memory Architecture Design of Application-Specific High-End Multiprocessors

Directory of Open Access Journals (Sweden)

Yahya Jan

2012-01-01

Full Text Available This paper is devoted to the design of communication and memory architectures of massively parallel hardware multiprocessors necessary for the implementation of highly demanding applications. We demonstrated that for the massively parallel hardware multiprocessors the traditionally used flat communication architectures and multi-port memories do not scale well, and the memory and communication network influence on both the throughput and circuit area dominates the processors influence. To resolve the problems and ensure scalability, we proposed to design highly optimized application-specific hierarchical and/or partitioned communication and memory architectures through exploring and exploiting the regularity and hierarchy of the actual data flows of a given application. Furthermore, we proposed some data distribution and related data mapping schemes in the shared (global partitioned memories with the aim to eliminate the memory access conflicts, as well as, to ensure that our communication design strategies will be applicable. We incorporated these architecture synthesis strategies into our quality-driven model-based multi-processor design method and related automated architecture exploration framework. Using this framework, we performed a large series of experiments that demonstrate many various important features of the synthesized memory and communication architectures. They also demonstrate that our method and related framework are able to efficiently synthesize well scalable memory and communication architectures even for the high-end multiprocessors. The gains as high as 12-times in performance and 25-times in area can be obtained when using the hierarchical communication networks instead of the flat networks. However, for the high parallelism levels only the partitioned approach ensures the scalability in performance.

Minimalism in architecture: Architecture as a language of its identity

Directory of Open Access Journals (Sweden)

Vasilski Dragana

2012-01-01

Full Text Available Every architectural work is created on the principle that includes the meaning, and then this work is read like an artifact of the particular meaning. Resources by which the meaning is built primarily, susceptible to transformation, as well as routing of understanding (decoding messages carried by a work of architecture, are subject of semiotics and communication theories, which have played significant role for the architecture and the architect. Minimalism in architecture, as a paradigm of the XXI century architecture, means searching for essence located in the irreducible minimum. Inspired use of architectural units (archetypical elements, trough the fatasm of simplicity, assumes the primary responsibility for providing the object identity, because it participates in language formation and therefore in its reading. Volume is form by clean language that builds the expression of the fluid areas liberated of recharge needs. Reduced architectural language is appropriating to the age marked by electronic communications.

Efficient reconfigurable hardware architecture for accurately computing success probability and data complexity of linear attacks

DEFF Research Database (Denmark)

Bogdanov, Andrey; Kavun, Elif Bilge; Tischhauser, Elmar

2012-01-01

An accurate estimation of the success probability and data complexity of linear cryptanalysis is a fundamental question in symmetric cryptography. In this paper, we propose an efficient reconfigurable hardware architecture to compute the success probability and data complexity of Matsui's Algorithm...... block lengths ensures that any empirical observations are not due to differences in statistical behavior for artificially small block lengths. Rather surprisingly, we observed in previous experiments a significant deviation between the theory and practice for Matsui's Algorithm 2 for larger block sizes...

An architecture for efficient reuse in flexible production scenarios

DEFF Research Database (Denmark)

Andersen, Rasmus Hasle; Dalgaard, Lars; Beck, Anders Billesø

2015-01-01

Traditionally, small batch production has not been automated - it has been too resource demanding compared to the expected benefit. However, this is set to change with the new developments in easily trainable robotic co-worker systems, capable of being adapted to new tasks through intuitive user....... We present the DTI Robot CoWorker architecture, which is a generic robotic architecture, which provides a system-independent execution framework for adaptive and interactive robotic applications. Our approach has proven viable as we have successfully automated a complicated integration task (among...

Single-unit-cell layer established Bi 2 WO 6 3D hierarchical architectures: Efficient adsorption, photocatalysis and dye-sensitized photoelectrochemical performance

Energy Technology Data Exchange (ETDEWEB)

Huang, Hongwei; Cao, Ranran; Yu, Shixin; Xu, Kang; Hao, Weichang; Wang, Yonggang; Dong, Fan; Zhang, Tierui; Zhang, Yihe

2017-12-01

Single-layer catalysis sparks huge interests and gains widespread attention owing to its high activity. Simultaneously, three-dimensional (3D) hierarchical structure can afford large surface area and abundant reactive sites, contributing to high efficiency. Herein, we report an absorbing single-unit-cell layer established Bi2WO6 3D hierarchical architecture fabricated by a sodium dodecyl benzene sulfonate (SDBS)-assisted assembled strategy. The DBS- long chains can adsorb on the (Bi2O2)2+ layers and hence impede stacking of the layers, resulting in the single-unit-cell layer. We also uncovered that SDS with a shorter chain is less effective than SDBS. Due to the sufficient exposure of surface O atoms, single-unit-cell layer 3D Bi2WO6 shows strong selectivity for adsorption on multiform organic dyes with different charges. Remarkably, the single-unit-cell layer 3D Bi2WO6 casts profoundly enhanced photodegradation activity and especially a superior photocatalytic H2 evolution rate, which is 14-fold increase in contrast to the bulk Bi2WO6. Systematic photoelectrochemical characterizations disclose that the substantially elevated carrier density and charge separation efficiency take responsibility for the strengthened photocatalytic performance. Additionally, the possibility of single-unit-cell layer 3D Bi2WO6 as dye-sensitized solar cells (DSSC) has also been attempted and it was manifested to be a promising dye-sensitized photoanode for oxygen evolution reaction (ORR). Our work not only furnish an insight into designing single-layer assembled 3D hierarchical architecture, but also offer a multi-functional material for environmental and energy applications.

Approaching Environmental Issues in Architecture

DEFF Research Database (Denmark)

Petersen, Mads Dines; Knudstrup, Mary-Ann

2013-01-01

The research presented here takes its point of departure in the design process with a specific focus on how it is approached when designing energy efficient architecture. This is done through a case-study of a design process in a Danish architectural office. This study shows the importance...

Coherent Architecture Development as a Basis for Technology Development

DEFF Research Database (Denmark)

Ravn, Poul Martin

coherent architectures in a technology context as a basis for identification of critical development areas, this research has been focused around the following three areas: 1. Product architecture instances for prototypes testing novel technology. 2. Product architecture definition for a sub-system based......The subject of this PhD thesis is architecture-centered design. It elaborates especially on two specific areas: the coherence in architectures in a technology development context and the identification of critical development areas via property-based reasoning, based on an understanding of cette...... coherence. Despite the acceptance and results presented in multiple studies from the application of architectures, the research on architecture work in a technology development context is limited. Technologies are often developed and represented in the form of product sub-systems that are made available...

CONTEMPORARY SLOVENIAN TIMBER ARCHITECTURE INTERNATIONAL RECOGNIZED

Directory of Open Access Journals (Sweden)

Manja Kitek Kuzman

2014-12-01

Full Text Available The book presents Slovenia' s contemporary timber architecture. Thanks to its abundant forests, Slovenia has preserved the tradition of wood construction. As much as 60% of its surface is covered by forests. Slovenia is also the third most forested country in Europe. The high share of forest-covered surface allows for a sustainable production of high-quality wood. In the past, wood was used primarily in the construction of farm buildings, but now timber architecture is used for everything from residences and office buildings to public buildings such as community centres and schools. Timber construction is becoming increasingly popular. Apart from larger companies taking this approach, a great number of wooden houses have sprung up, built either on personal initiative or with the support of carpenter workshops. Slovenian timber architecture has taken a new approach to environmental and energy-efficiency problems and received great international recognition. The book discusses over fifty projects built over a ten-year period, and includes descriptions, photographs, and plans. The projects include residential areas, administration, and office, as well as tourist, educational, and industrial buildings. Timber architecture is presented as an integral part of the Slovenian landscape. The monograph will be useful to designers and future experts in their planning of optimal timber buildings and will highlight the main benefits of using timber construction.

Design of a large remote seismic exploration data acquisition system, with the architecture of a distributed storage area network

International Nuclear Information System (INIS)

Cao, Ping; Song, Ke-zhu; Yang, Jun-feng; Ruan, Fu-ming

2011-01-01

Nowadays, seismic exploration data acquisition (DAQ) systems have been developed into remote forms with a large-scale coverage area. In this kind of application, some features must be mentioned. Firstly, there are many sensors which are placed remotely. Secondly, the total data throughput is high. Thirdly, optical fibres are not suitable everywhere because of cost control, harsh running environments, etc. Fourthly, the ability of expansibility and upgrading is a must for this kind of application. It is a challenge to design this kind of remote DAQ (rDAQ). Data transmission, clock synchronization, data storage, etc must be considered carefully. A fourth-hierarchy model of rDAQ is proposed. In this model, rDAQ is divided into four different function levels. From this model, a simple and clear architecture based on a distributed storage area network is proposed. rDAQs with this architecture have advantages of flexible configuration, expansibility and stability. This architecture can be applied to design and realize from simple single cable systems to large-scale exploration DAQs

Architectural Geometry and Fabrication-Aware Design

KAUST Repository

Pottmann, Helmut

2013-01-01

. This is the source of numerous research problems many of which fall into the area of Geometric Computing and form part of a recently emerging research area, called "Architectural Geometry". The present paper provides a short survey of research in Architectural

Multiprocessor architecture: Synthesis and evaluation

Science.gov (United States)

Standley, Hilda M.

1990-01-01

Multiprocessor computed architecture evaluation for structural computations is the focus of the research effort described. Results obtained are expected to lead to more efficient use of existing architectures and to suggest designs for new, application specific, architectures. The brief descriptions given outline a number of related efforts directed toward this purpose. The difficulty is analyzing an existing architecture or in designing a new computer architecture lies in the fact that the performance of a particular architecture, within the context of a given application, is determined by a number of factors. These include, but are not limited to, the efficiency of the computation algorithm, the programming language and support environment, the quality of the program written in the programming language, the multiplicity of the processing elements, the characteristics of the individual processing elements, the interconnection network connecting processors and non-local memories, and the shared memory organization covering the spectrum from no shared memory (all local memory) to one global access memory. These performance determiners may be loosely classified as being software or hardware related. This distinction is not clear or even appropriate in many cases. The effect of the choice of algorithm is ignored by assuming that the algorithm is specified as given. Effort directed toward the removal of the effect of the programming language and program resulted in the design of a high-level parallel programming language. Two characteristics of the fundamental structure of the architecture (memory organization and interconnection network) are examined.

Sustainability, Smart Growth, and Landscape Architecture

Science.gov (United States)

Sustainability, Smart Growth, and Landscape Architecture is an overview course for landscape architecture students interested in sustainability in landscape architecture and how it might apply to smart growth principles in urban, suburban, and rural areas

Large-area high-efficiency flexible PHOLED lighting panels

Science.gov (United States)

Pang, Huiqing; Mandlik, Prashant; Levermore, Peter A.; Silvernail, Jeff; Ma, Ruiqing; Brown, Julie J.

2012-09-01

Organic Light Emitting Diodes (OLEDs) provide various attractive features for next generation illumination systems, including high efficiency, low power, thin and flexible form factor. In this work, we incorporated phosphorescent emitters and demonstrated highly efficient white phosphorescent OLED (PHOLED) devices on flexible plastic substrates. The 0.94 cm2 small-area device has total thickness of approximately 0.25 mm and achieved 63 lm/W at 1,000 cd/m2 with CRI = 85 and CCT = 2920 K. We further designed and fabricated a 15 cm x 15 cm large-area flexible white OLED lighting panels, finished with a hybrid single-layer ultra-low permeability single layer barrier (SLB) encapsulation film. The flexible panel has an active area of 116.4 cm2, and achieved a power efficacy of 47 lm/W at 1,000 cd/m2 with CRI = 83 and CCT = 3470 K. The efficacy of the panel at 3,000 cd/m2 is 43 lm/W. The large-area flexible PHOLED lighting panel is to bring out enormous possibilities to the future general lighting applications.

Energy-efficient area coverage for intruder detection in sensor networks

CERN Document Server

He, Shibo; Li, Junkun

2014-01-01

This Springer Brief presents recent research results on area coverage for intruder detection from an energy-efficient perspective. These results cover a variety of topics, including environmental surveillance and security monitoring. The authors also provide the background and range of applications for area coverage and elaborate on system models such as the formal definition of area coverage and sensing models. Several chapters focus on energy-efficient intruder detection and intruder trapping under the well-known binary sensing model, along with intruder trapping under the probabilistic sens

Area-efficient physically unclonable function circuit architecture

Science.gov (United States)

Gurrieri, Thomas; Hamlet, Jason; Bauer, Todd; Helinski, Ryan; Pierson, Lyndon G

2015-04-28

Generating a physically a physically unclonable function ("PUF") circuit value includes comparing each of first identification components in a first bank to each of second identification components in a second bank. A given first identification component in the first bank is not compared to another first identification component in the first bank and a given second identification component in the second bank is not compared to another second identification component in the second bank. A digital bit value is generated for each comparison made while comparing each of the first identification components to each of the second identification components. A PUF circuit value is generated from the digital bit values from each comparison made.

On methods of sustainable architectural design of bio-positive buildings in the low-rise residential development structure

Directory of Open Access Journals (Sweden)

Zhogoleva Anna

2017-01-01

Full Text Available The purpose of the author’s research is to determine the actual content of sustainable architectural design for suburban residential development. In accordance with the methodology of area sustainable development the traditional architectural design according to the rules and regulations is completed with additional approaches and methods. As a result, methods of bio-positive design of buildings have been studied and defined, including: the principle of planning transformations, the use of environmentally friendly, local building materials and design concepts, energy-efficient architectural design, the use of alternative energy in building operation, the design of the energy intake and accumulationsystems, the architectural and landscape design that ensures stable functioning of autonomous, sustainable biosystems on the site, non-waste functioning of architectural objects, introduction of waste disposal systems in the project.

Energy-efficiency instruments in the electricity area

International Nuclear Information System (INIS)

Hammer, S.; Oettli, B.; Schneider, Ch.; Iten, R.; Peherstorfer, N.

2007-06-01

This comprehensive report for the Swiss Federal Office of Energy (SFOE) describes a mix of instruments that could increase the efficiency of electricity usage in Switzerland. The basis for the development of these instruments - the experience gained in Europe in this area - is discussed. Explicitly not discussed are energy and electricity steering taxes, which could also be part of a future instrument-mix. The measures suggested include the setting of compulsory long-term reduction targets that are to form the basis for strategies and measures to be taken in particular areas and the development of an appropriate instrument-mix for this purpose. These could include regulations and labels, a national fund and certificate trading. Suppliers of electricity could be committed to increasing the efficiency of electricity use and national programmes could also attempt to influence consumer habits. The instruments should, according to the authors, be based on the existing legal framework and use know-how and structures that are already available

Computer architecture for efficient algorithmic executions in real-time systems: New technology for avionics systems and advanced space vehicles

Science.gov (United States)

Carroll, Chester C.; Youngblood, John N.; Saha, Aindam

1987-01-01

Improvements and advances in the development of computer architecture now provide innovative technology for the recasting of traditional sequential solutions into high-performance, low-cost, parallel system to increase system performance. Research conducted in development of specialized computer architecture for the algorithmic execution of an avionics system, guidance and control problem in real time is described. A comprehensive treatment of both the hardware and software structures of a customized computer which performs real-time computation of guidance commands with updated estimates of target motion and time-to-go is presented. An optimal, real-time allocation algorithm was developed which maps the algorithmic tasks onto the processing elements. This allocation is based on the critical path analysis. The final stage is the design and development of the hardware structures suitable for the efficient execution of the allocated task graph. The processing element is designed for rapid execution of the allocated tasks. Fault tolerance is a key feature of the overall architecture. Parallel numerical integration techniques, tasks definitions, and allocation algorithms are discussed. The parallel implementation is analytically verified and the experimental results are presented. The design of the data-driven computer architecture, customized for the execution of the particular algorithm, is discussed.

A Microkernel Architecture for Constraint Programming

OpenAIRE

Michel, Laurent; Van Hentenryck, Pascal

2014-01-01

This paper presents a microkernel architecture for constraint programming organized around a number of small number of core functionalities and minimal interfaces. The architecture contrasts with the monolithic nature of many implementations. Experimental results indicate that the software engineering benefits are not incompatible with runtime efficiency.

Strategies for increasing the efficiency of heterojunction organic solar cells: material selection and device architecture.

Science.gov (United States)

Heremans, Paul; Cheyns, David; Rand, Barry P

2009-11-17

Thin-film blends or bilayers of donor- and acceptor-type organic semiconductors form the core of heterojunction organic photovoltaic cells. Researchers measure the quality of photovoltaic cells based on their power conversion efficiency, the ratio of the electrical power that can be generated versus the power of incident solar radiation. The efficiency of organic solar cells has increased steadily in the last decade, currently reaching up to 6%. Understanding and combating the various loss mechanisms that occur in processes from optical excitation to charge collection should lead to efficiencies on the order of 10% in the near future. In organic heterojunction solar cells, the generation of photocurrent is a cascade of four steps: generation of excitons (electrically neutral bound electron-hole pairs) by photon absorption, diffusion of excitons to the heterojunction, dissociation of the excitons into free charge carriers, and transport of these carriers to the contacts. In this Account, we review our recent contributions to the understanding of the mechanisms that govern these steps. Starting from archetype donor-acceptor systems of planar small-molecule heterojunctions and solution-processed bulk heterojunctions, we outline our search for alternative materials and device architectures. We show that non-planar phthalocynanines have appealing absorption characteristics but also have reduced charge carrier transport. As a result, the donor layer needs to be ultrathin, and all layers of the device have to be tuned to account for optical interference effects. Using these optimization techniques, we illustrate cells with 3.1% efficiency for the non-planar chloroboron subphthalocyanine donor. Molecules offering a better compromise between absorption and carrier mobility should allow for further improvements. We also propose a method for increasing the exciton diffusion length by converting singlet excitons into long-lived triplets. By doping a polymer with a

Novel Area Optimization in FPGA Implementation Using Efficient VHDL Code

OpenAIRE

Zulfikar, Z

2012-01-01

A new novel method for area efficiency in FPGA implementation is presented. The method is realized through flexibility and wide capability of VHDL coding. This method exposes the arithmetic operations such as addition, subtraction and others. The design technique aim to reduce occupies area for multi stages circuits by selecting suitable range of all value involved in every step of calculations. Conventional and efficient VHDL coding methods are presented and the synthesis result is compared....

Architectural geometry

KAUST Repository

Pottmann, Helmut

2014-11-26

Around 2005 it became apparent in the geometry processing community that freeform architecture contains many problems of a geometric nature to be solved, and many opportunities for optimization which however require geometric understanding. This area of research, which has been called architectural geometry, meanwhile contains a great wealth of individual contributions which are relevant in various fields. For mathematicians, the relation to discrete differential geometry is significant, in particular the integrable system viewpoint. Besides, new application contexts have become available for quite some old-established concepts. Regarding graphics and geometry processing, architectural geometry yields interesting new questions but also new objects, e.g. replacing meshes by other combinatorial arrangements. Numerical optimization plays a major role but in itself would be powerless without geometric understanding. Summing up, architectural geometry has become a rewarding field of study. We here survey the main directions which have been pursued, we show real projects where geometric considerations have played a role, and we outline open problems which we think are significant for the future development of both theory and practice of architectural geometry.

Architectural geometry

KAUST Repository

Pottmann, Helmut; Eigensatz, Michael; Vaxman, Amir; Wallner, Johannes

2014-01-01

Around 2005 it became apparent in the geometry processing community that freeform architecture contains many problems of a geometric nature to be solved, and many opportunities for optimization which however require geometric understanding. This area of research, which has been called architectural geometry, meanwhile contains a great wealth of individual contributions which are relevant in various fields. For mathematicians, the relation to discrete differential geometry is significant, in particular the integrable system viewpoint. Besides, new application contexts have become available for quite some old-established concepts. Regarding graphics and geometry processing, architectural geometry yields interesting new questions but also new objects, e.g. replacing meshes by other combinatorial arrangements. Numerical optimization plays a major role but in itself would be powerless without geometric understanding. Summing up, architectural geometry has become a rewarding field of study. We here survey the main directions which have been pursued, we show real projects where geometric considerations have played a role, and we outline open problems which we think are significant for the future development of both theory and practice of architectural geometry.

A New FPGA Architecture of FAST and BRIEF Algorithm for On-Board Corner Detection and Matching.

Science.gov (United States)

Huang, Jingjin; Zhou, Guoqing; Zhou, Xiang; Zhang, Rongting

2018-03-28

Although some researchers have proposed the Field Programmable Gate Array (FPGA) architectures of Feature From Accelerated Segment Test (FAST) and Binary Robust Independent Elementary Features (BRIEF) algorithm, there is no consideration of image data storage in these traditional architectures that will result in no image data that can be reused by the follow-up algorithms. This paper proposes a new FPGA architecture that considers the reuse of sub-image data. In the proposed architecture, a remainder-based method is firstly designed for reading the sub-image, a FAST detector and a BRIEF descriptor are combined for corner detection and matching. Six pairs of satellite images with different textures, which are located in the Mentougou district, Beijing, China, are used to evaluate the performance of the proposed architecture. The Modelsim simulation results found that: (i) the proposed architecture is effective for sub-image reading from DDR3 at a minimum cost; (ii) the FPGA implementation is corrected and efficient for corner detection and matching, such as the average value of matching rate of natural areas and artificial areas are approximately 67% and 83%, respectively, which are close to PC's and the processing speed by FPGA is approximately 31 and 2.5 times faster than those by PC processing and by GPU processing, respectively.

An Efficient Radio Access Control Mechanism for Wireless Network-On-Chip Architectures

Directory of Open Access Journals (Sweden)

Maurizio Palesi

2015-03-01

Full Text Available Modern systems-on-chip (SoCs today contain hundreds of cores, and this number is predicted to reach the thousands by the year 2020. As the number of communicating elements increases, there is a need for an efficient, scalable and reliable communication infrastructure. As technology geometries shrink to the deep submicron regime, however, the communication delay and power consumption of global interconnections become the major bottleneck. The network-on-chip (NoC design paradigm, based on a modular packet-switched mechanism, can address many of the on-chip communication issues, such as the performance limitations of long interconnects and integration of large number of cores on a chip. Recently, new communication technologies based on the NoC concept have emerged with the aim of improving the scalability limitations of conventional NoC-based architectures. Among them, wireless NoCs (WiNoCs use the radio medium for reducing the performance and energy penalties of long-range and multi-hop communications. As the radio medium can be accessed by a single transmitter at a time, a radio access control mechanism (RACM is needed. In this paper, we present a novel RACM, which allows one to improve both the performance and energy figures of the WiNoC. Experiments, carried out on both synthetic and real traffic scenarios, have shown the effectiveness of the proposed RACM. On average, a 30% reduction in communication delay and a 25% energy savings have been observed when the proposed RACM is applied to a known WiNoC architecture.

Energy efficient medium access protocol for wireless medical body area sensor networks.

Science.gov (United States)

Omeni, O; Wong, A; Burdett, A J; Toumazou, C

2008-12-01

This paper presents a novel energy-efficient MAC Protocol designed specifically for wireless body area sensor networks (WBASN) focused towards pervasive healthcare applications. Wireless body area networks consist of wireless sensor nodes attached to the human body to monitor vital signs such as body temperature, activity or heart-rate. The network adopts a master-slave architecture, where the body-worn slave node periodically sends sensor readings to a central master node. Unlike traditional peer-to-peer wireless sensor networks, the nodes in this biomedical WBASN are not deployed in an ad hoc fashion. Joining a network is centrally managed and all communications are single-hop. To reduce energy consumption, all the sensor nodes are in standby or sleep mode until the centrally assigned time slot. Once a node has joined a network, there is no possibility of collision within a cluster as all communication is initiated by the central node and is addressed uniquely to a slave node. To avoid collisions with nearby transmitters, a clear channel assessment algorithm based on standard listen-before-transmit (LBT) is used. To handle time slot overlaps, the novel concept of a wakeup fallback time is introduced. Using single-hop communication and centrally controlled sleep/wakeup times leads to significant energy reductions for this application compared to more ldquoflexiblerdquo network MAC protocols such as 802.11 or Zigbee. As duty cycle is reduced, the overall power consumption approaches the standby power. The protocol is implemented in hardware as part of the Sensiumtrade system-on-chip WBASN ASIC, in a 0.13- mum CMOS process.

The Chameleon Architecture for Streaming DSP Applications

Directory of Open Access Journals (Sweden)

André B. J. Kokkeler

2007-02-01

Full Text Available We focus on architectures for streaming DSP applications such as wireless baseband processing and image processing. We aim at a single generic architecture that is capable of dealing with different DSP applications. This architecture has to be energy efficient and fault tolerant. We introduce a heterogeneous tiled architecture and present the details of a domain-specific reconfigurable tile processor called Montium. This reconfigurable processor has a small footprint (1.8 mm2 in a 130 nm process, is power efficient and exploits the locality of reference principle. Reconfiguring the device is very fast, for example, loading the coefficients for a 200 tap FIR filter is done within 80 clock cycles. The tiles on the tiled architecture are connected to a Network-on-Chip (NoC via a network interface (NI. Two NoCs have been developed: a packet-switched and a circuit-switched version. Both provide two types of services: guaranteed throughput (GT and best effort (BE. For both NoCs estimates of power consumption are presented. The NI synchronizes data transfers, configures and starts/stops the tile processor. For dynamically mapping applications onto the tiled architecture, we introduce a run-time mapping tool.

The Chameleon Architecture for Streaming DSP Applications

Directory of Open Access Journals (Sweden)

Heysters PaulM

2007-01-01

Full Text Available We focus on architectures for streaming DSP applications such as wireless baseband processing and image processing. We aim at a single generic architecture that is capable of dealing with different DSP applications. This architecture has to be energy efficient and fault tolerant. We introduce a heterogeneous tiled architecture and present the details of a domain-specific reconfigurable tile processor called Montium. This reconfigurable processor has a small footprint (1.8 mm2 in a 130 nm process, is power efficient and exploits the locality of reference principle. Reconfiguring the device is very fast, for example, loading the coefficients for a 200 tap FIR filter is done within 80 clock cycles. The tiles on the tiled architecture are connected to a Network-on-Chip (NoC via a network interface (NI. Two NoCs have been developed: a packet-switched and a circuit-switched version. Both provide two types of services: guaranteed throughput (GT and best effort (BE. For both NoCs estimates of power consumption are presented. The NI synchronizes data transfers, configures and starts/stops the tile processor. For dynamically mapping applications onto the tiled architecture, we introduce a run-time mapping tool.

Aesthetics of sustainable architecture

NARCIS (Netherlands)

Lee, S.; Hill, G.; Sauerbruch, M.; Hutton, L.; Knowles, R.; Bothwell, K.; Brennan, J.; Jauslin, D.; Holzheu, H.; AlSayyad, N.; Arboleda, G.; Bharne, V.; Røstvik, H.; Kuma, K.; Sunikka-Blank, M.; Glaser, M.; Pero, E.; Sjkonsberg, M.; Teuffel, P.; Mangone, G.; Finocchiaro, L.; Hestnes, A.; Briggs, D.; Frampton, K.; Lee, S.

2011-01-01

The purpose of this book is to reveal, explore and further the debate on the aesthetic potentials of sustainable architecture and its practice. This book opens a new area of scholarship and discourse in the design and production of sustainable architecture, one that is based in aesthetics. The

Experimental high energy physics and modern computer architectures

International Nuclear Information System (INIS)

Hoek, J.

1988-06-01

The paper examines how experimental High Energy Physics can use modern computer architectures efficiently. In this connection parallel and vector architectures are investigated, and the types available at the moment for general use are discussed. A separate section briefly describes some architectures that are either a combination of both, or exemplify other architectures. In an appendix some directions in which computing seems to be developing in the USA are mentioned. (author)

Enterprise architecture for business success

CERN Document Server

Wijegunaratne, Inji; Evans-Greenwood, Peter

2014-01-01

Enterprise Architecture (EA) has evolved to become a prominent presence in today's information systems and technology landscape. The EA discipline is rich in frameworks, methodologies, and the like. However, the question of 'value' for business ;professionals remains largely unanswered - that is, how best can Enterprise Architecture and Enterprise Architects deliver value to the enterprise? Enterprise Architecture for Business Success answers this question. Enterprise Architecture for Business Success is primarily intended for IT professionals working in the area of Enterprise Architectu

Novel Area Optimization in FPGA Implementation Using Efficient VHDL Code

Directory of Open Access Journals (Sweden)

. Zulfikar

2012-10-01

Full Text Available A new novel method for area efficiency in FPGA implementation is presented. The method is realized through flexibility and wide capability of VHDL coding. This method exposes the arithmetic operations such as addition, subtraction and others. The design technique aim to reduce occupies area for multi stages circuits by selecting suitable range of all value involved in every step of calculations. Conventional and efficient VHDL coding methods are presented and the synthesis result is compared. The VHDL code which limits range of integer values is occupies less area than the one which is not. This VHDL coding method is suitable for multi stage circuits.

Novel Area Optimization in FPGA Implementation Using Efficient VHDL Code

Directory of Open Access Journals (Sweden)

Zulfikar .

2015-05-01

Full Text Available A new novel method for area efficiency in FPGA implementation is presented. The method is realized through flexibility and wide capability of VHDL coding. This method exposes the arithmetic operations such as addition, subtraction and others. The design technique aim to reduce occupies area for multi stages circuits by selecting suitable range of all value involved in every step of calculations. Conventional and efficient VHDL coding methods are presented and the synthesis result is compared. The VHDL code which limits range of integer values is occupies less area than the one which is not. This VHDL coding method is suitable for multi stage circuits.

A secure and efficiently searchable health information architecture.

Science.gov (United States)

Yasnoff, William A

2016-06-01

Patient-centric repositories of health records are an important component of health information infrastructure. However, patient information in a single repository is potentially vulnerable to loss of the entire dataset from a single unauthorized intrusion. A new health record storage architecture, the personal grid, eliminates this risk by separately storing and encrypting each person's record. The tradeoff for this improved security is that a personal grid repository must be sequentially searched since each record must be individually accessed and decrypted. To allow reasonable search times for large numbers of records, parallel processing with hundreds (or even thousands) of on-demand virtual servers (now available in cloud computing environments) is used. Estimated search times for a 10 million record personal grid using 500 servers vary from 7 to 33min depending on the complexity of the query. Since extremely rapid searching is not a critical requirement of health information infrastructure, the personal grid may provide a practical and useful alternative architecture that eliminates the large-scale security vulnerabilities of traditional databases by sacrificing unnecessary searching speed. Copyright © 2016 Elsevier Inc. All rights reserved.

Software Defined Radio Architecture Contributions to Next Generation Space Communications

Science.gov (United States)

Kacpura, Thomas J.; Eddy, Wesley M.; Smith, Carl R.; Liebetreu, John

2015-01-01

Space communications architecture concepts, comprising the elements of the system, the interactions among them, and the principles that govern their development, are essential factors in developing National Aeronautics and Space Administration (NASA) future exploration and science missions. Accordingly, vital architectural attributes encompass flexibility, the extensibility to insert future capabilities, and to enable evolution to provide interoperability with other current and future systems. Space communications architectures and technologies for this century must satisfy a growing set of requirements, including those for Earth sensing, collaborative observation missions, robotic scientific missions, human missions for exploration of the Moon and Mars where surface activities require supporting communications, and in-space observatories for observing the earth, as well as other star systems and the universe. An advanced, integrated, communications infrastructure will enable the reliable, multipoint, high-data-rate capabilities needed on demand to provide continuous, maximum coverage for areas of concentrated activity. Importantly, the cost/value proposition of the future architecture must be an integral part of its design; an affordable and sustainable architecture is indispensable within anticipated future budget environments. Effective architecture design informs decision makers with insight into the capabilities needed to efficiently satisfy the demanding space-communication requirements of future missions and formulate appropriate requirements. A driving requirement for the architecture is the extensibility to address new requirements and provide low-cost on-ramps for new capabilities insertion, ensuring graceful growth as new functionality and new technologies are infused into the network infrastructure. In addition to extensibility, another key architectural attribute of the space communication equipment's interoperability with other NASA communications

Preliminary survey on electric energy efficiency in Ethiopia:- Areas of ...

African Journals Online (AJOL)

In this paper the significance of electric energy efficiency improvement and major areas of loss in Ethiopia's electric power system are highlighted for further rigorous study. Major electric energy loss areas in the utility transmission and distribution systems and consumer premises are indicated. In the consumer area the loss ...

Multistack integration of three-dimensional hyperbranched anatase titania architectures for high-efficiency dye-sensitized solar cells.

Science.gov (United States)

Wu, Wu-Qiang; Xu, Yang-Fan; Rao, Hua-Shang; Su, Cheng-Yong; Kuang, Dai-Bin

2014-04-30

An unprecedented attempt was conducted on suitably functionalized integration of three-dimensional hyperbranched titania architectures for efficient multistack photoanode, constructed via layer-by-layer assembly of hyperbranched hierarchical tree-like titania nanowires (underlayer), branched hierarchical rambutan-like titania hollow submicrometer-sized spheres (intermediate layer), and hyperbranched hierarchical urchin-like titania micrometer-sized spheres (top layer). Owing to favorable charge-collection, superior light harvesting efficiency and extended electron lifetime, the multilayered TiO2-based devices showed greater J(sc) and V(oc) than those of a conventional TiO2 nanoparticle (TNP), and an overall power conversion efficiency of 11.01% (J(sc) = 18.53 mA cm(-2); V(oc) = 827 mV and FF = 0.72) was attained, which remarkably outperformed that of a TNP-based reference cell (η = 7.62%) with a similar film thickness. Meanwhile, the facile and operable film-fabricating technique (hydrothermal and drop-casting) provides a promising scheme and great simplicity for high performance/cost ratio photovoltaic device processability in a sustainable way.

Efficient SCT Protocol for Post Disaster Communication

Science.gov (United States)

Ramesh, T. K.; Giriraja, C. V.

2017-08-01

Natural and catastrophic disasters can cause damage to the communication system, the damage may be complete or it may be partial. In such areas communication and exchange of information plays a very important role and become difficult to happen in such situations. So, the rescue systems should be installed in those areas for the rescue operations and to take important decisions about how to make a connection from there to the outside world. Wireless communication network architecture should be setup in disaster areas for the communication to happen and to gather information. Wireless ad-hoc network architecture is proposed in this paper with access nodes. These access nodes acts as hotspot for certain area in which they are set up such that the Wi-Fi capable devices get connected to them for communication to happen. If the mobile battery is drained in such situations wireless charging using microwave is shown in this paper. Performance analysis of the communication transport layer protocols is shown and Efficient SCTP (ESTP) algorithm is developed which shows better results in terms of cumulative packet loss.

Efficient architecture for global elimination algorithm for H.264 ...

Indian Academy of Sciences (India)

architecture achieved 60% less number of computations compared to existing full search ... of local minimum. ... least cost function based on SSAD values are selected for the .... umn sum and adding new column sum, rather than adding.

GNC Architecture Design for ARES Simulation. Revision 3.0. Revision 3.0

Science.gov (United States)

Gay, Robert

2006-01-01

The purpose of this document is to describe the GNC architecture and associated interfaces for all ARES simulations. Establishing a common architecture facilitates development across the ARES simulations and provides an efficient mechanism for creating an end-to-end simulation capability. In general, the GNC architecture is the frame work in which all GNC development takes place, including sensor and effector models. All GNC software applications have a standard location within the architecture making integration easier and, thus more efficient.

A New FPGA Architecture of FAST and BRIEF Algorithm for On-Board Corner Detection and Matching

Directory of Open Access Journals (Sweden)

Jingjin Huang

2018-03-01

Full Text Available Although some researchers have proposed the Field Programmable Gate Array (FPGA architectures of Feature From Accelerated Segment Test (FAST and Binary Robust Independent Elementary Features (BRIEF algorithm, there is no consideration of image data storage in these traditional architectures that will result in no image data that can be reused by the follow-up algorithms. This paper proposes a new FPGA architecture that considers the reuse of sub-image data. In the proposed architecture, a remainder-based method is firstly designed for reading the sub-image, a FAST detector and a BRIEF descriptor are combined for corner detection and matching. Six pairs of satellite images with different textures, which are located in the Mentougou district, Beijing, China, are used to evaluate the performance of the proposed architecture. The Modelsim simulation results found that: (i the proposed architecture is effective for sub-image reading from DDR3 at a minimum cost; (ii the FPGA implementation is corrected and efficient for corner detection and matching, such as the average value of matching rate of natural areas and artificial areas are approximately 67% and 83%, respectively, which are close to PC’s and the processing speed by FPGA is approximately 31 and 2.5 times faster than those by PC processing and by GPU processing, respectively.

Contribution to the enhancement of the energy efficiency in electrical / electronic architectures of automobiles; Beitrag zur Steigerung der Energieeffizienz in Kfz-Elektrik-/Elektronik-Architekturen

Energy Technology Data Exchange (ETDEWEB)

Goerber, Matthias

2013-06-01

Increasing customer demands for enhanced comfort, safety or assistance functions provide automotive manufacturers with high demands in their product development process. At the same time the criterion of environmental friendliness of the automobile gained more and more importance. These requirements mean that the electrical / electronic architecture of a vehicle is becoming important increasingly. Under this aspect, the author of the contribution under consideration reports on the criterion of energy efficiency of electrical / electronic architecture and its influence on fuel consumption and range of vehicles.

3D NANOTUBE FIELD EFFECT TRANSISTORS FOR HYBRID HIGH-PERFORMANCE AND LOW-POWER OPERATION WITH HIGH CHIP-AREA EFFICIENCY

KAUST Repository

Fahad, Hossain M.

2014-03-01

scaling on silicon, the amount of current generated per device has to be increased while keeping short channel effects and off-state leakage at bay. The objective of this doctoral thesis is the investigation of an innovative vertical silicon based architecture called the silicon nanotube field effect transistor (Si NTFET). This topology incorporates a dual inner/outer core/shell gate stack strategy to control the volume inversion properties in a hollow silicon 1D quasi-nanotube under a tight electrostatic configuration. Together with vertically aligned source and drain, the Si NTFET is capable of very high on-state performance (drive current) in an area-efficient configuration as opposed to arrays of gate-all-around nanowires, while maintaining leakage characteristics similar to a single nanowire. Such a device architecture offsets the need of device arraying that is needed with fin and nanowire architectures. Extensive simulations are used to validate the potential benefits of Si NTFETs over GAA NWFETs on a variety of platforms such as conventional MOSFETs, tunnel FETs, junction-less FETs. This thesis demonstrates a novel CMOS compatible process flow to fabricate vertical nanotube transistors that offer a variety of advantages such as lithography-independent gate length definition, integration of epitaxially grown silicon nanotubes with spacer based gate dielectrics and abrupt in-situ doped source/drain junctions. Experimental measurement data will showcase the various materials and processing challenges in fabricating these devices. Finally, an extension of this work to topologically transformed wavy channel FinFETs is also demonstrated keeping in line with the theme of area efficient high-performance electronics.

Introduction to parallel algorithms and architectures arrays, trees, hypercubes

CERN Document Server

Leighton, F Thomson

1991-01-01

Introduction to Parallel Algorithms and Architectures: Arrays Trees Hypercubes provides an introduction to the expanding field of parallel algorithms and architectures. This book focuses on parallel computation involving the most popular network architectures, namely, arrays, trees, hypercubes, and some closely related networks.Organized into three chapters, this book begins with an overview of the simplest architectures of arrays and trees. This text then presents the structures and relationships between the dominant network architectures, as well as the most efficient parallel algorithms for

Software Architectures – Present and Visions

Directory of Open Access Journals (Sweden)

Catalin STRIMBEI

2015-01-01

Full Text Available Nowadays, architectural software systems are increasingly important because they can determine the success of the entire system. In this article we intend to rigorously analyze the most common types of systems architectures and present a personal opinion about the specifics of the university architecture. After analyzing monolithic architectures, SOA architecture and those of the micro- based services, we present specific issues and specific criteria for the university software systems. Each type of architecture is rundown and analyzed according to specific academic challenges. During the analysis, we took into account the factors that determine the success of each architecture and also the common causes of failure. At the end of the article, we objectively decide which architecture is best suited to be implemented in the university area.

Social topos of church architecture

Directory of Open Access Journals (Sweden)

Zarochintseva Irina

2017-01-01

Full Text Available The article proves the idea that descendants are reminded about the history and culture of their country through the architectural forms of Church architecture. Church architecture expresses the power and greatness of folk feats, patriotism and love of freedom. Each church has its own history, includes the architectural style of its epoch, and occupies a certain position among the other religious buildings. Churches have city-forming significance and represent the sacred center of the city; as well they possess a sign, marking function in the area, which can be “read” as a common landmark in the social topes

An area and power-efficient analog li-ion battery charger circuit.

Science.gov (United States)

Do Valle, Bruno; Wentz, Christian T; Sarpeshkar, Rahul

2011-04-01

The demand for greater battery life in low-power consumer electronics and implantable medical devices presents a need for improved energy efficiency in the management of small rechargeable cells. This paper describes an ultra-compact analog lithium-ion (Li-ion) battery charger with high energy efficiency. The charger presented here utilizes the tanh basis function of a subthreshold operational transconductance amplifier to smoothly transition between constant-current and constant-voltage charging regimes without the need for additional area- and power-consuming control circuitry. Current-domain circuitry for end-of-charge detection negates the need for precision-sense resistors in either the charging path or control loop. We show theoretically and experimentally that the low-frequency pole-zero nature of most battery impedances leads to inherent stability of the analog control loop. The circuit was fabricated in an AMI 0.5-μm complementary metal-oxide semiconductor process, and achieves 89.7% average power efficiency and an end voltage accuracy of 99.9% relative to the desired target 4.2 V, while consuming 0.16 mm(2) of chip area. To date and to the best of our knowledge, this design represents the most area-efficient and most energy-efficient battery charger circuit reported in the literature.

Energy efficiency for the multiport power converters architectures of series and parallel hybrid power source type used in plug-in/V2G fuel cell vehicles

International Nuclear Information System (INIS)

Bizon, Nicu

2013-01-01

Highlights: ► It is analyzed the series and parallel Hybrid Power Source (HPS) topology for plug-in Fuel Cell Vehicle (PFCV). ► An energy efficiency analysis of the Multiport Power Converter (MPC) of both HPSs is performed. ► The MPC energy efficiency features were shown by analytical computing in all PFCV regimes. -- Abstract: In this paper it is presented a mathematical analysis of the energy efficiency for the Multiport Power Converter (MPC) used in series and parallel Hybrid Power Source (HPS) architectures type on the plug-in Fuel Cell Vehicles (PFCVs). The aim of the analysis is to provide general conclusions for a wide range of PFCV operating regimes that are chosen for efficient use of the MPC architecture on each particular drive cycle. In relation with FC system of PFCV, the Energy Storage System (ESS) can operate in following regimes: (1) Charge-Sustaining (CS), (2) Charge-Depleting (CD), and (3) Charge-Increasing (CI). Considering the imposed window for the ESS State-Of-Charge (SOC), the MPC can be connected to renewable plug-in Charging Stations (PCSs) to exchange power with Electric Power (EP) system, when it is necessary for both. The Energy Management Unit (EMU) that communicates with the EP system will establish the moments to match the PFCV power demand with supply availability of the EP grid, stabilizing it. The MPC energy efficiency of the PFCVs is studied when the ESS is charged (discharged) from (to) the home/PCS/EP system. The comparative results were shown for both PFCV architectures through the analytical calculation performed and the appropriate Matlab/Simulink® simulations presented.

Architectural Geometry and Fabrication-Aware Design

KAUST Repository

Pottmann, Helmut

2013-04-27

Freeform shapes and structures with a high geometric complexity play an increasingly important role in contemporary architecture. While digital models are easily created, the actual fabrication and construction remains a challenge. This is the source of numerous research problems many of which fall into the area of Geometric Computing and form part of a recently emerging research area, called "Architectural Geometry". The present paper provides a short survey of research in Architectural Geometry and shows how this field moves towards a new direction in Geometric Modeling which aims at combining shape design with important aspects of function and fabrication. © 2013 Kim Williams Books, Turin.

Drawing images or Architectural drawing

Directory of Open Access Journals (Sweden)

Amparo Bernal López-Sanvicente

2013-10-01

Full Text Available In this article we will discuss how the aesthetic values, that the digital imaging provide, has influenced in drawing and architecture in a historical reading of the evolution of each means of architecture expression. In painting art and photography have been happening genres and styles that have adopted criteria of one or another discipline. When photography became independent from painting as an artistic discipline, its relationship to the architecture affected both the acceptance of its stylistic canon and the broadcast area. With technological development and the emergence of the new concept of digital imaging, it has become an indispensable tool in the whole process of contemporary architecture, which should not contaminate the true sense of the architectural drawing.

Essential Layers, Artifacts, and Dependencies of Enterprise Architecture

OpenAIRE

Winter, Robert; Fischer, Ronny

2007-01-01

After a period where implementation speed was more important than integration, consistency and reduction of complexity, architectural considerations have become a key issue of information management in recent years again. Enterprise architecture is widely accepted as an essential mechanism for ensuring agility and consistency, compliance and efficiency. Although standards like TOGAF and FEAF have developed, however, there is no common agreement on which architecture layers, which artifact typ...

Quantum efficiency measurement system for large area CsI photodetectors

CERN Document Server

Cusanno, F; Colilli, S; Crateri, R; Fratoni, R; Frullani, S; Garibaldi, F; Giuliani, F; Gricia, M; Lucentini, M; Mostarda, A; Santavenere, F; Veneroni, P; Breuer, H; Iodice, M; Urciuoli, G M; De Cataldo, G; De Leo, R; Lagamba, L; Braem, André

2003-01-01

A proximity focusing freon/CsI RICH detector has been built for kaon physics at Thomas Jefferson National Accelerator Facility (TJNAF or Jefferson Lab), Hall A. The Cherenkov photons are detected by a UV photosensitive CsI film which has been obtained by vacuum evaporation. A dedicated evaporation facility for large area photocathodes has been built for this task. A measuring system has been built to allow the evaluation of the absolute quantum efficiency (QE) just after the evaporation. The evaporation facility is described here, as well as the quantum efficiency measurement device. Results of the QE on-line measurements, for the first time on large area photocathodes, are reported.

Real-time FPGA architectures for computer vision

Science.gov (United States)

Arias-Estrada, Miguel; Torres-Huitzil, Cesar

2000-03-01

This paper presents an architecture for real-time generic convolution of a mask and an image. The architecture is intended for fast low level image processing. The FPGA-based architecture takes advantage of the availability of registers in FPGAs to implement an efficient and compact module to process the convolutions. The architecture is designed to minimize the number of accesses to the image memory and is based on parallel modules with internal pipeline operation in order to improve its performance. The architecture is prototyped in a FPGA, but it can be implemented on a dedicated VLSI to reach higher clock frequencies. Complexity issues, FPGA resources utilization, FPGA limitations, and real time performance are discussed. Some results are presented and discussed.

ECOSUSTAINABLE HIGH-RISE : The Environmentally Conscious Architecture of Skyscraper

Directory of Open Access Journals (Sweden)

Jimmy Priatman

2000-01-01

Full Text Available The term " green architecture " is related to evolving architecture which is sensitive to the environment and emerges from the environmental awareness due to the effects of destruction of air, water, energy and earth. It is characterized by improving energy efficiency, sustainability concept and holistic approach of the entire building enterprise, where all of the environmental factors are regarded as an objective. Although there are many of environmentally conscious architectural works today, but most of the building designers prefer to deal primarily with small-scale buildings (low to medium rise and often only in greenfield, rural or suburban sites. All those large scale, high-rise or tall buildings located in dense urban areas are regarded as avoidable objects that consumes a lot of energy, uses huge amounts of materials, and produces massive volumes of waste discharge into the environment. These intensive buildings deserve greater attention and should be designed by greater part of our expertise and effort to ecologically design than the smaller buildings with fewer problems. The paper discusses "green" dimensions applied to tall buildings/high-rise buildings with their innovative approach that leads to ecosustainable tall buildings.

Architectures of electro-optical packet switched networks

DEFF Research Database (Denmark)

Berger, Michael Stubert

2004-01-01

and examines possible architectures for future high capacity networks with high capacity nodes. It is assumed that optics will play a key role in this scenario, and in this respect, the European IST research project DAVID aimed at proposing viable architectures for optical packet switching, exploiting the best...... from optics and electronics. An overview of the DAVID network architecture is given, focusing on the MAN and WAN architecture as well as the MPLS based network hierarchy. A statistical model of the optical slot generation process is presented and utilised to evaluate delay vs. efficiency. Furthermore...... architecture for a buffered crossbar switch is presented. The architecture uses two levels of backpressure (flow control) with different constraints on round trip time. No additional scheduling complexity is introduced, and for the actual example shown, a reduction in memory of 75% was obtained at the cost...

Many-core technologies: The move to energy-efficient, high-throughput x86 computing (TFLOPS on a chip)

CERN Multimedia

CERN. Geneva

2012-01-01

With Moore's Law alive and well, more and more parallelism is introduced into all computing platforms at all levels of integration and programming to achieve higher performance and energy efficiency. Especially in the area of High-Performance Computing (HPC) users can entertain a combination of different hardware and software parallel architectures and programming environments. Those technologies range from vectorization and SIMD computation over shared memory multi-threading (e.g. OpenMP) to distributed memory message passing (e.g. MPI) on cluster systems. We will discuss HPC industry trends and Intel's approach to it from processor/system architectures and research activities to hardware and software tools technologies. This includes the recently announced new Intel(r) Many Integrated Core (MIC) architecture for highly-parallel workloads and general purpose, energy efficient TFLOPS performance, some of its architectural features and its programming environment. At the end we will have a br...

Power-Efficient Design Challenges

Science.gov (United States)

Pangrle, Barry

Design teams find themselves facing decreasing power budgets while simultaneously the products that they design continue to require the integration of increasingly complex levels of functionality. The market place (driven by consumer preferences) and new regulations and guidelines on energy efficiency and environmental impact are the key drivers. This in turn has generated new approaches in all IC and electronic system design domains from the architecture to the physical layout of ICs, to design-for-test, as well as for design verification to insure that the design implementation actually meets the intended requirements and specifications. This chapter covers key aspects of these forces from a technological and market perspective that are driving designers to produce more energy-efficient products. Observations by significant industry leaders from AMD, ARM, IBM, Intel, nVidia and TSMC are cited, and the emerging techniques and technologies used to address these issues now and into the future are explored. Topic areas include: System level: Architectural analysis and transaction-level modeling. How architectural decisions can dramatically reduce the design power and the importance of modeling hardware and software together. IC (Chip) level: The impact of creating on-chip power domains for selectively turning power off and/or multi-voltage operation on: (1) chip verification, (2) multi-corner multi-mode analysis during placement and routing of logic cells and (3) changes to design-for-test, all in order to accommodate for power-gating and multi-voltage control logic, retention registers, isolation cells and level shifters needed to implement these power saving techniques. Process level: The disappearing impact of body-bias techniques on leakage control and why new approaches like High-K Metal Gate (HKMG) technology help but don't eliminate power issues. Power-efficient design is impacting the way chip designers work today, and this chapter focuses on where the most

EMI Security Architecture

CERN Document Server

White, J.; Schuller, B.; Qiang, W.; Groep, D.; Koeroo, O.; Salle, M.; Sustr, Z.; Kouril, D.; Millar, P.; Benedyczak, K.; Ceccanti, A.; Leinen, S.; Tschopp, V.; Fuhrmann, P.; Heyman, E.; Konstantinov, A.

2013-01-01

This document describes the various architectures of the three middlewares that comprise the EMI software stack. It also outlines the common efforts in the security area that allow interoperability between these middlewares. The assessment of the EMI Security presented in this document was performed internally by members of the Security Area of the EMI project.

Designing Domain-Specific Heterogeneous Architectures from Dataflow Programs

Directory of Open Access Journals (Sweden)

Süleyman Savas

2018-04-01

Full Text Available The last ten years have seen performance and power requirements pushing computer architectures using only a single core towards so-called manycore systems with hundreds of cores on a single chip. To further increase performance and energy efficiency, we are now seeing the development of heterogeneous architectures with specialized and accelerated cores. However, designing these heterogeneous systems is a challenging task due to their inherent complexity. We proposed an approach for designing domain-specific heterogeneous architectures based on instruction augmentation through the integration of hardware accelerators into simple cores. These hardware accelerators were determined based on their common use among applications within a certain domain.The objective was to generate heterogeneous architectures by integrating many of these accelerated cores and connecting them with a network-on-chip. The proposed approach aimed to ease the design of heterogeneous manycore architectures—and, consequently, exploration of the design space—by automating the design steps. To evaluate our approach, we enhanced our software tool chain with a tool that can generate accelerated cores from dataflow programs. This new tool chain was evaluated with the aid of two use cases: radar signal processing and mobile baseband processing. We could achieve an approximately 4 × improvement in performance, while executing complete applications on the augmented cores with a small impact (2.5–13% on area usage. The generated accelerators are competitive, achieving more than 90% of the performance of hand-written implementations.

Low-Level Space Optimization of an AES Implementation for a Bit-Serial Fully Pipelined Architecture

Science.gov (United States)

Weber, Raphael; Rettberg, Achim

A previously developed AES (Advanced Encryption Standard) implementation is optimized and described in this paper. The special architecture for which this implementation is targeted comprises synchronous and systematic bit-serial processing without a central controlling instance. In order to shrink the design in terms of logic utilization we deeply analyzed the architecture and the AES implementation to identify the most costly logic elements. We propose to merge certain parts of the logic to achieve better area efficiency. The approach was integrated into an existing synthesis tool which we used to produce synthesizable VHDL code. For testing purposes, we simulated the generated VHDL code and ran tests on an FPGA board.

An updated generic architecture describingcompliance in Agri-Food Supply Chains

OpenAIRE

Kruize, J.W.; Robbemond, R.M.; Verwaart, T.

2016-01-01

In this report a generic architecture is presented comprising an inventory of the most important actors, roles, processes and information that are relevant in the processes of standardisation, certification and compliance in Agri-Food Supply Chains. This architecture becomes part of an architectural framework. The architectural framework aims to reduce the paper -based administration by improving digitalisation of compliance processes and to enable a more efficient and effective data exchange...

Architecture and Phenomenology: Introduction

Directory of Open Access Journals (Sweden)

Brendan O’ Byrne

2014-07-01

Full Text Available The implications of philosophical aesthetics in the consideration of architecture have been relatively slight. Part of the reason is the neglect of architecture in the work of Baumgarten, Burke and Kant. Within the discourse of architecture the questions raised for philosophical consideration arising out of practice restricted the area of reflection and investigation. The dominant positions were to become either a version of neo-Kantianism, or a direct re-working of Hegel’s Lectures on Aesthetics. The significance of Kant’s distinction between ‘free’ and ‘dependent beauty’ is analysed, and in consequence the need to philosophically question again the relation of architecture to buiding, to dwelling and space. For this the question of accessibility as raised in the phenomenological enquiry, in the work of Brentano, Sartre, Bachelard, Merleau-Ponty, and especially Heidegger points to a different route for the appraisal of philosophical and architectural relations which are exhibited in the contributions of the 10 authors to this issue of Footprint.

Architecture and Phenomenology: Introduction

Directory of Open Access Journals (Sweden)

Brendan O’ Byrne

2008-10-01

Full Text Available The implications of philosophical aesthetics in the consideration of architecture have been relatively slight. Part of the reason is the neglect of architecture in the work of Baumgarten, Burke and Kant. Within the discourse of architecture the questions raised for philosophical consideration arising out of practice restricted the area of reflection and investigation. The dominant positions were to become either a version of neo-Kantianism, or a direct re-working of Hegel’s Lectures on Aesthetics. The significance of Kant’s distinction between ‘free’ and ‘dependent beauty’ is analysed, and in consequence the need to philosophically question again the relation of architecture to building, to dwelling and space. For this the question of accessibility as raised in the phenomenological enquiry, in the work of Brentano, Sartre, Bachelard, Merleau-Ponty, and especially Heidegger points to a different route for the appraisal of philosophical and architectural relations which are exhibited in the contributions of the 10 authors to this issue of Footprint.

HTMT-class Latency Tolerant Parallel Architecture for Petaflops Scale Computation

Science.gov (United States)

Sterling, Thomas; Bergman, Larry

2000-01-01

Computational Aero Sciences and other numeric intensive computation disciplines demand computing throughputs substantially greater than the Teraflops scale systems only now becoming available. The related fields of fluids, structures, thermal, combustion, and dynamic controls are among the interdisciplinary areas that in combination with sufficient resolution and advanced adaptive techniques may force performance requirements towards Petaflops. This will be especially true for compute intensive models such as Navier-Stokes are or when such system models are only part of a larger design optimization computation involving many design points. Yet recent experience with conventional MPP configurations comprising commodity processing and memory components has shown that larger scale frequently results in higher programming difficulty and lower system efficiency. While important advances in system software and algorithms techniques have had some impact on efficiency and programmability for certain classes of problems, in general it is unlikely that software alone will resolve the challenges to higher scalability. As in the past, future generations of high-end computers may require a combination of hardware architecture and system software advances to enable efficient operation at a Petaflops level. The NASA led HTMT project has engaged the talents of a broad interdisciplinary team to develop a new strategy in high-end system architecture to deliver petaflops scale computing in the 2004/5 timeframe. The Hybrid-Technology, MultiThreaded parallel computer architecture incorporates several advanced technologies in combination with an innovative dynamic adaptive scheduling mechanism to provide unprecedented performance and efficiency within practical constraints of cost, complexity, and power consumption. The emerging superconductor Rapid Single Flux Quantum electronics can operate at 100 GHz (the record is 770 GHz) and one percent of the power required by convention

Reliable and Efficient Parallel Processing Algorithms and Architectures for Modern Signal Processing. Ph.D. Thesis

Science.gov (United States)

Liu, Kuojuey Ray

1990-01-01

Least-squares (LS) estimations and spectral decomposition algorithms constitute the heart of modern signal processing and communication problems. Implementations of recursive LS and spectral decomposition algorithms onto parallel processing architectures such as systolic arrays with efficient fault-tolerant schemes are the major concerns of this dissertation. There are four major results in this dissertation. First, we propose the systolic block Householder transformation with application to the recursive least-squares minimization. It is successfully implemented on a systolic array with a two-level pipelined implementation at the vector level as well as at the word level. Second, a real-time algorithm-based concurrent error detection scheme based on the residual method is proposed for the QRD RLS systolic array. The fault diagnosis, order degraded reconfiguration, and performance analysis are also considered. Third, the dynamic range, stability, error detection capability under finite-precision implementation, order degraded performance, and residual estimation under faulty situations for the QRD RLS systolic array are studied in details. Finally, we propose the use of multi-phase systolic algorithms for spectral decomposition based on the QR algorithm. Two systolic architectures, one based on triangular array and another based on rectangular array, are presented for the multiphase operations with fault-tolerant considerations. Eigenvectors and singular vectors can be easily obtained by using the multi-pase operations. Performance issues are also considered.

Achieving Extreme Utilization of Excitons by an Efficient Sandwich-Type Emissive Layer Architecture for Reduced Efficiency Roll-Off and Improved Operational Stability in Organic Light-Emitting Diodes.

Science.gov (United States)

Wu, Zhongbin; Sun, Ning; Zhu, Liping; Sun, Hengda; Wang, Jiaxiu; Yang, Dezhi; Qiao, Xianfeng; Chen, Jiangshan; Alshehri, Saad M; Ahamad, Tansir; Ma, Dongge

2016-02-10

It has been demonstrated that the efficiency roll-off is generally caused by the accumulation of excitons or charge carriers, which is intimately related to the emissive layer (EML) architecture in organic light-emitting diodes (OLEDs). In this article, an efficient sandwich-type EML structure with a mixed-host EML sandwiched between two single-host EMLs was designed to eliminate this accumulation, thus simultaneously achieving high efficiency, low efficiency roll-off and good operational stability in the resulting OLEDs. The devices show excellent electroluminescence performances, realizing a maximum external quantum efficiency (EQE) of 24.6% with a maximum power efficiency of 105.6 lm W(-1) and a maximum current efficiency of 93.5 cd A(-1). At the high brightness of 5,000 cd m(-2), they still remain as high as 23.3%, 71.1 lm W(-1), and 88.3 cd A(-1), respectively. And, the device lifetime is up to 2000 h at initial luminance of 1000 cd m(-2), which is significantly higher than that of compared devices with conventional EML structures. The improvement mechanism is systematically studied by the dependence of the exciton distribution in EML and the exciton quenching processes. It can be seen that the utilization of the efficient sandwich-type EML broadens the recombination zone width, thus greatly reducing the exciton quenching and increasing the probability of the exciton recombination. It is believed that the design concept provides a new avenue for us to achieve high-performance OLEDs.

2005 dossier: granite. Tome: architecture and management of the geologic disposal; Dossier 2005: granite. Tome architecture et gestion du stockage geologique

Energy Technology Data Exchange (ETDEWEB)

NONE

2005-07-01

This document makes a status of the researches carried out by the French national agency of radioactive wastes (ANDRA) about the geologic disposal of high-level and long-lived radioactive wastes in granite formations. Content: 1 - Approach of the study: main steps since the December 30, 1991 law, ANDRA's research program on disposal in granitic formations; 2 - high-level and long-lived (HLLL) wastes: production scenarios, waste categories, inventory model; 3 - disposal facility design in granitic environment: definition of the geologic disposal functions, the granitic material, general facility design options; 4 - general architecture of a disposal facility in granitic environment: surface facilities, underground facilities, disposal process, operational safety; 5 - B-type wastes disposal area: primary containers of B-type wastes, safety options, concrete containers, disposal alveoles, architecture of the B-type wastes disposal area, disposal process and feasibility aspects, functions of disposal components with time; 6 - C-type wastes disposal area: C-type wastes primary containers, safety options, super-containers, disposal alveoles, architecture of the C-type wastes disposal area, disposal process in a reversibility logics, functions of disposal components with time; 7 - spent fuels disposal area: spent fuel assemblies, safety options, spent fuel containers, disposal alveoles, architecture of the spent fuel disposal area, disposal process in a reversibility logics, functions of disposal components with time; 8 - conclusions: suitability of the architecture with various types of French granites, strong design, reversibility taken into consideration. (J.S.)

Point DCT VLSI Architecture for Emerging HEVC Standard

OpenAIRE

Ahmed, Ashfaq; Shahid, Muhammad Usman; Rehman, Ata ur

2012-01-01

This work presents a flexible VLSI architecture to compute the -point DCT. Since HEVC supports different block sizes for the computation of the DCT, that is, 4 × 4 up to 3 2 × 3 2 , the design of a flexible architecture to support them helps reducing the area overhead of hardware implementations. The hardware proposed in this work is partially folded to save area and to get speed for large video sequences sizes. The proposed architecture relies on the decomposition of the DCT matrices into ...

Mathematical modelling of Bit-Level Architecture using Reciprocal Quantum Logic

Science.gov (United States)

Narendran, S.; Selvakumar, J.

2018-04-01

Efficiency of high-performance computing is on high demand with both speed and energy efficiency. Reciprocal Quantum Logic (RQL) is one of the technology which will produce high speed and zero static power dissipation. RQL uses AC power supply as input rather than DC input. RQL has three set of basic gates. Series of reciprocal transmission lines are placed in between each gate to avoid loss of power and to achieve high speed. Analytical model of Bit-Level Architecture are done through RQL. Major drawback of reciprocal Quantum Logic is area, because of lack in proper power supply. To achieve proper power supply we need to use splitters which will occupy large area. Distributed arithmetic uses vector- vector multiplication one is constant and other is signed variable and each word performs as a binary number, they rearranged and mixed to form distributed system. Distributed arithmetic is widely used in convolution and high performance computational devices.

Business architecture management architecting the business for consistency and alignment

CERN Document Server

Simon, Daniel

2015-01-01

This book presents a comprehensive overview of enterprise architecture management with a specific focus on the business aspects. While recent approaches to enterprise architecture management have dealt mainly with aspects of information technology, this book covers all areas of business architecture from business motivation and models to business execution. The book provides examples of how architectural thinking can be applied in these areas, thus combining different perspectives into a consistent whole. In-depth experiences from end-user organizations help readers to understand the abstract concepts of business architecture management and to form blueprints for their own professional approach. Business architecture professionals, researchers, and others working in the field of strategic business management will benefit from this comprehensive volume and its hands-on examples of successful business architecture management practices.​.

The proposed architecture of the Internet of Things based recommender systems for intelligent building in Tehran

Directory of Open Access Journals (Sweden)

Maryam Haji Shah Karam

2016-12-01

Full Text Available Today, the need in many cities are complex and therefore require smart cities. The complexity on the one hand, mainly because a lot of communication between various systems such as transport, communication networks, business systems, and on the other hand, citizens who are in contact with all of these systems, is . The synchronization process fast cities with innovative technology, quickly and efficiently, in turn, has a significant impact on the complexity. In this regard, one of the most important requirements for smart city planning, efficient use of information technology and communication. So to implement a Smart City, the need for clear and precise definition of it. Smart city concepts to better understand the implementation and evaluation of such domains involved better "infrastructure environment" and "environmental services" is. Much research has been done in relation to smart cities, but none on recommender systems and crowdsourcing, are not specific to the architecture. This research, conducted in Tehran smart. Then, after analyzing the different architectures based on the results of the research literature, architecture is proposed. In this architecture, the five-layer infrastructure, data collection, management and processing of data, services and applications are anticipated. The components of each layer are explained in detail. Finally, the study concluded that innovation in traditional architecture by taking advantage of the idea of ​​"crowdsourcing" and "recommender systems" can be improved in intelligent transportation systems, intelligent energy management systems smart Home smart city was in the area.

Evaluating sustainable architectural solutions such as multi-angled facades in specific urban contexts

DEFF Research Database (Denmark)

Hannoudi, Loay Akram; Lauring, Gert Michael; Christensen, Jørgen Erik

A multi-angled facade system may be defined as the use of two or more different orientations of glazing in each façade. With the appropriate window properties and solar shading control systems such facades may improve the energy efficiency and the indoor climates of buildings. The system potentia...... urban contexts to further the implementation of sustainable solutions in ways that may architecturally improve the local environment....... systems in specific urban contexts and analyses its architectural relations to other surrounding buildings and how this is perceived. A qualitative research/ phenomenological method is applied to provide a deeper understanding of implementing this facade system on an existing building, and to investigate...... specific urban contexts, all in Copenhagen: A dense and traditional part of the city; A dense and modern part; And a less dense area with modern, detached buildings. The aim of the paper is to structure and qualify discussions about and architectural evaluations of the use of multi-angled façades in given...

A Multi-Agent Control Architecture for a Robotic Wheelchair

Directory of Open Access Journals (Sweden)

C. Galindo

2006-01-01

Full Text Available Assistant robots like robotic wheelchairs can perform an effective and valuable work in our daily lives. However, they eventually may need external help from humans in the robot environment (particularly, the driver in the case of a wheelchair to accomplish safely and efficiently some tricky tasks for the current technology, i.e. opening a locked door, traversing a crowded area, etc. This article proposes a control architecture for assistant robots designed under a multi-agent perspective that facilitates the participation of humans into the robotic system and improves the overall performance of the robot as well as its dependability. Within our design, agents have their own intentions and beliefs, have different abilities (that include algorithmic behaviours and human skills and also learn autonomously the most convenient method to carry out their actions through reinforcement learning. The proposed architecture is illustrated with a real assistant robot: a robotic wheelchair that provides mobility to impaired or elderly people.

Fast semivariogram computation using FPGA architectures

Science.gov (United States)

Lagadapati, Yamuna; Shirvaikar, Mukul; Dong, Xuanliang

2015-02-01

The semivariogram is a statistical measure of the spatial distribution of data and is based on Markov Random Fields (MRFs). Semivariogram analysis is a computationally intensive algorithm that has typically seen applications in the geosciences and remote sensing areas. Recently, applications in the area of medical imaging have been investigated, resulting in the need for efficient real time implementation of the algorithm. The semivariogram is a plot of semivariances for different lag distances between pixels. A semi-variance, γ(h), is defined as the half of the expected squared differences of pixel values between any two data locations with a lag distance of h. Due to the need to examine each pair of pixels in the image or sub-image being processed, the base algorithm complexity for an image window with n pixels is O(n2). Field Programmable Gate Arrays (FPGAs) are an attractive solution for such demanding applications due to their parallel processing capability. FPGAs also tend to operate at relatively modest clock rates measured in a few hundreds of megahertz, but they can perform tens of thousands of calculations per clock cycle while operating in the low range of power. This paper presents a technique for the fast computation of the semivariogram using two custom FPGA architectures. The design consists of several modules dedicated to the constituent computational tasks. A modular architecture approach is chosen to allow for replication of processing units. This allows for high throughput due to concurrent processing of pixel pairs. The current implementation is focused on isotropic semivariogram computations only. Anisotropic semivariogram implementation is anticipated to be an extension of the current architecture, ostensibly based on refinements to the current modules. The algorithm is benchmarked using VHDL on a Xilinx XUPV5-LX110T development Kit, which utilizes the Virtex5 FPGA. Medical image data from MRI scans are utilized for the experiments

Computer architecture a quantitative approach

CERN Document Server

Hennessy, John L

2019-01-01

Computer Architecture: A Quantitative Approach, Sixth Edition has been considered essential reading by instructors, students and practitioners of computer design for over 20 years. The sixth edition of this classic textbook is fully revised with the latest developments in processor and system architecture. It now features examples from the RISC-V (RISC Five) instruction set architecture, a modern RISC instruction set developed and designed to be a free and openly adoptable standard. It also includes a new chapter on domain-specific architectures and an updated chapter on warehouse-scale computing that features the first public information on Google's newest WSC. True to its original mission of demystifying computer architecture, this edition continues the longstanding tradition of focusing on areas where the most exciting computing innovation is happening, while always keeping an emphasis on good engineering design.

Polymer architecture and drug delivery.

Science.gov (United States)

Qiu, Li Yan; Bae, You Han

2006-01-01

Polymers occupy a major portion of materials used for controlled release formulations and drug-targeting systems because this class of materials presents seemingly endless diversity in topology and chemistry. This is a crucial advantage over other classes of materials to meet the ever-increasing requirements of new designs of drug delivery formulations. The polymer architecture (topology) describes the shape of a single polymer molecule. Every natural, seminatural, and synthetic polymer falls into one of categorized architectures: linear, graft, branched, cross-linked, block, star-shaped, and dendron/dendrimer topology. Although this topic spans a truly broad area in polymer science, this review introduces polymer architectures along with brief synthetic approaches for pharmaceutical scientists who are not familiar with polymer science, summarizes the characteristic properties of each architecture useful for drug delivery applications, and covers recent advances in drug delivery relevant to polymer architecture.

Staged Event-Driven Architecture As A Micro-Architecture Of Distributed And Pluginable Crawling Platform

Directory of Open Access Journals (Sweden)

Leszek Siwik

2013-01-01

Full Text Available There are many crawling systems available on the market but they are rather close systems dedicated for performing particular kind and class of tasks with predefined set of scope, strategy etc. In real life however there are meaningful groups of users (e.g. marketing, criminal or governmental analysts requiring not just a yet another crawling system dedicated for performing predefined tasks. They need rather easy-to-use, user friendly all-in-one studio for not only executing and running internet robots and crawlers, but also for (graphical (redefining and (recomposing crawlers according to dynamically changing requirements and use-cases. To realize the above-mentioned idea, Cassiopeia framework has been designed and developed. One has to remember, however, that enormous size and unimaginable structural complexity of WWW network are the reasons that, from a technical and architectural point of view, developing effective internet robots – and the more so developing a framework supporting graphical robots’ composition – becomes a really challenging task. The crucial aspect in the context of crawling efficiency and scalability is concurrency model applied. There are two the most typical concurrency management models i.e. classical concurrency based on the pool of threads and processes and event-driven concurrency. None of them are ideal approaches. That is why, research on alternative models is still conducted to propose efficient and convenient architecture for concurrent and distributed applications. One of promising models is staged event-driven architecture mixing to some extent both of above mentioned classical approaches and providing some additional benefits such as splitting application into separate stages connected by events queues – what is interesting taking requirements about crawler (recomposition into account. The goal of this paper is to present the idea and the PoC  implementation of Cassiopeia framework, with the special

OpenCL code generation for low energy wide SIMD architectures with explicit datapath.

NARCIS (Netherlands)

She, D.; He, Y.; Waeijen, L.J.W.; Corporaal, H.; Jeschke, H.; Silvén, O.

2013-01-01

Energy efficiency is one of the most important aspects in designing embedded processors. The use of a wide SIMD processor architecture is a promising approach to build energy-efficient high performance embedded processors. In this paper, we propose a configurable wide SIMD architecture that utilizes

Underwater Sensor Networks: A New Energy Efficient and Robust Architecture

NARCIS (Netherlands)

Climent, Salvador; Capella, Juan Vincente; Meratnia, Nirvana; Serrano, Juan José

2012-01-01

The specific characteristics of underwater environments introduce new challenges for networking protocols. In this paper, a specialized architecture for underwater sensor networks (UWSNs) is proposed and evaluated. Experiments are conducted in order to analyze the suitability of this protocol for

Proposed hardware architectures of particle filter for object tracking

Science.gov (United States)

Abd El-Halym, Howida A.; Mahmoud, Imbaby Ismail; Habib, SED

2012-12-01

In this article, efficient hardware architectures for particle filter (PF) are presented. We propose three different architectures for Sequential Importance Resampling Filter (SIRF) implementation. The first architecture is a two-step sequential PF machine, where particle sampling, weight, and output calculations are carried out in parallel during the first step followed by sequential resampling in the second step. For the weight computation step, a piecewise linear function is used instead of the classical exponential function. This decreases the complexity of the architecture without degrading the results. The second architecture speeds up the resampling step via a parallel, rather than a serial, architecture. This second architecture targets a balance between hardware resources and the speed of operation. The third architecture implements the SIRF as a distributed PF composed of several processing elements and central unit. All the proposed architectures are captured using VHDL synthesized using Xilinx environment, and verified using the ModelSim simulator. Synthesis results confirmed the resource reduction and speed up advantages of our architectures.

Exploration of Heterogeneous FPGA Architectures

Directory of Open Access Journals (Sweden)

Umer Farooq

2011-01-01

mesh and tree-based architectures are evaluated for three sets of benchmark circuits. Experimental results show that a more flexible floor-planning in mesh-based FPGA gives better results as compared to the column-based floor-planning. Also it is shown that compared to different floor-plannings of mesh-based FPGA, tree-based architecture gives better area, performance, and power results.

Automatic segmentation of human cortical layer-complexes and architectural areas using diffusion MRI and its validation

Directory of Open Access Journals (Sweden)

Matteo Bastiani

2016-11-01

Full Text Available Recently, several magnetic resonance imaging contrast mechanisms have been shown to distinguish cortical substructure corresponding to selected cortical layers. Here, we investigate cortical layer and area differentiation by automatized unsupervised clustering of high resolution diffusion MRI data. Several groups of adjacent layers could be distinguished in human primary motor and premotor cortex. We then used the signature of diffusion MRI signals along cortical depth as a criterion to detect area boundaries and find borders at which the signature changes abruptly. We validate our clustering results by histological analysis of the same tissue. These results confirm earlier studies which show that diffusion MRI can probe layer-specific intracortical fiber organization and, moreover, suggests that it contains enough information to automatically classify architecturally distinct cortical areas. We discuss the strengths and weaknesses of the automatic clustering approach and its appeal for MR-based cortical histology.

From green architecture to architectural green

DEFF Research Database (Denmark)

Earon, Ofri

2011-01-01

that describes the architectural exclusivity of this particular architecture genre. The adjective green expresses architectural qualities differentiating green architecture from none-green architecture. Currently, adding trees and vegetation to the building’s facade is the main architectural characteristics...... they have overshadowed the architectural potential of green architecture. The paper questions how a green space should perform, look like and function. Two examples are chosen to demonstrate thorough integrations between green and space. The examples are public buildings categorized as pavilions. One......The paper investigates the topic of green architecture from an architectural point of view and not an energy point of view. The purpose of the paper is to establish a debate about the architectural language and spatial characteristics of green architecture. In this light, green becomes an adjective...

Energy efficient circuit design using nanoelectromechanical relays

Science.gov (United States)

Venkatasubramanian, Ramakrishnan

Nano-electromechanical (NEM) relays are a promising class of emerging devices that offer zero off-state leakage and behave like an ideal switch. Recent advances in planar fabrication technology have demonstrated that microelectromechanical (MEMS) scale miniature relays could be manufactured reliably and could be used to build fully functional, complex integrated circuits. The zero leakage operation of relays has renewed the interest in relay based low power logic design. This dissertation explores circuit architectures using NEM relays and NEMS-CMOS heterogeneous integration. Novel circuit topologies for sequential logic, memory, and power management circuits have been proposed taking into consideration the NEM relay device properties and optimizing for energy efficiency and area. In nanoscale electromechanical devices, dispersion forces like Van der Waals' force (vdW) affect the pull-in stability of the relay devices significantly. Verilog-A electromechanical model of the suspended gate relay operating at 1V with a nominal air gap of 5 - 10nm has been developed taking into account all the electrical, mechanical and dispersion effects. This dissertation explores different relay based latch and flip-flop topologies. It has been shown that as few as 4 relay cells could be used to build flip-flops. An integrated voltage doubler based flip flop that improves the performance by 2X by overdriving Vgb has been proposed. Three NEM relay based parallel readout memory bitcell architectures have been proposed that have faster access time, and remove the reliability issues associated with previously reported serial readout architectures. A paradigm shift in design of power switches using NEM relays is proposed. An interesting property of the relay device is that the ON state resistance (Ron) of the NEM relay switch is constant and is insensitive to the gate slew rate. This coupled with infinite OFF state resistance (Roff ) offers significant area and power advantages over CMOS

Air emissions perspective on energy efficiency: An empirical analysis of China’s coastal areas

International Nuclear Information System (INIS)

Qin, Quande; Li, Xin; Li, Li; Zhen, Wei; Wei, Yi-Ming

2017-01-01

Highlights: • We investigate the static and dynamic energy efficiency in China’s coastal areas. • Both environmental pollutants and greenhouse gas are considered. • Global benchmark technology is incorporated into the related DEA models. • China’s coastal areas have great potential of air emissions reduction. • Technological progress is main driven factor to improve energy efficiency. - Abstract: Improving energy efficiency has been recognized as the most effective way to reduce the greenhouse effect and achieve sustainable development. From the perspective of air emissions, this paper adopts data envelopment analysis approach to evaluate the energy efficiency in China’s coastal areas over the period of 2000–2012. Carbon dioxide, sulfur dioxide and nitrogen oxide are treated as undesirable outputs of energy consumptions. The proposed global Epsilon-based measure is used to estimate the static energy efficiency with an annual cross-section of data. The weights of the three undesirable outputs are determined according to their treatment costs. A global Malmquist-Luenberger productivity index based on directional distance function is employed to dynamically evaluate the energy efficiency. The results indicate the following in China’s coastal areas: (1) the level of economic development is positively related to energy efficiency scores; (2) energy efficiency scores decrease when considering undesirable outputs except Beijing and Hainan; (3) the Circum-Bohai Sea Economic Region greatly improves energy efficiency and has great potential of air emission; (4) the annual growth rate of Malmquist-Luenberger productivity index change is overestimated; (5) energy efficiency improvement is mainly driven by technological improvement, and scale efficiency and management level are the main obstacles.

Secure Storage Architectures

Energy Technology Data Exchange (ETDEWEB)

Aderholdt, Ferrol [Tennessee Technological University; Caldwell, Blake A [ORNL; Hicks, Susan Elaine [ORNL; Koch, Scott M [ORNL; Naughton, III, Thomas J [ORNL; Pogge, James R [Tennessee Technological University; Scott, Stephen L [Tennessee Technological University; Shipman, Galen M [ORNL; Sorrillo, Lawrence [ORNL

2015-01-01

The purpose of this report is to clarify the challenges associated with storage for secure enclaves. The major focus areas for the report are: - review of relevant parallel filesystem technologies to identify assets and gaps; - review of filesystem isolation/protection mechanisms, to include native filesystem capabilities and auxiliary/layered techniques; - definition of storage architectures that can be used for customizable compute enclaves (i.e., clarification of use-cases that must be supported for shared storage scenarios); - investigate vendor products related to secure storage. This study provides technical details on the storage and filesystem used for HPC with particular attention on elements that contribute to creating secure storage. We outline the pieces for a a shared storage architecture that balances protection and performance by leveraging the isolation capabilities available in filesystems and virtualization technologies to maintain the integrity of the data. Key Points: There are a few existing and in-progress protection features in Lustre related to secure storage, which are discussed in (Chapter 3.1). These include authentication capabilities like GSSAPI/Kerberos and the in-progress work for GSSAPI/Host-keys. The GPFS filesystem provides native support for encryption, which is not directly available in Lustre. Additionally, GPFS includes authentication/authorization mechanisms for inter-cluster sharing of filesystems (Chapter 3.2). The limitations of key importance for secure storage/filesystems are: (i) restricting sub-tree mounts for parallel filesystem (which is not directly supported in Lustre or GPFS), and (ii) segregation of hosts on the storage network and practical complications with dynamic additions to the storage network, e.g., LNET. A challenge for VM based use cases will be to provide efficient IO forwarding of the parallel filessytem from the host to the guest (VM). There are promising options like para-virtualized filesystems to

Progress in a novel architecture for high performance processing

Science.gov (United States)

Zhang, Zhiwei; Liu, Meng; Liu, Zijun; Du, Xueliang; Xie, Shaolin; Ma, Hong; Ding, Guangxin; Ren, Weili; Zhou, Fabiao; Sun, Wenqin; Wang, Huijuan; Wang, Donglin

2018-04-01

The high performance processing (HPP) is an innovative architecture which targets on high performance computing with excellent power efficiency and computing performance. It is suitable for data intensive applications like supercomputing, machine learning and wireless communication. An example chip with four application-specific integrated circuit (ASIC) cores which is the first generation of HPP cores has been taped out successfully under Taiwan Semiconductor Manufacturing Company (TSMC) 40 nm low power process. The innovative architecture shows great energy efficiency over the traditional central processing unit (CPU) and general-purpose computing on graphics processing units (GPGPU). Compared with MaPU, HPP has made great improvement in architecture. The chip with 32 HPP cores is being developed under TSMC 16 nm field effect transistor (FFC) technology process and is planed to use commercially. The peak performance of this chip can reach 4.3 teraFLOPS (TFLOPS) and its power efficiency is up to 89.5 gigaFLOPS per watt (GFLOPS/W).

Interplay between efficiency and device architecture for small molecule organic solar cells.

Science.gov (United States)

Williams, Graeme; Sutty, Sibi; Aziz, Hany

2014-06-21

Small molecule organic solar cells (OSCs) have experienced a resurgence of interest over their polymer solar cell counterparts, owing to their improved batch-to-batch (thus, cell-to-cell) reliability. In this systematic study on OSC device architecture, we investigate five different small molecule OSC structures, including the simple planar heterojunction (PHJ) and bulk heterojunction (BHJ), as well as several planar-mixed structures. The different OSC structures are studied over a wide range of donor:acceptor mixing concentrations to gain a comprehensive understanding of their charge transport behavior. Transient photocurrent decay measurements provide crucial information regarding the interplay between charge sweep-out and charge recombination, and ultimately hint toward space charge effects in planar-mixed structures. Results show that the BHJ/acceptor architecture, comprising a BHJ layer with high C60 acceptor content, generates OSCs with the highest performance by balancing charge generation with charge collection. The performance of other device architectures is largely limited by hole transport, with associated hole accumulation and space charge effects.

Musculoskeletal Geometry, Muscle Architecture and Functional Specialisations of the Mouse Hindlimb.

Directory of Open Access Journals (Sweden)

James P Charles

Full Text Available Mice are one of the most commonly used laboratory animals, with an extensive array of disease models in existence, including for many neuromuscular diseases. The hindlimb is of particular interest due to several close muscle analogues/homologues to humans and other species. A detailed anatomical study describing the adult morphology is lacking, however. This study describes in detail the musculoskeletal geometry and skeletal muscle architecture of the mouse hindlimb and pelvis, determining the extent to which the muscles are adapted for their function, as inferred from their architecture. Using I2KI enhanced microCT scanning and digital segmentation, it was possible to identify 39 distinct muscles of the hindlimb and pelvis belonging to nine functional groups. The architecture of each of these muscles was determined through microdissections, revealing strong architectural specialisations between the functional groups. The hip extensors and hip adductors showed significantly stronger adaptations towards high contraction velocities and joint control relative to the distal functional groups, which exhibited larger physiological cross sectional areas and longer tendons, adaptations for high force output and elastic energy savings. These results suggest that a proximo-distal gradient in muscle architecture exists in the mouse hindlimb. Such a gradient has been purported to function in aiding locomotor stability and efficiency. The data presented here will be especially valuable to any research with a focus on the architecture or gross anatomy of the mouse hindlimb and pelvis musculature, but also of use to anyone interested in the functional significance of muscle design in relation to quadrupedal locomotion.

An Energy-Efficient and Scalable Deep Learning/Inference Processor With Tetra-Parallel MIMD Architecture for Big Data Applications.

Science.gov (United States)

Park, Seong-Wook; Park, Junyoung; Bong, Kyeongryeol; Shin, Dongjoo; Lee, Jinmook; Choi, Sungpill; Yoo, Hoi-Jun

2015-12-01

Deep Learning algorithm is widely used for various pattern recognition applications such as text recognition, object recognition and action recognition because of its best-in-class recognition accuracy compared to hand-crafted algorithm and shallow learning based algorithms. Long learning time caused by its complex structure, however, limits its usage only in high-cost servers or many-core GPU platforms so far. On the other hand, the demand on customized pattern recognition within personal devices will grow gradually as more deep learning applications will be developed. This paper presents a SoC implementation to enable deep learning applications to run with low cost platforms such as mobile or portable devices. Different from conventional works which have adopted massively-parallel architecture, this work adopts task-flexible architecture and exploits multiple parallelism to cover complex functions of convolutional deep belief network which is one of popular deep learning/inference algorithms. In this paper, we implement the most energy-efficient deep learning and inference processor for wearable system. The implemented 2.5 mm × 4.0 mm deep learning/inference processor is fabricated using 65 nm 8-metal CMOS technology for a battery-powered platform with real-time deep inference and deep learning operation. It consumes 185 mW average power, and 213.1 mW peak power at 200 MHz operating frequency and 1.2 V supply voltage. It achieves 411.3 GOPS peak performance and 1.93 TOPS/W energy efficiency, which is 2.07× higher than the state-of-the-art.

Point DCT VLSI Architecture for Emerging HEVC Standard

Directory of Open Access Journals (Sweden)

Ashfaq Ahmed

2012-01-01

Full Text Available This work presents a flexible VLSI architecture to compute the -point DCT. Since HEVC supports different block sizes for the computation of the DCT, that is, 4×4 up to 32×32, the design of a flexible architecture to support them helps reducing the area overhead of hardware implementations. The hardware proposed in this work is partially folded to save area and to get speed for large video sequences sizes. The proposed architecture relies on the decomposition of the DCT matrices into sparse submatrices in order to reduce the multiplications. Finally, multiplications are completely eliminated using the lifting scheme. The proposed architecture sustains real-time processing of 1080P HD video codec running at 150 MHz.

Area Spectral Efficiency and Energy Efficiency Tradeoff in Ultradense Heterogeneous Networks

Directory of Open Access Journals (Sweden)

Lanhua Xiang

2017-01-01

Full Text Available In order to meet the demand of explosive data traffic, ultradense base station (BS deployment in heterogeneous networks (HetNets as a key technique in 5G has been proposed. However, with the increment of BSs, the total energy consumption will also increase. So, the energy efficiency (EE has become a focal point in ultradense HetNets. In this paper, we take the area spectral efficiency (ASE into consideration and focus on the tradeoff between the ASE and EE in an ultradense HetNet. The distributions of BSs in the two-tier ultradense HetNet are modeled by two independent Poisson point processes (PPPs and the expressions of ASE and EE are derived by using the stochastic geometry tool. The tradeoff between the ASE and EE is formulated as a constrained optimization problem in which the EE is maximized under the ASE constraint, through optimizing the BS densities. It is difficult to solve the optimization problem analytically, because the closed-form expressions of ASE and EE are not easily obtained. Therefore, simulations are conducted to find optimal BS densities.

Globalization and Landscape Architecture

Directory of Open Access Journals (Sweden)

Robert R. Hewitt

2014-02-01

Full Text Available The literature review examines globalization and landscape architecture as discourse, samples its various meanings, and proposes methods to identify and contextualize its specific literature. Methodologically, the review surveys published articles and books by leading authors and within the WorldCat.org Database associated with landscape architecture and globalization, analyzing survey results for comprehensive conceptual and co-relational frameworks. Three “higher order” dimensions frame the review’s conceptual organization, facilitating the organization of subordinate/subtopical areas of interest useful for comparative analysis. Comparative analysis of the literature suggests an uneven clustering of discipline-related subject matter across the literature’s “higher order” dimensions, with a much smaller body of literature related to landscape architecture confined primarily to topics associated with the dispersion of global phenomena. A subcomponent of this smaller body of literature is associated with other fields of study, but inferentially related to landscape architecture. The review offers separate references and bibliographies for globalization literature in general and globalization and landscape architecture literature, specifically.

Usalpharma: A Cloud-Based Architecture to Support Quality Assurance Training Processes in Health Area Using Virtual Worlds

Directory of Open Access Journals (Sweden)

Francisco J. García-Peñalvo

2014-01-01

Full Text Available This paper discusses how cloud-based architectures can extend and enhance the functionality of the training environments based on virtual worlds and how, from this cloud perspective, we can provide support to analysis of training processes in the area of health, specifically in the field of training processes in quality assurance for pharmaceutical laboratories, presenting a tool for data retrieval and analysis that allows facing the knowledge discovery in the happenings inside the virtual worlds.

Usalpharma: A Cloud-Based Architecture to Support Quality Assurance Training Processes in Health Area Using Virtual Worlds

Science.gov (United States)

García-Peñalvo, Francisco J.; Pérez-Blanco, Jonás Samuel; Martín-Suárez, Ana

2014-01-01

This paper discusses how cloud-based architectures can extend and enhance the functionality of the training environments based on virtual worlds and how, from this cloud perspective, we can provide support to analysis of training processes in the area of health, specifically in the field of training processes in quality assurance for pharmaceutical laboratories, presenting a tool for data retrieval and analysis that allows facing the knowledge discovery in the happenings inside the virtual worlds. PMID:24778593

Architecture on Architecture

DEFF Research Database (Denmark)

Olesen, Karen

2016-01-01

that is not scientific or academic but is more like a latent body of data that we find embedded in existing works of architecture. This information, it is argued, is not limited by the historical context of the work. It can be thought of as a virtual capacity – a reservoir of spatial configurations that can...... correlation between the study of existing architectures and the training of competences to design for present-day realities.......This paper will discuss the challenges faced by architectural education today. It takes as its starting point the double commitment of any school of architecture: on the one hand the task of preserving the particular knowledge that belongs to the discipline of architecture, and on the other hand...

Data accuracy assessment using enterprise architecture

Science.gov (United States)

Närman, Per; Holm, Hannes; Johnson, Pontus; König, Johan; Chenine, Moustafa; Ekstedt, Mathias

2011-02-01

Errors in business processes result in poor data accuracy. This article proposes an architecture analysis method which utilises ArchiMate and the Probabilistic Relational Model formalism to model and analyse data accuracy. Since the resources available for architecture analysis are usually quite scarce, the method advocates interviews as the primary data collection technique. A case study demonstrates that the method yields correct data accuracy estimates and is more resource-efficient than a competing sampling-based data accuracy estimation method.

Base Camp Architecture

Directory of Open Access Journals (Sweden)

Warebi Gabriel Brisibe

2016-03-01

Full Text Available Longitudinal or time line studies of change in the architecture of a particular culture are common, but an area still open to further research is change across space or place. In particular, there is need for studies on architectural change of cultures stemming from the same ethnic source split between their homeland and other Diasporas. This change may range from minor deviations to drastic shifts away from an architectural norm and the accumulation of these shifts within a time frame constitutes variations. This article focuses on identifying variations in the architecture of the Ijo fishing group that migrates along the coastline of West Africa. It examines the causes of cross-cultural variation between base camp dwellings of Ijo migrant fishermen in the Bakassi Peninsula in Cameroon and Bayelsa State in Nigeria. The study draws on the idea of the inevitability of cultural and social change over time as proposed in the theories of cultural dynamism and evolution. It tests aspects of cultural transmission theory using the principal coordinates analysis to ascertain the possible causes of variation. From the findings, this research argues that migration has enhanced the forces of cultural dynamism, which have resulted in significant variations in the architecture of this fishing group.

Communication-Oriented Design Space Exploration for Reconfigurable Architectures

Directory of Open Access Journals (Sweden)

Gogniat Guy

2007-01-01

Full Text Available Many academic works in computer engineering focus on reconfigurable architectures and associated tools. Fine-grain architectures, field programmable gate arrays (FPGAs, are the most well-known structures of reconfigurable hardware. Dedicated tools (generic or specific allow for the exploration of their design space to choose the best architecture characteristics and/or to explore the application characteristics. The aim is to increase the synergy between the application and the architecture in order to get the best performance. However, there is no generic tool to perform such an exploration for coarse-grain or heterogeneous-grain architectures, just a small number of very specific tools are able to explore a limited set of architectures. To address this major lack, in this paper we propose a new design space exploration approach adapted to fine- and coarse-grain granularities. Our approach combines algorithmic and architecture explorations. It relies on an automatic estimation tool which computes the communication hierarchical distribution and the architectural processing resources use rate for the architecture under exploration. Such an approach forwards the rapid definition of efficient reconfigurable architectures dedicated to one or several applications.

Architecture for the Secret-Key BC3 Cryptography Algorithm

Directory of Open Access Journals (Sweden)

Arif Sasongko

2011-08-01

Full Text Available Cryptography is a very important aspect in data security. The focus of research in this field is shifting from merely security aspect to consider as well the implementation aspect. This paper aims to introduce BC3 algorithm with focus on its hardware implementation. It proposes architecture for the hardware implementation for this algorithm. BC3 algorithm is a secret-key cryptography algorithm developed with two considerations: robustness and implementation efficiency. This algorithm has been implemented on software and has good performance compared to AES algorithm. BC3 is improvement of BC2 and AE cryptographic algorithm and it is expected to have the same level of robustness and to gain competitive advantages in the implementation aspect. The development of the architecture gives much attention on (1 resource sharing and (2 having single clock for each round. It exploits regularity of the algorithm. This architecture is then implemented on an FPGA. This implementation is three times smaller area than AES, but about five times faster. Furthermore, this BC3 hardware implementation has better performance compared to BC3 software both in key expansion stage and randomizing stage. For the future, the security of this implementation must be reviewed especially against side channel attack.

Data architecture from zen to reality

CERN Document Server

Tupper, Charles D

2011-01-01

Data Architecture: From Zen to Reality explains the principles underlying data architecture, how data evolves with organizations, and the challenges organizations face in structuring and managing their data. It also discusses proven methods and technologies to solve the complex issues dealing with data. The book uses a holistic approach to the field of data architecture by covering the various applied areas of data, including data modelling and data model management, data quality , data governance, enterprise information management, database design, data warehousing, and warehouse design. This book is a core resource for anyone emplacing, customizing or aligning data management systems, taking the Zen-like idea of data architecture to an attainable reality.

Information network architectures

Science.gov (United States)

Murray, N. D.

1985-01-01

Graphs, charts, diagrams and outlines of information relative to information network architectures for advanced aerospace missions, such as the Space Station, are presented. Local area information networks are considered a likely technology solution. The principle needs for the network are listed.

ISOGA: Integrated Services Optical Grid Architecture for Emerging E-Science Collaborative Applications

Energy Technology Data Exchange (ETDEWEB)

Oliver Yu

2008-11-28

This final report describes the accomplishments in the ISOGA (Integrated Services Optical Grid Architecture) project. ISOGA enables efficient deployment of existing and emerging collaborative grid applications with increasingly diverse multimedia communication requirements over a wide-area multi-domain optical network grid; and enables collaborative scientists with fast retrieval and seamless browsing of distributed scientific multimedia datasets over a wide-area optical network grid. The project focuses on research and development in the following areas: the polymorphic optical network control planes to enable multiple switching and communication services simultaneously; the intelligent optical grid user-network interface to enable user-centric network control and monitoring; and the seamless optical grid dataset browsing interface to enable fast retrieval of local/remote dataset for visualization and manipulation.

Unobstructive Body Area Networks (BAN) for efficient movement monitoring.

Science.gov (United States)

Felisberto, Filipe; Costa, Nuno; Fdez-Riverola, Florentino; Pereira, António

2012-01-01

The technological advances in medical sensors, low-power microelectronics and miniaturization, wireless communications and networks have enabled the appearance of a new generation of wireless sensor networks: the so-called wireless body area networks (WBAN). These networks can be used for continuous monitoring of vital parameters, movement, and the surrounding environment. The data gathered by these networks contributes to improve users' quality of life and allows the creation of a knowledge database by using learning techniques, useful to infer abnormal behaviour. In this paper we present a wireless body area network architecture to recognize human movement, identify human postures and detect harmful activities in order to prevent risk situations. The WBAN was created using tiny, cheap and low-power nodes with inertial and physiological sensors, strategically placed on the human body. Doing so, in an as ubiquitous as possible way, ensures that its impact on the users' daily actions is minimum. The information collected by these sensors is transmitted to a central server capable of analysing and processing their data. The proposed system creates movement profiles based on the data sent by the WBAN's nodes, and is able to detect in real time any abnormal movement and allows for a monitored rehabilitation of the user.

Distributed photovoltaic architecture powering a DC bus: Impact of duty cycle and load variations on the efficiency of the generator

Science.gov (United States)

Allouache, Hadj; Zegaoui, Abdallah; Boutoubat, Mohamed; Bokhtache, Aicha Aissa; Kessaissia, Fatma Zohra; Charles, Jean-Pierre; Aillerie, Michel

2018-05-01

This paper focuses on a photovoltaic generator feeding a load via a boost converter in a distributed PV architecture. The principal target is the evaluation of the efficiency of a distributed photovoltaic architecture powering a direct current (DC) PV bus. This task is achieved by outlining an original way for tracking the Maximum Power Point (MPP) taking into account load variations and duty cycle on the electrical quantities of the boost converter and on the PV generator output apparent impedance. Thereafter, in a given sized PV system, we analyze the influence of the load variations on the behavior of the boost converter and we deduce the limits imposed by the load on the DC PV bus. The simultaneous influences of 1- the variation of the duty cycle of the boost converter and 2- the load power on the parameters of the various components of the photovoltaic chain and on the boost performances are clearly presented as deduced by simulation.

Hybrid Power Management-Based Vehicle Architecture

Science.gov (United States)

Eichenberg, Dennis J.

2011-01-01

Hybrid Power Management (HPM) is the integration of diverse, state-of-the-art power devices in an optimal configuration for space and terrestrial applications (s ee figure). The appropriate application and control of the various power devices significantly improves overall system performance and efficiency. The basic vehicle architecture consists of a primary power source, and possibly other power sources, that provides all power to a common energy storage system that is used to power the drive motors and vehicle accessory systems. This architecture also provides power as an emergency power system. Each component is independent, permitting it to be optimized for its intended purpose. The key element of HPM is the energy storage system. All generated power is sent to the energy storage system, and all loads derive their power from that system. This can significantly reduce the power requirement of the primary power source, while increasing the vehicle reliability. Ultracapacitors are ideal for an HPM-based energy storage system due to their exceptionally long cycle life, high reliability, high efficiency, high power density, and excellent low-temperature performance. Multiple power sources and multiple loads are easily incorporated into an HPM-based vehicle. A gas turbine is a good primary power source because of its high efficiency, high power density, long life, high reliability, and ability to operate on a wide range of fuels. An HPM controller maintains optimal control over each vehicle component. This flexible operating system can be applied to all vehicles to considerably improve vehicle efficiency, reliability, safety, security, and performance. The HPM-based vehicle architecture has many advantages over conventional vehicle architectures. Ultracapacitors have a much longer cycle life than batteries, which greatly improves system reliability, reduces life-of-system costs, and reduces environmental impact as ultracapacitors will probably never need to be

Fabrication of TiO{sub 2} hierarchical architecture assembled by nanowires with anatase/TiO{sub 2}(B) phase-junctions for efficient photocatalytic hydrogen production

Energy Technology Data Exchange (ETDEWEB)

Qiu, Yong; Ouyang, Feng, E-mail: ouyangfh@hit.edu.cn

2017-05-01

Highlights: • H-titanate nanowires hierarchical architectures (TNH) were prepared by a hydrothermal method. • Calcinations of TNH leads to the formation of anatase/TiO{sub 2}(B) phase-junctions. • The hierarchical architecture offered enhanced light harvesting and large specific surface area. • The 1D nanowires and anatase/TiO{sub 2}(B) phase-junctions both can enhance the separation of photoinduced electron-hole. • The products calcined at the optimum conditions (450 °C) exhibited a maximum hydrogenproduction rate of 7808 μmol g{sup −1} h{sup −1}. - Abstract: TiO{sub 2} hierarchical architecture assembled by nanowires with anatase/TiO{sub 2}(B) phase-junctions was prepared by a hydrothermal process followed by calcinations. The optimum calcination treatment (450 °C) not only led to the formation of anatase/TiO{sub 2}(B) phase-junctions, but also kept the morphology of 1D nanowire and hierarchical architecture well. The T-450 load 0.5 wt% Pt cocatalysts showed the best photocatalytic hydrogen production activity, with a maximum hydrogen production rate of 7808 μmol g{sup −1} h{sup −1}. The high photocatalytic activity is ascribed to the combined effects of the following three factors: (1) the hierarchical architecture exhibits better light harvesting; (2) the larger specific surface area provides more surface active sites for the photocatalytic reaction; (3) the 1D nanowires and anatase/TiO{sub 2}(B) phase-junctions both can enhance the separation of photoinduced electron-hole pairs and inhibit their recombination.

Enterprise Architecture Evaluation

DEFF Research Database (Denmark)

Andersen, Peter; Carugati, Andrea

2014-01-01

By being holistically preoccupied with coherency among organizational elements such as organizational strategy, business needs and the IT functions role in supporting the business, enterprise architecture (EA) has grown to become a core competitive advantage. Though EA is a maturing research area...

Fourth international workshop on sharing and reusing architectural knowledge (SHARK 2009)

NARCIS (Netherlands)

Lago, P.; Avgeriou, P.; Kruchten, P.; Fickas, S.; Atlee, J.; Inverardi, P.

2009-01-01

Architectural knowledge has been recognized by the software architecture community as a self-contained research area in software architecture, and brought along some promising research directions. In this workshop we discuss the issues that lead to the application of architectural knowledge in

Energy efficiency improvement: A strong driver for Total operations and R and D

Energy Technology Data Exchange (ETDEWEB)

Garnaud, Frederic; Rocher, Anne

2010-09-15

Total has implemented an energy efficiency action plan for both producing fields and new projects linked to a dedicated R and D program. The Energy efficiency assessment methodology is described, with an example: base line of the current situation, energy efficiency plan, contribution to best practices at corporate level. A methodology to assess the energy efficiency of a new development has been defined and implemented within Total. This methodology as well as related indicators is presented. Examples of R and D results dedicated to improve energy efficiency in two major areas of future developments are given: sour gas production and deep offshore field architecture.

A distributed multiagent system architecture for body area networks applied to healthcare monitoring.

Science.gov (United States)

Felisberto, Filipe; Laza, Rosalía; Fdez-Riverola, Florentino; Pereira, António

2015-01-01

In the last years the area of health monitoring has grown significantly, attracting the attention of both academia and commercial sectors. At the same time, the availability of new biomedical sensors and suitable network protocols has led to the appearance of a new generation of wireless sensor networks, the so-called wireless body area networks. Nowadays, these networks are routinely used for continuous monitoring of vital parameters, movement, and the surrounding environment of people, but the large volume of data generated in different locations represents a major obstacle for the appropriate design, development, and deployment of more elaborated intelligent systems. In this context, we present an open and distributed architecture based on a multiagent system for recognizing human movements, identifying human postures, and detecting harmful activities. The proposed system evolved from a single node for fall detection to a multisensor hardware solution capable of identifying unhampered falls and analyzing the users' movement. The experiments carried out contemplate two different scenarios and demonstrate the accuracy of our proposal as a real distributed movement monitoring and accident detection system. Moreover, we also characterize its performance, enabling future analyses and comparisons with similar approaches.

Area Green Efficiency (AGE) of Two Tier Heterogeneous Cellular Networks

KAUST Repository

Tabassum, Hina; Alouini, Mohamed-Slim; Shakir, Muhammad Zeeshan

2012-01-01

CO2 emissions, operational and capital expenditures (OPEX and CAPEX) whilst enhancing the area spectral efficiency (ASE) of the network. In this context, we define a performance metric which characterize the aggregate energy savings per unit macrocell

National Positioning, Navigation, and Timing Architecture Study

Science.gov (United States)

van Dyke, K.; Vicario, J.; Hothem, L.

2007-12-01

The purpose of the National Positioning, Navigation and Timing (PNT) Architecture effort is to help guide future PNT system-of-systems investment and implementation decisions. The Assistant Secretary of Defense for Networks and Information Integration and the Under Secretary of Transportation for Policy sponsored a National PNT Architecture study to provide more effective and efficient PNT capabilities focused on the 2025 timeframe and an evolutionary path for government provided systems and services. U.S. Space-Based PNT Policy states that the U.S. must continue to improve and maintain GPS, augmentations to GPS, and back-up capabilities to meet growing national, homeland, and economic security needs. PNT touches almost every aspect of people´s lives today. PNT is essential for Defense and Civilian applications ranging from the Department of Defense´s Joint network centric and precision operations to the transportation and telecommunications sectors, improving efficiency, increasing safety, and being more productive. Absence of an approved PNT architecture results in uncoordinated research efforts, lack of clear developmental paths, potentially wasteful procurements and inefficient deployment of PNT resources. The national PNT architecture effort evaluated alternative future mixes of global (space and non space-based) and regional PNT solutions, PNT augmentations, and autonomous PNT capabilities to address priorities identified in the DoD PNT Joint Capabilities Document (JCD) and civil equivalents. The path to achieving the Should-Be architecture is described by the National PNT Architecture's Guiding Principles, representing an overarching Vision of the US' role in PNT, an architectural Strategy to fulfill that Vision, and four Vectors which support the Strategy. The National PNT Architecture effort has developed nineteen recommendations. Five foundational recommendations are tied directly to the Strategy while the remaining fourteen individually support one of

Utilitarianism, reform, and architecture - Edinburgh as exemplar

OpenAIRE

Qing, Feng

2009-01-01

Although the utilitarian character of modern architecture has been widely recognized, the relationship between Utilitarianism and architectural practice has not been adequately discussed. This thesis intends to contribute to this area with a historical study of the interaction of Utilitarianism and architectural practice in the social reforms of 18th and 19th century Britain. Edinburgh is used as an example to illuminate this historical process in more detail. From three ang...

A System Architecture for Efficient Transmission of Massive DNA Sequencing Data.

Science.gov (United States)

Sağiroğlu, Mahmut Şamİl; Külekcİ, M Oğuzhan

2017-11-01

The DNA sequencing data analysis pipelines require significant computational resources. In that sense, cloud computing infrastructures appear as a natural choice for this processing. However, the first practical difficulty in reaching the cloud computing services is the transmission of the massive DNA sequencing data from where they are produced to where they will be processed. The daily practice here begins with compressing the data in FASTQ file format, and then sending these data via fast data transmission protocols. In this study, we address the weaknesses in that daily practice and present a new system architecture that incorporates the computational resources available on the client side while dynamically adapting itself to the available bandwidth. Our proposal considers the real-life scenarios, where the bandwidth of the connection between the parties may fluctuate, and also the computing power on the client side may be of any size ranging from moderate personal computers to powerful workstations. The proposed architecture aims at utilizing both the communication bandwidth and the computing resources for satisfying the ultimate goal of reaching the results as early as possible. We present a prototype implementation of the proposed architecture, and analyze several real-life cases, which provide useful insights for the sequencing centers, especially on deciding when to use a cloud service and in what conditions.

An Inventory and Evaluation of Architectural and Engineering Resources of the Big South Fork National River and Recreation Area, Tennessee and Kentucky.

Science.gov (United States)

1982-02-25

coordinated multidisciplinary study of both the architectural and engineering resources of the National Area. Both research b1 orientation and...South Fork just north of Rugby , and traveled through the site where Jamestown, Tennessee, now stands. A third trail, the Chickamauga Path, left the...Thomas Hughes (1881), the founder of the English colony of Rugby , Tennessee, described his neighbors in the Big South Fork area as mostly poor men

The problem of the architectural heritage reconstruction

OpenAIRE

Alfazhr M.A.; Osama E.

2017-01-01

the subject of this research is the modern technology of the architectural monuments restoration, which makes possible to increase the design and performance, as well as the durability of historical objects. Choosing the most efficient, cost-effective and durable recovery and expanding of architectural monuments technologies is a priority of historical cities. Adoption of the faster and sound monuments restoration technology is neсessay because there are a lot of historical Russian cities in ...

Acoustic simulation in architecture with parallel algorithm

Science.gov (United States)

Li, Xiaohong; Zhang, Xinrong; Li, Dan

2004-03-01

In allusion to complexity of architecture environment and Real-time simulation of architecture acoustics, a parallel radiosity algorithm was developed. The distribution of sound energy in scene is solved with this method. And then the impulse response between sources and receivers at frequency segment, which are calculated with multi-process, are combined into whole frequency response. The numerical experiment shows that parallel arithmetic can improve the acoustic simulating efficiency of complex scene.

Preindustrial versus postindustrial Architecture and Building Techniques

DEFF Research Database (Denmark)

Vestergaard, Inge

2014-01-01

How can preindustrial architecture inspire sustainable thinking in postindustrial architectural design? How can we learn from experience and how can social, economic and environmental conditions give perspectives and guide a knowledge based evolution of basic experience towards modern industriali......How can preindustrial architecture inspire sustainable thinking in postindustrial architectural design? How can we learn from experience and how can social, economic and environmental conditions give perspectives and guide a knowledge based evolution of basic experience towards modern...... industrialized building processes? Identification of sustainable parameters related to change in society, to building technique and to comfort are illustrated through two Danish building types, which are different in time, but similar in function. One representing evolution and experience based countryside...... fisherman’s house built around year 1700; and second a frontrunner suburban family house built year 2008. The analysis involves architectural, technical and comfort matters and will state the levels of design, social conditions, sustainable and energy efficient parameters. Results will show lessons learned...

VLSI ARCHITECTURE FOR IMAGE COMPRESSION THROUGH ADDER MINIMIZATION TECHNIQUE AT DCT STRUCTURE

Directory of Open Access Journals (Sweden)

N.R. Divya

2014-08-01

Full Text Available Data compression plays a vital role in multimedia devices to present the information in a succinct frame. Initially, the DCT structure is used for Image compression, which has lesser complexity and area efficient. Similarly, 2D DCT also has provided reasonable data compression, but implementation concern, it calls more multipliers and adders thus its lead to acquire more area and high power consumption. To contain an account of all, this paper has been dealt with VLSI architecture for image compression using Rom free DA based DCT (Discrete Cosine Transform structure. This technique provides high-throughput and most suitable for real-time implementation. In order to achieve this image matrix is subdivided into odd and even terms then the multiplication functions are removed by shift and add approach. Kogge_Stone_Adder techniques are proposed for obtaining a bit-wise image quality which determines the new trade-off levels as compared to the previous techniques. Overall the proposed architecture produces reduced memory, low power consumption and high throughput. MATLAB is used as a funding tool for receiving an input pixel and obtaining output image. Verilog HDL is used for implementing the design, Model Sim for simulation, Quatres II is used to synthesize and obtain details about power and area.

A new method for performance evaluation of enterprise architecture using streotypes

Directory of Open Access Journals (Sweden)

Samaneh Khamseh

2013-11-01

Full Text Available These days, we see many organizations with extremely complex systems with various processes, organizational units, individuals, and information technology support where there are complex relationships among their various elements. In these organizations, poor architecture reduces efficiency and flexibility. Enterprise architecture, with full description of the functions of information technology in the organization, attempts to reduce the complexity of the most efficient tools to reach organizational objectives. Enterprise architecture can better assess the optimal conditions for achieving organizational goals. For evaluating enterprise architecture, executable model need to be applied. Executable model using a static architectural view to describe necessary documents need to be created. Therefore, to make an executable model, we need a requirement to produce products of the enterprise architecture to create an executable model. In this paper, for the production of an enterprise architecture, object-oriented approach is implemented. We present an algorithm to use stereotypes by considering reliability assessment. The approach taken in this algorithm is to improve the reliability by considering additional components in parallel and using redundancy techniques to maintain the minimum number of components. Furthermore, we implement the proposed algorithm on a case study and the results are compared with previous algorithms.

Multicomponent Protein Cage Architectures for Photocatalysis

Energy Technology Data Exchange (ETDEWEB)

Gupta, Arunava [Univ. of Alabama, Tuscaloosa, AL (United States); Prevelige, Peter E [Univ. of Alabama, Birmingham, AL (United States)

2016-01-04

The primary goal of the project was to develop protein-templated approaches for the synthesis and directed assembly of semiconductor nanomaterials that are efficient for visible light absorption and hydrogen production. In general, visible-light-driven photocatalysis reactions exhibit low quantum efficiency for solar energy conversion primarily because of materials-related issues and limitations, such as the control of the band gap, band structure, photochemical stability, and available reactive surface area of the photocatalyst. Synthesis of multicomponent hierarchical nano-architectures, consisting of semiconductor nanoparticles (NPs) with desired optical properties fabricated to maximize spatial proximity for optimum electron and energy transfer represents an attractive route for addressing the problem. Virus capsids are highly symmetrical, self-assembling protein cage nanoparticles that exist in a range of sizes and symmetries. Selective deposition of inorganic, by design, at specific locations on virus capsids affords precise control over the size, spacing, and assembly of nanomaterials, resulting in uniform and reproducible nano-architectures. We utilized the self-assembling capabilities of the 420 subunit, 60 nm icosahedral, P22 virus capsid to direct the nucleation, growth, and proximity of a range of component materials. Controlled fabrication on the exterior of the temperature stable shell was achieved by genetically encoding specific binding peptides into an externally exposed loop which is displayed on each of the 420 coat protein subunits. Localization of complimentary materials to the interior of the particle was achieved through the use “scaffolding-fusion proteins. The scaffolding domain drives coat protein polymerization resulting in a coat protein shell surrounding a core of approximately 300 scaffolding/fusion molecules. The fusion domain comprises a peptide which specifically binds the semiconductor material of interest.

Light Water Reactor Sustainability Program: Digital Architecture Project Plan

Energy Technology Data Exchange (ETDEWEB)

Thomas, Ken [Idaho National Lab. (INL), Idaho Falls, ID (United States)

2014-09-01

There are many technologies available to the nuclear power industry to improve efficiency in plant work activities. These range from new control room technologies to those for mobile field workers. They can make a positive impact on a wide range of performance objectives – increase in productivity, human error reduction, validation of results, accurate transfer of data, and elimination of repetitive tasks. It is expected that the industry will more and more turn to these technologies to achieve these operational efficiencies to lower costs. At the same time, this will help utilities manage a looming staffing problem as the inevitable retirement wave of the more seasoned workers affects both staffing levels and knowledge retention. A barrier to this wide-scale implementation of new technologies for operational efficiency is the lack of a comprehensive digital architecture that can support the real-time information exchanges needed to achieve the desired operational efficiencies. This project will define an advanced digital architecture that will accommodate the entire range of system, process, and plant worker activity to enable the highest degree of integration, thereby creating maximum efficiency and productivity. This pilot project will consider a range of open standards that are suitable for the various data and communication requirements of a seamless digital environment. It will map these standards into an overall architecture to support the II&C developments of this research program.

SET: Session Layer-Assisted Efficient TCP Management Architecture for 6LoWPAN with Multiple Gateways

Directory of Open Access Journals (Sweden)

Akbar AliHammad

2010-01-01

Full Text Available 6LoWPAN (IPv6 based Low-Power Personal Area Network is a protocol specification that facilitates communication of IPv6 packets on top of IEEE 802.15.4 so that Internet and wireless sensor networks can be inter-connected. This interconnection is especially required in commercial and enterprise applications of sensor networks where reliable and timely data transfers such as multiple code updates are needed from Internet nodes to sensor nodes. For this type of inbound traffic which is mostly bulk, TCP as transport layer protocol is essential, resulting in end-to-end TCP session through a default gateway. In this scenario, a single gateway tends to become the bottleneck because of non-uniform connectivity to all the sensor nodes besides being vulnerable to buffer overflow. We propose SET; a management architecture for multiple split-TCP sessions across a number of serving gateways. SET implements striping and multiple TCP session management through a shim at session layer. Through analytical modeling and ns2 simulations, we show that our proposed architecture optimizes communication for ingress bulk data transfer while providing associated load balancing services. We conclude that multiple split-TCP sessions managed in parallel across a number of gateways result in reduced latency for bulk data transfer and provide robustness against gateway failures.

Simulation system architecture design for generic communications link

Science.gov (United States)

Tsang, Chit-Sang; Ratliff, Jim

1986-01-01

This paper addresses a computer simulation system architecture design for generic digital communications systems. It addresses the issues of an overall system architecture in order to achieve a user-friendly, efficient, and yet easily implementable simulation system. The system block diagram and its individual functional components are described in detail. Software implementation is discussed with the VAX/VMS operating system used as a target environment.

4th Conference on Advances in architectural geometry 2014

CERN Document Server

Knippers, Jan; Mitra, Niloy; Wang, Wenping

2015-01-01

This book contains 24 technical papers presented at the fourth edition of the Advances in Architectural Geometry conference, AAG 2014, held in London, England, September 2014. It offers engineers, mathematicians, designers, and contractors insight into the efficient design, analysis, and manufacture of complex shapes, which will help open up new horizons for architecture. The book examines geometric aspects involved in architectural design, ranging from initial conception to final fabrication. It focuses on four key topics: applied geometry, architecture, computational design, and also practice in the form of case studies. In addition, the book also features algorithms, proposed implementation, experimental results, and illustrations. Overall, the book presents both theoretical and practical work linked to new geometrical developments in architecture. It gathers the diverse components of the contemporary architectural tendencies that push the building envelope towards free form in order to respond to multiple...

Towards a sustainable architecture: Adequate to the environment and of maximum energy efficiency; Hacia una arquitectura sustentable: adecuada al ambiente y de maxima eficiencia energetica

Energy Technology Data Exchange (ETDEWEB)

Morillon Galvez, David [Comision Nacional para el Ahorro de Energia, Mexico, D. F. (Mexico)

1999-07-01

An analysis of the elements and factors that the architecture of buildings must have to be sustainable, such as: a design adequate to the environment, saving and efficient use of alternate energies, and the auto-supply is presented. In addition a methodology for the natural air conditioning (bioclimatic architecture) of buildings, as well as ideas for the saving and efficient use of energy, with the objective of contributing to the adequate use of components of the building (walls, ceilings, floors etc.), is presented, that when interacting with the environment it takes advantage of it, without deterioration of the same, obtaining energy efficient designs. [Spanish] Se presenta un analisis de los elementos y factores que debe tener la arquitectura de edificios para ser sustentable, como; un diseno adecuado al ambiente, ahorro y uso eficiente de la energia, el uso de energias alternas y el autoabastecimiento. Ademas se propone una metodologia para la climatizacion natural (arquitectura bioclimatica) de edificios, asi como ideas para el ahorro y uso eficiente de energia, con el objetivo de aportar al uso adecuado de componentes del edificio (muros, techos, pisos etc.) que al interactuar con el ambiente tome ventaja de el, sin deterioro del mismo, logrando disenos energeticamente eficientes.

Organic MEMS/NEMS-based high-efficiency 3D ITO-less flexible photovoltaic cells

International Nuclear Information System (INIS)

Kassegne, Sam; Moon, Kee; Martín-Ramos, Pablo; Majzoub, Mohammad; Őzturk, Gunay; Desai, Krishna; Parikh, Mihir; Nguyen, Bao; Khosla, Ajit; Chamorro-Posada, Pedro

2012-01-01

A novel approach based on three-dimensional (3D) architecture for polymeric photovoltaic cells made up of an array of sub-micron and nano-pillars which not only increase the area of the light absorbing surface, but also improve the carrier collection efficiency of bulk-heterojunction organic solar cells is presented. The approach also introduces coating of 3D anodes with a new solution-processable highly conductive transparent polymer (Orgacon™) that replaces expensive vacuum-deposited ITO (indium tin oxide) as well as the additional hole-collecting layer of conventional PEDOT:PSS (poly(3,4-ethylenedioxythiophene) poly(styrenesulfonate)). In addition, the described procedure is well suited to roll-to-roll high-throughput manufacturing. The high aspect-ratio 3D pillars which form the basis for this new architecture are patterned through micro-electromechanical-system- and nano-electromechanical-system-based processes. For the particular case of P3HT (poly(3-hexylthiophene)) and PCBM (phenyl-C61-butyric acid methyl ester) active material, efficiencies in excess of 6% have been achieved for these photovoltaic cells of 3D architecture using ITO-less flexible PET (polyethylene terephthalate) substrates. This increase in efficiency turns out to be more than twice higher than those achieved for their 2D counterparts. (paper)

Collaborative production indicators in information architecture

Directory of Open Access Journals (Sweden)

Zayr Claudio Gomes da Silva

2017-04-01

Full Text Available Information architecture is considered a strategic domain of collaborative production of Information Science. We describe the conditions of collaborative production in information architecture, considering it a sub-area of the study of Information Science. In order to do so, we specifically address indicators of scientific production that include topics of study, typology and authorship, postgraduate programs and areas to which it is linked, among others. This is an exploratory and descriptive research. The scientific production of the National Meeting of Information Science Research (ENANCIB, from 2003 to 2013, is mapped in the "Network Matters" repository. Bibliometry is used to identify paratextual and textual elements that form evidence of collaborative production in information architecture. We verified the plurality in the academic formation of the researchers that approach information architecture, the sharing of languages, some indications of the disciplinary convergences from the collaboration in coauthorship, as well as a plexus of relations through the indirect citations that represent the sharing of elements Theoretical-methodological approaches in interdisciplinary production. In addition, the academic training of the researchers with the highest productivity index is mainly related to Librarianship and Computer Science. The collaborative production in the information architecture is presented as a multidisciplinary production process, constituting a convergent domain that allows the effectiveness of interdisciplinary practices in Information Science.

Workflow as a Service in the Cloud: Architecture and Scheduling Algorithms

Science.gov (United States)

Wang, Jianwu; Korambath, Prakashan; Altintas, Ilkay; Davis, Jim; Crawl, Daniel

2017-01-01

With more and more workflow systems adopting cloud as their execution environment, it becomes increasingly challenging on how to efficiently manage various workflows, virtual machines (VMs) and workflow execution on VM instances. To make the system scalable and easy-to-extend, we design a Workflow as a Service (WFaaS) architecture with independent services. A core part of the architecture is how to efficiently respond continuous workflow requests from users and schedule their executions in the cloud. Based on different targets, we propose four heuristic workflow scheduling algorithms for the WFaaS architecture, and analyze the differences and best usages of the algorithms in terms of performance, cost and the price/performance ratio via experimental studies. PMID:29399237

Workflow as a Service in the Cloud: Architecture and Scheduling Algorithms.

Science.gov (United States)

Wang, Jianwu; Korambath, Prakashan; Altintas, Ilkay; Davis, Jim; Crawl, Daniel

2014-01-01

With more and more workflow systems adopting cloud as their execution environment, it becomes increasingly challenging on how to efficiently manage various workflows, virtual machines (VMs) and workflow execution on VM instances. To make the system scalable and easy-to-extend, we design a Workflow as a Service (WFaaS) architecture with independent services. A core part of the architecture is how to efficiently respond continuous workflow requests from users and schedule their executions in the cloud. Based on different targets, we propose four heuristic workflow scheduling algorithms for the WFaaS architecture, and analyze the differences and best usages of the algorithms in terms of performance, cost and the price/performance ratio via experimental studies.

TCP-Call Admission Control Interaction in Multiplatform Space Architectures

Directory of Open Access Journals (Sweden)

Georgios Theodoridis

2007-06-01

Full Text Available The implementation of efficient call admission control (CAC algorithms is useful to prevent congestion and guarantee target quality of service (QoS. When TCP protocol is adopted, some inefficiencies can arise due to the peculiar evolution of the congestion window. The development of cross-layer techniques can greatly help to improve efficiency and flexibility for wireless networks. In this frame, the present paper addresses the introduction of TCP feedback into the CAC procedures in different nonterrestrial wireless architectures. CAC performance improvement is shown for different space-based architectures, including both satellites and high altitude platform (HAP systems.

TCP-Call Admission Control Interaction in Multiplatform Space Architectures

Directory of Open Access Journals (Sweden)

Roseti Cesare

2007-01-01

Full Text Available The implementation of efficient call admission control (CAC algorithms is useful to prevent congestion and guarantee target quality of service (QoS. When TCP protocol is adopted, some inefficiencies can arise due to the peculiar evolution of the congestion window. The development of cross-layer techniques can greatly help to improve efficiency and flexibility for wireless networks. In this frame, the present paper addresses the introduction of TCP feedback into the CAC procedures in different nonterrestrial wireless architectures. CAC performance improvement is shown for different space-based architectures, including both satellites and high altitude platform (HAP systems.

Information architecture for a planetary 'exploration web'

Science.gov (United States)

Lamarra, N.; McVittie, T.

2002-01-01

'Web services' is a common way of deploying distributed applications whose software components and data sources may be in different locations, formats, languages, etc. Although such collaboration is not utilized significantly in planetary exploration, we believe there is significant benefit in developing an architecture in which missions could leverage each others capabilities. We believe that an incremental deployment of such an architecture could significantly contribute to the evolution of increasingly capable, efficient, and even autonomous remote exploration.

Hybrid architecture for building secure sensor networks

Science.gov (United States)

Owens, Ken R., Jr.; Watkins, Steve E.

2012-04-01

Sensor networks have various communication and security architectural concerns. Three approaches are defined to address these concerns for sensor networks. The first area is the utilization of new computing architectures that leverage embedded virtualization software on the sensor. Deploying a small, embedded virtualization operating system on the sensor nodes that is designed to communicate to low-cost cloud computing infrastructure in the network is the foundation to delivering low-cost, secure sensor networks. The second area focuses on securing the sensor. Sensor security components include developing an identification scheme, and leveraging authentication algorithms and protocols that address security assurance within the physical, communication network, and application layers. This function will primarily be accomplished through encrypting the communication channel and integrating sensor network firewall and intrusion detection/prevention components to the sensor network architecture. Hence, sensor networks will be able to maintain high levels of security. The third area addresses the real-time and high priority nature of the data that sensor networks collect. This function requires that a quality-of-service (QoS) definition and algorithm be developed for delivering the right data at the right time. A hybrid architecture is proposed that combines software and hardware features to handle network traffic with diverse QoS requirements.

Architectural and structural qualities in timber joints

DEFF Research Database (Denmark)

Christensen, Jesper Thøger; Christensen, Mogens Fiil; Damkilde, Lars

2016-01-01

Design of joints in timber structures is crucial to reach both elegant and structural efficient designs. Design of joints should therefore be an integral part of the conceptual design phase. Traditionally this is not the case, and joints are often solely designed and analysed in the engineering...... but also increase timbers competitiveness in the building industry. The paper is part of an ongoing research project aiming at providing tools for an integrated design process for timber structures. The focus of the paper is to identify how structure and its joints contributes to architecture and vice...... design phase. The result is joints that function structurally but do not add value to the design, and may even compromise the architectural ideas. With an approach, integrating both structural and architectural design from the beginning, one should not only gain better structures and architecture...

High-performance full adder architecture in quantum-dot cellular automata

Directory of Open Access Journals (Sweden)

Hamid Rashidi

2017-06-01

Full Text Available Quantum-dot cellular automata (QCA is a new and promising computation paradigm, which can be a viable replacement for the complementary metal–oxide–semiconductor technology at nano-scale level. This technology provides a possible solution for improving the computation in various computational applications. Two QCA full adder architectures are presented and evaluated: a new and efficient 1-bit QCA full adder architecture and a 4-bit QCA ripple carry adder (RCA architecture. The proposed architectures are simulated using QCADesigner tool version 2.0.1. These architectures are implemented with the coplanar crossover approach. The simulation results show that the proposed 1-bit QCA full adder and 4-bit QCA RCA architectures utilise 33 and 175 QCA cells, respectively. Our simulation results show that the proposed architectures outperform most results so far in the literature.

R-GPU : A reconfigurable GPU architecture

NARCIS (Netherlands)

van den Braak, G.J.; Corporaal, H.

2016-01-01

Over the last decade, Graphics Processing Unit (GPU) architectures have evolved from a fixed-function graphics pipeline to a programmable, energy-efficient compute accelerator for massively parallel applications. The compute power arises from the GPU's Single Instruction/Multiple Threads

A heterogeneous hierarchical architecture for real-time computing

Energy Technology Data Exchange (ETDEWEB)

Skroch, D.A.; Fornaro, R.J.

1988-12-01

The need for high-speed data acquisition and control algorithms has prompted continued research in the area of multiprocessor systems and related programming techniques. The result presented here is a unique hardware and software architecture for high-speed real-time computer systems. The implementation of a prototype of this architecture has required the integration of architecture, operating systems and programming languages into a cohesive unit. This report describes a Heterogeneous Hierarchial Architecture for Real-Time (H{sup 2} ART) and system software for program loading and interprocessor communication.

High Efficiency, Illumination Quality OLEDs for Lighting

Energy Technology Data Exchange (ETDEWEB)

Joseph Shiang; James Cella; Kelly Chichak; Anil Duggal; Kevin Janora; Chris Heller; Gautam Parthasarathy; Jeffery Youmans; Joseph Shiang

2008-03-31

The goal of the program was to demonstrate a 45 lumen per watt white light device based upon the use of multiple emission colors through the use of solution processing. This performance level is a dramatic extension of the team's previous 15 LPW large area illumination device. The fundamental material system was based upon commercial polymer materials. The team was largely able to achieve these goals, and was able to deliver to DOE a 90 lumen illumination source that had an average performance of 34 LPW a 1000 cd/m{sup 2} with peak performances near 40LPW. The average color temperature is 3200K and the calculated CRI 85. The device operated at a brightness of approximately 1000cd/m{sup 2}. The use of multiple emission colors particularly red and blue, provided additional degrees of design flexibility in achieving white light, but also required the use of a multilayered structure to separate the different recombination zones and prevent interconversion of blue emission to red emission. The use of commercial materials had the advantage that improvements by the chemical manufacturers in charge transport efficiency, operating life and material purity could be rapidly incorporated without the expenditure of additional effort. The program was designed to take maximum advantage of the known characteristics of these material and proceeded in seven steps. (1) Identify the most promising materials, (2) assemble them into multi-layer structures to control excitation and transport within the OLED, (3) identify materials development needs that would optimize performance within multilayer structures, (4) build a prototype that demonstrates the potential entitlement of the novel multilayer OLED architecture (5) integrate all of the developments to find the single best materials set to implement the novel multilayer architecture, (6) further optimize the best materials set, (7) make a large area high illumination quality white OLED. A photo of the final deliverable is shown

Hadoop Oriented Smart Cities Architecture

Science.gov (United States)

Bologa, Ana-Ramona; Bologa, Razvan

2018-01-01

A smart city implies a consistent use of technology for the benefit of the community. As the city develops over time, components and subsystems such as smart grids, smart water management, smart traffic and transportation systems, smart waste management systems, smart security systems, or e-governance are added. These components ingest and generate a multitude of structured, semi-structured or unstructured data that may be processed using a variety of algorithms in batches, micro batches or in real-time. The ICT architecture must be able to handle the increased storage and processing needs. When vertical scaling is no longer a viable solution, Hadoop can offer efficient linear horizontal scaling, solving storage, processing, and data analyses problems in many ways. This enables architects and developers to choose a stack according to their needs and skill-levels. In this paper, we propose a Hadoop-based architectural stack that can provide the ICT backbone for efficiently managing a smart city. On the one hand, Hadoop, together with Spark and the plethora of NoSQL databases and accompanying Apache projects, is a mature ecosystem. This is one of the reasons why it is an attractive option for a Smart City architecture. On the other hand, it is also very dynamic; things can change very quickly, and many new frameworks, products and options continue to emerge as others decline. To construct an optimized, modern architecture, we discuss and compare various products and engines based on a process that takes into consideration how the products perform and scale, as well as the reusability of the code, innovations, features, and support and interest in online communities. PMID:29649172

Hadoop Oriented Smart Cities Architecture

Directory of Open Access Journals (Sweden)

Vlad Diaconita

2018-04-01

Full Text Available A smart city implies a consistent use of technology for the benefit of the community. As the city develops over time, components and subsystems such as smart grids, smart water management, smart traffic and transportation systems, smart waste management systems, smart security systems, or e-governance are added. These components ingest and generate a multitude of structured, semi-structured or unstructured data that may be processed using a variety of algorithms in batches, micro batches or in real-time. The ICT architecture must be able to handle the increased storage and processing needs. When vertical scaling is no longer a viable solution, Hadoop can offer efficient linear horizontal scaling, solving storage, processing, and data analyses problems in many ways. This enables architects and developers to choose a stack according to their needs and skill-levels. In this paper, we propose a Hadoop-based architectural stack that can provide the ICT backbone for efficiently managing a smart city. On the one hand, Hadoop, together with Spark and the plethora of NoSQL databases and accompanying Apache projects, is a mature ecosystem. This is one of the reasons why it is an attractive option for a Smart City architecture. On the other hand, it is also very dynamic; things can change very quickly, and many new frameworks, products and options continue to emerge as others decline. To construct an optimized, modern architecture, we discuss and compare various products and engines based on a process that takes into consideration how the products perform and scale, as well as the reusability of the code, innovations, features, and support and interest in online communities.

Hadoop Oriented Smart Cities Architecture.

Science.gov (United States)

Diaconita, Vlad; Bologa, Ana-Ramona; Bologa, Razvan

2018-04-12

A smart city implies a consistent use of technology for the benefit of the community. As the city develops over time, components and subsystems such as smart grids, smart water management, smart traffic and transportation systems, smart waste management systems, smart security systems, or e-governance are added. These components ingest and generate a multitude of structured, semi-structured or unstructured data that may be processed using a variety of algorithms in batches, micro batches or in real-time. The ICT architecture must be able to handle the increased storage and processing needs. When vertical scaling is no longer a viable solution, Hadoop can offer efficient linear horizontal scaling, solving storage, processing, and data analyses problems in many ways. This enables architects and developers to choose a stack according to their needs and skill-levels. In this paper, we propose a Hadoop-based architectural stack that can provide the ICT backbone for efficiently managing a smart city. On the one hand, Hadoop, together with Spark and the plethora of NoSQL databases and accompanying Apache projects, is a mature ecosystem. This is one of the reasons why it is an attractive option for a Smart City architecture. On the other hand, it is also very dynamic; things can change very quickly, and many new frameworks, products and options continue to emerge as others decline. To construct an optimized, modern architecture, we discuss and compare various products and engines based on a process that takes into consideration how the products perform and scale, as well as the reusability of the code, innovations, features, and support and interest in online communities.

A Novel and Efficient Hardware Implementation of Scalar Point Multiplier

Directory of Open Access Journals (Sweden)

M. Masoumi

2012-12-01

Full Text Available A new and highly efficient architecture for elliptic curve scalar point multiplication is presented. To achieve the maximum architectural and timing improvements we have reorganized and reordered the critical path of the Lopez-Dahab scalar point multiplication architecture such that logic structures are implemented in parallel and operations in the critical path are diverted to noncritical paths. The results we obtained show that with G = 55 our proposed design is able to compute GF(2163 elliptic curve scalar multiplication in 9.6 μs with the maximum achievable frequency of 250 MHz on Xilinx Virtex-4 (XC4VLX200, where G is the digit size of the underlying digit-serial finite field multiplier. Another implementation variant for less resource consumption is also proposed. With G=33, the design performs the same operation in 11.6 μs at 263 MHz on the same platform. The results of synthesis show that in the first implementation 17929 slices or 20% of the chip area is occupied which makes it suitable for speed critical cryptographic applications while in the second implementation 14203 slices or 16% of the chip area is utilized which makes it suitable for applications that may require speed-area trade-off. The new design shows superior performance compared to the previously reported designs.

Framework for Architecture Trade Study Using MBSE and Performance Simulation

Science.gov (United States)

Ryan, Jessica; Sarkani, Shahram; Mazzuchim, Thomas

2012-01-01

Increasing complexity in modern systems as well as cost and schedule constraints require a new paradigm of system engineering to fulfill stakeholder needs. Challenges facing efficient trade studies include poor tool interoperability, lack of simulation coordination (design parameters) and requirements flowdown. A recent trend toward Model Based System Engineering (MBSE) includes flexible architecture definition, program documentation, requirements traceability and system engineering reuse. As a new domain MBSE still lacks governing standards and commonly accepted frameworks. This paper proposes a framework for efficient architecture definition using MBSE in conjunction with Domain Specific simulation to evaluate trade studies. A general framework is provided followed with a specific example including a method for designing a trade study, defining candidate architectures, planning simulations to fulfill requirements and finally a weighted decision analysis to optimize system objectives.

Advanced pixel architectures for scientific image sensors

CERN Document Server

Coath, R; Godbeer, A; Wilson, M; Turchetta, R

2009-01-01

We present recent developments from two projects targeting advanced pixel architectures for scientific applications. Results are reported from FORTIS, a sensor demonstrating variants on a 4T pixel architecture. The variants include differences in pixel and diode size, the in-pixel source follower transistor size and the capacitance of the readout node to optimise for low noise and sensitivity to small amounts of charge. Results are also reported from TPAC, a complex pixel architecture with ~160 transistors per pixel. Both sensors were manufactured in the 0.18μm INMAPS process, which includes a special deep p-well layer and fabrication on a high resistivity epitaxial layer for improved charge collection efficiency.

Efficiency of a protected-area network in a Mediterranean region: a multispecies assessment with raptors.

Science.gov (United States)

Abellán, María D; Martínez, José E; Palazón, José A; Esteve, Miguel A; Calvo, José F

2011-05-01

Three different systems of designating protected areas in a Mediterranean region in southeastern Spain were studied, referring to their effectiveness and efficiency for protecting both the breeding territories and the suitable habitat of a set of ten raptor species. Taking into consideration the varying degrees of endangerment of these species, a map of multispecies conservation values was also drawn up and superimposed on the three protected-area systems studied. In order to compare the levels of protection afforded by the three systems, we considered two indices that measured their relative effectiveness and efficiency. The effectiveness estimated the proportion of territories or optimal habitat protected by the networks while efficiency implicitly considered the area of each system (percentage of breeding territories or optimal habitat protected per 1% of land protected). Overall, our results showed that the most efficient system was that formed by the set of regional parks and reserves (17 protected breeding territories per 100 km²), although, given its small total area, it was by far the least effective (only protecting the 21% of the breeding territories of all species and 17% of the area of high conservation value). The systems formed by the Special Protection Areas (designated under the EU "Birds Directive") and by the Special Conservation Areas (designated under the EU "Habitats Directive") notably increased the percentages of protected territories of all species (61%) and area of high conservation value (57%), but their efficiency was not as high as expected in most cases. The overall level of protection was high for all species except for the Lesser Kestrel (Falco naumanni), an endangered falcon that inhabits pseudo-steppe and traditional agricultural habitats, which are clearly underrepresented in the protected-area network of the study region.

Efficiency of a Protected-Area Network in a Mediterranean Region: A Multispecies Assessment with Raptors

Science.gov (United States)

Abellán, María D.; Martínez, José E.; Palazón, José A.; Esteve, Miguel Á.; Calvo, José F.

2011-05-01

Three different systems of designating protected areas in a Mediterranean region in southeastern Spain were studied, referring to their effectiveness and efficiency for protecting both the breeding territories and the suitable habitat of a set of ten raptor species. Taking into consideration the varying degrees of endangerment of these species, a map of multispecies conservation values was also drawn up and superimposed on the three protected-area systems studied. In order to compare the levels of protection afforded by the three systems, we considered two indices that measured their relative effectiveness and efficiency. The effectiveness estimated the proportion of territories or optimal habitat protected by the networks while efficiency implicitly considered the area of each system (percentage of breeding territories or optimal habitat protected per 1% of land protected). Overall, our results showed that the most efficient system was that formed by the set of regional parks and reserves (17 protected breeding territories per 100 km2), although, given its small total area, it was by far the least effective (only protecting the 21% of the breeding territories of all species and 17% of the area of high conservation value). The systems formed by the Special Protection Areas (designated under the EU "Birds Directive") and by the Special Conservation Areas (designated under the EU "Habitats Directive") notably increased the percentages of protected territories of all species (61%) and area of high conservation value (57%), but their efficiency was not as high as expected in most cases. The overall level of protection was high for all species except for the Lesser Kestrel ( Falco naumanni), an endangered falcon that inhabits pseudo-steppe and traditional agricultural habitats, which are clearly underrepresented in the protected-area network of the study region.

An Integrated Hybrid Transportation Architecture for Human Mars Expeditions

Science.gov (United States)

Merrill, Raymond G.; Chai, Patrick R.; Qu, Min

2015-01-01

NASA's Human Spaceflight Architecture Team is developing a reusable hybrid transportation architecture that uses both chemical and electric propulsion systems on the same vehicle to send crew and cargo to Mars destinations such as Phobos, Deimos, the surface of Mars, and other orbits around Mars. By applying chemical and electrical propulsion where each is most effective, the hybrid architecture enables a series of Mars trajectories that are more fuel-efficient than an all chemical architecture without significant increases in flight times. This paper presents an integrated Hybrid in-space transportation architecture for piloted missions and delivery of cargo. A concept for a Mars campaign including orbital and Mars surface missions is described in detail including a system concept of operations and conceptual design. Specific constraints, margin, and pinch points are identified for the architecture and opportunities for critical path commercial and international collaboration are discussed.

A Smart Gateway Architecture for Improving Efficiency of Home Network Applications

Directory of Open Access Journals (Sweden)

Fei Ding

2016-01-01

Full Text Available A smart home gateway plays an important role in the Internet of Things (IoT system that takes responsibility for the connection between the network layer and the ubiquitous sensor network (USN layer. Even though the home network application is developing rapidly, researches on the home gateway based open development architecture are less. This makes it difficult to extend the home network to support new applications, share service, and interoperate with other home network systems. An integrated access gateway (IAGW is proposed in this paper which upward connects with the operator machine-to-machine platform (M2M P/F. In this home network scheme, the gateway provides standard interfaces for supporting various applications in home environments, ranging from on-site configuration to node and service access. In addition, communication management ability is also provided by M2M P/F. A testbed of a simple home network application system that includes the IAGW prototype is created to test its user interaction capabilities. Experimental results show that the proposed gateway provides significant flexibility for users to configure and deploy a home automation network; it can be applied to other monitoring areas and simultaneously supports a multi-ubiquitous sensor network.

Aerobot Autonomy Architecture

Science.gov (United States)

Elfes, Alberto; Hall, Jeffery L.; Kulczycki, Eric A.; Cameron, Jonathan M.; Morfopoulos, Arin C.; Clouse, Daniel S.; Montgomery, James F.; Ansar, Adnan I.; Machuzak, Richard J.

2009-01-01

An architecture for autonomous operation of an aerobot (i.e., a robotic blimp) to be used in scientific exploration of planets and moons in the Solar system with an atmosphere (such as Titan and Venus) is undergoing development. This architecture is also applicable to autonomous airships that could be flown in the terrestrial atmosphere for scientific exploration, military reconnaissance and surveillance, and as radio-communication relay stations in disaster areas. The architecture was conceived to satisfy requirements to perform the following functions: a) Vehicle safing, that is, ensuring the integrity of the aerobot during its entire mission, including during extended communication blackouts. b) Accurate and robust autonomous flight control during operation in diverse modes, including launch, deployment of scientific instruments, long traverses, hovering or station-keeping, and maneuvers for touch-and-go surface sampling. c) Mapping and self-localization in the absence of a global positioning system. d) Advanced recognition of hazards and targets in conjunction with tracking of, and visual servoing toward, targets, all to enable the aerobot to detect and avoid atmospheric and topographic hazards and to identify, home in on, and hover over predefined terrain features or other targets of scientific interest. The architecture is an integrated combination of systems for accurate and robust vehicle and flight trajectory control; estimation of the state of the aerobot; perception-based detection and avoidance of hazards; monitoring of the integrity and functionality ("health") of the aerobot; reflexive safing actions; multi-modal localization and mapping; autonomous planning and execution of scientific observations; and long-range planning and monitoring of the mission of the aerobot. The prototype JPL aerobot (see figure) has been tested extensively in various areas in the California Mojave desert.

Analysis OpenMP performance of AMD and Intel architecture for breaking waves simulation using MPS

Science.gov (United States)

Alamsyah, M. N. A.; Utomo, A.; Gunawan, P. H.

2018-03-01

Simulation of breaking waves by using Navier-Stokes equation via moving particle semi-implicit method (MPS) over close domain is given. The results show the parallel computing on multicore architecture using OpenMP platform can reduce the computational time almost half of the serial time. Here, the comparison using two computer architectures (AMD and Intel) are performed. The results using Intel architecture is shown better than AMD architecture in CPU time. However, in efficiency, the computer with AMD architecture gives slightly higher than the Intel. For the simulation by 1512 number of particles, the CPU time using Intel and AMD are 12662.47 and 28282.30 respectively. Moreover, the efficiency using similar number of particles, AMD obtains 50.09 % and Intel up to 49.42 %.

Compact FPGA hardware architecture for public key encryption in embedded devices.

Science.gov (United States)

Rodríguez-Flores, Luis; Morales-Sandoval, Miguel; Cumplido, René; Feregrino-Uribe, Claudia; Algredo-Badillo, Ignacio

2018-01-01

Security is a crucial requirement in the envisioned applications of the Internet of Things (IoT), where most of the underlying computing platforms are embedded systems with reduced computing capabilities and energy constraints. In this paper we present the design and evaluation of a scalable low-area FPGA hardware architecture that serves as a building block to accelerate the costly operations of exponentiation and multiplication in [Formula: see text], commonly required in security protocols relying on public key encryption, such as in key agreement, authentication and digital signature. The proposed design can process operands of different size using the same datapath, which exhibits a significant reduction in area without loss of efficiency if compared to representative state of the art designs. For example, our design uses 96% less standard logic than a similar design optimized for performance, and 46% less resources than other design optimized for area. Even using fewer area resources, our design still performs better than its embedded software counterparts (190x and 697x).

Efficiency of protected areas in Amazon and Atlantic Forest conservation: A spatio-temporal view

Science.gov (United States)

Sobral-Souza, Thadeu; Vancine, Maurício Humberto; Ribeiro, Milton Cezar; Lima-Ribeiro, Matheus S.

2018-02-01

The Amazon and Atlantic Forest are considered the world's most biodiverse biomes. Human and climate change impacts are the principal drivers of species loss in both biomes, more severely in the Atlantic Forest. In response to species loss, the main conservation action is the creation of protected areas (PAs). Current knowledge and research on the PA network's conservation efficiency is scarce, and existing studies have mainly considered a past temporal view. In this study, we tested the efficiency of the current PA network to maintain climatically stable areas (CSAs) across the Amazon and Atlantic Forest. To this, we used an ecological niche modeling approach to biome and paleoclimatic simulations. We propose three categories of conservation priority areas for both biomes, considering CSAs, PAs and intact forest remnants. The biomes vary in their respective PA networks' protection efficiency. Regarding protect CSAs, the Amazon PA network is four times more efficient than the Atlantic Forest PA network. New conservation efforts in these two forest biomes require different approaches. We discussed the conservation actions that should be taken in each biome to increase the efficiency of the PA network, considering both the creation and expansion of PAs as well as restoration programs.

High-efficiency dynamic routing architecture for the readout of single photon avalanche diode arrays in time-correlated measurements

Science.gov (United States)

Cominelli, A.; Acconcia, G.; Peronio, P.; Rech, I.; Ghioni, M.

2017-05-01

transfer rate towards the elaboration unit. We developed a novel readout architecture, starting from a completely different perspective: considering the maximum data rate we can manage with a PC, a limited set of conversion data is selected and transferred to the elaboration unit during each excitation period, in order to take full advantage of the bus bandwidth toward the PC. In particular, we introduce a smart routing logic, able to dynamically connect a large number of SPAD detectors to a limited set of high-performance external acquisition chains, paving the way for a more efficient use of resources and allowing us to effectively break the tradeoff between integration and performance, which affects the solutions proposed so far. The routing electronic features a pixelated architecture, while 3D-stacking techniques are exploited to connect each SPAD to its dedicated electronic, leading to a minimization of the overall number of interconnections crossing the integrated system, which is one of the main issues in high-density arrays.

Architecture: Borders, manifestos, utopian visions: Retrospection at the eleventh Venice Biennale

Directory of Open Access Journals (Sweden)

Čarapić Ana

2009-01-01

Full Text Available Architecture in-between vision and reality, as a way of presenting critical alternatives to the built environment, open to possibilities beyond the everyday, encourage experimentation with the 11th International Architecture Exhibition. Experiments in architecture that do not solve problems, but articulate and think of them, challenge the reality referring to art, film technologies and landscape and lead to the place where utopia and practice converge. Architecture that is separated from the progression of styles and demands of functional efficiency or contextual silence is the theme of Biennale di Venezia.

Facile Preparation of TiO2 Nanobranch/Nanoparticle Hybrid Architecture with Enhanced Light Harvesting Properties for Dye-Sensitized Solar Cells

Directory of Open Access Journals (Sweden)

Ju Seong Kim

2015-01-01

Full Text Available We report TiO2 nanobranches/nanoparticles (NBN hybrid architectures that can be synthesized by a facile solution phase method. The hybrid architecture simultaneously improves light harvesting and charge collection performances for a dye-sensitized solar cell. First, TiO2 nanorods with a trunk length of 2 μm were grown on a fluorine-doped tin oxide (FTO/glass substrate, and then nanobranches and nanoparticles were deposited on the nanorods’ trunks through a solution method using an aqueous TiCl3 solution at 80°C. The relative amount of nanobranches and nanoparticles can be controlled by multiplying the number of TiCl3 treatments to maximize the amount of surface area. We found that the resultant TiO2 NBN hybrid architecture greatly improves the amount of dye adsorption (five times compared to bare nanorods due to the enhanced surface area, while maintaining a fast charge collection, leading to a three times higher current density and thus tripling the maximum power conversion efficiency for a dye-sensitized solar cell.

A Hybrid Power Management (HPM) Based Vehicle Architecture

Science.gov (United States)

Eichenberg, Dennis J.

2011-01-01

Society desires vehicles with reduced fuel consumption and reduced emissions. This presents a challenge and an opportunity for industry and the government. The NASA John H. Glenn Research Center (GRC) has developed a Hybrid Power Management (HPM) based vehicle architecture for space and terrestrial vehicles. GRC's Electrical and Electromagnetics Branch of the Avionics and Electrical Systems Division initiated the HPM Program for the GRC Technology Transfer and Partnership Office. HPM is the innovative integration of diverse, state-of-the-art power devices in an optimal configuration for space and terrestrial applications. The appropriate application and control of the various power devices significantly improves overall system performance and efficiency. The basic vehicle architecture consists of a primary power source, and possibly other power sources, providing all power to a common energy storage system, which is used to power the drive motors and vehicle accessory systems, as well as provide power as an emergency power system. Each component is independent, permitting it to be optimized for its intended purpose. This flexible vehicle architecture can be applied to all vehicles to considerably improve system efficiency, reliability, safety, security, and performance. This unique vehicle architecture has the potential to alleviate global energy concerns, improve the environment, stimulate the economy, and enable new missions.

Exploring Hardware-Based Primitives to Enhance Parallel Security Monitoring in a Novel Computing Architecture

National Research Council Canada - National Science Library

Mott, Stephen

2007-01-01

.... In doing this, we propose a novel computing architecture, derived from a contemporary shared memory architecture, that facilitates efficient security-related monitoring in real-time, while keeping...

Sustainable architecture in the traditional Iranian homes

Energy Technology Data Exchange (ETDEWEB)

Rezaei, Davood; Niloufari, Morteza; Sadegh Falahat, Mohammad [Zanjan University (Iran, Islamic Republic of)], email: d_rezaei@znu.ac.ir, email: mortezagharibeh@yahoo.com, email: safalahat@yahoo.com

2011-07-01

With the coming shortage of fossil fuels it is important to develop energy efficient buildings to reduce both energy consumption and pollution at the same time. In Iran, traditional homes have been built in a sustainable manner to withstand the high climate diversity of the country. The aim of this paper is to present the different methods used in Iranian traditional architecture. Among the architectural principles is appropriate orientation of the building to allow the capture of solar energy and at the same time protect against the cold wind. In addition, indigenous materials were used in the constructions to provide the highest degree of comfort possible with minimal damage to the environment. Finally, Iranian traditional architecture took advantage of the soil's constant temperature by building a Shvadan which is an underground space beneath the house. This article highlighted the different Iranian traditional methods which can create a sustainable architecture.

On Architectural Qualities and Tactics for Mobile Sensing

DEFF Research Database (Denmark)

Kjærgaard, Mikkel Baun; Kuhrmann, Marco

2015-01-01

the respective tactics to particular cases illustrating their use in practice. Finally, we provide a preliminary validation of the proposed systematized tactics catalog, which was conducted with student teams. Our preliminary findings show that the tactics are beneficial to provide a guideline and to create...... challenges regarding, e.g., use of battery powered mobile devices, and collection and processing of sensor data. In this paper, we present tactics to address these architecture design challenges. We discuss the two architectural qualities energy efficiency and resource adaptability, and describe them using...... general scenario-generation tables to support the systematic specification of architecture requirements. Furthermore, we develop a catalog of architectural tactics distilled from literature to enable developers to systematically apply proven methods. For each tactic, we provide examples to relate...

Emulation of Neural Networks on a Nanoscale Architecture

International Nuclear Information System (INIS)

Eshaghian-Wilner, Mary M; Friesz, Aaron; Khitun, Alex; Navab, Shiva; Parker, Alice C; Wang, Kang L; Zhou, Chongwu

2007-01-01

In this paper, we propose using a nanoscale spin-wave-based architecture for implementing neural networks. We show that this architecture can efficiently realize highly interconnected neural network models such as the Hopfield model. In our proposed architecture, no point-to-point interconnection is required, so unlike standard VLSI design, no fan-in/fan-out constraint limits the interconnectivity. Using spin-waves, each neuron could broadcast to all other neurons simultaneously and similarly a neuron could concurrently receive and process multiple data. Therefore in this architecture, the total weighted sum to each neuron can be computed by the sum of the values from all the incoming waves to that neuron. In addition, using the superposition property of waves, this computation can be done in O(1) time, and neurons can update their states quite rapidly

ReNoC: A Network-on-Chip Architecture with Reconfigurable Topology

DEFF Research Database (Denmark)

Stensgaard, Mikkel Bystrup; Sparsø, Jens

2008-01-01

links and direct links between IP-blocks. The configurability is inserted as a layer between routers and links, and the architecture can therefore be used in combination with existing NoC routers, making it a general architecture. The topology is configured using energy-efficient topology switches based...

A Potential Transmitter Architecture for Future Generation Green Wireless Base Station

Directory of Open Access Journals (Sweden)

Mike Faulkner

2009-01-01

Full Text Available Current radio frequency power amplifiers in 3G base stations have very high power consumption leading to a hefty cost and negative environmental impact. In this paper, we propose a potential architecture design for future wireless base station. Issues associated with components of the architecture are investigated. The all-digital transmitter architecture uses a combination of envelope elimination and restoration (EER and pulse width modulation (PWM/pulse position modulation (PPM modulation. The performance of this architecture is predicted from the measured output power and efficiency curves of a GaN amplifier. 57% efficiency is obtained for an OFDM signal limited to 8 dB peak to average power ratio. The PWM/PPM drive signal is generated using the improved Cartesian sigma delta techniques. It is shown that an RF oversampling by a factor of four meets the WLAN spectral mask, and WCDMA specification is met by an RF oversampling of sixteen.

A Potential Transmitter Architecture for Future Generation Green Wireless Base Station

Directory of Open Access Journals (Sweden)

Cijvat Ellie

2009-01-01

Full Text Available Abstract Current radio frequency power amplifiers in 3G base stations have very high power consumption leading to a hefty cost and negative environmental impact. In this paper, we propose a potential architecture design for future wireless base station. Issues associated with components of the architecture are investigated. The all-digital transmitter architecture uses a combination of envelope elimination and restoration (EER and pulse width modulation (PWM/pulse position modulation (PPM modulation. The performance of this architecture is predicted from the measured output power and efficiency curves of a GaN amplifier. 57% efficiency is obtained for an OFDM signal limited to 8 dB peak to average power ratio. The PWM/PPM drive signal is generated using the improved Cartesian sigma delta techniques. It is shown that an RF oversampling by a factor of four meets the WLAN spectral mask, and WCDMA specification is met by an RF oversampling of sixteen.

FPGA implementation of bit controller in double-tick architecture

Science.gov (United States)

Kobylecki, Michał; Kania, Dariusz

2017-11-01

This paper presents a comparison of the two original architectures of programmable bit controllers built on FPGAs. Programmable Logic Controllers (which include, among other things programmable bit controllers) built on FPGAs provide a efficient alternative to the controllers based on microprocessors which are expensive and often too slow. The presented and compared methods allow for the efficient implementation of any bit control algorithm written in Ladder Diagram language into the programmable logic system in accordance with IEC61131-3. In both cases, we have compared the effect of the applied architecture on the performance of executing the same bit control program in relation to its own size.

An Architecture Design Project: "Building" Understanding

Science.gov (United States)

Bush, Sarah B.; Albanese, Judith; Karp, Karen S.; Karp, Matthew

2017-01-01

Middle school students need relevant, meaningful contexts to apply emerging mathematical ideas. In this project, through the context of an architecture investigation, seventh-grade students engaged in mathematics involving area, surface area, volume, ratios and proportional thinking, number sense, and technology integration. Students, working in…

2005 dossier: granite. Tome: architecture and management of the geologic disposal

International Nuclear Information System (INIS)

2005-01-01

This document makes a status of the researches carried out by the French national agency of radioactive wastes (ANDRA) about the geologic disposal of high-level and long-lived radioactive wastes in granite formations. Content: 1 - Approach of the study: main steps since the December 30, 1991 law, ANDRA's research program on disposal in granitic formations; 2 - high-level and long-lived (HLLL) wastes: production scenarios, waste categories, inventory model; 3 - disposal facility design in granitic environment: definition of the geologic disposal functions, the granitic material, general facility design options; 4 - general architecture of a disposal facility in granitic environment: surface facilities, underground facilities, disposal process, operational safety; 5 - B-type wastes disposal area: primary containers of B-type wastes, safety options, concrete containers, disposal alveoles, architecture of the B-type wastes disposal area, disposal process and feasibility aspects, functions of disposal components with time; 6 - C-type wastes disposal area: C-type wastes primary containers, safety options, super-containers, disposal alveoles, architecture of the C-type wastes disposal area, disposal process in a reversibility logics, functions of disposal components with time; 7 - spent fuels disposal area: spent fuel assemblies, safety options, spent fuel containers, disposal alveoles, architecture of the spent fuel disposal area, disposal process in a reversibility logics, functions of disposal components with time; 8 - conclusions: suitability of the architecture with various types of French granites, strong design, reversibility taken into consideration. (J.S.)

Leaf area and light use efficiency patterns of Norway spruce under different thinning regimes and age classes

Science.gov (United States)

Gspaltl, Martin; Bauerle, William; Binkley, Dan; Sterba, Hubert

2013-01-01

Silviculture focuses on establishing forest stand conditions that improve the stand increment. Knowledge about the efficiency of an individual tree is essential to be able to establish stand structures that increase tree resource use efficiency and stand level production. Efficiency is often expressed as stem growth per unit leaf area (leaf area efficiency), or per unit of light absorbed (light use efficiency). We tested the hypotheses that: (1) volume increment relates more closely with crown light absorption than leaf area, since one unit of leaf area can receive different amounts of light due to competition with neighboring trees and self-shading, (2) dominant trees use light more efficiently than suppressed trees and (3) thinning increases the efficiency of light use by residual trees, partially accounting for commonly observed increases in post-thinning growth. We investigated eight even-aged Norway spruce (Picea abies (L.) Karst.) stands at Bärnkopf, Austria, spanning three age classes (mature, immature and pole-stage) and two thinning regimes (thinned and unthinned). Individual leaf area was calculated with allometric equations and absorbed photosynthetically active radiation was estimated for each tree using the three-dimensional crown model Maestra. Absorbed photosynthetically active radiation was only a slightly better predictor of volume increment than leaf area. Light use efficiency increased with increasing tree size in all stands, supporting the second hypothesis. At a given tree size, trees from the unthinned plots were more efficient, however, due to generally larger tree sizes in the thinned stands, an average tree from the thinned treatment was superior (not congruent in all plots, thus only partly supporting the third hypothesis). PMID:25540477

Neural codes of seeing architectural styles.

Science.gov (United States)

Choo, Heeyoung; Nasar, Jack L; Nikrahei, Bardia; Walther, Dirk B

2017-01-10

Images of iconic buildings, such as the CN Tower, instantly transport us to specific places, such as Toronto. Despite the substantial impact of architectural design on people's visual experience of built environments, we know little about its neural representation in the human brain. In the present study, we have found patterns of neural activity associated with specific architectural styles in several high-level visual brain regions, but not in primary visual cortex (V1). This finding suggests that the neural correlates of the visual perception of architectural styles stem from style-specific complex visual structure beyond the simple features computed in V1. Surprisingly, the network of brain regions representing architectural styles included the fusiform face area (FFA) in addition to several scene-selective regions. Hierarchical clustering of error patterns further revealed that the FFA participated to a much larger extent in the neural encoding of architectural styles than entry-level scene categories. We conclude that the FFA is involved in fine-grained neural encoding of scenes at a subordinate-level, in our case, architectural styles of buildings. This study for the first time shows how the human visual system encodes visual aspects of architecture, one of the predominant and longest-lasting artefacts of human culture.

Scalable Light Module for Low-Cost, High-Efficiency Light- Emitting Diode Luminaires

Energy Technology Data Exchange (ETDEWEB)

Tarsa, Eric [Cree, Inc., Goleta, CA (United States)

2015-08-31

During this two-year program Cree developed a scalable, modular optical architecture for low-cost, high-efficacy light emitting diode (LED) luminaires. Stated simply, the goal of this architecture was to efficiently and cost-effectively convey light from LEDs (point sources) to broad luminaire surfaces (area sources). By simultaneously developing warm-white LED components and low-cost, scalable optical elements, a high system optical efficiency resulted. To meet program goals, Cree evaluated novel approaches to improve LED component efficacy at high color quality while not sacrificing LED optical efficiency relative to conventional packages. Meanwhile, efficiently coupling light from LEDs into modular optical elements, followed by optimally distributing and extracting this light, were challenges that were addressed via novel optical design coupled with frequent experimental evaluations. Minimizing luminaire bill of materials and assembly costs were two guiding principles for all design work, in the effort to achieve luminaires with significantly lower normalized cost ($/klm) than existing LED fixtures. Chief project accomplishments included the achievement of >150 lm/W warm-white LEDs having primary optics compatible with low-cost modular optical elements. In addition, a prototype Light Module optical efficiency of over 90% was measured, demonstrating the potential of this scalable architecture for ultra-high-efficacy LED luminaires. Since the project ended, Cree has continued to evaluate optical element fabrication and assembly methods in an effort to rapidly transfer this scalable, cost-effective technology to Cree production development groups. The Light Module concept is likely to make a strong contribution to the development of new cost-effective, high-efficacy luminaries, thereby accelerating widespread adoption of energy-saving SSL in the U.S.

Art of Film – A Way of Architectural Communication

Directory of Open Access Journals (Sweden)

Liliana Petrovici

2009-01-01

Full Text Available The art of film, the most popular art of the 20th century, can represent for architecture a means of teaching and promoting its specific values, an inspirational source and a good example of efficient and accessible cultural communication. The architecture presents many resemblances with the world of film regarding the concept and space exploring for communicating some ideas or concepts. Both film and architecture have narrative qualities, work with the world of illusions and representations and compose various elements in order to carry on certain significances. The film makers are making available the suggestive and semantic potential of architecture to render states and attitudes, to outline certain meanings or to emit opinions and comments on political, psychological and social issues.

78 FR 59475 - Architectural Barriers Act Accessibility Guidelines; Outdoor Developed Areas

Science.gov (United States)

2013-09-26

... species; the environment; or archaeological, cultural, historical, or other significant natural features... participate in outdoor recreation activities with their families and friends. The benefits are difficult to... Architectural Barriers Act Guidelines by cross-referencing Appendices C and D.\\5\\ Since these [[Page 59479...

Development of large area, high efficiency amorphous silicon solar cell

Energy Technology Data Exchange (ETDEWEB)

Yoon, K.S.; Kim, S.; Kim, D.W. [Yu Kong Taedok Institute of Technology (Korea, Republic of)

1996-02-01

The objective of the research is to develop the mass-production technologies of high efficiency amorphous silicon solar cells in order to reduce the costs of solar cells and dissemination of solar cells. Amorphous silicon solar cell is the most promising option of thin film solar cells which are relatively easy to reduce the costs. The final goal of the research is to develop amorphous silicon solar cells having the efficiency of 10%, the ratio of light-induced degradation 15% in the area of 1200 cm{sup 2} and test the cells in the form of 2 Kw grid-connected photovoltaic system. (author) 35 refs., 8 tabs., 67 figs.

Softwarization of Mobile Network Functions towards Agile and Energy Efficient 5G Architectures: A Survey

Directory of Open Access Journals (Sweden)

Dlamini Thembelihle

2017-01-01

Full Text Available Future mobile networks (MNs are required to be flexible with minimal infrastructure complexity, unlike current ones that rely on proprietary network elements to offer their services. Moreover, they are expected to make use of renewable energy to decrease their carbon footprint and of virtualization technologies for improved adaptability and flexibility, thus resulting in green and self-organized systems. In this article, we discuss the application of software defined networking (SDN and network function virtualization (NFV technologies towards softwarization of the mobile network functions, taking into account different architectural proposals. In addition, we elaborate on whether mobile edge computing (MEC, a new architectural concept that uses NFV techniques, can enhance communication in 5G cellular networks, reducing latency due to its proximity deployment. Besides discussing existing techniques, expounding their pros and cons and comparing state-of-the-art architectural proposals, we examine the role of machine learning and data mining tools, analyzing their use within fully SDN- and NFV-enabled mobile systems. Finally, we outline the challenges and the open issues related to evolved packet core (EPC and MEC architectures.

Architectural slicing

DEFF Research Database (Denmark)

Christensen, Henrik Bærbak; Hansen, Klaus Marius

2013-01-01

Architectural prototyping is a widely used practice, con- cerned with taking architectural decisions through experiments with light- weight implementations. However, many architectural decisions are only taken when systems are already (partially) implemented. This is prob- lematic in the context...... of architectural prototyping since experiments with full systems are complex and expensive and thus architectural learn- ing is hindered. In this paper, we propose a novel technique for harvest- ing architectural prototypes from existing systems, \\architectural slic- ing", based on dynamic program slicing. Given...... a system and a slicing criterion, architectural slicing produces an architectural prototype that contain the elements in the architecture that are dependent on the ele- ments in the slicing criterion. Furthermore, we present an initial design and implementation of an architectural slicer for Java....

A supportive architecture for CFD-based design optimisation

Science.gov (United States)

Li, Ni; Su, Zeya; Bi, Zhuming; Tian, Chao; Ren, Zhiming; Gong, Guanghong

2014-03-01

Multi-disciplinary design optimisation (MDO) is one of critical methodologies to the implementation of enterprise systems (ES). MDO requiring the analysis of fluid dynamics raises a special challenge due to its extremely intensive computation. The rapid development of computational fluid dynamic (CFD) technique has caused a rise of its applications in various fields. Especially for the exterior designs of vehicles, CFD has become one of the three main design tools comparable to analytical approaches and wind tunnel experiments. CFD-based design optimisation is an effective way to achieve the desired performance under the given constraints. However, due to the complexity of CFD, integrating with CFD analysis in an intelligent optimisation algorithm is not straightforward. It is a challenge to solve a CFD-based design problem, which is usually with high dimensions, and multiple objectives and constraints. It is desirable to have an integrated architecture for CFD-based design optimisation. However, our review on existing works has found that very few researchers have studied on the assistive tools to facilitate CFD-based design optimisation. In the paper, a multi-layer architecture and a general procedure are proposed to integrate different CFD toolsets with intelligent optimisation algorithms, parallel computing technique and other techniques for efficient computation. In the proposed architecture, the integration is performed either at the code level or data level to fully utilise the capabilities of different assistive tools. Two intelligent algorithms are developed and embedded with parallel computing. These algorithms, together with the supportive architecture, lay a solid foundation for various applications of CFD-based design optimisation. To illustrate the effectiveness of the proposed architecture and algorithms, the case studies on aerodynamic shape design of a hypersonic cruising vehicle are provided, and the result has shown that the proposed architecture

Research and Design in Unified Coding Architecture for Smart Grids

Directory of Open Access Journals (Sweden)

Gang Han

2013-09-01

Full Text Available Standardized and sharing information platform is the foundation of the Smart Grids. In order to improve the dispatching center information integration of the power grids and achieve efficient data exchange, sharing and interoperability, a unified coding architecture is proposed. The architecture includes coding management layer, coding generation layer, information models layer and application system layer. Hierarchical design makes the whole coding architecture to adapt to different application environments, different interfaces, loosely coupled requirements, which can realize the integration model management function of the power grids. The life cycle and evaluation method of survival of unified coding architecture is proposed. It can ensure the stability and availability of the coding architecture. Finally, the development direction of coding technology of the Smart Grids in future is prospected.

Real-time field programmable gate array architecture for computer vision

Science.gov (United States)

Arias-Estrada, Miguel; Torres-Huitzil, Cesar

2001-01-01

This paper presents an architecture for real-time generic convolution of a mask and an image. The architecture is intended for fast low-level image processing. The field programmable gate array (FPGA)-based architecture takes advantage of the availability of registers in FPGAs to implement an efficient and compact module to process the convolutions. The architecture is designed to minimize the number of accesses to the image memory and it is based on parallel modules with internal pipeline operation in order to improve its performance. The architecture is prototyped in a FPGA, but it can be implemented on dedicated very- large-scale-integrated devices to reach higher clock frequencies. Complexity issues, FPGA resources utilization, FPGA limitations, and real-time performance are discussed. Some results are presented and discussed.

Facies architecture of the Bluejacket Sandstone in the Eufaula Lake area, Oklahoma: Implications for the reservoir characterization of the Bartlesville Sandstone

Energy Technology Data Exchange (ETDEWEB)

Ye, Liangmiao; Yang, Kexian [Univ. of Tulsa, OK (United States)

1997-08-01

Outcrop studies of the Bluejacket Sandstone (Middle Pennsylvanian) provide significant insights to reservoir architecture of the subsurface equivalent Bartlesville Sandstone. Quarry walls and road cuts in the Lake Eufaula area offer excellent exposures for detailed facies architectural investigations using high-precision surveying, photo mosaics. Directional minipermeameter measurements are being conducted. Subsurface studies include conventional logs, borehole image log, and core data. Reservoir architectures are reconstructed in four hierarchical levels: multi-storey sandstone, i.e. discrete genetic intervals; individual discrete genetic interval; facies within a discrete genetic interval; and lateral accretion bar deposits. In both outcrop and subsurface, the Bluejacket (Bartlesville) Sandstone comprises two distinctive architectures: a lower braided fluvial and an upper meandering fluvial. Braided fluvial deposits are typically 30 to 80 ft thick, and are laterally persistent filling an incised valley wider than the largest producing fields. The lower contact is irregular with local relief of 50 ft. The braided-fluvial deposits consist of 100-400-ft wide, 5-15-ft thick channel-fill elements. Each channel-fill interval is limited laterally by an erosional contact or overbank deposits, and is separated vertically by discontinuous mudstones or highly concentrated mudstone interclast lag conglomerates. Low-angle parallel-stratified or trough cross-stratified medium- to coarse-grained sandstones volumetrically dominate. This section has a blocky well log profile. Meandering fluvial deposits are typically 100 to 150 ft thick and comprise multiple discrete genetic intervals.

SUSTAINABLE ARCHITECTURE : WHAT ARCHITECTURE STUDENTS THINK

OpenAIRE

SATWIKO, PRASASTO

2013-01-01

Sustainable architecture has become a hot issue lately as the impacts of climate change become more intense. Architecture educations have responded by integrating knowledge of sustainable design in their curriculum. However, in the real life, new buildings keep coming with designs that completely ignore sustainable principles. This paper discusses the results of two national competitions on sustainable architecture targeted for architecture students (conducted in 2012 and 2013). The results a...

Wavy channel Thin Film Transistor for area efficient, high performance and low power applications

KAUST Repository

Hanna, Amir; Sevilla, Galo T.; Ghoneim, Mohamed T.; Hussain, Muhammad Mustafa

2014-01-01

We report a new Thin Film Transistor (TFT) architecture that allows expansion of the device width using wavy (continuous without separation) fin features - termed as wavy channel (WC) architecture. This architecture allows expansion of transistor

Architecture

OpenAIRE

Clear, Nic

2014-01-01

When discussing science fiction’s relationship with architecture, the usual practice is to look at the architecture “in” science fiction—in particular, the architecture in SF films (see Kuhn 75-143) since the spaces of literary SF present obvious difficulties as they have to be imagined. In this essay, that relationship will be reversed: I will instead discuss science fiction “in” architecture, mapping out a number of architectural movements and projects that can be viewed explicitly as scien...

Viability of Intranets for Sustainable Architectural Education in ...

African Journals Online (AJOL)

... Education in Nigeria: A Case Study of the Federal University of Technology, Akure. ... reliability and currency of information, cost effectiveness, higher efficiency ... Keywords: Architectural Education, E-library, E-learning, E-studio, Intranet ...

Comparing architectural solutions of IPT application SDKs utilizing H.323 and SIP

Science.gov (United States)

Keskinarkaus, Anja; Korhonen, Jani; Ohtonen, Timo; Kilpelanaho, Vesa; Koskinen, Esa; Sauvola, Jaakko J.

2001-07-01

This paper presents two approaches to efficient service development for Internet Telephony. In first approach we consider services ranging from core call signaling features and media control as stated in ITU-T's H.323 to end user services that supports user interaction. The second approach supports IETF's SIP protocol. We compare these from differing architectural perspectives, economy of network and terminal development, and propose efficient architecture models for both protocols. In their design, the main criteria were component independence, lightweight operation and portability in heterogeneous end-to-end environments. In proposed architecture, the vertical division of call signaling and streaming media control logic allows for using the components either individually or combined, depending on the level of functionality required by an application.

Realizing Efficient Energy Harvesting from Organic Photovoltaic Cells

Science.gov (United States)

Zou, Yunlong

Organic photovoltaic cells (OPVs) are emerging field of research in renewable energy. The development of OPVs in recent years has made this technology viable for many niche applications. In order to realize widespread application however, the power conversion efficiency requires further improvement. The efficiency of an OPV depends on the short-circuit current density (JSC), open-circuit voltage (VOC) and fill factor (FF). For state-of-the-art devices, JSC is mostly optimized with the application of novel low-bandgap materials and a bulk heterojunction device architecture (internal quantum efficiency approaching 100%). The remaining limiting factors are the low VOC and FF. This work focuses on overcoming these bottlenecks for improved efficiency. Temperature dependent measurements of device performance are used to examine both charge transfer and exciton ionization process in OPVs. The results permit an improved understanding of the intrinsic limit for VOC in various device architectures and provide insight on device operation. Efforts have also been directed at engineering device architecture for optimized FF, realizing a very high efficiency of 8% for vapor deposited small molecule OPVs. With collaborators, new molecules with tailored desired energy levels are being designed for further improvements in efficiency. A new type of hybrid organic-inorganic perovskite material is also included in this study. By addressing processing issues and anomalous hysteresis effects, a very high efficiency of 19.1% is achieved. Moving forward, topics including engineering film crystallinity, exploring tandem architectures and understanding degradation mechanisms will further push OPVs toward broad commercialization.

A MCIN-based architecture of smart agriculture

Directory of Open Access Journals (Sweden)

Xiang Gu

2017-09-01

Full Text Available Purpose – Material conscious and information network (MCIN is a kind of cyber physics social system. This paper aims to study the MCIN modeling method and design the MCIN-based architecture of smart agriculture (MCIN-ASA which is different from current vertical architecture and involves production, management and commerce. Architecture is composed of three MCIN-ASA participants which are MCIN-ASA enterprises, individuals and commodity. Design/methodology/approach – Architecture uses enterprises and individuals personalized portals as the carriers which are linked precisely with each other through a peer-to-peer network called six-degrees-of-separation block-chain. The authors want to establish a self-organization, open and ecological operational system which includes active, personalized consumption, direct, centralized distribution, distributed and smart production. Findings – The paper models three main MCIN-ASA participants, namely, design the smart supply, demand and management functions, which show the feasibility innovation and high efficiency of implementing MCIN on agriculture. At the same time, the paper presents a prototype system based on the architecture. Originality/value – The authors think that MCIN-ASA improves current agriculture greatly and inspires a lot in production-marketing-combined electronic commerce.

Design of low-power coarse-grained reconfigurable architectures

CERN Document Server

Kim, Yoonjin

2010-01-01

Coarse-grained reconfigurable architecture (CGRA) has emerged as a solution for flexible, application-specific optimization of embedded systems. Helping you understand the issues involved in designing and constructing embedded systems, Design of Low-Power Coarse-Grained Reconfigurable Architectures offers new frameworks for optimizing the architecture of components in embedded systems in order to decrease area and save power. Real application benchmarks and gate-level simulations substantiate these frameworks.The first half of the book explains how to reduce power in the configuration cache. T

An Energy-Efficient Reconfigurable Circuit Switched Network-on-Chip

NARCIS (Netherlands)

Wolkotte, P.T.; Smit, Gerardus Johannes Maria; Rauwerda, G.K.; Smit, L.T.

Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for multi-tile System-on-Chip (SoC) architectures. The SoC architecture, including its run-time software, can replace inflexible ASICs for future ambient systems. These ambient systems have to be flexible as well as

Nano/CMOS architectures using a field-programmable nanowire interconnect

International Nuclear Information System (INIS)

Snider, Gregory S; Williams, R Stanley

2007-01-01

A field-programmable nanowire interconnect (FPNI) enables a family of hybrid nano/CMOS circuit architectures that generalizes the CMOL (CMOS/molecular hybrid) approach proposed by Strukov and Likharev, allowing for simpler fabrication, more conservative process parameters, and greater flexibility in the choice of nanoscale devices. The FPNI improves on a field-programmable gate array (FPGA) architecture by lifting the configuration bit and associated components out of the semiconductor plane and replacing them in the interconnect with nonvolatile switches, which decreases both the area and power consumption of the circuit. This is an example of a more comprehensive strategy for improving the efficiency of existing semiconductor technology: placing a level of intelligence and configurability in the interconnect can have a profound effect on integrated circuit performance, and can be used to significantly extend Moore's law without having to shrink the transistors. Compilation of standard benchmark circuits onto FPNI chip models shows reduced area (8 x to 25 x), reduced power, slightly lower clock speeds, and high defect tolerance-an FPNI chip with 20% defective junctions and 20% broken nanowires has an effective yield of 75% with no significant slowdown along the critical path, compared to a defect-free chip. Simulations show that the density and power improvements continue as both CMOS and nano fabrication parameters scale down, although the maximum clock rate decreases due to the high resistance of very small (<10 nm) metallic nanowires

Unified transform architecture for AVC, AVS, VC-1 and HEVC high-performance codecs

Science.gov (United States)

Dias, Tiago; Roma, Nuno; Sousa, Leonel

2014-12-01

A unified architecture for fast and efficient computation of the set of two-dimensional (2-D) transforms adopted by the most recent state-of-the-art digital video standards is presented in this paper. Contrasting to other designs with similar functionality, the presented architecture is supported on a scalable, modular and completely configurable processing structure. This flexible structure not only allows to easily reconfigure the architecture to support different transform kernels, but it also permits its resizing to efficiently support transforms of different orders (e.g. order-4, order-8, order-16 and order-32). Consequently, not only is it highly suitable to realize high-performance multi-standard transform cores, but it also offers highly efficient implementations of specialized processing structures addressing only a reduced subset of transforms that are used by a specific video standard. The experimental results that were obtained by prototyping several configurations of this processing structure in a Xilinx Virtex-7 FPGA show the superior performance and hardware efficiency levels provided by the proposed unified architecture for the implementation of transform cores for the Advanced Video Coding (AVC), Audio Video coding Standard (AVS), VC-1 and High Efficiency Video Coding (HEVC) standards. In addition, such results also demonstrate the ability of this processing structure to realize multi-standard transform cores supporting all the standards mentioned above and that are capable of processing the 8k Ultra High Definition Television (UHDTV) video format (7,680 × 4,320 at 30 fps) in real time.

Geometric Computing for Freeform Architecture

KAUST Repository

Wallner, J.; Pottmann, Helmut

2011-01-01

Geometric computing has recently found a new field of applications, namely the various geometric problems which lie at the heart of rationalization and construction-aware design processes of freeform architecture. We report on our work in this area

A Comparative Study on Chinese Architecture in Peninsular Malaysia and Mainland China

OpenAIRE

Somayeh Armani; Ezrin Arbi

2014-01-01

Chinese architecture is one of the most prevailing architectural styles in Peninsular Malaysia, which is inspired from architectural specimens in Mainland China. It can be stated that the Chinese structures in the Peninsula are variations of Chinese architecture in Mainland China since the Chinese builders in this area have faced the long journey of migration, assimilation and integration with new culture and environment. This paper intends to focus on this architecture, its various typology ...

Kalman filter tracking on parallel architectures

Science.gov (United States)

Cerati, G.; Elmer, P.; Krutelyov, S.; Lantz, S.; Lefebvre, M.; McDermott, K.; Riley, D.; Tadel, M.; Wittich, P.; Wurthwein, F.; Yagil, A.

2017-10-01

We report on the progress of our studies towards a Kalman filter track reconstruction algorithm with optimal performance on manycore architectures. The combinatorial structure of these algorithms is not immediately compatible with an efficient SIMD (or SIMT) implementation; the challenge for us is to recast the existing software so it can readily generate hundreds of shared-memory threads that exploit the underlying instruction set of modern processors. We show how the data and associated tasks can be organized in a way that is conducive to both multithreading and vectorization. We demonstrate very good performance on Intel Xeon and Xeon Phi architectures, as well as promising first results on Nvidia GPUs.

Modeling Architectural Patterns Using Architectural Primitives

NARCIS (Netherlands)

Zdun, Uwe; Avgeriou, Paris

2005-01-01

Architectural patterns are a key point in architectural documentation. Regrettably, there is poor support for modeling architectural patterns, because the pattern elements are not directly matched by elements in modeling languages, and, at the same time, patterns support an inherent variability that

Internationalising architectural education

OpenAIRE

Byrd, Hugh

2013-01-01

This is a track record of my involvement and success in internationalizing architectural education since 2009. It includes projects and outcomes that cover several continents and celebrates the success of my students in various areas of teaching and research including: • International design competitions • International employment • International PhD Students • Student publications in international journals and conferences

Sunken garden: remarkable example of Iranian sustainable architecture

Energy Technology Data Exchange (ETDEWEB)

Rezaei, Davood; Toufani, Sargol; Sadegh Falahat, Mohammad [Zanjan University (Iran, Islamic Republic of)], email: d_rezaei@znu.ac.ir, email: sargol2fun@gmail.com, email: safalahat@yahoo.com

2011-07-01

The energy crisis and climate change give new importance to sustainable architecture which reduces the negative impacts that buildings can have on the environment. In ancient times, architects did not have access to modern equipment and had to use natural energies to provide pleasant indoor conditions. Iran has various climatic zones and Iranian traditional architecture relied on a variety of solutions to provide for human comfort. The aim of this study is to present those solutions used in traditional Iranian architecture. This paper presents the use of the energy of the earth depth and other methods such as Syzan, a cellar, Shvadan, pool house, Zmhryr in addition to the sunken garden, which taps geothermal energy by constructing a courtyard lower than street level. This document showed that traditional Iranian architectural strategies are efficient in providing sustainable buildings and could be applied in the design of new construction.

A Low-Complexity Euclidean Orthogonal LDPC Architecture for Low Power Applications.

Science.gov (United States)

Revathy, M; Saravanan, R

2015-01-01

Low-density parity-check (LDPC) codes have been implemented in latest digital video broadcasting, broadband wireless access (WiMax), and fourth generation of wireless standards. In this paper, we have proposed a high efficient low-density parity-check code (LDPC) decoder architecture for low power applications. This study also considers the design and analysis of check node and variable node units and Euclidean orthogonal generator in LDPC decoder architecture. The Euclidean orthogonal generator is used to reduce the error rate of the proposed LDPC architecture, which can be incorporated between check and variable node architecture. This proposed decoder design is synthesized on Xilinx 9.2i platform and simulated using Modelsim, which is targeted to 45 nm devices. Synthesis report proves that the proposed architecture greatly reduces the power consumption and hardware utilizations on comparing with different conventional architectures.

A Low-Complexity Euclidean Orthogonal LDPC Architecture for Low Power Applications

Directory of Open Access Journals (Sweden)

M. Revathy

2015-01-01

Full Text Available Low-density parity-check (LDPC codes have been implemented in latest digital video broadcasting, broadband wireless access (WiMax, and fourth generation of wireless standards. In this paper, we have proposed a high efficient low-density parity-check code (LDPC decoder architecture for low power applications. This study also considers the design and analysis of check node and variable node units and Euclidean orthogonal generator in LDPC decoder architecture. The Euclidean orthogonal generator is used to reduce the error rate of the proposed LDPC architecture, which can be incorporated between check and variable node architecture. This proposed decoder design is synthesized on Xilinx 9.2i platform and simulated using Modelsim, which is targeted to 45 nm devices. Synthesis report proves that the proposed architecture greatly reduces the power consumption and hardware utilizations on comparing with different conventional architectures.

Hierarchical nitrogen doped bismuth niobate architectures: Controllable synthesis and excellent photocatalytic activity

International Nuclear Information System (INIS)

Hou, Jungang; Cao, Rui; Wang, Zheng; Jiao, Shuqiang; Zhu, Hongmin

2012-01-01

Graphical abstract: Efficient visible-light-driven photocatalysts of peony-like nitrogen doped Bi 3 NbO 7 hierarchical architectures and silver-layered Bi 3 NbO 7−x Nx heterostructures were successfully synthesized in this discovery. Highlights: ► N-Bi 3 NbO 7 architectures were synthesized via two-step hydrothermal process. ► Electronic structure calculations indicated that N replaced O in samples. ► Growth mechanism is proposed for transformation of nanoparticles to microflowers. ► Excellent activities of N-Bi 3 NbO 7 architectures were obtained for degradation. ► Enhanced photocatalytic performance was observed for Ag/N-Bi 3 NbO 7 architectures. - Abstract: Nitrogen doped bismuth niobate (N-Bi 3 NbO 7 ) hierarchical architectures were synthesized via a facile two-step hydrothermal process. XRD patterns revealed that the defect fluorite-type crystal structure of Bi 3 NbO 7 remained intact upon nitrogen doping. Electron microscopy showed the N-Bi 3 NbO 7 architecture has a unique peony-like spherical superstructure composed of numerous nanosheets. UV–vis spectra indicated that nitrogen doping in the compound results in a red-shift of the absorption edge from 450 nm to 470 nm. XPS indicated that [Bi/Nb]-N bonds were formed by inducing nitrogen to replace a small amount of oxygen in Bi 3 NbO 7−x N x , which is explained by electronic structure calculations including energy band and density of states. Based on observations of architectures formation, a possible growth mechanism was proposed to explain the transformation of polyhedral-like nanoparticles to peony-like microflowers via an Ostwald riping mechanism followed by self-assembly. The N-Bi 3 NbO 7 architectures due to the large specific surface area and nitrogen doping exhibited higher photocatalytic activities in the decomposition of organic pollutant under visible-light irradiation than Bi 3 NbO 7 nanoparticles. Furthermore, an enhanced photocatalytic performance was also observed for Ag

Word-serial Architectures for Filtering and Variable Rate Decimation

Directory of Open Access Journals (Sweden)

Eugene Grayver

2002-01-01

Full Text Available A new flexible architecture is proposed for word-serial filtering and variable rate decimation/interpolation. The architecture is targeted for low power applications requiring medium to low data rate and is ideally suited for implementation on either an ASIC or an FPGA. It combines the small size and low power of an ASIC with the programmability and flexibility of a DSP. An efficient memory addressing scheme eliminates the need for power hungry shift registers and allows full reconfiguration. The decimation ratio, filter length and filter coefficients can all be changed in real time. The architecture takes advantage of coefficient symmetries in linear phase filters and in polyphase components.

Terra Harvest software architecture

Science.gov (United States)

Humeniuk, Dave; Klawon, Kevin

2012-06-01

Under the Terra Harvest Program, the DIA has the objective of developing a universal Controller for the Unattended Ground Sensor (UGS) community. The mission is to define, implement, and thoroughly document an open architecture that universally supports UGS missions, integrating disparate systems, peripherals, etc. The Controller's inherent interoperability with numerous systems enables the integration of both legacy and future UGS System (UGSS) components, while the design's open architecture supports rapid third-party development to ensure operational readiness. The successful accomplishment of these objectives by the program's Phase 3b contractors is demonstrated via integration of the companies' respective plug-'n'-play contributions that include controllers, various peripherals, such as sensors, cameras, etc., and their associated software drivers. In order to independently validate the Terra Harvest architecture, L-3 Nova Engineering, along with its partner, the University of Dayton Research Institute, is developing the Terra Harvest Open Source Environment (THOSE), a Java Virtual Machine (JVM) running on an embedded Linux Operating System. The Use Cases on which the software is developed support the full range of UGS operational scenarios such as remote sensor triggering, image capture, and data exfiltration. The Team is additionally developing an ARM microprocessor-based evaluation platform that is both energy-efficient and operationally flexible. The paper describes the overall THOSE architecture, as well as the design decisions for some of the key software components. Development process for THOSE is discussed as well.

Area-Efficiency Trade-Offs in Integrated Switched-Capacitor DC-DC Converters

DEFF Research Database (Denmark)

Spliid, Frederik Monrad; Larsen, Dennis Øland; Knott, Arnold

2016-01-01

This paper analyzes the relationship between efficiency and chip area in a fully integrated switched capacitor voltage divider dc-dc converter implemented in 180nm-technology and a 1/2 topology. A numerical algorithm for choosing the optimal sizes of individual components, in terms of power loss...

Wide area data replication in an ITER-relevant data environment

International Nuclear Information System (INIS)

Centioli, C.; Iannone, F.; Panella, M.; Vitale, V.; Bracco, G.; Guadagni, R.; Migliori, S.; Steffe, M.; Eccher, S.; Maslennikov, A.; Mililotti, M.; Molowny, M.; Palumbo, G.; Carboni, M.

2005-01-01

The next generation of tokamak experiments will require a new way of approaching data sharing issues among fusion organizations. In the fusion community, many researchers at different worldwide sites will analyse data produced by International Thermonuclear Experimental Reactor (ITER), wherever it will be built. In this context, an efficient availability of the data in the sites where the computational resources are located becomes a major architectural issue for the deployment of ITER computational infrastructure. The approach described in this paper goes beyond the usual site-centric model mainly devoted to granting access exclusively to experimental data stored at the device sites. To this aim, we propose a new data replication architecture relying on a wide area network, based on a Master/Slave model and on synchronization techniques producing mirrored data sites. In this architecture, data replication will affect large databases (TB) as well as large UNIX-like file systems, using open source-based software components, namely MySQL, as database management system, and RSYNC and BBFTP for data transfer. A test-bed has been set up to evaluate the performance of the software components underlying the proposed architecture. The test-bed hardware layout deploys a cluster of four Dual-Xeon Supermicro each with a raid array of 1 TB. High performance network line (1 Gbit over 400 km) provides the infrastructure to test the components on a wide area network. The results obtained will be thoroughly discussed

Nano-photonic light trapping near the Lambertian limit in organic solar cell architectures.

Science.gov (United States)

Biswas, Rana; Timmons, Erik

2013-09-09

A critical step to achieving higher efficiency solar cells is the broad band harvesting of solar photons. Although considerable progress has recently been achieved in improving the power conversion efficiency of organic solar cells, these cells still do not absorb upto ~50% of the solar spectrum. We have designed and developed an organic solar cell architecture that can boost the absorption of photons by 40% and the photo-current by 50% for organic P3HT-PCBM absorber layers of typical device thicknesses. Our solar cell architecture is based on all layers of the solar cell being patterned in a conformal two-dimensionally periodic photonic crystal architecture. This results in very strong diffraction of photons- that increases the photon path length in the absorber layer, and plasmonic light concentration near the patterned organic-metal cathode interface. The absorption approaches the Lambertian limit. The simulations utilize a rigorous scattering matrix approach and provide bounds of the fundamental limits of nano-photonic light absorption in periodically textured organic solar cells. This solar cell architecture has the potential to increase the power conversion efficiency to 10% for single band gap organic solar cells utilizing long-wavelength absorbers.

The Approach to an Estimation of a Local Area Network Functioning Efficiency

Directory of Open Access Journals (Sweden)

M. M. Taraskin

2010-09-01

Full Text Available In the article authors call attention to a choice of system of metrics, which permits to take a qualitative assessment of local area network functioning efficiency in condition of computer attacks.

A scalable-low cost architecture for high gain beamforming antennas

KAUST Repository

Bakr, Omar; Johnson, Mark; Jungdong Park,; Adabi, Ehsan; Jones, Kevin; Niknejad, Ali

2010-01-01

Many state-of-the-art wireless systems, such as long distance mesh networks and high bandwidth networks using mm-wave frequencies, require high gain antennas to overcome adverse channel conditions. These networks could be greatly aided by adaptive beamforming antenna arrays, which can significantly simplify the installation and maintenance costs (e.g., by enabling automatic beam alignment). However, building large, low cost beamforming arrays is very complicated. In this paper, we examine the main challenges presented by large arrays, starting from electromagnetic and antenna design and proceeding to the signal processing and algorithms domain. We propose 3-dimensional antenna structures and hybrid RF/digital radio architectures that can significantly reduce the complexity and improve the power efficiency of adaptive array systems. We also present signal processing techniques based on adaptive filtering methods that enhance the robustness of these architectures. Finally, we present computationally efficient vector quantization techniques that significantly improve the interference cancellation capabilities of analog beamforming architectures. © 2010 IEEE.

A scalable-low cost architecture for high gain beamforming antennas

KAUST Repository

Bakr, Omar

2010-10-01

Many state-of-the-art wireless systems, such as long distance mesh networks and high bandwidth networks using mm-wave frequencies, require high gain antennas to overcome adverse channel conditions. These networks could be greatly aided by adaptive beamforming antenna arrays, which can significantly simplify the installation and maintenance costs (e.g., by enabling automatic beam alignment). However, building large, low cost beamforming arrays is very complicated. In this paper, we examine the main challenges presented by large arrays, starting from electromagnetic and antenna design and proceeding to the signal processing and algorithms domain. We propose 3-dimensional antenna structures and hybrid RF/digital radio architectures that can significantly reduce the complexity and improve the power efficiency of adaptive array systems. We also present signal processing techniques based on adaptive filtering methods that enhance the robustness of these architectures. Finally, we present computationally efficient vector quantization techniques that significantly improve the interference cancellation capabilities of analog beamforming architectures. © 2010 IEEE.

Area Green Efficiency (AGE) of Two Tier Heterogeneous Cellular Networks

KAUST Repository

Tabassum, Hina

2012-10-03

Small cell networks are becoming standard part of the future heterogeneous networks. In this paper, we consider a two tier heterogeneous network which promises energy savings by integrating the femto and macro cellular networks and thereby reducing CO2 emissions, operational and capital expenditures (OPEX and CAPEX) whilst enhancing the area spectral efficiency (ASE) of the network. In this context, we define a performance metric which characterize the aggregate energy savings per unit macrocell area and is referred to as area green efficiency (AGE) of the two tier heterogeneous network where the femto base stations are arranged around the edge of the reference macrocell such that the configuration is referred to as femto-on-edge (FOE). The mobile users in macro and femto cellular networks are transmitting with the adaptive power while maintaining the desired link quality such that the energy aware FOE configuration mandates to (i) save energy, and (ii) reduce the co-channel interference. We present a mathematical analysis to incorporate the uplink power control mechanism adopted by the mobile users and calibrate the uplink ASE and AGE of the energy aware FOE configuration. Next, we derive analytical expressions to compute the bounds on the uplink ASE of energy aware FOE configuration and demonstrate that the derived bounds are useful in evaluating the ASE under worst and best case interference scenarios. Simulation results are produced to demonstrate the ASE and AGE improvements in comparison to macro-only and macro-femto configuration with uniformly distributed femtocells.

IT Service Management Architectures

DEFF Research Database (Denmark)

Tambo, Torben; Filtenborg, Jacob

2018-01-01

IT service providers tend to view their services as quasi-embedded in the client organisations infrastructure. Therefore, IT service providers lack a full picture of being an organisation with its own enterprise archicture. By systematically developing an enterprise architecture using the unifica...... the unification operating model, IT service providers can much more efficient develop relevant service catalogues with connected reporting services related to SLA's and KPI's based on ITIL and newer frameworks like SIAM....

Tree architecture and life-history strategies across 200 co-occurring tropical tree species

NARCIS (Netherlands)

Iida, Y.; Kohyama, T.S.; Kubo, T.; Kassim, A.R.; Poorter, L.; Sterck, F.J.; Potts, M.D.

2011-01-01

1. Tree architecture is thought to allow species to partition horizontal and vertical light gradients in the forest canopy. Tree architecture is closely related to light capture, carbon gain and the efficiency with which trees reach the canopy. Previous studies that investigated how light gradients

Evaluating the Effectiveness of Reference Models in Federating Enterprise Architectures

Science.gov (United States)

Wilson, Jeffery A.

2012-01-01

Agencies need to collaborate with each other to perform missions, improve mission performance, and find efficiencies. The ability of individual government agencies to collaborate with each other for mission and business success and efficiency is complicated by the different techniques used to describe their Enterprise Architectures (EAs).…

The NASA Integrated Information Technology Architecture

Science.gov (United States)

Baldridge, Tim

1997-01-01

This document defines an Information Technology Architecture for the National Aeronautics and Space Administration (NASA), where Information Technology (IT) refers to the hardware, software, standards, protocols and processes that enable the creation, manipulation, storage, organization and sharing of information. An architecture provides an itemization and definition of these IT structures, a view of the relationship of the structures to each other and, most importantly, an accessible view of the whole. It is a fundamental assumption of this document that a useful, interoperable and affordable IT environment is key to the execution of the core NASA scientific and project competencies and business practices. This Architecture represents the highest level system design and guideline for NASA IT related activities and has been created on the authority of the NASA Chief Information Officer (CIO) and will be maintained under the auspices of that office. It addresses all aspects of general purpose, research, administrative and scientific computing and networking throughout the NASA Agency and is applicable to all NASA administrative offices, projects, field centers and remote sites. Through the establishment of five Objectives and six Principles this Architecture provides a blueprint for all NASA IT service providers: civil service, contractor and outsourcer. The most significant of the Objectives and Principles are the commitment to customer-driven IT implementations and the commitment to a simpler, cost-efficient, standards-based, modular IT infrastructure. In order to ensure that the Architecture is presented and defined in the context of the mission, project and business goals of NASA, this Architecture consists of four layers in which each subsequent layer builds on the previous layer. They are: 1) the Business Architecture: the operational functions of the business, or Enterprise, 2) the Systems Architecture: the specific Enterprise activities within the context

Energy-efficient specialization of functional units in a Coarse-Grained Reconfigurable Array

International Nuclear Information System (INIS)

Van Essen, B.; Panda, R.; Wood, A.; Ebeling, C.; Hauck, S.

2010-01-01

Functional units provide the backbone of any spatial accelerator by providing the computing resources. The desire for having rich and expensive functional units is in tension with producing a regular and energy-efficient computing fabric. This paper explores the design trade-off between complex, universal functional units and simpler, limited functional units. We show that a modest amount of specialization reduces the area-delay-energy product of an optimized architecture to 0.86x a baseline architecture. Furthermore, we provide a design guideline that allows an architect to customize the contents of the computing fabric just by examining the profile of benchmarks within the application domains. Functional units are the core of compute-intensive spatial accelerators. They perform the computation of interest with support from local storage and communication structures. Ideally, the functional units will provide rich functionality, supporting operations ranging from simple addition, to fused multiply-adds, to advanced transcendental functions and domain specific operations like add-compare-select. However, the total opportunity cost to support the more complex operations is a function of the cost of the hardware, the rate of occurrence of the operation in the application domain, and the inefficiency of emulating the operation with simpler operators. Examples of operations that are typically emulated in spatial accelerators are division and trigonometric functions, which can be solved using table-lookup based algorithms and the CORDIC algorithm. One reason to avoid having direct hardware support for complex operations in a tiled architecture like a Coarse-Grained Reconfigurable Array (CGRA) is that the expensive hardware will typically need to be replicated in some or all of the architecture's tiles. Tiled architecture are designed such that their tiles are either homogeneous or heterogeneous. Homogeneous architectures are simpler to design but heterogeneous

Weighted Components of i-Government Enterprise Architecture

Science.gov (United States)

Budiardjo, E. K.; Firmansyah, G.; Hasibuan, Z. A.

2017-01-01

Lack of government performance, among others due to the lack of coordination and communication among government agencies. Whilst, Enterprise Architecture (EA) in the government can be use as a strategic planning tool to improve productivity, efficiency, and effectivity. However, the existence components of Government Enterprise Architecture (GEA) do not show level of importance, that cause difficulty in implementing good e-government for good governance. This study is to explore the weight of GEA components using Principal Component Analysis (PCA) in order to discovered an inherent structure of e-government. The results show that IT governance component of GEA play a major role in the GEA. The rest of components that consist of e-government system, e-government regulation, e-government management, and application key operational, contributed more or less the same. Beside that GEA from other countries analyzes using comparative base on comon enterprise architecture component. These weighted components use to construct i-Government enterprise architecture. and show the relative importance of component in order to established priorities in developing e-government.

Open architecture of smart sensor suites

Science.gov (United States)

Müller, Wilmuth; Kuwertz, Achim; Grönwall, Christina; Petersson, Henrik; Dekker, Rob; Reinert, Frank; Ditzel, Maarten

2017-10-01

Experiences from recent conflicts show the strong need for smart sensor suites comprising different multi-spectral imaging sensors as core elements as well as additional non-imaging sensors. Smart sensor suites should be part of a smart sensor network - a network of sensors, databases, evaluation stations and user terminals. Its goal is to optimize the use of various information sources for military operations such as situation assessment, intelligence, surveillance, reconnaissance, target recognition and tracking. Such a smart sensor network will enable commanders to achieve higher levels of situational awareness. Within the study at hand, an open system architecture was developed in order to increase the efficiency of sensor suites. The open system architecture for smart sensor suites, based on a system-of-systems approach, enables combining different sensors in multiple physical configurations, such as distributed sensors, co-located sensors combined in a single package, tower-mounted sensors, sensors integrated in a mobile platform, and trigger sensors. The architecture was derived from a set of system requirements and relevant scenarios. Its mode of operation is adaptable to a series of scenarios with respect to relevant objects of interest, activities to be observed, available transmission bandwidth, etc. The presented open architecture is designed in accordance with the NATO Architecture Framework (NAF). The architecture allows smart sensor suites to be part of a surveillance network, linked e.g. to a sensor planning system and a C4ISR center, and to be used in combination with future RPAS (Remotely Piloted Aircraft Systems) for supporting a more flexible dynamic configuration of RPAS payloads.

Constraints on physiological function associated with branch architecture and wood density in tropical forest trees.

Science.gov (United States)

Meinzer, Frederick C; Campanello, Paula I; Domec, Jean-Christophe; Genoveva Gatti, M; Goldstein, Guillermo; Villalobos-Vega, Randol; Woodruff, David R

2008-11-01

This study examined how leaf and stem functional traits related to gas exchange and water balance scale with two potential proxies for tree hydraulic architecture: the leaf area:sapwood area ratio (A(L):A(S)) and wood density (rho(w)). We studied the upper crowns of individuals of 15 tropical forest tree species at two sites in Panama with contrasting moisture regimes and forest types. Transpiration and maximum photosynthetic electron transport rate (ETR(max)) per unit leaf area declined sharply with increasing A(L):A(S), as did the ratio of ETR(max) to leaf N content, an index of photosynthetic nitrogen-use efficiency. Midday leaf water potential, bulk leaf osmotic potential at zero turgor, branch xylem specific conductivity, leaf-specific conductivity and stem and leaf capacitance all declined with increasing rho(w). At the branch scale, A(L):A(S) and total leaf N content per unit sapwood area increased with rho(w), resulting in a 30% increase in ETR(max) per unit sapwood area with a doubling of rho(w). These compensatory adjustments in A(L):A(S), N allocation and potential photosynthetic capacity at the branch level were insufficient to completely offset the increased carbon costs of producing denser wood, and exacerbated the negative impact of increasing rho(w) on branch hydraulics and leaf water status. The suite of tree functional and architectural traits studied appeared to be constrained by the hydraulic and mechanical consequences of variation in rho(w).

Multicore technology architecture, reconfiguration, and modeling

CERN Document Server

Qadri, Muhammad Yasir

2013-01-01

The saturation of design complexity and clock frequencies for single-core processors has resulted in the emergence of multicore architectures as an alternative design paradigm. Nowadays, multicore/multithreaded computing systems are not only a de-facto standard for high-end applications, they are also gaining popularity in the field of embedded computing. The start of the multicore era has altered the concepts relating to almost all of the areas of computer architecture design, including core design, memory management, thread scheduling, application support, inter-processor communication, debu

Neuromorphic Configurable Architecture for Robust Motion Estimation

Directory of Open Access Journals (Sweden)

Guillermo Botella

2008-01-01

Full Text Available The robustness of the human visual system recovering motion estimation in almost any visual situation is enviable, performing enormous calculation tasks continuously, robustly, efficiently, and effortlessly. There is obviously a great deal we can learn from our own visual system. Currently, there are several optical flow algorithms, although none of them deals efficiently with noise, illumination changes, second-order motion, occlusions, and so on. The main contribution of this work is the efficient implementation of a biologically inspired motion algorithm that borrows nature templates as inspiration in the design of architectures and makes use of a specific model of human visual motion perception: Multichannel Gradient Model (McGM. This novel customizable architecture of a neuromorphic robust optical flow can be constructed with FPGA or ASIC device using properties of the cortical motion pathway, constituting a useful framework for building future complex bioinspired systems running in real time with high computational complexity. This work includes the resource usage and performance data, and the comparison with actual systems. This hardware has many application fields like object recognition, navigation, or tracking in difficult environments due to its bioinspired and robustness properties.

Efficient Processing of a Rainfall Simulation Watershed on an FPGA-Based Architecture with Fast Access to Neighbourhood Pixels

Directory of Open Access Journals (Sweden)

Yeong LeeSeng

2009-01-01

Full Text Available This paper describes a hardware architecture to implement the watershed algorithm using rainfall simulation. The speed of the architecture is increased by utilizing a multiple memory bank approach to allow parallel access to the neighbourhood pixel values. In a single read cycle, the architecture is able to obtain all five values of the centre and four neighbours for a 4-connectivity watershed transform. The storage requirement of the multiple bank implementation is the same as a single bank implementation by using a graph-based memory bank addressing scheme. The proposed rainfall watershed architecture consists of two parts. The first part performs the arrowing operation and the second part assigns each pixel to its associated catchment basin. The paper describes the architecture datapath and control logic in detail and concludes with an implementation on a Xilinx Spartan-3 FPGA.

An Autonomous Mobile Agent-Based Distributed Learning Architecture-A Proposal and Analytical Analysis

Directory of Open Access Journals (Sweden)

I. Ahmed M. J. SADIIG

2005-10-01

Full Text Available An Autonomous Mobile Agent-Based Distributed Learning Architecture-A Proposal and Analytical Analysis Dr. I. Ahmed M. J. SADIIG Department of Electrical & Computer EngineeringInternational Islamic University GombakKuala Lumpur-MALAYSIA ABSTRACT The traditional learning paradigm invoving face-to-face interaction with students is shifting to highly data-intensive electronic learning with the advances in Information and Communication Technology. An important component of the e-learning process is the delivery of the learning contents to their intended audience over a network. A distributed learning system is dependent on the network for the efficient delivery of its contents to the user. However, as the demand of information provision and utilization increases on the Internet, the current information service provision and utilization methods are becoming increasingly inefficient. Although new technologies have been employed for efficient learning methodologies within the context of an e-learning environment, the overall efficiency of the learning system is dependent on the mode of distribution and utilization of its learning contents. It is therefore imperative to employ new techniques to meet the service demands of current and future e-learning systems. In this paper, an architecture based on autonomous mobile agents creating a Faded Information Field is proposed. Unlike the centralized information distribution in a conventional e-learning system, the information is decentralized in the proposed architecture resulting in increased efficiency of the overall system for distribution and utilization of system learning contents efficiently and fairly. This architecture holds the potential to address the heterogeneous user requirements as well as the changing conditions of the underlying network.

Virtual Reality for Architectural or Territorial Representations: Usability Perceptions

Directory of Open Access Journals (Sweden)

Atta Idrawani Zaini

2017-05-01

Full Text Available Virtual reality (VR is widely being researched within various aspects of real-world applications. As architecture and urban design are very much adhered to evaluating and designing space, physical representations are deemed as incompetent to deliver a full-scale depiction of a space. Similarly, digital models are very much also limited in that sense. VR can deliver a full-scale virtual environment (VE, tricking users to be immersed in the replicated environment. This is an advantage for the aforementioned design disciplines, as more relatable and realistic depiction of a space can be modelled. The notion of its usability has become important to be understood from the perspective of architecture and urban design. This paper measured the respondents’ perceptions of VR’s usability through measuring its quality of use based on several criteria. The criteria established were the ease of use, usefulness, and satisfaction. Different levels of architectural details were decided as a form of control. A total of N=96 randomly selected respondents from various backgrounds participated in the survey as they were divided into four different group of treatments. Each group experienced a different VE with different level of architectural details. The first section of analysis is a one-sample analysis and the second is a group difference analysis. From the first analysis, it was found that the respondents perceived VR as a usable tool for architectural or territorial representation. Using Kruskal-Wallis test, it was found that there was no statistically significant difference between groups, suggesting that the respondents perceived VR as usable regardless of the level of architectural details. As this paper used perception data based on the quality of use alone, the efficiency of VR system was not measured. Thus, this paper recommends further studies to be conducted on the system’s efficiency to reflect its usability in full extent.

weHelp: A Reference Architecture for Social Recommender Systems.

Science.gov (United States)

Sheth, Swapneel; Arora, Nipun; Murphy, Christian; Kaiser, Gail

2010-01-01

Recommender systems have become increasingly popular. Most of the research on recommender systems has focused on recommendation algorithms. There has been relatively little research, however, in the area of generalized system architectures for recommendation systems. In this paper, we introduce weHelp : a reference architecture for social recommender systems - systems where recommendations are derived automatically from the aggregate of logged activities conducted by the system's users. Our architecture is designed to be application and domain agnostic. We feel that a good reference architecture will make designing a recommendation system easier; in particular, weHelp aims to provide a practical design template to help developers design their own well-modularized systems.

LHCb Kalman Filter cross architecture studies

Science.gov (United States)

Hugo, Daniel; Pérez, Cámpora

2017-10-01

The 2020 upgrade of the LHCb detector will vastly increase the rate of collisions the Online system needs to process in software, in order to filter events in real time. 30 million collisions per second will pass through a selection chain, where each step is executed conditional to its prior acceptance. The Kalman Filter is a fit applied to all reconstructed tracks which, due to its time characteristics and early execution in the selection chain, consumes 40% of the whole reconstruction time in the current trigger software. This makes the Kalman Filter a time-critical component as the LHCb trigger evolves into a full software trigger in the Upgrade. I present a new Kalman Filter algorithm for LHCb that can efficiently make use of any kind of SIMD processor, and its design is explained in depth. Performance benchmarks are compared between a variety of hardware architectures, including x86_64 and Power8, and the Intel Xeon Phi accelerator, and the suitability of said architectures to efficiently perform the LHCb Reconstruction process is determined.

Wireless Power Transfer System Architectures for Portable or Implantable Applications

Directory of Open Access Journals (Sweden)

Yan Lu

2016-12-01

Full Text Available This paper discusses the near-field inductive coupling wireless power transfer (WPT at the system level, with detailed analyses on each state-of-the-art WPT output voltage regulation topologies. For device miniaturization and power loss reduction, several novel architectures for efficient WPT were proposed in recent years to reduce the number of passive components as well as to improve the system efficiency or flexibility. These schemes are systematically studied and discussed in this paper. The main contribution of this paper is to provide design guidelines for WPT system design. In addition, possible combinations of the WPT building block configurations are summarized, compared, and investigated for potential new architectures.

Balancing Area Coordination: Efficiently Integrating Renewable Energy Into the Grid, Greening the Grid

Energy Technology Data Exchange (ETDEWEB)

Katz, Jessica; Denholm, Paul; Cochran, Jaquelin

2015-06-01

Greening the Grid provides technical assistance to energy system planners, regulators, and grid operators to overcome challenges associated with integrating variable renewable energy into the grid. Coordinating balancing area operation can promote more cost and resource efficient integration of variable renewable energy, such as wind and solar, into power systems. This efficiency is achieved by sharing or coordinating balancing resources and operating reserves across larger geographic boundaries.

Iranian traditional architecture and energy saving (case study: Shiraz Ghajar houses)

Energy Technology Data Exchange (ETDEWEB)

Najafi, Najmeh [Master of Architecture, Department of Architecture, Beyza Branch, Islamic Azad University, Beyza (Iran, Islamic Republic of)

2013-07-01

Climate is an important factor in logical formation of urban structures and their type of architecture. The present study looks at the relationship between the traditional buildings and sustainable development as well as the climatic conditions and construction patterns in Shiraz, Iran. The purpose of this research is to help promote energy efficient architectural design in Semi hot-arid climates by introducing the technics that the traditional architects used to design buildings in Shiraz. The climatic design solutions studied in a number of traditional buildings Belong to Qajar era in Shiraz. Result of this paper; show that considering the experience in traditional architecture of Shiraz, it is possible to create an environmental and sustainable architecture.

Cheap type solar bioclimatic individual houses for residential areas

Directory of Open Access Journals (Sweden)

Mihailescu Teofil

2016-01-01

Full Text Available In the Romanian architectural practice for individual houses in residential areas, designing the architectural object in order to function together with the nature is neglected in the majority of the situations. This happens despite of a great variety of the solar bioclimatic solutions materialized in the traditional houses of all the Romanian geographical regions in a history of over 2000 years of traditional architecture. Unfortunately, in the local real estate realities, other choices are preferred in instead those of the solar bioclimatic architecture. The approach starts with a historical approach, analyzing several examples of traditional houses from all the regions of Romania, in order to identify the traditional bioclimatic solutions used to better adapt to the environment. This constitutes the source of inspiration for the modern cheap type solar bioclimatic houses presented. But a way of thinking should be changed for it, with the help of the Romanian state transformed in financial and legislative realities. These cheap type solar bioclimatic individual houses are destined for the middle class families and involve minimum costs for building and living, creating the best premises to efficiently use one or all of the complementary systems for producing, storage and/or transforming the energy from the environment (using solar, wind, water and/or earth energy.

Conflict, Space and Architecture

Directory of Open Access Journals (Sweden)

Marc Schoonderbeek

2017-02-01

Full Text Available Footprint 19 focuses on the more recent roles of architecture in the contemporary spaces of conflict. Departing from a spatial understanding of geopolitical, climatological and economical conflicts, the various contributions highlight the large scale and phenomenal transitions in the physical world and in society by extrapolating, through examples, the abundance of relations that can be traced between conflict, territory and architecture. Conflict areas often prove to be fertile grounds for innovation and for the emergence of new spatial forms. The issue reports on the state of perpetual global unrest in architecture through a series of articles and case studies that highlight the consequences of conflicts in the places and spaces that we inhabit. In the introduction, these are discussed as an interlinked global reality rather than as isolated incidents. In doing so, the contemporary spaces of conflict are positioned in the context of emerging global trends, conditions, and discourses in the attempt to address their indicative symptoms while reflecting on their underlying causes.

Architecture of 53 rain forest tree species differing in adult stature and shade tolerance

NARCIS (Netherlands)

Poorter, L.; Bongers, F.J.J.M.; Sterck, F.J.; Wöll, H.

2003-01-01

Tree architecture determines a tree's light capture, stability, and efficiency of crown growth. The hypothesis that light demand and adult stature of tree species within a community, independently of each other, determine species' architectural traits was tested by comparing 53 Liberian rain forest

Information architecture. Volume 2, Part 1: Baseline analysis summary

Energy Technology Data Exchange (ETDEWEB)

NONE

1996-12-01

The Department of Energy (DOE) Information Architecture, Volume 2, Baseline Analysis, is a collaborative and logical next-step effort in the processes required to produce a Departmentwide information architecture. The baseline analysis serves a diverse audience of program management and technical personnel and provides an organized way to examine the Department`s existing or de facto information architecture. A companion document to Volume 1, The Foundations, it furnishes the rationale for establishing a Departmentwide information architecture. This volume, consisting of the Baseline Analysis Summary (part 1), Baseline Analysis (part 2), and Reference Data (part 3), is of interest to readers who wish to understand how the Department`s current information architecture technologies are employed. The analysis identifies how and where current technologies support business areas, programs, sites, and corporate systems.

Rationalization with ruled surfaces in architecture

DEFF Research Database (Denmark)

Steenstrup, Kasper Hornbak

This thesis addresses the problems of rationalizing and segmenting large scale 3D models, and how to handle difficult production constraints in this area. The design choices when constructing large scale architecture are influenced by the budget. Therefore I strive to minimize the amount of time...... and material needed for production. This makes advanced free form architecture viable for low cost projects, allowing the architects to realize their designs. By pre-cutting building blocks using hot wire robots, the amount of milling necessary can be reduced drastically. I do this by rationalizing...

Java technology for implementing efficient numerical analysis in intranet

International Nuclear Information System (INIS)

Song, Hee Yong; Ko, Sung Ho

2001-01-01

This paper introduces some useful Java technologies for utilizing the internet in numerical analysis, and suggests one architecture performing efficient numerical analysis in the intranet by using them. The present work has verified it's possibility by implementing some parts of this architecture with two easy examples. One is based on Servlet-Applet communication, JDBC and swing. The other is adding multi-threads, file transfer and Java remote method invocation to the former. Through this work it has been intended to make the base for the later advanced and practical research that will include efficiency estimates of this architecture and deal with advanced load balancing

Agent-based Personal Network (PN) service architecture

DEFF Research Database (Denmark)

Jiang, Bo; Olesen, Henning

2004-01-01

In this paper we proposte a new concept for a centralized agent system as the solution for the PN service architecture, which aims to efficiently control and manage the PN resources and enable the PN based services to run seamlessly over different networks and devices. The working principle...

Architectural prototyping

DEFF Research Database (Denmark)

Bardram, Jakob Eyvind; Christensen, Henrik Bærbak; Hansen, Klaus Marius

2004-01-01

A major part of software architecture design is learning how specific architectural designs balance the concerns of stakeholders. We explore the notion of "architectural prototypes", correspondingly architectural prototyping, as a means of using executable prototypes to investigate stakeholders...

Techniques and Architectures for Hazard-Free Semi-Parallel Decoding of LDPC Codes

Directory of Open Access Journals (Sweden)

Rovini Massimo

2009-01-01

Full Text Available The layered decoding algorithm has recently been proposed as an efficient means for the decoding of low-density parity-check (LDPC codes, thanks to the remarkable improvement in the convergence speed (2x of the decoding process. However, pipelined semi-parallel decoders suffer from violations or "hazards" between consecutive updates, which not only violate the layered principle but also enforce the loops in the code, thus spoiling the error correction performance. This paper describes three different techniques to properly reschedule the decoding updates, based on the careful insertion of "idle" cycles, to prevent the hazards of the pipeline mechanism. Also, different semi-parallel architectures of a layered LDPC decoder suitable for use with such techniques are analyzed. Then, taking the LDPC codes for the wireless local area network (IEEE 802.11n as a case study, a detailed analysis of the performance attained with the proposed techniques and architectures is reported, and results of the logic synthesis on a 65 nm low-power CMOS technology are shown.

Neural architecture design based on extreme learning machine.

Science.gov (United States)

Bueno-Crespo, Andrés; García-Laencina, Pedro J; Sancho-Gómez, José-Luis

2013-12-01

Selection of the optimal neural architecture to solve a pattern classification problem entails to choose the relevant input units, the number of hidden neurons and its corresponding interconnection weights. This problem has been widely studied in many research works but their solutions usually involve excessive computational cost in most of the problems and they do not provide a unique solution. This paper proposes a new technique to efficiently design the MultiLayer Perceptron (MLP) architecture for classification using the Extreme Learning Machine (ELM) algorithm. The proposed method provides a high generalization capability and a unique solution for the architecture design. Moreover, the selected final network only retains those input connections that are relevant for the classification task. Experimental results show these advantages. Copyright © 2013 Elsevier Ltd. All rights reserved.

Deep Space Network information system architecture study

Science.gov (United States)

Beswick, C. A.; Markley, R. W. (Editor); Atkinson, D. J.; Cooper, L. P.; Tausworthe, R. C.; Masline, R. C.; Jenkins, J. S.; Crowe, R. A.; Thomas, J. L.; Stoloff, M. J.

1992-01-01

The purpose of this article is to describe an architecture for the DSN information system in the years 2000-2010 and to provide guidelines for its evolution during the 1990's. The study scope is defined to be from the front-end areas at the antennas to the end users (spacecraft teams, principal investigators, archival storage systems, and non-NASA partners). The architectural vision provides guidance for major DSN implementation efforts during the next decade. A strong motivation for the study is an expected dramatic improvement in information-systems technologies--i.e., computer processing, automation technology (including knowledge-based systems), networking and data transport, software and hardware engineering, and human-interface technology. The proposed Ground Information System has the following major features: unified architecture from the front-end area to the end user; open-systems standards to achieve interoperability; DSN production of level 0 data; delivery of level 0 data from the Deep Space Communications Complex, if desired; dedicated telemetry processors for each receiver; security against unauthorized access and errors; and highly automated monitor and control.

Architectural communication: Intra and extra activity of architecture

Directory of Open Access Journals (Sweden)

Stamatović-Vučković Slavica

2013-01-01

Full Text Available Apart from a brief overview of architectural communication viewed from the standpoint of theory of information and semiotics, this paper contains two forms of dualistically viewed architectural communication. The duality denotation/connotation (”primary” and ”secondary” architectural communication is one of semiotic postulates taken from Umberto Eco who viewed architectural communication as a semiotic phenomenon. In addition, architectural communication can be viewed as an intra and an extra activity of architecture where the overall activity of the edifice performed through its spatial manifestation may be understood as an act of communication. In that respect, the activity may be perceived as the ”behavior of architecture”, which corresponds to Lefebvre’s production of space.

Architecture Without Explicit Locks for Logic Simulation on SIMD Machines

OpenAIRE

Cockshott, W. Paul; Chimeh, Mozhgan Kabiri

2016-01-01

The presentation describes an architecture for logic simulation that takes advantages of the features of multi-core SIMD architectures. It uses neither explicit locks nor queues, using instead oblivious simulation. Data structures are targeted to efficient SIMD and multi-core cache operation. We demonstrate high levels of parallelisation on Xeon Phi and AMD multi-core machines. Performance on a Xeon Phi is comparable to or better than on a 1000 core Blue Gene machine.

The Changes in Architecture Terminology

Directory of Open Access Journals (Sweden)

Francois Tran

2012-10-01

Full Text Available The intention of this research is to inspire a discussion about the changes in architecture terminologywith the revolution in communication and representation forms as a result of digitalisation.The blurred boundary between the virtual and the analogue worlds, the misunderstandings andthe confusion that appear with the interaction of these two worlds nowadays form the major problems facing architectural design, education and research. The researchers in this field arefocused on the interface, the meeting and the transformation point between the digital and analogue worlds in order to prevent those problems and confusions. One of the main reasonsof this ambiguity is the architectural terminology that changes according to the changing status of architectural representation i.e. new forms of representation; new forms of communicationi.e. the new role of the architect and the researcher.Whenever and wherever information and knowledge specialised is created, communicated ortransformed terminology is involved in a way or another. An absence of terminology is combined with an absence of an understanding of concepts. Therefore with the new information and communication technologies; new and developing subject areas the existence of terminology and its update is indispensable. Thus the changing status of the terminology must be analysed. As architecture terminology is essential to improve today’s challenging, multidisciplinary communication in order to clarify the problems of ambiguity and unawareness (as a result of shift of specific architectural vocabulary it is necessary to analyse the changes in the architectural terminology which will form the discussion point of the following paper.As this paper is the beginning step of a research project which started on the occasion of the conference proposed by EAAE/ARCC we will here present only the objectives of this research,its general problematics, the methods that we wish to develop and some provisional

Energy and spectrum efficiency in rural areas based on cognitive radio technology

CSIR Research Space (South Africa)

Masonta, MT

2009-09-01

Full Text Available spectrum scarcity in the most energy efficient manner. In this paper, researchers present the proposed work to be carried out as part of a doctoral thesis to address the spectrum scarcity and transmission power in energy constrained rural areas....

Program Execution on Reconfigurable Multicore Architectures

Directory of Open Access Journals (Sweden)

Sanjiva Prasad

2016-06-01

Full Text Available Based on the two observations that diverse applications perform better on different multicore architectures, and that different phases of an application may have vastly different resource requirements, Pal et al. proposed a novel reconfigurable hardware approach for executing multithreaded programs. Instead of mapping a concurrent program to a fixed architecture, the architecture adaptively reconfigures itself to meet the application's concurrency and communication requirements, yielding significant improvements in performance. Based on our earlier abstract operational framework for multicore execution with hierarchical memory structures, we describe execution of multithreaded programs on reconfigurable architectures that support a variety of clustered configurations. Such reconfiguration may not preserve the semantics of programs due to the possible introduction of race conditions arising from concurrent accesses to shared memory by threads running on the different cores. We present an intuitive partial ordering notion on the cluster configurations, and show that the semantics of multithreaded programs is always preserved for reconfigurations "upward" in that ordering, whereas semantics preservation for arbitrary reconfigurations can be guaranteed for well-synchronised programs. We further show that a simple approximate notion of efficiency of execution on the different configurations can be obtained using the notion of amortised bisimulations, and extend it to dynamic reconfiguration.

An efficient architecture to support digital pathology in standard medical imaging repositories.

Science.gov (United States)

Marques Godinho, Tiago; Lebre, Rui; Silva, Luís Bastião; Costa, Carlos

2017-07-01

In the past decade, digital pathology and whole-slide imaging (WSI) have been gaining momentum with the proliferation of digital scanners from different manufacturers. The literature reports significant advantages associated with the adoption of digital images in pathology, namely, improvements in diagnostic accuracy and better support for telepathology. Moreover, it also offers new clinical and research applications. However, numerous barriers have been slowing the adoption of WSI, among which the most important are performance issues associated with storage and distribution of huge volumes of data, and lack of interoperability with other hospital information systems, most notably Picture Archive and Communications Systems (PACS) based on the DICOM standard. This article proposes an architecture of a Web Pathology PACS fully compliant with DICOM standard communications and data formats. The solution includes a PACS Archive responsible for storing whole-slide imaging data in DICOM WSI format and offers a communication interface based on the most recent DICOM Web services. The second component is a zero-footprint viewer that runs in any web-browser. It consumes data using the PACS archive standard web services. Moreover, it features a tiling engine especially suited to deal with the WSI image pyramids. These components were designed with special focus on efficiency and usability. The performance of our system was assessed through a comparative analysis of the state-of-the-art solutions. The results demonstrate that it is possible to have a very competitive solution based on standard workflows. Copyright © 2017 Elsevier Inc. All rights reserved.

The problem of the architectural heritage reconstruction

Directory of Open Access Journals (Sweden)

Alfazhr M.A.

2017-02-01

Full Text Available the subject of this research is the modern technology of the architectural monuments restoration, which makes possible to increase the design and performance, as well as the durability of historical objects. Choosing the most efficient, cost-effective and durable recovery and expanding of architectural monuments technologies is a priority of historical cities. Adoption of the faster and sound monuments restoration technology is neсessay because there are a lot of historical Russian cities in need of repair and reconstruction. Therefore, it is essential that new renovation works improvement methods and technologies on the basis of the western experience in construction to be found.

High-Level Heteroatom Doped Two-Dimensional Carbon Architectures for Highly Efficient Lithium-Ion Storage

Directory of Open Access Journals (Sweden)

Zhijie Wang

2018-04-01

Full Text Available In this work, high-level heteroatom doped two-dimensional hierarchical carbon architectures (H-2D-HCA are developed for highly efficient Li-ion storage applications. The achieved H-2D-HCA possesses a hierarchical 2D morphology consisting of tiny carbon nanosheets vertically grown on carbon nanoplates and containing a hierarchical porosity with multiscale pore size. More importantly, the H-2D-HCA shows abundant heteroatom functionality, with sulfur (S doping of 0.9% and nitrogen (N doping of as high as 15.5%, in which the electrochemically active N accounts for 84% of total N heteroatoms. In addition, the H-2D-HCA also has an expanded interlayer distance of 0.368 nm. When used as lithium-ion battery anodes, it shows excellent Li-ion storage performance. Even at a high current density of 5 A g−1, it still delivers a high discharge capacity of 329 mA h g−1 after 1,000 cycles. First principle calculations verifies that such unique microstructure characteristics and high-level heteroatom doping nature can enhance Li adsorption stability, electronic conductivity and Li diffusion mobility of carbon nanomaterials. Therefore, the H-2D-HCA could be promising candidates for next-generation LIB anodes.

Toward a Fault Tolerant Architecture for Vital Medical-Based Wearable Computing.

Science.gov (United States)

Abdali-Mohammadi, Fardin; Bajalan, Vahid; Fathi, Abdolhossein

2015-12-01

Advancements in computers and electronic technologies have led to the emergence of a new generation of efficient small intelligent systems. The products of such technologies might include Smartphones and wearable devices, which have attracted the attention of medical applications. These products are used less in critical medical applications because of their resource constraint and failure sensitivity. This is due to the fact that without safety considerations, small-integrated hardware will endanger patients' lives. Therefore, proposing some principals is required to construct wearable systems in healthcare so that the existing concerns are dealt with. Accordingly, this paper proposes an architecture for constructing wearable systems in critical medical applications. The proposed architecture is a three-tier one, supporting data flow from body sensors to cloud. The tiers of this architecture include wearable computers, mobile computing, and mobile cloud computing. One of the features of this architecture is its high possible fault tolerance due to the nature of its components. Moreover, the required protocols are presented to coordinate the components of this architecture. Finally, the reliability of this architecture is assessed by simulating the architecture and its components, and other aspects of the proposed architecture are discussed.

A 45.8fJ/Step, energy-efficient, differential SAR capacitance-to-digital converter for capacitive pressure sensing

KAUST Repository

Alhoshany, Abdulaziz

2016-05-03

An energy-efficient readout circuit for a capacitive sensor is presented. The capacitive sensor is digitized by a 12-bit energy efficient capacitance-to-digital converter (CDC) that is based on a differential successive-approximation architecture. This CDC meets extremely low power requirements by using an operational transconductance amplifier (OTA) that is based on a current-starved inverter. It uses a charge-redistribution DAC that involves coarse-fine architecture. We split the DAC into a coarse-DAC and a fine-DAC to allow a wide capacitance range in a compact area. It covers a wide range of capacitance of 16.14 pF with a 4.5 fF absolute resolution. An analog comparator is implemented by cross-coupling two 3-input NAND gates to enable power and area efficient operation. The prototype CDC was fabricated using a standard 180 nm CMOS technology. The 12-bit CDC has a measurement time of 42.5 μs, and consumes 3.54 μW and 0.29 μW from analog and digital supplies, respectively. This corresponds to a state-of-the-art figure-of-merit (FoM) of 45.8 fJ/conversion-step. © 2016 Elsevier B.V. All rights reserved.

A 45.8fJ/Step, energy-efficient, differential SAR capacitance-to-digital converter for capacitive pressure sensing

KAUST Repository

Alhoshany, Abdulaziz; Omran, Hesham; Salama, Khaled N.

2016-01-01

An energy-efficient readout circuit for a capacitive sensor is presented. The capacitive sensor is digitized by a 12-bit energy efficient capacitance-to-digital converter (CDC) that is based on a differential successive-approximation architecture. This CDC meets extremely low power requirements by using an operational transconductance amplifier (OTA) that is based on a current-starved inverter. It uses a charge-redistribution DAC that involves coarse-fine architecture. We split the DAC into a coarse-DAC and a fine-DAC to allow a wide capacitance range in a compact area. It covers a wide range of capacitance of 16.14 pF with a 4.5 fF absolute resolution. An analog comparator is implemented by cross-coupling two 3-input NAND gates to enable power and area efficient operation. The prototype CDC was fabricated using a standard 180 nm CMOS technology. The 12-bit CDC has a measurement time of 42.5 μs, and consumes 3.54 μW and 0.29 μW from analog and digital supplies, respectively. This corresponds to a state-of-the-art figure-of-merit (FoM) of 45.8 fJ/conversion-step. © 2016 Elsevier B.V. All rights reserved.

Architectural freedom and industrialized architecture

DEFF Research Database (Denmark)

Vestergaard, Inge

2012-01-01

to explain that architecture can be thought as a complex and diverse design through customization, telling exactly the revitalized storey about the change to a contemporary sustainable and better performing expression in direct relation to the given context. Through the last couple of years we have...... proportions, to organize the process on site choosing either one room wall components or several rooms wall components – either horizontally or vertically. Combined with the seamless joint the playing with these possibilities the new industrialized architecture can deliver variations in choice of solutions...... for retrofit design. If we add the question of the installations e.g. ventilation to this systematic thinking of building technique we get a diverse and functional architecture, thereby creating a new and clearer story telling about new and smart system based thinking behind architectural expression....

Heterogeneous System Architectures from APUs to discrete GPUs

CERN Multimedia

CERN. Geneva

2013-01-01

We will present the Heterogeneous Systems Architectures that new AMD processors are bringing with the new GCN based GPUs and the new APUs. We will show how together they represent a huge step forward for programming flexibility and performance efficiently for Compute.

Homogeneous and Heterogeneous MPSoC Architectures with Network-On-Chip Connectivity for Low-Power and Real-Time Multimedia Signal Processing

Directory of Open Access Journals (Sweden)

Sergio Saponara

2012-01-01

Full Text Available Two multiprocessor system-on-chip (MPSoC architectures are proposed and compared in the paper with reference to audio and video processing applications. One architecture exploits a homogeneous topology; it consists of 8 identical tiles, each made of a 32-bit RISC core enhanced by a 64-bit DSP coprocessor with local memory. The other MPSoC architecture exploits a heterogeneous-tile topology with on-chip distributed memory resources; the tiles act as application specific processors supporting a different class of algorithms. In both architectures, the multiple tiles are interconnected by a network-on-chip (NoC infrastructure, through network interfaces and routers, which allows parallel operations of the multiple tiles. The functional performances and the implementation complexity of the NoC-based MPSoC architectures are assessed by synthesis results in submicron CMOS technology. Among the large set of supported algorithms, two case studies are considered: the real-time implementation of an H.264/MPEG AVC video codec and of a low-distortion digital audio amplifier. The heterogeneous architecture ensures a higher power efficiency and a smaller area occupation and is more suited for low-power multimedia processing, such as in mobile devices. The homogeneous scheme allows for a higher flexibility and easier system scalability and is more suited for general-purpose DSP tasks in power-supplied devices.

Control system architecture: The standard and non-standard models

International Nuclear Information System (INIS)

Thuot, M.E.; Dalesio, L.R.

1993-01-01

Control system architecture development has followed the advances in computer technology through mainframes to minicomputers to micros and workstations. This technology advance and increasingly challenging accelerator data acquisition and automation requirements have driven control system architecture development. In summarizing the progress of control system architecture at the last International Conference on Accelerator and Large Experimental Physics Control Systems (ICALEPCS) B. Kuiper asserted that the system architecture issue was resolved and presented a ''standard model''. The ''standard model'' consists of a local area network (Ethernet or FDDI) providing communication between front end microcomputers, connected to the accelerator, and workstations, providing the operator interface and computational support. Although this model represents many present designs, there are exceptions including reflected memory and hierarchical architectures driven by requirements for widely dispersed, large channel count or tightly coupled systems. This paper describes the performance characteristics and features of the ''standard model'' to determine if the requirements of ''non-standard'' architectures can be met. Several possible extensions to the ''standard model'' are suggested including software as well as the hardware architectural feature

Cardiac architecture: Gothic versus Romanesque. A cardiologist's view.

Science.gov (United States)

Coghlan, H C; Coghlan, L

2001-10-01

The healthy left ventricle, with remarkable mechanical efficiency, has a gothic architecture, which results from the disposition of the myocardial fibers supported and maintained by a normal collagen matrix scaffold. This conclusion, arising from the analysis of roman and gothic buildings and from comparative biology of the left ventricles of different species, has been substantiated by the study of three-dimensional images obtained by MRI and analyzed with mathematic methods for measurements of the curvature and thickness of the ventricular walls. The assessment of left ventricular functional reserve based on the architecture has been very important in making therapeutic and surgical decisions in our patients and has important implications for the design of surgical strategies designed to try to improve ventricular function by restoring an architecture that allows more efficient ventricular mechanics. The structural approach and its combination with important advances in the knowledge of membrane channels, signaling pathways, cytokines, growth factors, neuroregulation, and targeted pharmacology, and with the advances in methods for reducing hemodynamic load and its cellular and structural consequences, is certain to bring about a dramatic change in the very serious and highly prevalent congestive failure associated with the Romanesque transformation of the diseased left ventricle. Copyright 2001 by W.B. Saunders Company

Influences of the Living World on Architectural Structures: An Analytical Insight

Directory of Open Access Journals (Sweden)

Gülcan MİNSOLMAZ YELER

2015-01-01

Full Text Available Structures in the nature motivate innovation in architectural and engineering disciplines in termsof aesthetical, functional and structural advantages. Using efficient, lightweight structural forms similar tothose in nature reduces material and energy usage and waste amount. In this sense, it can be clearly seenthat based on learning from nature in relation to meeting gradually increasing and changing requirementsthrough limited resources and creating modern structural designs, biomimicry will provide much morecontribution on architecture and related fields. In this direction, in the study based on comprehensiveliterature research, lots of varying living organisms in the nature have been analyzed in terms of structure;architectural structures developed by inspiring from natural structures have been sampled and influencesof solutions inspired from nature on architectural environment have been focused.

How to Improve Water Usage Efficiency? Characterization of Family Farms in A Semi-Arid Area

Directory of Open Access Journals (Sweden)

Laura Piedra-Muñoz

2017-10-01

Full Text Available Water scarcity in Spain is partly due to poor management of this resource in the agricultural sector. The main aim of this study is to present the major factors related to water usage efficiency in farming. It focuses on the Almería coast, southeast Spain, which is one of the most arid areas of the country, and in particular, on family farms as the main direct managers of water use in this zone. Many of these farms are among the most water efficient in Spanish agriculture but this efficiency is not generalized throughout the sector. This work conducts a comprehensive assessment of water performance in this area, using on-farm water-use, structural, socio-economic, and environmental information. Two statistical techniques are used: descriptive analysis and cluster analysis. Thus, two groups are identified: farms that are less and farms that are more efficient regarding water usage. By analyzing both the common characteristics within each group and the differences between the groups with a one-way ANOVA analysis, several conclusions can be reached. The main differences between the two clusters center on the extent to which innovation and new technologies are used in irrigation. The most water efficient farms are characterized by more educated farmers, a greater degree of innovation, new irrigation technology, and an awareness of water issues and environmental sustainability. The findings of this study can be extended to farms in similar arid and semi-arid areas and contribute to fostering appropriate policies to improve the efficiency of water usage in the agricultural sector.

Particle filters for object tracking: enhanced algorithm and efficient implementations

International Nuclear Information System (INIS)

Abd El-Halym, H.A.

2010-01-01

Object tracking and recognition is a hot research topic. In spite of the extensive research efforts expended, the development of a robust and efficient object tracking algorithm remains unsolved due to the inherent difficulty of the tracking problem. Particle filters (PFs) were recently introduced as a powerful, post-Kalman filter, estimation tool that provides a general framework for estimation of nonlinear/ non-Gaussian dynamic systems. Particle filters were advanced for building robust object trackers capable of operation under severe conditions (small image size, noisy background, occlusions, fast object maneuvers ..etc.). The heavy computational load of the particle filter remains a major obstacle towards its wide use.In this thesis, an Excitation Particle Filter (EPF) is introduced for object tracking. A new likelihood model is proposed. It depends on multiple functions: position likelihood; gray level intensity likelihood and similarity likelihood. Also, we modified the PF as a robust estimator to overcome the well-known sample impoverishment problem of the PF. This modification is based on re-exciting the particles if their weights fall below a memorized weight value. The proposed enhanced PF is implemented in software and evaluated. Its results are compared with a single likelihood function PF tracker, Particle Swarm Optimization (PSO) tracker, a correlation tracker, as well as, an edge tracker. The experimental results demonstrated the superior performance of the proposed tracker in terms of accuracy, robustness, and occlusion compared with other methods Efficient novel hardware architectures of the Sample Important Re sample Filter (SIRF) and the EPF are implemented. Three novel hardware architectures of the SIRF for object tracking are introduced. The first architecture is a two-step sequential PF machine, where particle generation, weight calculation and normalization are carried out in parallel during the first step followed by a sequential re

Self-Assembled Supramolecular Architectures Lyotropic Liquid Crystals

CERN Document Server

Garti, Nissim

2012-01-01

This book will describe fundamentals and recent developments in the area of Self-Assembled Supramolecular Architecture and their relevance to the  understanding of the functionality of  membranes  as delivery systems for active ingredients. As the heirarchial architectures determine their performance capabilities, attention will be paid to theoretical and design aspects related to the construction of lyotropic liquid crystals: mesophases such as lamellar, hexagonal, cubic, sponge phase micellosomes. The book will bring to the reader mechanistic aspects, compositional c

Constellation Architecture Team-Lunar Scenario 12.0 Habitation Overview

Science.gov (United States)

Kennedy, Kriss J.; Toups, Larry D.; Rudisill, Marianne

2010-01-01

This paper will describe an overview of the Constellation Architecture Team Lunar Scenario 12.0 (LS-12) surface habitation approach and concept performed during the study definition. The Lunar Scenario 12 architecture study focused on two primary habitation approaches: a horizontally-oriented habitation module (LS-12.0) and a vertically-oriented habitation module (LS-12.1). This paper will provide an overview of the 12.0 lunar surface campaign, the associated outpost architecture, habitation functionality, concept description, system integration strategy, mass and power resource estimates. The Scenario 12 architecture resulted from combining three previous scenario attributes from Scenario 4 "Optimized Exploration", Scenario 5 "Fission Surface Power System" and Scenario 8 "Initial Extensive Mobility" into Scenario 12 along with an added emphasis on defining the excursion ConOps while the crew is away from the outpost location. This paper will describe an overview of the CxAT-Lunar Scenario 12.0 habitation concepts and their functionality. The Crew Operations area includes basic crew accommodations such as sleeping, eating, hygiene and stowage. The EVA Operations area includes additional EVA capability beyond the suitlock function such as suit maintenance, spares stowage, and suit stowage. The Logistics Operations area includes the enhanced accommodations for 180 days such as enhanced life support systems hardware, consumable stowage, spares stowage, interconnection to the other habitation elements, a common interface mechanism for future growth, and mating to a pressurized rover or Pressurized Logistics Module (PLM). The Mission & Science Operations area includes enhanced outpost autonomy such as an IVA glove box, life support, medical operations, and exercise equipment.

Sustainable Education Campus in Spain: Nature and Architecture for Training

Science.gov (United States)

Calvo-Sotelo, Pablo Campos

2008-01-01

The quality of education is intimately linked to its architecture. Any urbanistic/architectural project must stem from an in-depth study of the area's characteristics, taken in the broad geographical, climatic, cultural, functional and ideological sense. The site should provide the conceptual energy from which a campus draws life. This requirement…

Solar radiation use efficiency and morphophysiological indices in common bean cultivars

Directory of Open Access Journals (Sweden)

Gisele Carneiro da Silva Teixeira

2015-03-01

Full Text Available Common bean crops present a broad edaphoclimatic adaptation, allowing their cultivation throughout the year. However, in order to reach good economic income levels, it is fundamental to understand the processes that affect the growth and development of the crop in various environments. This study aimed to compare two common bean cultivars (BRS Radiante and Pérola contrasting in cycle and growth behavior by using morphophysiological indices and solar radiation use efficiency. The following traits were evaluated: light extinction coefficient, radiation use efficiency, phenologic development, leaf area index, total dry matter weight, crop growth rate, relative growth rate and dry matter partitioning. The BRS Radiante cultivar shows a higher vigor, when compared to the Pérola cultivar, due to its faster initial phenologic development and higher initial and relative growth rates. Both cultivars differ for leaf area index and shoot architecture, although that does not happen for light extinction coefficient. The BRS Radiante cultivar shows a higher solar radiation use efficiency, resulting in a greater dry matter yield throughout its development.

Software architecture 2

CERN Document Server

Oussalah, Mourad Chabanne

2014-01-01

Over the past 20 years, software architectures have significantly contributed to the development of complex and distributed systems. Nowadays, it is recognized that one of the critical problems in the design and development of any complex software system is its architecture, i.e. the organization of its architectural elements. Software Architecture presents the software architecture paradigms based on objects, components, services and models, as well as the various architectural techniques and methods, the analysis of architectural qualities, models of representation of architectural templa

Lightweight enterprise architectures

CERN Document Server

Theuerkorn, Fenix

2004-01-01

STATE OF ARCHITECTUREArchitectural ChaosRelation of Technology and Architecture The Many Faces of Architecture The Scope of Enterprise Architecture The Need for Enterprise ArchitectureThe History of Architecture The Current Environment Standardization Barriers The Need for Lightweight Architecture in the EnterpriseThe Cost of TechnologyThe Benefits of Enterprise Architecture The Domains of Architecture The Gap between Business and ITWhere Does LEA Fit? LEA's FrameworkFrameworks, Methodologies, and Approaches The Framework of LEATypes of Methodologies Types of ApproachesActual System Environmen

Software architecture 1

CERN Document Server

Oussalah , Mourad Chabane

2014-01-01

Over the past 20 years, software architectures have significantly contributed to the development of complex and distributed systems. Nowadays, it is recognized that one of the critical problems in the design and development of any complex software system is its architecture, i.e. the organization of its architectural elements. Software Architecture presents the software architecture paradigms based on objects, components, services and models, as well as the various architectural techniques and methods, the analysis of architectural qualities, models of representation of architectural template

A preferential design approach for energy-efficient and robust implantable neural signal processing hardware.

Science.gov (United States)

Narasimhan, Seetharam; Chiel, Hillel J; Bhunia, Swarup

2009-01-01

For implantable neural interface applications, it is important to compress data and analyze spike patterns across multiple channels in real time. Such a computational task for online neural data processing requires an innovative circuit-architecture level design approach for low-power, robust and area-efficient hardware implementation. Conventional microprocessor or Digital Signal Processing (DSP) chips would dissipate too much power and are too large in size for an implantable system. In this paper, we propose a novel hardware design approach, referred to as "Preferential Design" that exploits the nature of the neural signal processing algorithm to achieve a low-voltage, robust and area-efficient implementation using nanoscale process technology. The basic idea is to isolate the critical components with respect to system performance and design them more conservatively compared to the noncritical ones. This allows aggressive voltage scaling for low power operation while ensuring robustness and area efficiency. We have applied the proposed approach to a neural signal processing algorithm using the Discrete Wavelet Transform (DWT) and observed significant improvement in power and robustness over conventional design.

A Low Cost VLSI Architecture for Spike Sorting Based on Feature Extraction with Peak Search.

Science.gov (United States)

Chang, Yuan-Jyun; Hwang, Wen-Jyi; Chen, Chih-Chang

2016-12-07

The goal of this paper is to present a novel VLSI architecture for spike sorting with high classification accuracy, low area costs and low power consumption. A novel feature extraction algorithm with low computational complexities is proposed for the design of the architecture. In the feature extraction algorithm, a spike is separated into two portions based on its peak value. The area of each portion is then used as a feature. The algorithm is simple to implement and less susceptible to noise interference. Based on the algorithm, a novel architecture capable of identifying peak values and computing spike areas concurrently is proposed. To further accelerate the computation, a spike can be divided into a number of segments for the local feature computation. The local features are subsequently merged with the global ones by a simple hardware circuit. The architecture can also be easily operated in conjunction with the circuits for commonly-used spike detection algorithms, such as the Non-linear Energy Operator (NEO). The architecture has been implemented by an Application-Specific Integrated Circuit (ASIC) with 90-nm technology. Comparisons to the existing works show that the proposed architecture is well suited for real-time multi-channel spike detection and feature extraction requiring low hardware area costs, low power consumption and high classification accuracy.

Indigenous architecture as a context-oriented architecture, a look at ...

African Journals Online (AJOL)

What has become problematic as the achievement of international style and globalization of architecture during the time has been the purely technological look at architecture, and the architecture without belonging to a place. In recent decades, the topic of sustainable architecture and reconsidering indigenous architecture ...

A Smart Gateway Architecture for Improving Efficiency of Home Network Applications

OpenAIRE

Ding, Fei; Song, Aiguo; Tong, En; Li, Jianqing

2016-01-01

A smart home gateway plays an important role in the Internet of Things (IoT) system that takes responsibility for the connection between the network layer and the ubiquitous sensor network (USN) layer. Even though the home network application is developing rapidly, researches on the home gateway based open development architecture are less. This makes it difficult to extend the home network to support new applications, share service, and interoperate with other home network systems. An integr...

Landscape architecture as an entity of property development in Wilayah Persekutuan, Putrajaya

Directory of Open Access Journals (Sweden)

Ahmad Nasyution bin Abdul Razak

2015-12-01

Full Text Available This study explores the relationship between landscape architecture and property development. Landscape architecture emphasizes the nature of conservation, development of public parks, city parks, local parks, artificial forests, lakes, recreational areas, outdoor recreation centers, open space systems and other components of landscape architecture in providing opportunities and benefits for real estate development. Backed by ample literature review, this study reveals the significant relationship between land, real estate and landscape architecture. Landscape architecture which provides an open park and green space can be expanded to benefit the social, environment and economy through optimal used of space in property development project. Hence, this study discusses the objectives which are to determine significant factors in the development of landscape architecture, to identify the importance of landscape architecture in real estate development, and to assess the relationship between landscape architecture and property development land. This study involved 50 respondents from renowned developers; Putrajaya Holdings Sdn Bhd (PJH, Selangor State Development Corporation (PKNS, the local authority; Putrajaya Corporation (PPJ, Kajang Municipal Council (MPKj, relevant agencies; Valuation and Property Services Department-JPPH (Ministry of Finance, Department of Town and Country Planning (Peninsular Malaysia, developers registered with ReHDA and residents / property owners in the study area. To conclude, this study offers adequate benefits to policy makers, also relevant agencies such as the local authorities, landowners, property developers, the relevant professionals and communities on the positive effects and significant relationships between landscape architecture and property development.

Approaching the Ultimate Limits of Communication Efficiency with a Photon-Counting Detector

Science.gov (United States)

Erkmen, Baris; Moision, Bruce; Dolinar, Samuel J.; Birnbaum, Kevin M.; Divsalar, Dariush

2012-01-01

Coherent states achieve the Holevo capacity of a pure-loss channel when paired with an optimal measurement, but a physical realization of this measurement is as of yet unknown, and it is also likely to be of high complexity. In this paper, we focus on the photon-counting measurement and study the photon and dimensional efficiencies attainable with modulations over classical- and nonclassical-state alphabets. We first review the state-of-the-art coherent on-off-keying (OOK) with a photoncounting measurement, illustrating its asymptotic inefficiency relative to the Holevo limit. We show that a commonly made Poisson approximation in thermal noise leads to unbounded photon information efficiencies, violating the conjectured Holevo limit. We analyze two binary-modulation architectures that improve upon the dimensional versus photon efficiency tradeoff achievable with conventional OOK. We show that at high photon efficiency these architectures achieve an efficiency tradeoff that differs from the best possible tradeoff--determined by the Holevo capacity--by only a constant factor. The first architecture we analyze is a coherent-state transmitter that relies on feedback from the receiver to control the transmitted energy. The second architecture uses a single-photon number-state source.

Fault-tolerant architectures for superconducting qubits

International Nuclear Information System (INIS)

DiVincenzo, David P

2009-01-01

In this short review, I draw attention to new developments in the theory of fault tolerance in quantum computation that may give concrete direction to future work in the development of superconducting qubit systems. The basics of quantum error-correction codes, which I will briefly review, have not significantly changed since their introduction 15 years ago. But an interesting picture has emerged of an efficient use of these codes that may put fault-tolerant operation within reach. It is now understood that two-dimensional surface codes, close relatives of the original toric code of Kitaev, can be adapted as shown by Raussendorf and Harrington to effectively perform logical gate operations in a very simple planar architecture, with error thresholds for fault-tolerant operation simulated to be 0.75%. This architecture uses topological ideas in its functioning, but it is not 'topological quantum computation'-there are no non-abelian anyons in sight. I offer some speculations on the crucial pieces of superconducting hardware that could be demonstrated in the next couple of years that would be clear stepping stones towards this surface-code architecture.

Computer Architecture Techniques for Power-Efficiency

CERN Document Server

Kaxiras, Stefanos

2008-01-01

In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these

Architectural space characteristics facilitating teaching and apprenticeship

Directory of Open Access Journals (Sweden)

Maria do Carmo de Lima Bezerra

2016-06-01

Full Text Available The article discusses the relevance of the architectural space as a facilitator of teaching and learning processes. It adopts an analytical methodology based on the architecture and pedagogy literature to know the view of these areas on the subject, and identifies relevant spatial attributes to facilitate education. Research has shown that there are recurrences pointing disciplinary fields of environmental comfort, ergonomics and environmental psychology, which were the subject of this conceptual research about the positive and negative impacts on the school design facility by each attribute of these disciplines. As result, it presents a framework of attributes, characteristics and relevance to teaching and learning to be used as support to the space needs assessment, ie: during the first stage of an architectural design process.

Architectural transformations in network services and distributed systems

CERN Document Server

Luntovskyy, Andriy

2017-01-01

With the given work we decided to help not only the readers but ourselves, as the professionals who actively involved in the networking branch, with understanding the trends that have developed in recent two decades in distributed systems and networks. Important architecture transformations of distributed systems have been examined. The examples of new architectural solutions are discussed. Content Periodization of service development Energy efficiency Architectural transformations in Distributed Systems Clustering and Parallel Computing, performance models Cloud Computing, RAICs, Virtualization, SDN Smart Grid, Internet of Things, Fog Computing Mobile Communication from LTE to 5G, DIDO, SAT-based systems Data Security Guaranteeing Distributed Systems Target Groups Students in EE and IT of universities and (dual) technical high schools Graduated engineers as well as teaching staff About the Authors Andriy Luntovskyy provides classes on networks, mobile communication, software technology, distributed systems, ...

Space-Filling Supercapacitor Carpets: Highly scalable fractal architecture for energy storage

Science.gov (United States)

Tiliakos, Athanasios; Trefilov, Alexandra M. I.; Tanasǎ, Eugenia; Balan, Adriana; Stamatin, Ioan

2018-04-01

Revamping ground-breaking ideas from fractal geometry, we propose an alternative micro-supercapacitor configuration realized by laser-induced graphene (LIG) foams produced via laser pyrolysis of inexpensive commercial polymers. The Space-Filling Supercapacitor Carpet (SFSC) architecture introduces the concept of nested electrodes based on the pre-fractal Peano space-filling curve, arranged in a symmetrical equilateral setup that incorporates multiple parallel capacitor cells sharing common electrodes for maximum efficiency and optimal length-to-area distribution. We elucidate on the theoretical foundations of the SFSC architecture, and we introduce innovations (high-resolution vector-mode printing) in the LIG method that allow for the realization of flexible and scalable devices based on low iterations of the Peano algorithm. SFSCs exhibit distributed capacitance properties, leading to capacitance, energy, and power ratings proportional to the number of nested electrodes (up to 4.3 mF, 0.4 μWh, and 0.2 mW for the largest tested model of low iteration using aqueous electrolytes), with competitively high energy and power densities. This can pave the road for full scalability in energy storage, reaching beyond the scale of micro-supercapacitors for incorporating into larger and more demanding applications.

Design and Field Experimentation of a Cooperative ITS Architecture Based on Distributed RSUs

Directory of Open Access Journals (Sweden)

Asier Moreno

2016-07-01

Full Text Available This paper describes a new cooperative Intelligent Transportation System architecture that aims to enable collaborative sensing services. The main goal of this architecture is to improve transportation efficiency and performance. The system, which has been proven within the participation in the ICSI (Intelligent Cooperative Sensing for Improved traffic efficiency European project, encompasses the entire process of capture and management of available road data. For this purpose, it applies a combination of cooperative services and methods for data sensing, acquisition, processing and communication amongst road users, vehicles, infrastructures and related stakeholders. Additionally, the advantages of using the proposed system are exposed. The most important of these advantages is the use of a distributed architecture, moving the system intelligence from the control centre to the peripheral devices. The global architecture of the system is presented, as well as the software design and the interaction between its main components. Finally, functional and operational results observed through the experimentation are described. This experimentation has been carried out in two real scenarios, in Lisbon (Portugal and Pisa (Italy.

A Benefit Analysis of Infusing Wireless into Aircraft and Fleet Operations - Report to Seedling Project Efficient Reconfigurable Cockpit Design and Fleet Operations Using Software Intensive, Network Enabled, Wireless Architecture (ECON)

Science.gov (United States)

Alexandrov, Natalia; Holmes, Bruce J.; Hahn, Andrew S.

2016-01-01

We report on an examination of potential benefits of infusing wireless technologies into various areas of aircraft and airspace operations. The analysis is done in support of a NASA seedling project Efficient Reconfigurable Cockpit Design and Fleet Operations Using Software Intensive, Network Enabled Wireless Architecture (ECON). The study has two objectives. First, we investigate one of the main benefit hypotheses of the ECON proposal: that the replacement of wired technologies with wireless would lead to significant weight reductions on an aircraft, among other benefits. Second, we advance a list of wireless technology applications and discuss their system benefits. With regard to the primary hypothesis, we conclude that the promise of weight reduction is premature. Specificity of the system domain and aircraft, criticality of components, reliability of wireless technologies, the weight of replacement or augmentation equipment, and the cost of infusion must all be taken into account among other considerations, to produce a reliable estimate of weight savings or increase.

Architectural acoustics and the heritage of theater architecture in Andalusia (Acustica arquitectonica y patrimonio teatral en Andalucia)

Science.gov (United States)

Leon, Angel Luis

2003-11-01

This thesis reports on the study of the acoustic properties of 18 theaters belonging to the Andalusian historical and architectural heritage. These theaters have undergone recent renovations to modernize and equip them appropriately. Coincident with this work, evaluations and qualification assessments with regard to their acoustic properties have been carried out for the individual theaters and for the group as a whole. Data measurements for this purpose consisted of acoustic measurements in situ, both before the renovation and after the renovation. These results have been compared with computer simulations of sound fields. Variables and parameters considered include the following: reverberation time, rapid speech transition index, back-ground noise, definition, clarity, strength, lateral efficiency, interaural cross-correlation coefficient, volume/seat ratio, volume/audience-area ratio. Based on the measurements and analysis, general conclusions are given in regard to the acoustic performance of theaters whose typology and size are comparable to those that were used in this study (between 800 and 8000 cubic meters). It is noted that these properties are comparable to those of the majority of European theaters. The results and conclusions are presented so that they should be of interest to architectural acoustics practitioners and to architects who are involved in the planning of renovation projects for theaters Thesis advisors: Juan J. Sendra and Jaime Navarro Copies of this thesis written in Spanish may be obtained by contacting the author, Angel L. Leon, E.T.S. de Arquitectura de Sevilla, Dpto. de Construcciones Arquitectonicas I, Av. Reina Mercedes, 2, 41012 Sevilla, Spain. E-mail address: leonr@us.es

A Comparative Study on Chinese Architecture in Peninsular Malaysia and Mainland China

Directory of Open Access Journals (Sweden)

Somayeh Armani

2014-12-01

Full Text Available Chinese architecture is one of the most prevailing architectural styles in Peninsular Malaysia, which is inspired from architectural specimens in Mainland China. It can be stated that the Chinese structures in the Peninsula are variations of Chinese architecture in Mainland China since the Chinese builders in this area have faced the long journey of migration, assimilation and integration with new culture and environment. This paper intends to focus on this architecture, its various typology and characteristics, and comprehend it in deeper levels by providing comparison between this architectural style in Peninsular Malaysia and Mainland China. To achieve this goal, this article applied Historical-Comparative Research method, during which a variety of evidence concerning classical Chinese architecture in Mainland China as well as Peninsular Malaysia was compared and interpreted. Findings in this article show that Chinese architecture in Peninsular Malaysia mainly follows Southern China's architectural style, whilst Northern China's architectural influence is perceivable in the later stage of its development.

Exploring Relationships between Canopy Architecture, Light Distribution, and Photosynthesis in Contrasting Rice Genotypes Using 3D Canopy Reconstruction

Directory of Open Access Journals (Sweden)

Alexandra J. Burgess

2017-05-01

Full Text Available The arrangement of leaf material is critical in determining the light environment, and subsequently the photosynthetic productivity of complex crop canopies. However, links between specific canopy architectural traits and photosynthetic productivity across a wide genetic background are poorly understood for field grown crops. The architecture of five genetically diverse rice varieties—four parental founders of a multi-parent advanced generation intercross (MAGIC population plus a high yielding Philippine variety (IR64—was captured at two different growth stages using a method for digital plant reconstruction based on stereocameras. Ray tracing was employed to explore the effects of canopy architecture on the resulting light environment in high-resolution, whilst gas exchange measurements were combined with an empirical model of photosynthesis to calculate an estimated carbon gain and total light interception. To further test the impact of different dynamic light patterns on photosynthetic properties, an empirical model of photosynthetic acclimation was employed to predict the optimal light-saturated photosynthesis rate (Pmax throughout canopy depth, hypothesizing that light is the sole determinant of productivity in these conditions. First, we show that a plant type with steeper leaf angles allows more efficient penetration of light into lower canopy layers and this, in turn, leads to a greater photosynthetic potential. Second the predicted optimal Pmax responds in a manner that is consistent with fractional interception and leaf area index across this germplasm. However, measured Pmax, especially in lower layers, was consistently higher than the optimal Pmax indicating factors other than light determine photosynthesis profiles. Lastly, varieties with more upright architecture exhibit higher maximum quantum yield of photosynthesis indicating a canopy-level impact on photosynthetic efficiency.

Rational Strategies for Efficient Perovskite Solar Cells.

Science.gov (United States)

Seo, Jangwon; Noh, Jun Hong; Seok, Sang Il

2016-03-15

A long-standing dream in the large scale application of solar energy conversion is the fabrication of solar cells with high-efficiency and long-term stability at low cost. The realization of such practical goals depends on the architecture, process and key materials because solar cells are typically constructed from multilayer heterostructures of light harvesters, with electron and hole transporting layers as a major component. Recently, inorganic-organic hybrid lead halide perovskites have attracted significant attention as light absorbers for the fabrication of low-cost and high-efficiency solar cells via a solution process. This mainly stems from long-range ambipolar charge transport properties, low exciton binding energies, and suitable band gap tuning by managing the chemical composition. In our pioneering work, a new photovoltaic platform for efficient perovskite solar cells (PSCs) was proposed, which yielded a high power conversion efficiency (PCE) of 12%. The platform consisted of a pillared architecture of a three-dimensional nanocomposite of perovskites fully infiltrating mesoporous TiO2, resulting in the formation of continuous phases and perovskite domains overlaid with a polymeric hole conductor. Since then, the PCE of our PSCs has been rapidly increased from 3% to over 20% certified efficiency. The unprecedented increase in the PCE can be attributed to the effective integration of the advantageous attributes of the refined bicontinuous architecture, deposition process, and composition of perovskite materials. Specifically, the bicontinuous architectures used in the high efficiency comprise a layer of perovskite sandwiched between mesoporous metal-oxide layer, which is a very thinner than that of used in conventional dye-sensitized solar cells, and hole-conducting contact materials with a metal back contact. The mesoporous scaffold can affect the hysteresis under different scan direction in measurements of PSCs. The hysteresis also greatly depends on

A Software Reference Architecture for Service-Oriented 3D Geovisualization Systems

Directory of Open Access Journals (Sweden)

Dieter Hildebrandt

2014-12-01

Full Text Available Modern 3D geovisualization systems (3DGeoVSs are complex and evolving systems that are required to be adaptable and leverage distributed resources, including massive geodata. This article focuses on 3DGeoVSs built based on the principles of service-oriented architectures, standards and image-based representations (SSI to address practically relevant challenges and potentials. Such systems facilitate resource sharing and agile and efficient system construction and change in an interoperable manner, while exploiting images as efficient, decoupled and interoperable representations. The software architecture of a 3DGeoVS and its underlying visualization model have strong effects on the system’s quality attributes and support various system life cycle activities. This article contributes a software reference architecture (SRA for 3DGeoVSs based on SSI that can be used to design, describe and analyze concrete software architectures with the intended primary benefit of an increase in effectiveness and efficiency in such activities. The SRA integrates existing, proven technology and novel contributions in a unique manner. As the foundation for the SRA, we propose the generalized visualization pipeline model that generalizes and overcomes expressiveness limitations of the prevalent visualization pipeline model. To facilitate exploiting image-based representations (IReps, the SRA integrates approaches for the representation, provisioning and styling of and interaction with IReps. Five applications of the SRA provide proofs of concept for the general applicability and utility of the SRA. A qualitative evaluation indicates the overall suitability of the SRA, its applications and the general approach of building 3DGeoVSs based on SSI.

Time-area efficient multiplier-free filter architectures for FPGA implementation

DEFF Research Database (Denmark)

Shajaan, Mohammad; Nielsen, Karsten; Sørensen, John Aasted

1995-01-01

Simultaneous design of multiplier-free filters and their hardware implementation in Xilinx field programmable gate array (XC4000) is presented. The filter synthesis method is a new approach based on cascade coupling of low order sections. The complexity of the design algorithm is 𝒪 (filter o...

An Architecture for Automated Fire Detection Early Warning System Based on Geoprocessing Service Composition

Science.gov (United States)

Samadzadegan, F.; Saber, M.; Zahmatkesh, H.; Joze Ghazi Khanlou, H.

2013-09-01

Rapidly discovering, sharing, integrating and applying geospatial information are key issues in the domain of emergency response and disaster management. Due to the distributed nature of data and processing resources in disaster management, utilizing a Service Oriented Architecture (SOA) to take advantages of workflow of services provides an efficient, flexible and reliable implementations to encounter different hazardous situation. The implementation specification of the Web Processing Service (WPS) has guided geospatial data processing in a Service Oriented Architecture (SOA) platform to become a widely accepted solution for processing remotely sensed data on the web. This paper presents an architecture design based on OGC web services for automated workflow for acquisition, processing remotely sensed data, detecting fire and sending notifications to the authorities. A basic architecture and its building blocks for an automated fire detection early warning system are represented using web-based processing of remote sensing imageries utilizing MODIS data. A composition of WPS processes is proposed as a WPS service to extract fire events from MODIS data. Subsequently, the paper highlights the role of WPS as a middleware interface in the domain of geospatial web service technology that can be used to invoke a large variety of geoprocessing operations and chaining of other web services as an engine of composition. The applicability of proposed architecture by a real world fire event detection and notification use case is evaluated. A GeoPortal client with open-source software was developed to manage data, metadata, processes, and authorities. Investigating feasibility and benefits of proposed framework shows that this framework can be used for wide area of geospatial applications specially disaster management and environmental monitoring.

AN ARCHITECTURE FOR AUTOMATED FIRE DETECTION EARLY WARNING SYSTEM BASED ON GEOPROCESSING SERVICE COMPOSITION

Directory of Open Access Journals (Sweden)

F. Samadzadegan

2013-09-01

Full Text Available Rapidly discovering, sharing, integrating and applying geospatial information are key issues in the domain of emergency response and disaster management. Due to the distributed nature of data and processing resources in disaster management, utilizing a Service Oriented Architecture (SOA to take advantages of workflow of services provides an efficient, flexible and reliable implementations to encounter different hazardous situation. The implementation specification of the Web Processing Service (WPS has guided geospatial data processing in a Service Oriented Architecture (SOA platform to become a widely accepted solution for processing remotely sensed data on the web. This paper presents an architecture design based on OGC web services for automated workflow for acquisition, processing remotely sensed data, detecting fire and sending notifications to the authorities. A basic architecture and its building blocks for an automated fire detection early warning system are represented using web-based processing of remote sensing imageries utilizing MODIS data. A composition of WPS processes is proposed as a WPS service to extract fire events from MODIS data. Subsequently, the paper highlights the role of WPS as a middleware interface in the domain of geospatial web service technology that can be used to invoke a large variety of geoprocessing operations and chaining of other web services as an engine of composition. The applicability of proposed architecture by a real world fire event detection and notification use case is evaluated. A GeoPortal client with open-source software was developed to manage data, metadata, processes, and authorities. Investigating feasibility and benefits of proposed framework shows that this framework can be used for wide area of geospatial applications specially disaster management and environmental monitoring.

Spectrum emission considerations for baseband-modeled CALLUM architectures

DEFF Research Database (Denmark)

Strandberg, Roland; Andreani, Pietro; Sundström, Lars

2005-01-01

Linear-transmitters based on combined analog locked loop universal modulator (CALLUM) architectures are attractive, as they promise both high efficiency and high linearity. To date, it has not been possible to analyze a CALLUM transmitter as a linear feedback network due to the nonlinear nature o...

A review on DC/DC converter architectures for power fuel cell applications

International Nuclear Information System (INIS)

Kolli, Abdelfatah; Gaillard, Arnaud; De Bernardinis, Alexandre; Bethoux, Olivier; Hissel, Daniel; Khatir, Zoubir

2015-01-01

Highlights: • Different DC/DC power converter topologies for Fuel Cell systems are presented. • Advantages and drawbacks of the DC/DC power converter topologies are detailed. • Wide-BandGap semiconductors are attractive candidates for design of converters. • Wide-BandGap semiconductors improve efficiency and thermal limits of converters. • Different semiconductor technologies are assessed. - Abstract: Fuel cell-based power sources are attractive devices. Through multi-stack architecture, they offer flexibility, reliability, and efficiency. Keys to accessing the market are simplifying its architecture and each components. These include, among others, the power converter enabling the output voltage regulation. This article focuses on this specific component. The present paper gives a comprehensive overview of the power converter interfaces potentially favorable for the automotive, railways, aircrafts and small stationary domains. First, with respect to the strategic development of a modular design, it defines the specifications of a basic interface. Second, it inventories the best architecture opportunities with respect to these requirements. Based on this study, it fully designs a basic module and points out the outstanding contribution of the new developed silicon carbide switch technology. In conclusion, this review article exhibits the importance of choosing the right power converter architecture and the related technology. In this context it is highlighted that the output power interface can be efficient, compact and modular. In addition, its features enable a thermal compatibility with many ways of integrating this component in the global fuel cell based power source.

The Global Experience of Deployment of Energy-Efficient Technologies in High-Rise Construction

Science.gov (United States)

Potienko, Natalia D.; Kuznetsova, Anna A.; Solyakova, Darya N.; Klyueva, Yulia E.

2018-03-01

The objective of this research is to examine issues related to the increasing importance of energy-efficient technologies in high-rise construction. The aim of the paper is to investigate modern approaches to building design that involve implementation of various energy-saving technologies in diverse climates and at different structural levels, including the levels of urban development, functionality, planning, construction and engineering. The research methodology is based on the comprehensive analysis of the advanced global expertise in the design and construction of energy-efficient high-rise buildings, with the examination of their positive and negative features. The research also defines the basic principles of energy-efficient architecture. Besides, it draws parallels between the climate characteristics of countries that lead in the field of energy-efficient high-rise construction, on the one hand, and the climate in Russia, on the other, which makes it possible to use the vast experience of many countries, wholly or partially. The paper also gives an analytical review of the results arrived at by implementing energy efficiency principles into high-rise architecture. The study findings determine the impact of energy-efficient technologies on high-rise architecture and planning solutions. In conclusion, the research states that, apart from aesthetic and compositional interpretation of architectural forms, an architect nowadays has to address the task of finding a synthesis between technological and architectural solutions, which requires knowledge of advanced technologies. The study findings reveal that the implementation of modern energy-efficient technologies into high-rise construction is of immediate interest and is sure to bring long-term benefits.

Digital database architecture and delineation methodology for deriving drainage basins, and a comparison of digitally and non-digitally derived numeric drainage areas

Science.gov (United States)

Dupree, Jean A.; Crowfoot, Richard M.

2012-01-01

The drainage basin is a fundamental hydrologic entity used for studies of surface-water resources and during planning of water-related projects. Numeric drainage areas published by the U.S. Geological Survey water science centers in Annual Water Data Reports and on the National Water Information Systems (NWIS) Web site are still primarily derived from hard-copy sources and by manual delineation of polygonal basin areas on paper topographic map sheets. To expedite numeric drainage area determinations, the Colorado Water Science Center developed a digital database structure and a delineation methodology based on the hydrologic unit boundaries in the National Watershed Boundary Dataset. This report describes the digital database architecture and delineation methodology and also presents the results of a comparison of the numeric drainage areas derived using this digital methodology with those derived using traditional, non-digital methods. (Please see report for full Abstract)

The TDAQ Baseline Architecture

CERN Multimedia

Wickens, F J

The Trigger-DAQ community is currently busy preparing material for the DAQ, HLT and DCS TDR. Over the last few weeks a very important step has been a series of meetings to complete agreement on the baseline architecture. An overview of the architecture indicating some of the main parameters is shown in figure 1. As reported at the ATLAS Plenary during the February ATLAS week, the main area where the baseline had not yet been agreed was around the Read-Out System (ROS) and details in the DataFlow. The agreed architecture has: Read-Out Links (ROLs) from the RODs using S-Link; Read-Out Buffers (ROB) sited near the RODs, mounted in a chassis - today assumed to be a PC, using PCI bus at least for configuration, control and monitoring. The baseline assumes data aggregation, in the ROB and/or at the output (which could either be over a bus or in the network). Optimization of the data aggregation will be made in the coming months, but the current model has each ROB card receiving input from 4 ROLs, and 3 such c...

Nanotube devices based crossbar architecture: toward neuromorphic computing

International Nuclear Information System (INIS)

Zhao, W S; Gamrat, C; Agnus, G; Derycke, V; Filoramo, A; Bourgoin, J-P

2010-01-01

Nanoscale devices such as carbon nanotube and nanowires based transistors, memristors and molecular devices are expected to play an important role in the development of new computing architectures. While their size represents a decisive advantage in terms of integration density, it also raises the critical question of how to efficiently address large numbers of densely integrated nanodevices without the need for complex multi-layer interconnection topologies similar to those used in CMOS technology. Two-terminal programmable devices in crossbar geometry seem particularly attractive, but suffer from severe addressing difficulties due to cross-talk, which implies complex programming procedures. Three-terminal devices can be easily addressed individually, but with limited gain in terms of interconnect integration. We show how optically gated carbon nanotube devices enable efficient individual addressing when arranged in a crossbar geometry with shared gate electrodes. This topology is particularly well suited for parallel programming or learning in the context of neuromorphic computing architectures.

Evaluation of state-of-the-art hardware architectures for fast cone-beam CT reconstruction

CERN Document Server

Scherl, Holger

2011-01-01

Holger Scherl introduces the reader to the reconstruction problem in computed tomography and its major scientific challenges that range from computational efficiency to the fulfillment of Tuy's sufficiency condition. The assessed hardware architectures include multi- and many-core systems, cell broadband engine architecture, graphics processing units, and field programmable gate arrays.

The architecture of the management system of complex steganographic information

Science.gov (United States)

Evsutin, O. O.; Meshcheryakov, R. V.; Kozlova, A. S.; Solovyev, T. M.

2017-01-01

The aim of the study is to create a wide area information system that allows one to control processes of generation, embedding, extraction, and detection of steganographic information. In this paper, the following problems are considered: the definition of the system scope and the development of its architecture. For creation of algorithmic maintenance of the system, classic methods of steganography are used to embed information. Methods of mathematical statistics and computational intelligence are used to identify the embedded information. The main result of the paper is the development of the architecture of the management system of complex steganographic information. The suggested architecture utilizes cloud technology in order to provide service using the web-service via the Internet. It is meant to provide streams of multimedia data processing that are streams with many sources of different types. The information system, built in accordance with the proposed architecture, will be used in the following areas: hidden transfer of documents protected by medical secrecy in telemedicine systems; copyright protection of online content in public networks; prevention of information leakage caused by insiders.

LHCb Kalman filter cross architecture studies

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00388548

2017-01-01

The 2020 upgrade of the LHCb detector will vastly increase the rate of collisions the Online system needs to process in software, in order to filter events in real time. 30 million collisions per second will pass through a selection chain, where each step is executed conditional to its prior acceptance. The Kalman filter is a fit applied to all reconstructed tracks which, due to its time characteristics and early execution in the selection chain, consumes 40% of the whole reconstruction time in the current trigger software. This makes the Kalman filter a time-critical component as the LHCb trigger evolves into a full software trigger in the Upgrade. I present a new Kalman filter algorithm for LHCb that can efficiently make use of any kind of SIMD processor, and its design is explained in depth. Performance benchmarks are compared between a variety of hardware architectures, including x86_64 and Power8, and the Intel Xeon Phi accelerator, and the suitability of said architectures to efficiently perform th...

Architecture for the Secret-Key BC3 Cryptography Algorithm

Directory of Open Access Journals (Sweden)

Arif Sasongko

2014-11-01

Full Text Available Cryptography is a very important aspect in data security. The focus of research in this field is shifting from merely security aspect to consider as well the  implementation  aspect.  This  paper  aims  to  introduce  BC3  algorithm  with focus  on  its  hardware  implementation.  It  proposes  an  architecture  for  the hardware  implementation  for  this  algorithm.  BC3  algorithm  is  a  secret-key cryptography  algorithm  developed  with  two  considerations:  robustness  and implementation  efficiency.  This  algorithm  has  been  implemented  on  software and has good performance compared to AES algorithm. BC3 is improvement of BC2 and AE cryptographic algorithm and it is expected to have the same level of robustness and to gain competitive advantages in the implementation aspect. The development of the architecture gives much attention on (1 resource sharing and (2  having  single  clock  for  each  round.  It  exploits  regularity  of  the  algorithm. This architecture is then implemented on an FPGA. This implementation is three times smaller area than AES, but about five times faster. Furthermore, this BC3 hardware  implementation  has  better  performance  compared  to  BC3  software both in key expansion stage and randomizing stage. For the future, the security of this implementation must be reviewed especially against side channel attack.

Loop overhead reduction techniques for coarse grained reconfigurable architectures

NARCIS (Netherlands)

Vadivel, K.; Wijtvliet, M.; Jordans, R.; Corporaal, H.

2017-01-01

Due to their flexibility and high performance, Coarse Grained Reconfigurable Array (CGRA) are a topic of increasing research interest. However, CGRAs also have the potential to achieve very high energy efficiency in comparison to other reconfigurable architectures when hardware optimizations are

Inter organizational System Management for integrated service delivery: an Enterprise Architecture Perspective

OpenAIRE

Elmir, Abir; Elmir, Badr; Bounabat, Bouchaib

2015-01-01

Service sharing is a prominent operating model to support business. Many large inter-organizational networks have implemented some form of value added integrated services in order to reach efficiency and to reduce costs sustainably. Coupling Service orientation with enterprise architecture paradigm is very important at improving organizational performance through business process optimization. Indeed, enterprise architecture management is increasingly discussed because of information system r...

Control system architecture: The standard and non-standard models