WorldWideScience

Sample records for analog to digital converters

  1. Spectrometric analog-to-digital converter

    International Nuclear Information System (INIS)

    Ormandzhiev, S.I.; Jordanov, V.T.

    1988-01-01

    Converter of digit-by-digit counterbalancing with slipping dial with number of channels equal to total number of states of the main digital-to-analog converter of digit-by-digit counterbalancing systems is presented. Algorithm for selection of digital-to-analog converters, which must be used by means of computer is suggested

  2. Digital to Analog Converter Description

    NARCIS (Netherlands)

    van Tuijl, Adrianus Johannes Maria

    2002-01-01

    A circuit for analogue to digital or digital to analogue conversion comprising at least 2n matched current sources (40-1, 40-2, 40-n), where n is the resolution required of the conversion. Preferably more than 2n current sources (40-1, 40-2, 40-n) are used. The order in which the sources (40-1,

  3. Combined analog-to-digital converter

    International Nuclear Information System (INIS)

    Zhukov, A.V.; Rzhendinskaya, S.N.

    1983-01-01

    A 10-bit analog-to-digital converter (ADC) designed for operating in spectrometers with time-dependent filters is described. The ADC operation is based on combining the parallel reading and sequential counting methods. At maximum conversion time of 12 μs, timing series frequency of 25 MHz and foUr reference levels the differential nonlinearity withoUt statistical smoothing (maximum relative channel width deviation from average value) is not more than 4%

  4. Resonant Tunneling Analog-To-Digital Converter

    Science.gov (United States)

    Broekaert, T. P. E.; Seabaugh, A. C.; Hellums, J.; Taddiken, A.; Tang, H.; Teng, J.; vanderWagt, J. P. A.

    1995-01-01

    As sampling rates continue to increase, current analog-to-digital converter (ADC) device technologies will soon reach a practical resolution limit. This limit will most profoundly effect satellite and military systems used, for example, for electronic countermeasures, electronic and signal intelligence, and phased array radar. New device and circuit concepts will be essential for continued progress. We describe a novel, folded architecture ADC which could enable a technological discontinuity in ADC performance. The converter technology is based on the integration of multiple resonant tunneling diodes (RTD) and hetero-junction transistors on an indium phosphide substrate. The RTD consists of a layered semiconductor hetero-structure AlAs/InGaAs/AlAs(2/4/2 nm) clad on either side by heavily doped InGaAs contact layers. Compact quantizers based around the RTD offer a reduction in the number of components and a reduction in the input capacitance Because the component count and capacitance scale with the number of bits N, rather than by 2 (exp n) as in the flash ADC, speed can be significantly increased, A 4-bit 2-GSps quantizer circuit is under development to evaluate the performance potential. Circuit designs for ADC conversion with a resolution of 6-bits at 25GSps may be enabled by the resonant tunneling approach.

  5. Fast parallel-series analog-to-digital converter

    International Nuclear Information System (INIS)

    Pogosov, A.Yu.

    1987-01-01

    Fast analog-to-digital converters are used in systems for detection of rapid processes, nuclear spectroscopy. A 12-digit analog-to-digital converter with conversion time of 160 ns and conversion frequency of 8.3 MHz is described; a segmented digital-to-analog converter with differential non-linearity of < 0.01% and a differential amplifier-limiter with setting time of 80 ns at the error of 0.2% are utilized in the converter; a control device is based on the chain of flip-flop circuit

  6. Time-Interleaved Analog to Digital Converters

    NARCIS (Netherlands)

    Louwsma, S.M.; van Tuijl, Adrianus Johannes Maria; Nauta, Bram

    2010-01-01

    This book describes the research carried out by our PhD student Simon Louwsma at the University of Twente, The Netherlands in the field of high-speed Analogto- Digital (AD) converters. AD converters are crucial circuits for modern systems where information is stored or processed in digital form. Due

  7. High-speed and high-resolution analog-to-digital and digital-to-analog converters

    NARCIS (Netherlands)

    van de Plassche, R.J.

    1989-01-01

    Analog-to-digital and digital-to-analog converters are important building blocks connecting the analog world of transducers with the digital world of computing, signal processing and data acquisition systems. In chapter two the converter as part of a system is described. Requirements of analog

  8. Reference-Free CMOS Pipeline Analog-to-Digital Converters

    CERN Document Server

    Figueiredo, Michael; Evans, Guiomar

    2013-01-01

    This book shows that digitally assisted analog-to-digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low ...

  9. Energy savings assessment for digital-to-analog converter boxes

    International Nuclear Information System (INIS)

    Cheung, Hoi Ying; Meier, Alan; Brown, Richard

    2011-01-01

    The Digital Television (DTV) Converter Box Coupon Program was administered by the U.S. government to subsidize purchases of digital-to-analog converter boxes, with up to two $40 coupons for each eligible household. In order to qualify as Coupon Eligible Converter Boxes (CECBs), these devices had to meet a number of minimum performance specifications, including energy efficiency standards. The Energy Star Program also established voluntary energy efficiency specifications that are more stringent than the CECB requirements. In this study, we measured the power and energy consumptions for a sample of 12 CECBs (including 6 Energy Star labeled models) in-use in homes and estimated aggregate energy savings produced by the energy efficiency policies. Based on the 35 million coupons redeemed through the end of the program, our analysis indicates that between 2500 and 3700 GWh per year are saved as a result of the energy efficiency policies implemented on digital-to-analog converter boxes. The energy savings generated are equivalent to the annual electricity use of 280,000 average US homes. - Research highlights: → We examined energy efficiency policies on digital-to-analog converter boxes in US. → The government assistance program resulted in high participation. → 35 million coupons were redeemed for the purchases of energy efficient DTAs. → Between 2500 and 3700 GWh per year are saved as a result of the policies. → Savings are equivalent to the annual electricity use of 280,000 average US homes.

  10. Circuit with a successive approximation analog to digital converter

    NARCIS (Netherlands)

    Louwsma, S.M.; Vertregt, Maarten

    2011-01-01

    During successive approximation analog to digital conversion a series of successive digital reference values is selected that converges towards a digital representation of an analog input signal. An analog reference signal is generated dependent on the successive digital reference values and

  11. Circuit with a successive approximation analog to digital converter

    NARCIS (Netherlands)

    Louwsma, S.M.; Vertregt, Maarten

    2010-01-01

    During successive approximation analog to digital conversion a series of successive digital reference values is selected that converges towards a digital representation of an analog input signal. An analog reference signal is generated dependent on the successive digital reference values and

  12. New technologies for radiation-hardening analog to digital converters

    Science.gov (United States)

    Gauthier, M. K.

    1982-01-01

    Surveys of available Analog to Digital Converters (ADC) suitable for precision applications showed that none have the proper combination of accuracy and radiation hardness to meet space and/or strategic weapon requirements. A development program which will result in an ADC device which will serve a number of space and strategic applications. Emphasis was placed on approaches that could be integrated onto a single chip within three to five years.

  13. New technologies for radiation-hardening analog to digital converters

    International Nuclear Information System (INIS)

    Gauthier, M.K.

    1982-12-01

    Surveys of available Analog to Digital Converters (ADC) suitable for precision applications showed that none have the proper combination of accuracy and radiation hardness to meet space and/or strategic weapon requirements. A development program which will result in an ADC device which will serve a number of space and strategic applications. Emphasis was placed on approaches that could be integrated onto a single chip within three to five years

  14. The RHIC general purpose multiplexed analog to digital converter system

    International Nuclear Information System (INIS)

    Michnoff, R.

    1995-01-01

    A general purpose multiplexed analog to digital converter system is currently under development to support acquisition of analog signals for the Relativistic Heavy Ion Collider (RHIC) at Brookhaven National Laboratory. The system consists of a custom intelligent VME based controller module (V113) and a 14-bit 64 channel multiplexed A/D converter module (V114). The design features two independent scan groups, where one scan group is capable of acquiring 64 channels at 60 Hz, concurrently with the second scan group acquiring data at an aggregate rate of up to 80 k samples/second. An interface to the RHIC serially encoded event line is used to synchronize acquisition. Data is stored in a circular static RAM buffer on the controller module, then transferred to a commercial VMEbus CPU board and higher level workstations for plotting, report Generation, analysis and storage

  15. VHDL Implementation of Sigma-Delta Analog To Digital Converter

    Science.gov (United States)

    Chavan, R. N.; Chougule, D. G.

    2010-11-01

    Sigma-Delta modulation techniques provide a range of opportunities in a signal processing system for both increasing performance and data path optimization along the silicon area axis in the design space. One of the most challenging tasks in Analog to Digital Converter (ADC) design is to adapt the circuitry to ever new CMOS process technology. For digital circuits the number of gates per square mm app. doubles per chip generation. Integration of analog parts in newer deep submicron technologies is much more tough and additionally complicated because the usable voltage ranges are decreasing with every new integration step. This paper shows an approach which only uses 2 resistors and 1 capacitor which are located outside a pure digital chip. So all integration advantages of pure digital chips are preserved, there is no design effort for a new chip generation and the ADC also can be used for FPGAs. Resolutions of up to 16 bit are achievable. Sample rates in the 1 MHz region are feasible so that the approach is also useful for ADCs for xDSL technologies.

  16. Mismatch-Shaping Serial Digital-to-Analog Converter

    DEFF Research Database (Denmark)

    Steensgaard-Madsen, Jesper; Moon, Un-Ku; Temes, Gabor C.

    1999-01-01

    A simple but accurate pseudo-passive mismatch-shaping D/A converter is described. A digital state machine is used to control the switching sequence of a symmetric two-capacitor network that performs the D/A conversion. The error caused by capacitor mismatch is uncorrelated with the input signal...

  17. Very High-Performance Advanced Filter Bank Analog-to-Digital Converter (AFB ADC) Project

    National Research Council Canada - National Science Library

    Velazquez, Scott

    1999-01-01

    ... of the art by using a parallel array of individual commercial off the shelf converters. The significant performance improvements afforded by the Advanced Filter Bank Analog to Digital Converter (AFB ADC...

  18. Diamond-Shaped Semiconductor Ring Lasers for Analog to Digital Photonic Converters

    National Research Council Canada - National Science Library

    Green, Malcolm

    2004-01-01

    Photonic/ optoelectronic analog to digital converters (ADCs) have advantages in areas such as precise sampling times, narrow sampling apertures, and the ability to sample without contaminating the incident signal...

  19. Real time event selection and flash analog-to-digital converters

    International Nuclear Information System (INIS)

    Imori, Masatosi

    1983-01-01

    In high-energy particle experiments, high-speed analog logic is employed to select events on a real-time basis. Flash analog-to-digital converters replace the high-speed analog logic with digital logic. The digital logic gives great flexibility to the scheme for real-time event selection. This paper proposes the use of flash A/D converters for the logic used to obtain the total sum of the energy deposited in individual counters in a shower detector. (author)

  20. A study of analog-to digital sliding scale. Converter utilization

    Energy Technology Data Exchange (ETDEWEB)

    Maddaleno, F; Rossi, M

    1996-12-31

    The well-known Sliding Scale technique provides a statistical linearization of the Analog to Digital Converter, obtaining a high differential linearity. This technique sums at each conversion a known and uncorrelated variable signal (offset) to the analog input signal, and then subs tract numerically the offset from the conversion result. 2 refs.

  1. Analysis and characterization of cyclic-scale compensated analog-to-digital converters

    International Nuclear Information System (INIS)

    Gatti, E.; Manfredi, P.F.; Marino, D.

    1979-01-01

    The authors discuss characteristics and limitations of cyclic-scale compensated analog-to-digital converters. After summarizing the behaviour of the method implemented in an ideal way, they show how the inaccuracies in the auxillary analog levels affect the real design. Having stated under what approximations and with what cares a cyclic-scale compensated converter approaches the ideal case of channels having equal profiles, the consequences of this property, are studied. (Auth.)

  2. Ultra-Low-Power Analog-to-Digital Converters for Medical Applications

    OpenAIRE

    Zhang, Dai

    2014-01-01

    Biomedical systems are commonly attached to or implanted into human bodies, and powered by harvested energy or small batteries. In these systems, analog-to-digital converters (ADCs) are key components as the interface between the analog world and the digital domain. Conversion of the low frequency bioelectric signals does not require high speed, but ultralow- power operation. This combined with the required conversion accuracy makes the design of such ADCs a major challenge. Among prevalent A...

  3. 8-bit serial-parallel analog-to-digital converter for fast transient recorder

    International Nuclear Information System (INIS)

    Kulka, Z.; Nadachowski, M.; Zimek, Z.

    1990-08-01

    An 8-bit serial-parallel analog-to-digital converter with a sampling frequency 5 MHz is described. The most important circuits of the device are described and parameters are given. The converter is a central part of a transient recorder type TR-1 designed for recording pulse waveforms in measurements of the kinetics of chemical reactions which are radiation-induced using an electron linear accelerator. 9 refs., 9 figs. (author)

  4. All-optical analog-to-digital converter based on Kerr effect in photonic crystal

    Science.gov (United States)

    Jafari, Dariush; Nurmohammadi, Tofiq; Asadi, Mohammad Javad; Abbasian, Karim

    2018-05-01

    In this paper, a novel all-optical analog-to-digital converter (AOADC) is proposed and simulated for proof of principle. This AOADC is designed to operate in the range of telecom wavelength (1550 nm). A cavity made of nonlinear Kerr material in photonic crystal (PhC), is designed to achieve an optical analog-to-digital conversion with 1 Tera sample per second (TS/s) and the total footprint of 42 μm2 . The simulation is done using finite-difference time domain (FDTD) method.

  5. Fast successive approximation analog-to-digital converter

    Energy Technology Data Exchange (ETDEWEB)

    Gobbur, S G; Landis, D A; Goulding, F S [California Univ., Berkeley (USA). Lawrence Berkeley Lab.

    1977-01-15

    A new scheme has been developed for a 4096-channel (12-bit) successive approximation ADC which will allow more rapid coding than schemes commonly used at the present time. The allowable bit setting time for the major bits has been increased without adding to the total coding time. This is accomplished by permitting the initial accuracy of the setting of the major bits to be within eight channels. Towards the end of the coding time, when the major bits have settled, this error is corrected to an accuracy of a fraction of a channel. Using this scheme a differential nonlinearity of better than 20% has been achieved in the basic encoder with a total coding time of 4 ..mu..s. Applying a 6-bit sliding register (the method of Gatti) to the ADC, a differential nonlinearity less than 0.5% results in the complete ADC.

  6. Designed cell consortia as fragrance-programmable analog-to-digital converters.

    Science.gov (United States)

    Müller, Marius; Ausländer, Simon; Spinnler, Andrea; Ausländer, David; Sikorski, Julian; Folcher, Marc; Fussenegger, Martin

    2017-03-01

    Synthetic biology advances the rational engineering of mammalian cells to achieve cell-based therapy goals. Synthetic gene networks have nearly reached the complexity of digital electronic circuits and enable single cells to perform programmable arithmetic calculations or to provide dynamic remote control of transgenes through electromagnetic waves. We designed a synthetic multilayered gaseous-fragrance-programmable analog-to-digital converter (ADC) allowing for remote control of digital gene expression with 2-bit AND-, OR- and NOR-gate logic in synchronized cell consortia. The ADC consists of multiple sampling-and-quantization modules sensing analog gaseous fragrance inputs; a gas-to-liquid transducer converting fragrance intensity into diffusible cell-to-cell signaling compounds; a digitization unit with a genetic amplifier circuit to improve the signal-to-noise ratio; and recombinase-based digital expression switches enabling 2-bit processing of logic gates. Synthetic ADCs that can remotely control cellular activities with digital precision may enable the development of novel biosensors and may provide bioelectronic interfaces synchronizing analog metabolic pathways with digital electronics.

  7. Large-scale digitizer system, analog converters

    International Nuclear Information System (INIS)

    Althaus, R.F.; Lee, K.L.; Kirsten, F.A.; Wagner, L.J.

    1976-10-01

    Analog to digital converter circuits that are based on the sharing of common resources, including those which are critical to the linearity and stability of the individual channels, are described. Simplicity of circuit composition is valued over other more costly approaches. These are intended to be applied in a large-scale processing and digitizing system for use with high-energy physics detectors such as drift-chambers or phototube-scintillator arrays. Signal distribution techniques are of paramount importance in maintaining adequate signal-to-noise ratio. Noise in both amplitude and time-jitter senses is held sufficiently low so that conversions with 10-bit charge resolution and 12-bit time resolution are achieved

  8. Effects of Analog-to-Digital Converter Nonlinearities on Radar Range-Doppler Maps

    Energy Technology Data Exchange (ETDEWEB)

    Doerry, Armin Walter [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Dubbert, Dale F. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Tise, Bertice L. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2014-07-01

    Radar operation, particularly Ground Moving Target Indicator (GMTI) radar modes, are very sensitive to anomalous effects of system nonlinearities. These throw off harmonic spurs that are sometimes detected as false alarms. One significant source of nonlinear behavior is the Analog to Digital Converter (ADC). One measure of its undesired nonlinearity is its Integral Nonlinearity (INL) specification. We examine in this report the relationship of INL to GMTI performance.

  9. Radiation-hard analog-to-digital converters for space and strategic applications

    Science.gov (United States)

    Gauthier, M. K.; Dantas, A. R. V.

    1985-01-01

    During the course of the Jet Propulsion Laboratory's program to study radiation-hardened analog-to-digital converters (ADCs), numerous milestones have been reached in manufacturers' awareness and technology development and transfer, as well as in user awareness of these developments. The testing of ADCs has also continued with twenty different ADCs from seven manufacturers, all tested for total radiation dose and three tested for neutron effects. Results from these tests are reported.

  10. Multisensor transducer based on a parallel fiber optic digital-to-analog converter

    Directory of Open Access Journals (Sweden)

    Grechishnikov Vladimir

    2017-01-01

    Full Text Available Considered possibility of creating a multisensory information converter (MSPI based on new fiber-optic functional element-digital-to-analog (DAC fiber optic converter. The use of DAC fiber-optic provides jamming immunity combined with low weight and cost of indicators .Because of that MSPI scheme was developed based on parallel DAC fiber-optic (Russian Federation Patent 157416. We came up with an equation for parallel DAC fiber-optic. An eleborate general mathematical model of the proposed converter. Developed a method for reducing conversion errors by placing the DAC transfer function between i and i + 1 ADC quantization levels. By using this model it allows you to obtain reliable information about the technical capabilities of a converter without the need for costly experiments.

  11. Time-to-digital converters

    CERN Document Server

    Henzler, Stephan

    2010-01-01

    This text covers the fundamentals of time-to-digital converters on analog and digital conversion principles. It includes a theoretical investigation into quantization, linearity, noise and variability, and it details a range of advanced TDC architectures.

  12. SEM analysis of ionizing radiation effects in an analog to digital converter /AD571/

    Science.gov (United States)

    Gauthier, M. K.; Perret, J.; Evans, K. C.

    1981-01-01

    The considered investigation is concerned with the study of the total-dose degradation mechanisms in an IIL analog to digital (A/D) converter. The A/D converter is a 10 digit device having nine separate functional units on the chip which encompass several hundred transistors and circuit elements. It was the objective of the described research to find the radiation sensitive elements by a systematic search of the devices on the LSI chip. The employed technique using a scanning electron microscope to determine the functional blocks of an integrated circuit which are sensitive to ionizing radiation and then progressively zeroing in on the soft components within those blocks, proved extremely successful on the AD571. Four functional blocks were found to be sensitive to radiation, including the Voltage Reference, DAC, IIL Clock, and IIL SAR.

  13. Analog-to-digital conversion

    CERN Document Server

    Pelgrom, Marcel J M

    2010-01-01

    The design of an analog-to-digital converter or digital-to-analog converter is one of the most fascinating tasks in micro-electronics. In a converter the analog world with all its intricacies meets the realm of the formal digital abstraction. Both disciplines must be understood for an optimum conversion solution. In a converter also system challenges meet technology opportunities. Modern systems rely on analog-to-digital converters as an essential part of the complex chain to access the physical world. And processors need the ultimate performance of digital-to-analog converters to present the results of their complex algorithms. The same progress in CMOS technology that enables these VLSI digital systems creates new challenges for analog-to-digital converters: lower signal swings, less power and variability issues. Last but not least, the analog-to-digital converter must follow the cost reduction trend. These changing boundary conditions require micro-electronics engineers to consider their design choices for...

  14. Data input from an analog-to-digital converter into the M-6000 computer

    International Nuclear Information System (INIS)

    Kalashnikov, A.M.; Sheremet'ev, A.K.

    1978-01-01

    A device for spectrometric data input from the ADC-4096 into the M-6000 computer memory operating in the information storage regime is described. The input device made on integrated circuits coordinates signal levels of the fast response analog-to-digital converter and computer with the help of resistors and inverters. Besides, the input forms a strobe to trigger an increment channel used to record information into the computer memory. The use of the input device permits to get rid of the intermediate information storage in the analyzer memory and ensures fast response of the devices

  15. Design of integrated all optical digital to analog converter (DAC) using 2D photonic crystals

    Science.gov (United States)

    Moniem, Tamer A.; El-Din, Eman S.

    2017-11-01

    A novel design of all optical 3 bit digital to analog (DAC) converter will be presented in this paper based on 2 Dimension photonic crystals (PhC). The proposed structure is based on the photonic crystal ring resonators (PCRR) with combining the nonlinear Kerr effect on the PCRR. The total size of the proposed optical 3 bit DAC is equal to 44 μm × 37 μm of 2D square lattice photonic crystals of silicon rods with refractive index equal to 3.4. The finite different time domain (FDTD) and Plane Wave Expansion (PWE) methods are used to back the overall operation of the proposed optical DAC.

  16. Adaptive Reference Levels in a Level-Crossing Analog-to-Digital Converter

    Directory of Open Access Journals (Sweden)

    Andrew C. Singer

    2008-11-01

    Full Text Available Level-crossing analog-to-digital converters (LC ADCs have been considered in the literature and have been shown to efficiently sample certain classes of signals. One important aspect of their implementation is the placement of reference levels in the converter. The levels need to be appropriately located within the input dynamic range, in order to obtain samples efficiently. In this paper, we study optimization of the performance of such an LC ADC by providing several sequential algorithms that adaptively update the ADC reference levels. The accompanying performance analysis and simulation results show that as the signal length grows, the performance of the sequential algorithms asymptotically approaches that of the best choice that could only have been chosen in hindsight within a family of possible schemes.

  17. Real-time compression of analog-to-digital converter outputs

    International Nuclear Information System (INIS)

    Okumura, Haruhiko

    1997-01-01

    We describe a fast lossless data compression algorithm suitable for digitized data taken at regular time intervals, such as outputs from analog-to-digital converters (ADCs). It is designed on the assumptions that the present value can be predicted approximately from the past values, and that the distribution of the prediction error is approximately Gaussian with zero mean and small and slowly changing standard deviation. Unlike many offline compression tools such as LHA and gzip, our algorithm does not need future values to encode the present value. This property is important for real-time transmission of compressed data on the network. The algorithm is to be integrated into our data acquisition system for the Large Helical Device (LHD) experiments at the National Institute for Fusion Science (NIFS). (author)

  18. Proposition of a scheme for adaptive/intelligent analog-to-digital converters

    International Nuclear Information System (INIS)

    Vaidya, P.P.; Kataria, S.K.

    2001-01-01

    The paper proposes design of a new class of Analog to Digital Converters (ADC's) which we call as Intelligent ADC's with moving resolution. Unlike presently available ADC's which are designed for specific range of applications and give fixed resolution and conversion time, the intelligent ADC's described here can adjust their resolution during the process of conversion, depending upon nature of input signal to make optimum use of the hard-ware. It is possible to use an intelligent ADC to give resolution ranging from 8 bit to 16 bit and conversion time ranging from few nano sec. to few micro secs. These ADC's have significant advantages over conventional ones when used for nuclear pulse spectroscopy as well as for process control applications. (author)

  19. 4-bit digital to analog converter using R-2R ladder and binary weighted resistors

    Science.gov (United States)

    Diosanto, J.; Batac, M. L.; Pereda, K. J.; Caldo, R.

    2017-06-01

    The use of a 4-bit digital-to-analog converter using two methods; Binary Weighted Resistors and R-2R Ladder is designed and presented in this paper. The main components that were used in constructing both circuits were different resistor values, operational amplifier (LM741) and single pole double throw switches. Both circuits were designed using MULTISIM software to be able to test the circuit for its ideal application and FRITZING software for the layout designing and fabrication to the printed circuit board. The implementation of both systems in an actual circuit benefits in determining and comparing the advantages and disadvantages of each. It was realized that the binary weighted circuit is more efficient DAC, having lower percentage error of 0.267% compared to R-2R ladder circuit which has a minimum of percentage error of 4.16%.

  20. Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

    Science.gov (United States)

    Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

    2003-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

  1. A behavioral simulator for switched-capacitor sigma-delta modulator analog-to-digital converter

    International Nuclear Information System (INIS)

    San, H. Y.; Rezaul Hasan, S. M.

    1998-01-01

    In this paper, a PC-based simulator for state of the art oversampled switched-capacitor sigma-delta analog-to-digital converters is presented. The proposed simulator employs behavioral model of switched-capacitor integrator and non-linear quantizer to stimulate the system. The behavioral simulation of the integrator is also verified with SPICE. The simulator is fully integrated and standalone. It integrates an input netlist file interpreter, a behavioral simulator, a generic part library and a powerful post-processor to evaluate the SNR, SDR And TSNR. Both passive and active sensitivities can be investigated by the proposed simulator. The simulator is coded in C++, and is very fast

  2. 10-bit rapid single flux quantum digital-to-analog converter for ac voltage standard

    International Nuclear Information System (INIS)

    Maezawa, M; Hirayama, F

    2008-01-01

    Digital-to-analog (D/A) converters based on rapid single flux quantum (RSFQ) technology are under development for ac voltage standard applications. We present design and test results on a prototype 10-bit version integrated on a single chip. The 10-bit chip includes over 6000 Josephson junctions and consumes a bias current exceeding 1 A. To reduce the effects of the high bias current on circuit operation, a custom design method was employed in part and large circuit blocks were divided into smaller ones. The 10-bit chips were fabricated and tested at low speed. The test results suggested that our design approach could manage large bias currents on the order of 1 A per chip

  3. Deep Cryogenic Low Power 24 Bits Analog to Digital Converter with Active Reverse Cryostat

    Science.gov (United States)

    Turqueti, Marcos; Prestemon, Soren; Albright, Robert

    LBNL is developing an innovative data acquisition module for superconductive magnets where the front-end electronics and digitizer resides inside the cryostat. This electronic package allows conventional electronic technologies such as enhanced metal-oxide-semiconductor to work inside cryostats at temperatures as low as 4.2 K. This is achieved by careful management of heat inside the module that keeps the electronic envelop at approximately 85 K. This approach avoids all the difficulties that arise from changes in carrier mobility that occur in semiconductors at deep cryogenic temperatures. There are several advantages in utilizing this system. A significant reduction in electrical noise from signals captured inside the cryostat occurs due to the low temperature that the electronics is immersed in, reducing the thermal noise. The shorter distance that signals are transmitted before digitalization reduces pickup and cross-talk between channels. This improved performance in signal-to-noise rate by itself is a significant advantage. Another important advantage is the simplification of the feedthrough interface on the cryostat head. Data coming out of the cryostat is digital and serial, dramatically reducing the number of lines going through the cryostat feedthrough interface. It is important to notice that all lines coming out of the cryostat are digital and low voltage, reducing the possibility of electric breakdown inside the cryostat. This paper will explain in details the architecture and inner workings of this data acquisition system. It will also provide the performance of the analog to digital converter when the system is immersed in liquid helium, and in liquid nitrogen. Parameters such as power dissipation, integral non-linearity, effective number of bits, signal-to-noise and distortion, will be presented for both temperatures.

  4. FPGA implementation of a single-input fuzzy logic controller for boost converter with the absence of an external analog-to-digital converter

    DEFF Research Database (Denmark)

    Taeed, Fazel; Salam, Z.; Ayob, S.

    2012-01-01

    converter (ADC). Instead, a simple analog-to-digital conversion scheme is implemented using the FPGA itself. Due to the simplicity of the SIFLC algorithm and the absence of an external ADC, the overall implementation requires only 408 logic elements and five input-output pins of the FPGA.......) and applied on a 50-W boost converter. The SIFLC is compared to the proportional-integral controller; the simulation and practical results indicate that SIFLC exhibits excellent performance for step load and input reference changes. Another feature of this work is the absence of an external analog-to-digital...

  5. A new 12-bit spectroscopy analog-to-digital converter type SAA intended for CAMAC acquisition systems

    International Nuclear Information System (INIS)

    Borsuk, S.; Kulka, Z.

    1989-12-01

    A new 12-bit spectroscopy analog-to-digital converter (ADC) type SAA (Successive Approximation type with channel width Averaging) intended for CAMAC acquisition systems is decsribed. ADC type SAA initiates new series of spectroscopy ADC's based on a binary-approximation method in which differential nonlinearity is corrected by a statistical channel width averaging method. The structure and principle of operation, as well as some circuit realizations and specifications of the new converter are described. 41 refs., 5 figs. (author)

  6. LDRD final report: photonic analog-to-digital converter (ADC) technology; TOPICAL

    International Nuclear Information System (INIS)

    Bowers, M; Deri, B; Haigh, R; Lowry, M; Sargis, P; Stafford, R; Tong, T

    1999-01-01

    We report on an LDRD seed program of novel technology development (started by an FY98 Engineering Tech-base project) that will enable extremely high-fidelity analog-to-digital converters for a variety of national security missions. High speed (l0+ GS/s ), high precision (l0+ bits) ADC technology requires extremely short aperture times ((approx)1ps ) with very low jitter requirements (sub 10fs ). These fundamental requirements, along with other technological barriers, are difficult to realize with electronics: However, we outline here, a way to achieve these timing apertures using a novel multi-wavelength optoelectronic short-pulse optical source. Our approach uses an optoelectronic feedback scheme with high optical Q to produce an optical pulse train with ultra-low jitter ( sub 5fs) and high amplitude stability ( and lt;10(sup 10)). This approach requires low power and can be integrated into an optoelectronic integrated circuit to minimize the size. Under this seed program we have demonstrated that the optical feedback mechanism can be used to generate a high Q resonator. This has reduced the technical risk for further development, making it an attractive candidate for outside funding

  7. Design of a 12-bit 80MS/s pipeline analog-to-digital converter for PLC-VDSL applications

    Science.gov (United States)

    Ruiz-Amaya, Jesus; Delgado-Restituto, Manuel; Fernandez-Bootello, Juan F.; de la Rosa, Jose M.

    2005-06-01

    This paper describes the design of a 12-bit 80MS/s pipeline Analog-to-Digital converter implemented in 0.13mm CMOS logic technology. The design has been computer-aided by a developed toolbox for the simulation, synthesis and verification of Nyquist-Rate Analog-to-Digital and Digital-to-Analog Converters in MATLAB. The embedded simulator uses SIMULINK C-coded S-functions to model all required subcircuits including their main error mechanisms. This approach allows to drastically speed up the simulation CPU-time and makes the proposed tool an advantageous alternative for fast exploration of requirements and as a design validation tool. The converter is based on a 10-stage pipeline preceded by a sample/hold with bootstrapping technique. Each stage gives 1.5 effective bits, except for the first one which provides 2.5 effective bits to improve linearity. The Analog-to-Digital architecture uses redundant bits for digital correction, it is planned to be implemented without using calibration and employs a subranging pipeline look-ahead technique to increase speed. Substrate biased MOSFETs in the depletion region are used as capacitors, linearized by a series compensation. Simulation results show that the Multi-Tone Power Ratio is higher than 56dB for several DMT test signals and the estimated Signal-to-Noise Ratio yield is supposed to be better than 62 dB from DC to Nyquist frequency. The converter dissipates less than 150mW from a 3.3V supply and occupies less than 4 mm2 die area. The results have been checked with all process corners from -40° to 85° and power supply from 3V to 3.6V.

  8. Design of a 12-bit 80-MS/s CMOS digital-to-analog converter for PLC-VDSL applications

    Science.gov (United States)

    Ruiz-Amaya, Jesus; Delgado-Restituto, Manuel; Fernandez-Bootello, J. Francisco; de la Rosa, Jose M.

    2005-06-01

    This paper describes the design of a 12-bit 80MS/s Digital-to-Analog converter implemented in 0.13mm CMOS logic technology. The design has been computer-aided by a developed toolbox for the simulation and verification of Nyquist-Rate Analog-to-Digital and Digital-to-Analog converters in MATLAB. The embedded simulator uses SIMULINK C-coded S-functions to model all required subcircuits including their main error mechanisms. This approach allows to drastically speed up the simulation CPU-time and makes the proposed tool an advantageous alternative for fast exploration of requirements and as a design validation tool. The converter is segmented in a unary current-cell matrix for 8 MSB's and a binary-weighted array for 4 LSB's. Current sources of the converter are laid out separately from current-cell switching matrix core block and distribute in double centroid to reduce random errors and transient noise coupling. The linearity errors caused by remaining gradient errors are reduced by a modified Q2 Random-Walk switching sequence. Simulation results show that the Spurious-Free Dynamic-Range is better than 58.5dB up to 80MS/s. The estimated Signal-to-Noise Distortion Ratio yield is 99.7% and it is supposed to be better than 58dB from DC to Nyquist frequency. Multi-Tone Power Ratio is higher 59dB for several DMT test signals. The converter dissipates less than 129mW from a 3.3V supply and occupies less than 1.7mm2 die area. The results have been checked with all process corners from -40° to 85° and power supply from 3V to 3.6V.

  9. Converting analog interpretive data to digital formats for use in database and GIS applications

    Science.gov (United States)

    Flocks, James G.

    2004-01-01

    There is a growing need by researchers and managers for comprehensive and unified nationwide datasets of scientific data. These datasets must be in a digital format that is easily accessible using database and GIS applications, providing the user with access to a wide variety of current and historical information. Although most data currently being collected by scientists are already in a digital format, there is still a large repository of information in the literature and paper archive. Converting this information into a format accessible by computer applications is typically very difficult and can result in loss of data. However, since scientific data are commonly collected in a repetitious, concise matter (i.e., forms, tables, graphs, etc.), these data can be recovered digitally by using a conversion process that relates the position of an attribute in two-dimensional space to the information that the attribute signifies. For example, if a table contains a certain piece of information in a specific row and column, then the space that the row and column occupies becomes an index of that information. An index key is used to identify the relation between the physical location of the attribute and the information the attribute contains. The conversion process can be achieved rapidly, easily and inexpensively using widely available digitizing and spreadsheet software, and simple programming code. In the geological sciences, sedimentary character is commonly interpreted from geophysical profiles and descriptions of sediment cores. In the field and laboratory, these interpretations were typically transcribed to paper. The information from these paper archives is still relevant and increasingly important to scientists, engineers and managers to understand geologic processes affecting our environment. Direct scanning of this information produces a raster facsimile of the data, which allows it to be linked to the electronic world. But true integration of the content with

  10. Mixed Linear/Square-Root Encoded Single Slope Ramp Provides a Fast, Low Noise Analog to Digital Converter with Very High Linearity for Focal Plane Arrays

    Science.gov (United States)

    Wrigley, Christopher James (Inventor); Hancock, Bruce R. (Inventor); Newton, Kenneth W. (Inventor); Cunningham, Thomas J. (Inventor)

    2014-01-01

    An analog-to-digital converter (ADC) converts pixel voltages from a CMOS image into a digital output. A voltage ramp generator generates a voltage ramp that has a linear first portion and a non-linear second portion. A digital output generator generates a digital output based on the voltage ramp, the pixel voltages, and comparator output from an array of comparators that compare the voltage ramp to the pixel voltages. A return lookup table linearizes the digital output values.

  11. A 13-Bits wilkinson analog-digital converter for NIM acquisition system

    International Nuclear Information System (INIS)

    Acosta Toledo, R.; Osorio Deliz, J.; Arista Romeu, E.; Fernandez, J.

    1994-01-01

    A new 13-bits Wilkinson analog-digital converter is described. The aim of this work is to describe the circuits of sample and hold, memory condensator loading and releasing PROM based control memory logic, zero level detection and correction. The converter is designed for the digital measurement of the peak amplitudes of pulses with statistical or periodical time distribution. The analog-digital converter may be used in spectrometric systems, multi-channel analysers or any similar PC based system

  12. A Design of a New Column-Parallel Analog-to-Digital Converter Flash for Monolithic Active Pixel Sensor.

    Science.gov (United States)

    Chakir, Mostafa; Akhamal, Hicham; Qjidaa, Hassan

    2017-01-01

    The CMOS Monolithic Active Pixel Sensor (MAPS) for the International Linear Collider (ILC) vertex detector (VXD) expresses stringent requirements on their analog readout electronics, specifically on the analog-to-digital converter (ADC). This paper concerns designing and optimizing a new architecture of a low power, high speed, and small-area 4-bit column-parallel ADC Flash. Later in this study, we propose to interpose an S/H block in the converter. This integration of S/H block increases the sensitiveness of the converter to the very small amplitude of the input signal from the sensor and provides a sufficient time to the converter to be able to code the input signal. This ADC is developed in 0.18  μ m CMOS process with a pixel pitch of 35  μ m. The proposed ADC responds to the constraints of power dissipation, size, and speed for the MAPS composed of a matrix of 64 rows and 48 columns where each column ADC covers a small area of 35 × 336.76  μ m 2 . The proposed ADC consumes low power at a 1.8 V supply and 100 MS/s sampling rate with dynamic range of 125 mV. Its DNL and INL are 0.0812/-0.0787 LSB and 0.0811/-0.0787 LSB, respectively. Furthermore, this ADC achieves a high speed more than 5 GHz.

  13. Fast collimated neutron flux measurement using stilbene scintillator and flashy analog-to-digital converter in JT-60U

    International Nuclear Information System (INIS)

    Ishikawa, M.; Itoga, T.; Okuji, T.; Nakhostin, M.; Shinohara, K.; Hayashi, T.; Sukegawa, A.; Baba, M.; Nishitani, T.

    2006-01-01

    A line-integrated neutron emission profile is routinely measured using the radial neutron collimator system in JT-60U tokamak. Stilbene neuron detectors (SNDs), which combine a stilbene organic crystal scintillation detector (SD) with an analog neutron-gamma pulse shape discrimination (PSD) circuit, have been used to measure collimated neutron flux. Although the SND has many advantages as a neutron detector, the maximum count rate is limited up to ∼1x10 5 counts/s due to the analog PSD circuit. To overcome this issue, a digital signal processing system (DSPS) using a flash analog-to-digital converter (Acqiris DC252, 8 GHz, 10 bits) has been developed at Cyclotron and Radioisotope Center in Tohoku University. In this system anode signals from photomultiplier of the SD are directory stored and digitized. Then, the PSD between neutrons and gamma rays is performed using software. The DSPS has been installed in the vertical neutron collimator system in JT-60U and applied to deuterium experiments. It is confirmed that the PSD is sufficiently performed and collimated neutron flux is successfully measured with count rate up to ∼5x10 5 counts/s without the effect of pileup of detected pulses. The performance of the DSPS as a neutron detector, which supersedes the SND, is demonstrated

  14. Analog-to-digital conversion

    CERN Document Server

    Pelgrom, Marcel

    2017-01-01

    This textbook is appropriate for use in graduate-level curricula in analog-to-digital conversion, as well as for practicing engineers in need of a state-of-the-art reference on data converters. It discusses various analog-to-digital conversion principles, including sampling, quantization, reference generation, nyquist architectures and sigma-delta modulation. This book presents an overview of the state of the art in this field and focuses on issues of optimizing accuracy and speed, while reducing the power level. This new, third edition emphasizes novel calibration concepts, the specific requirements of new systems, the consequences of 22-nm technology and the need for a more statistical approach to accuracy. Pedagogical enhancements to this edition include additional, new exercises, solved examples to introduce all key, new concepts and warnings, remarks and hints, from a practitioner’s perspective, wherever appropriate. Considerable background information and practical tips, from designing a PCB, to lay-o...

  15. A Design of a New Column-Parallel Analog-to-Digital Converter Flash for Monolithic Active Pixel Sensor

    Directory of Open Access Journals (Sweden)

    Mostafa Chakir

    2017-01-01

    Full Text Available The CMOS Monolithic Active Pixel Sensor (MAPS for the International Linear Collider (ILC vertex detector (VXD expresses stringent requirements on their analog readout electronics, specifically on the analog-to-digital converter (ADC. This paper concerns designing and optimizing a new architecture of a low power, high speed, and small-area 4-bit column-parallel ADC Flash. Later in this study, we propose to interpose an S/H block in the converter. This integration of S/H block increases the sensitiveness of the converter to the very small amplitude of the input signal from the sensor and provides a sufficient time to the converter to be able to code the input signal. This ADC is developed in 0.18 μm CMOS process with a pixel pitch of 35 μm. The proposed ADC responds to the constraints of power dissipation, size, and speed for the MAPS composed of a matrix of 64 rows and 48 columns where each column ADC covers a small area of 35 × 336.76 μm2. The proposed ADC consumes low power at a 1.8 V supply and 100 MS/s sampling rate with dynamic range of 125 mV. Its DNL and INL are 0.0812/−0.0787 LSB and 0.0811/−0.0787 LSB, respectively. Furthermore, this ADC achieves a high speed more than 5 GHz.

  16. Design of a general purpose (RS-232C) analog-to-digital data converter

    International Nuclear Information System (INIS)

    Ali, Q.

    1995-01-01

    The purpose of this project is to design a general purpose hardware that interfaces analog devices with any desirable computer supporting the RS-232 interface. The hardware incorporates bidirectional data transmission at 1,200 bps, 2,400 bps, 4800 bps, 9,600 bps, 19,200 pbs and 38400 bps. The communication / processing software has been written in C language that incorporates the idea of the potability of the software from one environment to the other. (author)

  17. Design and Simulation of Seido Buffer for Analog to Digital Converter (ADC) on Multichannel Analyzer (MCA) Application

    International Nuclear Information System (INIS)

    Harzawadi Hasim; Maslina Ibrahim; Nolida Yusop; Mohd Ashhar Khalid

    2011-01-01

    Most of our electronic equipment has buffer, thus this make buffer as one of importance in electronic gadget. This paper introduced Single Ended Input Differential Output (SEIDO) buffer to predict the bias at approximately 2.5 V. For this purpose, the input range between -1 mV to 4 V was implemented. The software used to cascade SEIDO buffer is called LTspice IV; an open source software developed by Linear Technology Incorporation. The component involve in this development was Operational Amplifier (OP AMP) AD826 from Analog Devices Incorporation, capacitor and resistor. Kirchhoffs Current Law and Kirchhoffs Voltage Law was applied to calculated voltage gain and biasing voltage. All design has been verified by LTspice IV. The result produced from simulation was between -0.3 V to 6.3 V with bias roughly at 2.5 V. These results prove that it was capable to drive Analog Digital Converter (ADC) that can subsequently apply for Multichannel Analyzer (MCA). (author)

  18. A 16 b 2 GHz digital-to-analog converter in 0.18 μm CMOS with digital calibration technology

    International Nuclear Information System (INIS)

    Yang Weidong; Pu Jie; Zhang Ruitao; Chen Chao; Zang Jiandong; Li Tiehu; Luo Pu

    2015-01-01

    This paper presents a 16-bit 2 GSPS digital-to-analog converter (DAC) in 0.18 μm CMOS technology. This DAC is implemented using time division multiplex access system architecture in the digital domain. The input data is received with a two-channel LVDS interface. The DLL technology is introduced to meet the timing requirements between phases of the LVDS data and the data sampling clock. A FIFO is designed to absorb the phase difference between the data clock and DAC system clock. A delay controller is integrated to adjust the phase relationship between the high speed digital clock and analog clock, obtaining a sampling rate of 2 GSPS. The current source mismatch at higher bits is calibrated in the digital domain. Test results show that the DAC achieves 74.02 dBC SFDR at analog output of 36 MHz, and DNL less than ±2.1 LSB and INL less than ±4.3 LSB after the chip is calibrated. (paper)

  19. Design and debugging of multi-step analog to digital converters

    NARCIS (Netherlands)

    Zjajo, A.

    2010-01-01

    With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. The trend of increasing integration level for integrated circuits has

  20. Analog-to-digital conversion

    CERN Document Server

    Pelgrom, Marcel J. M

    2013-01-01

    This textbook is appropriate for use in graduate-level curricula in analog to digital conversion, as well as for practicing engineers in need of a state-of-the-art reference on data converters.  It discusses various analog-to-digital conversion principles, including sampling, quantization, reference generation, nyquist architectures and sigma-delta modulation.  This book presents an overview of the state-of-the-art in this field and focuses on issues of optimizing accuracy and speed, while reducing the power level. This new, second edition emphasizes novel calibration concepts, the specific requirements of new systems, the consequences of 45-nm technology and the need for a more statistical approach to accuracy.  Pedagogical enhancements to this edition include more than twice the exercises available in the first edition, solved examples to introduce all key, new concepts and warnings, remarks and hints, from a practitioner’s perspective, wherever appropriate.  Considerable background information and pr...

  1. Simulation of continuously logical base cells (CL BC) with advanced functions for analog-to-digital converters and image processors

    Science.gov (United States)

    Krasilenko, Vladimir G.; Lazarev, Alexander A.; Nikitovich, Diana V.

    2017-10-01

    The paper considers results of design and modeling of continuously logical base cells (CL BC) based on current mirrors (CM) with functions of preliminary analogue and subsequent analogue-digital processing for creating sensor multichannel analog-to-digital converters (SMC ADCs) and image processors (IP). For such with vector or matrix parallel inputs-outputs IP and SMC ADCs it is needed active basic photosensitive cells with an extended electronic circuit, which are considered in paper. Such basic cells and ADCs based on them have a number of advantages: high speed and reliability, simplicity, small power consumption, high integration level for linear and matrix structures. We show design of the CL BC and ADC of photocurrents and their various possible implementations and its simulations. We consider CL BC for methods of selection and rank preprocessing and linear array of ADCs with conversion to binary codes and Gray codes. In contrast to our previous works here we will dwell more on analogue preprocessing schemes for signals of neighboring cells. Let us show how the introduction of simple nodes based on current mirrors extends the range of functions performed by the image processor. Each channel of the structure consists of several digital-analog cells (DC) on 15-35 CMOS. The amount of DC does not exceed the number of digits of the formed code, and for an iteration type, only one cell of DC, complemented by the device of selection and holding (SHD), is required. One channel of ADC with iteration is based on one DC-(G) and SHD, and it has only 35 CMOS transistors. In such ADCs easily parallel code can be realized and also serial-parallel output code. The circuits and simulation results of their design with OrCAD are shown. The supply voltage of the DC is 1.8÷3.3V, the range of an input photocurrent is 0.1÷24μA, the transformation time is 20÷30nS at 6-8 bit binary or Gray codes. The general power consumption of the ADC with iteration is only 50÷100μW, if the

  2. Iterative Signal Processing for Mitigation of Analog-to-Digital Converter Clipping Distortion in Multiband OFDMA Receivers

    Directory of Open Access Journals (Sweden)

    Markus Allén

    2012-01-01

    Full Text Available In modern wideband communication receivers, the large input-signal dynamics is a fundamental problem. Unintentional signal clipping occurs, if the receiver front-end with the analog-to-digital interface cannot respond to rapidly varying conditions. This paper discusses digital postprocessing compensation of such unintentional clipping in multiband OFDMA receivers. The proposed method iteratively mitigates the clipping distortion by exploiting the symbol decisions. The performance of the proposed method is illustrated with various computer simulations and also verified by concrete laboratory measurements with commercially available analog-to-digital hardware. It is shown that the clipping compensation algorithm implemented in a turbo decoding OFDM receiver is able to remove almost all the clipping distortion even under significant clipping in fading channel circumstances. That is to say, it is possible to nearly recover the receiver performance to the level, which would be achieved in the equivalent nonclipped situation.

  3. A digital calibration technique for an ultra high-speed wide-bandwidth folding and interpolating analog-to-digital converter in 0.18-{mu}m CMOS technology

    Energy Technology Data Exchange (ETDEWEB)

    Yu Jinshan; Zhang Ruitao; Zhang Zhengping; Wang Yonglu; Zhu Can; Zhang Lei; Yu Zhou; Han Yong, E-mail: yujinshan@yeah.net [National Laboratory of Analog IC' s, Chongqing 400060 (China)

    2011-01-15

    A digital calibration technique for an ultra high-speed folding and interpolating analog-to-digital converter in 0.18-{mu}m CMOS technology is presented. The similar digital calibration techniques are taken for high 3-bit flash converter and low 5-bit folding and interpolating converter, which are based on well-designed calibration reference, calibration DAC and comparators. The spice simulation and the measured results show the ADC produces 5.9 ENOB with calibration disabled and 7.2 ENOB with calibration enabled for high-frequency wide-bandwidth analog input. (semiconductor integrated circuits)

  4. Design and implementation of sigma–delta digital to analog converter

    Indian Academy of Sciences (India)

    Sonika

    2018-06-01

    Jun 1, 2018 ... Simulation results verify the superiority of the proposed modulator. Sampling rate ..... A MATLAB system level simulation is performed; fig- .... model and implement the design on to the FPGA. The .... J. Signal Process. Syst.

  5. Comparison of performance of analog-to-digital converters (ADC) for pulse height analyzers

    International Nuclear Information System (INIS)

    Suzuki, Shogo; Hirai, Shoji

    1981-01-01

    In the recent ADCs for pulse height analyzers (PHA), Wilkinson type is a leading one, and those with 50 to 200 MHz clock frequency and 8K channel are mostly on the market. The comparison of the performance of ADCs was conducted under the condition of using these multi-channel PHAs as γ-ray spectrometers. The following three ADCs were compared: ADC incorporated in CANBERRA 8100 MCA, and CANBERRA 8060 ADCs used as the ADCs for 1st and 2nd GAMA systems. In this case, the conversion gains of these ADCs were set at 4K because the memory of 8100 MCA was 4K, and the GAMA systems were also mostly operated at 4K. In this paper, report is made on the measurements of dead time, the change of γ peaks immediately after the power was turned on, the temperature dependence of ADCs the long term stability of ADCs, derivative non-linearity, and integration non-linearity. The dead time of the ADC of 8100 CMA was shorter in the range up to 1000 channels. The temperature dependence was -0.017%/deg C in 8100 MCA, and -0.061 and -0.072%/deg C in GAMA. The long term stability was -0.02%/14 hr in 8100 MCA, and -0.027%/14 hr in 8060 of 1st GAMA. The derivative non-linearity was 0.45% in 8100 MCA, 0.67% in 8060 of 1st GAMA, and the integration non-linearity was 0.075% for 8100 MCA, and 0.085 - 0.1% in 8060 ADCs. Also, the change of γ peaks immediately after the power was turned on for 8100 ADC was better than that of 8060 ADC. (Wakatsuki, Y.)

  6. PIC microcontroller based external fast analog to digital converter to acquire wide-lined solid NMR spectra by BRUKER DRX and Avance-I spectrometers.

    Science.gov (United States)

    Koczor, Bálint; Rohonczy, János

    2015-01-01

    Concerning many former liquid or hybrid liquid/solid NMR consoles, the built in Analog-to-Digital Converters (ADCs) are incapable of digitizing the fids at sampling rates in the MHz range. Regarding both strong anisotropic interactions in the solid state and wide chemical shift dispersion nuclei in solution phase such as (195)Pt, (119)Sn, (207)Pb etc., the spectrum range of interest might be in the MHz range. As determining the informative tensor components of anisotropic NMR interactions requires nonlinear fitting over the whole spectrum including the asymptotic baseline, it is prohibited by low sampling rates of the ADCs. Wide spectrum width is also useful in solution NMR, since windowing of wide chemical shift ranges is avoidable. We built an external analog to digital converter with 10 MHz maximal sampling rate, which can work simultaneously with the built in ADC of the spectrometer. The ADC was tested on both Bruker DRX and Avance-I NMR consoles. In addition to the analog channels it only requires three external digital lines of the NMR console. The ADC sends data to PC via USB. The whole process is controlled by software written in JAVA which is implemented under TopSpin. Copyright © 2015 Elsevier Inc. All rights reserved.

  7. Process and circuiting arrangement for the conversion of analog signals to digital signals and digital signals to analog signals

    International Nuclear Information System (INIS)

    Wintzer, K.

    1977-01-01

    Process for analog-to-digital and digital-to-analog conversion in telecommunication systems whose outstations each have an analog transmitter and an analog receiver. The invention illustrates a method of reducing the power demand of the converters at times when no conversion processes take place. (RW) [de

  8. A Calibration Method for Nonlinear Mismatches in M-Channel Time-Interleaved Analog-to-Digital Converters Based on Hadamard Sequences

    Directory of Open Access Journals (Sweden)

    Husheng Liu

    2016-11-01

    Full Text Available The time-interleaved analog-to-digital converter (TIADC is an architecture used to achieve a high sampling rate and high dynamic performance. However, estimation and compensation methods are required to maintain the dynamic performance of the constituent analog-to-digital converters (ADCs due to channel mismatches. This paper proposes a blind adaptive method to calibrate the nonlinear mismatches in M-channel TIADCs (M-TIADCs. The nonlinearity-induced error signal is reconstructed by the proposed multiplier Hadamard transform (MHT structure, and the nonlinear parameters are estimated by the filtered-X least-mean square (FxLMS algorithm. The performance of cascade calibration is also analyzed. The numerical simulation results show that the proposed method consumes much less hardware resources while maintaining the calibration performance.

  9. A digital-type fluxgate magnetometer using a sigma-delta digital-to-analog converter for a sounding rocket experiment

    International Nuclear Information System (INIS)

    Iguchi, Kyosuke; Matsuoka, Ayako

    2014-01-01

    One of the design challenges for future magnetospheric satellite missions is optimizing the mass, size, and power consumption of the instruments to meet the mission requirements. We have developed a digital-type fluxgate (DFG) magnetometer that is anticipated to have significantly less mass and volume than the conventional analog-type. Hitherto, the lack of a space-grade digital-to-analog converter (DAC) with good accuracy has prevented the development of a high-performance DFG. To solve this problem, we developed a high-resolution DAC using parts whose performance was equivalent to existing space-grade parts. The developed DAC consists of a 1-bit second-order sigma-delta modulator and a fourth-order analog low-pass filter. We tested the performance of the DAC experimentally and found that it had better than 17-bits resolution in 80% of the measurement range, and the linearity error was 2 −13.3  of the measurement range. We built a DFG flight model (in which this DAC was embedded) for a sounding rocket experiment as an interim step in the development of a future satellite mission. The noise of this DFG was 0.79 nT rms  at 0.1–10 Hz, which corresponds to a roughly 17-bit resolution. The results show that the sigma-delta DAC and the DFG had a performance that is consistent with our optimized design, and the noise was as expected from the noise simulation. Finally, we have confirmed that the DFG worked successfully during the flight of the sounding rocket. (paper)

  10. A digital-type fluxgate magnetometer using a sigma-delta digital-to-analog converter for a sounding rocket experiment

    Science.gov (United States)

    Iguchi, Kyosuke; Matsuoka, Ayako

    2014-07-01

    One of the design challenges for future magnetospheric satellite missions is optimizing the mass, size, and power consumption of the instruments to meet the mission requirements. We have developed a digital-type fluxgate (DFG) magnetometer that is anticipated to have significantly less mass and volume than the conventional analog-type. Hitherto, the lack of a space-grade digital-to-analog converter (DAC) with good accuracy has prevented the development of a high-performance DFG. To solve this problem, we developed a high-resolution DAC using parts whose performance was equivalent to existing space-grade parts. The developed DAC consists of a 1-bit second-order sigma-delta modulator and a fourth-order analog low-pass filter. We tested the performance of the DAC experimentally and found that it had better than 17-bits resolution in 80% of the measurement range, and the linearity error was 2-13.3 of the measurement range. We built a DFG flight model (in which this DAC was embedded) for a sounding rocket experiment as an interim step in the development of a future satellite mission. The noise of this DFG was 0.79 nTrms at 0.1-10 Hz, which corresponds to a roughly 17-bit resolution. The results show that the sigma-delta DAC and the DFG had a performance that is consistent with our optimized design, and the noise was as expected from the noise simulation. Finally, we have confirmed that the DFG worked successfully during the flight of the sounding rocket.

  11. Connect high speed analog-digital converter with EPICS based on LabVIEW

    International Nuclear Information System (INIS)

    Wang Wei; Chi Yunlong

    2008-01-01

    This paper introduce a method to connect high speed analog-digital converter (ADC212/100) with EPICS on Windows platform using LabVIEW. We use labVIEW to communicate with the converter, then use interface sub-VIs between LabVIEW and EPICS to access the EPICS IOC by Channel Access (CA). For the easy use graph programming language of LabVIEW, this method could shorten the develop period and reduce manpower cost. (authors)

  12. Design of a low-power flash analog-to-digital converter chip for temperature sensors in 0.18 µm CMOS process

    Directory of Open Access Journals (Sweden)

    Al Al

    2015-01-01

    Full Text Available Current paper proposes a simple design of a 6-bit flash analog-to-digital converter (ADC by process in 0.18 μm CMOS. ADC is expected to be used within a temperature sensor which provides analog data output having a range of 360 mV to 560 mV. The complete system consisting of three main blocks, which are the threshold inverter quantization (TIQ-comparator, the encoder and the parallel input serial output (PISO register. The TIQ-comparator functions as quantization of the analog data to the thermometer code. The encoder converts this thermometer code to 6-bit binary code and the PISO register transforms the parallel data into a data series. The design aims to get a flash ADC on low power dissipation, small size and compatible with the temperature sensors. The method is proposed to set each of the transistor channel length to find out the threshold voltage difference of the inverter on the TIQ comparator. A portion design encoder and PISO registers circuit selected a simple circuit with the best performance from previous studies and adjusted to this system. The design has an input range of 285 to 600 mV and 6-bit resolution output. The chip area of the designed ADC is 844.48 x 764.77 µm2 and the power dissipation is 0.162 µW with 1.6 V supply voltage.

  13. Analog to digital conversion for nuclear spectrometry

    International Nuclear Information System (INIS)

    Carvalho, P.V.R. de.

    1982-04-01

    A study of the analog to digital conversion techniques for nuclear spectrometry is presented and the main design philosophies of nuclear ADC's are compared. Among them, the most suitable for the current Brazilian conditions, concerning the specifications and components avaiability is the one that employs a statistical correction of successive approximation converters. This technique is described in full detail. A prototype has been developed an tested for the practical demonstration of the theoretical conclusions. These tests was carried on nuclear spectrometry data aquisition system whose implementation is also described. (Author) [pt

  14. Apple interface for experimental instrumentation and control-Pulse counter, timer, digital-to-analog converter, step motor and relays

    International Nuclear Information System (INIS)

    Souza, J.H.; Cernicchiaro, G.R.C.; Cavalcante, J.T.P.D.

    1989-01-01

    An interface plate for Apple II type microcomputer developed aiming to automatize measuring systems in which a TTL pulse counter, output of analogic voltage (with resolution of 12 bits), out put of step-motor control, relay drive, and timer for real time control, are necessary to carry-out the parallel tasks, is described. An application of this plate to a thermoluminescence reader is also presented. (M.C.K.) [pt

  15. Multirate Formulation for Mismatch Sensitivity Analysis of Analog-to-Digital Converters That Utilize Parallel ΣΔ-Modulators

    Directory of Open Access Journals (Sweden)

    Per Löwenborg

    2008-02-01

    Full Text Available A general formulation based on multirate filterbank theory for analog-to-digital converters using parallel sigmadelta modulators in conjunction with modulation sequences is presented. The time-interleaved modulators (TIMs, Hadamard modulators (HMs, and frequency-band decomposition modulators (FBDMs can be viewed as special cases of the proposed description. The usefulness of the formulation stems from its ability to analyze a system's sensitivity to aliasing due to channel mismatch and modulation sequence level errors. Both Nyquist-rate and oversampled systems are considered, and it is shown how the matching requirements between channels can be reduced for oversampled systems. The new formulation is useful also for the derivation of new modulation schemes, and an example is given of how it can be used in this context.

  16. A CAMAC unit for charge measuring and pulse shape recording based on a fast, 8-bit parallel analog-to-digital converter

    International Nuclear Information System (INIS)

    Kulka, Z.; Kreciejewski, M.; Nadachowski, M.

    1990-08-01

    A device designed mainly for measuring systems for testing parameters of some type of detectors used in the high energy physics is described. The device is one-module CAMAC unit. It is equipped in a fast, 8-bit parallel analog-to-digital converter ''flash''type with a gated integrator at the input and a static RAM (4096 x 8 bit) at the output. The device enables measurements of the charge in pulses from detectors or registration of the shape of these pulses. The construction, operation and parameters of the circuits of the device are described and the way of programming functions using CAMAC dataway is given. 8 refs., 9 figs. (author)

  17. Ultra-fast analog-to-digital converter based on a nonlinear triplexer and an optical coder with a photonic crystal structure.

    Science.gov (United States)

    Mehdizadeh, Farhad; Soroosh, Mohammad; Alipour-Banaei, Hamed; Farshidi, Ebrahim

    2017-03-01

    In this paper, we propose what we believe is a novel all-optical analog-to-digital converter (ADC) based on photonic crystals. The proposed structure is composed of a nonlinear triplexer and an optical coder. The nonlinear triplexer is for creating discrete levels in the continuous optical input signal, and the optical coder is for generating a 2-bit standard binary code out of the discrete levels coming from the nonlinear triplexer. Controlling the resonant mode of the resonant rings through optical intensity is the main objective and working mechanism of the proposed structure. The maximum delay time obtained for the proposed structure was about 5 ps and the total footprint is about 1520  μm2.

  18. A 12-bit spectroscopy analog-to-digital converter type SAA (Successive Approximation type with channel width Averaging) intended for multichannel pulse height analyzer SWAN-1 based on IBM PC/XT/AT

    International Nuclear Information System (INIS)

    Borsuk, S.; Kulka, Z.

    1989-12-01

    A 12-bit spectroscopy analog-to-digital converter (ADC) type SAA (Successive Approximation type with channel width Averaging) intended for multichannel pulse height analyzer SWAN-1 based on IBM PC/XT/AT has been described. Design principles, specifications and measurements of a fundamental SAA-2 converter version are reported. Finally, two next versions of the converter with introduced modifications are discussed. 6 refs., 7 figs. (author)

  19. Calculation of comparators of analog-to-digital converters with account of electric regime of transistor operation and ionizing radiation effect; Raschet komparatov analogo-tsifrovykh preobrazovatelej s uchetom ehlektricheskogo rezhima raboty tranzistorov i vozdejstviya ioniziruyushchego izlucheniya

    Energy Technology Data Exchange (ETDEWEB)

    Ragozin, A Yu

    1994-12-31

    Zero shift voltage in comparators of analog-to-digital converters under gamma irradiation with regard to electric mode effect on bipolar transistor degradation is calculated. It is shown that the input range of comparators such weak units are represented by comparators of bipolar and lower grades.

  20. Analog-to-digital conversion using custom CMOS analog memory for the EOS time projection chamber

    International Nuclear Information System (INIS)

    Lee, K.L.; Arthur, A.A.; Jones, R.W.; Matis, H.S.; Nakamura, M.; Kleinfelder, S.A.; Ritter, H.G.; Wienman, H.H.

    1990-01-01

    This paper describes the multiplexing scheme of custom CMOS analog memory integrated circuits, 16 channels x 256 cells, into analog to digital converters (ADC's) to handle 15,360 signal channels of a time projection, chamber detector system. Primary requirements of this system are high density, low power and large dynamic range. The analog memory device multiplexing scheme was designed to digitize the information stored in the memory cells. The digitization time of the ADC's and the settling times for the memory unit were carefully interleaved to optimize the performance and timing during the multiplexing operation. This kept the total number of ADC's, a costly and power dissipative component, to an acceptable minimum

  1. Frequency to Voltage Converter Analog Front-End Prototype

    Science.gov (United States)

    Mata, Carlos; Raines, Matthew

    2012-01-01

    The frequency to voltage converter analog front end evaluation prototype (F2V AFE) is an evaluation board designed for comparison of different methods of accurately extracting the frequency of a sinusoidal input signal. A configurable input stage is routed to one or several of five separate, configurable filtering circuits, and then to a configurable output stage. Amplifier selection and gain, filter corner frequencies, and comparator hysteresis and voltage reference are all easily configurable through the use of jumpers and potentiometers.

  2. An introduction to analog and digital communications

    CERN Document Server

    Haykin, Simon

    2012-01-01

    The second edition of this accessible book provides readers with an introductory treatment of communication theory as applied to the transmission of information-bearing signals. While it covers analog communications, the emphasis is placed on digital technology. It begins by presenting the functional blocks that constitute the transmitter and receiver of a communication system. Readers will next learn about electrical noise and then progress to multiplexing and multiple access techniques.

  3. Inverter-based successive approximation capacitance-to-digital converter

    KAUST Repository

    Omran, Hesham

    2017-03-23

    An energy-efficient capacitance-to-digital converter (CDC) is provided that utilizes a capacitance-domain successive approximation (SAR) technique. Unlike SAR analog- to-digital converters (ADCs), analysis shows that for SAR CDCs, the comparator offset voltage will result in signal-dependent and parasitic-dependent conversion errors, which necessitates an op-amp-based implementation. The inverter-based SAR CDC contemplated herein provides robust, energy-efficient, and fast operation. The inverter- based SAR CDC may include a hybrid coarse-fine programmable capacitor array. The design of example embodiments is insensitive to analog references, and thus achieves very low temperature sensitivity without the need for calibration. Moreover, this design achieves improved energy efficiency.

  4. Full-Circle Resolver-to-Linear-Analog Converter

    Science.gov (United States)

    Alhorn, Dean C.; Smith, Dennis A.; Howard, David E.

    2005-01-01

    A circuit generates sinusoidal excitation signals for a shaft-angle resolver and, like the arctangent circuit described in the preceding article, generates an analog voltage proportional to the shaft angle. The disadvantages of the circuit described in the preceding article arise from the fact that it must be made from precise analog subcircuits, including a functional block capable of implementing some trigonometric identities; this circuitry tends to be expensive, sensitive to noise, and susceptible to errors caused by temperature-induced drifts and imprecise matching of gains and phases. These disadvantages are overcome by the design of the present circuit. The present circuit (see figure) includes an excitation circuit, which generates signals Ksin(Omega(t)) and Kcos(Omega(t)) [where K is an amplitude, Omega denotes 2(pi)x a carrier frequency (the design value of which is 10 kHz), and t denotes time]. These signals are applied to the excitation terminals of a shaft-angle resolver, causing the resolver to put out signals C sin(Omega(t)-Theta) and C cos(Omega(t)-Theta). The cosine excitation signal and the cosine resolver output signal are processed through inverting comparator circuits, which are configured to function as inverting squarers, to obtain logic-level or square-wave signals .-LL[cos(Omega(t)] and -LL[cos(Omega(t)-Theta)], respectively. These signals are fed as inputs to a block containing digital logic circuits that effectively measure the phase difference (which equals Theta between the two logic-level signals). The output of this block is a pulse-width-modulated signal, PWM(Theta), the time-averaged value of which ranges from 0 to 5 VDC as Theta ranges from .180 to +180deg. PWM(Theta) is fed to a block of amplifying and level-shifting circuitry, which converts the input PWM waveform to an output waveform that switches between precise reference voltage levels of +10 and -10 V. This waveform is processed by a two-pole, low-pass filter, which removes

  5. A standardized way to select, evaluate, and test an analog-to-digital converter for ultrawide bandwidth radiofrequency signals based on user's needs, ideal, published,and actual specifications

    Science.gov (United States)

    Chang, Daniel Y.; Rowe, Neil C.

    2012-06-01

    The most important adverse impact on the Electronic Warfare (EW) simulation is that the number of signal sources that can be tested simultaneously is relatively small. When the number of signal sources increases, the analog hardware, complexity and costs grow by the order of N2, since the number of connections among N components is O(N*N) and the signal communication is bi-directional. To solve this problem, digitization of the signal is suggested. In digitizing a radiofrequency signal, an Analog-to-Digital Converter (ADC) is widely used. Most research studies on ADCs are conducted from designer/test engineers' perspective. Some research studies are conducted from market's perspective. This paper presents a generic way to select, evaluate and test ultra high bandwidth COTS ADCs and generate requirements for digitizing continuous time signals from the perspective of user's needs. Based on user's needs, as well as vendor's published, ideal and actual specifications, a decision can be made in selecting a proper ADC for an application. To support our arguments and illustrate the methodology, we evaluate a Tektronix TADC-1000, an 8-bit and 12 gigasamples per second ADC. This project is funded by JEWEL lab, NAWCWD at Point Mugu, CA.

  6. Broadband analog to digital conversion with spatial-spectral holography

    International Nuclear Information System (INIS)

    Babbitt, W. Randall; Neifeld, Mark A.; Merkel, Kristian D.

    2007-01-01

    A new approach to broadband photonic-assisted analog-to-digital converter (ADC) technology is proposed and analyzed. The core of the device is a spatial spectral holographic (SSH) material, which can directly record the signals of interest in the frequency domain. An SSH-ADC acts as a frequency-domain stretch processor, which leverages the high performance of conventional ADCs by converting high bandwidth input signals to low bandwidth output signals without loss of information. Analysis of a 10 GHz bandwidth SSH-ADC predicts that 10-bit performance can be achieved with currently available materials and components. SSH-ADC technology is scalable to bandwidths over 100 GHz with recently developed SSH materials. While the SSH-ADC is a transient digitizer, the spatial parallelism of SSH materials can be utilized to enable continuous digitization

  7. Broadband analog to digital conversion with spatial-spectral holography

    Energy Technology Data Exchange (ETDEWEB)

    Babbitt, W. Randall [Spectrum Lab, Montana State University, Bozeman, MT 59717-3510 (United States)]. E-mail: babbitt@physics.montana.edu; Neifeld, Mark A. [Spectrum Lab, Montana State University, Bozeman, MT 59717-3510 (United States); Merkel, Kristian D. [Spectrum Lab, Montana State University, Bozeman, MT 59717-3510 (United States)

    2007-11-15

    A new approach to broadband photonic-assisted analog-to-digital converter (ADC) technology is proposed and analyzed. The core of the device is a spatial spectral holographic (SSH) material, which can directly record the signals of interest in the frequency domain. An SSH-ADC acts as a frequency-domain stretch processor, which leverages the high performance of conventional ADCs by converting high bandwidth input signals to low bandwidth output signals without loss of information. Analysis of a 10 GHz bandwidth SSH-ADC predicts that 10-bit performance can be achieved with currently available materials and components. SSH-ADC technology is scalable to bandwidths over 100 GHz with recently developed SSH materials. While the SSH-ADC is a transient digitizer, the spatial parallelism of SSH materials can be utilized to enable continuous digitization.

  8. Efficiency and hardware comparison of analog control-based and digital control-based 70 W two-stage power factor corrector and DC-DC converters

    DEFF Research Database (Denmark)

    Török, Lajos; Munk-Nielsen, Stig

    2011-01-01

    A comparison of an analog and a digital controller driven 70 W two-stage power factor corrector converter is presented. Both controllers are operated in average current-mode-control for the PFC and peak current control for the DC-DC converter. Digital controller design and converter modeling...... is described. Results show that digital control can compete with the analog one in efficiency, PFC and THD....

  9. A digital silicon photomultiplier with multiple time-to-digital converters

    Energy Technology Data Exchange (ETDEWEB)

    Garutti, Erika [University Hamburg (Germany); Silenzi, Alessandro [DESY, Hamburg (Germany); Xu, Chen [DESY, Hamburg (Germany); University Hamburg (Germany)

    2013-07-01

    A silicon photomultiplier (SiPM) with pixel level signal digitization and column-wise connected time-to-digital converters (TDCs) has been developed for an endoscopic Positron Emission Tomography (PET) detector. A digital SiPM has pixels consist of a single photon avalanche diode (SPAD) and circuit elements to optimize overall dark counts and temporal response. Compared with conventional analog SiPM, digital SiPM's direct signal route from SPAD to TDC improves single photon time resolution. In addition, using multiple TDCs can perform the statistical estimation of the time-of-arrival in multiple photon detection case such as readout of scintillation crystals. Characterization measurements of the prototype digital SiPM and a Monte-Carlo simulation to predict the timing performance of the PET detector are shown.

  10. Digital and analog communication systems

    Science.gov (United States)

    Shanmugam, K. S.

    1979-01-01

    The book presents an introductory treatment of digital and analog communication systems with emphasis on digital systems. Attention is given to the following topics: systems and signal analysis, random signal theory, information and channel capacity, baseband data transmission, analog signal transmission, noise in analog communication systems, digital carrier modulation schemes, error control coding, and the digital transmission of analog signals.

  11. A time to voltage converter and analog memory unit for straw tracking detectors

    International Nuclear Information System (INIS)

    Callewaert, L.; Eyckmans, W.; Sansen, W.; Stevens, A.; Van der Spiegel, J.; Van Berg, R.; Williams, H.H.; Yau, T.Y.

    1990-01-01

    In a high precision drift tube or straw tracking system, one measures the time of arrival of the first electron at the anode. While many possible schemes exist, the authors initial judgment was that an analog time measurement would offer both lower power and greater resolution than an equally complex digital system. In addition, they believe that it will be necessary to incorporate all of the system features such as connection to the trigger and DAQ systems in any usable design in order to keep the power, mass and complexity of the final system under control. A low power, sub-nanosecond accuracy, quick recovery, data-driven, multiple sample Time to Voltage Converter suitable for use on high rate straw tracking detectors is described. The described TVC includes virtual storage of analog data in both Level 1 and Level 2 queues and an on board ADC with first order correction for capacitance variations and non-linearities

  12. Doubling-resolution analog-to-digital conversion based on PIC18F45K80

    Directory of Open Access Journals (Sweden)

    Yueyang Yuan

    2014-08-01

    Full Text Available Aiming at the analog signal being converted into the digital with a higher precision, a method to improve the analog-to-digital converter (ADC resolution is proposed and described. Based on the microcomputer PIC18F45K80 in which the internal ADC modules are embedded, a circuit is designed for doubling the resolution of ADC. According to the circuit diagram, the mathematical formula for calculating this resolution is derived. The corresponding software and print circuit board assembly is also prepared. With the experiment, a 13 bit ADC is achieved based on the 12 bit ADC module predesigned in the PIC18F45K80.

  13. A Novel Cyclic Time to Digital Converter Based on Triple-Slope Interpolation and Time Amplification

    Directory of Open Access Journals (Sweden)

    M. Rezvanyvardom

    2015-09-01

    Full Text Available This paper investigates a novel cyclic time-to-digital converter (TDC which employs triple-slope analog interpolation and time amplification techniques for digitizing the time interval between the rising edges of two input signals(Start and Stop. The proposed converter will be a 9-bit cyclic time-to-digital converter that does not use delay lines in its structure. Therefore, it has a low sensitivity to temperature, power supply and process (PVT variations. The other advantages of the proposed converter are low circuit complexity, and high accuracy compared with the time-to-digital converters that have previously been proposed. Also, this converter improves the time resolution and the dynamic range. In the same resolution, linear range and dynamic range, the proposed cyclic TDC reduces the number of circuit elements compared with the converters that have a similar circuit structure. Thus, the converter reduces the chip area, the power consumption and the figure of merit (FoM. In this converter, the integral nonlinearity (INL and differential nonlinearity (DNL errors are reduced. In order to evaluate the idea, the proposed time-to-digital converter is designed in TSMC 45 nm CMOS technology and simulated. Comparison of the theoretical and simulation results confirms the benefits of the proposed TDC.

  14. Analog to digital workflow improvement: a quantitative study.

    Science.gov (United States)

    Wideman, Catherine; Gallet, Jacqueline

    2006-01-01

    This study tracked a radiology department's conversion from utilization of a Kodak Amber analog system to a Kodak DirectView DR 5100 digital system. Through the use of ProModel Optimization Suite, a workflow simulation software package, significant quantitative information was derived from workflow process data measured before and after the change to a digital system. Once the digital room was fully operational and the radiology staff comfortable with the new system, average patient examination time was reduced from 9.24 to 5.28 min, indicating that a higher patient throughput could be achieved. Compared to the analog system, chest examination time for modality specific activities was reduced by 43%. The percentage of repeat examinations experienced with the digital system also decreased to 8% vs. the level of 9.5% experienced with the analog system. The study indicated that it is possible to quantitatively study clinical workflow and productivity by using commercially available software.

  15. Converting Taxonomic Descriptions to New Digital Formats

    Directory of Open Access Journals (Sweden)

    Hong Cui

    2008-01-01

    Full Text Available Abstract.--The majority of taxonomic descriptions is currently in print format. The majority of digital descriptions are in formats such as DOC, HTML, or PDF and for human readers. These formats do not convey rich semantics in taxonomic descriptions for computer-aided process. Newer digital formats such as XML and RDF accommodate semantic annotations that allow computers to process the rich semantics on human's behalf, thus open up opportunities for a wide range of innovative usages of taxonomic descriptions, such as searching in more precise and flexible ways, integrating with gnomic and geographic information, generating taxonomic keys automatically, and text data mining and information visualization etc. This paper discusses the challenges in automated conversion of multiple collections of descriptions to XML format and reports an automated system, MARTT. MARTT is a machine-learning system that makes use of training examples to tag new descriptions into XML format. A number of utilities are implemented as solutions to the challenges. The utilities are used to reduce the effort for training example preparation, to facilitate the creation of a comprehensive schema, and to predict system performance on a new collection of descriptions. The system has been tested with several plant and alga taxonomic publications including Flora of China and Flora of North America.

  16. Ultra-low power analog-digital converters for IoT

    NARCIS (Netherlands)

    Harpe, P.J.A.; Alioto, Massimo

    2017-01-01

    This chapter addresses ADCs for IoT nodes, which are needed to digitize sensor information before processing, storage or wireless transmission. ADCs are also required for the radio communication channel. This chapter focusses on successive approximation (SAR) ADCs, a popular architecture for IoT

  17. Sub-picosecond Resolution Time-to-Digital Converter

    Energy Technology Data Exchange (ETDEWEB)

    Bratov, Vladimir [Advanced Science and Novel Technology Company, Rancho Palos Verdes, CA (United States); Katzman, Vladimir [Advanced Science and Novel Technology Company, Rancho Palos Verdes, CA (United States); Binkley, Jeb [Advanced Science and Novel Technology Company, Rancho Palos Verdes, CA (United States)

    2006-03-30

    Time-to-digital converters with sub-picosecond resolutions are needed to satisfy the requirements of time-on-flight measurements of the next generation of high energy and nuclear physics experiments. The converters must be highly integrated, power effective, low cost, and feature plug-and-play capabilities to handle the increasing number of channels (up to hundreds of millions) in future Department of Energy experiments. Current state-off-the-art time-to-digital converter integrated circuits do not have the sufficient degree of integration and flexibility to fulfill all the described requirements. During Phase I, the Advanced Science and Novel Technology Company in cooperation with the nuclear physics division of the Oak Ridge National Laboratory has developed the architecture of a novel time-to-digital converter with multiple channels connected to an external processor through a special interfacing block and synchronized by clock signals generated by an internal phase-locked loop. The critical blocks of the system including signal delay lines and delay-locked loops with proprietary differential delay cells, as well as the required digital code converter and the clock period counter have been designed and simulated using the advanced SiGe120 BiCMOS technological process. The results of investigations demonstrate a possibility to achieve the digitization accuracy within 1ps. ADSANTEC has demonstrated the feasibility of the proposed concept in computer simulations. The proposed system will be a critical component for the next generation of NEP experiments.

  18. A high speed digital-to-analogue converter

    International Nuclear Information System (INIS)

    Hallgren, B.I.

    1974-02-01

    An 8-bit Digital-to-Analogue converter of the current-weighting type has been constructed using 8 monolithic integrated circuit transistor arrays -one for each bit. The D/A-converter has a voltage output within the range 0 to -2V. The settling time to within half of the least significant bit is about 50 nsec. The temperature dependence and transient response of the converter has been analysed using computer aided design techniques. A comparison is made between the experimental and simulated transient performance. (Auth.)

  19. Auxiliary controller for time-to-digital converter module readout

    International Nuclear Information System (INIS)

    Ermolin, Yu.V.

    1992-01-01

    The KD-225 auxiliary controller for time-to-digital converter module readout in the SUMMA crate is described. After readout and preliminary processing the data are written in the P-140 buffer memory module. The controller is used in the FODS-2 experimental setup data acquisition system. 12 refs.; 1 fig

  20. Total cost of performing analog-to-digital upgrades

    International Nuclear Information System (INIS)

    Albrigo, T.

    1993-01-01

    The financial well-being of nuclear power plants in the United States is dependent on reducing costs. Rapid advances in industrial technology have created a conundrum for utility executives and their engineering staffs. Digital technology is being touted as beneficial in many ways; however, a number of significant issues have been raised regarding the adequacy and financial viability of digital systems in nuclear power plants. Actual or perceived problems with digital system design, development, and installation have caused significant financial losses for nuclear utilities. This paper provides a list of problems that must be considered in performing an analog-to-digital conversion or for doing a large digital upgrade. It is desirable that the full financial risks associated with these types of upgrades are considered. Specific problems encountered at Palo Verde nuclear generating station are reviewed to emphasize some of the problem areas

  1. From Analog to Digital Medias in Early Childhood Education

    DEFF Research Database (Denmark)

    Brandt, Erika Zimmer

    2015-01-01

    Research aims: The aim of the study is to explore how the encounters between children and their educators alter when the media changes from analog to digital. Relationship to previous research works Tablets and other handheld, electronic devices has become part of everyday life in kindergartens....... Research shows that there are both potential pedagogical difficulties and possibilities connected to using digital media (ex. Thestrup 2015, Tække and Paulsen 2014) Theoretical and conceptual framework: The study is a single case study of an educational experiment (Flyvbjerg 2006). It is carried out...

  2. The Transition from Analog to Digital Mammography: Overall Considerations

    OpenAIRE

    A. Sardo

    2007-01-01

    In the last decades a continuous growth of the infor-matics process around the world has been observed: paper documents, data, images…, converted into a “digital format” allow an easier and safer manage-ment, making possible its compatibility and access to internet networking. This migration confirms the huge technology progresses made especially in the image capture ways: from photography to graphic arts, from movie to healthcare imaging, where the end user/radiologist requires, at least, a ...

  3. New system for digital to analog transformation and reconstruction of 12-lead ECGs.

    Science.gov (United States)

    Kothadia, Roshni; Kulecz, Walter B; Kofman, Igor S; Black, Adam J; Grier, James W; Schlegel, Todd T

    2013-01-01

    We describe initial validation of a new system for digital to analog conversion (DAC) and reconstruction of 12-lead ECGs. The system utilizes an open and optimized software format with a commensurately optimized DAC hardware configuration to accurately reproduce, from digital files, the original analog electrocardiographic signals of previously instrumented patients. By doing so, the system also ultimately allows for transmission of data collected on one manufacturer's 12-lead ECG hardware/software into that of any other. To initially validate the system, we compared original and post-DAC re-digitized 12-lead ECG data files (∼5-minutes long) in two types of validation studies in 10 patients. The first type quantitatively compared the total waveform voltage differences between the original and re-digitized data while the second type qualitatively compared the automated electrocardiographic diagnostic statements generated by the original versus re-digitized data. The grand-averaged difference in root mean squared voltage between the original and re-digitized data was 20.8 µV per channel when re-digitization involved the same manufacturer's analog to digital converter (ADC) as the original digitization, and 28.4 µV per channel when it involved a different manufacturer's ADC. Automated diagnostic statements generated by the original versus reconstructed data did not differ when using the diagnostic algorithm from the same manufacturer on whose device the original data were collected, and differed only slightly for just 1 of 10 patients when using a third-party diagnostic algorithm throughout. Original analog 12-lead ECG signals can be reconstructed from digital data files with accuracy sufficient for clinical use. Such reconstructions can readily enable automated second opinions for difficult-to-interpret 12-lead ECGs, either locally or remotely through the use of dedicated or cloud-based servers.

  4. New system for digital to analog transformation and reconstruction of 12-lead ECGs.

    Directory of Open Access Journals (Sweden)

    Roshni Kothadia

    Full Text Available INTRODUCTION: We describe initial validation of a new system for digital to analog conversion (DAC and reconstruction of 12-lead ECGs. The system utilizes an open and optimized software format with a commensurately optimized DAC hardware configuration to accurately reproduce, from digital files, the original analog electrocardiographic signals of previously instrumented patients. By doing so, the system also ultimately allows for transmission of data collected on one manufacturer's 12-lead ECG hardware/software into that of any other. MATERIALS AND METHODS: To initially validate the system, we compared original and post-DAC re-digitized 12-lead ECG data files (∼5-minutes long in two types of validation studies in 10 patients. The first type quantitatively compared the total waveform voltage differences between the original and re-digitized data while the second type qualitatively compared the automated electrocardiographic diagnostic statements generated by the original versus re-digitized data. RESULTS: The grand-averaged difference in root mean squared voltage between the original and re-digitized data was 20.8 µV per channel when re-digitization involved the same manufacturer's analog to digital converter (ADC as the original digitization, and 28.4 µV per channel when it involved a different manufacturer's ADC. Automated diagnostic statements generated by the original versus reconstructed data did not differ when using the diagnostic algorithm from the same manufacturer on whose device the original data were collected, and differed only slightly for just 1 of 10 patients when using a third-party diagnostic algorithm throughout. CONCLUSION: Original analog 12-lead ECG signals can be reconstructed from digital data files with accuracy sufficient for clinical use. Such reconstructions can readily enable automated second opinions for difficult-to-interpret 12-lead ECGs, either locally or remotely through the use of dedicated or cloud

  5. CMOS based capacitance to digital converter circuit for MEMS sensor

    Science.gov (United States)

    Rotake, D. R.; Darji, A. D.

    2018-02-01

    Most of the MEMS cantilever based system required costly instruments for characterization, processing and also has large experimental setups which led to non-portable device. So there is a need of low cost, highly sensitive, high speed and portable digital system. The proposed Capacitance to Digital Converter (CDC) interfacing circuit converts capacitance to digital domain which can be easily processed. Recent demand microcantilever deflection is part per trillion ranges which change the capacitance in 1-10 femto farad (fF) range. The entire CDC circuit is designed using CMOS 250nm technology. Design of CDC circuit consists of a D-latch and two oscillators, namely Sensor controlled oscillator (SCO) and digitally controlled oscillator (DCO). The D-latch is designed using transmission gate based MUX for power optimization. A CDC design of 7-stage, 9-stage and 11-stage tested for 1-18 fF and simulated using mentor graphics Eldo tool with parasitic. Since the proposed design does not use resistance component, the total power dissipation is reduced to 2.3621 mW for CDC designed using 9-stage SCO and DCO.

  6. Analog-to-digital conversion to accommodate the dynamics of live music in hearing instruments.

    Science.gov (United States)

    Hockley, Neil S; Bahlmann, Frauke; Fulton, Bernadette

    2012-09-01

    Hearing instrument design focuses on the amplification of speech to reduce the negative effects of hearing loss. Many amateur and professional musicians, along with music enthusiasts, also require their hearing instruments to perform well when listening to the frequent, high amplitude peaks of live music. One limitation, in most current digital hearing instruments with 16-bit analog-to-digital (A/D) converters, is that the compressor before the A/D conversion is limited to 95 dB (SPL) or less at the input. This is more than adequate for the dynamic range of speech; however, this does not accommodate the amplitude peaks present in live music. The hearing instrument input compression system can be adjusted to accommodate for the amplitudes present in music that would otherwise be compressed before the A/D converter in the hearing instrument. The methodology behind this technological approach will be presented along with measurements to demonstrate its effectiveness.

  7. Analog and digital signal analysis from basics to applications

    CERN Document Server

    Cohen Tenoudji, Frédéric

    2016-01-01

    This book provides comprehensive, graduate-level treatment of analog and digital signal analysis suitable for course use and self-guided learning. This expert text guides the reader from the basics of signal theory through a range of application tools for use in acoustic analysis, geophysics, and data compression. Each concept is introduced and explained step by step, and the necessary mathematical formulae are integrated in an accessible and intuitive way. The first part of the book explores how analog systems and signals form the basics of signal analysis. This section covers Fourier series and integral transforms of analog signals, Laplace and Hilbert transforms, the main analog filter classes, and signal modulations. Part II covers digital signals, demonstrating their key advantages. It presents z and Fourier transforms, digital filtering, inverse filters, deconvolution, and parametric modeling for deterministic signals. Wavelet decomposition and reconstruction of non-stationary signals are also discussed...

  8. Frequency to digital converter for IUAC Linac control system

    International Nuclear Information System (INIS)

    Jain, Mamta; Subramaiam, E.T.; Sahu, B.K.

    2015-01-01

    A frequency to digital converter CAMAC module has been designed and developed for LINAC control systems. This module is used to see the frequency difference of master clock and the resonator frequency digitally without using the oscilloscope. Later on this can be used for automatic tuning and locking of the cavities using piezoelectric actuator based tunner control. This module has eight independent channels to fulfill the need of all the eight cavities of the cryostat. A Schmitt trigger along with level converaccepts almost any form of pulse train, with 30 Vp-p. The time period is measured by counters clocked from a high resolution clock (10 MHz +/- 250 ps). The counter values are cross checked at both the input levels. Frequency is obtained from the computed time period by a special divisor core implemented inside the FPGA. The major task was the implementation of eight individual divisor cores and routing inside one Spartan 3s500E FPGA chip

  9. Implementation of Power Efficient Flash Analogue-to-Digital Converter

    Directory of Open Access Journals (Sweden)

    Taninki Sai Lakshmi

    2014-01-01

    Full Text Available An efficient low power high speed 5-bit 5-GS/s flash analogue-to-digital converter (ADC is proposed in this paper. The designing of a thermometer code to binary code is one of the exacting issues of low power flash ADC. The embodiment consists of two main blocks, a comparator and a digital encoder. To reduce the metastability and the effect of bubble errors, the thermometer code is converted into the gray code and there after translated to binary code through encoder. The proposed encoder is thus implemented by using differential cascade voltage switch logic (DCVSL to maintain high speed and low power dissipation. The proposed 5-bit flash ADC is designed using Cadence 180 nm CMOS technology with a supply rail voltage typically ±0.85 V. The simulation results include a total power dissipation of 46.69 mW, integral nonlinearity (INL value of −0.30 LSB and differential nonlinearity (DNL value of −0.24 LSB, of the flash ADC.

  10. MASMA: a versatile multifunctional unit (gated window amplifier, analog memory, and height-to-time converter)

    International Nuclear Information System (INIS)

    Goursky, V.; Thenes, P.

    1969-01-01

    This multipurpose unit is designed to accomplish one of the following functions: - gated window amplifier, - Analog memory and - Amplitude-to-time converter. The first function is mainly devoted to improve the poor resolution of pulse-height analyzers with a small number of channels. The analog memory, a new function in the standard range of plug-in modules, is capable of performing a number of operations: 1) fixed delay, or variable delay dependent on an external parameter (application to the analog processing of non-coincident pulses), 2) de-randomiser to increase the efficiency of the pulse height analysis in a spectrometry experiment, 3) linear multiplexer to allow an analyser to serve as many spectrometry devices as memory elements that it possesses. Associated with a coding scaler, this unit, if used as a amplitude-to-time converter, constitutes a Wilkinson A.D.C with a capability of 10 bits (or more) and with a 100 MHz clock frequency. (authors) [fr

  11. The H1 SPACAL time-to-digital converter system

    International Nuclear Information System (INIS)

    Eisenhandler, E.; Landon, M.; Thompson, G.

    1995-01-01

    This paper describes a pipelined 1,400-channel Time-to-Digital Converter (TDC) system for the H1 Scintillating Fiber Calorimeter, which will soon be installed in the H1 experiment at DESY. The main task of the TDC system is to determine the time of arrival of energy depositions, and send this information from bunch crossings that satisfy the event trigger into the H1 data acquisition system. In addition, the TDC system must monitor the timing trigger, which vetoes bunch crossings that contain too much background energy. Products of the interaction are separated from background on the basis of their different times of arrival with respect to the bunch crossing clock. For this monitoring the TDC system uses automatic on-board histogramming hardware that produces a family of histograms for each of 1,400 channels. The TDC function is performed by the TMC1004 ASIC. The system digitizes over a range of 32ns per bunch crossing with 1ns bins and a precision of 1ns. Because of the way the TMC1004 is designed, it is possible to vary the size of the bins between 0.6ns and 3ns by trading off measurement range for bin size. The system occupies two 9U VME crates

  12. Analogue to Digital and Digital to Analogue Converters (ADCs and DACs): A Review Update

    CERN Document Server

    Pickering, J.

    2015-06-15

    This is a review paper updated from that presented for CAS 2004. Essentially, since then, commercial components have continued to extend their performance boundaries but the basic building blocks and the techniques for choosing the best device and implementing it in a design have not changed. Analogue to digital and digital to analogue converters are crucial components in the continued drive to replace analogue circuitry with more controllable and less costly digital processing. This paper discusses the technologies available to perform in the likely measurement and control applications that arise within accelerators. It covers much of the terminology and 'specmanship' together with an application-oriented analysis of the realisable performance of the various types. Finally, some hints and warnings on system integration problems are given.

  13. As Film Goes Byte: The Change From Analog to Digital Film Perception

    OpenAIRE

    Loertscher, Miriam Laura; Weibel, David; Spiegel, Simon; Flueckiger, Barbara; Mennel, Pierre; Mast, Fred; Iseli, Christian

    2016-01-01

    The digital revolution changed film production in many ways. Until the end of the 20th century, most film professionals and critics preferred celluloid film. However, no previous empirical study compared complete narrative films recorded with analog and digital cinematography. Three short narrative films were produced with an analog and a digital camera attached to a 3D rig in order to control all optical parameters. In postproduction, a third version of a digital film was created to mimic th...

  14. As Film Goes Byte: The Change From Analog to Digital Film Perception.

    OpenAIRE

    Loertscher M. L. Weibel D. Spiegel S. Flueckiger B. Mennel P. Mast F. W. & Iseli C.

    2016-01-01

    The digital revolution changed film production in many ways. Until the end of the 20th century most film professionals and critics preferred celluloid film. However no previous empirical study compared complete narrative films recorded with analog and digital cinematography. Three short narrative films were produced with an analog and a digital camera attached to a 3D rig in order to control all optical parameters. In postproduction a third version of a digital film was created to mimic the a...

  15. Capacitive digital-to-analogue converters with least significant bit down in differential successive approximation register ADCs

    Directory of Open Access Journals (Sweden)

    Lei Sun

    2014-01-01

    Full Text Available This Letter proposes a least significant bit-down switching scheme in the capacitive digital-to-analogue converters (CDACs of successive approximation register analog-to-digital converter (ADC. Under the same unit capacitor, the chip area and the switching energy are halved without increasing the complexity of logic circuits. Compared with conventional CDAC, when it is applied to one of the most efficient switching schemes, V(cm-based structure, it achieves 93% less switching energy and 75% less chip area with the same differential non linearity (DNL/integral non linearity (INL performance.

  16. Demonstrations of analog-to-digital conversion using a frequency domain stretched processor.

    Science.gov (United States)

    Reibel, Randy Ray; Harrington, Calvin; Dahl, Jason; Ostrander, Charles; Roos, Peter Aaron; Berg, Trenton; Mohan, R Krishna; Neifeld, Mark A; Babbitt, Wm R

    2009-07-06

    The first proof-of-concept demonstrations are presented for a broadband photonic-assisted analog-to-digital converter (ADC) based on spatial spectral holography (SSH). The SSH-ADC acts as a frequency-domain stretch processor converting high bandwidth input signals to low bandwidth output signals, allowing the system to take advantage of high performance, low bandwidth electronic ADCs. Demonstrations with 50 MHz effective bandwidth are shown to highlight basic performance with approximately 5 effective bits of vertical resolution. Signal capture with 1600 MHz effective bandwidth is also shown. Because some SSH materials span over 100 GHz and have large time apertures (approximately 10 micros), this technique holds promise as a candidate for the next generation of ADCs.

  17. Digital parallel-to-series pulse-train converter

    Science.gov (United States)

    Hussey, J.

    1971-01-01

    Circuit converts number represented as two level signal on n-bit lines to series of pulses on one of two lines, depending on sign of number. Converter accepts parallel binary input data and produces number of output pulses equal to number represented by input data.

  18. Transitioning from analog to digital communications: An information security perspective

    Science.gov (United States)

    Dean, Richard A.

    1990-01-01

    A summary is given of the government's perspective on evolving digital communications as they affect secure voice users and approaches for operating during a transition period to an all digital world. An integrated architecture and a mobile satellite interface are discussed.

  19. High-Speed Universal Frequency-to-Digital Converter for Quasi-Digital Sensors and Transducers

    Directory of Open Access Journals (Sweden)

    Sergey Y. Yurish

    2007-06-01

    Full Text Available New fast, accurate universal integrated frequency-to-digital converter (UFDC-1M-16 is described in the article. It is based on the novel patented modified method of the dependent count and has non-redundant conversion time from 6.25 ms to 6.25 ms for 1 to 0.001 % relative errors respectively, comparable with conversion time for successive-approximation and S-D ADC. The IC can work with different sensors, transducers and encoders, which have frequency, period, duty-cycle, PWM, phase shift, pulse number, etc. output.

  20. Method and apparatus for clockless analog-to-digital conversion and peak detection

    Science.gov (United States)

    DeGeronimo, Gianluigi

    2007-03-06

    An apparatus and method for analog-to-digital conversion and peak detection includes at least one stage, which includes a first switch, second switch, current source or capacitor, and discriminator. The discriminator changes state in response to a current or charge associated with the input signal exceeding a threshold, thereby indicating whether the current or charge associated with the input signal is greater than the threshold. The input signal includes a peak or a charge, and the converter includes a peak or charge detect mode in which a state of the switch is retained in response to a decrease in the current or charge associated with the input signal. The state of the switch represents at least a portion of a value of the peak or of the charge.

  1. A Novel Analog-to-digital conversion Technique using nonlinear duty-cycle modulation

    OpenAIRE

    Jean Mbihi; François Ndjali Beng; Martin Kom; Léandre Nneme Nneme

    2012-01-01

    A new type of analog-to-digital conversion technique is presented in this paper. The interfacing hardware is a very simple nonlinear circuit with 1-bit modulated output. As a implication, behind the hardware simplicity retained is hidden a dreadful nonlinear duty-cycle modulation ratio. However, the overall nonlinear behavior embeds a sufficiently wide linear range, for a rigorous digital reconstitution of the analog input signal using a standard linear filter. Simulation and experimental r...

  2. High Channel Count Time-to-Digital Converter and Lasercom Processor, Phase II

    Data.gov (United States)

    National Aeronautics and Space Administration — High-channel-count, high-precision, and high-throughput time-to-digital converters (TDC) are needed to support detector arrays used in deep-space optical...

  3. Conversion of a servomanipulator from analog to digital control

    International Nuclear Information System (INIS)

    Killough, S.M.; Martin, H.L.; Hamel, W.R.

    1986-01-01

    Oak Ridge National Laboratory (ORNL) has developed expertise in computer control of force-reflecting master/slave servomanipulators as a result of research for the Consolidated Fuel Reprocessing Program. These computer control capabilities have been applied to a commercially available servomanipulator, the TeleOperator Systems SM-229. All of the servo drive and control circuitry has been replaced with commercially available digital controls and amplifiers, and a customer software - package has been developed at ORNL. This conversion to digital computer control resulted in significant improvements in force-reflection characteristics, ease of operation, diagnostic capabilities, indexing features, and potential increased reliability. The system will be used at the Tokamak Fusion Test Reactor at the Princeton Plasma Physics Laboratory (PPPL) for maintenance demonstrations

  4. 7.9 pJ/Step Energy-Efficient Multi-Slope 13-bit Capacitance-to-Digital Converter

    KAUST Repository

    Omran, Hesham

    2014-08-01

    In this brief, an energy-efficient capacitance-to-digital converter (CDC) is presented. The proposed CDC uses digitally controlled coarse-fine multi-slope integration to digitize a wide range of capacitance in short conversion time. Both integration current and frequency are scaled, which leads to significant improvement in the energy efficiency of both analog and digital circuitry. Mathematical analysis for circuit nonidealities, noise, and improvement in energy efficiency is provided. A prototype fabricated in a 0.35-μm CMOS process occupies 0.09 mm2 and consumes a total of 153 μA from 3.3 V supply while achieving 13-bit resolution. The operation of the prototype is experimentally verified using MEMS capacitive pressure sensor. Compared to recently published work, the prototype achieves an excellent energy efficiency of 7.9 pJ/Step. © 2004-2012 IEEE.

  5. 7.9 pJ/Step Energy-Efficient Multi-Slope 13-bit Capacitance-to-Digital Converter

    KAUST Repository

    Omran, Hesham; Arsalan, Muhammad; Salama, Khaled N.

    2014-01-01

    In this brief, an energy-efficient capacitance-to-digital converter (CDC) is presented. The proposed CDC uses digitally controlled coarse-fine multi-slope integration to digitize a wide range of capacitance in short conversion time. Both integration current and frequency are scaled, which leads to significant improvement in the energy efficiency of both analog and digital circuitry. Mathematical analysis for circuit nonidealities, noise, and improvement in energy efficiency is provided. A prototype fabricated in a 0.35-μm CMOS process occupies 0.09 mm2 and consumes a total of 153 μA from 3.3 V supply while achieving 13-bit resolution. The operation of the prototype is experimentally verified using MEMS capacitive pressure sensor. Compared to recently published work, the prototype achieves an excellent energy efficiency of 7.9 pJ/Step. © 2004-2012 IEEE.

  6. Converting Topographic Maps into Digital Form to Aid in Archeological Research in the Peten, Guatemala

    Science.gov (United States)

    Aldrich, Serena R.

    1999-01-01

    The purpose of my project was to convert a topographical map into digital form so that the data can be manipulated and easily accessed in the field. With the data in this particular format, Dr. Sever and his colleagues can highlight the specific features of the landscape that they require for their research of the ancient Mayan civilization. Digital elevation models (DEMs) can also be created from the digitized contour features adding another dimension to their research.

  7. Digital-Analog Hybrid Scheme and Its Application to Chaotic Random Number Generators

    Science.gov (United States)

    Yuan, Zeshi; Li, Hongtao; Miao, Yunchi; Hu, Wen; Zhu, Xiaohua

    2017-12-01

    Practical random number generation (RNG) circuits are typically achieved with analog devices or digital approaches. Digital-based techniques, which use field programmable gate array (FPGA) and graphics processing units (GPU) etc. usually have better performances than analog methods as they are programmable, efficient and robust. However, digital realizations suffer from the effect of finite precision. Accordingly, the generated random numbers (RNs) are actually periodic instead of being real random. To tackle this limitation, in this paper we propose a novel digital-analog hybrid scheme that employs the digital unit as the main body, and minimum analog devices to generate physical RNs. Moreover, the possibility of realizing the proposed scheme with only one memory element is discussed. Without loss of generality, we use the capacitor and the memristor along with FPGA to construct the proposed hybrid system, and a chaotic true random number generator (TRNG) circuit is realized, producing physical RNs at a throughput of Gbit/s scale. These RNs successfully pass all the tests in the NIST SP800-22 package, confirming the significance of the scheme in practical applications. In addition, the use of this new scheme is not restricted to RNGs, and it also provides a strategy to solve the effect of finite precision in other digital systems.

  8. Nyquist AD Converters, Sensor Interfaces, and Robustness Advances in Analog Circuit Design, 2012

    CERN Document Server

    Baschirotto, Andrea; Steyaert, Michiel

    2013-01-01

    This book is based on the presentations during the 21st workshop on Advances in Analog Circuit Design.  Expert designers provide readers with information about a variety of topics at the frontier of analog circuit design, including Nyquist analog-to-digital converters, capacitive sensor interfaces, reliability, variability, and connectivity.  This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.  Provides a state-of-the-art reference in analog circuit design, written by experts from industry and academia; Presents material in a tutorial-based format; Includes coverage of Nyquist A/D converters, capacitive sensor interfaces, reliability, variability, and connectivity.

  9. Design rules for superconducting analog-digital transducers; Entwurfsregeln fuer Supraleitende Analog-Digital-Wandler

    Energy Technology Data Exchange (ETDEWEB)

    Haddad, Taghrid

    2015-05-29

    This Thesis is a contribution for dimensioning aspects of circuits designs in superconductor electronics. Mainly superconductor comparators inclusive Josephson comparators as well as QOJS-Comparators are investigated. Both types were investigated in terms of speed and sensitivity. The influence of the thermal noise on the decision process of the comparators represent in so called gray zone, which is analysed in this thesis. Thereby, different relations between design parameters were derived. A circuit model of the Josephson comparator was verified by experiments. Concepts of superconductor analog-to-digital converters, which are based on above called comparators, were investigated in detail. From the comparator design rules, new rules for AD-converters were derived. Because of the reduced switching energy, the signal to noise ratio (SNR) of the circuits is affected and therefore the reliability of the decision-process is affected. For special applications with very demanding requirements in terms of the speed and accuracy superconductor analog-to-digital converters offer an excellent performance. This thesis provides relations between different design paramenters and shows resulting trade-offs, This method is transparent and easy to transfer to other circuit topologies. As a main result, a highly predictive tool for dimensioning of superconducting ADC's is proved.

  10. High-speed multiple-channel analog to digital data-acquisition module for microprocessor systems

    International Nuclear Information System (INIS)

    Ethridge, C.D.

    1977-01-01

    Intelligent data acquisition and instrumentation systems established by the incorporation of microprocessor technology require high-speed analog to digital conversion of multiple-channel input signals. Sophisticated data systems or subsystems are enabled by the microprocessor software flexibility to establish adaptive input data procedures. These adaptive procedures are enhanced by versatile interface circuitry which is software controlled

  11. Digitalization and networking of analog simulators and portal images

    Energy Technology Data Exchange (ETDEWEB)

    Pesznyak, C.; Zarand, P.; Mayer, A. [Uzsoki Hospital, Budapest (Hungary). Inst. of Oncoradiology

    2007-03-15

    Background: Many departments have analog simulators and irradiation facilities (especially cobalt units) without electronic portal imaging. Import of the images into the R and V (Record and Verify) system is required. Material and Methods: Simulator images are grabbed while portal films scanned by using a laser scanner and both converted into DICOM RT (Digital Imaging and Communications in Medicine Radiotherapy) images. Results: Image intensifier output of a simulator and portal films are converted to DICOM RT images and used in clinical practice. The simulator software was developed in cooperation at the authors' hospital. Conclusion: The digitalization of analog simulators is a valuable updating in clinical use replacing screen-film technique. Film scanning and digitalization permit the electronic archiving of films. Conversion into DICOM RT images is a precondition of importing to the R and V system. (orig.)

  12. Digitalization and networking of analog simulators and portal images.

    Science.gov (United States)

    Pesznyák, Csilla; Zaránd, Pál; Mayer, Arpád

    2007-03-01

    Many departments have analog simulators and irradiation facilities (especially cobalt units) without electronic portal imaging. Import of the images into the R&V (Record & Verify) system is required. Simulator images are grabbed while portal films scanned by using a laser scanner and both converted into DICOM RT (Digital Imaging and Communications in Medicine Radiotherapy) images. Image intensifier output of a simulator and portal films are converted to DICOM RT images and used in clinical practice. The simulator software was developed in cooperation at the authors' hospital. The digitalization of analog simulators is a valuable updating in clinical use replacing screen-film technique. Film scanning and digitalization permit the electronic archiving of films. Conversion into DICOM RT images is a precondition of importing to the R&V system.

  13. A Temperature-to-Digital Converter Based on an Optimized Electrothermal Filter

    NARCIS (Netherlands)

    Kashmiri, S.M.; Xia, S.; Makinwa, K.A.A.

    2009-01-01

    This paper describes the design of a CMOS temperature-to-digital converter (TDC). It operates by measuring the temperature-dependent phase shift of an electrothermal filter (ETF). Compared to previous work, this TDC employs an ETF whose layout has been optimized to minimize the thermal phase spread

  14. A 33fJ/Step SAR Capacitance-to-Digital Converter Using a Chain of Inverter-Based Amplifiers

    KAUST Repository

    Omran, Hesham

    2016-11-16

    A 12 - bit energy-efficient capacitive sensor interface circuit that fully relies on capacitance-domain successive approximation (SAR) technique is presented. Analysis shows that for SAR capacitance-to-digital converter (CDC) comparator offset voltage will result in parasitic-dependent conversion errors, which necessitates using an offset cancellation technique. Based on the presented analysis, a SAR CDC that uses a chain of cascode inverter-based amplifiers with near-threshold biasing is proposed to provide robust, energy-efficient, and fast operation. A hybrid coarse-fine capacitive digital-to-analog converter (CapDAC) achieves 11.7 - bit effective resolution, and provides 83% area saving compared to a conventional binary weighted implementation. The prototype fabricated in a 0.18μm CMOS technology is experimentally verified using MEMS capacitive pressure sensor. Experimental results show an energy efficiency figure-of-merit (FoM) of 33 f J/Step which outperforms the state-of-the-art. The CDC output is insensitive to analog references; thus, a very low temperature sensitivity of 2.3 ppm/°C is achieved without the need for calibration.

  15. A 33fJ/Step SAR Capacitance-to-Digital Converter Using a Chain of Inverter-Based Amplifiers

    KAUST Repository

    Omran, Hesham; Alhoshany, Abdulaziz; Alahmadi, Hamzah; Salama, Khaled N.

    2016-01-01

    A 12 - bit energy-efficient capacitive sensor interface circuit that fully relies on capacitance-domain successive approximation (SAR) technique is presented. Analysis shows that for SAR capacitance-to-digital converter (CDC) comparator offset voltage will result in parasitic-dependent conversion errors, which necessitates using an offset cancellation technique. Based on the presented analysis, a SAR CDC that uses a chain of cascode inverter-based amplifiers with near-threshold biasing is proposed to provide robust, energy-efficient, and fast operation. A hybrid coarse-fine capacitive digital-to-analog converter (CapDAC) achieves 11.7 - bit effective resolution, and provides 83% area saving compared to a conventional binary weighted implementation. The prototype fabricated in a 0.18μm CMOS technology is experimentally verified using MEMS capacitive pressure sensor. Experimental results show an energy efficiency figure-of-merit (FoM) of 33 f J/Step which outperforms the state-of-the-art. The CDC output is insensitive to analog references; thus, a very low temperature sensitivity of 2.3 ppm/°C is achieved without the need for calibration.

  16. Algorithmic impediments filtration using the α-truncated mean method in resolver-to-digital converter

    Directory of Open Access Journals (Sweden)

    Gordiyenko V. I.

    2009-02-01

    Full Text Available A test diagram of the microcontroller-type resolver-to-digital converter and algorithms for impediments filtration therein are developed. Experimental verification of the α-truncated mean algorithm intended for the suppression of impulse and noise interference is conducted. The test results are given.

  17. Digital to analog resistive switching transition induced by graphene buffer layer in strontium titanate based devices.

    Science.gov (United States)

    Wan, Tao; Qu, Bo; Du, Haiwei; Lin, Xi; Lin, Qianru; Wang, Da-Wei; Cazorla, Claudio; Li, Sean; Liu, Sidong; Chu, Dewei

    2018-02-15

    Resistive switching behaviour can be classified into digital and analog switching based on its abrupt and gradual resistance change characteristics. Realizing the transition from digital to analog switching in the same device is essential for understanding and controlling the performance of the devices with various switching mechanisms. Here, we investigate the resistive switching in a device made with strontium titanate (SrTiO 3 ) nanoparticles using X-ray diffractometry, scanning electron microscopy, Raman spectroscopy, and direct electrical measurements. It is found that the well-known rupture/formation of Ag filaments is responsible for the digital switching in the device with Ag as the top electrode. To modulate the switching performance, we insert a reduced graphene oxide layer between SrTiO 3 and the bottom FTO electrode owing to its good barrier property for the diffusion of Ag ions and high out-of-plane resistance. In this case, resistive switching is changed from digital to analog as determined by the modulation of interfacial resistance under applied voltage. Based on that controllable resistance, potentiation and depression behaviours are implemented as well. This study opens up new ways for the design of multifunctional devices which are promising for memory and neuromorphic computing applications. Copyright © 2017 Elsevier Inc. All rights reserved.

  18. A Capacitance-To-Digital Converter for MEMS Sensors for Smart Applications.

    Science.gov (United States)

    Pérez Sanjurjo, Javier; Prefasi, Enrique; Buffa, Cesare; Gaggl, Richard

    2017-06-07

    The use of MEMS sensors has been increasing in recent years. To cover all the applications, many different readout circuits are needed. To reduce the cost and time to market, a generic capacitance-to-digital converter (CDC) seems to be the logical next step. This work presents a configurable CDC designed for capacitive MEMS sensors. The sensor is built with a bridge of MEMS, where some of them function with pressure. Then, the capacitive to digital conversion is realized using two steps. First, a switched-capacitor (SC) preamplifier is used to make the capacitive to voltage (C-V) conversion. Second, a self-oscillated noise-shaping integrating dual-slope (DS) converter is used to digitize this magnitude. The proposed converter uses time instead of amplitude resolution to generate a multibit digital output stream. In addition it performs noise shaping of the quantization error to reduce measurement time. This article shows the effectiveness of this method by measurements performed on a prototype, designed and fabricated using standard 0.13 µm CMOS technology. Experimental measurements show that the CDC achieves a resolution of 17 bits, with an effective area of 0.317 mm², which means a pressure resolution of 1 Pa, while consuming 146 µA from a 1.5 V power supply.

  19. Implementation of high-resolution time-to-digital converter in 8-bit microcontrollers.

    Science.gov (United States)

    Bengtsson, Lars E

    2012-04-01

    This paper will demonstrate how a time-to-digital converter (TDC) with sub-nanosecond resolution can be implemented into an 8-bit microcontroller using so called "direct" methods. This means that a TDC is created using only five bidirectional digital input-output-pins of a microcontroller and a few passive components (two resistors, a capacitor, and a diode). We will demonstrate how a TDC for the range 1-10 μs is implemented with 0.17 ns resolution. This work will also show how to linearize the output by combining look-up tables and interpolation. © 2012 American Institute of Physics

  20. Application of digital control techniques for satellite medium power DC-DC converters

    Science.gov (United States)

    Skup, Konrad R.; Grudzinski, Pawel; Nowosielski, Witold; Orleanski, Piotr; Wawrzaszek, Roman

    2010-09-01

    The objective of this paper is to present a work concerning a digital control loop system for satellite medium power DC-DC converters that is done in Space Research Centre. The whole control process of a described power converter bases on a high speed digital signal processing. The paper presents a development of a FPGA digital controller for voltage mode stabilization that was implemented using VHDL. The described controllers are a classical digital PID controller and a bang-bang controller. The used converter for testing is a simple model of 5-20 W, 200 kHz buck power converter. A high resolution digital PWM approach is presented. Additionally a simple and effective solution of filtering of an analog-to-digital converter output is presented.

  1. Low-Power, Low-Voltage Resistance-to-Digital Converter for Sensing Applications

    Directory of Open Access Journals (Sweden)

    Sergey Y. YURISH

    2016-09-01

    Full Text Available IC (ASIP of Universal Sensors and Transducers Interface (USTI-MOB with low power consumption, working in the resistive measurement mode (one of 26 possible measuring modes is described in the article. The proposed IC has 20 W to 4.5 M W range of measurement, relative error< ±0.04 %, 0.85 mA supply current and 1.2 V supply voltage. The worst-case error of about< ±1.54 % is observed. IC has three popular serial interfaces: I2C, SPI and RS232/USB. Due to high metrological performance and technical characteristics the USTI- MOB is well suitable for such application as: sensor systems for IoT, wearable and mobile devices, and digital multimeters. The ICs can also work with any quasi-digital resistive converters, in which the resistance is converted to frequency, period, duty-cycle or pulse width.

  2. Development of a fast time-to-digital converter (TDC) using a programmable gate array

    International Nuclear Information System (INIS)

    Mine, Shun-ichi; Tokushuku, Katsuo; Yamada, Sakue.

    1994-09-01

    A fast time-to-digital converter with a 5 ns step was designed and tested by utilizing a user-programmable gate array. The stabilities against temperature and supply voltage variation were measured. A module was built with this TDC, and was successfully used in the first-level trigger system of the ZEUS detector to reject proton-beam induced background events. (author)

  3. CMOS time-to-digital converters for mixed-mode signal processing

    OpenAIRE

    Fei Yuan

    2014-01-01

    This study provides an in-depth review of the principles, architectures and design techniques of CMOS time-to-digital converters (TDCs). The classification of TDCs is introduced. It is followed by the examination of the parameters quantifying the performance of TDCs. Sampling TDCs including direct-counter TDCs, tapped delay-line TDCs, pulse-shrinking delay-line TDCs, cyclic pulse-shrinking TDCs, direct-counter TDCs with interpolation, vernier TDCs, flash TDCs, successive approximation TDCs an...

  4. Sensor Interfaces for Private Home Automation: From Analog to Digital, Wireless and Autonomous

    Directory of Open Access Journals (Sweden)

    Erich Leder

    2007-08-01

    Full Text Available In this paper a flexible and reliable system for smart home automation is presented. It is based on standardized hardware and open source communication protocols. Firstly, a special sensor interface has been developed, which allows the measurement of (slow analog signals to be determined by inexpensive digital PLC input terminals. Right now, up to eleven different modules have been implemented and the system is being tested in several configurations. In a second step, the communication is digitized. With the digitalization of the sensor modules, based on the implementation of a PIC Microcontroller, more intelligence is provided to the module, which increases the power and flexibility of the whole system. Thirdly, a wireless sensor-system consisting of a base station and of a mobile measuring unit is developed. The autonomous mobile unit is realized by using solar powering, gold cap energy storage, low-power circuits and a radio communication interface.

  5. Analog and digital image quality:

    OpenAIRE

    Sardo, Alberto

    2004-01-01

    Background. Lastly the X ray facilities are moving to a slow, but continuous process of digitalization. The dry laser printers allow hardcopy images with optimum resolution and contrast for all the modalities. In breast imaging, thedelay of digitalization depends to the high cost of digital systems and, attimes, to the doubts of the diagnostic accuracy of reading the breast digital images. Conclusions. The Screen film mammography (SFM) is the most efficient diagnostic modality to detect the b...

  6. Emergent Explorations: Analog and Digital Scripting

    OpenAIRE

    Worden, Alexander

    2011-01-01

    This book documents an exploration of emergent and linear modes of defining space, form, and structure. The thesis highlights a dialog between analog and digital modeling techniques, in concept and project development. It identifies that analog modeling techniques, coupled with judgment, can be used to develop complex forms. The thesis project employs critical judgment and the textile techniques of crochet as a vehicle generate form. Crochet lends itself to this investigation because it ...

  7. Methodology for the digital calibration of analog circuits and systems with case studies

    CERN Document Server

    Pastre, Marc

    2006-01-01

    Methodology for the Digital Calibration of Analog Circuits and Systems shows how to relax the extreme design constraints in analog circuits, allowing the realization of high-precision systems even with low-performance components. A complete methodology is proposed, and three applications are detailed. To start with, an in-depth analysis of existing compensation techniques for analog circuit imperfections is carried out. The M/2+M sub-binary digital-to-analog converter is thoroughly studied, and the use of this very low-area circuit in conjunction with a successive approximations algorithm for digital compensation is described. A complete methodology based on this compensation circuit and algorithm is then proposed. The detection and correction of analog circuit imperfections is studied, and a simulation tool allowing the transparent simulation of analog circuits with automatic compensation blocks is introduced. The first application shows how the sub-binary M/2+M structure can be employed as a conventional di...

  8. A new delay line loops shrinking time-to-digital converter in low-cost FPGA

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, Jie, E-mail: zhangjie071063@163.com [State Key Laboratory of Geodesy and Earth’s Dynamics, Institute of Geodesy and Geophysics, CAS, Wuhan, China, 430077 (China); University of Chinese Academy of Sciences, Beijing, China, 100049 (China); Zhou, Dongming [State Key Laboratory of Geodesy and Earth’s Dynamics, Institute of Geodesy and Geophysics, CAS, Wuhan, China, 430077 (China)

    2015-01-21

    The article provides the design and test results of a new time-to-digital converter (TDC) based on delay line loops shrinking method and implemented in a low-cost field programmable gate array (FPGA) device. A technique that achieves high resolution with low cost and flexibility is presented. The technique is based on two delay line loops which are used to directly shrink the measured time interval in the designed TDC, and the resolution is dependent on the difference between the entire delay times of the two delay line loops. In order to realize high resolution and eliminate temperature influence, the two delay line loops consist of the same delay cells with the same number. A delay-locked loop (DLL) is used to stabilize the resolution against process variations and ambient conditions. Meanwhile, one method is used to accurately evaluate the resolution of the implemented TDC. The converter has been implemented in a general-propose FPGA device (Actel SmartFusion A2F200M3). A single shot resolution of the implemented converter is 63.3 ps and the measurement standard deviation is about 61.7 ps within the measurement range of 5 ns. - Highlights: • We provide a new FPGA-integrated time-to-digital converter based on delay line loops method which used two delay line loops to directly shrink time intervals with only rising edges. • The two delay line loops consist of the same delay cells with the same number and symmetrical structure. • The resolution is dependent on the difference between the entire delays of the two delay line loops. • We use delay-locked loop to stabilize the resolution against temperature and supply voltage.

  9. A new delay line loops shrinking time-to-digital converter in low-cost FPGA

    International Nuclear Information System (INIS)

    Zhang, Jie; Zhou, Dongming

    2015-01-01

    The article provides the design and test results of a new time-to-digital converter (TDC) based on delay line loops shrinking method and implemented in a low-cost field programmable gate array (FPGA) device. A technique that achieves high resolution with low cost and flexibility is presented. The technique is based on two delay line loops which are used to directly shrink the measured time interval in the designed TDC, and the resolution is dependent on the difference between the entire delay times of the two delay line loops. In order to realize high resolution and eliminate temperature influence, the two delay line loops consist of the same delay cells with the same number. A delay-locked loop (DLL) is used to stabilize the resolution against process variations and ambient conditions. Meanwhile, one method is used to accurately evaluate the resolution of the implemented TDC. The converter has been implemented in a general-propose FPGA device (Actel SmartFusion A2F200M3). A single shot resolution of the implemented converter is 63.3 ps and the measurement standard deviation is about 61.7 ps within the measurement range of 5 ns. - Highlights: • We provide a new FPGA-integrated time-to-digital converter based on delay line loops method which used two delay line loops to directly shrink time intervals with only rising edges. • The two delay line loops consist of the same delay cells with the same number and symmetrical structure. • The resolution is dependent on the difference between the entire delays of the two delay line loops. • We use delay-locked loop to stabilize the resolution against temperature and supply voltage

  10. Time-to-digital converter for a time-correlation analyzer

    International Nuclear Information System (INIS)

    Kumpf, S.

    1979-01-01

    An electronic circuit operating as a time-to-digital converter is described. It receives pulses from eight n-detectors on eight input channels which are converted into the first half of a 16-bit word. The work called 'label' is indicating the channel on which an event has arrived. Contemporarily a crystal controlled four stage 4-bit binary counter gives the time when the event arrives expressed in the form of a second 16-bit work called 'time'. These two words are fed via a FIFO-buffer and a DMA-control to a very fast minicomputer Miproc 16 from Plessey-Micro-Systems with a cycle time of 250 ns. The circuit is built in TTL-technique on two double Europa-format cards and is built into the card bay of the Miproc 16 and acts as a peripheral device

  11. A multichannel time-to-digital converter ASIC with better than 3 ps RMS time resolution

    International Nuclear Information System (INIS)

    Perktold, L; Christiansen, J

    2014-01-01

    The development of a new multichannel, fine-time resolution time-to-digital converter (TDC) ASIC is currently under development at CERN. A prototype TDC has been designed, fabricated and successfully verified with demonstrated time resolutions of better than 3 ps-rms. Least-significant-bit (LSB) sizes as small as 5 ps with a differential-non-linearity (DNL) of better than ±0.9 LSB and integral-non-linearity (INL) of better than ±1.3 LSB respectively have been achieved. The contribution describes the implemented architecture and presents measurement results of a prototype ASIC implemented in a commercial 130 nm technology

  12. Low cost time to digital converter in real time with +-1 ns resolution

    Energy Technology Data Exchange (ETDEWEB)

    Lenzi, G; Podini, P; Reverberi, R [Parma Univ. (Italy). Istituto di Fisica; Pernestaal, K [Uppsala Univ. (Sweden). Fysiska Institutionen

    1977-04-15

    A time to digital converter (TDC) with a time resolution of 1 ns has been designed. The deadtime is T+0.6 ..mu..s where T is the measured time. The time range can be preselected between 0.3 and 10 ..mu..s. The TDC has one START and three mutually exclusive STOP inputs which accept standard pulses (-16 mA). The time information is presented as a bit binary word, including the activated stop input address. The instrument has been successfully used in ..mu../sup +/SR (muon spin rotation) measurements and has proven itself advantageous over the more common TAC+ADC combination.

  13. Signal-to-noise ratio estimation in digital computer simulation of lowpass and bandpass systems with applications to analog and digital communications, volume 3

    Science.gov (United States)

    Tranter, W. H.; Turner, M. D.

    1977-01-01

    Techniques are developed to estimate power gain, delay, signal-to-noise ratio, and mean square error in digital computer simulations of lowpass and bandpass systems. The techniques are applied to analog and digital communications. The signal-to-noise ratio estimates are shown to be maximum likelihood estimates in additive white Gaussian noise. The methods are seen to be especially useful for digital communication systems where the mapping from the signal-to-noise ratio to the error probability can be obtained. Simulation results show the techniques developed to be accurate and quite versatile in evaluating the performance of many systems through digital computer simulation.

  14. Analog-to-digital clinical data collection on networked workstations with graphic user interface.

    Science.gov (United States)

    Lunt, D

    1991-02-01

    An innovative respiratory examination system has been developed that combines physiological response measurement, real-time graphic displays, user-driven operating sequences, and networked file archiving and review into a scientific research and clinical diagnosis tool. This newly constructed computer network is being used to enhance the research center's ability to perform patient pulmonary function examinations. Respiratory data are simultaneously acquired and graphically presented during patient breathing maneuvers and rapidly transformed into graphic and numeric reports, suitable for statistical analysis or database access. The environment consists of the hardware (Macintosh computer, MacADIOS converters, analog amplifiers), the software (HyperCard v2.0, HyperTalk, XCMDs), and the network (AppleTalk, fileservers, printers) as building blocks for data acquisition, analysis, editing, and storage. System operation modules include: Calibration, Examination, Reports, On-line Help Library, Graphic/Data Editing, and Network Storage.

  15. Simulation of the High Performance Time to Digital Converter for the ATLAS Muon Spectrometer trigger upgrade

    International Nuclear Information System (INIS)

    Meng, X.T.; Levin, D.S.; Chapman, J.W.; Zhou, B.

    2016-01-01

    The ATLAS Muon Spectrometer endcap thin-Resistive Plate Chamber trigger project compliments the New Small Wheel endcap Phase-1 upgrade for higher luminosity LHC operation. These new trigger chambers, located in a high rate region of ATLAS, will improve overall trigger acceptance and reduce the fake muon trigger incidence. These chambers must generate a low level muon trigger to be delivered to a remote high level processor within a stringent latency requirement of 43 bunch crossings (1075 ns). To help meet this requirement the High Performance Time to Digital Converter (HPTDC), a multi-channel ASIC designed by CERN Microelectronics group, has been proposed for the digitization of the fast front end detector signals. This paper investigates the HPTDC performance in the context of the overall muon trigger latency, employing detailed behavioral Verilog simulations in which the latency in triggerless mode is measured for a range of configurations and under realistic hit rate conditions. The simulation results show that various HPTDC operational configurations, including leading edge and pair measurement modes can provide high efficiency (>98%) to capture and digitize hits within a time interval satisfying the Phase-1 latency tolerance.

  16. Design rules for superconducting analog-digital transducers

    International Nuclear Information System (INIS)

    Haddad, Taghrid

    2015-01-01

    This Thesis is a contribution for dimensioning aspects of circuits designs in superconductor electronics. Mainly superconductor comparators inclusive Josephson comparators as well as QOJS-Comparators are investigated. Both types were investigated in terms of speed and sensitivity. The influence of the thermal noise on the decision process of the comparators represent in so called gray zone, which is analysed in this thesis. Thereby, different relations between design parameters were derived. A circuit model of the Josephson comparator was verified by experiments. Concepts of superconductor analog-to-digital converters, which are based on above called comparators, were investigated in detail. From the comparator design rules, new rules for AD-converters were derived. Because of the reduced switching energy, the signal to noise ratio (SNR) of the circuits is affected and therefore the reliability of the decision-process is affected. For special applications with very demanding requirements in terms of the speed and accuracy superconductor analog-to-digital converters offer an excellent performance. This thesis provides relations between different design paramenters and shows resulting trade-offs, This method is transparent and easy to transfer to other circuit topologies. As a main result, a highly predictive tool for dimensioning of superconducting ADC's is proved.

  17. Energy-Efficient Capacitance-to-Digital Converters for Smart Sensor Applications

    KAUST Repository

    Alhoshany, Abdulaziz

    2017-12-01

    One of the key requirements in the design of wireless sensor nodes and miniature biomedical devices is energy efficiency. For a sensor node, which is a sensor and readout circuit, to survive on limited energy sources such as a battery or harvested energy, its energy consumption should be minimized. Capacitive sensors are candidates for use in energy-constrained applications, as they do not consume static power and can be used in a wide range of applications to measure different physical, chemical or biological quantities. However, the energy consumption is dominated by the capacitive interface circuit, i.e. the capacitance-to-digital converter (CDC). Several energy-efficient CDC architectures are introduced in this dissertation to meet the demand for high resolution and energy efficiency in smart capacitive sensors. First, we propose an energy-efficient CDC based on a differential successive-approximation data converter. The proposed differential CDC employs an energy-efficient operational transconductance amplifier (OTA) based on an inverter. A wide capacitance range with fine absolute resolution is implemented in the proposed coarse-fine DAC architecture which saves 89% of silicon area. The proposed CDC achieves an energy efficiency figure-of-merit () of 45.8fJ/step, which is the best reported energy efficiency to date. Second, we propose an energy efficient CDC for high-precision capacitive resolution by using oversampling and noise shaping. The proposed CDC achieves 150 aF absolute resolution and an energy efficiency of 187fJ/conversion-step which outperforms state of the art high-precision differential CDCs. In the third and last part, we propose an in-vitro cancer diagnostic biosensor-CMOS platform for low-power, rapid detection, and low cost. The introduced platform is the first to demonstrate the ability to screen and quantify the spermidine/spermine N1 acetyltransferase (SSAT) enzyme which reveals the presence of early-stage cancer, on the surface of a

  18. A 41 ps ASIC time-to-digital converter for physics experiments

    International Nuclear Information System (INIS)

    Russo, Stefano; Petra, Nicola; De Caro, Davide; Barbarino, Giancarlo; Strollo, Antonio G.M.

    2011-01-01

    We present a novel Time-to-Digital (TDC) converter for physics experiments. Proposed TDC is based on a synchronous counter and an asynchronous fine interpolator. The fine part of the measurement is obtained using NORA inverters that provide improved resolution. A prototype IC was fabricated in 180 nm CMOS technology. Experimental measurements show that proposed TDC features 41 ps resolution associated with 0.35LSB differential non-linearity, 0.77LSB integral non-linearity and a negligible single shot precision. The whole dynamic range is equal to 18μs. The proposed TDC is designed using a flash architecture that reduces dead time. Data reported in the paper show that our design is well suited for present and future particle physics experiments.

  19. High-Resolution Digital-to-Time Converter Implemented in an FPGA Chip

    Directory of Open Access Journals (Sweden)

    Hai Wang

    2017-01-01

    Full Text Available This paper presents the design and implementation of a new digital-to-time converter (DTC. The obtained resolution is 1.02 ps, and the dynamic range is about 590 ns. The experimental results indicate that the measured differential nonlinearity (DNL and integral nonlinearity (INL are −0.17~+0.13 LSB and −0.35~+0.62 LSB, respectively. This DTC builds coarse and fine Vernier delay lines constructed by programmable delay lines (PDLs to ensure high performance delay. Benefited by the close-loop feedback mechanism of the PDLs’ control module, the presented DTC has excellent voltage and temperature stability. What is more, the proposed DTC can be implemented in a single field programmable gate array (FPGA chip.

  20. Design and implementation of double oscillator time-to-digital converter using SFQ logic circuits

    International Nuclear Information System (INIS)

    Nishigai, T.; Ito, M.; Yoshikawa, N.; Fujimaki, A.; Terai, H.; Yorozu, S.

    2005-01-01

    We have designed, fabricated and tested a time-to-digital converter (TDC) using SFQ logic circuits. The proposed TDC consists of two sets of ring oscillators and binary counters, and a coincidence detector (CD), which detects the coincidence of the arrival of two SFQ pulses from two ring oscillators. The advantage of the proposed TDC is its simple circuit structure with wide measurement range. The time resolution of the proposed TDC is limited by the resolution of the CD, which is about 10 ps because it is made by an NDRO cell in this study. The circuits are implemented using NEC 2.5 kA/cm 2 Nb standard process and the CONNECT cell library. We have demonstrated the measurement of the propagation delay of a Josephson transmission line by the TDC with the time resolution of about 10 ps

  1. Latin Letters Recognition Using Optical Character Recognition to Convert Printed Media Into Digital Format

    Directory of Open Access Journals (Sweden)

    Rio Anugrah

    2017-12-01

    Full Text Available Printed media is still popular now days society. Unfortunately, such media encountered several drawbacks. For example, this type of media consumes large storage that impact in high maintenance cost. To keep printed information more efficient and long-lasting, people usually convert it into digital format. In this paper, we built Optical Character Recognition (OCR system to enable automatic conversion the image containing the sentence in Latin characters into digital text-shaped information. This system consists of several interrelated stages including preprocessing, segmentation, feature extraction, classifier, model and recognition. In preprocessing, the median filter is used to clarify the image from noise and the Otsu’s function is used to binarize the image. It followed by character segmentation using connected component labeling. Artificial neural network (ANN is used for feature extraction to recognize the character. The result shows that this system enable to recognize the characters in the image whose success rate is influenced by the training of the system.

  2. Design and characterization of a mixed-signal PCB for digital-to-analog conversion in a modular and scalable infrared scene projector

    Science.gov (United States)

    Benedict, Jacob

    Infra-red (IR) sensors have proven instrumental in a wide variety of fields from military to industrial applications. The proliferation of IR sensors has spawned an intense push for technologies that can test and calibrate the multitudes of IR sensors. One such technology, IR scene projection (IRSP), provides an inexpensive and safe method for the testing of IR sensor devices. Previous efforts have been conducted to develop IRSPs based on super-lattice light emitting diodes (SLEDS). A single-color 512x512 SLEDs system has been developed, produced, and tested as documented in Corey Lange's Master's thesis, and a GOMAC paper by Rodney McGee [1][2]. Current efforts are being undergone to develop a two-color 512x512 SLEDs system designated (TCSA). The following thesis discusses the design and implementation of a custom printed circuit board (PCB), known as the FMC 4DAC, that contains both analog and digital signals. Utilizing two 16-bit digital-to-analog converters (DAC) the purpose of the board is to provide four analog current output channels for driving the TCSA system to a maximum frame rate of 1 kHz. In addition, the board supports a scalable TCSA system architecture. Several copies of the board can be run in parallel to achieve a range of analog channels between 4 and 32.

  3. A REVIEW OF HUMAN-SYSTEM INTERFACE DESIGN ISSUES OBSERVED DURING ANALOG-TO-DIGITAL AND DIGITAL-TO-DIGITAL MIGRATIONS IN U.S. NUCLEAR POWER PLANTS

    Energy Technology Data Exchange (ETDEWEB)

    Kovesdi, C.; Joe, J.

    2017-05-01

    The United States (U.S.) Department of Energy (DOE) Light Water Reactor Sustainability (LWRS) program is developing a scientific basis through targeted research and development (R&D) to support the U.S. nuclear power plant (NPP) fleet in extending their existing licensing period and ensuring their long-term reliability, productivity, safety, and security. Over the last several years, human factors engineering (HFE) professionals at the Idaho National Laboratory (INL) have supported the LWRS Advanced Instrumentation, Information, and Control (II&C) System Technologies pathway across several U.S. commercial NPPs in analog-to-digital migrations (i.e., turbine control systems) and digital-to-digital migrations (i.e., Safety Parameter Display System). These efforts have included in-depth human factors evaluation of proposed human-system interface (HSI) design concepts against established U.S. Nuclear Regulatory Commission (NRC) design guidelines from NUREG-0700, Rev 2 to inform subsequent HSI design prior to transitioning into Verification and Validation. This paper discusses some of the overarching design issues observed from these past HFE evaluations. In addition, this work presents some observed challenges such as common tradeoffs utilities are likely to face when introducing new HSI technologies into NPP hybrid control rooms. The primary purpose of this work is to distill these observed design issues into general HSI design guidance that industry can use in early stages of HSI design.

  4. Principles of digital and analog communications

    CERN Document Server

    Gibson, Jerry D

    1993-01-01

    This textbook for the first course in communications covers analog and digital systems and emphasizes digital communications. It covers data transmission, signal space, optimal receivers, and pulse code modulation, and includes readable treatments of coded modulation and continuous phase modulation. Advanced mathematics is kept to a minimum-Fourier series, Fourier transforms, linear systems, random variables, and stochastic process are described thoroughly. It includes data compression of speech and images and a full chapter coverage of information theory, rate distortion theory and coded modulation. It relates digital communications theory to current practice and covers digital communications over band-width constrained channels, including pulse shaping and equilization. -- Dieser Text bezieht sich auf eine vergriffene oder nicht verfügbare Ausgabe dieses Titels.

  5. Analog and digital dividers for mass spectrometers

    International Nuclear Information System (INIS)

    Osipov, A.K.

    1980-01-01

    Errors of four different types of stress dividers used in statical mass-spectrometers for determination of mass number by accelerating stress are analyzed. The simplest flowsheet of the analog divider comprises operation amplifier, in the chain of the negative feedback of which a multiplication device on differential cascade is switched- in. This analog divider has high sensitivity to temperature and high error approximately 5%. Application of the multiplier on differential cascade with normalization permits to increase temperature stability and decrease the error up to 1%. Another type of the analog divider is a logarithmic divider the error of which is constant within the whole operation range and it constitutes 1-5%. The digital divider with a digital-analog transformer (DAT) has the error of +-0.015% which is determined by the error of detectors and resistance of keys in the locked state. Considered is the design of a divider based on transformation of the inlet stress into the time period. The error of the divider is determined in this case mainly by stress of the zero shift of the operation amplifier (it should be compensated) and relative threshold stability of the comparator triggering which equals (2-3)x10 -4 . It is noted that the divider with DAT application and the divider with the use of stress transformation within the time period are most perspective ones for statical mass-spectrometers [ru

  6. Amplitude-to-frequency converter of radioisotope instruments

    International Nuclear Information System (INIS)

    Demchenkov, V.P.; Korobkov, I.N.

    1988-01-01

    An amplitude-to-frequency converter designed for signal processing of radioisotope relay devices is descibed. The basic elements of the converter are a scaling amplifier, an analog-to-digital converter, a code-to-frequency converter, a null-organ, a delay unit and a clock-pulse generator. The designed amplitude-to-frequency converter takes into account a prior information about the signal shape of the energy spectrum. The converter processes input pulses of 0.10 V amplitude and duration more than 2μs. The energy channel number is 64

  7. The influence of the analog-to-digital conversion error on the JT-60 plasma position/shape feedback control system

    International Nuclear Information System (INIS)

    Yoshida, Michiharu; Kurihara, Kenichi

    1995-12-01

    In the plasma feedback control system (PFCS) and the direct digital controller (DDC) for the poloidal field coil power supply in the JT-60 tokamak, it is necessary to observe signals of all the poloidal field coil currents. Each of the signals, originally measured by a single sensor, is distributed to the PFCS and DDC through different cable routes and different analog-to-digital converters from each other. This produces the conversion error to the amount of several bits. Consequently, proper voltage from feedback calculation cannot be applied to the coil, and hence the control performance is possibly supposed to deteriorate to a certain extent. This paper describes how this error makes an influence on the plasma horizontal position control and how to improve the deteriorated control performance. (author)

  8. Subnanosecond time-to-digital converter implemented in a Kintex-7 FPGA

    Science.gov (United States)

    Sano, Y.; Horii, Y.; Ikeno, M.; Sasaki, O.; Tomoto, M.; Uchida, T.

    2017-12-01

    Time-to-digital converters (TDCs) are used in various fields, including high-energy physics. One advantage of implementing TDCs in field-programmable gate arrays (FPGAs) is the flexibility on the modification of the logics, which is useful to cope with the changes in the experimental conditions. Recent FPGAs make it possible to implement TDCs with a time resolution less than 10 ps. On the other hand, various drift chambers require a time resolution of O(0.1) ns, and a simple and easy-to-implement TDC is useful for a robust operation. Herein an eight-channel TDC with a variable bin size down to 0.28 ns is implemented in a Xilinx Kintex-7 FPGA and tested. The TDC is based on a multisampling scheme with quad phase clocks synchronised with an external reference clock. Calibration of the bin size is unnecessary if a stable reference clock is available, which is common in high-energy physics experiments. Depending on the channel, the standard deviation of the differential nonlinearity for a 0.28 ns bin size is 0.13-0.31. The performance has a negligible dependence on the temperature. The power consumption and the potential to extend the number of channels are also discussed.

  9. A CMOS delay locked loop and sub-nanosecond time-to-digital converter chip

    International Nuclear Information System (INIS)

    Santos, D.M.; Dow, S.F.; Flasck, J.M.; Levi, M.E.

    1996-01-01

    Phase-locked loops have been employed in the past to obtain sub-nanosecond time resolution in high energy physics and nuclear science applications. An alternative solution based on a delay-locked loop (DLL) is described. This solution allows for a very high level of integration yet still offers resolution in the sub-nanosecond regime. Two variations on this solution are outlined. A novel phase detector, based on the Mueller C-element, is used to implement a charge pump where the injected charge approaches zero as the loop approaches lock on the leading edge of an input clock reference. This greatly reduces timing jitter. In the second variation the loop locks to both the leading and trailing clock edges. In this second implementation, software coded layout generators are used to automatically layout a highly integrated, multichannel, time-to-digital converter (TDC) targeted for one specific frequency. The two circuits, DLL and TDC, are implemented in CMOS 1.2 microm and 0.8 microm technologies, respectively. Test results show a timing jitter of less than 30 ps for the DLL circuit and less than 190 ps integral and differential nonlinearity for the TDC circuit

  10. A CMOS delay locked loop and sub-nanosecond time-to-digital converter chip

    International Nuclear Information System (INIS)

    Santos, D.M.; Dow, S.F.; Levi, M.E.

    1995-12-01

    Many high energy physics and nuclear science applications require sub-nanosecond time resolution measurements over many thousands of detector channels. Phase-locked loops have been employed in the past to obtain accurate time references for these measurements. An alternative solution, based on a delay-locked loop (DLL) is described. This solution allows for a very high level of integration yet still offers resolution in the sub-nanosecond regime. Two variations on this solution are outlined. A novel phase detector, based on the Muller C element, is used to implement a charge pump where the injected charge approaches zero as the loop approaches lock on the leading edge of an input clock reference. This greatly reduces timing jitter. In the second variation the loop locks to both the leading and trailing clock edges. In this second implementation, software coded layout generators are used to automatically layout a highly integrated, multi-channel, time to digital converter (TDC). Complex clock generation can be, achieved by taking symmetric taps off the delay elements. The two circuits, DLL and TDC, were implemented in a CMOS 1.2μm and 0.8μm technology, respectively. Test results show a timing jitter of less than 35 ps for the DLL circuit and better solution for the TDC circuit

  11. High resolution distributed time-to-digital converter (TDC) in a White Rabbit network

    International Nuclear Information System (INIS)

    Pan, Weibin; Gong, Guanghua; Du, Qiang; Li, Hongming; Li, Jianmin

    2014-01-01

    The Large High Altitude Air Shower Observatory (LHAASO) project consists of a complex detector array with over 6000 detector nodes spreading over 1.2 km 2 areas. The arrival times of shower particles are captured by time-to-digital converters (TDCs) in the detectors' frontend electronics, the arrival direction of the high energy cosmic ray are then to be reconstructed from the space-time information of all detector nodes. To guarantee the angular resolution of 0.5°, a time synchronization of 500 ps (RMS) accuracy and 100 ps precision must be achieved among all TDC nodes. A technology enhancing Gigabit Ethernet, called the White Rabbit (WR), has shown the capability of delivering sub-nanosecond accuracy and picoseconds precision of synchronization over the standard data packet transfer. In this paper we demonstrate a distributed TDC prototype system combining the FPGA based TDC and the WR technology. With the time synchronization and data transfer services from a compact WR node, separate FPGA-TDC nodes can be combined to provide uniform time measurement information for correlated events. The design detail and test performance will be described in the paper

  12. High resolution distributed time-to-digital converter (TDC) in a White Rabbit network

    Energy Technology Data Exchange (ETDEWEB)

    Pan, Weibin, E-mail: pwb.thu@gmail.com; Gong, Guanghua; Du, Qiang; Li, Hongming; Li, Jianmin

    2014-02-21

    The Large High Altitude Air Shower Observatory (LHAASO) project consists of a complex detector array with over 6000 detector nodes spreading over 1.2 km{sup 2} areas. The arrival times of shower particles are captured by time-to-digital converters (TDCs) in the detectors' frontend electronics, the arrival direction of the high energy cosmic ray are then to be reconstructed from the space-time information of all detector nodes. To guarantee the angular resolution of 0.5°, a time synchronization of 500 ps (RMS) accuracy and 100 ps precision must be achieved among all TDC nodes. A technology enhancing Gigabit Ethernet, called the White Rabbit (WR), has shown the capability of delivering sub-nanosecond accuracy and picoseconds precision of synchronization over the standard data packet transfer. In this paper we demonstrate a distributed TDC prototype system combining the FPGA based TDC and the WR technology. With the time synchronization and data transfer services from a compact WR node, separate FPGA-TDC nodes can be combined to provide uniform time measurement information for correlated events. The design detail and test performance will be described in the paper.

  13. Radiation-tolerant delta-sigma time-to-digital converters

    CERN Document Server

    Cao, Ying; Steyaert, Michiel

    2015-01-01

    This book focuses on the design of a Mega-Gray (a standard unit of total ionizing radiation) radiation-tolerant ps-resolution time-to-digital converter (TDC) for a light detection and ranging (LIDAR) system used in a gamma-radiation environment. Several radiation-hardened-by-design (RHBD) techniques are demonstrated throughout the design of the TDC and other circuit techniques to improve the TDC's resolution in a harsh environment are also investigated. Readers can learn from scratch how to design a radiation-tolerant IC. Information regarding radiation effects, radiation-hardened design techniques and  measurements are organized in such a way that readers can easily gain a thorough understanding of the topic. Readers will also learn the design theory behind the newly proposed delta-sigma TDC. Readers can quickly acquire knowledge about the design of radiation-hardened bandgap voltage references and low-jitter relaxation oscillators, which are introduced in the content from a designer's perspective.   · �...

  14. Analog-to-digital conversion of spectrometric data in information-control systems of activation analysis

    Energy Technology Data Exchange (ETDEWEB)

    Mamonov, E I

    1972-01-01

    Analog-digital conversion (ADC) techniques in nuclear radiation spectrometer channels is a most important link of information control systems in activation analysis. For the development of the ADC of spectrometer channels logico-structural methods of increasing the capacity, procedures for boosting frequency modes and improving the accuracy are promising. Procedures are suggested for increasing the ADC capacity. Insufficient stability and noticeable non-linearity of the spectrometer channel can be corrected at the information processing stage if their regularities are known. Capacity limitations make the development of ADC featuring high stability, capacity and linearity quite urgent.

  15. Digitized self-oscillating loop for piezoelectric transformer-based power converters

    DEFF Research Database (Denmark)

    Ekhtiari, Marzieh; Andersen, Thomas; Zhang, Zhe

    2016-01-01

    A new method is implemented in designing of self-oscillating loop for driving piezoelectric transformers. The implemented method is based on combining both analog and digital control systems. Digitized delay, or digitized phase shift through the self-oscillating loop results in a very precise...... frequency control and ensures an optimum operation of the piezoelectric transformer in terms of voltage gain and efficiency. In this work, additional time delay is implemented digitally for the first time through 16 bit digital-to-analog converter to the self-oscillating loop. Delay control setpoints...... updates at a rate of 417 kHz. This allows the control loop to dynamically follow frequency changes of the transformer in each resonant cycle. The operation principle behind self-oscillating is discussed in this paper. Moreover, experimental results are reported....

  16. A 45.8fJ/Step, energy-efficient, differential SAR capacitance-to-digital converter for capacitive pressure sensing

    KAUST Repository

    Alhoshany, Abdulaziz

    2016-05-03

    An energy-efficient readout circuit for a capacitive sensor is presented. The capacitive sensor is digitized by a 12-bit energy efficient capacitance-to-digital converter (CDC) that is based on a differential successive-approximation architecture. This CDC meets extremely low power requirements by using an operational transconductance amplifier (OTA) that is based on a current-starved inverter. It uses a charge-redistribution DAC that involves coarse-fine architecture. We split the DAC into a coarse-DAC and a fine-DAC to allow a wide capacitance range in a compact area. It covers a wide range of capacitance of 16.14 pF with a 4.5 fF absolute resolution. An analog comparator is implemented by cross-coupling two 3-input NAND gates to enable power and area efficient operation. The prototype CDC was fabricated using a standard 180 nm CMOS technology. The 12-bit CDC has a measurement time of 42.5 μs, and consumes 3.54 μW and 0.29 μW from analog and digital supplies, respectively. This corresponds to a state-of-the-art figure-of-merit (FoM) of 45.8 fJ/conversion-step. © 2016 Elsevier B.V. All rights reserved.

  17. A 45.8fJ/Step, energy-efficient, differential SAR capacitance-to-digital converter for capacitive pressure sensing

    KAUST Repository

    Alhoshany, Abdulaziz; Omran, Hesham; Salama, Khaled N.

    2016-01-01

    An energy-efficient readout circuit for a capacitive sensor is presented. The capacitive sensor is digitized by a 12-bit energy efficient capacitance-to-digital converter (CDC) that is based on a differential successive-approximation architecture. This CDC meets extremely low power requirements by using an operational transconductance amplifier (OTA) that is based on a current-starved inverter. It uses a charge-redistribution DAC that involves coarse-fine architecture. We split the DAC into a coarse-DAC and a fine-DAC to allow a wide capacitance range in a compact area. It covers a wide range of capacitance of 16.14 pF with a 4.5 fF absolute resolution. An analog comparator is implemented by cross-coupling two 3-input NAND gates to enable power and area efficient operation. The prototype CDC was fabricated using a standard 180 nm CMOS technology. The 12-bit CDC has a measurement time of 42.5 μs, and consumes 3.54 μW and 0.29 μW from analog and digital supplies, respectively. This corresponds to a state-of-the-art figure-of-merit (FoM) of 45.8 fJ/conversion-step. © 2016 Elsevier B.V. All rights reserved.

  18. Energy-Efficient Capacitance-to-Digital Converters for Low-Energy Sensor Nodes

    KAUST Repository

    Omran, Hesham

    2015-11-01

    Energy efficiency is a key requirement for wireless sensor nodes, biomedical implants, and wearable devices. The energy consumption of the sensor node needs to be minimized to avoid battery replacement, or even better, to enable the device to survive on energy harvested from the ambient. Capacitive sensors do not consume static power; thus, they are attractive from an energy efficiency perspective. In addition, they can be employed in a wide range of sensing applications. However, the sensor readout circuit–i.e., the capacitance-to-digital converter (CDC)–can be the dominant source of energy consumption in the system. Thus, the development of energy-efficient CDCs is crucial to minimizing the energy consumption of capacitive sensor nodes. In the first part of this dissertation, we propose several energy-efficient CDC architectures for low-energy sensor nodes. First, we propose a digitally-controlled coarsefine multislope CDC that employs both current and frequency scaling to achieve significant improvement in energy efficiency. Second, we analyze the limitations of successive approximation (SAR) CDC, and we address these limitations by proposing a robust parasitic-insensitive opamp-based SAR CDC. Third, we propose an inverter-based SAR CDC that achieves an energy efficiency figure-of-merit (FoM) of 31fJ/Step, which is the best energy efficiency FoM reported to date. Fourth, we propose a differential SAR CDC with quasi-dynamic operation to maintain excellent energy efficiency for a scalable sample rate. In the second part of this dissertation, we study the matching properties of small integrated capacitors, which are an integral component of energy-efficient CDCs. Despite conventional wisdom, we experimentally illustrate that the mismatch of small capacitors can be directly measured, and we report mismatch measurements for subfemtofarad integrated capacitors. We also correct the common misconception that lateral capacitors match better than vertical capacitors

  19. The characterization and application of a low resource FPGA-based time to digital converter

    Energy Technology Data Exchange (ETDEWEB)

    Balla, Alessandro; Mario Beretta, Matteo; Ciambrone, Paolo; Gatta, Maurizio; Gonnella, Francesco [National Laboratories of Frascati (LNF) of INFN, via E. Fermi 40, 00044 Frascati (RM) (Italy); Iafolla, Lorenzo, E-mail: lorenzo.iafolla@lnf.infn.it [National Laboratories of Frascati (LNF) of INFN, via E. Fermi 40, 00044 Frascati (RM) (Italy); University of Rome “Tor Vergata” – Electronic Engineering Department (Italy); Mascolo, Matteo; Messi, Roberto [Roma-2 Department of INFN, via della Ricerca Scientifica, 1, 00133 Rome (Italy); University of Rome “Tor Vergata” – Physics Department (Italy); Moricciani, Dario [Roma-2 Department of INFN, via della Ricerca Scientifica, 1, 00133 Rome (Italy); Riondino, Domenico [National Laboratories of Frascati (LNF) of INFN, via E. Fermi 40, 00044 Frascati (RM) (Italy)

    2014-03-01

    Time to Digital Converters (TDCs) are very common devices in particles physics experiments. A lot of “off-the-shelf” TDCs can be employed but the necessity of a custom DAta acQuisition (DAQ) system makes the TDCs implemented on the Field-Programmable Gate Arrays (FPGAs) desirable. Most of the architectures developed so far are based on the tapped delay lines with precision down to 10 ps, obtained with high FPGA resources usage and non-linearity issues to be managed. Often such precision is not necessary; in this case TDC architectures with low resources occupancy are preferable allowing the implementation of data processing systems and of other utilities on the same device. In order to reconstruct γγ physics events tagged with High Energy Tagger (HET) in the KLOE-2 (K LOng Experiment 2), we need to measure the Time Of Flight (TOF) of the electrons and positrons from the KLOE-2 Interaction Point (IP) to our tagging stations (11 m apart). The required resolution must be better than the bunch spacing (2.7 ns). We have developed and implemented on a Xilinx Virtex-5 FPGA a 32 channel TDC with a precision of 255 ps and low non-linearity effects along with an embedded data acquisition system and the interface to the online FARM of KLOE-2. The TDC is based on a low resources occupancy technique: the 4×Oversampling technique which, in this work, is pushed to its best resolution and its performances were exhaustively measured. - Highlights: • We need to measure the Time of Flight of the detected particles to reconstruct physics events. • We looked for an embedded solution based on an FPGA to implement a TDC with its DAQ system. • The solution is based on the 4xOversampling technique which employs very effectively the FPGA. • The 4×Oversampling technique was characterized and the results and comparisons with the state of the art are presented.

  20. High-speed photonically assisted analog-to-digital conversion using a continuous wave multiwavelength source and phase modulation.

    Science.gov (United States)

    Bortnik, Bartosz J; Fetterman, Harold R

    2008-10-01

    A more simple photonically assisted analog-to-digital conversion system utilizing a cw multiwavelength source and phase modulation instead of a mode-locked laser is presented. The output of the cw multiwavelength source is launched into a dispersive device (such as a single-mode fiber). This fiber creates a pulse train, where the central wavelength of each pulse corresponds to a spectral line of the optical source. The pulses can then be either dispersed again to perform discrete wavelength time stretching or demultiplexed for continuous time analog-to-digital conversion. We experimentally demonstrate the operation of both time stretched and interleaved systems at 38 GHz. The potential of integrating this type of system on a monolithic chip is discussed.

  1. Analog and digital communication systems

    CERN Document Server

    Roden, Martin S

    1996-01-01

    New edition of an introductory text that balances theoretical foundations with practical design. Reorganization and updates in this edition include the section on digital communications as well as design applications and computer exercises: many graphs are prepared and formulas solved using MATLAB...

  2. Benefit of Analog, Programmable and Digital Hearing Aids

    Directory of Open Access Journals (Sweden)

    Jamileh Fatahi

    2006-12-01

    Full Text Available Background and Aims: As the hearing aid technology progressively promotes toward replacing analog hearing aids with digital and programmable ones, comparison of the patient satisfaction of those kinds of hearing aids by means of a valuable tool seems so necessary. So, the aim of this study was to compare self-reported benefit of analog, digitally controlled programmable and digital hearing aids for reducing disability caused by hearing impairment in mild to severe sensorineural hearing impaired persons. Materials and Methods: This cross-sectional study was performed on 90 persons with mild to severe sensorineural hearing loss dividing into three groups: 43 subjects were fitted with digital, 15 with programmable, 32 with analog hearing aids. After pure tone audiometry, Abbreviated profile of hearing aid benefit (APHAB was completed before and one month after using hearing aids to determine the benefit of them. Results: Global APHAB mean scores for digital, programmable and analog hearing aids were 49.05, 33.19 and 39.53, respectively. Ease of Communication subscale mean scores were 53.46 for digitals, 37.66 for programmables and 39.09 for analogs. Background noise subscale mean scores for digital programmable and analog hearing aids were 46.36, 25.53 and 35.31, respectively. Global and also both subscale mean scores showed significant difference between digital hearing aids and programmable and analog ones. There was no significant difference between reverberation subscale mean scores of three groups. Conclusion: It seems digital hearing aids may be more beneficial to reduce disability caused by hearing loss than analog and programmable hearing aids are.

  3. Method and apparatus for analog signal conditioner for high speed, digital x-ray spectrometer

    International Nuclear Information System (INIS)

    Warburton, W.K.; Hubbard, B.

    1999-01-01

    A signal processing system which accepts input from an x-ray detector-preamplifier and produces a signal of reduced dynamic range for subsequent analog-to-digital conversion is disclosed. The system conditions the input signal to reduce the number of bits required in the analog-to-digital converter by removing that part of the input signal which varies only slowly in time and retaining the amplitude of the pulses which carry information about the x-rays absorbed by the detector. The parameters controlling the signal conditioner's operation can be readily supplied in digital form, allowing it to be integrated into a feedback loop as part of a larger digital x-ray spectroscopy system. 13 figs

  4. Digitally controlled analog proportional-integral-derivative (PID) controller for high-speed scanning probe microscopy

    Science.gov (United States)

    Dukic, Maja; Todorov, Vencislav; Andany, Santiago; Nievergelt, Adrian P.; Yang, Chen; Hosseini, Nahid; Fantner, Georg E.

    2017-12-01

    Nearly all scanning probe microscopes (SPMs) contain a feedback controller, which is used to move the scanner in the direction of the z-axis in order to maintain a constant setpoint based on the tip-sample interaction. The most frequently used feedback controller in SPMs is the proportional-integral (PI) controller. The bandwidth of the PI controller presents one of the speed limiting factors in high-speed SPMs, where higher bandwidths enable faster scanning speeds and higher imaging resolution. Most SPM systems use digital signal processor-based PI feedback controllers, which require analog-to-digital and digital-to-analog converters. These converters introduce additional feedback delays which limit the achievable imaging speed and resolution. In this paper, we present a digitally controlled analog proportional-integral-derivative (PID) controller. The controller implementation allows tunability of the PID gains over a large amplification and frequency range, while also providing precise control of the system and reproducibility of the gain parameters. By using the analog PID controller, we were able to perform successful atomic force microscopy imaging of a standard silicon calibration grating at line rates up to several kHz.

  5. Design and assessment of a 6 ps-resolution time-to-digital converter with 5 MGy gamma-dose tolerance for nuclear instrumentation

    International Nuclear Information System (INIS)

    Cao, Y.; Leroux, P.; De Cock, W.; Steyaert, M.

    2011-01-01

    Time-to-Digital Converters (TDCs) are key building blocks in time-based mixed-signal systems, used for the digitization of analog signals in time domain. A short survey on state-of-the-art TDCs is given. In order to realize a TDC with picosecond time resolution as well as multi MGy gamma-dose radiation tolerance, a novel multi-stage noise-shaping (MASH) delta-sigma (ΔΣ) TDC structure is proposed. The converter, implemented in 0.13 μm, achieves a time resolution of 5.6 ps and an ENOB of 11 bits, when the over sampling ratio (OSR) is 250. The TDC core consumes only 1.7 mW, and occupies an area of 0.11 mm 2 . Owing to the usage of circuit level radiation hardened-by-design techniques, such as passive RC oscillators and constant-g m biasing, the TDC exhibits enhanced radiation tolerance. At a low dose rate of 1.2 kGy/h, the frequency of the counting clock in the TDC remains constant up to at least 160 kGy. Even after a total dose of 3.4 MGy at a high dose rate of 30 kGy/h, the TDC still achieves a time resolution of 10.5 ps with an OSR of 250. (authors)

  6. Design and assessment of a 6 ps-resolution time-to-digital converter with 5 MGy gamma-dose tolerance for nuclear instrumentation

    Energy Technology Data Exchange (ETDEWEB)

    Cao, Y. [ESAT-MICAS Div., Katholieke Universiteit Leuven, B-3001 Heverlee (Belgium); SCK.CEN, Belgian Nuclear Research Centre, B-2400 Mol (Belgium); Leroux, P. [ESAT-MICAS Div., Katholieke Universiteit Leuven, B-3001 Heverlee (Belgium); ICT-RELIC Div., Katholieke Hogeschool Kempen, B-2440 Geel (Belgium); De Cock, W. [SCK.CEN, Belgian Nuclear Research Centre, B-2400 Mol (Belgium); Steyaert, M. [ESAT-MICAS Div., Katholieke Universiteit Leuven, B-3001 Heverlee (Belgium)

    2011-07-01

    Time-to-Digital Converters (TDCs) are key building blocks in time-based mixed-signal systems, used for the digitization of analog signals in time domain. A short survey on state-of-the-art TDCs is given. In order to realize a TDC with picosecond time resolution as well as multi MGy gamma-dose radiation tolerance, a novel multi-stage noise-shaping (MASH) delta-sigma ({Delta}{Sigma}) TDC structure is proposed. The converter, implemented in 0.13 {mu}m, achieves a time resolution of 5.6 ps and an ENOB of 11 bits, when the over sampling ratio (OSR) is 250. The TDC core consumes only 1.7 mW, and occupies an area of 0.11 mm{sup 2}. Owing to the usage of circuit level radiation hardened-by-design techniques, such as passive RC oscillators and constant-g{sub m} biasing, the TDC exhibits enhanced radiation tolerance. At a low dose rate of 1.2 kGy/h, the frequency of the counting clock in the TDC remains constant up to at least 160 kGy. Even after a total dose of 3.4 MGy at a high dose rate of 30 kGy/h, the TDC still achieves a time resolution of 10.5 ps with an OSR of 250. (authors)

  7. Making the Switch to Digital Audio

    Directory of Open Access Journals (Sweden)

    Shannon Gwin Mitchell

    2004-12-01

    Full Text Available In this article, the authors describe the process of converting from analog to digital audio data. They address the step-by-step decisions that they made in selecting hardware and software for recording and converting digital audio, issues of system integration, and cost considerations. The authors present a brief description of how digital audio is being used in their current research project and how it has enhanced the “quality” of their qualitative research.

  8. Wide-range time-to-digital converters with a high resolution

    International Nuclear Information System (INIS)

    Aul'chenko, V.M.

    1977-01-01

    A combined time-number converter in which measurements of time intervals to within a period of clock frequency are made directly and those within a period are by a time-amplitude-code conversion is described. It allows time intervals up to 4 mcsec with a resolution of 100 psec to be measured. The differential nonlinearity of conversion is not greater than +-1.5%, and the integral error from measurements of time intervals is not greater than +-100 psec

  9. An Open-Source Tool Set Enabling Analog-Digital-Software Co-Design

    Directory of Open Access Journals (Sweden)

    Michelle Collins

    2016-02-01

    Full Text Available This paper presents an analog-digital hardware-software co-design environment for simulating and programming reconfigurable systems. The tool simulates, designs, as well as enables experimental measurements after compiling to configurable systems in the same integrated design tool framework. High level software in Scilab/Xcos (open-source programs similar to MATLAB/Simulink that converts the high-level block description by the user to blif format (sci2blif, which acts as an input to the modified VPR tool, including the code v p r 2 s w c s , encoding the specific platform through specific architecture files, resulting in a targetable switch list on the resulting configurable analog–digital system. The resulting tool uses an analog and mixed-signal library of components, enabling users and future researchers access to the basic analog operations/computations that are possible.

  10. HIGH RESOLUTION ANALOG / DIGITAL POWER SUPPLY CONTROLLER

    International Nuclear Information System (INIS)

    Medvedko, Evgeny A

    2003-01-01

    Corrector magnets for the SPEAR-3 synchrotron radiation source require precision, high-speed control for use with beam-based orbit feedback. A new Controller Analog/Digital Interface card (CANDI) has been developed for these purposes. The CANDI has a 24-bit DAC for current control and three 24-bit Δ-Σ ADCs to monitor current and voltages. The ADCs can be read and the DAC updated at the 4 kHz rate needed for feedback control. A precision 16-bit DAC provides on-board calibration. Programmable multiplexers control internal signal routing for calibration, testing, and measurement. Feedback can be closed internally on current setpoint, externally on supply current, or beam position. Prototype and production tests are reported in this paper. Noise is better than 17 effective bits in a 10 mHz to 2 kHz bandwidth. Linearity and temperature stability are excellent

  11. Regulatory requirements for replacement of analog systems with digital upgrades

    International Nuclear Information System (INIS)

    Loeser, P.J.

    1993-01-01

    This paper reviews briefly the regulatory guidelines which must be met in order to replace analog systems in nuclear power plants with digital systems. There is a move to do such replacements for a number of reasons: analog systems are aging, and showing considerable drift; few vendors manufacture analog systems today; support and parts are hard to get; digital systems provide flexibility. There is a safety concern however about undesirable and unpredictable effects to digital safety equipment due to plant transients, accidents, post-accident condition, and EMI/RF environmental interferences. License holders must comply with the requirements of 10 C.F.R. 50.59, which deals with safety concerns with respect to any changes to operating plants which may have an impact on the safety of the plant. NRC staff is taking the position that all digital upgrades will require an evaluation under this regulation

  12. A robust parasitic-insensitive successive approximation capacitance-to-digital converter

    KAUST Repository

    Omran, Hesham

    2014-09-01

    In this paper, we present a capacitive sensor digital interface circuit using true capacitance-domain successive approximation that is independent of supply voltage. Robust operation is achieved by using a charge amplifier stage and multiple comparison technique. The interface circuit is insensitive to parasitic capacitances, offset voltages, and charge injection, and is not prone to noise coupling. The proposed design achieves very low temperature sensitivity of 25ppm/oC. A coarse-fine programmable capacitance array allows digitizing a wide capacitance range of 16pF with 12.5-bit quantization limited resolution in a compact area of 0.07mm2. The fabricated prototype is experimentally verified using on-chip sensor and off-chip MEMS capacitive pressure sensor. © 2014 IEEE.

  13. A robust parasitic-insensitive successive approximation capacitance-to-digital converter

    KAUST Repository

    Omran, Hesham; Arsalan, Muhammad; Salama, Khaled N.

    2014-01-01

    In this paper, we present a capacitive sensor digital interface circuit using true capacitance-domain successive approximation that is independent of supply voltage. Robust operation is achieved by using a charge amplifier stage and multiple comparison technique. The interface circuit is insensitive to parasitic capacitances, offset voltages, and charge injection, and is not prone to noise coupling. The proposed design achieves very low temperature sensitivity of 25ppm/oC. A coarse-fine programmable capacitance array allows digitizing a wide capacitance range of 16pF with 12.5-bit quantization limited resolution in a compact area of 0.07mm2. The fabricated prototype is experimentally verified using on-chip sensor and off-chip MEMS capacitive pressure sensor. © 2014 IEEE.

  14. An FPGA-Integrated Time-to-Digital Converter Based on a Ring Oscillator for Programmable Delay Line Resolution Measurement

    Directory of Open Access Journals (Sweden)

    Chao Chen

    2014-01-01

    Full Text Available We describe the architecture of a time-to-digital converter (TDC, specially intended to measure the delay resolution of a programmable delay line (PDL. The configuration, which consists of a ring oscillator, a frequency divider (FD, and a period measurement circuit (PMC, is implemented in a field programmable gate array (FPGA device. The ring oscillator realized in loop containing a PDL and a look-up table (LUT generates periodic oscillatory pulses. The FD amplifies the oscillatory period from nanosecond range to microsecond range. The time-to-digital conversion is based on counting the number of clock cycles between two consecutive pulses of the FD by the PMC. Experiments have been conducted to verify the performance of the TDC. The achieved relative errors for four PDLs are within 0.50%–1.21% and the TDC has an equivalent resolution of about 0.4 ps.

  15. Development of a time-to-digital converter ASIC for the upgrade of the ATLAS Monitored Drift Tube detector

    Science.gov (United States)

    Wang, Jinhong; Liang, Yu; Xiao, Xiong; An, Qi; Chapman, John W.; Dai, Tiesheng; Zhou, Bing; Zhu, Junjie; Zhao, Lei

    2018-02-01

    The upgrade of the ATLAS muon spectrometer for the high-luminosity LHC requires new trigger and readout electronics for various elements of the detector. We present the design of a time-to-digital converter (TDC) ASIC prototype for the ATLAS Monitored Drift Tube (MDT) detector. The chip was fabricated in a GlobalFoundries 130 nm CMOS technology. Studies indicate that its timing and power dissipation characteristics meet the design specifications, with a timing bin variation of ±40 ps for all 48 TDC slices and a power dissipation of about 6.5 mW per slice.

  16. A multi-channel time-to-digital converter chip for drift chamber readout

    International Nuclear Information System (INIS)

    Santos, D.M.; Chau, A.; DeBusshere, D.; Dow, S.; Flasck, J.; Levi, M.; Kirsten, F.; Su, E.

    1995-12-01

    A complete, multi-channel, timing and amplitude measurement IC for use in drift chamber applications is described. By targeting specific resolutions, i.e. 6-bits of resolution for both time and amplitude, area and power can be minimized while achieving the proper level of measurement accuracy. Time is digitized using one eight channel TDC comprised of a delay locked loop and eight sets of latches and encoders. Amplitude (for dE/dx) is digitized using a dual-range FADC for each channel. Eight bits of dynamic range with six bits of accuracy are achieved with the dual-range. The timing and amplitude information is multiplexed into one DRAM (Dynamic Random Access Memory) trigger latency buffer. Interesting events are then transferred into an SRAM (Static Random Access Memory) readout buffer before the latency time has expired. The design has been optimized to achieve the requisite resolution using the smallest area and lowest power. The circuit has been implemented in a 0.8μ triple metal CMOS process. The TDC sub-element has been measured to have better than 135 ps time resolution and 35 ps jitter. The DRAM has a measured cycle time of 80 MHz

  17. Configurable Analog-Digital Conversion Using the Neural EngineeringFramework

    Directory of Open Access Journals (Sweden)

    Christian G Mayr

    2014-07-01

    Full Text Available Efficient Analog-Digital Converters (ADC are one of the mainstays of mixed-signal integrated circuit design. Besides the conventional ADCs used in mainstream ICs, there have been various attempts in the past to utilize neuromorphic networks to accomplish an efficient crossing between analog and digital domains, i.e. to build neurally inspired ADCs. Generally, these have suffered from the same problems as conventional ADCs, that is they require high-precision, handcrafted analog circuits and are thus not technology portable. In this paper, we present an ADC based on the Neural Engineering Framework (NEF. It carries out a large fraction of the overall ADC process in the digital domain, i.e. it is easily portable across technologies. The analog-digital conversion takes full advantage of the high degree of parallelism inherent in neuromorphic networks, making for a very scalable ADC. In addition, it has a number of features not commonly found in conventional ADCs, such as a runtime reconfigurability of the ADC sampling rate, resolution and transfer characteristic.

  18. A multi-channel time-to-digital converter chip for drift chamber readout

    International Nuclear Information System (INIS)

    Chau, A.; DeBusschere, D.; Dow, S.F.; Flasck, J.; Levi, M.E.; Kirsten, F.; Su, E.; Santos, D.M.

    1996-01-01

    A complete, multi-channel, timing and amplitude measurement IC for use in drift chamber applications is described. By targeting specific resolutions, i.e., 6-bits of resolution for both time and amplitude, area and power can be minimized while achieving the proper level of measurement accuracy. Time is digitized using an TDC comprised of a delay locked loop, latch and encoder. Amplitude (for dE/dx) is digitized using a dual-range FADC for each channel. Eight bits of dynamic range with six bits of accuracy are achieved with the dual-range. Eight complete channels of timing and amplitude information are multiplexed into one DRAM (Dynamic Random Access Memory) trigger latency buffer. Interesting events are subsequently transferred into an SRAM (Static Random Access Memory) readout buffer before the latency time has expired. The design has been optimized to achieve the requisite resolution using the smallest area and lowest power. The circuit has been implemented in an 0.8 microm triple metal CMOS process. The measured results indicate that the differential non-linearities of the TDC and the FADC are 200 ps and 10 mV, respectively. The integral nonlinearities of the TDC and the FADC are 230 ps and 9 mV, respectively

  19. Comparison of digital selenium radiography with an analog screen-film system in the diagnostic process of pneumoconiosis according to ILO classification

    International Nuclear Information System (INIS)

    Zaehringer, M.; Winnekendonk, G.; Gossmann, A.; Krueger, K.; Krug, B.

    2001-01-01

    Purpose: The aim of the study was to determine the diagnostic value of digital selenium radiography in patients with pneumoconiosis. For this purpose chest X-rays by digital selenium radiography and analog screen-film system were compared according to the ILO classification of pneumoconiosis. Method: After approval of the study by the local ethic commission and the Federal German Office for Radiation Protection 50 patients were subjected to X-rays by digital selenium radiography (Thoravision; Philips Medical Systems, Hamburg, Germany) and analog screen-film system of the same day within the scope of an industrial medicine preventive checkup. Four investigators rated the chest X-rays according to the ILO classification of pneumoconiosis. Results: The findings demonstrated by chest X-rays according to ILO classification were rated similar by digital selenium radiography and analog screen film systems. Image quality of the digital pictures was rated significantly better. Conclusion: The use of digital selenium radiography in evaluating chest X-rays according to the ILO classification does not result in over- or underestimation of pulmonary pathologies. Hence, in the diagnosis of pneumoconiosis, digital selenium radiography can replace the tested analog screen-film system. (orig.) [de

  20. A digital instantaneous frequency measurement technique utilising high speed analogue to digital converters and field programmable gate arrays

    CSIR Research Space (South Africa)

    Herselman, PLR

    2007-09-01

    Full Text Available In modern information and sensor systems, the timely estimation of the carrier frequency of received signals is of critical importance. This paper presents a digital instantaneous frequency measurement (DIFM) technique, which can measure the carrier...

  1. Digital-to-analog device for continuous detection of neutron damping decrement in logging

    International Nuclear Information System (INIS)

    Sokolov, Yu.I.; Zinchenko, A.I.; Rudenko, Eh.L.

    1976-01-01

    Algorithms are analyzed for a continuous detection of the damping decrement (DD) of the thermal neutron density in time, characterizing absorptive and diffusion properties of a bed; an an automated measuring device has been developed. The design of a digital calculator involving reguired mathematical and logical operations in the DD measurement by the specified algorithms necessitated the use of a system of elements with a diode-transistor RC logic. Following laboratory tests the mock-up of the calculator was subjected to borehole tests as part of the pulsed neutron logging apparatus of the IGN-4 type. A continuous detection of the DD reciprocal with a parallel recording of the differential and integral curves of pulsed neutron-neutron logging has been performed. The borehole tests revealed the efficiency of the new device and the possibility of its use together with the apparatus of the IGN-4 type

  2. A simple method of digitizing analog scintigrams for quantification and digital archiving

    International Nuclear Information System (INIS)

    Schramm, M.; Kaempfer, B.; Wolf, H.; Clausen, M.; Wendhausen, H.; Henze, E.

    1993-01-01

    This study was undertaken to evaluate a quick, reliable and cheap method of digitizing analog scintigrams. 40 whole-body bone scintigrams were obtained simultaneously in analog and genuine digital format. The analog scans on X-ray film were then digitized seecondarily by three different methods: 300 dpi flatbed scanning, high-resolution camera scanning and camcorder recording. A simple exposure approach using a light box, a cheap camcorder, a PC and image grabber hard- and software proved to be optimal. Visual interpretation showed no differences in clinical findings when comparing the analog images with their secondarily digitized counterparts. To test the possibility of quantification, 126 equivalent ROIs were drawn both in the genuine digital and the secondarily digitized images. Comparing the ROI count to whole-body count percentage of the corresponding ROIs showed the correlation to be linear. The evaluation of phantom studies showed the linear correlation to be true within a wide activity range. Thus, secondary digitalization of analog scintigrams is an easy, cheap and reliable method of archiving images and allows secondary digital quantification. (orig.) [de

  3. [A simple method of digitizing analog scintigrams for quantification and digital archiving].

    Science.gov (United States)

    Schramm, M; Kämpfer, B; Wolf, H; Clausen, M; Wendhausen, H; Henze, E

    1993-02-01

    This study was undertaken to evaluate a quick, reliable and cheap method of digitizing analog scintigrams. 40 whole-body bone scintigrams were obtained simultaneously in analog and genuine digital format. The analog scans on x-ray film were then digitized secondarily by three different methods: 300 dpi flat-bed scanning, high-resolution camera scanning and camcorder recording. A simple exposure approach using a light box, a cheap camcorder, a PC and image grabber hard- and software proved to be optimal. Visual interpretation showed no differences in clinical findings when comparing the analog images with their secondarily digitized counterparts. To test the possibility of quantification, 126 equivalent ROIs were drawn both in the genuine digital and the secondarily digitized images. Comparing the ROI count to whole-body count percentage of the corresponding ROIs showed the correlation to be linear. The evaluation of phantom studies showed the linear correlation to be true within a wide activity range. Thus, secondary digitalization of analog scintigrams is an easy, cheap and reliable method of archiving images and allows secondary digital quantification.

  4. Unified Digital Periodic Signal Filters for Power Converter Systems

    DEFF Research Database (Denmark)

    Yang, Yongheng; Xin, Zhen; Zhou, Keliang

    2017-01-01

    Periodic signal controllers like repetitive and resonant controllers have demonstrated much potential in the control of power electronic converters, where periodic signals (e.g., ac voltages and currents) can be precisely regulated to follow references. Beyond the control of periodic signals, ac...... signal processing (e.g., in synchronization and pre-filtering) is also very important for power converter systems. Hence, this paper serves to unify digital periodic signal filters so as to maximize their roles in power converter systems (e.g., enhance the control of ac signals). The unified digital...... periodic signal filters behave like a comb filter, but it can also be configured to selectively filter out the harmonics of interest (e.g., the odd-order harmonics in single-phase power converter systems). Moreover, a virtual variable-sampling-frequency unit delay that enables frequency adaptive periodic...

  5. High quality digital holographic reconstruction on analog film

    Science.gov (United States)

    Nelsen, B.; Hartmann, P.

    2017-05-01

    High quality real-time digital holographic reconstruction, i.e. at 30 Hz frame rates, has been at the forefront of research and has been hailed as the holy grail of display systems. While these efforts have produced a fascinating array of computer algorithms and technology, many applications of reconstructing high quality digital holograms do not require such high frame rates. In fact, applications such as 3D holographic lithography even require a stationary mask. Typical devices used for digital hologram reconstruction are based on spatial-light-modulator technology and this technology is great for reconstructing arbitrary holograms on the fly; however, it lacks the high spatial resolution achievable by its analog counterpart, holographic film. Analog holographic film is therefore the method of choice for reconstructing highquality static holograms. The challenge lies in taking a static, high-quality digitally calculated hologram and effectively writing it to holographic film. We have developed a theoretical system based on a tunable phase plate, an intensity adjustable high-coherence laser and a slip-stick based piezo rotation stage to effectively produce a digitally calculated hologram on analog film. The configuration reproduces the individual components, both the amplitude and phase, of the hologram in the Fourier domain. These Fourier components are then individually written on the holographic film after interfering with a reference beam. The system is analogous to writing angularly multiplexed plane waves with individual component phase control.

  6. A 9-Channel, 100 ps LSB Time-to-Digital Converter for the NA62 Gigatracker Readout ASIC (TDCpix)

    International Nuclear Information System (INIS)

    Perktold, L; Rinella, G Aglieri; Noy, M; Kluge, A; Kloukinas, K; Kaplon, J; Jarron, P; Morel, M; Fiorini, M; Martin, E

    2012-01-01

    The TDCpix ASIC is the readout chip for the Gigatracker station of the NA62 experiment. Each station of the Gigatracker needs to provide time stamping of individual particles to 200 ps-rms or better. Bump-bonded to the pixel sensor the ASIC serves an array of 40 columns x 40 pixels. The high precision time measurement of the discriminated hit signals is accomplished with a set of 40 TDCs sitting in the End-Of-Column region of the ASIC. Each TDC provides 9 channels per column. For the time-to-digital converter (TDC) a delay-locked-loop (DLL) approach is employed to achieve a constant time binning of 100 ps. Simulation results show that an average rms time resolution of 33 ps with a power consumption of the TDC better than 33 mW per column is achieved. This contribution will present the design, simulation results and implementation challenges of the TDC.

  7. Two applications of direct digital down converters in beam diagnostics

    International Nuclear Information System (INIS)

    Powers, Tom; Flood, Roger; Hovater, Curt; Musson, John

    2000-01-01

    The technologies of direct digital down converters, digital frequency synthesis, and digital signal processing are being used in many commercial applications. Because of this commercialization, the component costs are being reduced to the point where they are economically viable for large scale accelerator applications. This paper will discuss two applications of these technologies to beam diagnostics. In the first application the combination of direct digital frequency synthesis and direct digital down converters are coupled with digital signal processor technology in order to maintain the stable gain environment required for a multi-electrode beam position monitoring system. This is done by injecting a CW reference signal into the electronics as part of the front-end circuitry. In the second application direct digital down converters are used to provide a novel approach to the measurement of beam intensity using cavity current monitors. In this system a pair of reference signals are injected into the cavity through an auxiliary port. The beam current is then calculated as the ratio of the beam signal divided by the average of the magnitude of the two reference signals

  8. A 75 ps rms time resolution BiCMOS time to digital converter optimized for high rate imaging detectors

    CERN Document Server

    Hervé, C

    2002-01-01

    This paper presents an integrated time to digital converter (TDC) with a bin size adjustable in the range of 125 to 175 ps and a differential nonlinearity of +-0.3%. The TDC has four channels. Its architecture has been optimized for the readout of imaging detectors in use at Synchrotron Radiation facilities. In particular, a built-in logic flags piled-up events. Multi-hit patterns are also supported for other applications. Time measurements are extracted off chip at the maximum throughput of 40 MHz. The dynamic range is 14 bits. It has been fabricated in 0.8 mu m BiCMOS technology. Time critical inputs are PECL compatible whereas other signals are CMOS compatible. A second application specific integrated circuit (ASIC) has been developed which translates NIM electrical levels to PECL ones. Both circuits are used to assemble board level TDCs complying with industry standards like VME, NIM and PCI.

  9. A four channel time-to-digital converter ASIC with in-built calibration and SPI interface

    International Nuclear Information System (INIS)

    Hari Prasad, K.; Sukhwani, Menka; Saxena, Pooja; Chandratre, V.B.; Pithawa, C.K.

    2014-01-01

    A design of high resolution, wide dynamic range Time-to-Digital Converter (TDC) ASIC, implemented in 0.35 µm commercial CMOS technology is presented. The ASIC features four channel TDC with an in-built calibration and Serial Peripheral Interconnect (SPI) slave interface. The TDC is based on the vernier ring oscillator method in order to achieve both high resolution and wide dynamic range. This TDC ASIC is tested and found to have resolution of 127 ps (LSB), dynamic range of 1.8 µs and precision (σ) of 74 ps. The measured values of differential non-linearity (DNL) and integral non-linearity (INL) are 350 ps and 300 ps respectively

  10. Epistemic Function and Ontology of Analog and Digital Images

    Directory of Open Access Journals (Sweden)

    Aleksandra Łukaszewicz Alcaraz

    2016-01-01

    Full Text Available The important epistemic function of photographic images is their active role in construction and reconstruction of our beliefs concerning the world and human identity, since we often consider photographs as presenting reality or even the Real itself. Because photography can convince people of how different social and ethnic groups and even they themselves look, documentary projects and the dissemination of photographic practices supported the transition from disciplinary society to the present-day society of control. While both analog and digital images are formed from the same basic materia, the ways in which this matter appears are distinctive. In the case of analog photography, we deal with physical and chemical matter, whereas with digital images we face electronic matter. Because digital photography allows endless modification of the image, we can no longer believe in the truthfulness of digital images.

  11. A flexible 32-channel time-to-digital converter implemented in a Xilinx Zynq-7000 field programmable gate array

    International Nuclear Information System (INIS)

    Wang, Yonggang; Kuang, Jie; Liu, Chong; Cao, Qiang; Li, Deng

    2017-01-01

    A high performance multi-channel time-to-digital converter (TDC) is implemented in a Xilinx Zynq-7000 field programmable gate array (FPGA). It can be flexibly configured as either 32 TDC channels with 9.9 ps time-interval RMS precision, 16 TDC channels with 6.9 ps RMS precision, or 8 TDC channels with 5.8 ps RMS precision. All TDCs have a 380 M Samples/second measurement throughput and a 2.63 ns measurement dead time. The performance consistency and temperature dependence of TDC channels are also evaluated. Because Zynq-7000 FPGA family integrates a feature-rich dual-core ARM based processing system and 28 nm Xilinx programmable logic in a single device, the realization of high performance TDCs on it will make the platform more widely used in time-measuring related applications.

  12. A flexible 32-channel time-to-digital converter implemented in a Xilinx Zynq-7000 field programmable gate array

    Energy Technology Data Exchange (ETDEWEB)

    Wang, Yonggang, E-mail: wangyg@ustc.edu.cn; Kuang, Jie; Liu, Chong; Cao, Qiang; Li, Deng

    2017-03-01

    A high performance multi-channel time-to-digital converter (TDC) is implemented in a Xilinx Zynq-7000 field programmable gate array (FPGA). It can be flexibly configured as either 32 TDC channels with 9.9 ps time-interval RMS precision, 16 TDC channels with 6.9 ps RMS precision, or 8 TDC channels with 5.8 ps RMS precision. All TDCs have a 380 M Samples/second measurement throughput and a 2.63 ns measurement dead time. The performance consistency and temperature dependence of TDC channels are also evaluated. Because Zynq-7000 FPGA family integrates a feature-rich dual-core ARM based processing system and 28 nm Xilinx programmable logic in a single device, the realization of high performance TDCs on it will make the platform more widely used in time-measuring related applications.

  13. Digial Technology Qualification Task 2 - Suitability of Digital Alternatives to Analog Sensors and Actuators

    Energy Technology Data Exchange (ETDEWEB)

    Ted Quinn; Jerry Mauck

    2012-09-01

    The next generation reactors in the U.S. are an opportunity for vendors to build new reactor technology with advanced Instrumentation and Control Systems (control rooms, DCS, etc.). The advances made in the development of many current generation operating reactors in other parts of the world are being used in the design and construction of new plants. These new plants are expected to have fully integrated digital control rooms, computerized procedures, integrated surveillance testing with on-line monitoring and a major effort toward improving the O&M and fault survivability of the overall systems. In addition the designs are also incorporating major improvements in the man-machine interface based on lessons learned in nuclear and other industries. The above relates primarily to the scope of supply in instrumentation and control systems addressed by Chapter 7 of the Standard Review Plan (SRP) NUREG-0800 (Reference 9.5), and the associated Balance of Plant (BOP) I&C systems. This does not relate directly to the actuator and motor, breaker, initiation circuitry, valve position, etc. which is the subject of this report and normally outside of the traditional Distributed Control System (DCS), for both safety and non-safety systems. The recommendations presented in this report will be used as input to I&C research programming for the implementation of lessons learned during the early phases of new build both for large light water reactors (LWR) and also small modular reactors (SMR). This report is intended to support current research plans and provide user (vendor, owner-operator) input to the optimization of these research plans.

  14. Changes of radio-technological studies in the field of medical imaging. From analogous studies to digital ones

    International Nuclear Information System (INIS)

    Shiraishi, Junji; Uchiyama, Yoshikazu; Honda, Michitaka; Ogura, Toshihiro; Kunitomo, Hiroshi; Kishimoto, Kenji; Ishii, Rie; Hara, Takeshi; Tanaka, Rie

    2014-01-01

    Eight authors briefly describe practical reviews of domestic changes in the title of their expertized field for the purpose of enlightenment. Reviews concern following studies: on the construction of medical images, on characteristics of input/output, of resolution, of noise, on whole assessment of images with noise-equivalent number of quanta/detective quantum efficiency (NEQ/DQE), with subjectivity, on computer-aided diagnosis (CAD), and on image displaying system assessment. X-ray image subtraction along with the development of CT is the origin of real-time digitalized image construction. Studies on the input/output affects the quality of images and exposure dose to patients, which have contributed to works of investigators at manufacturing and technologists on site. Then described are changes in the assessment of image by digital radiography (DR), of which basis was originally established at analogous sensitizer/film (S/F) era, of image resolution and of noise characteristic assessment, during the period from S/F to DR systems. Assessment of images with NEQ/DQE has been essentially based on the description in the 'Image Science' published in 1974 and its derived domestic educational researches; and the assessment with subjectivity involves the receiver operating characteristic (ROC), which leads to computer-aided diagnosis (CAD). Studies on image display are now changing responding to clinical and social needs. (T.T.)

  15. Firmware-only implementation of Time-to-Digital Converter (TDC) in Field-Programmable Gate Array (FPGA)

    International Nuclear Information System (INIS)

    Jinyuan Wu; Zonghan Shi; Irena Y Wang

    2003-01-01

    A Time-to-Digital Converter (TDC) implemented in general purpose field-programmable gate array (FPGA) for the Fermilab CKM experiment will be presented. The TDC uses a delay chain and register array structure to produce lower bits in addition to higher bits from a clock counter. Lacking the direct controls custom chips, the FPGA implementation of the delay chain and register array structure had to address two major problems: (1) the logic elements used for the delay chain and register array structure must be placed and routed by the FPGA compiler in a predictable manner, to assure uniformity of the TDC binning and short-term stability. (2) The delay variation due to temperature and power supply voltage must be compensated for to assure long-term stability. They used the chain structures in the existing FPGAs that the venders designed for general purpose such as carry algorithm or logic expansion to solve the first problem. To compensate for delay variations, they studied several digital compensation strategies that can be implemented in the same FPGA device. Some bench-top test results will also be presented in this document

  16. Integrated power electronic converters and digital control

    CERN Document Server

    Emadi, Ali; Nie, Zhong

    2009-01-01

    Non-isolated DC-DC ConvertersBuck ConverterBoost ConverterBuck-Boost ConverterIsolated DC-DC ConvertersFlyback ConverterForward ConverterPush-Pull ConverterFull-Bridge ConverterHalf-Bridge ConverterPower Factor CorrectionConcept of PFCGeneral Classification of PFC CircuitsHigh Switching Frequency Topologies for PFCApplication of PFC in Advanced Motor DrivesIntegrated Switched-Mode Power ConvertersSwitched-Mode Power SuppliesThe Concept of Integrated ConverterDefinition of Integrated Switched-Mode Power Supplies (ISMPS)Boost-Type Integrated TopologiesGeneral Structure of Boost-Type Integrated T

  17. Digitally assisted analog beamforming for millimeter-wave communication

    NARCIS (Netherlands)

    Kokkeler, Andre B.J.; Smit, Gerardus Johannes Maria

    2015-01-01

    The paper addresses the research question on how digital beamsteering algorithms can be combined with analog beamforming in the context of millimeter-wave communication for next generation (5G) cellular systems. Key is the use of coarse quantisation of the individual antenna signals next to the

  18. Comparing Analog and Digital Hearing Aids in Reducing Hearing Disability

    Directory of Open Access Journals (Sweden)

    Ghassem Mohammad Khani

    2004-06-01

    Full Text Available Objective: Comparing analog and digital hearing aids reducing disability caused by hearing deficiency among moderate to severe sensorineural hearing-impaired persons. Method and Material: This descriptive-analytic study was carried out on two groups of subjects participated in this study in some audiology clinics of hearing aid since May 2002 to October 2003. Twenty subjects wore analog hearing aids and twenty one subjects wore digital hearing aids. In this study , no subject had previous middle ear or psychological problems. APHAB questionnaire was completed before using hearing aid and 2 months after to determine benefit of hearing aid use. Results: Total score mean of APHAB inventory before and after use of analoge hearing aids were 52.215+6.420 and 32.300+3.443 respectively. Also total score mean of APHAB inventory before and after use of digital hearing aids were 54.9252+9.028 and 26.321+10.916 respectively. There was no significant difference between total mean score of APHAB inventory before and after using analog and digital hearing aids (P=0.058.While there was significant difference between total mean score of APHAB questionnaire before and after use of analog hearing aids (P<0.001 and also before and after use of digital hearing aids (P<0.001. Moreover age, gender , litracy level , occupation , degree of hearing loss and manner of hearing aid usage did not have significant effect on APHAB results. Configuration of loss had siginficant effect on aversiveness subscale before and after use of analog hearing aids (P=0.008. Previous experience and duration of hearing aid usage had significant effect on aversiveness subscale before and after use of digital hearing aids (P=0.043 and (P=0.024, respectively , while all of these three items did not have significant effect on total mean score of APHAB inventory and also total mean scores of three subscales of ease of communication , reverberation and background noise. Conclusion: Comparing to

  19. Digital circuit for the introduction and later removal of dither from an analog signal

    Science.gov (United States)

    Borgen, Gary S.

    1994-05-01

    An electronics circuit is presented for accurately digitizing an analog audio or like data signal into a digital equivalent signal by introducing dither into the analog signal and then subsequently removing the dither from the digitized signal prior to its conversion to an analog signal which is a substantial replica of the incoming analog audio or like data signal. The electronics circuit of the present invention is characterized by a first pseudo-random number generator which generates digital random noise signals or dither for addition to the digital equivalent signal and a second pseudo-random number generator which generates subtractive digital random noise signals for the subsequent removal of dither from the digital equivalent signal prior its conversion to the analog replica signal.

  20. On automatic synthesis of analog/digital circuits

    Energy Technology Data Exchange (ETDEWEB)

    Beiu, V.

    1998-12-31

    The paper builds on a recent explicit numerical algorithm for Kolmogorov`s superpositions, and will show that in order to synthesize minimum size (i.e., size-optimal) circuits for implementing any Boolean function, the nonlinear activation function of the gates has to be the identity function. Because classical and--or implementations, as well as threshold gate implementations require exponential size, it follows that size-optimal solutions for implementing arbitrary Boolean functions can be obtained using analog (or mixed analog/digital) circuits. Conclusions and several comments are ending the paper.

  1. A counting-weighted calibration method for a field-programmable-gate-array-based time-to-digital converter

    International Nuclear Information System (INIS)

    Chen, Yuan-Ho

    2017-01-01

    In this work, we propose a counting-weighted calibration method for field-programmable-gate-array (FPGA)-based time-to-digital converter (TDC) to provide non-linearity calibration for use in positron emission tomography (PET) scanners. To deal with the non-linearity in FPGA, we developed a counting-weighted delay line (CWD) to count the delay time of the delay cells in the TDC in order to reduce the differential non-linearity (DNL) values based on code density counts. The performance of the proposed CWD-TDC with regard to linearity far exceeds that of TDC with a traditional tapped delay line (TDL) architecture, without the need for nonlinearity calibration. When implemented in a Xilinx Vertix-5 FPGA device, the proposed CWD-TDC achieved time resolution of 60 ps with integral non-linearity (INL) and DNL of [−0.54, 0.24] and [−0.66, 0.65] least-significant-bit (LSB), respectively. This is a clear indication of the suitability of the proposed FPGA-based CWD-TDC for use in PET scanners.

  2. A counting-weighted calibration method for a field-programmable-gate-array-based time-to-digital converter

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Yuan-Ho, E-mail: chenyh@mail.cgu.edu.tw [Department of Electronic Engineering, Chang Gung University, Tao-Yuan 333, Taiwan (China); Department of Radiation Oncology, Chang Gung Memorial Hospital, Tao-Yuan 333, Taiwan (China); Center for Reliability Sciences and Technologies, Chang Gung University, Tao-Yuan 333, Taiwan (China)

    2017-05-11

    In this work, we propose a counting-weighted calibration method for field-programmable-gate-array (FPGA)-based time-to-digital converter (TDC) to provide non-linearity calibration for use in positron emission tomography (PET) scanners. To deal with the non-linearity in FPGA, we developed a counting-weighted delay line (CWD) to count the delay time of the delay cells in the TDC in order to reduce the differential non-linearity (DNL) values based on code density counts. The performance of the proposed CWD-TDC with regard to linearity far exceeds that of TDC with a traditional tapped delay line (TDL) architecture, without the need for nonlinearity calibration. When implemented in a Xilinx Vertix-5 FPGA device, the proposed CWD-TDC achieved time resolution of 60 ps with integral non-linearity (INL) and DNL of [−0.54, 0.24] and [−0.66, 0.65] least-significant-bit (LSB), respectively. This is a clear indication of the suitability of the proposed FPGA-based CWD-TDC for use in PET scanners.

  3. A high-resolution, multi-stop, time-to-digital converter for nuclear time-of-flight measurements

    International Nuclear Information System (INIS)

    Spencer, D.F.; Cole, J.; Drigert, M.; Aryaeinejad, R.

    2006-01-01

    A high-resolution, multi-stop, time-to-digital converter (TDC) was designed and developed to precisely measure the times-of-flight (TOF) of incident neutrons responsible for induced fission and capture reactions on actinide targets. The minimum time resolution is ±1 ns. The TDC design was implemented into a single, dual-wide CAMAC module. The CAMAC bus is used for command and control as well as an alternative data output. A high-speed ECL interface, compatible with LeCroy FERA modules, was also provided for the principle data output path. An Actel high-speed field programmable gate array (FPGA) chip was incorporated with an external oscillator and an internal multiple clock phasing system. This device implemented the majority of the high-speed register functions, the state machine for the FERA interface, and the high-speed counting circuit used for the TDC conversion. An external microcontroller was used to monitor and control system-level changes. In this work we discuss the performance of this TDC module as well as its application

  4. Modules of the SUMMA system for data readout to the oscillograph, digital display devices and digital printing

    International Nuclear Information System (INIS)

    Bushnin, Yu.B.; Denisenko, A.A.; Dunajtsev, A.F.; Rybakov, V.G.; Sytin, A.N.

    1975-01-01

    The modules of the ''Summa'' system are described which allow outputting of information to an oscilloscope, a digital tableau, and a digital printing mechanism; they are: a digital-analog converter, a converter that converts a binary code to a binary-decimal code, a digital display module, a block for outputting to a digital printing mechanism, and a block for stipulating the programs during information outputting. The block diagrams of the modules and the block diagram of the information-outputting programs are presented

  5. High frequency, high time resolution time-to-digital converter employing passive resonating circuits.

    Science.gov (United States)

    Ripamonti, Giancarlo; Abba, Andrea; Geraci, Angelo

    2010-05-01

    A method for measuring time intervals accurate to the picosecond range is based on phase measurements of oscillating waveforms synchronous with their beginning and/or end. The oscillation is generated by triggering an LC resonant circuit, whose capacitance is precharged. By using high Q resonators and a final active quenching of the oscillation, it is possible to conjugate high time resolution and a small measurement time, which allows a high measurement rate. Methods for fast analysis of the data are considered and discussed with reference to computing resource requirements, speed, and accuracy. Experimental tests show the feasibility of the method and a time accuracy better than 4 ps rms. Methods aimed at further reducing hardware resources are finally discussed.

  6. High frequency, high time resolution time-to-digital converter employing passive resonating circuits

    International Nuclear Information System (INIS)

    Ripamonti, Giancarlo; Abba, Andrea; Geraci, Angelo

    2010-01-01

    A method for measuring time intervals accurate to the picosecond range is based on phase measurements of oscillating waveforms synchronous with their beginning and/or end. The oscillation is generated by triggering an LC resonant circuit, whose capacitance is precharged. By using high Q resonators and a final active quenching of the oscillation, it is possible to conjugate high time resolution and a small measurement time, which allows a high measurement rate. Methods for fast analysis of the data are considered and discussed with reference to computing resource requirements, speed, and accuracy. Experimental tests show the feasibility of the method and a time accuracy better than 4 ps rms. Methods aimed at further reducing hardware resources are finally discussed.

  7. Energy-Efficient Capacitance-to-Digital Converters for Smart Sensor Applications

    KAUST Repository

    Alhoshany, Abdulaziz

    2017-01-01

    One of the key requirements in the design of wireless sensor nodes and miniature biomedical devices is energy efficiency. For a sensor node, which is a sensor and readout circuit, to survive on limited energy sources such as a battery or harvested

  8. Digital direction device model to reduce private reading difference in analog survey meter

    International Nuclear Information System (INIS)

    Kwon, Oh Il; Song, Goan Suk; Jang, Dong Chul

    2005-01-01

    Because dosimeter used in radiation measurement is shown different response for same dose rate according to kind and energy of measurement sample radiation, must know kind and energy of radiation of each device to get exact measurement. Therefore in using of detector at work, it's very important to make an estimate of the reaction according to radiation. This is adequate by the correction. But as important thing of authoritativeness about d that is used dosimeter and gets may be impact by measurer private interpretation difference as proof reading. The reliability to the results according to the detector associated with the correction and the private reading difference

  9. The application of standardized control and interface circuits to three dc to dc power converters.

    Science.gov (United States)

    Yu, Y.; Biess, J. J.; Schoenfeld, A. D.; Lalli, V. R.

    1973-01-01

    Standardized control and interface circuits were applied to the three most commonly used dc to dc converters: the buck-boost converter, the series-switching buck regulator, and the pulse-modulated parallel inverter. The two-loop ASDTIC regulation control concept was implemented by using a common analog control signal processor and a novel digital control signal processor. This resulted in control circuit standardization and superior static and dynamic performance of the three dc-to-dc converters. Power components stress control, through active peak current limiting and recovery of switching losses, was applied to enhance reliability and converter efficiency.

  10. Low-Power, Low-Voltage Analog to Digital ΣΔ

    DEFF Research Database (Denmark)

    Wismar, Ulrik Sørensen

    2007-01-01

    , and since long operation time is required, low supply voltage and low power consumption are of paramount importance. Consequently, various topologies have been compared to nd the most power ecient audio frequency modulator topology. Chapter 4 of this thesis compares power consumption of two of the most...... prevalent topologies, the single-loop modulator with integration in discrete time and the single-loop modulator with integration in continuous time. Both modulator topologies are with feedback, and all intermediate signals are in the voltage mode. Chapter 5 treats a modulator without feedback. Another...

  11. Global orbit feedback utilizing analog and digital technologies

    International Nuclear Information System (INIS)

    Singh, O.; Tang, Y.; Ramamoorthy, S.; Krinsky, S.; Yu, L.H.

    1997-01-01

    At the NSLS, an analog global orbit feedback system is used in regular operations, and a digital global orbit feedback system is available in machine physics studies on the X-Ray Ring. Here, the authors discuss the relative merits of utilizing analog and digital technology in orbit feedback. Results of experiments are reported characterizing the performance of the analog and digital systems when operated individually or together. They give their thoughts on plans for future development of the orbit feedback systems at the NSLS

  12. [Analog gamma camera digitalization computer system].

    Science.gov (United States)

    Rojas, G M; Quintana, J C; Jer, J; Astudillo, S; Arenas, L; Araya, H

    2004-01-01

    Digitalization of analogue gamma cameras systems, using special acquisition boards in microcomputers and appropriate software for acquisition and processing of nuclear medicine images is described in detail. Microcomputer integrated systems interconnected by means of a Local Area Network (LAN) and connected to several gamma cameras have been implemented using specialized acquisition boards. The PIP software (Portable Image Processing) was installed on each microcomputer to acquire and preprocess the nuclear medicine images. A specialized image processing software has been designed and developed for these purposes. This software allows processing of each nuclear medicine exam, in a semiautomatic procedure, and recording of the results on radiological films. . A stable, flexible and inexpensive system which makes it possible to digitize, visualize, process, and print nuclear medicine images obtained from analogue gamma cameras was implemented in the Nuclear Medicine Division. Such a system yields higher quality images than those obtained with analogue cameras while keeping operating costs considerably lower (filming: 24.6%, fixing 48.2% and developing 26%.) Analogue gamma camera systems can be digitalized economically. This system makes it possible to obtain optimal clinical quality nuclear medicine images, to increase the acquisition and processing efficiency, and to reduce the steps involved in each exam.

  13. Analog and digital appliance technology for the control and monitoring of space HVAC systems

    Energy Technology Data Exchange (ETDEWEB)

    Gyoeri, M

    1987-01-01

    Both analog and digital devices are expected to meet the required control functions. The analog control device meets this function by way of a complicated circuitry and wiring technology of varying sophistication. In the digital control by a preprogrammed microprocessor. Digital technology allows to use the copied programme in different devices. Any change in the control of a system can be implemented and met by a programme change in digital technology. In analog technology, this change involves a change in wiring. (orig./HW).

  14. Project Birdseye Aerial Photograph Collection: Digital and Analog Materials

    Data.gov (United States)

    National Oceanic and Atmospheric Administration, Department of Commerce — This collection consists of both analog and digital aerial photographs from Arctic areas in and around Baffin Bay, the Labrador Sea, the Arctic Ocean, the Beaufort...

  15. Time-to-code converter with selection of time intervals on duration

    International Nuclear Information System (INIS)

    Atanasov, I.Kh.; Rusanov, I.R.; )

    2001-01-01

    Identification of elementary particles on the basis of time-of-flight represents the important approach of the preliminary selection procedure. Paper describes a time-to-code converter with preliminary selection of the measured time intervals as to duration. It consists of a time-to-amplitude converter, an analog-to-digital converter, a unit of selection of time intervals as to duration, a unit of total reset and CAMAC command decoder. The time-to-code converter enables to measure time intervals with 100 ns accuracy within 0-100 ns range. Output code capacity is of 10. Selection time constitutes 50 ns [ru

  16. Digital redesign of anti-wind-up controller for cascaded analog system.

    Science.gov (United States)

    Chen, Y S; Tsai, J S H; Shieh, L S; Moussighi, M M

    2003-01-01

    The cascaded conventional anti-wind-up (CAW) design method for integral controller is discussed. Then, the prediction-based digital redesign methodology is utilized to find the new pulse amplitude modulated (PAM) digital controller for effective digital control of the analog plant with input saturation constraint. The desired digital controller is determined from existing or pre-designed CAW analog controller. The proposed method provides a novel methodology for indirect digital design of a continuous-time unity output-feedback system with a cascaded analog controller as in the case of PID controllers for industrial control processes with the presence of actuator saturations. It enables us to implement an existing or pre-designed cascaded CAW analog controller via a digital controller effectively.

  17. Reduction of the jitter of single-flux-quantum time-to-digital converters for time-of-flight mass spectrometry

    International Nuclear Information System (INIS)

    Sano, K.; Muramatsu, Y.; Yamanashi, Y.; Yoshikawa, N.; Zen, N.; Ohkubo, M.

    2014-01-01

    Highlights: • We proposed single-flux-quantum (SFQ) time-to-digital converters (TDCs) for TOF-MS. • SFQ TDC can measure time intervals between multiple signals with high-resolution. • SFQ TDC can directly convert the time intervals into binary data. • We designed two types of SFQ TDCs to reduce the jitter. • The jitter is reduced to less than 100 ps. - Abstract: We have been developing a high-resolution superconducting time-of-flight mass spectrometry (TOF-MS) system, which utilizes a superconducting strip ion detector (SSID) and a single-flux-quantum (SFQ) time-to-digital converter (TDC). The SFQ TDC can measure time intervals between multiple input signals and directly convert them into binary data. In our previous study, 24-bit SFQ TDC with a 3 × 24-bit First-In First-Out (FIFO) buffer was designed and implemented using the AIST Nb standard process 2 (STP2), whose time resolution and dynamic range are 100 ps and 1.6 ms, respectively. In this study we reduce the jitter of the TDC by using two different approaches: one uses an on-chip clock generator with an on-chip low-pass filter for reducing the noise in the bias current, and the other uses a low-jitter external clock source at room temperature. We confirmed that the jitter is reduced to less than 100 ps in the latter approach

  18. Reduction of the jitter of single-flux-quantum time-to-digital converters for time-of-flight mass spectrometry

    Energy Technology Data Exchange (ETDEWEB)

    Sano, K., E-mail: sano-kyosuke-cw@ynu.jp [Department Electrical and Computer Engineering, Yokohama National University, 79-5 Tokiwadai, Hodogaya, Yokohama 240-8501 (Japan); Muramatsu, Y.; Yamanashi, Y.; Yoshikawa, N. [Department Electrical and Computer Engineering, Yokohama National University, 79-5 Tokiwadai, Hodogaya, Yokohama 240-8501 (Japan); Zen, N.; Ohkubo, M. [Research Institute of Instrumentation Frontier, National Institute of Advanced Industrial Science and Technology, 1-1-1 Umezono, Tsukuba 305-8568 (Japan)

    2014-09-15

    Highlights: • We proposed single-flux-quantum (SFQ) time-to-digital converters (TDCs) for TOF-MS. • SFQ TDC can measure time intervals between multiple signals with high-resolution. • SFQ TDC can directly convert the time intervals into binary data. • We designed two types of SFQ TDCs to reduce the jitter. • The jitter is reduced to less than 100 ps. - Abstract: We have been developing a high-resolution superconducting time-of-flight mass spectrometry (TOF-MS) system, which utilizes a superconducting strip ion detector (SSID) and a single-flux-quantum (SFQ) time-to-digital converter (TDC). The SFQ TDC can measure time intervals between multiple input signals and directly convert them into binary data. In our previous study, 24-bit SFQ TDC with a 3 × 24-bit First-In First-Out (FIFO) buffer was designed and implemented using the AIST Nb standard process 2 (STP2), whose time resolution and dynamic range are 100 ps and 1.6 ms, respectively. In this study we reduce the jitter of the TDC by using two different approaches: one uses an on-chip clock generator with an on-chip low-pass filter for reducing the noise in the bias current, and the other uses a low-jitter external clock source at room temperature. We confirmed that the jitter is reduced to less than 100 ps in the latter approach.

  19. Restructuring of a flash A/D converter to improve SEU rad tolerance

    International Nuclear Information System (INIS)

    Monnier, T.; Roche, R.M.; Corbiere, F.

    1999-01-01

    The purpose of this work is to present how structural changes in the conventional Flash Analog to Digital Converter can secure it for a harsh radiation environment. The method consists in a coupling of two complementary techniques: a robust reconfiguration of the logical structure joined to a design hardening of the individual blocks. This approach preserves the ADC performances. (authors)

  20. Fast digital recorders of signal shaping

    International Nuclear Information System (INIS)

    Meleshko, E.A.

    1997-01-01

    Methodology of fast digital registration and pulse signals through fast-action analog-to-digital converters is considered. Systems of digital recorders: sampling and storage devices and operational memory units are described. Main attention is paid to developing parallel analog-to-digital converters, making it possible to bring the conversion frequencies up to several gigahertzes are described. Parallel-sequential analog-to-digital converters, combining high action with increased accuracy are also considered. Concrete examples of designing universal and specialized digital signal recorders, applied in experimental physics, are presented. 44 refs., 12 figs

  1. Programmable electronic system for analog and digital gamma cameras modernization

    International Nuclear Information System (INIS)

    Osorio Deliz, J. F.; Diaz Garcia, A.; Arista Omeu, E. J.

    2013-01-01

    At present the use of analog and digital gamma cameras is continuously increasing in developing countries. Many of them still largely rely in old hardware electronics, which in many cases limits their use in actual nuclear medicine diagnostic studies. For this reason worldwide there are different medical equipment manufacturing companies engaged into partial or total Gamma Cameras modernization. Nevertheless in several occasions acquisition prices are not affordable for developing countries. This work describes the basic features of a programmable electronic system that allows improving acquisitions functions and processing of analog and digital gamma cameras. This system is based on an electronic board for the acquisition and digitization of nuclear pulses which have been generated by gamma camera detector. It comprises a hardware interface with PC and the associated software to fully signal processing. Signal shaping and image processing are included. The extensive use of reference tables in the processing and signal imaging software allowed the optimization of the processing speed. Time design and system cost were also decreased. (Author)

  2. Digital regulation of a phase controlled power converter

    International Nuclear Information System (INIS)

    Schultheiss, C.; Haque, T.

    1995-01-01

    The Relativistic Heavy Ion Collider, now in construction at Brookhaven National Laboratory, will use phase controlled power converters for the main dipole and quadrupole magnet strings. The rectifiers in these power supplies will be controlled by a digital regulator based on the TI 320C30 Digital Signal Processor (DSP). The DSP implements the current loop, the voltage loop, and a system to actively reduce the sub-harmonic ripple components. Digital firing circuits consisting of a phase locked lop and counters are used to fire the SCRs. Corrections for the sub-harmonic reduction are calculated by the DSP and stored in registers in the firing circuit. These corrections are added in hardware, to the over-all firing count provided by the DSP. the resultant count is compared to a reference counter to fire the SCRs. This combination of a digital control system and the digital firing circuits allows the correction of the sub-harmonics in a real-time sense. A prototype of the regulator has been constructed, and the preliminary testing indicates a sub-harmonic reduction of 60 dB

  3. Simple Digital Control of a Two-Stage PFC Converter Using DSPIC30F Microprocessor

    DEFF Research Database (Denmark)

    Török, Lajos; Munk-Nielsen, Stig

    2010-01-01

    The use of dsPIC digital signal controllers (DSC) in Switch Mode Power Supply (SMPS) applications opens new perspectives for cheap and flexible digital control solutions. This paper presents the digital control of a two stage power factor corrector (PFC) converter. The PFC circuit is designed...... and built for 70W rated output power. Average current mode control for boost converter and current programmed control for forward converter are implemented on a dsPIC30F1010. Pulse Width Modulation (PWM) technique is used to drive the switching MOSFETs. Results show that digital solutions with ds...

  4. 4 Channel Digital Down Converter – DDC (EDA-00991)

    CERN Document Server

    BLAS, A; DELONG, J (BNL)

    2012-01-01

    A novel rf beam control architecture has been successfully tested in the LEIR synchrotron. The design is based on a VME 64X carrier board, including a DSP (digital signal processor), into which different daughter cards can be plugged in. The DDC (Digital Down Converter) is one of them. Hardware wise it has the features of a four-channel ADC (analogue-to-digital converter) which outputs drive a powerful FPGA (field programmable logic array); the latter is connected to the DSP on the carrier board via high-speed connectors. Mainly, this unit will acquire rf signals to analyze their phase and amplitude at a specified harmonic of the revolution. The main sampling clock feeding the mezzanine board is at a high harmonic of the particle’s revolution frequency. In the PSB, this frequency is varying along the accelerating cycle and this choice allows analyzing the rf signals from the cavities or from the beam without changing any parameter along the cycle. The sampling clock is tagged at the revolution rate allowing...

  5. Digitizing high frequency signals using serial analog memories

    International Nuclear Information System (INIS)

    Coonrod, J.W.

    1975-10-01

    An online computer system has been developed as a replacement for oscilloscopes and cameras on the Tormac project. Up to 32 simultaneous waveforms are recorded at up to 2 MHz in analog shift registers, then digitized sequentially after the event into a small PDP-11 computer. Data and functions of data may be displayed or plotted locally, and then forwarded for storage at a larger, remote computer via a network arrangement. Advantages over scopes have been lower incremental cost (approximately $200/channel), less noise pickup, better resolution (less than 1%), and immediate presentation of data

  6. Analog Design for Digital Deployment of a Serious Leadership Game

    Science.gov (United States)

    Maxwell, Nicholas; Lang, Tristan; Herman, Jeffrey L.; Phares, Richard

    2012-01-01

    This paper presents the design, development, and user testing of a leadership development simulation. The authors share lessons learned from using a design process for a board game to allow for quick and inexpensive revision cycles during the development of a serious leadership development game. The goal of this leadership simulation is to accelerate the development of leadership capacity in high-potential mid-level managers (GS-15 level) in a federal government agency. Simulation design included a mixed-method needs analysis, using both quantitative and qualitative approaches to determine organizational leadership needs. Eight design iterations were conducted, including three user testing phases. Three re-design iterations followed initial development, enabling game testing as part of comprehensive instructional events. Subsequent design, development and testing processes targeted digital application to a computer- and tablet-based environment. Recommendations include pros and cons of development and learner testing of an initial analog simulation prior to full digital simulation development.

  7. Mathematical Modeling and Digital Control of A Hybrid Switching Buck Converter

    Directory of Open Access Journals (Sweden)

    Muhammad Umar Abbasi

    2017-06-01

    Full Text Available The aim of this paper is to describe mathematical modeling and digital control of a hybrid switching buck converter. This converter belongs to a class of so called hybrid switching converters and contains a resonant capacitor, resonant inductor and a diode in addition to original buck converter components. The dc gain of this converter is shown to be independent of resonant branch parameters. Moreover the dc conversion ratio is derived for both ideal case and including main inductor dc resistance. Small signal model of the converter is derived and is shown to be similar to conventional buck converter. Simulation results in SIMPLIS Software as well as experimental results of digital control using an 8 bit STM microcontroller are presented. The potential advantages and applications of this converter are discussed.

  8. Bandwidth tunable microwave photonic filter based on digital and analog modulation

    Science.gov (United States)

    Zhang, Qi; Zhang, Jie; Li, Qiang; Wang, Yubing; Sun, Xian; Dong, Wei; Zhang, Xindong

    2018-05-01

    A bandwidth tunable microwave photonic filter based on digital and analog modulation is proposed and experimentally demonstrated. The digital modulation is used to broaden the effective gain spectrum and the analog modulation is to get optical lines. By changing the symbol rate of data pattern, the bandwidth is tunable from 50 MHz to 700 MHz. The interval of optical lines is set according to the bandwidth of gain spectrum which is related to the symbol rate. Several times of bandwidth increase are achieved compared to a single analog modulation and the selectivity of the response is increased by 3.7 dB compared to a single digital modulation.

  9. A Cost-Effective 10-Bit D/A Converter for Digital-Input MOEMS Micromirror Actuation

    Directory of Open Access Journals (Sweden)

    Sergio Saponara

    2010-01-01

    Full Text Available The design of a 10-bit resistor-string digital-to-analog converter (DAC for MOEMS micromirror interfacing is addressed in this paper. The proposed DAC, realized in a 0.18-μm BCD technology, features a folded resistor-string stage with a switch matrix and address decoders plus an output voltage buffer stage. The proposed DAC and buffer circuitry are key elements of an innovative scanning micromirror actuator, characterized by direct digital input, full differential driving, and linear response. With respect to the the state-of-the-art resistor-string converters in similar technologies, the proposed DAC has comparable nonlinearity (INL, DNL performances while it has the advantage of a smaller area occupation, 0.17 mm2, including output buffer, and relatively low-power consumption, 200 μW at 500 kSPS and few μW in idle mode.

  10. Terrestrial Analogs to Mars

    Science.gov (United States)

    Farr, T. G.; Arcone, S.; Arvidson, R. W.; Baker, V.; Barlow, N. G.; Beaty, D.; Bell, M. S.; Blankenship, D. D.; Bridges, N.; Briggs, G.; Bulmer, M.; Carsey, F.; Clifford, S. M.; Craddock, R. A.; Dickerson, P. W.; Duxbury, N.; Galford, G. L.; Garvin, J.; Grant, J.; Green, J. R.; Gregg, T. K. P.; Guinness, E.; Hansen, V. L.; Hecht, M. H.; Holt, J.; Howard, A.; Keszthelyi, L. P.; Lee, P.; Lanagan, P. D.; Lentz, R. C. F.; Leverington, D. W.; Marinangeli, L.; Moersch, J. E.; Morris-Smith, P. A.; Mouginis-Mark, P.; Olhoeft, G. R.; Ori, G. G.; Paillou, P.; Reilly, J. F., II; Rice, J. W., Jr.; Robinson, C. A.; Sheridan, M.; Snook, K.; Thomson, B. J.; Watson, K.; Williams, K.; Yoshikawa, K.

    2002-08-01

    It is well recognized that interpretations of Mars must begin with the Earth as a reference. The most successful comparisons have focused on understanding geologic processes on the Earth well enough to extrapolate to Mars' environment. Several facets of terrestrial analog studies have been pursued and are continuing. These studies include field workshops, characterization of terrestrial analog sites, instrument tests, laboratory measurements (including analysis of Martian meteorites), and computer and laboratory modeling. The combination of all these activities allows scientists to constrain the processes operating in specific terrestrial environments and extrapolate how similar processes could affect Mars. The Terrestrial Analogs for Mars Community Panel has considered the following two key questions: (1) How do terrestrial analog studies tie in to the Mars Exploration Payload Assessment Group science questions about life, past climate, and geologic evolution of Mars, and (2) How can future instrumentation be used to address these questions. The panel has considered the issues of data collection, value of field workshops, data archiving, laboratory measurements and modeling, human exploration issues, association with other areas of solar system exploration, and education and public outreach activities.

  11. A new time-digital convert circuit based on digital delay line

    International Nuclear Information System (INIS)

    Liu Haifeng; Guo Ying; Zhang Zhi

    2004-01-01

    An introduction of a new method of time-digital convert circuit based on digital delay line is given. High precision and good reliability can be realized when it is combined with traditional counting convert method in the measurement of large scale pulse width and low frequency self-excitation oscillator. (authors)

  12. Digital control of high-frequency switched-mode power converters

    CERN Document Server

    Corradini, Luca; Mattavelli, Paolo; Zane, Regan

    This book is focused on the fundamental aspects of analysis, modeling and design of digital control loops around high-frequency switched-mode power converters in a systematic and rigorous manner Comprehensive treatment of digital control theory for power converters Verilog and VHDL sample codes are provided Enables readers to successfully analyze, model, design, and implement voltage, current, or multi-loop digital feedback loops around switched-mode power converters Practical examples are used throughout the book to illustrate applications of the techniques developed Matlab examples are also

  13. Digitally Controlled Offline Converter with Galvanic Isolation Based on an 8-bit Microcontroller

    DEFF Research Database (Denmark)

    Jakobsen, Lars Tønnes; Andersen, Michael Andreas E.

    2007-01-01

    This paper presents an offline AC/DC converter with digital control and galvanic isolation that can be implemented using cheap commercially available components. An ATMEL ATTiny26 8-bit microcontroller is used to control the converter. The microcontroller is placed on the secondary side of the co......This paper presents an offline AC/DC converter with digital control and galvanic isolation that can be implemented using cheap commercially available components. An ATMEL ATTiny26 8-bit microcontroller is used to control the converter. The microcontroller is placed on the secondary side...

  14. Multichannel low power time-to-digital converter card with 21 ps precision and full scale range up to 10 μs

    International Nuclear Information System (INIS)

    Tamborini, D.; Portaluppi, D.; Villa, F.; Tosi, A.; Tisa, S.

    2014-01-01

    We present a Time-to-Digital Converter (TDC) card with a compact form factor, suitable for multichannel timing instruments or for integration into more complex systems. The TDC Card provides 10 ps timing resolution over the whole measurement range, which is selectable from 160 ns up to 10 μs, reaching 21 ps rms precision, 1.25% LSB rms differential nonlinearity, up to 3 Mconversion/s with 400 mW power consumption. The I/O edge card connector provides timing data readout through either a parallel bus or a 100 MHz serial interface and further measurement information like input signal rate and valid conversion rate (typically useful for time-correlated single-photon counting application) through an independent serial link

  15. Multichannel low power time-to-digital converter card with 21 ps precision and full scale range up to 10 μs

    Energy Technology Data Exchange (ETDEWEB)

    Tamborini, D., E-mail: davide.tamborini@polimi.it; Portaluppi, D.; Villa, F.; Tosi, A. [Politecnico di Milano, Dipartimento di Elettronica, Informazione e Bioingegneria, Piazza Leonardo Da Vinci 32, 20133 Milano (Italy); Tisa, S. [Micro Photon Devices, via Stradivari 4, 39100 Bolzano (Italy)

    2014-11-15

    We present a Time-to-Digital Converter (TDC) card with a compact form factor, suitable for multichannel timing instruments or for integration into more complex systems. The TDC Card provides 10 ps timing resolution over the whole measurement range, which is selectable from 160 ns up to 10 μs, reaching 21 ps rms precision, 1.25% LSB rms differential nonlinearity, up to 3 Mconversion/s with 400 mW power consumption. The I/O edge card connector provides timing data readout through either a parallel bus or a 100 MHz serial interface and further measurement information like input signal rate and valid conversion rate (typically useful for time-correlated single-photon counting application) through an independent serial link.

  16. Multichannel low power time-to-digital converter card with 21 ps precision and full scale range up to 10 μs.

    Science.gov (United States)

    Tamborini, D; Portaluppi, D; Villa, F; Tisa, S; Tosi, A

    2014-11-01

    We present a Time-to-Digital Converter (TDC) card with a compact form factor, suitable for multichannel timing instruments or for integration into more complex systems. The TDC Card provides 10 ps timing resolution over the whole measurement range, which is selectable from 160 ns up to 10 μs, reaching 21 ps rms precision, 1.25% LSB rms differential nonlinearity, up to 3 Mconversion/s with 400 mW power consumption. The I/O edge card connector provides timing data readout through either a parallel bus or a 100 MHz serial interface and further measurement information like input signal rate and valid conversion rate (typically useful for time-correlated single-photon counting application) through an independent serial link.

  17. Phase-locked loops. [in analog and digital circuits communication system

    Science.gov (United States)

    Gupta, S. C.

    1975-01-01

    An attempt to systematically outline the work done in the area of phase-locked loops which are now used in modern communication system design is presented. The analog phase-locked loops are well documented in several books but discrete, analog-digital, and digital phase-locked loop work is scattered. Apart from discussing the various analysis, design, and application aspects of phase-locked loops, a number of references are given in the bibliography.

  18. Monolitic integrated circuit for the strobed charge-to-time converter

    International Nuclear Information System (INIS)

    Bel'skij, V.I.; Bushnin, Yu.B.; Zimin, S.A.; Punzhin, Yu.N.; Sen'ko, V.A.; Soldatov, M.M.; Tokarchuk, V.P.

    1985-01-01

    The developed and comercially produced semiconducting circuit - gating charge-to-time converter KR1101PD1 is described. The considered integrated circuit is a short pulse charge-to-time converter with integration of input current. The circuit is designed for construction of time-to-pulse analog-to-digital converters utilized in multichannel detection systems when studying complex topology processes. Input resistance of the circuit is 0.1 Ω permissible input current is 50 mA, maximum measured charge is 300-1000 pC

  19. Digitally Controlled Point of Load Converter with Very Fast Transient Response

    DEFF Research Database (Denmark)

    Jakobsen, Lars Tønnes; Andersen, Michael Andreas E.

    2007-01-01

    voltage mode control and very fast transient response. The DiSOM modulator is combined with a digital PID compensator algorithm is implemented in a hybrid CPLD/FPGA and is used to control a synchronous Buck converter, which is used in typical Point of Load applications. The computational time is only......This paper presents a new Digital Self-Oscillating Modulator (DiSOM) that allows the duty cycle to be changed instantly. The DiSOM modulator is shown to have variable switching that is a function of the duty cycle. Compared to a more traditional digital PWM modulator based on a counter...... and comparator the DiSOM modulator allows the sampling frequency of the output voltage control loop to be higher than the switching frequency of the power converter, typically a DC/DC converter. The features of the DiSOM modulator makes it possible to design a digitally controlled DC/DC converter with linear...

  20. Some important aspects of the amplitude, charge and shape analog signals digitization in nuclear physics experiment

    International Nuclear Information System (INIS)

    Kulka, Z.

    1995-01-01

    One of the fundamental reasons of the special requirements concerning analog-to-digital converters (ADC's) used in nuclear experimental physics, especially in nuclear spectroscopy, in comparison to the conventional ADC's is a fact that they are utilized for continuous distribution measurements which are the nuclear radiation spectra. The ADC's used for distribution registration in form of amplitude or charge histogram spectra should have the differential linearity of two orders of magnitude better than that for conventional ADC's. Moreover, the problem of achievement the acceptable differential linearity (as well as stability) in nuclear spectroscopy is much more complicated because high resolution and high speed of the converters are also required. The first requirement comes out from application of semiconductor detectors, the second one comes from the statistical character of the nuclear processes, as well as, a necessity of collection of huge amount of nuclear data - often in a short time. In this report the influence of the specific needs of the nuclear experiments on the conversion methods selection and construction principles of the pulse ADC's is analyzed. Focus is taken on these ADC's which are used mainly to digital amplitude and charge detector signals measurements in nuclear spectroscopy. Based on the chosen examples of different types of ADC's it is shown how to obtain the required metrological parameters by using enlarged converter's structures and proper choice of the electronics components. In addition, a problem of the detector signals shape measurements in particle physics using the high speed flash ADC's is also discussed. (author). 196 refs, 99 figs, 7 tabs

  1. Toward a 62.5 MHz analog virtual pipeline integrated data acquisition system

    International Nuclear Information System (INIS)

    Kleinfelder, S.A.; Levi, M.; Milgrome, O.

    1991-01-01

    Requirements of analog pipeline memories at the SSC are reviewed and the concept of virtual pipelines is introduced. Design details and test results of several new custom analog and digital integrated circuits implementing sections of the virtual multiple pipeline (VMP) scheme are provied. These include serial, random access and simultaneous read and write random access analog storage and retrieval circuits, a 100 MHz systolic variable depth digital pipeline, and a prototye 32 μs, 12 bit serial analog to digital converter. (orig.)

  2. Time-interleaved high-speed D/A converters

    NARCIS (Netherlands)

    Olieman, E.

    2016-01-01

    This thesis is on power efficient very high-speed digital-to-analog converters (DACs) in CMOS technology, intended to generate signals from DC to RF. Components in RF signal chains are nowadays often moved from the analog domain to the digital domain. This allows for more flexibility and better

  3. The mixed analog/digital shaper of the LHCb preshower

    CERN Document Server

    Lecoq, J; Cornat, R; Perret, P; Trouilleau, C

    2001-01-01

    The LHCb preshower signals show so many fluctuations at low energy that a classical shaping is not usable at all. Thanks to the fact that the fraction of the collected energy during a whole LHC beam crossing time is 85%, we studied the special solution we presented at Snowmass 1999 workshop. This solution consists of 2 interleaved fast integrators, one being in integrate mode when the other is digitally reset. Two track-and-hold systems and an analog multiplexer are used to give at the output 85% of the signal plus 15% of the previous one. These 15% are digitally computed from the previous sample, and subtracted. A completely new design of this solution had to be made. This new design is described, including new methods to decrease the supply voltage and the noise, as well as to increase the quality of the reset and the linearity. An output stage, consisting of an AB class push-pull using only NPN transistors is also described. Laboratory and beam test results are given. (5 refs).

  4. Fast transient digitizer

    International Nuclear Information System (INIS)

    Villa, F.

    1982-01-01

    Method and apparatus for sequentially scanning a plurality of target elements with an electron scanning beam modulated in accordance with variations in a high-frequency analog signal to provide discrete analog signal samples representative of successive portions of the analog signal; coupling the discrete analog signal samples from each of the target elements to a different one of a plurality of high speed storage devices; converting the discrete analog signal samples to equivalent digital signals; and storing the digital signals in a digital memory unit for subsequent measurement or display

  5. MASMA: a versatile multifunctional unit (gated window amplifier, analog memory, and height-to-time converter); Element multifonctionnel M.A.S.M.A. (module amplificateur a seuil, memoire analogique et convertisseur amplitude-temps)

    Energy Technology Data Exchange (ETDEWEB)

    Goursky, V.; Thenes, P. [Commissariat a l' Energie Atomique, Saclay (France). Centre d' Etudes Nucleaires

    1969-07-01

    This multipurpose unit is designed to accomplish one of the following functions: - gated window amplifier, - Analog memory and - Amplitude-to-time converter. The first function is mainly devoted to improve the poor resolution of pulse-height analyzers with a small number of channels. The analog memory, a new function in the standard range of plug-in modules, is capable of performing a number of operations: 1) fixed delay, or variable delay dependent on an external parameter (application to the analog processing of non-coincident pulses), 2) de-randomiser to increase the efficiency of the pulse height analysis in a spectrometry experiment, 3) linear multiplexer to allow an analyser to serve as many spectrometry devices as memory elements that it possesses. Associated with a coding scaler, this unit, if used as a amplitude-to-time converter, constitutes a Wilkinson A.D.C with a capability of 10 bits (or more) and with a 100 MHz clock frequency. (authors) [French] Le present element est concu pour etre utilise dans l'un des modes de fonctionnement suivants: - amplificateur a seuil avec porte, - memoire analogique, - convertisseur amplitude-temps. La fonction amplificateur a seuil est destinee principalement a remedier a la resolution insuffisante de certains analyseurs d'amplitude possedant un faible nombre de canaux. La fonction memoire analogique est une fonction qui n'existe pas encore dans la gamme d'elements standardises. Elle peut trouver de nombreuses applications; a titre d'exemple, citons: 1) element de retard fixe ou dependant d'un parametre externe (application au calcul analogique portant sur les impulsions), 2) memoire-tampon: placee devant un analyseur, elle augmente l'efficacite d'analyse d'une chaine de spectrometrie, 3) multiplexeur analogique, permettant a un seul analyseur de desservir autant de voies de spectrometrie qu'il possede de memoires. En fonction convertisseur amplitude-temps, ce tiroir

  6. Converting Radiology Operations in a Six-Hospital Healthcare System from Film-Based to Digital: Another Leadership Role for the Diagnostic Medical Physicist

    International Nuclear Information System (INIS)

    Arreola, Manuel M.; Rill, Lynn N.

    2004-01-01

    As medical facilities across the United States continue to convert their radiology operations from film-based to digital environments, partially accomplished and failed endeavors are frequent because of the lack of competent and knowledgeable leadership. The diagnostic medical physicist is, without a doubt, in a privileged position to take such a leadership role, not only because of her/his understanding of the basics principles of new imaging modalities, but also because of her/his inherent participation in workflow design and educational/training activities. A well-structured approach by the physicist will certainly lead the project to a successful completion, opening, in turn, new opportunities for the medical physicist to become an active participant in the decision-making process for an institution

  7. Converting Radiology Operations in a Six-Hospital Healthcare System from Film-Based to Digital: Another Leadership Role for the Diagnostic Medical Physicist

    Science.gov (United States)

    Arreola, Manuel M.; Rill, Lynn N.

    2004-09-01

    As medical facilities across the United States continue to convert their radiology operations from film-based to digital environments, partially accomplished and failed endeavors are frequent because of the lack of competent and knowledgeable leadership. The diagnostic medical physicist is, without a doubt, in a privileged position to take such a leadership role, not only because of her/his understanding of the basics principles of new imaging modalities, but also because of her/his inherent participation in workflow design and educational/training activities. A well-structured approach by the physicist will certainly lead the project to a successful completion, opening, in turn, new opportunities for the medical physicist to become an active participant in the decision-making process for an institution.

  8. A 7 μW Offset- and Temperature-Compensated pH-to-Digital Converter

    Directory of Open Access Journals (Sweden)

    Saleh Heidary Shalmany

    2017-01-01

    Full Text Available This paper demonstrates a micropower offset- and temperature-compensated smart pH sensor, intended for use in battery-powered RFID systems that monitor the quality of perishable products. Low operation power is essential in such systems to enable autonomous logging of environmental parameters, such as the pH level, over extended periods of time using only a small, low-cost battery. The pH-sensing element in this work is an ion-sensitive extended-gate field-effect transistor (EGFET, which is incorporated in a low-power sensor front-end. The front-end outputs a pH-dependent voltage, which is then digitized by means of a co-integrated incremental delta-sigma ADC. To compensate for the offset and temperature cross-sensitivity of the EGFET, a compensation scheme using a calibration process and a temperature sensor has been devised. A prototype chip has been realized in a 0.16 μm CMOS process. It occupies 0.35 × 3.9 mm2 of die area and draws only 4 μA from a 1.8 V supply. Two different types of custom packaging have been used for measurement purposes. The pH sensor achieves a linearity of better than ±0.1 for pH values ranging from 4 to 10. The calibration and compensation scheme reduces errors due to temperature cross-sensitivity to less than ±0.1 in the temperature range of 6°C to 25°C.

  9. Quality assessment of the digitalization process of analog x-ray images

    International Nuclear Information System (INIS)

    Georgieva, D.

    2014-01-01

    Computer-assisted diagnosis enabled doctors for a second point-of-view on the test results. This improves the diseases' early detection and significantly reduces the chance of errors. These methods very nicely complemented the possibilities of digital medical imaging apparatus, but in analog images their applicability and results entirely depend on the quality of analog images digitalisation. Today many standards and remarks for good practices discuss the digital apparatus image quality but the digitalisation process of analog medical images is not a part of them. Medical imaging apparatus have become digital, but within an entirely digital medical environment is necessary for their ability to blend with the old analog medical imaging carriers. The life of patients doesn't start with the beginning of digital era and for the aim of tracking diseases it is necessary to use the new digital images as well as older analog ones. For the generation of 40-50 years a large archive of images is piled up, which should be accounted of in the diagnosis process. This article is the author's study of the digitalized image quality problem. It offers a new approach to the x-ray image digitalisation - getting the HDR-image by optical sensor. After the HDR-image generation method offers to be used a digital signal processing to improve the quality of the final 16 bit gray scale medical image. The new method for medical image enhancement is proposed - it improves the image contrast, it increases or preserves the dynamic range and it doesn't lead to the loss of small low contrast structures in the image. Key words: Quality of Digital X-Rays Images

  10. Characterization of a detector chain using a FPGA-based time-to-digital converter to reconstruct the three-dimensional coordinates of single particles at high flux

    Science.gov (United States)

    Nogrette, F.; Heurteau, D.; Chang, R.; Bouton, Q.; Westbrook, C. I.; Sellem, R.; Clément, D.

    2015-11-01

    We report on the development of a novel FPGA-based time-to-digital converter and its implementation in a detection chain that records the coordinates of single particles along three dimensions. The detector is composed of micro-channel plates mounted on top of a cross delay line and connected to fast electronics. We demonstrate continuous recording of the timing signals from the cross delay line at rates up to 4.1 × 106 s-1 and three-dimensional reconstruction of the coordinates up to 3.2 × 106 particles per second. From the imaging of a calibrated structure we measure the in-plane resolution of the detector to be 140(20) μm at a flux of 3 × 105 particles per second. In addition, we analyze a method to estimate the resolution without placing any structure under vacuum, a significant practical improvement. While we use UV photons here, the results of this work apply to the detection of other kinds of particles.

  11. Hybrid digital-analog coding with bandwidth expansion for correlated Gaussian sources under Rayleigh fading

    Science.gov (United States)

    Yahampath, Pradeepa

    2017-12-01

    Consider communicating a correlated Gaussian source over a Rayleigh fading channel with no knowledge of the channel signal-to-noise ratio (CSNR) at the transmitter. In this case, a digital system cannot be optimal for a range of CSNRs. Analog transmission however is optimal at all CSNRs, if the source and channel are memoryless and bandwidth matched. This paper presents new hybrid digital-analog (HDA) systems for sources with memory and channels with bandwidth expansion, which outperform both digital-only and analog-only systems over a wide range of CSNRs. The digital part is either a predictive quantizer or a transform code, used to achieve a coding gain. Analog part uses linear encoding to transmit the quantization error which improves the performance under CSNR variations. The hybrid encoder is optimized to achieve the minimum AMMSE (average minimum mean square error) over the CSNR distribution. To this end, analytical expressions are derived for the AMMSE of asymptotically optimal systems. It is shown that the outage CSNR of the channel code and the analog-digital power allocation must be jointly optimized to achieve the minimum AMMSE. In the case of HDA predictive quantization, a simple algorithm is presented to solve the optimization problem. Experimental results are presented for both Gauss-Markov sources and speech signals.

  12. Analog voicing detector responds to pitch

    Science.gov (United States)

    Abel, R. S.; Watkins, H. E.

    1967-01-01

    Modified electronic voice encoder /Vocoder/ includes an independent analog mode of operation in addition to the conventional digital mode. The Vocoder is a bandwidth compression equipment that permits voice transmission over channels, having only a fraction of the bandwidth required for conventional telephone-quality speech transmission.

  13. Design and Implementation of Digital Current Mode Controller for DC-DC Converters

    DEFF Research Database (Denmark)

    Taeed, Fazel

    to be regulated by a closed-loop controller. The Peak Current Mode Control (PCMC) is one of the most promising control methods for dc-dc converters. It has been known for high bandwidth (speed), and inherent current protection. Increasing the controller bandwidth decreases the output filter size and cost. Analog...

  14. Archive of Digitized Analog Boomer Seismic Reflection Data Collected from Lake Pontchartrain, Louisiana, to Mobile Bay, Alabama, During Cruises Onboard the R/V ERDA-1, June and August 1992

    Science.gov (United States)

    Sanford, Jordan M.; Harrison, Arnell S.; Wiese, Dana S.; Flocks, James G.

    2008-01-01

    . The acoustic energy is reflected at density boundaries (such as the seafloor or sediment layers beneath the seafloor), detected by the hydrophone receiver, and the amplitude of the reflected energy is recorded by an Edward P. Curley Lab (EPC) thermal plotter. This process is repeated at timed intervals (for example, 0.5 s) and recorded for specific intervals of time (for example, 100 ms). The timed intervals are also referred to as the shot interval or fire rate. On analog records, the recorded interval is referred to as the sweep, which is the amount of time the recorder stylus takes to sweep from the top of the record to the bottom of the record, thereby recording the amplitude of the reflected energy of one shot. In this way, consecutive recorded shots produce a two-dimensional (2-D) vertical image of the shallow geologic structure beneath the ship track. Many of the geophysical data collected by the USGS prior to the late 1990s were recorded in analog format and stored as paper copies. Scientists onboard made hand-written annotations onto these records to note latitude and longitude, time, line number, course heading, and geographic points of reference. Each paper roll typically contained numerous survey lines and could reach more than 90 ft in length. All rolls are stored at the USGS FISC-St. Petersburg, FL. To preserve the integrity of these records and improve accessibility, analog holdings were converted to digital files.

  15. Development of reconfigurable analog and digital circuits for plasma diagnostics measurement systems

    International Nuclear Information System (INIS)

    Srivastava, Amit Kumar; Sharma, Atish; Raval, Tushar

    2009-01-01

    In long pulse discharge tokamak, a large number of diagnostic channels are being used to understand the complex behavior of plasma. Different diagnostics demand different types of analog and digital processing for plasma parameters measurement. This leads to variable requirements of signal processing for diagnostic measurement. For such types of requirements, we have developed hardware with reconfigurable electronic devices, which provide flexible solution for rapid development of measurement system. Here the analog processing is achieved by Field Programmable Analog Array (FPAA) integrated circuit while reconfigurable digital devices (CPLD/FPGA) achieve digital processing. FPAA's provide an ideal integrated platform for implementing low to medium complexity analog signal processing. With dynamic reconfigurability, the functionality of the FPAA can be reconfigured in-system by the designer or on the fly by a microprocessor. This feature is quite useful to manipulate the tuning or the construction of any part of the analog circuit without interrupting operation of the FPAA, thus maintaining system integrity. The hardware operation control logic circuits are configured in the reconfigurable digital devices (CPLD/FPGA) to control proper hardware functioning. These reconfigurable devices provide the design flexibility and save the component space on the board. It also provides the flexibility for various setting through software. The circuit controlling commands are either issued by computer/processor or generated by circuit itself. (author)

  16. Sampled data CT system including analog filter and compensating digital filter

    International Nuclear Information System (INIS)

    Glover, G. H.; DallaPiazza, D. G.; Pelc, N. J.

    1985-01-01

    A CT scanner in which the amount of x-ray information acquired per unit time is substantially increased by using a continuous-on x-ray source and a sampled data system with the detector. An analog filter is used in the sampling system for band limiting the detector signal below the highest frequency of interest, but is a practically realizable filter and is therefore non-ideal. A digital filter is applied to the detector data after digitization to compensate for the characteristics of the analog filter, and to provide an overall filter characteristic more nearly like the ideal

  17. Sobre A Era Digital: Do Analógico Ao “Algorithmicturn” / About The Digital Age: From Analog To "Algorithmic Turn"

    OpenAIRE

    Cádima, Francisco Rui; Universidade Nova de Lisboa

    2015-01-01

    RESUMO Tal como EvgenyMorozov (2012) afirma: "em vez de celebrar o nirvana mítico de desintermediação, devemos antes olhar para as blackboxes de algoritmos de spam e propaganda". Nesta nova era digital, os media e o campo da comunicação estão a atravessar um ponto de viragem e novas convergências críticas, a diferentes níveis. Neste artigovamos explorar, nomeadamente, um dos grandes problemas para os meios de comunicação e o jornalismo de hoje, por exemplo, o surgimento de novos intermediário...

  18. Comparative study of digital laser film and analog paper image recordings

    International Nuclear Information System (INIS)

    Lee, K.R.; Cox, G.G.; Templeton, A.W.; Preston, D.F.; Anderson, W.H.; Hensley, K.S.; Dwyer, S.J.

    1987-01-01

    The increase in the use of various imaging modalities demands higher quality and more efficacious analog image recordings. Laser electronic recordings with digital array prints of 4,000 x 5,000 x 12 bits obtained using laser-sensitive film or paper are being evaluated. Dry silver paper recordings are being improved and evaluated. High-resolution paper dot printers are being studied to determine their gray-scale capabilities. The authors evaluated the image quality, costs, clinical utilization, and acceptability of CT scans, MR images, digital subtraction angiograms, digital radiographs, and radionuclide scans recorded by seven different printers (three laser, three silver paper, and one dot) and compared the same features in conventional film recording. This exhibit outlines the technical developments and instrumentation of digital laser film and analog paper recorders and presents the results of the study

  19. Teleseism-based Relative Time Corrections for Modern Analyses of Digitized Analog Seismograms

    Science.gov (United States)

    Lee, T. A.; Ishii, M.

    2017-12-01

    With modern-day instruments and seismic networks timed by GPS systems, synchronization of data streams is all but a forgone conclusion. However, during the analog era, when each station had its own clock, comparing data timing from different stations was a far more daunting prospect. Today, with recently developed methods by which analog data can be digitized, having the ability to accurately reconcile the timings of two separate stations would open decades worth of data to modern analyses. For example, one possible and exciting application would be using noise interferometry with digitized analog data in order to investigate changing structural features (on a volcano for example) over a much longer timescale than was previously possible. With this in mind, we introduce a new approach to sync time between stations based on teleseismic arrivals. P-wave arrivals are identified at stations for pairs of earthquakes from the digital and analog eras that have nearly identical distances, locations, and depths. Assuming accurate timing of the modern data, relative time corrections between a pair of stations can then be inferred for the analog data. This method for time correction depends upon the analog stations having modern equivalents, and both having sufficiently long durations of operation to allow for recording of usable teleseismic events. The Hawaii Volcano Observatory (HVO) network is an especially ideal environment for this, as it not only has a large and well-preserved collection of analog seismograms, but also has a long operating history (1912 - present) with many of the older stations having modern equivalents. As such, the scope of this project is to calculate and apply relative time corrections to analog data from two HVO stations, HILB (1919-present) and UWE (1928-present)(HILB now part of Pacific Tsunami network). Further application of this method could be for investigation of the effects of relative clock-drift, that is, the determining factor for how

  20. High-Speed, Low-Power ADC for Digital Beam Forming (DBF) Systems, Phase II

    Data.gov (United States)

    National Aeronautics and Space Administration — In Phase 1, Ridgetop Group designed a high-speed, yet low-power silicon germanium (SiGe)-based, analog-to-digital converter (ADC) to be a key element for digital...

  1. High-Speed, Low-Power ADC for Digital Beam Forming (DBF) Systems, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Ridgetop Group will design a high-speed, low-power silicon germanium (SiGe)-based, analog-to-digital converter (ADC) to be a key element for digital beam forming...

  2. A 96-channel FPGA-based Time-to-Digital Converter (TDC) and fast trigger processor module with multi-hit capability and pipeline

    International Nuclear Information System (INIS)

    Bogdan, Mircea; Frisch, Henry; Heintz, Mary; Paramonov, Alexander; Sanders, Harold; Chappa, Steve; DeMaat, Robert; Klein, Rod; Miao, Ting; Wilson, Peter; Phillips, Thomas J.

    2005-01-01

    We describe an field-programmable gate arrays based (FPGA), 96-channel, Time-to-Digital converter (TDC) and trigger logic board intended for use with the Central Outer Tracker (COT) [T. Affolder et al., Nucl. Instr. and Meth. A 526 (2004) 249] in the CDF Experiment [The CDF-II detector is described in the CDF Technical Design Report (TDR), FERMILAB-Pub-96/390-E. The TDC described here is intended as a further upgrade beyond that described in the TDR] at the Fermilab Tevatron. The COT system is digitized and read out by 315 TDC cards, each serving 96 wires of the chamber. The TDC is physically configured as a 9U VME card. The functionality is almost entirely programmed in firmware in two Altera Stratix FPGAs. The special capabilities of this device are the availability of 840MHz LVDS inputs, multiple phase-locked clock modules, and abundant memory. The TDC system operates with an input resolution of 1.2ns, a minimum input pulse width of 4.8ns and a minimum separation of 4.8ns between pulses. Each input can accept up to 7 hits per collision. The time-to-digital conversion is done by first sampling each of the 96 inputs in 1.2-ns bins and filling a circular memory; the memory addresses of logical transitions (edges) in the input data are then translated into the time of arrival and width of the COT pulses. Memory pipelines with a depth of 5.5μs allow deadtime-less operation in the first-level trigger; the data are multiple-buffered to diminish deadtime in the second-level trigger. The complete process of edge-detection and filling of buffers for readout takes 12μs. The TDC VME interface allows a 64-bit Chain Block Transfer of multiple boards in a crate with transfer-rates up to 47Mbytes/s. The TDC module also produces prompt trigger data every Tevatron crossing via a deadtimeless fast logic path that can be easily reprogrammed. The trigger bits are clocked onto the P3 VME backplane connector with a 22-ns clock for transmission to the trigger. The full TDC design and

  3. Telling time from analog and digital clocks: A multiple-route account

    NARCIS (Netherlands)

    Korvorst, M.H.W.; Roelofs, A.P.A.; Levelt, W.J.M.

    2007-01-01

    Does the naming of clocks always require conceptual preparation? To examine this question, speakers were presented with analog and digital clocks that had to be named in Dutch using either a relative (e.g., "quarter to four") or an absolute (e.g., "three forty-five") clock time expression format.

  4. A high precision time-to-digital converter based on multi-phase clock implemented within Field-Programmable-Gate-Array

    International Nuclear Information System (INIS)

    Chen Kai; Liu Shubin; An Qi

    2010-01-01

    In this paper, the design of a coarse-fine interpolation Time-to-Digital Converter (TDC) is implemented in an ALTERA's Cyclone FPGA. The carry-select chain performs as the tapped delay line. The Logic Array Block (LAB) having a propagation delay of 165 ps in the chain is synthesized as delay cell. Coarse counters triggered by the global clock count the more significant bits of the time data. This clock is also fed through the delay line, and LABs create the copies. The replicas are latched by the tested event signal, and the less significant bits are encoded from the latched binary bits. Single-shot resolution of the TDC can be 60 ps. The worst Differential Nonlinearity (DNL) is about 0.2 Least Significant Bit (LSB, 165 ps in this TDC module), and the Integral Nonlinearity (INL) is 0.6 LSB. In comparison with other architectures using the synchronous global clock to sample the taps, this architecture consumed less electric power and logic cells, and is more stable. (authors)

  5. Successfully converting mine maps to CAD

    Energy Technology Data Exchange (ETDEWEB)

    Munn, M.D. (Image Conversion Services, Inc., Salt Lake City, UT (USA))

    1991-03-01

    Procedures followed by computer service bureaus to convert paper drawing to digital files that can be used by CAD systems are described. The conversion involves laser scanning of original drawings to produce an 'inactive image' (a form suitable for many drawings that do not need to be changed). Using optical character recognition software the image is then vectorized or converted from raster format to geometric elements usable in a CAD system. The vectorized image can then be cleaned up corrected and changed at the CAD workstation. 4 figs.

  6. Performance Effects of Display Incogruity in a Digital and Analog Clock Reading Task

    Science.gov (United States)

    Comstock, J. Raymond, Jr.; Derks, Peter L.

    2004-01-01

    In an era of increasing automation, it is important to design displays and input devices that minimize human error. In this context, information concerning the human response to the detection of incongruous information is important. Such incongruous information can be operationalized as unexpected (perhaps erroneous) information on which a decision by the human or operation by an automated system is based. In the aviation environment, decision making when faced with inadequate, incomplete, or incongruous information may occur in a failure scenario. An additional challenge facing the human operator in automated environments is maintaining alertness or vigilance. The vigilance issue is of particular concern as a factor that may interact with performance when faced with inadequate, incomplete, or incongruous information. From the literature on eye-scan behavior we know that the time spent looking at a particular display or indicator is a function of the type of information one is trying to discern from the display. For example, quick glances are all it takes for confirming that an indicator is in a normal position or range, whereas a continuous look of several seconds may be required for confirmation that a complex control input is having the desired effect. Important to consider is that while an extended look takes place, visual input from other sources may be missed. Much like an extended look, the interpretation of incongruous information may require extra time. The present experiment was designed to explore the performance consequences of a decision making task when incongruous information was presented. For this experiment a display incongruity was created on a subset of trials of a clock reading laboratory task. Display incongruity was made possible through presentation of 'impossible' times (e.g. 1:65 or 11:90). Subjects made 'same' 'different' decisions and keyboard responses to pairings of Analog-Analog (AA), Digital-Digital (DD), and Analog- Digital (AD

  7. 75 FR 59100 - Removal of Regulations That Implement and Administer a Coupon Program for Digital-to-Analog...

    Science.gov (United States)

    2010-09-27

    .... Consumers had the option to apply by mail, over the phone, via fax, or online. Consumers had 90 days to... at Sec. 3005, 120 Stat. at 23. \\4\\ 72 FR 12,097 (Mar. 15, 2007). The regulations were codified at 47 CFR part 301. \\5\\ 47 CFR 301.4(e). \\6\\ 72 FR 12,118-12,121 (Mar. 15, 2007). \\7\\ 47 CFR 301.6(b)(2)(E...

  8. Analysis of parallel optical sampling rate and ADC requirements in digital coherent receivers

    DEFF Research Database (Denmark)

    Lorences Riesgo, Abel; Galili, Michael; Peucheret, Christophe

    2012-01-01

    We comprehensively assess analog-to-digital converter requirements in coherent digital receiver schemes with parallel optical sampling. We determine the electronic requirements in accordance with the properties of the free running local oscillator.......We comprehensively assess analog-to-digital converter requirements in coherent digital receiver schemes with parallel optical sampling. We determine the electronic requirements in accordance with the properties of the free running local oscillator....

  9. Analog electronics for radiation detection

    CERN Document Server

    2016-01-01

    Analog Electronics for Radiation Detection showcases the latest advances in readout electronics for particle, or radiation, detectors. Featuring chapters written by international experts in their respective fields, this authoritative text: Defines the main design parameters of front-end circuitry developed in microelectronics technologies Explains the basis for the use of complementary metal oxide semiconductor (CMOS) image sensors for the detection of charged particles and other non-consumer applications Delivers an in-depth review of analog-to-digital converters (ADCs), evaluating the pros and cons of ADCs integrated at the pixel, column, and per-chip levels Describes incremental sigma delta ADCs, time-to-digital converter (TDC) architectures, and digital pulse-processing techniques complementary to analog processing Examines the fundamental parameters and front-end types associated with silicon photomultipliers used for single visible-light photon detection Discusses pixel sensors ...

  10. Digital control of grid connected converters for distributed power generation

    Energy Technology Data Exchange (ETDEWEB)

    Skjellnes, Tore

    2008-07-01

    Pulse width modulated converters are becoming increasingly popular as their cost decreases and power rating increases. The new trend of small scale power producers, often using renewable energy sources, has created new demands for delivery of energy to the grid. A major advantage of the pulse width modulated converter is the ability to control the output voltage at any point in the voltage period. This enables rapid response to load changes and non-linear loads. In addition it can shape the voltage in response to the output current to create an outward appearance of a source impedance. This is called a virtual impedance. This thesis presents a controller for a voltage controlled three phase pulse width modulated converter. This controller enables operation in standalone mode, in parallel with other converters in a micro grid, and in parallel with a strong main grid. A time varying virtual impedance is presented which mainly attenuates reactive currents. A method of investigating the overall impedance including the virtual impedance is presented. New net standards have been introduced, requiring the converter to operate even during severe dips in the grid voltage. Experiments are presented verifying the operation of the controller during voltage dips. (Author). 37 refs., 65 figs., 10 tabs

  11. 47 CFR 15.122 - Closed caption decoder requirements for digital television receivers and converter boxes.

    Science.gov (United States)

    2010-10-01

    ... 47 Telecommunication 1 2010-10-01 2010-10-01 false Closed caption decoder requirements for digital television receivers and converter boxes. 15.122 Section 15.122 Telecommunication FEDERAL COMMUNICATIONS... code spaces C2, C3, and G3 is optional. All unsupported graphic symbols in the G3 code space are to be...

  12. Graphical Evaluation of Time-Delay Compensation Techniques for Digitally Controlled Converters

    DEFF Research Database (Denmark)

    Lu, Minghui; Wang, Xiongfei; Loh, Poh Chiang

    2018-01-01

    A main design constraint of the digitally controlled power electronics converters is the time delay of control systems, which may lead to the reduced control loop bandwidth and even unstable dynamics. Numerous time-delay compensation methods have been developed, of which the model-free schemes...

  13. Digitally-controlled PC-interfaced Boost Converter for Educational Purposes

    DEFF Research Database (Denmark)

    Ljusev, Petar; Andersen, Michael A. E.

    2004-01-01

    This paper describes implementation of a simple digital PID control algorithm for a boost converter using a cheap fixed-point 8-bit microcontroller. Serial communication to a PC server program is established for easier downloading of compensator parameters and current and voltage waveform...

  14. A simple method of digitizing analog scintigrams for quantification and digital archiving. Eine einfache Methode der Digitalisierung von Analogszintigrammen zur Quantifizierung und digitalen Archivierung

    Energy Technology Data Exchange (ETDEWEB)

    Schramm, M. (Klinik fuer Nuklearmedizin, Kiel Univ. (Germany)); Kaempfer, B. (Klinik fuer Nuklearmedizin, Kiel Univ. (Germany)); Wolf, H. (Klinik fuer Nuklearmedizin, Kiel Univ. (Germany)); Clausen, M. (Klinik fuer Nuklearmedizin, Kiel Univ. (Germany)); Wendhausen, H. (Klinik fuer Nuklearmedizin, Kiel Univ. (Germany)); Henze, E. (Klinik fuer Nuklearmedizin, Kiel Univ. (Germany))

    1993-02-01

    This study was undertaken to evaluate a quick, reliable and cheap method of digitizing analog scintigrams. 40 whole-body bone scintigrams were obtained simultaneously in analog and genuine digital format. The analog scans on X-ray film were then digitized seecondarily by three different methods: 300 dpi flatbed scanning, high-resolution camera scanning and camcorder recording. A simple exposure approach using a light box, a cheap camcorder, a PC and image grabber hard- and software proved to be optimal. Visual interpretation showed no differences in clinical findings when comparing the analog images with their secondarily digitized counterparts. To test the possibility of quantification, 126 equivalent ROIs were drawn both in the genuine digital and the secondarily digitized images. Comparing the ROI count to whole-body count percentage of the corresponding ROIs showed the correlation to be linear. The evaluation of phantom studies showed the linear correlation to be true within a wide activity range. Thus, secondary digitalization of analog scintigrams is an easy, cheap and reliable method of archiving images and allows secondary digital quantification. (orig.)

  15. Multichannel analog temperature sensing system

    International Nuclear Information System (INIS)

    Gribble, R.

    1985-08-01

    A multichannel system that protects the numerous and costly water-cooled magnet coils on the translation section of the FRX-C/T magnetic fusion experiment is described. The system comprises a thermistor for each coil, a constant current circuit for each thermistor, and a multichannel analog-to-digital converter interfaced to the computer

  16. Analog Fixed Maximum Power Point Control for a PWM Step-downConverter for Water Pumping Installations

    DEFF Research Database (Denmark)

    Beltran, H.; Perez, E.; Chen, Zhe

    2009-01-01

    This paper describes a Fixed Maximum Power Point analog control used in a step-down Pulse Width Modulated power converter. The DC/DC converter drives a DC motor used in small water pumping installations, without any electric storage device. The power supply is provided by PV panels working around....... The proposed Optimal Power Point fix voltage control system is analyzed in comparison to other complex controls....... their maximum power point, with a fixed operating voltage value. The control circuit implementation is not only simple and cheap, but also robust and reliable. System protections and adjustments are also proposed. Simulations and hardware are reported in the paper for a 150W water pumping application system...

  17. CASTOR a VLSI CMOS mixed analog-digital circuit for low noise multichannel counting applications

    International Nuclear Information System (INIS)

    Comes, G.; Loddo, F.; Hu, Y.; Kaplon, J.; Ly, F.; Turchetta, R.; Bonvicini, V.; Vacchi, A.

    1996-01-01

    In this paper we present the design and first experimental results of a VLSI mixed analog-digital 1.2 microns CMOS circuit (CASTOR) for multichannel radiation detectors applications demanding low noise amplification and counting of radiation pulses. This circuit is meant to be connected to pixel-like detectors. Imaging can be obtained by counting the number of hits in each pixel during a user-controlled exposure time. Each channel of the circuit features an analog and a digital part. In the former one, a charge preamplifier is followed by a CR-RC shaper with an output buffer and a threshold discriminator. In the digital part, a 16-bit counter is present together with some control logic. The readout of the counters is done serially on a common tri-state output. Daisy-chaining is possible. A 4-channel prototype has been built. This prototype has been optimised for use in the digital radiography Syrmep experiment at the Elettra synchrotron machine in Trieste (Italy): its main design parameters are: shaping time of about 850 ns, gain of 190 mV/fC and ENC (e - rms)=60+17 C (pF). The counting rate per channel, limited by the analog part, can be as high as about 200 kHz. Characterisation of the circuit and first tests with silicon microstrip detectors are presented. They show the circuit works according to design specification and can be used for imaging applications. (orig.)

  18. Integrated electrofluidic circuits: pressure sensing with analog and digital operation functionalities for microfluidics.

    Science.gov (United States)

    Wu, Chueh-Yu; Lu, Jau-Ching; Liu, Man-Chi; Tung, Yi-Chung

    2012-10-21

    Microfluidic technology plays an essential role in various lab on a chip devices due to its desired advantages. An automated microfluidic system integrated with actuators and sensors can further achieve better controllability. A number of microfluidic actuation schemes have been well developed. In contrast, most of the existing sensing methods still heavily rely on optical observations and external transducers, which have drawbacks including: costly instrumentation, professional operation, tedious interfacing, and difficulties of scaling up and further signal processing. This paper reports the concept of electrofluidic circuits - electrical circuits which are constructed using ionic liquid (IL)-filled fluidic channels. The developed electrofluidic circuits can be fabricated using a well-developed multi-layer soft lithography (MSL) process with polydimethylsiloxane (PDMS) microfluidic channels. Electrofluidic circuits allow seamless integration of pressure sensors with analog and digital operation functions into microfluidic systems and provide electrical readouts for further signal processing. In the experiments, the analog operation device is constructed based on electrofluidic Wheatstone bridge circuits with electrical outputs of the addition and subtraction results of the applied pressures. The digital operation (AND, OR, and XOR) devices are constructed using the electrofluidic pressure controlled switches, and output electrical signals of digital operations of the applied pressures. The experimental results demonstrate the designed functions for analog and digital operations of applied pressures are successfully achieved using the developed electrofluidic circuits, making them promising to develop integrated microfluidic systems with capabilities of precise pressure monitoring and further feedback control for advanced lab on a chip applications.

  19. A novel analog/digital reconfigurable automatic gain control with a novel DC offset cancellation circuit

    Energy Technology Data Exchange (ETDEWEB)

    He Xiaofeng; Ye Tianchun [Institute of Microelectronics, Chinese Academy of Science, Beijing 100029 (China); Mo Taishan; Ma Chengyan, E-mail: hexiaofeng@casic.ac.cn [Hangzhou Zhongke Microelectronics Co, Ltd, Hangzhou 310053 (China)

    2011-02-15

    An analog/digital reconfigurable automatic gain control (AGC) circuit with a novel DC offset cancellation circuit for a direct-conversion receiver is presented. The AGC is analog/digital reconfigurable in order to be compatible with different baseband chips. What's more, a novel DC offset cancellation (DCOC) circuit with an HPCF (high pass cutoff frequency) less than 10 kHz is proposed. The AGC is fabricated by a 0.18 {mu}m CMOS process. Under analog control mode, the AGC achieves a 70 dB dynamic range with a 3 dB-bandwidth larger than 60 MHz. Under digital control mode, through a 5-bit digital control word, the AGC shows a 64 dB gain control range by 2 dB each step with a gain error of less than 0.3 dB. The DC offset cancellation circuits can suppress the output DC offset voltage to be less than 1.5 mV, while the offset voltage of 40 mV is introduced into the input. The overall power consumption is less than 3.5 mA, and the die area is 800 x 300 {mu}m{sup 2}. (semiconductor integrated circuits)

  20. Converting to Broadsheet.

    Science.gov (United States)

    Willis, Tony

    2002-01-01

    Describes a high-school journalism adviser's experiences in shifting production to a broadsheet format. Addresses: rethinking content, redesigning support materials, developing a public relations strategy to help readers make the transition, and anticipating complications. (RS)

  1. Digital versus analog complete-arch impressions for single-unit premolar implant crowns: Operating time and patient preference.

    Science.gov (United States)

    Schepke, Ulf; Meijer, Henny J A; Kerdijk, Wouter; Cune, Marco S

    2015-09-01

    Digital impression-making techniques are supposedly more patient friendly and less time-consuming than analog techniques, but evidence is lacking to substantiate this assumption. The purpose of this in vivo within-subject comparison study was to examine patient perception and time consumption for 2 complete-arch impression-making methods: a digital and an analog technique. Fifty participants with a single missing premolar were included. Treatment consisted of implant therapy. Three months after implant placement, complete-arch digital (Cerec Omnicam; Sirona) and analog impressions (semi-individual tray, Impregum; 3M ESPE) were made, and the participant's opinion was evaluated with a standard questionnaire addressing several domains (inconvenience, shortness of breath, fear of repeating the impression, and feelings of helplessness during the procedure) with the visual analog scale. All participants were asked which procedure they preferred. Operating time was measured with a stopwatch. The differences between impressions made for maxillary and mandibular implants were also compared. The data were analyzed with paired and independent sample t tests, and effect sizes were calculated. Statistically significant differences were found in favor of the digital procedure regarding all subjective domains (P<.001), with medium to large effect sizes. Of all the participants, over 80% preferred the digital procedure to the analog procedure. The mean duration of digital impression making was 6 minutes and 39 seconds (SD=1:51) versus 12 minutes and 13 seconds (SD=1:24) for the analog impression (P<.001, effect size=2.7). Digital impression making for the restoration of a single implant crown takes less time than analog impression making. Furthermore, participants preferred the digital scan and reported less inconvenience, less shortness of breath, less fear of repeating the impression, and fewer feelings of helplessness during the procedure. Copyright © 2015 Editorial Council

  2. [Trial digitalization of analog-data obtained from the AutoAnalyzer].

    Science.gov (United States)

    Omori, S

    2000-10-01

    The AutoAnalzer(Basic Model) manufactured on Technicon corporation was a very useful instrument for clinical laboratory automation, but it was necessary to convert the data obtained from the instrument to digital values used the chart reader. This was very troublesome and there was apprehension that there would be errors in A-D conversion. We tried converting data obtained from the AutoAnalzer to a digital value by on-line connection of the instruments with minicomputers(LINC-8 and FACOM-R). The output of the recorder was converted to voltage(0 to 100 V) using a potentiometer, quantitated(0 to 1.000) by the A-D converter attached to LINC-8, and processed by the minicomputer. The control-box was an experimental device mainly designed for the convenience of users. The functions of the control-box were designated analytical items, No. of A-D converters, start and stop of the AutoAnalzer operation to the minicomputer. Employing the control-box, a technician operated this system freely, without direct computer operation. We established a generally satisfactory system for clinical laboratory automation using the minicomputer.

  3. Digital peak current mode control with adaptive slope compensation for DC-DC converters

    DEFF Research Database (Denmark)

    Andersen, Karsten Holm; Nymand, Morten

    2017-01-01

    performance and stability of current mode control. The presented method adapt to DC-DC converter operating conditions by estimating the rising and falling inductor current slopes, to apply a current slope compensation value to obtain a constant quality factor. The experimental results verifies the theoretical......This paper presents an adaptive slope compensation method for peak current mode control of digital controlled DC-DC converters, which controls the quality factor of the complex conjugated poles at half the switching frequency. Using quality factor control enables optimization of the dynamic...

  4. Advances in analog and RF IC design for wireless communication systems

    CERN Document Server

    Manganaro, Gabriele

    2013-01-01

    Advances in Analog and RF IC Design for Wireless Communication Systems gives technical introductions to the latest and most significant topics in the area of circuit design of analog/RF ICs for wireless communication systems, emphasizing wireless infrastructure rather than handsets. The book ranges from very high performance circuits for complex wireless infrastructure systems to selected highly integrated systems for handsets and mobile devices. Coverage includes power amplifiers, low-noise amplifiers, modulators, analog-to-digital converters (ADCs) and digital-to-analog converters

  5. Analog Organic Electronics Building Blocks for Organic Smart Sensor Systems on Foil

    CERN Document Server

    Marien, Hagen; Heremans, Paul

    2013-01-01

     This book provides insight into organic electronics technology and in analog circuit techniques that can be used to increase the performance of both analog and digital organic circuits. It explores the domain of organic electronics technology for analog circuit applications, specifically smart sensor systems.  It focuses on all the building blocks in the data path of an organic sensor system between the sensor and the digital processing block. Sensors, amplifiers, analog-to-digital converters and DC-DC converters are discussed in detail. Coverage includes circuit techniques, circuit implementation, design decisions and measurement results of the building blocks described. Offers readers the first book to focus on analog organic circuit design; Discusses organic electronics technology for analog circuit applications in the context of smart sensor systems; Describes all building blocks necessary for an organic sensor system between the sensor and the digital processing block; Includes circuit techniques, cir...

  6. Digital and Analog Electronics for an autonomous, deep-sea, Gamma Ray Burst Neutrino prototype detector

    Directory of Open Access Journals (Sweden)

    Manolopoulos K.

    2016-01-01

    Full Text Available GRBNeT is a Gamma Ray Burst Neutrino Telescope made of autonomously operated arrays of deep-sea light detectors, anchored to the sea-bed without any cabled connection to the shore. This paper presents the digital and analog electronics that we have designed and developed for the GRBNeT prototype. We describe the requirements for these electronics and present their design and functionality. We present low-power analog electronics for the PMTs utilized in the GRBNeT prototype and the FPGA based digital system for data selection and storage. We conclude with preliminary performance measurements of the electronics systems for the GRBNeT prototype.

  7. Comparison of Response Characteristics of High-Purity Germanium Detectors using Analog Versus Digital Processing

    International Nuclear Information System (INIS)

    Luke, S J; Raschke, K

    2004-01-01

    In this article we will discuss some of the results of the response characteristics of High Purity germanium detectors using analog versus digital processing of the signals that are outputted from the detector. The discussion will focus on whether or not there is a significant difference in the response of the detector with digital electronics that it limits the ability of the detection system to get reasonable gamma ray spectrometric results. Particularly, whether or not the performance of the analysis code Pu600 is compromised

  8. Digital approach for the design of statistical analog data acquisition on SoCs

    OpenAIRE

    Adao Antonio de Souza Junior

    2005-01-01

    With the current demand for mixed-signal SoCs, an increasing number of designers are looking for ADC architectures that can be easily implemented over digital substrates. Since ADC performance is strongly dependent upon physical and electrical features, it gets more difficult for them to benefit from more recent technologies, where these features are more variable. This way, analog signal acquisition is not allowed to follow an evolutionary trend compatible with Moore’s Law. In fact, such tre...

  9. Eksplorasi Desain Dasar (Nirmana melalui Kombinasi Media Grafis Analog dan Digital: Suatu Penelitian Kelas/Studio

    Directory of Open Access Journals (Sweden)

    Anita Rahardja

    2013-10-01

    Full Text Available This article is based on a research aiming to contextualize the fundamental principles of art and design to current setting in which analog media are no longer chosen as the ultimate hardware/tools. It is important considering digital hardware becomes more and more prevalent even preferred by students, whereas analog tools are getting harder to obtain, expensive and less ecological friendly. The goal of this research is to produce method analysis and the creation of two-dimensional basic design through digital media (Camera followed by conventional drawing tools, documented and conducted by the lecturers and the students. So far, almost 100% of the studies concerning basic design could only be found in foreign publications, with visual work examples that cannot be used freely in Indonesian local education due to copyright issue. Therefore, a literature study is conducted to examine the formal objects of this research which are the elements and fundamental principles in design, followed by ideation and visualization processes carried by the students in basic design classes through the semester. The visualization itself will integrate analog and digital media to generate the material objects of the research, which is a series of two dimensional design compositions. These compositions are then analyzed and classified to taxonomic category of fundamental principles of two-dimensional design as an integral part of teaching-learning process (self-evaluation class for future improvement. 

  10. Digital Carrier Modulation and Sampling Issues of Matrix Converters

    DEFF Research Database (Denmark)

    Loh, Poh Chiang; Rong, Runjie; Blaabjerg, Frede

    2009-01-01

    because of its inherent autosequencing process, and easier implementation using fast on-chip timers embedded in most modern digital signal processors. Motivated by these likely merits, which have previously been proven for dc-ac inverters, an investigation is now pursued here to develop appropriate...

  11. Drawing Analogies to Deepen Learning

    Science.gov (United States)

    Fava, Michelle

    2017-01-01

    This article offers examples of how drawing can facilitate thinking skills that promote analogical reasoning to enable deeper learning. The instructional design applies cognitive principles, briefly described here. The workshops were developed iteratively, through feedback from student and teacher participants. Elements of the UK National…

  12. Cheating and Feeling Honest: Committing and Punishing Analog versus Digital Academic Dishonesty Behaviors in Higher Education

    Directory of Open Access Journals (Sweden)

    Adi Friedman

    2016-12-01

    Full Text Available This study examined the phenomenon of academic dishonesty among university students. It was based on Pavela’s (1997 framework of types of academic dishonesty (cheating, plagiarism, fabrication, and facilitation and distinguished between digital and “traditional”- analog dishonesty. The study analyzed cases of academic dishonesty offenses committed by students, as well as the reasons for academic dishonesty behaviors, and the severity of penalties for violations of academic integrity. The motivational framework for committing an act of academic dishonesty (Murdock & Anderman, 2006 and the Self-Concept Maintenance model (Mazar, Amir, & Ariely, 2008 were employed to analyze the reasons for students’ dishonest behaviors. We analyzed 315 protocols of the Disciplinary Committee, at The Open University of Israel, from 2012-2013 that represent all of the offenses examined by the Committee during one and a half years. The findings showed that analog dishonesty was more prevalent than digital dishonesty. According to the students, the most prevalent reason for their academic dishonesty was the need to maintain a positive view of self as an honest person despite violating ethical codes. Interestingly, penalties for analog dishonesty were found to be more severe than those imposed for digital dishonesty. Surprisingly, women were penalized more severely than men, despite no significant gender differences in dishonesty types or in any other parameter explored in the study. Findings of this study shed light on the scope and roots of academic dishonesty and may assist institutions in coping effectively with this phenomenon.

  13. Current-to-frequency converter

    Energy Technology Data Exchange (ETDEWEB)

    Glowacki, S W [Institute of Nuclear Research, Warsaw (Poland)

    1981-07-15

    A current-to-frequency converter covering the range from 3 x 10/sup -10/ A up to 3 x 10/sup -5/ A of the input current is described. The circuit operates with nuclear detectors featuring a high internal resistance.

  14. Naming analog clocks conceptually facilitates naming digital clocks

    NARCIS (Netherlands)

    Meeuwissen, M.H.W.; Roelofs, A.P.A.; Levelt, W.J.M.

    2004-01-01

    Naming digital clocks (e.g., 2:45, say "quarter to three") requires conceptual operations on the minute and hour information displayed in the input for producing the correct relative time expression. The interplay of these conceptual operations was investigated using a repetition priming paradigm.

  15. Digital simulation of FM-ZCS-quasi resonant converter fed DD servo drive using Matlab Simulink

    Directory of Open Access Journals (Sweden)

    Kattamuri Narasimha Rao

    2009-01-01

    Full Text Available This paper deals with digital simulation of FM-ZCS-quasi resonant converter fed DC servo drive using Matlab Simulink. Quasi Resonant Converter (QRC is fast replacing conventional PWM converters in high frequency operation. The salient feature of QRC is that the switching devices can be either switched on at zero voltage or switched off at zero current, so that switching losses are zero ideally. Switching stresses are low, volumes are low and power density is high. This property imparts high efficiency and high power density to the converters. The output of QRC is regulated by varying the switching frequency of the converter. Hence it is called Frequency modulated Zero current/zero voltage switching quasi resonant converter. The present work deals with simulation of DC Servo motor fed from ZCS-QRC using Matlab. Simulation results show that the ZCS-QRC's have low total harmonic distortion. The ZCS-QRC operating in half wave and full wave modes are simulated successfully. .

  16. Research of digital controlled DC/DC converter based on STC12C5410AD

    Science.gov (United States)

    Chen, Dan-Jiang; Jin, Xin; Xiao, Zhi-Hong

    2010-02-01

    In order to study application of digital control technology on DC/DC converter, principle of increment mode PID control algorithm was analyzed in the paper. Then, a SCM named STC12C5410AD was introduced with its internal resources and characteristics. The PID control algorithm can be implemented easily based on it. The output of PID control was used to change the value of a variable that is 255 times than duty cycle, and this reduced the error of calculation. The valid of the presented algorithm was verified by an experiment for a BUCK DC/DC converter. The experimental results indicated that output voltage of the BUCK converter is stable with low ripple.

  17. Number-to-voltage converter on commutated condensers

    International Nuclear Information System (INIS)

    Grekhov, Yu.N.

    1975-01-01

    A code-voltage converter using precision voltage dividers based on commutated capacitors [1] is described which is distinguished by the absence of precision elements. Each digit includes eight field-effect transistors in two 1KT682 microcircuit assemblies and three microcapacitors with a conventional unstable capacitance 6200 pF +- 50%. The converter has a speed of response that is not inferior to that of converters based on R-2R matrices, while in time stability of the characteristics, low interference level, and low output impedance it is superior to such converters

  18. Comparison of the analog and digital pulse-shaping methods in signal processing in nuclear detections

    International Nuclear Information System (INIS)

    Golnabi, H.

    2002-01-01

    The goal of this article is to describe the potential applications of the new improved digital techniques and provide a meaningful figure of merit for the comparison of the analog and digital methods. The experimental operation of a typical digital pulse shaper used in a spectrometer with the 23 Na source and a Ge y-ray detector is discussed. The effect of different imposed dead time on the counted pulses is investigated. It is noticed that nuclear events distribution in all ranges of dead time does not obey Poisson's law and deviation from this distribution depends on the counting rate. For a given dead time, deviation from this distribution increases linearly by increasing imposed dead time. For a fixed dead time, when counting rate increases deviation from Poisson's distribution law increases accordingly, and vice versa. (Author)

  19. A Digitally Controlled Power Converter for an Electrostatic Precipitator

    Directory of Open Access Journals (Sweden)

    Pedro J. Villegas

    2017-12-01

    Full Text Available Electrostatic precipitators (ESPs are devices used in industry to eliminate polluting particles in gases. In order to supply them, an interface must be included between the three-phase main line and the required high DC voltage of tens of kilovolts. This paper describes an 80-kW power supply for such an application. Its structure is based on the series parallel resonant converter with a capacitor as output filter (PRC-LCC, which can adequately cope with the parasitic elements of the step-up transformer involved. The physical implementation of the prototype includes the use of silicon carbide—SiC—semiconductors, which provide better switching capabilities than their traditional silicon—Si—counterparts. As a result, a new control strategy results as a better alternative in which the resonant current is maintained in phase with the first harmonic of the inverter voltage. Although this operation mode imposes hard switching in one of the inverter legs, it minimizes the reactive energy that circulates through the resonant tank, the resonant current amplitude itself and the switching losses. Overall efficiency of the converter benefits from this. These ideas are supported mathematically using the steady state and dynamic models of the topology. They are confirmed with experimental measurements that include waveforms, Bode plots and thermal behavior. The experimental setup delivers 80 kW with an estimated efficiency of 98%.

  20. Ping-Pong Beam Training with Hybrid Digital-Analog Antenna Arrays

    DEFF Research Database (Denmark)

    Manchón, Carles Navarro; Carvalho, Elisabeth De; Andersen, Jørgen Bach

    2017-01-01

    In this article we propose an iterative training scheme that approximates optimal beamforming between two transceivers equipped with hybrid digital-analog antenna arrays. Inspired by methods proposed for digital arrays that exploit algebraic power iterations, the proposed training procedure...... is based on a series of alternate (ping-pong) transmissions between the two devices over a reciprocal channel. During the transmissions, the devices updates their digital beamformers by conjugation and normalization operations on the received digital signal, while the analog beamformers are progressively...

  1. Bidirectional dc-to-dc Power Converter

    Science.gov (United States)

    Griesbach, C. R.

    1986-01-01

    Solid-state, series-resonant converter uses high-voltage thyristors. Converter used either to convert high-voltage, low-current dc power to lowvoltage, high current power or reverse. Taking advantage of newly-available high-voltage thyristors to provide better reliability and efficiency than traditional converters that use vacuum tubes as power switches. New converter essentially maintenance free and provides greatly increased mean time between failures. Attractive in industrial applications whether or not bidirectional capability is required.

  2. Documentary Realism, Sampling Theory and Peircean Semiotics: electronic audiovisual signs (analog or digital as indexes of reality

    Directory of Open Access Journals (Sweden)

    Hélio Godoy

    2007-07-01

    Full Text Available This paper addresses Documentary Realism, focusing on thephysical phenomena of transduction that take place in analog and digital audiovisual systems, herein analyzed in the light of the Sampling Theory, within the framework of Shannon and Weaver’s Information Theory. Transduction is a process by which one type of energy is transformed into another, or by which information is transcodified. Within the scope of Documentary Realism, it cannotbe claimed that electronic audiovisual signs, because of their technical digital features lead to a rupture with reality. Rather, the digital documentary, based on electronic digital cinematography, is still an index of reality.

  3. Proposal for a fast, zero suppressing circuit for the digitization of analog pulses over long memory times

    International Nuclear Information System (INIS)

    Bourgeois, F.

    1984-01-01

    This report describes the design principles of a fast (100 MHz) time and pulse height digitizer that can record up to 15 analog pulses over 10-80 μs memory times. Unlike other triggered circuits prepulse samples are recorded without the help of an analog delay line. The low power requirements of the circuit as well as its fast read-out characteristics make it very attractive for detectors with many digitizing channels. Conventional circuits are described as a reference for the evaluation of this new design. An ECL 10 K implementation of the circuit is presented in the third section. (orig.)

  4. SOI Fully complementary BI-JFET-MOS technology for analog-digital applications with vertical BJT's

    International Nuclear Information System (INIS)

    Delevoye, E.; Blanc, J.P.; Bonaime, J.; Pontcharra, J. de; Gautier, J.; Martin, F.; Truche, R.

    1993-01-01

    A silicon-on-insulator, fully complementary, Bi-JFET-MOS technology has been developed for realizing multi-megarad hardened mixed analog-digital circuits. The six different active components plus resistors and capacitors have been successfully integrated in a 25-mask process using SIMOX substrate and 1 μm thick epitaxial layer. Different constraints such as device compatibility, complexity not higher than BiCMOS technology and breakdown voltages suitable for analog applications have been considered. Several process splits have been realized and all the characteristics presented here have been measured on the same split. P + gate is used for PMOS transistor to get N and PMOST symmetrical characteristics. Both NPN and PNP vertical bipolar transistors with poly-emitters show f T > 5 GHz. 2-separated gate JFET's need no additional mask. (authors). 9 figs., 1 tab

  5. Design of analog-type high-speed SerDes using digital components for optical chip-to-chip link

    Science.gov (United States)

    Sangirov, Jamshid; Nguyen, Nga T. H.; Ngo, Trong-Hieu; Im, Dong-min; Ukaegbu, Augustine I.; Lee, Tae-Woo; Cho, Mu Hee; Park, Hyo-Hoon

    2010-02-01

    An analog-type high-speed serializer/deserializer (SerDes) has been designed for optical links especially between CPU and memory. The circuit uses a system clock and its phases to multiplex data to the serial link which avoids the need for a PLL-based high frequency clock generation used in serializing parallel data as in conventional SerDes design. The multiplexed link combined with the de-serializing clock is used as a reference signal for de-serialization. The SerDes is being designed in a 0.13 μm Si-CMOS technology. The fabricated serializer has a core chip size of 360 x750 μm2. Power dissipation for the SerDes is 71.4 mW operating up to 6.5 Gbps.

  6. Systems and methods for self-synchronized digital sampling

    Science.gov (United States)

    Samson, Jr., John R. (Inventor)

    2008-01-01

    Systems and methods for self-synchronized data sampling are provided. In one embodiment, a system for capturing synchronous data samples is provided. The system includes an analog to digital converter adapted to capture signals from one or more sensors and convert the signals into a stream of digital data samples at a sampling frequency determined by a sampling control signal; and a synchronizer coupled to the analog to digital converter and adapted to receive a rotational frequency signal from a rotating machine, wherein the synchronizer is further adapted to generate the sampling control signal, and wherein the sampling control signal is based on the rotational frequency signal.

  7. Exploring dynamics of embedded ADC through adapted digital input stimuli

    NARCIS (Netherlands)

    Sheng, Xiaoqin; Kerkhoff, Hans G.; Zjajo, A.; Gronthoud, G.

    2008-01-01

    This paper reports an evaluation of adapted digital signals as a test stimulus to test dynamic parameters of analog-to-digital converters (ADC). In the first instance, the simplest digital waveform, a pulse signal, is taken as the test stimulus. The dynamics of the device under test while applying

  8. Noise and resolution with digital filtering for nuclear spectrometry

    International Nuclear Information System (INIS)

    Lakatos, T.

    1991-01-01

    Digital noise filtering looks very promising for semiconductor spectrometry. The resolution and conversion speed of the analog to digital converter (ADC) used at the input of a digital signal processor and analyzer can strongly influence the signal to noise ratio, the peak position and shape. The article leads with the investigation of these effects using computer modelling. (orig.)

  9. How to deal with substrate bounce in analog circuits in epi-type CMOS technology

    NARCIS (Netherlands)

    Nauta, Bram; Hoogzaad, Gian; Hoogzaad, G.; Donnay, S.; Gielen, G.

    2003-01-01

    Substrate noise is one of the key problems in mixed analog/digital ICs. Although measures are known to reduce substrate noise, the noise will never be completely eliminated since this requires larger chip area or exotic packages and thus higher cost. Analog circuits on digital ICs simply have to be

  10. Digital versus analog complete-arch impressions for single-unit premolar implant crowns : Operating time and patient preference

    NARCIS (Netherlands)

    Schepke, Ulf; Meijer, Henny J. A.; Kerdijk, Wouter; Cune, Marco S.

    Statement of problem. Digital impression-making techniques are supposedly more patient friendly and less time-consuming than analog techniques, but evidence is lacking to substantiate this assumption. Purpose. The purpose of this in vivo within-subject comparison study was to examine patient

  11. A portable digital speech-rate converter for hearing impairment.

    Science.gov (United States)

    Nejime, Y; Aritsuka, T; Imamura, T; Ifukube, T; Matsushima, J

    1996-06-01

    A real-time hand-sized portable device that slows speech speed without changing the pitch is proposed for hearing impairment. By using this device, people can listen to fast speech at a comfortable speed. A combination of solid-state memory recording and real-time digital signal processing with a single chip processor enables this unique function. A simplified pitchsynchronous, time-scale-modification algorithm is proposed to minimize the complexity of the DSP operation. Unlike the traditional algorithm, this dynamic-processing algorithm reduces distortion even when the expansion rate is only just above 1. Seven out of 10 elderly hearing-impaired listeners showed improvement in a sentence recognition test when using speech-rate conversion with the largest expansion rate, although no improvement was observed in a word recognition test. Some subjects who showed large improvement had limited auditory temporal resolution, but the correlation was not significant. The results suggest that, unlike conventional hearing aids, this device can be used to overcome the deterioration of auditory ability by improving the transfer of information from short-term (echoic) memory into a more stable memory trace in the human auditory system.

  12. Design Strategy for a Pipelined ADC Employing Digital Post-correction

    NARCIS (Netherlands)

    Harpe, P.J.A.; Zanikopoulos, A.; Hegt, J.A.; Roermund, van A.H.M.

    2004-01-01

    This paper describes how the usage of digital post-correction techniques in pipelined analog-to-digital converters (ADC's) can be exploited optimally during the design-phase of the converter. It is known that post-correction algorithms reduce the influence of several cir- cuit impairments on the

  13. Decimal multiplication using compressor based-BCD to binary converter

    Directory of Open Access Journals (Sweden)

    Sasidhar Mukkamala

    2018-02-01

    Full Text Available The objective of this work is to implement a scalable decimal to binary converter from 8 to 64 bits (i.e 2-digit to 16-digit using parallel architecture. The proposed converters, along with binary coded decimal (BCD adder and binary to BCD converters, are used in parallel implementation of Urdhva Triyakbhyam (UT-based 32-bit BCD multiplier. To increase the performance, compressor circuits were used in converters and multiplier. The designed hardware circuits were verified by behavioural and post layout simulations. The implementation was carried out using Virtex-6 Field Programmable Gate Array (FPGA and Application Specific Integrated Circuit (ASIC with 90-nm technology library platforms. The results on FPGA shows that compressor based converters and multipliers produced less amount of propagation delay with a slight increase of hardware resources. In case of ASIC implementation, a compressor based converter delay is equivalent to conventional converter with a slight increase of gate count. However, the reduction of delay is evident in case of compressor based multiplier.

  14. Effects of analog and digital filtering on auditory middle latency responses in adults and young children.

    Science.gov (United States)

    Suzuki, T; Hirabayashi, M; Kobayashi, K

    1984-01-01

    Effects of analog high pass (HP) filtering were compared with those of zero phase-shift digital filtering on the auditory middle latency responses (MLR) from nine adults and 16 young children with normal hearing. Analog HP filtering exerted several prominent effects on the MLR waveforms in both adults and young children, such as suppression of Po (ABR), enhancement of Nb, enhancement or emergence of Pb, and latency decrements for Pa and the later components. Analog HP filtering at 20 Hz produced more pronounced waveform distortions in the responses from young children than from adults. Much greater latency decrements for Pa and Nb were observed for young children than for adults in the analog HP-filtered responses at 20 Hz. A large positive peak (Pb) emerged at about 65 ms after the stimulus onset. From these results, the use of digital HP filtering at 20 Hz is strongly recommended for obtaining unbiased and stable MLR in young children.

  15. An Analog-Digital Mixed Measurement Method of Inductive Proximity Sensor

    Directory of Open Access Journals (Sweden)

    Yi-Xin Guo

    2015-12-01

    Full Text Available Inductive proximity sensors (IPSs are widely used in position detection given their unique advantages. To address the problem of temperature drift, this paper presents an analog-digital mixed measurement method based on the two-dimensional look-up table. The inductance and resistance components can be separated by processing the measurement data, thus reducing temperature drift and generating quantitative outputs. This study establishes and implements a two-dimensional look-up table that reduces the online computational complexity through structural modeling and by conducting an IPS operating principle analysis. This table is effectively compressed by considering the distribution characteristics of the sample data, thus simplifying the processing circuit. Moreover, power consumption is reduced. A real-time, built-in self-test (BIST function is also designed and achieved by analyzing abnormal sample data. Experiment results show that the proposed method obtains the advantages of both analog and digital measurements, which are stable, reliable, and taken in real time, without the use of floating-point arithmetic and process-control-based components. The quantitative output of displacement measurement accelerates and stabilizes the system control and detection process. The method is particularly suitable for meeting the high-performance requirements of the aviation and aerospace fields.

  16. A Loudness Function for Analog and Digital Sound Systems based on Equal Loudness Level Contours

    DEFF Research Database (Denmark)

    Nielsen, Sofus Birkedal

    2016-01-01

    frequency balance will been changed both for LL lower or higher than ML. The differences in ELLC ask for a level based equalization using fractional-order filters. A designing technique for both analog and digital fractional-order filters was developed. The analog solution is based on OPAMs and the digital......A new and better loudness compensation has been designed based on the differences between the Equal Loudness Level Contours (ELLC) in ISO 226:2003. Sound productions are normally being mixed at a high mixing level (ML) but often played at lower listening level (LL) which mean that the perceived...

  17. Earth analog image digitization of field, aerial, and lab experiment studies for Planetary Data System archiving.

    Science.gov (United States)

    Williams, D. A.; Nelson, D. M.

    2017-12-01

    A portion of the earth analog image archive at the Ronald Greeley Center for Planetary Studies (RGCPS)-the NASA Regional Planetary Information Facility at Arizona State University-is being digitized and will be added to the Planetary Data System (PDS) for public use. This will be a first addition of terrestrial data to the PDS specifically for comparative planetology studies. Digitization is separated into four tasks. First is the scanning of aerial photographs of volcanic and aeolian structures and flows. The second task is to scan field site images taken from ground and low-altitude aircraft of volcanic structures, lava flows, lava tubes, dunes, and wind streaks. The third image set to be scanned includes photographs of lab experiments from the NASA Planetary Aeolian Laboratory wind tunnels, vortex generator, and of wax models. Finally, rare NASA documents are being scanned and formatted as PDF files. Thousands of images are to be scanned for this project. Archiving of the data will follow the PDS4 standard, where the entire project is classified as a single bundle, with individual subjects (i.e., the Amboy Crater volcanic structure in the Mojave Desert of California) as collections. Within the collections, each image is considered a product, with a unique ID and associated XML document. Documents describing the image data, including the subject and context, will be included with each collection. Once complete, the data will be hosted by a PDS data node and available for public search and download. As one of the first earth analog datasets to be archived by the PDS, this project could prompt the digitizing and making available of historic datasets from other facilities for the scientific community.

  18. The making of analog module for gamma camera interface

    International Nuclear Information System (INIS)

    Yulinarsari, Leli; Rl, Tjutju; Susila, Atang; Sukandar

    2003-01-01

    The making of an analog module for gamma camera has been conducted. For computerization of planar gamma camera 37 PMT it has been developed interface hardware technology and software between the planar gamma camera with PC. With this interface gamma camera image information (Originally analog signal) was changed to digital single, therefore processes of data acquisition, image quality increase and data analysis as well as data base processing can be conducted with the help of computers, there are three gamma camera main signals, i.e. X, Y and Z . This analog module makes digitation of analog signal X and Y from the gamma camera that conveys position information coming from the gamma camera crystal. Analog conversion to digital was conducted by 2 converters ADC 12 bit with conversion time 800 ns each, conversion procedure for each coordinate X and Y was synchronized using suitable strobe signal Z for information acceptance

  19. An emergent approach to analogical inference

    Science.gov (United States)

    Thibodeau, Paul H.; Flusberg, Stephen J.; Glick, Jeremy J.; Sternberg, Daniel A.

    2013-03-01

    In recent years, a growing number of researchers have proposed that analogy is a core component of human cognition. According to the dominant theoretical viewpoint, analogical reasoning requires a specific suite of cognitive machinery, including explicitly coded symbolic representations and a mapping or binding mechanism that operates over these representations. Here we offer an alternative approach: we find that analogical inference can emerge naturally and spontaneously from a relatively simple, error-driven learning mechanism without the need to posit any additional analogy-specific machinery. The results also parallel findings from the developmental literature on analogy, demonstrating a shift from an initial reliance on surface feature similarity to the use of relational similarity later in training. Variants of the model allow us to consider and rule out alternative accounts of its performance. We conclude by discussing how these findings can potentially refine our understanding of the processes that are required to perform analogical inference.

  20. Thermal heat-balance mode flow-to-frequency converter

    Science.gov (United States)

    Pawlowski, Eligiusz

    2016-11-01

    This paper presents new type of thermal flow converter with the pulse frequency output. The integrating properties of the temperature sensor have been used, which allowed for realization of pulse frequency modulator with thermal feedback loop, stabilizing temperature of sensor placed in the flowing medium. The system assures balancing of heat amount supplied in impulses to the sensor and heat given up by the sensor in a continuous way to the flowing medium. Therefore the frequency of output impulses is proportional to the heat transfer coefficient from sensor to environment. According to the King's law, the frequency of those impulses is a function of medium flow velocity around the sensor. The special feature of presented solution is total integration of thermal sensor with the measurement signal conditioning system. Sensor and conditioning system are not the separate elements of the measurement circuit, but constitute a whole in form of thermal heat-balance mode flow-to-frequency converter. The advantage of such system is easiness of converting the frequency signal to the digital form, without using any additional analogue-to-digital converters. The frequency signal from the converter may be directly connected to the microprocessor input, which with use of standard built-in counters may convert the frequency into numerical value of high precision. Moreover, the frequency signal has higher resistance to interference than the voltage signal and may be transmitted to remote locations without the information loss.

  1. 23rd workshop on Advances in Analog Circuit Design

    CERN Document Server

    Baschirotto, Andrea; Makinwa, Kofi

    2015-01-01

    This book is based on the 18 tutorials presented during the 23rd workshop on Advances in Analog Circuit Design.  Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, serving as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.    • Includes coverage of high-performance analog-to-digital and digital to analog converters, integrated circuit design in scaled technologies, and time-domain signal processing; • Provides a state-of-the-art reference in analog circuit design, written by experts from industry and academia; • Presents material in a tutorial-based format.

  2. Evaluating droplet digital PCR for the quantification of human genomic DNA: converting copies per nanoliter to nanograms nuclear DNA per microliter.

    Science.gov (United States)

    Duewer, David L; Kline, Margaret C; Romsos, Erica L; Toman, Blaza

    2018-05-01

    The highly multiplexed polymerase chain reaction (PCR) assays used for forensic human identification perform best when used with an accurately determined quantity of input DNA. To help ensure the reliable performance of these assays, we are developing a certified reference material (CRM) for calibrating human genomic DNA working standards. To enable sharing information over time and place, CRMs must provide accurate and stable values that are metrologically traceable to a common reference. We have shown that droplet digital PCR (ddPCR) limiting dilution end-point measurements of the concentration of DNA copies per volume of sample can be traceably linked to the International System of Units (SI). Unlike values assigned using conventional relationships between ultraviolet absorbance and DNA mass concentration, entity-based ddPCR measurements are expected to be stable over time. However, the forensic community expects DNA quantity to be stated in terms of mass concentration rather than entity concentration. The transformation can be accomplished given SI-traceable values and uncertainties for the number of nucleotide bases per human haploid genome equivalent (HHGE) and the average molar mass of a nucleotide monomer in the DNA polymer. This report presents the considerations required to establish the metrological traceability of ddPCR-based mass concentration estimates of human nuclear DNA. Graphical abstract The roots of metrological traceability for human nuclear DNA mass concentration results. Values for the factors in blue must be established experimentally. Values for the factors in red have been established from authoritative source materials. HHGE stands for "haploid human genome equivalent"; there are two HHGE per diploid human genome.

  3. Upgrade Analog Readout and Digitizing System for ATLAS TileCal Demonstrator

    CERN Document Server

    Tang, F; Anderson, K; Bohm, C; Hildebrand, K; Muschter, S; Oreglia, M

    2015-01-01

    The TileCal Demonstrator is a prototype for a future upgrade to the ATLAS hadron calorimeter when the Large Hadron Collider increases luminosity in year 2023 (HL-LHC). It will be used for functionality and performance tests. The Demonstrator has 48 channels of upgraded readout and digitizing electronics and a new digital trigger capability, but is backwards-compatible with the present detector system insofar as it also provides analog trigger signals. The Demonstrator is comprised of 4 identical mechanical mini-drawers, each equipped with up to 12 photomultipliers (PMTs). The on-detector electronics includes 45 Front-End Boards, each serving an individual PMT; 4 Main Boards, each to control and digitize up to 12 PMT signals, and 4 corresponding high-speed Daughter Boards serving as data hubs between on-detector and off-detector electronics. The Demonstrator is fully compatible with the present system, accepting ATLAS triggers, timing and slow control commands for the data acquisition, detector control, and de...

  4. Analog Readout and Digitizing System for ATLAS TileCal Demonstrator

    CERN Document Server

    Tang, F; The ATLAS collaboration

    2014-01-01

    The TileCal Demonstrator is a prototype for a future upgrade to the ATLAS hadron calorimeter when the Large Hadron Collider increases luminosity in year 2023 (HL-LHC). It will be used for functionality and performance tests. The Demonstrator has 48 channels of upgraded readout and digitizing electronics and a new digital trigger capability, but is backwards-compatible with the present detector system insofar as it also provides analog trigger signals. The Demonstrator is comprised of 4 identical mechanical mini-drawers, each equipped with up to 12 photomultipliers (PMTs). The on-detector electronics includes 45 Front-End Boards, each serving an individual PMT; 4 Main Boards, each to control and digitize up to 12 PMT signals, and 4 corresponding high-speed Daughter Boards serving as data hubs between on-detector and off-detector electronics. The Demonstrator is fully compatible with the present system, accepting ATLAS triggers, timing and slow control commands for the data acquisition, detector control, and de...

  5. Beyond digital interference cancellation

    NARCIS (Netherlands)

    Venkateswaran, V.

    2010-01-01

    One of the major drawbacks towards the realization of MIMO and multi-sensor wireless communication systems is that multiple antennas at the receiver each have their own separate radio frequency (RF) front ends and analog to digital converter (ADC) units, leading to increased circuit size and power

  6. Optical Injection Locking of Vertical Cavity Surface-Emitting Lasers: Digital and Analog Applications

    Science.gov (United States)

    Parekh, Devang

    With the rise of mobile (cellphones, tablets, notebooks, etc.) and broadband wireline communications (Fiber to the Home), there are increasing demands being placed on transmitters for moving data from device to device and around the world. Digital and analog fiber-optic communications have been the key technology to meet this challenge, ushering in ubiquitous Internet and cable TV over the past 20 years. At the physical layer, high-volume low-cost manufacturing of semiconductor optoelectronic devices has played an integral role in allowing for deployment of high-speed communication links. In particular, vertical cavity surface emitting lasers (VCSEL) have revolutionized short reach communications and are poised to enter more markets due to their low cost, small size, and performance. However, VCSELs have disadvantages such as limited modulation performance and large frequency chirp which limits fiber transmission speed and distance, key parameters for many fiber-optic communication systems. Optical injection locking is one method to overcome these limitations without re-engineering the VCSEL at the device level. By locking the frequency and phase of the VCSEL by the direct injection of light from another laser oscillator, improved device performance is achieved in a post-fabrication method. In this dissertation, optical injection locking of VCSELs is investigated from an applications perspective. Optical injection locking of VCSELs can be used as a pathway to reduce complexity, cost, and size of both digital and analog fiber-optic communications. On the digital front, reduction of frequency chirp via bit pattern inversion for large-signal modulation is experimentally demonstrated showing up to 10 times reduction in frequency chirp and over 90 times increase in fiber transmission distance. Based on these results, a new reflection-based interferometric model for optical injection locking was established to explain this phenomenon. On the analog side, the resonance

  7. Performance analysis of pulse analog control schemes for LLC resonant DC/DC converters suitable in portable applications

    Directory of Open Access Journals (Sweden)

    P. Kowstubha

    2016-12-01

    Full Text Available Performance Analysis of Pulse Analog Control Schemes, predominantly Pulse-Width Modulation (PWM and Pulse-Position Modulation (PPM for LLC resonant DC/DC converter suitable in portable applications is addressed in this paper. The analysis is done for closed loop performance, frequency domain performance, primary and secondary side conduction losses and soft commutation using PSIM 6.0 software and observed that PPM scheme provides better performance at high input voltage with a good selectivity of frequency over a wide range of line and load variations. The performance of LLC resonant DC/DC converter is demonstrated using PPM scheme for a design specifications of 12 V, 5 A output.

  8. Cheating and Feeling Honest: Committing and Punishing Analog versus Digital Academic Dishonesty Behaviors in Higher Education

    Science.gov (United States)

    Friedman, Adi; Blau,Ina; Eshet-Alkalai, Yoram

    2016-01-01

    This study examined the phenomenon of academic dishonesty among university students. It was based on Pavela's (1997) framework of types of academic dishonesty (cheating, plagiarism, fabrication, and facilitation) and distinguished between digital and "traditional"- analog dishonesty. The study analyzed cases of academic dishonesty…

  9. Mixed Analog/Digital Matrix-Vector Multiplier for Neural Network Synapses

    DEFF Research Database (Denmark)

    Lehmann, Torsten; Bruun, Erik; Dietrich, Casper

    1996-01-01

    In this work we present a hardware efficient matrix-vector multiplier architecture for artificial neural networks with digitally stored synapse strengths. We present a novel technique for manipulating bipolar inputs based on an analog two's complements method and an accurate current rectifier...

  10. Opportunistic beam training with hybrid analog/digital codebooks for mmWave systems

    KAUST Repository

    Eltayeb, Mohammed E.

    2016-02-25

    © 2015 IEEE. Millimeter wave (mmWave) communication is one solution to provide more spectrum than available at lower carrier frequencies. To provide sufficient link budget, mmWave systems will use beamforming with large antenna arrays at both the transmitter and receiver. Training these large arrays using conventional approaches taken at lower carrier frequencies, however, results in high overhead. In this paper, we propose a beam training algorithm that efficiently designs the beamforming vectors with low training overhead. Exploiting mmWave channel reciprocity, the proposed algorithm relaxes the need for an explicit feedback channel, and opportunistically terminates the training process when a desired quality of service is achieved. To construct the training beamforming vectors, a new multi-resolution codebook is developed for hybrid analog/digital architectures. Simulation results show that the proposed algorithm achieves a comparable rate to that obtained by exhaustive search solutions while requiring lower training overhead when compared to prior work.

  11. Opportunistic beam training with hybrid analog/digital codebooks for mmWave systems

    KAUST Repository

    Eltayeb, Mohammed E.; Alkhateeb, Ahmed; Heath, Robert W.; Al-Naffouri, Tareq Y.

    2016-01-01

    © 2015 IEEE. Millimeter wave (mmWave) communication is one solution to provide more spectrum than available at lower carrier frequencies. To provide sufficient link budget, mmWave systems will use beamforming with large antenna arrays at both the transmitter and receiver. Training these large arrays using conventional approaches taken at lower carrier frequencies, however, results in high overhead. In this paper, we propose a beam training algorithm that efficiently designs the beamforming vectors with low training overhead. Exploiting mmWave channel reciprocity, the proposed algorithm relaxes the need for an explicit feedback channel, and opportunistically terminates the training process when a desired quality of service is achieved. To construct the training beamforming vectors, a new multi-resolution codebook is developed for hybrid analog/digital architectures. Simulation results show that the proposed algorithm achieves a comparable rate to that obtained by exhaustive search solutions while requiring lower training overhead when compared to prior work.

  12. Utilization of the voltage frequency converter or digital representation and documentation of transient reactor operation

    International Nuclear Information System (INIS)

    Doane, Harry J.

    1986-01-01

    The ease and speed of handling transient data is enhanced by the use of a voltage to frequency converter (VFC). This analogue to digital semiconductor device provides an inexpensive and portable alternative to electro-mechanical recorders and hand entry of data into computer codes. The VFC used at The University of Arizona is a Teledyne Philbrick 4705/01. A zero to positive ten volt input signal provides a zero to one megahertz output signal which is TTL/DTL compatible. VFC is used at the University of Arizona to collect data for super prompt critical TRIGA excursions. The VFC provides a low cost, convenient method of transient data storage and retrieval for experimentation and laboratory demonstration

  13. High-speed charge-to-time converter ASIC for the Super-Kamiokande detector

    Energy Technology Data Exchange (ETDEWEB)

    Nishino, H., E-mail: nishino@post.kek.j [Institute for Cosmic Ray Research, University of Tokyo, Chiba 277-8582 (Japan); Awai, K.; Hayato, Y.; Nakayama, S.; Okumura, K.; Shiozawa, M.; Takeda, A. [Institute for Cosmic Ray Research, University of Tokyo, Chiba 277-8582 (Japan); Ishikawa, K.; Minegishi, A. [Iwatsu Test Instruments Corporation, Tokyo 168-8511 (Japan); Arai, Y. [The Institute of Particle and Nuclear Studies, KEK, Ibaraki 305-0801 (Japan)

    2009-11-11

    A new application-specific integrated circuit (ASIC), the high-speed charge-to-time converter (QTC) IWATSU CLC101, provides three channels, each consisting of preamplifier, discriminator, low-pass filter, and charge integration circuitry, optimized for the waveform of a photomultiplier tube (PMT). This ASIC detects PMT signals using individual built-in discriminators and drives output timing signals whose width represents the integrated charge of the PMT signal. Combined with external input circuits composed of passive elements, the QTC provides full analog signal processing for the detector's PMTs, ready for further processing by time-to-digital converters (TDCs). High-rate (>1MHz) signal processing is achieved by short-charge-conversion-time and baseline-restoration circuits. Wide-range charge measurements are enabled by offering three gain ranges while maintaining a short cycle time. QTC chip test results show good analog performance, with efficient detection for a single photoelectron signal, four orders of magnitude dynamic range (0.3mVapprox3V; 0.2approx2500pC), 1% charge linearity, 0.2 pC charge resolution, and 0.1 ns timing resolution. Test results on ambient temperature dependence, channel isolation, and rate dependence also meet specifications.

  14. High-speed charge-to-time converter ASIC for the Super-Kamiokande detector

    International Nuclear Information System (INIS)

    Nishino, H.; Awai, K.; Hayato, Y.; Nakayama, S.; Okumura, K.; Shiozawa, M.; Takeda, A.; Ishikawa, K.; Minegishi, A.; Arai, Y.

    2009-01-01

    A new application-specific integrated circuit (ASIC), the high-speed charge-to-time converter (QTC) IWATSU CLC101, provides three channels, each consisting of preamplifier, discriminator, low-pass filter, and charge integration circuitry, optimized for the waveform of a photomultiplier tube (PMT). This ASIC detects PMT signals using individual built-in discriminators and drives output timing signals whose width represents the integrated charge of the PMT signal. Combined with external input circuits composed of passive elements, the QTC provides full analog signal processing for the detector's PMTs, ready for further processing by time-to-digital converters (TDCs). High-rate (>1MHz) signal processing is achieved by short-charge-conversion-time and baseline-restoration circuits. Wide-range charge measurements are enabled by offering three gain ranges while maintaining a short cycle time. QTC chip test results show good analog performance, with efficient detection for a single photoelectron signal, four orders of magnitude dynamic range (0.3mV∼3V; 0.2∼2500pC), 1% charge linearity, 0.2 pC charge resolution, and 0.1 ns timing resolution. Test results on ambient temperature dependence, channel isolation, and rate dependence also meet specifications.

  15. 106-17 Telemetry Standards Digitized Audio Telemetry Standard Chapter 5

    Science.gov (United States)

    2017-07-01

    Digitized Audio Telemetry Standard 5.1 General This chapter defines continuously variable slope delta (CVSD) modulation as the standard for digitizing...audio signal. The CVSD modulator is, in essence , a 1-bit analog-to-digital converter. The output of this 1-bit encoder is a serial bit stream, where

  16. Multi-scale entropy analysis of VR-based analog-digital system of the operator mental workload

    International Nuclear Information System (INIS)

    Lee Chunyi; Hung Tamin; Sun Tienlung; Yang Chihwei; Cheng Tsungchieh; Yang Lichen

    2011-01-01

    In the past, serious accidents of nuclear power plant usually had relation with the negligence, error handling and wrong decisions of operators. Therefore, to understand and be able to measure mental workload levels of operators are significant for safety issues in the nuclear power plant, especially when operators face emergency conditions. Therefore, this study is to determine the physiological indicators to measure the operator in the task of mental workload. This paper was to use electrocardiogram (ECG) measurements, to collect the RR-Interval data; heart rate variability (HRV) to analysis the complexity of the operator. After importing the data to calculate heart rate variability of complexity analysis, it can help us to understand the operator for the analog-digital platform adaptation. The virtual analog-digital nuclear plant control room is built using a 3D game development tool called Unity3D. (author)

  17. Computational approaches to analogical reasoning current trends

    CERN Document Server

    Richard, Gilles

    2014-01-01

    Analogical reasoning is known as a powerful mode for drawing plausible conclusions and solving problems. It has been the topic of a huge number of works by philosophers, anthropologists, linguists, psychologists, and computer scientists. As such, it has been early studied in artificial intelligence, with a particular renewal of interest in the last decade. The present volume provides a structured view of current research trends on computational approaches to analogical reasoning. It starts with an overview of the field, with an extensive bibliography. The 14 collected contributions cover a large scope of issues. First, the use of analogical proportions and analogies is explained and discussed in various natural language processing problems, as well as in automated deduction. Then, different formal frameworks for handling analogies are presented, dealing with case-based reasoning, heuristic-driven theory projection, commonsense reasoning about incomplete rule bases, logical proportions induced by similarity an...

  18. A Modified Design of a Thermocouple Based Digital Temperature Indicator with Opto-Isolation

    Directory of Open Access Journals (Sweden)

    S. C. BERA

    2008-01-01

    Full Text Available In the conventional thermocouple based digital temperature indicator the millivolt signal obtained from a thermocouple is first amplified and then converted into a digital signal by using analog-to-digital converter (ADC. This digital signal is then indicated as digital display of temperature using digital counter circuit or microprocessor/microcontroller based circuitry. In the present paper a modified AD conversion technique along with opto-isolation is used to indicate digitally the temperature without using any conventional analog-to-digital converter. The theory and design of the measuring technique are described in the paper. The non-linearity of thermocouple is eliminated by using look-up table within software program. The performance of the circuit has been experimentally tested by using mV input signal instead of a thermocouple as well as using a K-type thermocouple. The experimental results are reported in the paper.

  19. Development of a digital solar simulator based on full-bridge converter

    Science.gov (United States)

    Liu, Chen; Feng, Jian; Liu, Zhilong; Tong, Weichao; Ji, Yibo

    2014-02-01

    With the development of solar photovoltaic, distribution schemes utilized in power grid had been commonly application, and photovoltaic (PV) inverter is an essential equipment in grid. In this paper, a digital solar simulator based on full-bridge structure is presented. The output characteristic curve of system is electrically similar to silicon solar cells, which can greatly simplify research methods of PV inverter, improve the efficiency of research and development. The proposed simulator consists on a main control board based on TM320F28335, phase-shifted zero-voltage-switching (ZVS) DC-DC full-bridge converter and voltage and current sampling circuit, that allows emulating the voltage-current curve with the open-circuit voltage (Voc) of 900V and the short-circuit current (Isc) of 18A .When the system connected to a PV inverter, the inverter can quickly track from the open-circuit to the maximum power point and keep stability.

  20. Signal Digitizer and Cross-Correlation Application Specific Integrated Circuit

    Science.gov (United States)

    Baranauskas, Dalius (Inventor); Baranauskas, Gytis (Inventor); Zelenin, Denis (Inventor); Kangaslahti, Pekka (Inventor); Tanner, Alan B. (Inventor); Lim, Boon H. (Inventor)

    2017-01-01

    According to one embodiment, a cross-correlator comprises a plurality of analog front ends (AFEs), a cross-correlation circuit and a data serializer. Each of the AFEs comprises a variable gain amplifier (VGA) and a corresponding analog-to-digital converter (ADC) in which the VGA receives and modifies a unique analog signal associates with a measured analog radio frequency (RF) signal and the ADC produces digital data associated with the modified analog signal. Communicatively coupled to the AFEs, the cross-correlation circuit performs a cross-correlation operation on the digital data produced from different measured analog RF signals. The data serializer is communicatively coupled to the summing and cross-correlating matrix and continuously outputs a prescribed amount of the correlated digital data.

  1. Electronic circuit for rapid digital NMR signal imaging

    International Nuclear Information System (INIS)

    Jurak, P.; Krejci, I.; Belusa, J.

    1992-01-01

    The circuit is made up of two analog-to-digital converters whose outputs are connected to a process computer and the synchronization inputs to the clock terminal. The one analog-to-digital converter is connected, via the signal input, to the terminal of the nuclear magnetic resonance locking signal. The signal input of the other analog-to-digital converter is connected to the time base generator, which can be switched off, and to the magnetic field sweep circuit. The assets of this citcuit include easy computerized processing of the digitized information independently of the time base generation, and prevention of interfering signals from penetrating into the magnetic field sweep circuits. (Z.S.). 1 fig

  2. A time-to-amplitude converter with constant fraction timing discriminators for short time interval measurements

    International Nuclear Information System (INIS)

    Kostamovaara, J.; Myllylae, R.

    1985-01-01

    The construction and the performance of a time-to-amplitude converter equipped with constant fraction discriminators is described. The TAC consists of digital and analog parts which are constructed on two printed circuit boards, both of which are located in a single width NIM module. The dead time of the TAC for a start pulse which is not followed by a stop pulse within the time range of the device (proportional100 ns) is only proportional100 ns, which enables one to avoid counting rate saturation even with a high random input signal rate. The differential and integral nonlinearities of the TAC are better than +-1.5% and 0.05%, respectively. The resolution for input timing pulses of constant shape is 20 ps (fwhm), and less than 10 ps (fwhm) with a modification in the digital part. The walk error of the constant fraction timing discriminators is presented and various parameters affecting it are discussed. The effect of the various disturbances in linearity caused by the fast ECL logic and their minimization are also discussed. The time-to-amplitude converter has been used in positron lifetime studies and for laser range finding. (orig.)

  3. Amplitude-to-code converter for photomultipliers operating at high loadings

    International Nuclear Information System (INIS)

    Arkhangel'skij, B.V.; Evgrafov, G.N.; Pishchal'nikov, Yu.M.; Shuvalov, R.S.

    1982-01-01

    An 11-bit amplitude-to-code converter intended for the analysis of photomultiplier pulses under high loadings is described. To decrease the volume of digit electronics in the converter an analog memory on capacities is envisaged. A well-known bridge circuit with diodes on the main carriers is selected as a gating circuit. The gate control is realized by a switching circuit on fast-response transistors with boundary frequency of 1.2-1.5 GHz. The converter main characteristics are given, namely, maximum output signal amplitude equal to -1.5 V, minimum pulse selection duration of 10 ns, maximum number of counts at Usub(input)=-1.0 V and tsub(selection)=50 ns amounting to 1400, integral nonlinearity of +-0.1%, conversion temperature instability of 0.2%/deg C in the temperature range of (+10-+40) deg C, maximum time of data storage equal to 300 ms, conversion coefficient instability of 0.42 counts, number of channels in a unit CAMAC block equal to 12

  4. Static and Dynamic Characteristics of DC-DC Converter Using a Digital Filter

    Science.gov (United States)

    Kurokawa, Fujio; Okamatsu, Masashi

    This paper presents the regulation and dynamic characteristics of the dc-dc converter with digital PID control, the minimum phase FIR filter or the IIR filter, and then the design criterion to improve the dynamic characteristics is discussed. As a result, it is clarified that the DC-DC converter using the IIR filter method has superior performance characteristics. The regulation range is within 1.3%, the undershoot against the step change of the load is less than 2% and the transient time is less than 0.4ms with the IIR filter method. In this case, the switching frequency is 100kHz and the step change of the load R is from 50 Ω to 10 Ω. Further, the superior characteristics are obtained when the first gain, the second gain and the second cut-off frequency are relatively large, and the first cut-off frequency and the passing frequency are relatively low. Moreover, it is important that the gain strongly decreases at the second cut-off frequency because the upper band pass frequency range must be always less than half of the sampling frequency based on the sampling theory.

  5. Pulse shape analysis based on similarity and neural network with digital-analog fusion method

    International Nuclear Information System (INIS)

    Mardiyanto, M.P.; Uritani, A.; Sakai, H.; Kawarabayashi, J.; Iguchi, T.

    2000-01-01

    Through the measurement of 22 Na γ-rays, it has been demonstrated that the correction process was well done by fusing the similarity values with the pulse heights measured by the analog system, where at least four improvements in the energy spectrum characteristics were recognized, i.e., the increase of the peak-to-valley ratio, the photopeak area, the photopeak sharpness without discarding any events, and the 1,275 keV γ-ray photopeak was seen. The use of a slow digitizer was the main problem for this method. However, it can be solved easily using a faster digitizer. The fusion method was also applied for the beta-gamma mixed spectra separation. Mixed spectra of beta-gamma of the 137 Cs- 90 Sr mixed source could be separated well. We made a comparison between the energy spectrum of 137 Cs as a result of independent measurement with the result of the separation. After being compared, both FWHM agreed quite well. However, there was a slight difference between the two spectra on the peak-to-valley ratio. This separation method is simple and useful so that it can be applied for many other similar applications. (S.Y.)

  6. Analisis Migrasi Radio Trunking Analog ke Radio Trunking Digital di Indonesia

    Directory of Open Access Journals (Sweden)

    Riza Azmi

    2013-09-01

    Full Text Available Dalam Tabel Alokasi Spektrum Frekuensi di Indonesia pada catatan kaki INS9 dan INS13 disebutkan bahwa alokasi pada pita-pita frekuensi yang digunakan untuk teknologi trunking direncanakan dimigrasi ke sistem komunikasi trunking digital pada waktu yang akan ditentukan oleh pemerintah. Terkait dengan hal itu, studi ini bertujuan untuk mengkaji bagaimana kelayakan migrasi dari sistem trunking analog ke sistem trunking digital dan hal-hal yang terkait dengannya. Dengan menggunakan analisis biaya dan manfaat (Cost-Benefit Analysis studi ini melihat bahwa migrasi hanya dapat dilakukan jika umur masing-masing lisensi dari operator telah berakhir, atau dengan kata lain pemerintah dapat mendorong transisi ke digital dengan menerbitkan lisensi baru yaitu lisensi trunking digital.

  7. Digitally Controlled Converter with Dynamic Change of Control Law and Power Throughput

    DEFF Research Database (Denmark)

    Nesgaard, Carsten; Andersen, Michael Andreas E.; Nielsen, Nils

    2003-01-01

    the substitution of analog controllers with their digital counterparts are considered. The outline of the paper is divided into two segments – the first being an experimental analysis of the timing behavior by means of code optimization – the second being an examination of the dynamics of incorporating two control......With the continuous development of faster and cheaper microprocessors the field of applications for digital control is constantly expanding. Based on this trend the paper at hand describes the analysis and implementation of multiple control laws within the same controller. Also, implemented within...

  8. Experimental investigation of analog and digital dimming techniques on photometric performance of an indoor Visible Light Communication (VLC) system

    Science.gov (United States)

    Zafar, Fahad; Kalavally, Vineetha; Bakaul, Masuduzzaman; Parthiban, R.

    2015-09-01

    For making commercial implementation of light emitting diode (LED) based visible light communication (VLC) systems feasible, it is necessary to incorporate it with dimming schemes which will provide energy savings, moods and increase the aesthetic value of the places using this technology. There are two general methods which are used to dim LEDs commonly categorized as analog and digital dimming. Incorporating fast data transmission with these techniques is a key challenge in VLC. In this paper, digital and analog dimming for a 10 Mb/s non return to zero on-off keying (NRZ-OOK) based VLC system is experimentally investigated considering both photometric and communicative parameters. A spectrophotometer was used for photometric analysis and a line of sight (LOS) configuration in the presence of ambient light was used for analyzing communication parameters. Based on the experimental results, it was determined that digital dimming scheme is preferable for use in indoor VLC systems requiring high dimming precision and data transmission at lower brightness levels. On the other hand, analog dimming scheme is a cost effective solution for high speed systems where dimming precision is insignificant.

  9. An Implantable Mixed Analog/Digital Neural Stimulator Circuit

    DEFF Research Database (Denmark)

    Gudnason, Gunnar; Bruun, Erik; Haugland, Morten

    1999-01-01

    This paper describes a chip for a multichannel neural stimulator for functional electrical stimulation. The chip performs all the signal processing required in an implanted neural stimulator. The power and signal transmission to the stimulator is carried out via an inductive link. From the signals...... electrical stimulation is to restore various bodily functions (e.g. motor functions) in patients who have lost them due to injury or disease....

  10. Topical Meeting of Broadband Analog and Digital Optoelectronics

    Science.gov (United States)

    1992-01-01

    optical switching Different access configurations were studied in order to select the more appropriate ones and to evaluate the investment required...arrangeable networks operating at the bit rate of the switched data (McC90). 2) FUNDEMENTAL ASPECTS OF SCALEABILITY AND PERFORMANCE. The network analysis of

  11. Greenland Snow Pit and Core Stratigraphy (Analog and Digital Formats)

    Data.gov (United States)

    National Oceanic and Atmospheric Administration, Department of Commerce — This data set is comprised of scientific field study notebooks from geologist Carl S. Benson describing his traverses of Greenland from 1952 to 1955. The notebooks...

  12. Preliminary results of Digital Pulse Shape Acquisition from Chimera

    Energy Technology Data Exchange (ETDEWEB)

    Alderighi, D.M.; Sechi, G. [INFN Milano and IASF, CNR, Milano (France); Anzalone, A.; Cavallaro, S.; Giustolisi, F.; Laguidara, E.; Lanzalone, G.; Porto, F. [Catania Univ., LNS and Dipartimento di Fisica (France); Bassini, R.; Boiano, C.; Guazzoni, P.; Russo, S.; Sassi, M.; Zetta, L. [Milano Univ., INFN and Dipartimento di Fisica (Italy); Cardella, G.; Defilippo, S.E.; Lanzano, G.; Paganod, A.; Papa, M.; Pirrone, S.; Politi, G. [Catania Univ., INFN and Dipartimento di Fisica (Italy); Geraci, E. [Bologna Univ., INFN and Dipartimento di Fisica (Italy)

    2003-07-01

    A 100 MS/s 14-bit Sampling Analog-to-Digital converter has been used to perform digital pulse-shape acquisition of signals collected from CHIMERA telescopes. The signals from a typical CHIMERA detection cell have been collected using both a standard CHIMERA electronic chain up to the amplifier, and a very simple analog front end, basically reduced to the preamplifier. The preliminary on-beam results are presented. (authors)

  13. Preliminary results of Digital Pulse Shape Acquisition from Chimera

    International Nuclear Information System (INIS)

    Alderighi, D.M.; Sechi, G.; Anzalone, A.; Cavallaro, S.; Giustolisi, F.; Laguidara, E.; Lanzalone, G.; Porto, F.; Bassini, R.; Boiano, C.; Guazzoni, P.; Russo, S.; Sassi, M.; Zetta, L.; Cardella, G.; Defilippo, S.E.; Lanzano, G.; Paganod, A.; Papa, M.; Pirrone, S.; Politi, G.; Geraci, E.

    2003-01-01

    A 100 MS/s 14-bit Sampling Analog-to-Digital converter has been used to perform digital pulse-shape acquisition of signals collected from CHIMERA telescopes. The signals from a typical CHIMERA detection cell have been collected using both a standard CHIMERA electronic chain up to the amplifier, and a very simple analog front end, basically reduced to the preamplifier. The preliminary on-beam results are presented. (authors)

  14. Data readout system on the base of CAMAC time-to-digital converters with time resolution 2 ns for a drift chamber; Sistema s{sup e}ma informatsii s drejfovykh kamer na osnove vremyatsmfrovykh preobrazovatelej s 2 ns razresheniem v standarte KAMAK

    Energy Technology Data Exchange (ETDEWEB)

    Sidorkin, V V

    1996-12-31

    Data readout system for drift chambers consists of time-to-digital converter (TDS), timer-generator (TG) and sub controller. Maximal time of conversion constitutes 12.5 m ks. Block-circuits of TDC and TG are presented and their functioning under calibration and measuring is studied as well. 4 refs.

  15. Application of digital sampling techniques to particle identification

    International Nuclear Information System (INIS)

    Bardelli, L.; Poggi, G.; Bini, M.; Carraresi, L.; Pasquali, G.; Taccetti, N.

    2003-01-01

    An application of digital sampling techniques is presented which can greatly simplify experiments involving sub-nanosecond time-mark determinations and energy measurements with nuclear detectors, used for Pulse Shape Analysis and Time of Flight measurements in heavy ion experiments. In this work a 100 M Sample/s, 12 bit analog to digital converter has been used: examples of this technique applied to Silicon and CsI(Tl) detectors in heavy-ions experiments involving particle identification via Pulse Shape analysis and Time of Flight measurements are presented. The system is suited for applications to large detector arrays and to different kinds of detectors. Some preliminary results regarding the simulation of current signals in Silicon detectors are also discussed. (authors)

  16. 10 ps resolution, 160 ns full scale range and less than 1.5% differential non-linearity time-to-digital converter module for high performance timing measurements

    Energy Technology Data Exchange (ETDEWEB)

    Markovic, B.; Tamborini, D.; Villa, F.; Tisa, S.; Tosi, A.; Zappa, F. [Politecnico di Milano, Dipartimento di Elettronica e Informazione, Piazza Leonardo da Vinci 32, 20133 Milano (Italy)

    2012-07-15

    We present a compact high performance time-to-digital converter (TDC) module that provides 10 ps timing resolution, 160 ns dynamic range and a differential non-linearity better than 1.5% LSB{sub rms}. The TDC can be operated either as a general-purpose time-interval measurement device, when receiving external START and STOP pulses, or in photon-timing mode, when employing the on-chip SPAD (single photon avalanche diode) detector for detecting photons and time-tagging them. The instrument precision is 15 ps{sub rms} (i.e., 36 ps{sub FWHM}) and in photon timing mode it is still better than 70 ps{sub FWHM}. The USB link to the remote PC allows the easy setting of measurement parameters, the fast download of acquired data, and their visualization and storing via an user-friendly software interface. The module proves to be the best candidate for a wide variety of applications such as: fluorescence lifetime imaging, time-of-flight ranging measurements, time-resolved positron emission tomography, single-molecule spectroscopy, fluorescence correlation spectroscopy, diffuse optical tomography, optical time-domain reflectometry, quantum optics, etc.

  17. 2 GHz self-aligning tandem A/D converter for SAR

    DEFF Research Database (Denmark)

    Søbjærg, Sten Schmidl; Christensen, Erik Lintz

    2001-01-01

    digitizing, and the other is to digitize the signal before digital I/Q demodulation. In both cases the digitizing may be performed by a digital front end (DFE) with two parallel analog-to-digital-converters (ADCs) sampling at 1 GHz in phase or in anti-phase respectively, provided the analog bandwidth...... of the ADC is sufficient. In the first case each ADC has to digitize a 0-400 MHz signal, and in the second case both ADCs have to digitize a 100-900 MHz signal. In both cases the sampling time alignment is a critical parameter. The paper addresses some aspects of ADC alignment in the implementation of a DFE...

  18. Comparison of digital selenium radiography with an analog screen-film system in the diagnostic process of pneumoconiosis according to ILO classification; Vergleich der digitalen Selenradiographie mit einem analogen Film-Folien-System in der Diagnostik von Staublungenerkrankungen anhand der ILO-Klassifikation

    Energy Technology Data Exchange (ETDEWEB)

    Zaehringer, M.; Winnekendonk, G.; Gossmann, A.; Krueger, K.; Krug, B. [Koeln Univ. (Germany). Inst. und Poliklinik fuer Radiologische Diagnostik; Piekarski, C.; Saupe, M. [Koeln Univ. (Germany). Inst. und Poliklinik fuer Arbeitsmedizin, Sozialmedizin und Sozialhygiene; Braun, W. [Koeln Univ. (DE). Inst. fuer Medizinische Statistik, Informatik und Epidemiologie (IMSIE)

    2001-10-01

    Purpose: The aim of the study was to determine the diagnostic value of digital selenium radiography in patients with pneumoconiosis. For this purpose chest X-rays by digital selenium radiography and analog screen-film system were compared according to the ILO classification of pneumoconiosis. Method: After approval of the study by the local ethic commission and the Federal German Office for Radiation Protection 50 patients were subjected to X-rays by digital selenium radiography (Thoravision; Philips Medical Systems, Hamburg, Germany) and analog screen-film system of the same day within the scope of an industrial medicine preventive checkup. Four investigators rated the chest X-rays according to the ILO classification of pneumoconiosis. Results: The findings demonstrated by chest X-rays according to ILO classification were rated similar by digital selenium radiography and analog screen film systems. Image quality of the digital pictures was rated significantly better. Conclusion: The use of digital selenium radiography in evaluating chest X-rays according to the ILO classification does not result in over- or underestimation of pulmonary pathologies. Hence, in the diagnosis of pneumoconiosis, digital selenium radiography can replace the tested analog screen-film system. (orig.) [German] Ziel: Zur Ermittlung des Stellenwertes der digitalen Selenradiographie in der Diagnostik von Staublungenerkrankungen werden mittels Selenradiographie und einer analogen Film-Folienkombination angefertigte Thoraxuebersichtsaufnahmen im sagittalen Strahlengang anhand der ILO-Klassifikation fuer Staublungenerkrankungen verglichen. Methoden: Nach Genehmigung der Studie durch die oertliche Ethikkommission und das Bundesamt fuer Strahlenschutz wurden bei 50 Patienten im Rahmen einer arbeitsmedizinischen Vorsorgeuntersuchung am selben Tag Thoraxuebersichtsaufnahmen im sagittalen Strahlengang in analoger und digitaler Technik (Thoravision; Philips Medizin Systeme, Hamburg, Deutschland

  19. Digital television: a new way to deliver information

    Science.gov (United States)

    Huang, Samson

    1998-12-01

    Digital television (DTV) is a new way to deliver video, audio, and other data. Why should TV be converted to digital? How does DTV work? What can we do with it? This paper provides some introduction about DTV, its history, and its roll-out plan. It then compares DTV with analog TV, and describes how DTV works. It also describes why the computer industry, as well as the consumer electronics industry, are both very interested I the DTV market. Next, it describes what Intel has done on DTV, including how we build a PC- based DTV, its test evaluation results, its new applications, and Intel's DTV station DMRL. This paper also describes remaining issues, our roadmap, vision, and future directions.

  20. Method for Converter Synchronization with RF Injection

    OpenAIRE

    Joshua P. Bruckmeyer; Ivica Kostanic

    2015-01-01

    This paper presents an injection method for synchronizing analog to digital converters (ADC). This approach can eliminate the need for precision routed discrete synchronization signals of current technologies, such as JESD204. By eliminating the setup and hold time requirements at the conversion (or near conversion) clock rate, higher sample rate systems can be synchronized. Measured data from an existing multiple ADC conversion system was used to evaluate the method. Coherent beams were simu...

  1. Digitally-assisted analog and RF CMOS circuit design for software-defined radio

    CERN Document Server

    Okada, Kenichi

    2011-01-01

    This book describes the state-of-the-art in RF, analog, and mixed-signal circuit design for Software Defined Radio (SDR). It synthesizes for analog/RF circuit designers the most important general design approaches to take advantage of the most recent CMOS technology, which can integrate millions of transistors, as well as several real examples from the most recent research results.

  2. Stop preaching to the converted

    Science.gov (United States)

    Landrum, Asheley R.; Lull, Robert B.

    2017-08-01

    Traditional moral arguments fail to persuade conservative climate sceptics. Pope Francis' gifting of his climate encyclical to President Trump prior to his leaving the Paris Agreement shows that even a religious leader's persuasive power is constrained by how his message resonates with conservative moral values.

  3. Compliance-Free, Digital SET and Analog RESET Synaptic Characteristics of Sub-Tantalum Oxide Based Neuromorphic Device.

    Science.gov (United States)

    Abbas, Yawar; Jeon, Yu-Rim; Sokolov, Andrey Sergeevich; Kim, Sohyeon; Ku, Boncheol; Choi, Changhwan

    2018-01-19

    A two terminal semiconducting device like a memristor is indispensable to emulate the function of synapse in the working memory. The analog switching characteristics of memristor play a vital role in the emulation of biological synapses. The application of consecutive voltage sweeps or pulses (action potentials) changes the conductivity of the memristor which is considered as the fundamental cause of the synaptic plasticity. In this study, a neuromorphic device using an in-situ growth of sub-tantalum oxide switching layer is fabricated, which exhibits the digital SET and analog RESET switching with an electroforming process without any compliance current (compliance free). The process of electroforming and SET is observed at the positive sweeps of +2.4 V and +0.86 V, respectively, while multilevel RESET is observed with the consecutive negative sweeps in the range of 0 V to -1.2 V. The movement of oxygen vacancies and gradual change in the anatomy of the filament is attributed to digital SET and analog RESET switching characteristics. For the Ti/Ta 2 O 3-x /Pt neuromorphic device, the Ti top and Pt bottom electrodes are considered as counterparts of the pre-synaptic input terminal and a post-synaptic output terminal, respectively.

  4. eeDAP: an evaluation environment for digital and analog pathology

    Science.gov (United States)

    Gallas, Brandon D.; Cheng, Wei-Chung; Gavrielides, Marios A.; Ivansky, Adam; Keay, Tyler; Wunderlich, Adam; Hipp, Jason; Hewitt, Stephen M.

    2014-03-01

    Purpose: The purpose of this work is to present a platform for designing and executing studies that compare pathologists interpreting histopathology of whole slide images (WSI) on a computer display to pathologists interpreting glass slides on an optical microscope. Methods: Here we present eeDAP, an evaluation environment for digital and analog pathology. The key element in eeDAP is the registration of theWSI to the glass slide. Registration is accomplished through computer control of the microscope stage and a camera mounted on the microscope that acquires images of the real time microscope view. Registration allows for the evaluation of the same regions of interest (ROIs) in both domains. This can reduce or eliminate disagreements that arise from pathologists interpreting different areas and focuses the comparison on image quality. Results: We reduced the pathologist interpretation area from an entire glass slide (≈10-30 mm)2 to small ROIs google.com (project: eeDAP) as Matlab source or as a precompiled stand-alone license-free application.

  5. Analog and hybrid computing

    CERN Document Server

    Hyndman, D E

    2013-01-01

    Analog and Hybrid Computing focuses on the operations of analog and hybrid computers. The book first outlines the history of computing devices that influenced the creation of analog and digital computers. The types of problems to be solved on computers, computing systems, and digital computers are discussed. The text looks at the theory and operation of electronic analog computers, including linear and non-linear computing units and use of analog computers as operational amplifiers. The monograph examines the preparation of problems to be deciphered on computers. Flow diagrams, methods of ampl

  6. The ALTRO Chip A 16-channel A/D Converter and Digital Processor for Gas Detectors

    CERN Document Server

    Esteve-Bosch, R; Mota, B; Musa, L

    2003-01-01

    The ALTRO (ALICE TPC Read Out) chip is a mixed-signal integrated circuit designed to be one of the building blocks of the readout electronics for gas detectors. Originally conceived and optimised for the Time Projection Chamber (TPC) of the ALICE experiment at the CERN LHC, its architecture and programmability makes it suitable for the readout of a wider class of gas detectors. In one single chip, the analogue signals from 16 channels are digitised, processed, compressed and stored in a multi-acquisition memory. The Analogue-to- Digital converters embedded in the chip have a 10-bit dynamic range and a maximum sampling rate in the range of 20 to 40MHz. After digitisation, a pipelined hardwired Processor is able to remove from the input signal a wide range of systematic and non-systematic perturbations, related to the non-ideal behaviour of the detector, temperature variation of the electronics, environmental noise, etc. Moreover, the Processor is able to suppress the signal tail within 1mus after the pulse pea...

  7. Advances in Analog Circuit Design 2015

    CERN Document Server

    Baschirotto, Andrea; Harpe, Pieter

    2016-01-01

    This book is based on the 18 tutorials presented during the 24th workshop on Advances in Analog Circuit Design. Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, including low-power and energy-efficient analog electronics, with specific contributions focusing on the design of efficient sensor interfaces and low-power RF systems. This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development. ·         Provides a state-of-the-art reference in analog circuit design, written by experts from industry and academia; ·         Presents material in a tutorial-based format; ·         Includes coverage of high-performance analog-to-digital and digital to analog converters, integrated circuit design in scaled technologies, and time-domain signal processing.

  8. A 6 device SOI new technology for mixed analog-digital and rad-hard applications

    International Nuclear Information System (INIS)

    Blanc, J.P.; Bonaime, J.; Delevoye, E.; Pontcharra, J. de; Gautier, J.; Truche, R.

    1993-01-01

    DMILL technology is being developed for very rad-hard analog-digital applications, such as space and military circuits or as electronics for the future generation of high energy collider (LHC, CERN, Geneva). Both CMOS and junction (JFET and bipolar) transistors are needed. A new process has been integrated, based on a 1.2μm thick silicon film on insulator (SIMOX plus epitaxy), a complete dielectric isolation and low temperature process. The mean feature is that six different components are fabricated on the same wafer, taking into account the 12 volts supply voltage constraint for some analog applications. The first electrical characteristics are presented in this paper. The optimization capabilities of such a hardened CBi-CJ-CMOS technology are discussed

  9. A physical analogy to fuzzy clustering

    DEFF Research Database (Denmark)

    Jantzen, Jan

    2004-01-01

    This tutorial paper provides an interpretation of the membership assignment in the fuzzy clustering algorithm fuzzy c-means. The membership of a data point to several clusters is shown to be analogous to the gravitational forces between bodies of mass. This provides an alternative way to explain...

  10. A linear temperature-to-frequency converter

    DEFF Research Database (Denmark)

    Løvborg, Leif

    1965-01-01

    , and that the maximum value of the temperature-frequency coefficient beta in this point is-1/3 alpha, where a is the temperature coefficient of the thermistor at the corresponding temperature. Curves showing the range in which the converter is expected to be linear to within plusmn0.1 degC are given. A laboratory......-built converter having beta = 1.0% degC-1 at 25degC is found to be linear to within plusmn0. 1 degC from 10 to 40degC....

  11. Computer Simulation of Phase Shifted Series Resonant DC to DC Converter

    Directory of Open Access Journals (Sweden)

    P. PARVATHY

    2016-01-01

    Full Text Available This paper deals with digital simulation of phase shifted series resonant DC to DC converter using Matlab Simulink. The Simulink models for open loop and closed loop systems are developed and they are used for simulation studies. This converter is capable of producing ripple free DC output. Switching losses and switching stresses are reduced by using soft switching. This converter has advantages like high power density and low switching losses. Theoretical predictions are well supported by the simulation results.

  12. Conception and realization of a multichannel amplitude converter

    International Nuclear Information System (INIS)

    Bendebiche, L.

    1992-11-01

    A compact Analog to Digital Converter system suitable for high resolution γ-ray analysers has been developed based on the ADADC84 12-bit converter from Analog Devices. The converter was equipped with a peak detector and a stretcher, and with a memory card providing the sliding scale circuits, the lower threshold, the channel number identification and the zero suppression. The conversion time is 10 μs and the differential non linearity is less than ±1% for a 12-bit resolution. The converter consists of a 12-bit spectroscopy analog-to-digital converter (ADC) while the memory card includes a 8K 24-bit buffer memory. The two cards are plugged into a slot of an IBM PC AT and using an emulation software converts the micro-computer into a full-featured pulse height analyser. In data acquisition mode, the cards can operate independently, making the computer free for other tasks. The software offers acquisition control, visualization, data handling functions and various types of result presentation

  13. Tests on a digital neutron-gamma pulse shape discriminator with NE213

    International Nuclear Information System (INIS)

    Bell, Z.W.

    1981-01-01

    A technique using charge sensitive analog-to-digital converters to do neutron-gamma pulse shape discrimination is reported. The converters are gated by short (135 ns) pulses so as to reduce pile-up and the timing is such that the slow and total light output from the scintillator are measured. Preliminary tests indicate that the system performs reasonably well but poorer than some reported analog systems employing gated integrators or cross-over techniques. (orig.)

  14. PHOTO ENCODING OF ANALOG WATER METER FOR USER ACCESS AND PAYMENT SYSTEM

    OpenAIRE

    GODFREY A. MILLS; MOSES A. ACQUAH; APPAH BREMANG

    2012-01-01

    This paper presents design reconfiguration of analog water meter to provide remote access to user water consumption and billing records, payments, and meter device monitoring using photo-encoding as the detecting method for water consumption, a PIC18F2423 microcontroller for data processing, and SMS (short message service) technology for data transportation. To validate the system design, an analog water meter was converted into a digital equivalent and interfaced to the cellular network to t...

  15. Converting ODM Metadata to FHIR Questionnaire Resources.

    Science.gov (United States)

    Doods, Justin; Neuhaus, Philipp; Dugas, Martin

    2016-01-01

    Interoperability between systems and data sharing between domains is becoming more and more important. The portal medical-data-models.org offers more than 5.300 UMLS annotated forms in CDISC ODM format in order to support interoperability, but several additional export formats are available. CDISC's ODM and HL7's framework FHIR Questionnaire resource were analyzed, a mapping between elements created and a converter implemented. The developed converter was integrated into the portal with FHIR Questionnaire XML or JSON download options. New FHIR applications can now use this large library of forms.

  16. On the comparison of analog and digital SiPM readout in terms of expected timing performance

    International Nuclear Information System (INIS)

    Gundacker, S.; Auffray, E.; Jarron, P.; Meyer, T.; Lecoq, P.

    2015-01-01

    In time of flight positron emission tomography (TOF-PET) and in particular for the EndoTOFPET-US Project (Frisch, 2013 [1]), and other applications for high energy physics, the multi-digital silicon photomultiplier (MD-SiPM) was recently proposed (Mandai and Charbon, 2012 [2]), in which the time of every single photoelectron is being recorded. If such a photodetector is coupled to a scintillator, the largest and most accurate timing information can be extracted from the cascade of the scintillation photons, and the most probable time of positron emission determined. The readout concept of the MD-SiPM is very different from that of the analog SiPM, where the individual photoelectrons are merely summed up and the output signal fed into the readout electronics. We have developed a comprehensive Monte Carlo (MC) simulation tool that describes the timing properties of the photodetector and electronics, the scintillation properties of the crystal and the light transfer within the crystal. In previous studies we have compared MC simulations with coincidence time resolution (CTR) measurements and found good agreement within less than 10% for crystals of different lengths (from 3 mm to 20 mm) coupled to SiPMs from Hamamatsu. In this work we will use the developed MC tool to directly compare the highest possible time resolution for both the analog and digital readout of SiPMs with different scintillator lengths. The presented studies reveal that the analog readout of SiPMs with microcell signal pile-up and leading edge discrimination can lead to nearly the same time resolution as compared to the maximum likelihood time estimation applied to MD-SiPMs. Consequently there is no real preference for either a digital or analog SiPM for the sake of achieving highest time resolution. However, the best CTR in the analog SiPM is observed for a rather small range of optimal threshold values, whereas the MD-SiPM provides stable CTR after roughly 20 registered photoelectron timestamps in

  17. Ionizing secondary radiation generated by analog radiological and digital coronary cine angiographic equipment. Influence of external protection devices

    International Nuclear Information System (INIS)

    Ramirez N, Alfredo; Farias Ch, Eric; Silva J, Ana Maria; Leyton L, Fernando; Oyarzun C, Carlos; Ugalde P, Hector; Dussaillant, Gaston; Cumsille G, Angel

    2000-01-01

    Exposure to ionizing radiation is a know hazard of radiological procedures. Aim: to compare the emission of secondary ionizing radiation from two coronary angiographic equipments, one with digital and the other with analog image generation. To evaluate the effectiveness of external radiological protection devices. Material and methods: environmental and fluoroscopy generated radiation in the cephalic region of the patient was measured during diagnostic coronary angiographies. Ionizing radiation generated in anterior left oblique protection (ALO) and anterior right oblique protection (ARO) were measured with and without leaded protections. In 19 patients (group 1), a digital equipment was used and in 21 (group 2), an analog equipment. Results: header radiation for group 1 and 2 was 1194±337 and 364±222 μGray/h respectively (p≤0.001). During fluoroscopy and with leaded protection generated radiation for groups 1 and 2 was 612±947 and 70±61μGray/h respectively (p≤0.001). For ALO projection, generated for groups 1 and 2 was 105±47 and 71±192 μGray/h respectively (p≤0.001). During filming the radiation for ALO projection for groups 1 and 2 was 7252±9569 and 1671±2038 μGray/h respectively (p=0.03). Out of the protection zone, registered radiation during fluoroscopy for groups 1 and 2 was 2800±1741 and 1318±954 μGray/h respectively (p≤0.001); during filming, the figures were 15500±5840 and 18961±10599 μGray/h respectively (NS). Conclusions: digital radiological equipment has a lower level of ionizing radiation emission than the analog equipment

  18. Converting skeletal structures to quad dominant meshes

    DEFF Research Database (Denmark)

    Bærentzen, Jakob Andreas; Misztal, Marek Krzysztof; Welnicka, Katarzyna

    2012-01-01

    We propose the Skeleton to Quad-dominant polygonal Mesh algorithm (SQM), which converts skeletal structures to meshes composed entirely of polar and annular regions. Both types of regions have a regular structure where all faces are quads except for a single ring of triangles at the center of each...

  19. Integration of analog and digital instrumentation and control systems in hybrid control rooms

    International Nuclear Information System (INIS)

    2010-01-01

    he IAEA's activities in the area of nuclear power plant operating performance and life cycle management are aimed at increasing Member State capabilities in utilizing good engineering and management practices as developed and transferred by the IAEA. In particular, the IAEA supports the improvement of nuclear power plant performance, plant life management, training, power uprating, operational license renewal, and the modernization of instrumentation and control (I and C) systems of plants. The issue of the integration of analog and digital I and C systems in hybrid control rooms was suggested by the IAEA Technical Working Group on Nuclear Power Plant Control and Instrumentation (TWG-NPPCI) at its meetings in 2003 and 2005. The subject was then approved by the IAEA and included in its work programmes for 2006-2009. The purpose of this report is to help nuclear utilities in planning control room and other human system interface (HSI) changes, making appropriate use of modern technologies. These technologies would aid in managing ageing and obsolescence, and facilitate improvements in plant performance and safety. This report covers a broad spectrum of potential changes to the control room ranging from the replacement of a few obsolete components with newer digital devices to a fully computerized control room. New digital technologies offer significant opportunities to improve access to and presentation of information to the user, e.g. operators, maintenance staff and management. However, this technology should be used prudently. In some cases, modernization is undertaken to resolve ageing and obsolescence or to meet regulatory requirements for license renewal. The integration of new technologies during main control room (MCR) modernizations should be performed cautiously and all affected aspects of plant maintenance, and operation should be carefully considered, paying particular attention to the human factors elements of these aspects. This report describes a

  20. Digital Simulation of Closed Loop Zvs-Zcs Bidirectional Dc-Dc Converter for Fuel Cell and Battery Application

    Directory of Open Access Journals (Sweden)

    V. V. Subrahmanya Kumar Bhajana

    2010-08-01

    Full Text Available A closed loop ZVS-ZCS bidirectional dc-dc converter is modeled and appropriate digital simulations are provided. With the ZVS-ZCS concept, the MATLAB simulation results of application to a fuel cell and battery application have been obtained whenever the input voltage exceeds the given 24V, at that time the load voltage will change from 180V to 230V. But due to this usage the load is disturbed and there is instability in the model. Using closed loop the output voltage is stabilized.

  1. Optical Flow in a Smart Sensor Based on Hybrid Analog-Digital Architecture

    Science.gov (United States)

    Guzmán, Pablo; Díaz, Javier; Agís, Rodrigo; Ros, Eduardo

    2010-01-01

    The purpose of this study is to develop a motion sensor (delivering optical flow estimations) using a platform that includes the sensor itself, focal plane processing resources, and co-processing resources on a general purpose embedded processor. All this is implemented on a single device as a SoC (System-on-a-Chip). Optical flow is the 2-D projection into the camera plane of the 3-D motion information presented at the world scenario. This motion representation is widespread well-known and applied in the science community to solve a wide variety of problems. Most applications based on motion estimation require work in real-time; hence, this restriction must be taken into account. In this paper, we show an efficient approach to estimate the motion velocity vectors with an architecture based on a focal plane processor combined on-chip with a 32 bits NIOS II processor. Our approach relies on the simplification of the original optical flow model and its efficient implementation in a platform that combines an analog (focal-plane) and digital (NIOS II) processor. The system is fully functional and is organized in different stages where the early processing (focal plane) stage is mainly focus to pre-process the input image stream to reduce the computational cost in the post-processing (NIOS II) stage. We present the employed co-design techniques and analyze this novel architecture. We evaluate the system’s performance and accuracy with respect to the different proposed approaches described in the literature. We also discuss the advantages of the proposed approach as well as the degree of efficiency which can be obtained from the focal plane processing capabilities of the system. The final outcome is a low cost smart sensor for optical flow computation with real-time performance and reduced power consumption that can be used for very diverse application domains. PMID:22319283

  2. Optical Flow in a Smart Sensor Based on Hybrid Analog-Digital Architecture

    Directory of Open Access Journals (Sweden)

    Pablo Guzmán

    2010-03-01

    Full Text Available The purpose of this study is to develop a motion sensor (delivering optical flow estimations using a platform that includes the sensor itself, focal plane processing resources, and co-processing resources on a general purpose embedded processor. All this is implemented on a single device as a SoC (System-on-a-Chip. Optical flow is the 2-D projection into the camera plane of the 3-D motion information presented at the world scenario. This motion representation is widespread well-known and applied in the science community to solve a wide variety of problems. Most applications based on motion estimation require work in real-time; hence, this restriction must be taken into account. In this paper, we show an efficient approach to estimate the motion velocity vectors with an architecture based on a focal plane processor combined on-chip with a 32 bits NIOS II processor. Our approach relies on the simplification of the original optical flow model and its efficient implementation in a platform that combines an analog (focal-plane and digital (NIOS II processor. The system is fully functional and is organized in different stages where the early processing (focal plane stage is mainly focus to pre-process the input image stream to reduce the computational cost in the post-processing (NIOS II stage. We present the employed co-design techniques and analyze this novel architecture. We evaluate the system’s performance and accuracy with respect to the different proposed approaches described in the literature. We also discuss the advantages of the proposed approach as well as the degree of efficiency which can be obtained from the focal plane processing capabilities of the system. The final outcome is a low cost smart sensor for optical flow computation with real-time performance and reduced power consumption that can be used for very diverse application domains.

  3. Digital Control of a High Voltage (2.5 kV) Bidirectional Flyback DC-DC Converter for Driving a Capacitive Incremental Actuator

    DEFF Research Database (Denmark)

    Thummala, Prasanth; Maksimovic, Dragan; Zhang, Zhe

    2016-01-01

    This paper presents a digital control technique to achieve valley switching in a bidirectional flyback converter used to drive a dielectric electro-active polymer based capacitive incremental actuator. The paper also provides the design of a low input voltage (24 V) and variable high output voltage...... on the output high-voltage (HV) side. Experimental results verifying the bidirectional operation of a high voltage flyback converter are presented, using a 3 kV polypropylene film capacitor as the load. The energy loss distributions of the converter when 4 kV and 4.5 kV HV MOSFETs are used on HV side...

  4. Digital Fuzzy logic and PI control of phase-shifted full-bridge current-doubler converter

    DEFF Research Database (Denmark)

    Török, Lajos; Munk-Nielsen, Stig

    2011-01-01

    Simple digital fuzzy logic voltage control of a phaseshifted full-bridge (PSFB) converter is proposed in this article. A comparison of the fuzzy controller and the classical PI voltage controller is presented and their effects on the converter dynamics are analyzed. Simulation model of the conver...... of the converter was built in Matlab/Simulink using PLECS. A 600W PSFB convert was designed and built and the control strategies were implemented in a 16 bit fixed point dsPIC microcontroller. The advantages and disadvantages of using Fuzzy logic control are highlighted....

  5. Digital compensation of receiver clipping for DVB reception on low-power mobile

    NARCIS (Netherlands)

    Linnartz, J.P.M.G.; Rietman, R.

    2007-01-01

    Battery life-time is a critical issue for digital television (DVB) viewing on mobile phones. The number of quantization steps used in the analog-to-digital converter (ADC) is an important factor in the total power consumption of a DVB receiver. The OFDM signals require a large resolution of the ADC.

  6. Local digital control of power electronic converters in a dc microgrid based on a-priori derivation of switching surfaces

    Science.gov (United States)

    Banerjee, Bibaswan

    In power electronic basedmicrogrids, the computational requirements needed to implement an optimized online control strategy can be prohibitive. The work presented in this dissertation proposes a generalized method of derivation of geometric manifolds in a dc microgrid that is based on the a-priori computation of the optimal reactions and trajectories for classes of events in a dc microgrid. The proposed states are the stored energies in all the energy storage elements of the dc microgrid and power flowing into them. It is anticipated that calculating a large enough set of dissimilar transient scenarios will also span many scenarios not specifically used to develop the surface. These geometric manifolds will then be used as reference surfaces in any type of controller, such as a sliding mode hysteretic controller. The presence of switched power converters in microgrids involve different control actions for different system events. The control of the switch states of the converters is essential for steady state and transient operations. A digital memory look-up based controller that uses a hysteretic sliding mode control strategy is an effective technique to generate the proper switch states for the converters. An example dcmicrogrid with three dc-dc boost converters and resistive loads is considered for this work. The geometric manifolds are successfully generated for transient events, such as step changes in the loads and the sources. The surfaces corresponding to a specific case of step change in the loads are then used as reference surfaces in an EEPROM for experimentally validating the control strategy. The required switch states corresponding to this specific transient scenario are programmed in the EEPROM as a memory table. This controls the switching of the dc-dc boost converters and drives the system states to the reference manifold. In this work, it is shown that this strategy effectively controls the system for a transient condition such as step changes

  7. Progress on the development of a detector mounted analog and digital readout system for the ATLAS TRT

    CERN Document Server

    Baxter, C; Dressnandt, N; Gay, C; Lundberg, B; Munar, A; Mayers, G; Newcomer, M; Van Berg, R; Williams, H H

    2004-01-01

    The 430,000 element ATLAS Transition Radiation straw tube Tracker (TRT) is divided into a central barrel tracker consisting of 104,000 axially mounted straws and two radially arranged end caps on either side of the barrel with 160,000 straws each. To achieve a track position resolution of 140 mu m, the front end electronics must operate at a low (2fC) threshold with a time marking capability of ~1ns. Two ASICs, the ASDBLR and DTMROC provide the complete pipelined readout chain. Custom designed FBGA packages for the ASICs provide a small enough outline to be detector mounted and the extensive use of low level differential signals make mounting the analog packages on printed circuit boards directly opposite the 40 MHz digital chips feasible. The readout electronics for the barrel occupies a potentially important part of the active tracker volume and an aggressive effort has been made to make it as compact as possible. Utilizing a single board for both analog and digital ASICS a 0.1 cm /sup 3/ per channel volume...

  8. Seven channel gated charge to time converter

    Energy Technology Data Exchange (ETDEWEB)

    Stubbs, R J; Waddoup, W D [Durham Univ. (UK)

    1977-11-01

    By using a hybrid integrated circuit seven independent gated charge to time converters have been constructed in a single width NIM module. Gate widths from < approximately 10 ns to approximately 300 ns are possible with a resolution of 0.25 pC, linearity is better than +-1 pC over 2.5 decades of input signal height. Together with a multichannel scaling system described in the following paper one has a very powerful multichannel gated ADC system.

  9. State trajectories used to observe and control dc-to-dc converters

    Science.gov (United States)

    Burns, W. W., III; Wilson, T. G.

    1976-01-01

    State-plane analysis techniques are employed to study the voltage stepup energy-storage dc-to-dc converter. Within this framework, an example converter operating under the influence of a constant on-time and a constant frequency controller is examined. Qualitative insight gained through this approach is used to develop a conceptual free-running control law for the voltage stepup converter which can achieve steady-state operation in one on/off cycle of control. Digital computer simulation data are presented to illustrate and verify the theoretical discussions presented.

  10. MOCCASIN: converting MATLAB ODE models to SBML.

    Science.gov (United States)

    Gómez, Harold F; Hucka, Michael; Keating, Sarah M; Nudelman, German; Iber, Dagmar; Sealfon, Stuart C

    2016-06-15

    MATLAB is popular in biological research for creating and simulating models that use ordinary differential equations (ODEs). However, sharing or using these models outside of MATLAB is often problematic. A community standard such as Systems Biology Markup Language (SBML) can serve as a neutral exchange format, but translating models from MATLAB to SBML can be challenging-especially for legacy models not written with translation in mind. We developed MOCCASIN (Model ODE Converter for Creating Automated SBML INteroperability) to help. MOCCASIN can convert ODE-based MATLAB models of biochemical reaction networks into the SBML format. MOCCASIN is available under the terms of the LGPL 2.1 license (http://www.gnu.org/licenses/lgpl-2.1.html). Source code, binaries and test cases can be freely obtained from https://github.com/sbmlteam/moccasin : mhucka@caltech.edu More information is available at https://github.com/sbmlteam/moccasin. © The Author 2016. Published by Oxford University Press.

  11. Real-time digital x-ray subtraction imaging

    International Nuclear Information System (INIS)

    Mistretta, C.A.; Kruger, R.A.; Houk, T.L.

    1982-01-01

    A method of producing visible difference images derived from an x-ray image of an anatomical subject is described. X-rays are directed through the subject, and the image is converted into television fields comprising trains of analog video signals. The analog signals are converted into digital signals, which are then integrated over a predetermined time corresponding to several television fields. Difference video signals are produced by performing a subtraction between the ongoing video signals and the corresponding integrated signals, and are converted into visible television difference images representing changes in the x-ray image

  12. A Fast Time-to-Pulse Height Converter

    Energy Technology Data Exchange (ETDEWEB)

    Aspelund, O

    1962-12-15

    A fast time-to-pulse height converter representing a development of Green and Bell's gated beam converter is described. The converter is compatible with 2 input pulses in the stop channel and exhibits excellent linearity and time resolution properties. High stability and large output pulses are obtained by using a large time constant in the converting network.

  13. Comparison of incident air kerma (ki) of common digital and analog radiology procedures in Kohgiluyeh and Boyer-Ahmad province

    Science.gov (United States)

    Vafapour, Hassan; Salehi, Zaker

    2018-03-01

    Introduction: Although in many developed countries, Analog radiography (AR) is replaced with digital radiography (DR) but AR is still widely used in many countries included Iran. Therefore, dosimetrically assessment of delivered dose is very important to avoid unnecessary patient dose. Materials and Methods: In this study, all imaging centers in Kohgiluyeh and Boyer-Ahmad were selected. The initial information included the mean kVp and mAs used by the personnel to perform each radiological procedure were gathered through a questionnaire. Barracuda dosimeter was then used to measure Incident air kerma (ki). Data obtained from digital radiography (DR) and analogue radiography (AR) were then analyzed and compared to each other. Results: The mean incident air kerma (ki) for five radiological procedures (chest AP&Lat, Skull AP&Lat, Lumbar spine AP&Lat, Thoracic spine AP&Lat and Pelvis) in digital devices were 0.38&1.34, 2.1&1.94, 4.99&7.83, 4.18& 6.41 and 4.33 mGy and those for analogue devices were 0.7&1.28, 3.05&3.02, 7.25&9.9, 7.125&8.36 and 5.36 mGy, respectively. Discussion and Conclusion: The use of low kVp or high mAs is one of the reasons to increase the incident air kerma (ki) in analogue methods comparing to digital methods in all procedures except the chest (in Lateral view). Also the results, surprisingly, showed that in some of the analogue methods incident air kerma (ki) was less than digital methods which is most probably because of the auto-exposure conditions.

  14. Using Visual Analogies To Teach Introductory Statistical Concepts

    Directory of Open Access Journals (Sweden)

    Jessica S. Ancker

    2017-07-01

    Full Text Available Introductory statistical concepts are some of the most challenging to convey in quantitative literacy courses. Analogies supplemented by visual illustrations can be highly effective teaching tools. This literature review shows that to exploit the power of analogies, teachers must select analogies familiar to the audience, explicitly link the analog with the target concept, and avert misconceptions by explaining where the analogy fails. We provide guidance for instructors and a series of visual analogies for use in teaching medical and health statistics.

  15. Hybrid digital-analog video transmission in wireless multicast and multiple-input multiple-output system

    Science.gov (United States)

    Liu, Yu; Lin, Xiaocheng; Fan, Nianfei; Zhang, Lin

    2016-01-01

    Wireless video multicast has become one of the key technologies in wireless applications. But the main challenge of conventional wireless video multicast, i.e., the cliff effect, remains unsolved. To overcome the cliff effect, a hybrid digital-analog (HDA) video transmission framework based on SoftCast, which transmits the digital bitstream with the quantization residuals, is proposed. With an effective power allocation algorithm and appropriate parameter settings, the residual gains can be maximized; meanwhile, the digital bitstream can assure transmission of a basic video to the multicast receiver group. In the multiple-input multiple-output (MIMO) system, since nonuniform noise interference on different antennas can be regarded as the cliff effect problem, ParCast, which is a variation of SoftCast, is also applied to video transmission to solve it. The HDA scheme with corresponding power allocation algorithms is also applied to improve video performance. Simulations show that the proposed HDA scheme can overcome the cliff effect completely with the transmission of residuals. What is more, it outperforms the compared WSVC scheme by more than 2 dB when transmitting under the same bandwidth, and it can further improve performance by nearly 8 dB in MIMO when compared with the ParCast scheme.

  16. Converting serial networks to Ethernet communications

    Energy Technology Data Exchange (ETDEWEB)

    Rosado, Elroy [Freewave Technologies, Inc., Boulder, CO (United States). Latin America

    2008-07-01

    Many oil and gas producers and pipeline companies find themselves in an awkward position. They have invested millions of dollars in legacy serial communications systems and in most cases, millions more in older SCADA remote terminal units and electronic flow meters. There is a desire throughout most of the industry to convert these systems to Ethernet. This presentation will explore how Ethernet protocol offers advantages over the older serial communications in terms of peer to peer communication, faster polling cycles, and the ability to poll multiple devices at the same time. (author)

  17. Examples of digital simulation of AC-DC power converter with the Electromagnetic Transients Program

    International Nuclear Information System (INIS)

    Tanahashi, Shugo; Yamada, Shuichi; Mugishima, Mituo; Kitagawa, Shiro.

    1989-03-01

    This article gives a practical guidance for analysis of power converter circuits using the Electromagnetic Transients Program (EMTP). First how to use the program is shown with two simple examples; (1) a power supply with three-phase diode bridge and (2) a feedback system for current control. Then its application to more complicated system is shown with an example of a power supply for Compact Helical System (CHS), where a hybrid power supply with multi-phase diode and thyristor bridges, and two three-phase thyristor converters are driven by an AC generator. (author)

  18. Analog synthetic biology.

    Science.gov (United States)

    Sarpeshkar, R

    2014-03-28

    We analyse the pros and cons of analog versus digital computation in living cells. Our analysis is based on fundamental laws of noise in gene and protein expression, which set limits on the energy, time, space, molecular count and part-count resources needed to compute at a given level of precision. We conclude that analog computation is significantly more efficient in its use of resources than deterministic digital computation even at relatively high levels of precision in the cell. Based on this analysis, we conclude that synthetic biology must use analog, collective analog, probabilistic and hybrid analog-digital computational approaches; otherwise, even relatively simple synthetic computations in cells such as addition will exceed energy and molecular-count budgets. We present schematics for efficiently representing analog DNA-protein computation in cells. Analog electronic flow in subthreshold transistors and analog molecular flux in chemical reactions obey Boltzmann exponential laws of thermodynamics and are described by astoundingly similar logarithmic electrochemical potentials. Therefore, cytomorphic circuits can help to map circuit designs between electronic and biochemical domains. We review recent work that uses positive-feedback linearization circuits to architect wide-dynamic-range logarithmic analog computation in Escherichia coli using three transcription factors, nearly two orders of magnitude more efficient in parts than prior digital implementations.

  19. Data Acquisition and Digital Filtering for Infrasonic Records on Active Volcanoes

    Directory of Open Access Journals (Sweden)

    José Chilo

    2007-03-01

    Full Text Available This paper presents the design of a digital data acquisition system for volcanic infrasound records. The system includes four electret condenser element microphones, a QF4A512 programmable signal converter from Quickfilter Technologies and a MSP430 microcontroller from Texas Instruments. The signal output of every microphone is converted to digital via a 16-bit Analog to Digital Converter (ADC. To prevent errors in the conversion process, Anti-Aliasing Filters are employed prior to the ADC. Digital filtering is performed after the ADC using a Digital Signal Processor, which is implemented on the QF4A512. The four digital signals are summed to get only one signal. Data storing and digital wireless data transmission will be described in a future paper.

  20. High-Performance Data Converters

    DEFF Research Database (Denmark)

    Steensgaard-Madsen, Jesper

    -resolution internal D/A converters are required. Unit-element mismatch-shaping D/A converters are analyzed, and the concept of mismatch-shaping is generalized to include scaled-element D/A converters. Several types of scaled-element mismatch-shaping D/A converters are proposed. Simulations show that, when implemented...... in a standard CMOS technology, they can be designed to yield 100 dB performance at 10 times oversampling. The proposed scaled-element mismatch-shaping D/A converters are well suited for use as the feedback stage in oversampled delta-sigma quantizers. It is, however, not easy to make full use of their potential......-order difference of the output signal from the loop filter's first integrator stage. This technique avoids the need for accurate matching of analog and digital filters that characterizes the MASH topology, and it preserves the signal-band suppression of quantization errors. Simulations show that quantizers...

  1. Wideband Spectroscopy: The Design and Implementation of a 3 GHz, 2048 Channel Digital Spectrometer

    Science.gov (United States)

    Monroe, Ryan M.

    2011-01-01

    A state-of-the-art digital Fourier Transform spectrometer has been developed, with a combination of high bandwidth and fine resolution unavailable elsewhere. Analog signals consisting of radiation emitted by constituents in planetary atmospheres or galactic sources are downconverted and subsequently digitized by a pair of interleaved Analog-to-Digital Converters (ADC). This 6 Gsps (giga sample per second) digital representation of the analog signal is then processed through an FPGA-based streaming Fast Fourier Transform (FFT), the key development described below. Digital spectrometers have many advantages over previously used analog spectrometers, especially in terms of accuracy and resolution, both of which are particularly important for the type of scientific questions to be addressed with next-generation radiometers. The implementation, results and underlying math for this spectrometer, as well as potential for future extension to even higher bandwidth, resolution and channel orthogonality, needed to support proposed future advanced atmospheric science and radioastronomy, are discussed.

  2. Wideband Spectroscopy: The Design and Implementation of a 3 GHz Bandwidth, 8192 Channel, Polyphase Digital Spectrometer

    Science.gov (United States)

    Monroe, Ryan M.

    2011-01-01

    A family of state-of-the-art digital Fourier transform spectrometers has been developed, with a combination of high bandwidth and fine resolution unavailable elsewhere. Analog signals consisting of radiation emitted by constituents in planetary atmospheres or galactic sources are downconverted and subsequently digitized by a pair of interleaved Analog-to-Digital Converters, (ADC). This 6 Gsps (giga-sample per second) digital representation of the analog signal is then processed through an FPGA-based streaming Fast Fourier Transform (FFT), the key development described below. Digital spectrometers have many advantages over previously used analog spectrometers, especially in terms of accuracy and resolution, both of which are particularly important for the type of scientific questions to be addressed with next-generation radiometers. the implementation, results and underlying math for this spectrometer, as well as, potential for future extension to even higher bandwidth, resolution and channel orthogonality, needed to support proposed future advanced atmospheric science and radioastronomy, are discussed.

  3. Digital control card based on digital signal processor

    International Nuclear Information System (INIS)

    Hou Shigang; Yin Zhiguo; Xia Le

    2008-01-01

    A digital control card based on digital signal processor was developed. Two Freescale DSP-56303 processors were utilized to achieve 3 channels proportional- integral-differential regulations. The card offers high flexibility for 100 MeV cyclotron RF system development. It was used as feedback controller in low level radio frequency control prototype, with the feedback gain parameters continuously adjustable. By using high precision analog to digital converter with 500 kHz sampling rate, a regulation bandwidth of 20 kHz was achieved. (authors)

  4. 47 CFR 25.212 - Narrowband analog transmissions, digital transmissions, and video transmissions in the GSO Fixed...

    Science.gov (United States)

    2010-10-01

    ... 47 Telecommunication 2 2010-10-01 2010-10-01 false Narrowband analog transmissions, digital transmissions, and video transmissions in the GSO Fixed-Satellite Service. 25.212 Section 25.212 Telecommunication FEDERAL COMMUNICATIONS COMMISSION (CONTINUED) COMMON CARRIER SERVICES SATELLITE COMMUNICATIONS...

  5. Digital media labs in libraries

    CERN Document Server

    Goodman, Amanda L

    2014-01-01

    Families share stories with each other and veterans reconnect with their comrades, while teens edit music videos and then upload them to the web: all this and more can happen in the digital media lab (DML), a gathering of equipment with which people create digital content or convert content that is in analog formats. Enabling community members to create digital content was identified by The Edge Initiative, a national coalition of leading library and local government organizations, as a library technology benchmark. Surveying academic and public libraries in a variety of settings and sharing a

  6. Digital Libraries and the Problem of Purpose [and] On DigiPaper and the Dissemination of Electronic Documents [and] DFAS: The Distributed Finding Aid Search System [and] Best Practices for Digital Archiving: An Information Life Cycle Approach [and] Mapping and Converting Essential Federal Geographic Data Committee (FGDC) Metadata into MARC21 and Dublin Core: Towards an Alternative to the FGDC Clearinghouse [and] Evaluating Website Modifications at the National Library of Medicine through Search Log analysis.

    Science.gov (United States)

    Levy, David M.; Huttenlocher, Dan; Moll, Angela; Smith, MacKenzie; Hodge, Gail M.; Chandler, Adam; Foley, Dan; Hafez, Alaaeldin M.; Redalen, Aaron; Miller, Naomi

    2000-01-01

    Includes six articles focusing on the purpose of digital public libraries; encoding electronic documents through compression techniques; a distributed finding aid server; digital archiving practices in the framework of information life cycle management; converting metadata into MARC format and Dublin Core formats; and evaluating Web sites through…

  7. Protocol converter for serial communication between digital rectifier controllers and a power plant SCADA system

    Directory of Open Access Journals (Sweden)

    Vukić Vladimir Đ.

    2016-01-01

    Full Text Available The paper describes the protocol converter INT-485-MBRTU, developed for serial communication between the thyristor rectifier (based on the proprietary protocol "INT-CPD-05", according to standard RS-485 and the SCADA system (based on protocol "Modbus RTU", of the same standard in the thermal power plant "Nikola Tesla B1". Elementary data on industrial communication protocols and communication gateways were provided. The basic technical characteristics of the "Omron" programmable logic controller CJ series were described, as well as the developed device INT-485-MBRTU. Protocol converters with two versions of communication software were tested, differing only in one control word, intended for a forced successive change of communication sequences, in opposite to automatic sequence relieve. The device iNT-485-MBRTU, with the program for forced successive change of communication sequences, demonstrated the reliability of data transfer of 100 %, in a sample of approximately 480 messages. For nearly the same sample, the same protocol converter, with a version of the program without any type of message identifiers, transferred less than 60 % of the foreseen data. During multiple sixty-hour tests, the reliability of data transfer of at least 99.9979% was recorded, in 100% of the analysed cases, and for a sample of nearly 96,000 pairs of the send and receive messages. We analysed the results and estimated the additional possibilities for application of the INT-485-MBRTU protocol converter.

  8. Transitioning to digital radiography

    Energy Technology Data Exchange (ETDEWEB)

    Miranda, F., E-mail: Francisco.Miranda@pwc.ca [Pratt & Whitney Canada, Longueuil, Quebec (Canada)

    2015-09-15

    This article provides insight on the technical and business considerations necessary to implement or to transition to digital radiography Continued refinements in digital radiography technology have resulted in significant improvements in image quality and detectability of indications. These improvements have resulted in the acceptance of the technology by users and aerospace primes for final product inspection and disposition. Digital radiography has also been identified as an interesting cost reduction initiative with the potential of providing gains in productivity through increased throughput and decreased inspection lead-times and resulting costs. (author)

  9. Data Converter for Multistandard Mobile Phones

    DEFF Research Database (Denmark)

    Yurttas, Aziz; Bruun, Erik; Jensen, Rasmus Glarborg

    2004-01-01

    This paper describes an analog to digital converter (ADC) for mobile communication systems using a direct down conversion architecture. The ADC can be programmed to meet the requirements of different communication standards, including GSM (Global System for Mobile communication) and WCDMA (Wideband...... Code Division Multiple Access). The ADC is realized with a pipeline ADC architecture for WCDMA and a Sigma-Delta architecture for GSM. In order to have an optimized area and power consumption, the basic building blocks (opamps) of the converters are shared between the two converter architectures....... The entire ADC consumes about 5.5 mW and occupies an active area of about 0.36 mm(2). A test circuit has been developed and fabricated and measurements show that both the required programmability and the required performance can be obtained using the proposed configurations....

  10. Improvement of the characterization of ultrasonic data by means of digital signal processing

    International Nuclear Information System (INIS)

    Bieth, M.; Romy, D.; Weigel, D.

    1985-01-01

    The digital signal processing method for averaging using minima developed by Framatome allows to improve signal-to-noise ratio up to 7 dB during ultrasonic testing of cast stainless steel structures (primary pipes of PWR power plants). Application of digital signal processing to industrial testing conditions requires the availability of a fast analog-digital converter capable of real time processings which has been developed by CGR [fr

  11. A Design Methodology for Power-efficient Continuous-time Sigma-Delta A/D Converters

    DEFF Research Database (Denmark)

    Nielsen, Jannik Hammel; Bruun, Erik

    2003-01-01

    In this paper we present a design methodology for optimizing the power consumption of continuous-time (CT) ΣΔ A/D converters. A method for performance prediction for ΣΔ A/D converters is presented. Estimation of analog and digital power consumption is derived and employed to predict the most power...... bits performance. Expected power consumption for the prototype is approx. 170 μW....

  12. Mechanical vibration to electrical energy converter

    Science.gov (United States)

    Kellogg, Rick Allen [Tijeras, NM; Brotz, Jay Kristoffer [Albuquerque, NM

    2009-03-03

    Electromechanical devices that generate an electrical signal in response to an external source of mechanical vibrations can operate as a sensor of vibrations and as an energy harvester for converting mechanical vibration to electrical energy. The devices incorporate a magnet that is movable through a gap in a ferromagnetic circuit, wherein a coil is wound around a portion of the ferromagnetic circuit. A flexible coupling is used to attach the magnet to a frame for providing alignment of the magnet as it moves or oscillates through the gap in the ferromagnetic circuit. The motion of the magnet can be constrained to occur within a substantially linear range of magnetostatic force that develops due to the motion of the magnet. The devices can have ferromagnetic circuits with multiple arms, an array of magnets having alternating polarity and, encompass micro-electromechanical (MEM) devices.

  13. Digital positron lifetime: the influence of noise

    International Nuclear Information System (INIS)

    Krille, Arnold; Krause-Rehberg, Reinhard; Anwand, Wolfgang

    2011-01-01

    In contrast to the world around where everything seems to go digital as soon as possible, positron lifetime spectrometers are kind of a 'last sanctuary' for analog measurements. Only a few of the newer spectrometers use the analog-digital-converters directly after the photomultipliers and extract the timing information via computer. Judging from their results it seems as if the current available converters and the timing mathematics are only as good as the conventional analog setup in the timing resolution. As it is decided that EPOS [1] will use digital positron lifetime, we try to find some reasons for limited timing resolution by simulating anode pulses from the photomultipliers and measuring the FWHM. We create pulses similar to current state-of-the-art 4GS/s digitizers but can control the level of noise and the bit-depth independently. We found that especially the noise (that would come from the analog electronics in/before the converters) has a great influence on the timing resolution. Also we try to use lowpass filtering to reduce that influence with great success.

  14. Digital positron lifetime: the influence of noise

    Energy Technology Data Exchange (ETDEWEB)

    Krille, Arnold; Krause-Rehberg, Reinhard [Department of Physics, Martin-Luther-University Halle-Wittenberg, 06099 Halle (Germany); Anwand, Wolfgang, E-mail: arnold.krille@physik.uni-halle.de [Institute of Ion Beam Physics, Research Center Dresden-Rossendorf, 01314 Dresden (Germany)

    2011-01-10

    In contrast to the world around where everything seems to go digital as soon as possible, positron lifetime spectrometers are kind of a 'last sanctuary' for analog measurements. Only a few of the newer spectrometers use the analog-digital-converters directly after the photomultipliers and extract the timing information via computer. Judging from their results it seems as if the current available converters and the timing mathematics are only as good as the conventional analog setup in the timing resolution. As it is decided that EPOS [1] will use digital positron lifetime, we try to find some reasons for limited timing resolution by simulating anode pulses from the photomultipliers and measuring the FWHM. We create pulses similar to current state-of-the-art 4GS/s digitizers but can control the level of noise and the bit-depth independently. We found that especially the noise (that would come from the analog electronics in/before the converters) has a great influence on the timing resolution. Also we try to use lowpass filtering to reduce that influence with great success.

  15. Robust sigma delta converters : and their application in low-power highly-digitized flexible receivers

    NARCIS (Netherlands)

    Veldhoven, van R.H.M.; Roermund, van A.H.M.

    2011-01-01

    Sigma Delta converters are a very popular choice for the A/D converter in multi-standard, mobile and cellular receivers. Key A/D converter specifications are high dynamic range, robustness, scalability, low-power and low EMI. Robust Sigma Delta Converters presents a requirement derivation of a Sigma

  16. Processing deficits in monitoring analog and digital displays: Implications for attentional theory and mental-state estimation research

    Science.gov (United States)

    Payne, David G.; Gunther, Virginia A. L.

    1988-01-01

    Subjects performed short term memory tasks, involving both spatial and verbal components, and a visual monitoring task involving either analog or digital display formats. These two tasks (memory vs. monitoring) were performed both singly and in conjunction. Contrary to expectations derived from multiple resource theories of attentional processes, there was no evidence that when the two tasks involved the same cognitive codes (i.e., either both spatial or both verbal/linguistics) there was more of a dual task performance decrement than when the two tasks employed different cognitive codes/processes. These results are discussed in terms of their implications for theories of attentional processes and also for research in mental state estimation.

  17. CMOS sigma-delta converters practical design guide

    CERN Document Server

    De la Rosa, Jose M

    2013-01-01

    A comprehensive overview of Sigma-Delta Analog-to-Digital Converters (ADCs) and a practical guide to their design in nano-scale CMOS for optimal performance. This book presents a systematic and comprehensive compilation of sigma-delta converter operating principles, the new advances in architectures and circuits, design methodologies and practical considerations - going from system-level specifications to silicon integration, packaging and measurements, with emphasis on nanometer CMOS implementation. The book emphasizes practical design issues - from high-level behavioural modelling i

  18. Analog circuit design

    CERN Document Server

    Dobkin, Bob

    2012-01-01

    Analog circuit and system design today is more essential than ever before. With the growth of digital systems, wireless communications, complex industrial and automotive systems, designers are being challenged to develop sophisticated analog solutions. This comprehensive source book of circuit design solutions aids engineers with elegant and practical design techniques that focus on common analog challenges. The book's in-depth application examples provide insight into circuit design and application solutions that you can apply in today's demanding designs. <

  19. Matrix converter applied to energy saving for street lighting systems

    OpenAIRE

    Román Lumbreras, Manuel; Velasco Quesada, Guillermo; Conesa Roca, Alfons

    2010-01-01

    This work presents a three-phase AC-AC converter, with independent phase control, based on matrix-converter structure. This converter is applied to electrical energy saving on the public lighting systems by means of regulation and control of the voltage applied to the lamps. The developed converter represents a technological improvement with respect to the traditional systems based on an autotransformer: it reduces system cost and volume, and increases lamps lifetime.

  20. High Speed Digitizer for Remote Sensing, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Alphacore, Inc. proposes to design and characterize a 24Gsps (giga-samples per-second), 6-bit, low-power, and low-cost analog-to-digital converter (ADC) for use in a...

  1. Digitization errors using digital charge division positionsensitive detectors

    International Nuclear Information System (INIS)

    Berliner, R.; Mildner, D.F.R.; Pringle, O.A.

    1981-01-01

    The data acquisition speed and electronic stability of a charge division position-sensitive detector may be improved by using digital signal processing with a table look-up high speed multiply to form the charge division quotient. This digitization process introduces a positional quantization difficulty which reduces the detector position sensitivity. The degree of the digitization error is dependent on the pulse height spectrum of the detector and on the resolution or dynamic range of the system analog-to-digital converters. The effects have been investigated analytically and by computer simulation. The optimum algorithm for position sensing determination using 8-bit digitization and arithmetic has a digitization error of less than 1%. (orig.)

  2. Noise and Spurious Tones Management Techniques for Multi-GHz RF-CMOS Frequency Synthesizers Operating in Large Mixed Analog-Digital SOCs

    Directory of Open Access Journals (Sweden)

    Maxim Adrian

    2006-01-01

    Full Text Available This paper presents circuit techniques and power supply partitioning, filtering, and regulation methods aimed at reducing the phase noise and spurious tones in frequency synthesizers operating in large mixed analog-digital system-on-chip (SOC. The different noise and spur coupling mechanisms are presented together with solutions to minimize their impact on the overall PLL phase noise performance. Challenges specific to deep-submicron CMOS integration of multi-GHz PLLs are revealed, while new architectures that address these issues are presented. Layout techniques that help reducing the parasitic noise and spur coupling between digital and analog blocks are described. Combining system-level and circuit-level low noise design methods, low phase noise frequency synthesizers were achieved which are compatible with the demanding nowadays wireless communication standards.

  3. Possible applications of the sigma delta digitizer in particle physics

    International Nuclear Information System (INIS)

    Hallgren, B.

    1991-01-01

    The sigma delta (ΣΔ) principle is an analog-to-digital conversion technique based on high-frequency sampling and low-pass filtering of the quantization noise. Resolution in time is exchanged for that in amplitude so as to avoid the difficulty of implementing complex precision analog circuits, in favour of digital circuits. The approach is attractive because it will make it possible to integrate complete channels of high resolution analog-to-digital converters and time digitizers in submicron digital VLSI technologies. Advantage is taken of the fact that the state-of-the-art VLSI is better suited for providing fast digital circuits than for providing precise analog circuits. This article describes the principle and the performance of the ideal ΣΔ digitizer. The design and measurements of a new 10 MHz prototype circuit of a second-order ΣΔ is presented to show the high speed operation of such a circuit. The expected performance of a CMOS test design using the same principles is discussed. Digital filters, useful for particle physics, are introduced. A comparison to other digitizing techniques is made and the potential applications of the ΣΔ digitizer in particle physics are outlined. (orig.)

  4. Design of High-Voltage Switch-Mode Power Amplifier Based on Digital-Controlled Hybrid Multilevel Converter

    Directory of Open Access Journals (Sweden)

    Yanbin Hou

    2016-01-01

    Full Text Available Compared with conventional Class-A, Class-B, and Class-AB amplifiers, Class-D amplifier, also known as switching amplifier, employs pulse width modulation (PWM technology and solid-state switching devices, capable of achieving much higher efficiency. However, PWM-based switching amplifier is usually designed for low-voltage application, offering a maximum output voltage of several hundred Volts. Therefore, a step-up transformer is indispensably adopted in PWM-based Class-D amplifier to produce high-voltage output. In this paper, a switching amplifier without step-up transformer is developed based on digital pulse step modulation (PSM and hybrid multilevel converter. Under the control of input signal, cascaded power converters with separate DC sources operate in PSM switch mode to directly generate high-voltage and high-power output. The relevant topological structure, operating principle, and design scheme are introduced. Finally, a prototype system is built, which can provide power up to 1400 Watts and peak voltage up to ±1700 Volts. And the performance, including efficiency, linearity, and distortion, is evaluated by experimental tests.

  5. New drive converter and digital control for the pulsed power supply system of ASDEX Upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Käsemann, Claus-Peter, E-mail: c.p.kaesemann@ipp.mpg.de [Max Planck Institute for Plasma Physics, Boltzmannstraße 2, 85748 Garching (Germany); Jacob, Christian; Nguyen, Hong Ha; Stobbe, Ferdinand; Mayer, Alois [Max Planck Institute for Plasma Physics, Boltzmannstraße 2, 85748 Garching (Germany); Sachs, Edgar; Klein, Reiner [Siemens AG, Industrial Automation Systems, Gleiwitzer Straße 555, 90475 Nürnberg (Germany)

    2015-10-15

    Highlights: • IGBT converter system with integrated control. • Proven technology reduces time and budget. • Flexibility to be integrated into a 35 years old installation. • Stable control algorithms for static and dynamic speed control. • Possibilities for active and reactive power management. - Abstract: Safety and reliability are major issues for the ASDEX Upgrade (AUG) pulsed power supply systems. To avoid long downtimes during an experimental campaign, fault-prone components have to be identified and treated early. This becomes even more important due to the AUG participation in the EUROfusion Medium Sized Tokamak (MST) program. Operating equipment which is up to 40 years old adds additional complications. This contribution describes one such example where a 35 year old flywheel generator at AUG was identified as fault-prone and pre-emptively upgraded with a new drive converter with integrated control. Most challenging was to adapt a modern converter, originally designed for wind turbines, toward a drive system for a flywheel-motor-generator system. To identify the layout of the controller and the control parameters, accurate modeling and comprehensive simulations were performed. This effort paid off during commissioning and measuring results verified the calculated design values. Finally, the system shows good performance during AUG plasma experiments.

  6. Design and implementation of a reconfigurable mixed-signal SoC based on field programmable analog arrays

    Science.gov (United States)

    Liu, Lintao; Gao, Yuhan; Deng, Jun

    2017-11-01

    This work presents a reconfigurable mixed-signal system-on-chip (SoC), which integrates switched-capacitor-based field programmable analog arrays (FPAA), analog-to-digital converter (ADC), digital-to-analog converter, digital down converter , digital up converter, 32-bit reduced instruction-set computer central processing unit (CPU) and other digital IPs on a single chip with 0.18 μm CMOS technology. The FPAA intellectual property could be reconfigured as different function circuits, such as gain amplifier, divider, sine generator, and so on. This single-chip integrated mixed-signal system is a complete modern signal processing system, occupying a die area of 7 × 8 mm 2 and consuming 719 mW with a clock frequency of 150 MHz for CPU and 200 MHz for ADC/DAC. This SoC chip can help customers to shorten design cycles, save board area, reduce the system power consumption and depress the system integration risk, which would afford a big prospect of application for wireless communication. Project supported by the National High Technology and Development Program of China (No. 2012AA012303).

  7. Image processing to optimize wave energy converters

    Science.gov (United States)

    Bailey, Kyle Marc-Anthony

    The world is turning to renewable energies as a means of ensuring the planet's future and well-being. There have been a few attempts in the past to utilize wave power as a means of generating electricity through the use of Wave Energy Converters (WEC), but only recently are they becoming a focal point in the renewable energy field. Over the past few years there has been a global drive to advance the efficiency of WEC. Placing a mechanical device either onshore or offshore that captures the energy within ocean surface waves to drive a mechanical device is how wave power is produced. This paper seeks to provide a novel and innovative way to estimate ocean wave frequency through the use of image processing. This will be achieved by applying a complex modulated lapped orthogonal transform filter bank to satellite images of ocean waves. The complex modulated lapped orthogonal transform filterbank provides an equal subband decomposition of the Nyquist bounded discrete time Fourier Transform spectrum. The maximum energy of the 2D complex modulated lapped transform subband is used to determine the horizontal and vertical frequency, which subsequently can be used to determine the wave frequency in the direction of the WEC by a simple trigonometric scaling. The robustness of the proposed method is provided by the applications to simulated and real satellite images where the frequency is known.

  8. Three new DC-to-DC Single-Switch Converters

    Directory of Open Access Journals (Sweden)

    Barry W. Williams

    2017-06-01

    Full Text Available This paper presents a new family of three previously unidentified dc-to-dc converters, buck, boost, and buck-boost voltage-transfer-function topologies, which offer advantageous transformer coupling features and low capacitor dc voltage stressing. The three single-switch, single-diode, converters offer the same features as basic dc-to-dc converters, such as the buck function with continuous output current and the boost function with continuous input current. Converter time-domain simulations and experimental results (including transformer coupling support and extol the dc-to-dc converter concepts and analysis presented.

  9. Convertible shielding to ceramic breeding blanket

    International Nuclear Information System (INIS)

    Furuya, Kazuyuki; Kurasawa, Toshimasa; Sato, Satoshi; Nakahira, Masataka; Togami, Ikuhide; Hashimoto, Toshiyuki; Takatsu, Hideyuki; Kuroda, Toshimasa.

    1995-05-01

    Four concepts have been studied for the ITER convertible blanket: 1)Layered concept 2)BIT(Breeder-Inside-Tube)concept 3)BOT(Breeder-Out of-Tube)concept 4)BOT/mixed concept. All concepts use ceramic breeder and beryllium neutron multiplier, both in the shape of small spherical pebbles, 316SS structure, and H 2 O coolant (inlet/outlet temperatures : 100/150degC, pressure : 2 MPa). During the BPP, only beryllium pebbles (the primary pebble in case of BOT/mixed concept) are filled in the blanket for shielding purpose. Then, before the EPP operation, breeder pebbles will be additionally inserted into the blanket. Among possible conversion methods, wet method by liquid flow seems expecting for high and homogeneous pebble packing. Preliminary 1-D neutronics calculation shows that the BOT/mixed concept has the highest breeding and shielding performance. However, final selection should be done by R and D's and more detail investigation on blanket characteristics and fabricability. Required R and D's are also listed. With these efforts, the convertible blanket can be developed. However, the following should be noted. Though many of above R and D's are also necessary even for non-convertible blanket, R and D's on convertibility will be one of the most difficult parts and need significant efforts. Besides the installation of convertible blanket with required structures and lines for conversion will make the ITER basic machine more complicated. (author)

  10. What's Wrong with Copyright: Educator Strategies for Dealing with Analog Copyright Law in a Digital World

    Science.gov (United States)

    McGrail, J. Patrick; McGrail, Ewa

    2009-01-01

    Current copyright law was formulated before the digital technology became widely available and well before Web 2.0 changed the way that information is created and shared. J. Patrick McGrail and Ewa McGrail argue that copyright law has failed to keep up with the social and legal changes that have accompanied the technological developments of the…

  11. Editoração científica: as duas faces - analógica e digital Scientific publishing: the two faces - analogic and digital

    Directory of Open Access Journals (Sweden)

    Carlos Teixeira Brandt

    2004-12-01

    Full Text Available A Associação Brasileira de Editores Científicos (ABEC promoveu, em setembro de 2004, o III Workshop de Editores Científicos em Recife. O enfoque principal foi sobre a forma de divulgação do conhecimento científico: analógico ou digital. Contudo, foram também discutidas as formas de financiamento da produção e divulgação desse conhecimento. A importância maior na produção do conhecimento esteve associada aos institutos de pesquisa, as universidades e as sociedades científicas. Tem sido observada uma tendência ao aumento no gerenciamento eletrônico da editoração e a informatização da divulgação; sobretudo pelo menor custo e maior facilidade; se os recursos humanos das ciências da informação estiverem disponíveis, todavia, a convivência da formatação analógica e digital é esperada por bastante tempo. Foi apresentada a idéia de um sítio eletrônico dos editores, com certificação digital, para que os autores da produção do conhecimento pudessem, com mais facilidade enviar os seus manuscritos. A seleção pelo corpo editorial das revistas desses manuscritos e a participação do corpo editorial na orientação da elaboração dos mesmos foi enfatizada. Essa atitude poderia aumentar a publicação do conhecimento produzido, particularmente daquele advindo dos programas de pós-graduação das universidades. Durante todo o evento ficou evidente a essencialidade da produção do conhecimento como elemento básico de evolução da própria sociedade humana.The Brazilian Association for the Scientific Editors (ABEC promoted in September, 2004, the III Workshop for the Scientific Editors in Recife, Pernambuco - Brazil. The main focus was in the way that the scientific knowledge needs to be spread out : analogical or digital. However, the financial support for the production and the divulgation of this knowledge was also discussed. In the production it was agreed that it is made in the research institutes; universities

  12. A Mixed Analog-Digital Radiation Hard Technology for High Energy Physics Electronics: DMILL~(Durci~Mixte~sur~Isolant~Logico-Lineaire)

    CERN Multimedia

    Lugiez, F; Leray, J; Rouger, M; Fourches, N T; Musseau, O; Potheau, R

    2002-01-01

    %RD29 %title\\\\ \\\\Physics experiments under preparation with the future LHC require a fast, low noise, very rad-hard (>10 Mrad and >10$^{14}$ neutron/cm$^{2}$), mixed analog-digital microelectronics VLSI technology.\\\\ \\\\The DMILL microelectronics technology (RD29) was developed between 1990 and 1995 by a Consortium gathering the CEA and the firm Thomson-TCS, with the collaboration of IN2P3. The goal of the DMILL program, which is now completed, was to provide the High Energy Physics community, space industry, nuclear industry, and other applications, with an industrial very rad-hard mixed analog-digital microelectronics technology.\\\\ \\\\DMILL integrates mixed analog-digital very rad-hard (>10 Mrad and >10$^{14}$ neutron/cm$^{2}$) vertical bipolar, 0.8 $\\mu$m CMOS and 1.2 $\\mu$m PJFET transistors. Its SOI substrate and its dielectric trenches strongly reduce SEU sensitivity and completely eliminate any possibility of latch-up. Its four transistors are optimized to obtain low-noise features. DMILL also integrates...

  13. Power quality improvement by using multi-pulse AC-DC converters for DC drives: Modeling, simulation and its digital implementation

    Directory of Open Access Journals (Sweden)

    Mohd Tariq

    2014-12-01

    Full Text Available The paper presents the modeling, simulation and digital implementation of power quality improvement of DC drives by using multi pulse AC–DC converter. As it is a well-known fact that power quality determines the fitness of electrical power to consumer devices, hence an effort has been made to improve power quality in this work. Simulation and digital implementation with the help of MATLAB/Simulink has been done and results obtained are discussed in detail to verify the theoretical results. The multipulse converter was connected with DC drives and was run at no load condition to find out the transient and steady state performances. FFT analysis has been performed and Total Harmonic Distortion (THD results obtained at different pulses are shown here.

  14. High-Precision Hysteresis Sensing of the Quartz Crystal Inductance-to-Frequency Converter.

    Science.gov (United States)

    Matko, Vojko; Milanović, Miro

    2016-06-28

    A new method for the automated measurement of the hysteresis of the temperature-compensated inductance-to-frequency converter with a single quartz crystal is proposed. The new idea behind this method is a converter with two programmable analog switches enabling the automated measurement of the converter hysteresis, as well as the temperature compensation of the quartz crystal and any other circuit element. Also used is the programmable timing control device that allows the selection of different oscillating frequencies. In the proposed programmable method two different inductances connected in series to the quartz crystal are switched in a short time sequence, compensating the crystal's natural temperature characteristics (in the temperature range between 0 and 50 °C). The procedure allows for the measurement of the converter hysteresis at various values of capacitance connected in parallel with the quartz crystal for the converter sensitivity setting at selected inductance. It, furthermore, enables the measurement of hysteresis at various values of inductance at selected parallel capacitance (sensitivity) connected to the quartz crystal. The article shows that the proposed hysteresis measurement of the converter, which converts the inductance in the range between 95 and 100 μH to a frequency in the range between 1 and 200 kHz, has only 7 × 10(-13) frequency instability (during the temperature change between 0 and 50 °C) with a maximum 1 × 10(-11) hysteresis frequency difference.

  15. High-Precision Hysteresis Sensing of the Quartz Crystal Inductance-to-Frequency Converter

    Directory of Open Access Journals (Sweden)

    Vojko Matko

    2016-06-01

    Full Text Available A new method for the automated measurement of the hysteresis of the temperature-compensated inductance-to-frequency converter with a single quartz crystal is proposed. The new idea behind this method is a converter with two programmable analog switches enabling the automated measurement of the converter hysteresis, as well as the temperature compensation of the quartz crystal and any other circuit element. Also used is the programmable timing control device that allows the selection of different oscillating frequencies. In the proposed programmable method two different inductances connected in series to the quartz crystal are switched in a short time sequence, compensating the crystal’s natural temperature characteristics (in the temperature range between 0 and 50 °C. The procedure allows for the measurement of the converter hysteresis at various values of capacitance connected in parallel with the quartz crystal for the converter sensitivity setting at selected inductance. It, furthermore, enables the measurement of hysteresis at various values of inductance at selected parallel capacitance (sensitivity connected to the quartz crystal. The article shows that the proposed hysteresis measurement of the converter, which converts the inductance in the range between 95 and 100 μH to a frequency in the range between 1 and 200 kHz, has only 7 × 10−13 frequency instability (during the temperature change between 0 and 50 °C with a maximum 1 × 10−11 hysteresis frequency difference.

  16. Digital I and C systems in nuclear power plants. Risk-screening of environmental stressors and a comparison of hardware unavailability with an existing analog system

    International Nuclear Information System (INIS)

    Hassan, M.; Vesely, W.E.

    1998-01-01

    In this report, we present a screening study to identify environmental stressors for digital instrumentation and control (I ampersand C) systems in a nuclear power plant (NPP) which can be potentially risk-significant, and compare the hardware unavailability of such a system with that of its existing analog counterpart. The stressors evaluated are temperature, humidity, vibration, radiation, electro-magnetic interference (EMI), and smoke. The results of risk-screening for an example plant, subject to some bounding assumptions and based on relative changes in plant risk (core damage frequency impacts of the stressors), indicate that humidity, EMI from lightning, and smoke can be potentially risk-significant. Risk from other sources of EMI could not be evaluated for a lack of data. Risk from temperature appears to be insignificant as that from the assumed levels of vibrations. A comparison of the hardware unavailability of the existing analog Safety Injection Actuation System (SIAS) in the example plant with that of an assumed digital upgrade of the system indicates that system unavailability may be more sensitive to the level of redundancy in elements of the digital system than to the environmental and operational variations involved. The findings of this study can be used to focus activities relating to the regulatory basis for digital I ampersand C upgrades in NPPs, including identification of dominant stressors, data-gathering, equipment qualification, and requirements to limit the effects of environmental stressors. 30 refs., 8 figs., 26 tabs

  17. An iconic, analogical approach to grammaticalization

    NARCIS (Netherlands)

    Fischer, O.; Conradie, C.J.; Johl, R.; Beukes, M.; Fischer, O.; Ljungberg, C.

    2010-01-01

    This paper addresses a number of problems connected with the ‘apparatus’ used in grammaticalization theory. It will be argued that we get a better grip on what happens in processes of grammaticalization (and its ‘opposite’, lexicalization) if the process is viewed in terms of analogical processes,

  18. Current Controller for Multi-level Front-end Converter and Its Digital Implementation Considerations on Three-level Flying Capacitor Topology

    Science.gov (United States)

    Tekwani, P. N.; Shah, M. T.

    2017-10-01

    This paper presents behaviour analysis and digital implementation of current error space phasor based hysteresis controller applied to three-phase three-level flying capacitor converter as front-end topology. The controller is self-adaptive in nature, and takes the converter from three-level to two-level mode of operation and vice versa, following various trajectories of sector change with the change in reference dc-link voltage demanded by the load. It keeps current error space phasor within the prescribed hexagonal boundary. During the contingencies, the proposed controller takes the converter in over modulation mode to meet the load demand, and once the need is satisfied, controller brings back the converter in normal operating range. Simulation results are presented to validate behaviour of controller to meet the said contingencies. Unity power factor is assured by proposed controller with low current harmonic distortion satisfying limits prescribed in IEEE 519-2014. Proposed controller is implemented using TMS320LF2407 16-bit fixed-point digital signal processor. Detailed analysis of numerical format to avoid overflow of sensed variables in processor, and per-unit model implementation in software are discussed and hardware results are presented at various stages of signal conditioning to validate the experimental setup. Control logic for the generation of reference currents is implemented in TMS320LF2407A using assembly language and experimental results are also presented for the same.

  19. Analog circuit design a tutorial guide to applications and solutions

    CERN Document Server

    Williams, Jim

    2011-01-01

    * Covers the fundamentals of linear/analog circuit and system design to guide engineers with their design challenges. * Based on the Application Notes of Linear Technology, the foremost designer of high performance analog products, readers will gain practical insights into design techniques and practice. * Broad range of topics, including power management tutorials, switching regulator design, linear regulator design, data conversion, signal conditioning, and high frequency/RF design. * Contributors include the leading lights in analog design, Robert Dobkin, Jim Willia

  20. Digital subtraction angiography

    International Nuclear Information System (INIS)

    Neuwirth, J. Jr.; Bohutova, J.

    1987-01-01

    The quality of radiodiagnostic methods to a great extent depends on the quality of the resulting image. The basic technical principles are summed up of the different parts of digital subtraction angiography apparatus and of methods of improving the image. The instrument is based on a videochain consisting of an X-ray tube, an intensifier of the radiographic image, optical parts, a video camera, an analog-to-digital converter and a computer. The main advantage of the digitally processed image is the possibility of optimizing the image into a form which will contain the biggest amount of diagnostically valuable information. Described are the mathematical operations for improving the digital image: spatial filtration, pixel shift, time filtration, image integration, time interval differentation and matched filtering. (M.D.). 8 refs., 3 figs

  1. Future approaches to digital systems

    International Nuclear Information System (INIS)

    Woodrough, R.E.; Beckmann, E.; Jenkins, D.; Belcher, D.

    1984-01-01

    The introduction of the first digital imaging systems has led to the concept of a totally digital imaging department - the 'filmless department'. This concept and its associated network system for digital departments are briefly considered. A transducer system of scanned projection radiography with solid state detectors used in digital chest imaging is described. The principles of this transducer system are applicable to other forms of digital radiography. (U.K.)

  2. The Politics of Mass Digitization

    DEFF Research Database (Denmark)

    Thylstrup, Nanna Bonde

    Mass-digitization of cultural-heritage archives has become increasingly pervasive. From Google Books to Europeana, bounded material is converted into ephemeral data on an unprecedented scale, promising to provide mankind with readily accessible and enduring reservoirs of knowledge. Interrogating...... this phenomenon, this dissertation asks how mass digitization affects the politics of cultural heritage. Its central argument is that mass digitization of cultural heritage is neither a neutral technical process, nor a transposition of the politics of analog cultural heritage to the digital realm on a 1:1 scale....... Rather, it should be understood as distinct subpolitical processes that bring together a multiplicity of interests and actors hitherto foreign to the field of cultural heritage archives. Mass digitization is thus upheaving the disciplinary enclosures of cultural heritage and gives rise to new territorial...

  3. Switching power converters medium and high power

    CERN Document Server

    Neacsu, Dorin O

    2013-01-01

    An examination of all of the multidisciplinary aspects of medium- and high-power converter systems, including basic power electronics, digital control and hardware, sensors, analog preprocessing of signals, protection devices and fault management, and pulse-width-modulation (PWM) algorithms, Switching Power Converters: Medium and High Power, Second Edition discusses the actual use of industrial technology and its related subassemblies and components, covering facets of implementation otherwise overlooked by theoretical textbooks. The updated Second Edition contains many new figures, as well as

  4. Study and achievement of a digital-analog-divider; Etude et realisation d'un diviseur-analogique-numerique

    Energy Technology Data Exchange (ETDEWEB)

    Petin, A [Commissariat a l' Energie Atomique, Cadarache (France). Centre d' Etudes Nucleaires

    1969-04-01

    This apparatus is designed to give directly, in digital form, the value of the ratio Vt1/V2 two analog voltages. It consists essentially of an analog-digital coder operating by successive weighing; the comparison voltage is made proportional to the divider V2 in the coder. The input dynamics are such that the voltages Vi and V2 are all in the range -50 mV to -5 V. Each of the circuits has an input impedance of about 10 K{omega}. As for the quotient, it is a binary number given in series and parallel form; it is made up of 8 bits, this giving a change of 1/16 to 16 per jump of 1/16 in the zone where the accuracy is highest (V2 {>=} 800 mV). The time required for a division is, at best, 15 {mu}sec. During the time of calculation, the voltages V{sub 1} and V{sub 2} should not vary by more than 1 per cent and 0.5 per cent respectively. The theory of the system and the investigation of a synoptic diagram, the study of the circuits and the actual construction are presented. (author) [French] Cet appareil est destine a fournir directement sous forme numerique la valeur du rapport V1/V2 de deux tensions analogiques. Il est constitue essentiellement d'un codeur analogique-numerique fonctionnant par pesees successives dans lequel la tension de reference est rendue proportionnelle au diviseur V2. La dynamique d'entree est telle que les tensions V1 et V2 peuvent etre comprises dans l'intervalle -50 mV a -5 V. Chacune des voies presente une impedance d'entree d'environ 10 K{omega}. En ce qui concerne le quotient, c'est un nombre binaire delivre sous les formes serie et parallele ; il est compose de 8 bits, ce qui donne une variation de 1/16 a 16 par bond de 1/16 dans la zone de meilleure precision (V2 {>=} 800 mV). Le temps necessaire pour effectuer la division est au mieux de 15 {mu}s. Durant le temps de calcul les tensions V{sub 1} et V{sub 2} ne doivent pas varier respectivement de plus de 1 pour cent et 0.5 pour cent. Apres avoir etabli la theorie du systeme, les

  5. Study and achievement of a digital-analog-divider; Etude et realisation d'un diviseur-analogique-numerique

    Energy Technology Data Exchange (ETDEWEB)

    Petin, A. [Commissariat a l' Energie Atomique, Cadarache (France). Centre d' Etudes Nucleaires

    1969-04-01

    This apparatus is designed to give directly, in digital form, the value of the ratio Vt1/V2 two analog voltages. It consists essentially of an analog-digital coder operating by successive weighing; the comparison voltage is made proportional to the divider V2 in the coder. The input dynamics are such that the voltages Vi and V2 are all in the range -50 mV to -5 V. Each of the circuits has an input impedance of about 10 K{omega}. As for the quotient, it is a binary number given in series and parallel form; it is made up of 8 bits, this giving a change of 1/16 to 16 per jump of 1/16 in the zone where the accuracy is highest (V2 {>=} 800 mV). The time required for a division is, at best, 15 {mu}sec. During the time of calculation, the voltages V{sub 1} and V{sub 2} should not vary by more than 1 per cent and 0.5 per cent respectively. The theory of the system and the investigation of a synoptic diagram, the study of the circuits and the actual construction are presented. (author) [French] Cet appareil est destine a fournir directement sous forme numerique la valeur du rapport V1/V2 de deux tensions analogiques. Il est constitue essentiellement d'un codeur analogique-numerique fonctionnant par pesees successives dans lequel la tension de reference est rendue proportionnelle au diviseur V2. La dynamique d'entree est telle que les tensions V1 et V2 peuvent etre comprises dans l'intervalle -50 mV a -5 V. Chacune des voies presente une impedance d'entree d'environ 10 K{omega}. En ce qui concerne le quotient, c'est un nombre binaire delivre sous les formes serie et parallele ; il est compose de 8 bits, ce qui donne une variation de 1/16 a 16 par bond de 1/16 dans la zone de meilleure precision (V2 {>=} 800 mV). Le temps necessaire pour effectuer la division est au mieux de 15 {mu}s. Durant le temps de calcul les tensions V{sub 1} et V{sub 2} ne doivent pas varier respectivement de plus de 1 pour cent et 0.5 pour cent. Apres avoir etabli la

  6. Using Analogies to Prevent Misconceptions about Chemical Equilibrium

    Science.gov (United States)

    Sahin Pekmez, Esin

    2010-01-01

    The main purpose of this study was to find the effectiveness of using analogies to prevent misconceptions about chemical equilibrium. Nineteen analogies, which were based on dynamic aspects of chemical equilibrium and application of Le Chatelier's principle, were developed. The participations of this study consisted of 11th grade students (n: 151)…

  7. Analog Tools in Digital History Classrooms: An Activity-Theory Case Study of Learning Opportunities in Digital Humanities

    Science.gov (United States)

    Craig, Kalani

    2017-01-01

    Digital humanities is often presented as classroom savior, a narrative that competes against the idea that technology virtually guarantees student distraction. However, these arguments are often based on advocacy and anecdote, so we lack systematic research that explores the effect of digital-humanities tools and techniques such as text mining,…

  8. Optimum phase shift in the self-oscillating loop for piezoelectric transformer-based power converters

    DEFF Research Database (Denmark)

    Ekhtiari, Marzieh; Zsurzsan, Tiberiu-Gabriel; Andersen, Michael A. E.

    2017-01-01

    A new method is implemented in designing of self-oscillating loop for driving piezoelectric transformers. The implemented method is based on combining both analog and digital control systems. Digitally controlled time delay through the self-oscillating loop results in very precise frequency control...... and ensures optimum operation of the piezoelectric transformer in terms of gain and efficiency. Time delay is implemented digitally for the first time through a 16 bit digital-to-analog converter in the self-oscillating loop. The new design of the delay circuit provides 45 ps time resolution, enabling fine......-grained control of phase in the self-oscillating loop. This allows the control loop to dynamically follow frequency changes of the transformer in each resonant cycle. Ultimately, by selecting the optimum phase shift, maximum efficiency under the load and temperature condition is achievable....

  9. Contingent Conversion Convertible Bond: New avenue to raise bank capital

    OpenAIRE

    DI GIROLAMO FRANCESCA; CAMPOLONGO FRANCESCA; DE SPIEGELEER JAN; SCHOUTENS WIM

    2016-01-01

    This paper provides an in-depth analysis of the structuring and the pricing of an innovative financial market product. This instrument is called a contingent conversion convertible bond or "CoCoCo". This hybrid bond is itself a combination of two other hybrid instruments: a contingent convertible ("CoCo") and a convertible bond. This combination introduces more complexity in the structure but it also allows investors to profit from strong share price performances. This upside potential is add...

  10. Digital and analog fiber optic communications for CATV and FTTx applications

    CERN Document Server

    Brillant, Avigdor

    2008-01-01

    This book is intended to provide a step-by-step guide to all design aspects and tradeoffs from theory to application for fiber-optics transceiver electronics. Presenting a compendium of information in a structured way, this book enables the engineer to develop a methodical design approach, a deep understanding of specifications parameters and the reasons behind them, as well as their effects and consequences on system performance, which are essential for proper component design. Further, a fundamental understanding of RF, digital circuit design, and linear and nonlinear phenomena is important

  11. Absolute quantification by droplet digital PCR versus analog real-time PCR

    Science.gov (United States)

    Hindson, Christopher M; Chevillet, John R; Briggs, Hilary A; Gallichotte, Emily N; Ruf, Ingrid K; Hindson, Benjamin J; Vessella, Robert L; Tewari, Muneesh

    2014-01-01

    Nanoliter-sized droplet technology paired with digital PCR (ddPCR) holds promise for highly precise, absolute nucleic acid quantification. Our comparison of microRNA quantification by ddPCR and real-time PCR revealed greater precision (coefficients of variation decreased by 37–86%) and improved day-to-day reproducibility (by a factor of seven) of ddPCR but with comparable sensitivity. When we applied ddPCR to serum microRNA biomarker analysis, this translated to superior diagnostic performance for identifying individuals with cancer. PMID:23995387

  12. Digital signal processing for He3 proportional counter

    International Nuclear Information System (INIS)

    Zeynalov, Sh.S.; Ahmadov, Q.S.

    2010-01-01

    Full text : Data acquisition systems for nuclear spectroscopy have traditionally been based on systems with analog shaping amplifiers followed by analog-to-digital converters. Recently, however, new systems based on digital signal processing make possible to replace the analog shaping and timing circuitry the numerical algorithms to derive properties of the pulse such as its amplitude. DSP is a fully numerical analysis of the detector pulse signals and this technique demonstrates significant advantages over analog systems in some circumstances. From a mathematical point of view, one can consider the signal evolution from the detector to the ADC as a sequence of transformations that can be described by precisely defined mathematical expressions. Digital signal processing with ADCs has the possibility to utilize further information on the signal pulses from radiation detectors. In the experiment each step of the signal generation in the 3He filled proportional counter was described using digital signal processing techniques (DSP). The electronic system has consisted of a detector, a preamplifier and a digital oscilloscope. The pulses from the detector were digitized using a digital storage oscilloscope. This oscilloscope allowed signal digitization with accuracy of 8 bit (256 levels) and with frequency of up to 5 * 10 8 samples/s. As a neutron source was used Cf-252. To obtain detector output current pulse I(t) created by the motions of the ions/electrons pairs was written an algorithm which can easily be programmed using modern computer programming languages.

  13. Cyclopentanoid analogs of phosphatidylcholine: susceptibility to phospholipase A2.

    Science.gov (United States)

    Lister, M D; Hancock, A J

    1988-10-01

    Six isomers of dipalmitoylcyclopentanetriol phosphocholine (cyclopentano-lecithin) were tested as potential substrates for phospholipase A2. Since each of these analogs possesses a configuration that mimics a narrow range of conformations of a glycerophospholipid molecule, the analogs were used to assess the enzyme's conformational requirements. Studies showed that all of the analogs containing the phosphocholine at the C-1 (or C-3) position could be hydrolyzed, while only one of the three analogs that contains the polar head group at the C-2 position was susceptible. Kinetic studies, however, revealed that only the all-trans-(1,3/2-1P)-cyclopentano-lecithin gave initial rates of hydrolysis that were measurable by pH-stat. Acyl group specificity of the enzyme towards the all-trans isomer was determined with an analog was acyl groups were distinguishable. The synthesis of this mixed-acid-cyclopentano-PC is described herein. When this analog was enzymatically assayed, results unequivocally showed the enzyme to be specific for C-2 acyl hydrolysis. This specificity, and data showing that the all-trans analog is stereospecifically hydrolyzed, indicate that it is acted on in an analogous manner to dipalmitoylphosphatidylcholine. These studies indicate that although the configuration of the analog is not necessarily a prerequisite for hydrolysis, there does appear to be an optimal spatial orientation for enzymatic activity. The analogy between the susceptibilities of all-trans-(1,3/2-1P)-cyclopentano-lecithin and glycero-lecithin suggests that the conformation of the glycero-lecithin during phospholipase A2-mediated hydrolysis may be best simulated by the all-trans orientation of C-O bonds in the artificial substrate.

  14. A contribution to the design of fast code converters for position encoders

    Science.gov (United States)

    Denic, Dragan B.; Dincic, Milan R.; Miljkovic, Goran S.; Peric, Zoran H.

    2016-10-01

    Pseudorandom binary sequences (PRBS) are very useful in many areas of applications. Absolute position encoders based on PRBS have many advantages. However, the pseudorandom code is not directly applicable to the digital electronic systems, hence a converter from pseudorandom to natural binary code is needed. Recently, a fast pseudorandom/natural code converter based on Galois PRBS generator (much faster than previously used converter based on Fibonacci PRBS generator) was proposed. One of the main parts of the Galois code converter is an initial logic. The problem of the design of the initial logic has been solved only for some single values of resolution, but it is still not solved for any value of resolution, which significantly limits the applicability of the fast Galois code converter. This paper solves this problem presenting the solution for the design of the initial logic of the fast Galois pseudorandom/natural code converters used in the pseudorandom position encoders, in general manner, that is for any value of the resolution, allowing for a wide applicability of the fast Galois pseudorandom position encoders. Rigorous mathematical derivation of the formula for the designing of the initial logic is presented. Simulation of the proposed converter is performed in NI MultiSim software. The proposed solution, although developed for pseudorandom position encoders, can be used in many other fields where PRBS are used.

  15. Evaluation and optimization of the bandwidth of static converters: application to multi-cell converters; Evaluation et optimisation de la bande passante des convertisseurs statiques

    Energy Technology Data Exchange (ETDEWEB)

    Aime, M.

    2003-11-15

    Thanks to the technological progress achieved in the field of power electronics, the use of static converters has spread to new applications. In particular, some applications such as active filtering or the supply of special AC machines require power converters having good dynamic performances. The subject of this thesis is to evaluate systematically the dynamic performances of multi-cell converters, and then to optimize these performances. This document is organized in four chapters. The first one summarizes the main multilevel converter structures, and some control strategies dedicated to these structures. The second chapter presents the evaluation criteria chosen to quantify the dynamic performances of static converters. These criteria are then used to compare the performances obtained with two different PWM strategies. An optimized strategy which results from a trade-off between the two former strategies is then introduced. The third chapter shows a new control strategy of multi-cell voltage source converters. This new strategy enables to control the peak current at a fixed switching frequency. The operation of this controller is explained, and the results obtained by digital simulations are presented and discussed. The fourth chapter deals with the experimental achievement of the peak current control. In particular, the implementation of the control algorithm within a FPGA is demonstrated. Finally, the conclusion of this thesis presents some orientations for further developments, in order to improve the current control strategy and to widen its field of applications. (author)

  16. 47 CFR 74.796 - Modification of digital transmission systems and analog transmission systems for digital operation.

    Science.gov (United States)

    2010-10-01

    ... installation of manufacturer-supplied and FCC-certificated equipment), the licensee shall certify compliance...) Measure the level of attenuation of emissions below the average digital power output at the channel edges...

  17. Digital services using quadrature amplitude modulation (QAM) over CATV analog DWDM system

    Science.gov (United States)

    Yeh, JengRong; Selker, Mark D.; Trail, J.; Piehler, David; Levi, Israel

    2000-04-01

    Dense Wavelength Division Multiplexing (DWDM) has recently gained great popularity as it provides a cost effective way to increase the transmission capacity of the existing fiber cable plant. For a long time, Dense WDM was exclusively used for baseband digital applications, predominantly in terrestrial long haul networks and in some cases in metropolitan and enterprise networks. Recently, the performance of DWDM components and frequency-stabilized lasers has substantially improved while the costs have down significantly. This makes a variety of new optical network architectures economically viable. The first commercial 8- wavelength DWDM system designed for Hybrid Fiber Coax networks was reported in 1998. This type of DWDM system utilizes Sub-Carrier Multiplexing (SCM) of Quadrature Amplitude Modulated (QAM) signals to transport IP data digital video broadcast and Video on Demand on ITU grid lightwave carriers. The ability of DWDM to provide scalable transmission capacity in the optical layer with SCM granularity is now considered by many to be the most promising technology for future transport and distribution of broadband multimedia services.

  18. A CMOS rail-to-rail linear VI-converter

    NARCIS (Netherlands)

    Vervoort, P.P.; Vervoort, P.P.; Wassenaar, R.F.

    1995-01-01

    A linear CMOS VI-converter operating in strong inversion with a common-mode input range from the negative to the positive supply rail is presented. The circuit consists of three linear VI-converters based on the difference of squares principle. Two of these perform the actual V to I conversion,

  19. Fixed switching frequency applied in single-phase boost AC to DC converter

    International Nuclear Information System (INIS)

    Chen, T.-C.; Ren, T.-J.; Ou, J.-C.

    2009-01-01

    The fixed switching frequency control for a single-phase boost AC to DC converter to achieve a sinusoidal line current and unity power factor is proposed in this paper. The relation between the line current error and the fixed switching frequency was developed. For a limit line current error, the minimum switching frequency for a boost AC to DC converter can be achieved. The proposed scheme was implemented using a 32-bit digital signal processor TMS320C32. Simulations and experimental results demonstrate the feasibility and fast dynamic response of the proposed control strategy.

  20. Reasoning by analogy as an aid to heuristic theorem proving.

    Science.gov (United States)

    Kling, R. E.

    1972-01-01

    When heuristic problem-solving programs are faced with large data bases that contain numbers of facts far in excess of those needed to solve any particular problem, their performance rapidly deteriorates. In this paper, the correspondence between a new unsolved problem and a previously solved analogous problem is computed and invoked to tailor large data bases to manageable sizes. This paper outlines the design of an algorithm for generating and exploiting analogies between theorems posed to a resolution-logic system. These algorithms are believed to be the first computationally feasible development of reasoning by analogy to be applied to heuristic theorem proving.

  1. Short term wave forecasting, using digital filters, for improved control of Wave Energy Converters

    DEFF Research Database (Denmark)

    Tedd, James; Frigaard, Peter

    2007-01-01

    This paper presents a Digital Filter method for real time prediction of waves incident upon a Wave Energy device. The method transforms waves measured at a point ahead of the device, to expected waves incident on the device. The relationship between these incident waves and power capture is derived...... experimentally. Results are shown form measurements taken on the Wave Dragon prototype device, a floating overtopping device situated in Northern Denmark. In this case the method is able to accurately predict the surface elevation at the device 11.2 seconds before the measurement is made. This is sufficient...... to allow advanced control systems to be developed using this knowledge to significantly improve power capture....

  2. Short term wave forecasting, using digital filters, for improved control of Wave Energy Converters

    Energy Technology Data Exchange (ETDEWEB)

    Tedd, J.; Frigaard, P. [Department of Civil Engineering, Aalborg University, Aalborg (Denmark)

    2007-07-01

    This paper presents a Digital Filter method for real time prediction of waves incident upon a Wave Energy device. The method transforms waves measured at a point ahead of the device, to expected waves incident on the device. The relationship between these incident waves and power capture is derived experimentally. Results are shown form measurements taken on the Wave Dragon prototype device, a floating overtopping device situated in Northern Denmark. In this case the method is able to accurately predict the surface elevation at the device 11.2 seconds before the measurement is made. This is sufficient to allow advanced control systems to be developed using this knowledge to significantly improve power capture.

  3. Introduction to digital communication systems

    CERN Document Server

    Wesolowski, Krzysztof

    2009-01-01

    Combining theoretical knowledge and practical applications, this advanced-level textbook covers the most important aspects of contemporary digital communication systems. Introduction to Digital Communication Systems focuses on the rules of functioning digital communication system blocks, starting with the performance limits set by the information theory. Drawing on information relating to turbo codes and LDPC codes, the text presents the basic methods of error correction and detection, followed by baseband transmission methods, and single- and multi-carrier digital modulations. The basi

  4. Understanding delta-sigma data converters

    CERN Document Server

    Pavan, Shanti; Temes, Gabor C

    2017-01-01

    This new edition introduces novel analysis and design techniques for delta-sigma (ΔΣ) converters in physical and conceptual terms, and includes new chapters that explore developments in the field over the last decade. This book explains the principles and operation of delta-sigma analog-to-digital converters (ADCs) in physical and conceptual terms in accordance with the most recent developments in the field. The interest of ΔΣ converter designers has shifted significantly over the past decade, due to many new applications for data converters at the far ends of the frequency spectrum. Continuous-time delta-sigma A/D converters with GHz clocks, of both lowpass and bandpass types, are required for wireless applications. At the other extreme, multiplexed ADCs with very narrow (sometimes 10 Hz wide) signal bandwidths, but very high accuracy are needed in the interfaces of biomedical and environmental sensors. To reflect the changing eeds of designers, the second edition includes significant new material on bo...

  5. A full digital approach to the TDCR method

    International Nuclear Information System (INIS)

    Mini, Giuliano; Pepe, Francesco; Tintori, Carlo; Capogni, Marco

    2014-01-01

    Current state of the art solutions based on the Triple to Double Coincidence Ratio method are generally large size, heavy-weight and not transportable systems. This is due, on one side, to large detectors and scintillation chambers and, on the other, to bulky analog electronics for data acquisition. CAEN developed a new, full digital approach to TDCR technique based on a portable, stand-alone, high-speed multichannel digitizer, on-board Digital Pulse Processing and dedicated DAQ software that emulates the well-known MAC3 analog board. - Highlights: • CAEN Desktop Digitizers used to emulate the MAC3 analog board in TDCR acquisition. • Spectroscopic application of the CAEN digitizers to the TDCR for charge spectra. • Development of two different softwares by CAEN and ENEA-INMRI for TDCR analysis. • Single electron peak obtained by CAEN digitizer and ENEA-INMRI portable TDCR. • Measurements of 90 Sr/ 90 Y by the new TDCR device equipped with CAEN digitizers

  6. Microwave testing of high-Tc based direct current to a single flux quantum converter

    DEFF Research Database (Denmark)

    Kaplunenko, V. K.; Fischer, Gerd Michael; Ivanov, Z. G.

    1994-01-01

    Design, simulation, and experimental investigations of a direct current to a single flux quantum converter loaded with a Josephson transmission line and driven by an external 70 GHz microwave oscillator are reported. The test circuit includes nine YBaCuO Josephson junctions aligned on the grain...... boundary of a 0°–32° asymmetric Y-ZrO2 bicrystal substrate. The performance of such converters is important for the development of the fast Josephson samplers required for testing of high-Tc rapid single flux quantum circuits in high-speed digital superconducting electronics. Journal of Applied Physics...

  7. Is the Link from Working Memory to Analogy Causal? No Analogy Improvements following Working Memory Training Gains

    Science.gov (United States)

    Richey, J. Elizabeth; Phillips, Jeffrey S.; Schunn, Christian D.; Schneider, Walter

    2014-01-01

    Analogical reasoning has been hypothesized to critically depend upon working memory through correlational data [1], but less work has tested this relationship through experimental manipulation [2]. An opportunity for examining the connection between working memory and analogical reasoning has emerged from the growing, although somewhat controversial, body of literature suggests complex working memory training can sometimes lead to working memory improvements that transfer to novel working memory tasks. This study investigated whether working memory improvements, if replicated, would increase analogical reasoning ability. We assessed participants’ performance on verbal and visual analogy tasks after a complex working memory training program incorporating verbal and spatial tasks [3], [4]. Participants’ improvements on the working memory training tasks transferred to other short-term and working memory tasks, supporting the possibility of broad effects of working memory training. However, we found no effects on analogical reasoning. We propose several possible explanations for the lack of an impact of working memory improvements on analogical reasoning. PMID:25188356

  8. Is the link from working memory to analogy causal? No analogy improvements following working memory training gains.

    Directory of Open Access Journals (Sweden)

    J Elizabeth Richey

    Full Text Available Analogical reasoning has been hypothesized to critically depend upon working memory through correlational data, but less work has tested this relationship through experimental manipulation. An opportunity for examining the connection between working memory and analogical reasoning has emerged from the growing, although somewhat controversial, body of literature suggests complex working memory training can sometimes lead to working memory improvements that transfer to novel working memory tasks. This study investigated whether working memory improvements, if replicated, would increase analogical reasoning ability. We assessed participants' performance on verbal and visual analogy tasks after a complex working memory training program incorporating verbal and spatial tasks. Participants' improvements on the working memory training tasks transferred to other short-term and working memory tasks, supporting the possibility of broad effects of working memory training. However, we found no effects on analogical reasoning. We propose several possible explanations for the lack of an impact of working memory improvements on analogical reasoning.

  9. Is the link from working memory to analogy causal? No analogy improvements following working memory training gains.

    Science.gov (United States)

    Richey, J Elizabeth; Phillips, Jeffrey S; Schunn, Christian D; Schneider, Walter

    2014-01-01

    Analogical reasoning has been hypothesized to critically depend upon working memory through correlational data, but less work has tested this relationship through experimental manipulation. An opportunity for examining the connection between working memory and analogical reasoning has emerged from the growing, although somewhat controversial, body of literature suggests complex working memory training can sometimes lead to working memory improvements that transfer to novel working memory tasks. This study investigated whether working memory improvements, if replicated, would increase analogical reasoning ability. We assessed participants' performance on verbal and visual analogy tasks after a complex working memory training program incorporating verbal and spatial tasks. Participants' improvements on the working memory training tasks transferred to other short-term and working memory tasks, supporting the possibility of broad effects of working memory training. However, we found no effects on analogical reasoning. We propose several possible explanations for the lack of an impact of working memory improvements on analogical reasoning.

  10. Digitally intensive DC-DC converter for extreme space environments, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — The Space Micro –Arizona State University (ASU) team will develop an all-digitally controlled, wide temperature range point-of-load switch-mode DC-DC regulator core...

  11. Digitally intensive DC-DC converter for extreme space environments, Phase II

    Data.gov (United States)

    National Aeronautics and Space Administration — The Space Micro-Arizona State University (ASU) team will develop an all-digitally controlled, wide temperature range point-of-load switch-mode DC-DC regulator core...

  12. The J3 SCR model applied to resonant converter simulation

    Science.gov (United States)

    Avant, R. L.; Lee, F. C. Y.

    1985-01-01

    The J3 SCR model is a continuous topology computer model for the SCR. Its circuit analog and parameter estimation procedure are uniformly applicable to popular computer-aided design and analysis programs such as SPICE2 and SCEPTRE. The circuit analog is based on the intrinsic three pn junction structure of the SCR. The parameter estimation procedure requires only manufacturer's specification sheet quantities as a data base.

  13. Design of a MGy radiation tolerant resolver-to-digital convertor IC for remotely operated maintenance in harsh environments

    Energy Technology Data Exchange (ETDEWEB)

    Leroux, Paul, E-mail: paul.leroux@kuleuven.be [KU Leuven, Dept. of Electrical Engineering (ESAT), AdvISe, Kleinhoefstraat 4, 2440 Geel (Belgium); Van Koeckhoven, Wesley; Verbeeck, Jens [KU Leuven, Dept. of Electrical Engineering (ESAT), AdvISe, Kleinhoefstraat 4, 2440 Geel (Belgium); Van Uffelen, Marco; Esqué, Salvador; Ranz, Roberto; Damiani, Carlo [Fusion for Energy, Torres Diagonal Litoral B3, Josep Pla 2, 08019 Barcelona (Spain); Hamilton, David [ITER Organization, Route de Vinon sur Verdon, 13115 Saint Paul-lez-Durance (France)

    2014-10-15

    During future ITER maintenance operations, sensors and their embarked electronics will be exposed to a hostile and radioactive environment. This paper presents the design of a MGy radiation tolerant 16 bit resolver-to-digital converter (RDC) in 130 nm CMOS technology. The RDC features a Type II digital tracking loop, able to track resolvers with speeds up to 300 rps, and excitation frequencies up to 4 kHz. The RDC uses two integrated ΔΣ-analog-to-digital converters (ADCs) to digitize the resolver outputs. The 16 bit, 10 kHz ADCs utilize a correlated double sampling technique to remove radiation induced offset and 1/f-noise. The front-end features a static angular resolution of 16 bits (4.2 arcsec{sub rms}) and a resolution of 10 bits (6 arcmin{sub rms}) at a rotor speed of 100 rps. The circuit has a simulated radiation tolerance exceeding 1 MGy. It has the ability to operate under temperatures up to 125 °C, and to allow multiplexing with signals from other conventional sensors for compact, robust read-out architectures.

  14. EVALUATION OF A PROCESS TO CONVERT BIOMASS TO METHANOL FUEL

    Science.gov (United States)

    The report gives results of a review of the design of a reactor capable of gasifying approximately 50 lb/hr of biomass for a pilot-scale facility to develop, demonstrate, and evaluate the Hynol Process, a high-temperature, high-pressure method for converting biomass into methanol...

  15. Software approach to automatic patching of analog computer

    Science.gov (United States)

    1973-01-01

    The Automatic Patching Verification program (APV) is described which provides the hybrid computer programmer with a convenient method of performing a static check of the analog portion of his study. The static check insures that the program is patched as specified, and that the computing components being used are operating correctly. The APV language the programmer uses to specify his conditions and interconnections is similar to the FORTRAN language in syntax. The APV control program reads APV source program statements from an assigned input device. Each source program statement is processed immediately after it is read. A statement may select an analog console, set an analog mode, set a potentiometer or DAC, or read from the analog console and perform a test. Statements are read and processed sequentially. If an error condition is detected, an output occurs on an assigned output device. When an end statement is read, the test is terminated.

  16. Analog and mixed-signal electronics

    CERN Document Server

    Stephan, Karl

    2015-01-01

    A practical guide to analog and mixed-signal electronics, with an emphasis on design problems and applications This book provides an in-depth coverage of essential analog and mixed-signal topics such as power amplifiers, active filters, noise and dynamic range, analog-to-digital and digital-to-analog conversion techniques, phase-locked loops, and switching power supplies. Readers will learn the basics of linear systems, types of nonlinearities and their effects, op-amp circuits, the high-gain analog filter-amplifier, and signal generation. The author uses system design examples to motivate

  17. Studies on a Hybrid Full-Bridge/Half-Bridge Bidirectional CLTC Multi-Resonant DC-DC Converter with a Digital Synchronous Rectification Strategy

    Directory of Open Access Journals (Sweden)

    Shu-huai Zhang

    2018-01-01

    Full Text Available This study presents a new bidirectional multi-resonant DC-DC converter, which is named CLTC. The converter adds an auxiliary transformer and an extra resonant capacitor based on a LLC resonant DC-DC converter, achieving zero-voltage switching (ZVS for the input inverting switches and zero-current switching (ZCS for the output rectifiers in all load range. The converter also has a wide gain range in two directions. When the load is light, a half-bridge configuration is adopted instead of a full-bridge configuration to solve the problem of voltage regulation. By this method, the voltage gain becomes monotonous and controllable. Besides, the digital synchronous rectification strategy is proposed in forward mode without adding any auxiliary circuit. The conduction time of synchronous rectifiers equals the estimation value of body diodes’ conduction time with the lightest load. Power loss analysis is also conducted in different situations. Finally, the theoretical analysis is validated by a 5 kW prototype.

  18. A DSP controlled one-to-three phase matrix converter

    Energy Technology Data Exchange (ETDEWEB)

    Dubovsky, J.; Dobrucly, B; Tabacek, R.; Havrila, R. [Department of Electric Traction and Energetics Faculty of Electrical Engineering, University of Zilina (Slovakia)

    1997-12-31

    This paper deals with the theoretical analysis computer simulation and experimental results of IM fed by a one-to-three phase matrix converter which offers a unique solution for single phase electric traction applications. The proposed drive in comparison with currently used conventional drives reduces the number of power switching elements of the converter, which increases drives dependability and brings lower investment in power electronics used in drive. Further advantage is that the converter is controlled with nearly unity power factor which cuts down the operational expenses and offers higher overall performance of the drive. (orig.) 6 refs.

  19. Development of a food to calorie converter mobile application: a ...

    African Journals Online (AJOL)

    Development of a food to calorie converter mobile application: a case study of ... have risen to the challenge of creating weight management software, they do not ... Our methodology includes an android application with an inbuilt SQLite ...

  20. Method for converting uranium oxides to uranium metal

    Science.gov (United States)

    Duerksen, Walter K.

    1988-01-01

    A process is described for converting scrap and waste uranium oxide to uranium metal. The uranium oxide is sequentially reduced with a suitable reducing agent to a mixture of uranium metal and oxide products. The uranium metal is then converted to uranium hydride and the uranium hydride-containing mixture is then cooled to a temperature less than -100.degree. C. in an inert liquid which renders the uranium hydride ferromagnetic. The uranium hydride is then magnetically separated from the cooled mixture. The separated uranium hydride is readily converted to uranium metal by heating in an inert atmosphere. This process is environmentally acceptable and eliminates the use of hydrogen fluoride as well as the explosive conditions encountered in the previously employed bomb-reduction processes utilized for converting uranium oxides to uranium metal.