WorldWideScience

Sample records for analog to digital converters

  1. Optical analog-to-digital converter

    Science.gov (United States)

    Vawter, G Allen [Corrales, NM; Raring, James [Goleta, CA; Skogen, Erik J [Albuquerque, NM

    2009-07-21

    An optical analog-to-digital converter (ADC) is disclosed which converts an input optical analog signal to an output optical digital signal at a sampling rate defined by a sampling optical signal. Each bit of the digital representation is separately determined using an optical waveguide interferometer and an optical thresholding element. The interferometer uses the optical analog signal and the sampling optical signal to generate a sinusoidally-varying output signal using cross-phase-modulation (XPM) or a photocurrent generated from the optical analog signal. The sinusoidally-varying output signal is then digitized by the thresholding element, which includes a saturable absorber or at least one semiconductor optical amplifier, to form the optical digital signal which can be output either in parallel or serially.

  2. Digital to Analog Converter Description

    NARCIS (Netherlands)

    van Tuijl, Adrianus Johannes Maria

    2002-01-01

    A circuit for analogue to digital or digital to analogue conversion comprising at least 2n matched current sources (40-1, 40-2, 40-n), where n is the resolution required of the conversion. Preferably more than 2n current sources (40-1, 40-2, 40-n) are used. The order in which the sources (40-1,

  3. Combined analog-to-digital converter

    International Nuclear Information System (INIS)

    Zhukov, A.V.; Rzhendinskaya, S.N.

    1983-01-01

    A 10-bit analog-to-digital converter (ADC) designed for operating in spectrometers with time-dependent filters is described. The ADC operation is based on combining the parallel reading and sequential counting methods. At maximum conversion time of 12 μs, timing series frequency of 25 MHz and foUr reference levels the differential nonlinearity withoUt statistical smoothing (maximum relative channel width deviation from average value) is not more than 4%

  4. Analog-digital converters for industrial applications including an introduction to digital-analog converters

    CERN Document Server

    Ohnhäuser, Frank

    2015-01-01

    This book offers students and those new to the topic of analog-to-digital converters (ADCs) a broad introduction, before going into details of the state-of-the-art design techniques for SAR and DS converters, including the latest research topics, which are valuable for IC design engineers as well as users of ADCs in applications. The book then addresses important topics, such as correct connectivity of ADCs in an application, the verification, characterization and testing of ADCs that ensure high-quality end products. Analog-to-digital converters are the central element in any data processing system and regulation loops such as modems or electrical motor drives. They significantly affect the performance and resolution of a system or end product. System development engineers need to be familiar with the performance parameters of the converters and understand the advantages and disadvantages of the various architectures. Integrated circuit development engineers have to overcome the problem of achieving high per...

  5. Fast parallel-series analog-to-digital converter

    International Nuclear Information System (INIS)

    Pogosov, A.Yu.

    1987-01-01

    Fast analog-to-digital converters are used in systems for detection of rapid processes, nuclear spectroscopy. A 12-digit analog-to-digital converter with conversion time of 160 ns and conversion frequency of 8.3 MHz is described; a segmented digital-to-analog converter with differential non-linearity of < 0.01% and a differential amplifier-limiter with setting time of 80 ns at the error of 0.2% are utilized in the converter; a control device is based on the chain of flip-flop circuit

  6. Time-Interleaved Analog to Digital Converters

    NARCIS (Netherlands)

    Louwsma, S.M.; van Tuijl, Adrianus Johannes Maria; Nauta, Bram

    2010-01-01

    This book describes the research carried out by our PhD student Simon Louwsma at the University of Twente, The Netherlands in the field of high-speed Analogto- Digital (AD) converters. AD converters are crucial circuits for modern systems where information is stored or processed in digital form. Due

  7. FASTBUS 16-channel 8-bit analog-to-digital converter

    International Nuclear Information System (INIS)

    Parfenov, A.N.; Pilyar, A.V.

    1989-01-01

    The converter module is based on 1107PV3 microcircuits connected in cascade connection. The measured analog signals range is ±2 V. Analog-to-digital conversion is linear. Information from analog-to-digital converter (ADC) is read simultaneously from two channels using FASTBUS channel for ∼40 ns. 16-channel ADC is used in a system to measure characteristics of scintillation hodoscopes module of the SFERA set-up

  8. Three-channel integrating analog-to-digital converter

    Science.gov (United States)

    Stevens, G. L.

    1978-01-01

    A three-channel integrating analog-to-digital converter was added to the complex mixer system to accept the baseband, complex signals generated by the complex mixers and output binary data to the digital demodulator for further processing and recording. The converter was first used for processing multistation data in radar experiments in the spring of 1977.

  9. High-speed and high-resolution analog-to-digital and digital-to-analog converters

    NARCIS (Netherlands)

    van de Plassche, R.J.

    1989-01-01

    Analog-to-digital and digital-to-analog converters are important building blocks connecting the analog world of transducers with the digital world of computing, signal processing and data acquisition systems. In chapter two the converter as part of a system is described. Requirements of analog

  10. Reference-Free CMOS Pipeline Analog-to-Digital Converters

    CERN Document Server

    Figueiredo, Michael; Evans, Guiomar

    2013-01-01

    This book shows that digitally assisted analog-to-digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low ...

  11. Circuit with a successive approximation analog to digital converter

    NARCIS (Netherlands)

    Louwsma, S.M.; Vertregt, Maarten

    2011-01-01

    During successive approximation analog to digital conversion a series of successive digital reference values is selected that converges towards a digital representation of an analog input signal. An analog reference signal is generated dependent on the successive digital reference values and

  12. Circuit with a successive approximation analog to digital converter

    NARCIS (Netherlands)

    Louwsma, S.M.; Vertregt, Maarten

    2010-01-01

    During successive approximation analog to digital conversion a series of successive digital reference values is selected that converges towards a digital representation of an analog input signal. An analog reference signal is generated dependent on the successive digital reference values and

  13. New technologies for radiation-hardening analog to digital converters

    International Nuclear Information System (INIS)

    Gauthier, M.K.

    1982-12-01

    Surveys of available Analog to Digital Converters (ADC) suitable for precision applications showed that none have the proper combination of accuracy and radiation hardness to meet space and/or strategic weapon requirements. A development program which will result in an ADC device which will serve a number of space and strategic applications. Emphasis was placed on approaches that could be integrated onto a single chip within three to five years

  14. APPLICATION BASED COMPARISON OF DIFFERENT ANALOG TO DIGITAL CONVERTER ARCHITECTURES

    OpenAIRE

    VEEPSA BHATIA,; NEETA PANDEY; ASOK BHATTACHARYYA

    2010-01-01

    A review study of the most popular type of Analog to Digital Converters- successive approximations, flash, pipelined and sigma-delta has been performed in this paper. The paper elaborates the fundamental operating principles of these architectures and the sources of error experienced in each of these architectures. Further, design considerations and implications, for each architecture, have been put forth. An application based comparison has also been drawn for these architectures with the he...

  15. Energy Savings Assessment for Digital-to-Analog Converter Boxes

    Energy Technology Data Exchange (ETDEWEB)

    Cheung, Hoi Ying Iris; Meier, Alan; Brown, Richard

    2011-01-18

    The Digital Television (DTV) Converter Box Coupon Program was administered by the U.S. government to subsidize purchases of digital-to-analog converter boxes, with up to two $40 coupons for each eligible household. In order to qualify as Coupon Eligible Converter Boxes (CECBs), these devices had to meet a number of minimum performance specifications, including energy efficiency standards. The Energy Star Program also established voluntary energy efficiency specifications that are more stringent than the CECB requirements. In this study, we measured the power and energy consumptions for a sample of 12 CECBs (including 6 Energy Star labeled models) in-use in homes and estimated aggregate energy savings produced by the energy efficiency policies. Based on the 35 million coupons redeemed through the end of the program, our analysis indicates that between 2500 and 3700 GWh per year are saved as a result of the energy efficiency policies implemented on digital-to-analog converter boxes. The energy savings generated are equivalent to the annual electricity use of 280,000 average US homes.

  16. Photonic analog-to-digital converter via asynchronous oversampling

    Science.gov (United States)

    Carver, Spencer; Reeves, Erin; Siahmakoun, Azad; Granieri, Sergio

    2012-06-01

    This paper presents a hybrid opto-electronic asynchronous delta-sigma modulator, implemented in the form of a fiber-optic Analog-to-Digital converter (ADC). This architecture was chosen for its independence of an external clock and ease of demodulation through a single low-pass filter stage. The fiber-optic prototype consists of an input laser (wavelength λ1) which is modulated with an input RF signal, a high-speed comparator circuit working as bi-stable quantizer, and a fiber-optic loop that includes a SOA and a band-pass filter that act as a leaky integrator. The fiber-optic loop acts as a fiber-ring resonator (FRR), and defines the resonance wavelength λ2 of the system. The gain within this loop is modified through cross-gain modulation (XGM) by the input wavelength λ1, and thus achieves the desired modulation effect. The proposed architecture has been constructed and characterized at a sampling rate of 15.4 MS/s processing input analog signals in the range of dc-3 MHz with a signal-to-noise ratio of 36 dB and an effective number of bits of 5.7.

  17. Mismatch-Shaping Serial Digital-to-Analog Converter

    DEFF Research Database (Denmark)

    Steensgaard-Madsen, Jesper; Moon, Un-Ku; Temes, Gabor C.

    1999-01-01

    A simple but accurate pseudo-passive mismatch-shaping D/A converter is described. A digital state machine is used to control the switching sequence of a symmetric two-capacitor network that performs the D/A conversion. The error caused by capacitor mismatch is uncorrelated with the input signal...

  18. Very High-Performance Advanced Filter Bank Analog-to-Digital Converter (AFB ADC) Project

    National Research Council Canada - National Science Library

    Velazquez, Scott

    1999-01-01

    ... of the art by using a parallel array of individual commercial off the shelf converters. The significant performance improvements afforded by the Advanced Filter Bank Analog to Digital Converter (AFB ADC...

  19. A Low-Voltage Switched-Capacitor Digital-to-Analog Converter Converted from Least Significant Bit

    OpenAIRE

    大野, 憲司; 松本, 寛樹; 村尾, 健次

    2010-01-01

    In this paper, it is presented that a Low-Voltage Switched-Capacitor Digital-to-Analog Converter converted from low bit. The proposed circuit can operate using simple nonoverlapping three phase clocks. It consists of a switch, capacitor, MOSFET and op-amp. Circuit operation is evaluated by PSpice.

  20. From analog to digital

    CERN Document Server

    Belleman, J

    2008-01-01

    Analog-to-digital conversion and its reverse, digital-to-analog conversion, are ubiquitous in all modern electronics, from instrumentation and telecommunication equipment to computers and entertainment. We shall explore the consequences of converting signals between the analog and digital domains and give an overview of the internal architecture and operation of a number of converter types. The importance of analog input and clock signal integrity will be explained and methods to prevent or mitigate the effects of interference will be shown. Examples will be drawn from several manufacturers' datasheets.

  1. Charge integration successive approximation analog-to-digital converter for focal plane applications using a single amplifier

    Science.gov (United States)

    Zhou, Zhimin (Inventor); Pain, Bedabrata (Inventor)

    1999-01-01

    An analog-to-digital converter for on-chip focal-plane image sensor applications. The analog-to-digital converter utilizes a single charge integrating amplifier in a charge balancing architecture to implement successive approximation analog-to-digital conversion. This design requires minimal chip area and has high speed and low power dissipation for operation in the 2-10 bit range. The invention is particularly well suited to CMOS on-chip applications requiring many analog-to-digital converters, such as column-parallel focal-plane architectures.

  2. Designed cell consortia as fragrance-programmable analog-to-digital converters.

    Science.gov (United States)

    Müller, Marius; Ausländer, Simon; Spinnler, Andrea; Ausländer, David; Sikorski, Julian; Folcher, Marc; Fussenegger, Martin

    2017-03-01

    Synthetic biology advances the rational engineering of mammalian cells to achieve cell-based therapy goals. Synthetic gene networks have nearly reached the complexity of digital electronic circuits and enable single cells to perform programmable arithmetic calculations or to provide dynamic remote control of transgenes through electromagnetic waves. We designed a synthetic multilayered gaseous-fragrance-programmable analog-to-digital converter (ADC) allowing for remote control of digital gene expression with 2-bit AND-, OR- and NOR-gate logic in synchronized cell consortia. The ADC consists of multiple sampling-and-quantization modules sensing analog gaseous fragrance inputs; a gas-to-liquid transducer converting fragrance intensity into diffusible cell-to-cell signaling compounds; a digitization unit with a genetic amplifier circuit to improve the signal-to-noise ratio; and recombinase-based digital expression switches enabling 2-bit processing of logic gates. Synthetic ADCs that can remotely control cellular activities with digital precision may enable the development of novel biosensors and may provide bioelectronic interfaces synchronizing analog metabolic pathways with digital electronics.

  3. Large-scale digitizer system, analog converters

    International Nuclear Information System (INIS)

    Althaus, R.F.; Lee, K.L.; Kirsten, F.A.; Wagner, L.J.

    1976-10-01

    Analog to digital converter circuits that are based on the sharing of common resources, including those which are critical to the linearity and stability of the individual channels, are described. Simplicity of circuit composition is valued over other more costly approaches. These are intended to be applied in a large-scale processing and digitizing system for use with high-energy physics detectors such as drift-chambers or phototube-scintillator arrays. Signal distribution techniques are of paramount importance in maintaining adequate signal-to-noise ratio. Noise in both amplitude and time-jitter senses is held sufficiently low so that conversions with 10-bit charge resolution and 12-bit time resolution are achieved

  4. Effects of Analog-to-Digital Converter Nonlinearities on Radar Range-Doppler Maps

    Energy Technology Data Exchange (ETDEWEB)

    Doerry, Armin Walter [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Dubbert, Dale F. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Tise, Bertice L. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2014-07-01

    Radar operation, particularly Ground Moving Target Indicator (GMTI) radar modes, are very sensitive to anomalous effects of system nonlinearities. These throw off harmonic spurs that are sometimes detected as false alarms. One significant source of nonlinear behavior is the Analog to Digital Converter (ADC). One measure of its undesired nonlinearity is its Integral Nonlinearity (INL) specification. We examine in this report the relationship of INL to GMTI performance.

  5. Radiation-hard analog-to-digital converters for space and strategic applications

    Science.gov (United States)

    Gauthier, M. K.; Dantas, A. R. V.

    1985-01-01

    During the course of the Jet Propulsion Laboratory's program to study radiation-hardened analog-to-digital converters (ADCs), numerous milestones have been reached in manufacturers' awareness and technology development and transfer, as well as in user awareness of these developments. The testing of ADCs has also continued with twenty different ADCs from seven manufacturers, all tested for total radiation dose and three tested for neutron effects. Results from these tests are reported.

  6. A CMOS time to digital converter with analog memory for high energy physics particle detectors

    International Nuclear Information System (INIS)

    Gerds, E.J.; Van der Spiegel, J.; Williams, H.H.; Van Berg, R.

    1994-01-01

    A data driven TDC (Time to Digital Converter) has been designed and fabricated in HP's 1.2 μm nwell CMOS process. The circuit was designed to work with the straw tube electronics of the Superconducting Supercollider (SSC), where the authors wish to measure the arrival time of electrons at a sense wire. The TCCAMU (Time to Charge Converter with an Analog Memory Unit) measures the time between an edge of the system clock and the leading edge of an asynchronous signal, and then gives a digital output representing that time measurement. Analog data sparsification occurs before the digitization with the help of an analog Level 1/Level 2 storage system; Level 1 to Level 2 data transfers are virtual, in the sense that one swaps capacitor addresses instead of moving charge. Two separate fabrication runs resulted in chips that have ∼ 108 ps/LSB resolution for any particular storage location. The measurement range is 8-24 ns, but adding digital logic to count the reference clock will extend the range to ∼ 1 second

  7. Minus 55 to plus 200 deg C 12 bit analog-to-digital converter

    Science.gov (United States)

    Smith, L. R.; Prazak, P. R.

    1981-01-01

    A 12 bit successive approximation analog to digital converter that offers moderately high speed precision data conversion at a reasonable level of cost and complexity is studied. The ADCH10HT extends this capability over a temperature range of -55 to +200 C. No missing-code performance is maintained over the entire temperature range. The converter is completely self-contained with internal clock and +10 volt reference. The CMOS devices offer low power dissipation, so that the internal temperature of the hybrid circuit does not rise as much from self heating. In CMOS circuits, pn junction leakage currents are returned to the supplies so that the logic keeps working at temperatures up to 250 C.

  8. SEM analysis of ionizing radiation effects in an analog to digital converter /AD571/

    Science.gov (United States)

    Gauthier, M. K.; Perret, J.; Evans, K. C.

    1981-01-01

    The considered investigation is concerned with the study of the total-dose degradation mechanisms in an IIL analog to digital (A/D) converter. The A/D converter is a 10 digit device having nine separate functional units on the chip which encompass several hundred transistors and circuit elements. It was the objective of the described research to find the radiation sensitive elements by a systematic search of the devices on the LSI chip. The employed technique using a scanning electron microscope to determine the functional blocks of an integrated circuit which are sensitive to ionizing radiation and then progressively zeroing in on the soft components within those blocks, proved extremely successful on the AD571. Four functional blocks were found to be sensitive to radiation, including the Voltage Reference, DAC, IIL Clock, and IIL SAR.

  9. Compendium of Single-Event Latchup and Total Ionizing Dose Test Results of Commercial Analog to Digital Converters

    Science.gov (United States)

    Irom, Farokh; Agarwal, Shri G.

    2012-01-01

    This paper reports single-event latchup and total dose results for a variety of analog to digital converters targeted for possible use in NASA spacecraft's. The compendium covers devices tested over the last 15 years.

  10. Multi-gigahertz performance of a superconducting analog-to-digital converter

    Energy Technology Data Exchange (ETDEWEB)

    Luong, H.C.; Van Duzer, T. [Univ. of California, Berkeley, CA (United States)

    1994-12-31

    This paper presents the progress the authors have made on their design, fabrication, and testing of a fully parallel superconducting analog-to-digital converter (ADC) with multi-gigahertz clock frequencies and input bandwidth. To their best knowledge, this converter is the first flash-type analog-to-digital converter ever reported in Josephson technology that fully integrates a quantizer and a thermometer-to-binary encoder to achieve binary outputs. In this design, the quantizer consists of 2{sup N}-1 comparators, each of which is realized using a hysteretic one-junction sampling SQUID driving a two-junction readout SQUID. A new logic family has been designed based on the same comparator building block and has been used to implement the thermometer-to-binary encoder. Taking advantage of the fact that the encoder`s input is thermometer-coded, They have designed three-input and four-input quasi-XOR gates with only three NAND gates and therefore reduced significantly the total gate count. Functionalities of all the sub-circuits have been verified experimentally at clock frequencies up to 3 GHz, which is limited by their currently available testing equipment.

  11. Data input from an analog-to-digital converter into the M-6000 computer

    International Nuclear Information System (INIS)

    Kalashnikov, A.M.; Sheremet'ev, A.K.

    1978-01-01

    A device for spectrometric data input from the ADC-4096 into the M-6000 computer memory operating in the information storage regime is described. The input device made on integrated circuits coordinates signal levels of the fast response analog-to-digital converter and computer with the help of resistors and inverters. Besides, the input forms a strobe to trigger an increment channel used to record information into the computer memory. The use of the input device permits to get rid of the intermediate information storage in the analyzer memory and ensures fast response of the devices

  12. Analog-to-digital conversion

    CERN Document Server

    Pelgrom, Marcel J M

    2010-01-01

    The design of an analog-to-digital converter or digital-to-analog converter is one of the most fascinating tasks in micro-electronics. In a converter the analog world with all its intricacies meets the realm of the formal digital abstraction. Both disciplines must be understood for an optimum conversion solution. In a converter also system challenges meet technology opportunities. Modern systems rely on analog-to-digital converters as an essential part of the complex chain to access the physical world. And processors need the ultimate performance of digital-to-analog converters to present the results of their complex algorithms. The same progress in CMOS technology that enables these VLSI digital systems creates new challenges for analog-to-digital converters: lower signal swings, less power and variability issues. Last but not least, the analog-to-digital converter must follow the cost reduction trend. These changing boundary conditions require micro-electronics engineers to consider their design choices for...

  13. Multi-channel analog-to-digital converter in the VECTOR-CAMAC systems

    International Nuclear Information System (INIS)

    Borodyanskij, M.E.; Moravskij, E.I.

    1986-01-01

    A four-channel analog-to-digital converter (ADC) realized on microcircuits of high level of integration is described. Refinement of the result of conversion from one tact to another is ensured at the expense of introducing redemdancy of signal conversion at intermediate tacts. The ADC represents a unit of the Vector system: a controller is placed in the second unit. The ADS is compatibl with the Vector system and after negligible alternations it can be performed in the CAMAC system. Time of ADSsub(n) conversion in one channel is 5μs, output code is 14-digit, binary maximum value of integral nonlinearity <= 0.05% from the dynamic range of measured signals is +- 10V, capacity of the immediate memonry is 1024 14-digit words

  14. Proposition of a scheme for adaptive/intelligent analog-to-digital converters

    International Nuclear Information System (INIS)

    Vaidya, P.P.; Kataria, S.K.

    2001-01-01

    The paper proposes design of a new class of Analog to Digital Converters (ADC's) which we call as Intelligent ADC's with moving resolution. Unlike presently available ADC's which are designed for specific range of applications and give fixed resolution and conversion time, the intelligent ADC's described here can adjust their resolution during the process of conversion, depending upon nature of input signal to make optimum use of the hard-ware. It is possible to use an intelligent ADC to give resolution ranging from 8 bit to 16 bit and conversion time ranging from few nano sec. to few micro secs. These ADC's have significant advantages over conventional ones when used for nuclear pulse spectroscopy as well as for process control applications. (author)

  15. 4-bit digital to analog converter using R-2R ladder and binary weighted resistors

    Science.gov (United States)

    Diosanto, J.; Batac, M. L.; Pereda, K. J.; Caldo, R.

    2017-06-01

    The use of a 4-bit digital-to-analog converter using two methods; Binary Weighted Resistors and R-2R Ladder is designed and presented in this paper. The main components that were used in constructing both circuits were different resistor values, operational amplifier (LM741) and single pole double throw switches. Both circuits were designed using MULTISIM software to be able to test the circuit for its ideal application and FRITZING software for the layout designing and fabrication to the printed circuit board. The implementation of both systems in an actual circuit benefits in determining and comparing the advantages and disadvantages of each. It was realized that the binary weighted circuit is more efficient DAC, having lower percentage error of 0.267% compared to R-2R ladder circuit which has a minimum of percentage error of 4.16%.

  16. A behavioral simulator for switched-capacitor sigma-delta modulator analog-to-digital converter

    International Nuclear Information System (INIS)

    San, H. Y.; Rezaul Hasan, S. M.

    1998-01-01

    In this paper, a PC-based simulator for state of the art oversampled switched-capacitor sigma-delta analog-to-digital converters is presented. The proposed simulator employs behavioral model of switched-capacitor integrator and non-linear quantizer to stimulate the system. The behavioral simulation of the integrator is also verified with SPICE. The simulator is fully integrated and standalone. It integrates an input netlist file interpreter, a behavioral simulator, a generic part library and a powerful post-processor to evaluate the SNR, SDR And TSNR. Both passive and active sensitivities can be investigated by the proposed simulator. The simulator is coded in C++, and is very fast

  17. 10-bit rapid single flux quantum digital-to-analog converter for ac voltage standard

    International Nuclear Information System (INIS)

    Maezawa, M; Hirayama, F

    2008-01-01

    Digital-to-analog (D/A) converters based on rapid single flux quantum (RSFQ) technology are under development for ac voltage standard applications. We present design and test results on a prototype 10-bit version integrated on a single chip. The 10-bit chip includes over 6000 Josephson junctions and consumes a bias current exceeding 1 A. To reduce the effects of the high bias current on circuit operation, a custom design method was employed in part and large circuit blocks were divided into smaller ones. The 10-bit chips were fabricated and tested at low speed. The test results suggested that our design approach could manage large bias currents on the order of 1 A per chip

  18. Quarter-Rate Superconducting Modulator for Improved High Resolution Analog-to-Digital Converter

    National Research Council Canada - National Science Library

    Inamdar, Amol; Rylov, Sergey; Sahu, Anubhav; Sarwana, Saad; Gupta, Deepnarayan

    2006-01-01

    .... In a PMD ADC, the analog input signal modulates the phase of a periodic stream of fluxons applied to a modulator circuit for subsequent demodulation in a clocked synchronizer circuit to produce a digital code...

  19. A device for the correction of differential non linearity in an analog to digital converter of sucessive approximation type

    International Nuclear Information System (INIS)

    Monteiro, P.R.B.

    1983-01-01

    It is shown that an analog to digital converter of sucessive approximation type may be used in the nuclear spectroscopy work provided its differential non linearity is suitably corrected. The function of an analog to digital converter in a nuclear data acquisition system is described. The main parameters which characterize this function have also been defined. A comparative study of the two types of A/D converters, Wilkinson type and the sucessive approximation type, has been carried out. Its is concluded that the later type of the converter is more convenient when it has been corrected for its differential non linearity. THe source of error of the differential non linearity is both qualitatively and quantitatively analysed and the design and construction of a corrector circuit is described which uses the sliding scale method. The experimental results show that the differential non linearity error is reduced to less than 1%. (Author) [pt

  20. A New Digital to Analog Converter Based on Low-Offset Bandgap Reference

    Directory of Open Access Journals (Sweden)

    Jinpeng Qiu

    2017-01-01

    Full Text Available This paper presents a new 12-bit digital to analog converter (DAC circuit based on a low-offset bandgap reference (BGR circuit with two cascade transistor structure and two self-contained feedback low-offset operational amplifiers to reduce the effects of offset operational amplifier voltage effect on the reference voltage, PMOS current-mirror mismatch, and its channel modulation. A Start-Up circuit with self-bias current architecture and multipoint voltage monitoring is employed to keep the BGR circuit working properly. Finally, a dual-resistor ladder DAC-Core circuit is used to generate an accuracy DAC output signal to the buffer operational amplifier. The proposed circuit was fabricated in CSMC 0.5 μm 5 V 1P4M process. The measured differential nonlinearity (DNL of the output voltages is less than 0.45 LSB and integral nonlinearity (INL less than 1.5 LSB at room temperature, consuming only 3.5 mW from a 5 V supply voltage. The DNL and INL at −55°C and 125°C are presented as well together with the discussion of possibility of improving the DNL and INL accuracy in future design.

  1. Time-to-digital converter based on analog time expansion for 3D time-of-flight cameras

    Science.gov (United States)

    Tanveer, Muhammad; Nissinen, Ilkka; Nissinen, Jan; Kostamovaara, Juha; Borg, Johan; Johansson, Jonny

    2014-03-01

    This paper presents an architecture and achievable performance for a time-to-digital converter, for 3D time-of-flight cameras. This design is partitioned in two levels. In the first level, an analog time expansion, where the time interval to be measured is stretched by a factor k, is achieved by charging a capacitor with current I, followed by discharging the capacitor with a current I/k. In the second level, the final time to digital conversion is performed by a global gated ring oscillator based time-to-digital converter. The performance can be increased by exploiting its properties of intrinsic scrambling of quantization noise and mismatch error, and first order noise shaping. The stretched time interval is measured by counting full clock cycles and storing the states of nine phases of the gated ring oscillator. The frequency of the gated ring oscillator is approximately 131 MHz, and an appropriate stretch factor k, can give a resolution of ≍ 57 ps. The combined low nonlinearity of the time stretcher and the gated ring oscillator-based time-to-digital converter can achieve a distance resolution of a few centimeters with low power consumption and small area occupation. The carefully optimized circuit configuration achieved by using an edge aligner, the time amplification property and the gated ring oscillator-based time-to-digital converter may lead to a compact, low power single photon configuration for 3D time-of-flight cameras, aimed for a measurement range of 10 meters.

  2. Mixed Linear/Square-Root Encoded Single Slope Ramp Provides a Fast, Low Noise Analog to Digital Converter with Very High Linearity for Focal Plane Arrays

    Science.gov (United States)

    Wrigley, Christopher James (Inventor); Hancock, Bruce R. (Inventor); Newton, Kenneth W. (Inventor); Cunningham, Thomas J. (Inventor)

    2014-01-01

    An analog-to-digital converter (ADC) converts pixel voltages from a CMOS image into a digital output. A voltage ramp generator generates a voltage ramp that has a linear first portion and a non-linear second portion. A digital output generator generates a digital output based on the voltage ramp, the pixel voltages, and comparator output from an array of comparators that compare the voltage ramp to the pixel voltages. A return lookup table linearizes the digital output values.

  3. Converting analog interpretive data to digital formats for use in database and GIS applications

    Science.gov (United States)

    Flocks, James G.

    2004-01-01

    There is a growing need by researchers and managers for comprehensive and unified nationwide datasets of scientific data. These datasets must be in a digital format that is easily accessible using database and GIS applications, providing the user with access to a wide variety of current and historical information. Although most data currently being collected by scientists are already in a digital format, there is still a large repository of information in the literature and paper archive. Converting this information into a format accessible by computer applications is typically very difficult and can result in loss of data. However, since scientific data are commonly collected in a repetitious, concise matter (i.e., forms, tables, graphs, etc.), these data can be recovered digitally by using a conversion process that relates the position of an attribute in two-dimensional space to the information that the attribute signifies. For example, if a table contains a certain piece of information in a specific row and column, then the space that the row and column occupies becomes an index of that information. An index key is used to identify the relation between the physical location of the attribute and the information the attribute contains. The conversion process can be achieved rapidly, easily and inexpensively using widely available digitizing and spreadsheet software, and simple programming code. In the geological sciences, sedimentary character is commonly interpreted from geophysical profiles and descriptions of sediment cores. In the field and laboratory, these interpretations were typically transcribed to paper. The information from these paper archives is still relevant and increasingly important to scientists, engineers and managers to understand geologic processes affecting our environment. Direct scanning of this information produces a raster facsimile of the data, which allows it to be linked to the electronic world. But true integration of the content with

  4. A 13-Bits wilkinson analog-digital converter for NIM acquisition system

    International Nuclear Information System (INIS)

    Acosta Toledo, R.; Osorio Deliz, J.; Arista Romeu, E.; Fernandez, J.

    1994-01-01

    A new 13-bits Wilkinson analog-digital converter is described. The aim of this work is to describe the circuits of sample and hold, memory condensator loading and releasing PROM based control memory logic, zero level detection and correction. The converter is designed for the digital measurement of the peak amplitudes of pulses with statistical or periodical time distribution. The analog-digital converter may be used in spectrometric systems, multi-channel analysers or any similar PC based system

  5. A Design of a New Column-Parallel Analog-to-Digital Converter Flash for Monolithic Active Pixel Sensor.

    Science.gov (United States)

    Chakir, Mostafa; Akhamal, Hicham; Qjidaa, Hassan

    2017-01-01

    The CMOS Monolithic Active Pixel Sensor (MAPS) for the International Linear Collider (ILC) vertex detector (VXD) expresses stringent requirements on their analog readout electronics, specifically on the analog-to-digital converter (ADC). This paper concerns designing and optimizing a new architecture of a low power, high speed, and small-area 4-bit column-parallel ADC Flash. Later in this study, we propose to interpose an S/H block in the converter. This integration of S/H block increases the sensitiveness of the converter to the very small amplitude of the input signal from the sensor and provides a sufficient time to the converter to be able to code the input signal. This ADC is developed in 0.18  μ m CMOS process with a pixel pitch of 35  μ m. The proposed ADC responds to the constraints of power dissipation, size, and speed for the MAPS composed of a matrix of 64 rows and 48 columns where each column ADC covers a small area of 35 × 336.76  μ m 2 . The proposed ADC consumes low power at a 1.8 V supply and 100 MS/s sampling rate with dynamic range of 125 mV. Its DNL and INL are 0.0812/-0.0787 LSB and 0.0811/-0.0787 LSB, respectively. Furthermore, this ADC achieves a high speed more than 5 GHz.

  6. A Cell-Mimicking Structure Converting Analog Volume Changes to Digital Colorimetric Output with Molecular Selectivity.

    Science.gov (United States)

    Zhang, Zijie; Liu, Yibo; Zhang, Xiaohan; Liu, Juewen

    2017-12-13

    We herein report a three-component cell-mimicking structure with a peroxidase-like iron oxide nanozyme as the nucleus, a molecularly imprinted hydrogel shell as cytoplasm, and a lipid bilayer membrane. The structure was characterized by cryo and negative stain TEM and also by a calcein leakage test. By introducing charged monomers, the gel shell can swell or shrink in response to salt concentration. By lowering the salt concentration, the gradual "analog" gel volume change was reflected in a switch-like "digital" colorimetric output by the burst of membrane and oxidation of substrates such as 3,3',5,5'-tetramethylbenzidine (TMB). Controlled access was also achieved by using melittin to insert channels cross the membrane, and selective molecular transport was realized by the molecularly imprinted gel. The functions of each component are coupled, and this sophisticated tripartite structure provides a new platform for modular design of new materials. Our cell-mimicking structure is functional and it is complementary to the current protocell work that aims to understand the origin of life.

  7. Proton-induced single event upset characterisation of a 1 giga-sample per second analog to digital converter

    International Nuclear Information System (INIS)

    Reed, R.A.; Marshall, P.W.; Carts, M.A.

    1999-01-01

    The SPT7760 is an analog to digital converter that is used in satellite for digital processing. In this paper we describe the characterization and analysis of proton-induced single event upsets (SEU) for the SPT7760 operating at sample rates from 125 Msps (Mega-samples per second) to 1 Gsps. The SEU cross-section has been measured as a function of sample rate for various input levels. The data collected is clearly non-linear for all cases. The data shows that this device has a relative low cross-section for proton-induced SEUs and remains functional at a proton dose of 580 krad (Si). (A.C.)

  8. 23 µW 8.9-effective number of bit 1.1 MS/s successive approximation register analog-to-digital converter with an energy-efficient digital-to-analog converter switching scheme

    Directory of Open Access Journals (Sweden)

    Lei Sun

    2014-08-01

    Full Text Available This study presents a successive approximation register analog-to-digital converter with an energy-efficient switching scheme. A split-most significant bit capacitor array is used with a least significant bit-down switching scheme. Compared with the conventional binary-weighted capacitor array, it reduces the area and average switching energy by 50 and 87% under the same unit capacitor. Moreover, capacitor matching requirement is relaxed by 75%. A prototype design was fabricated in a 0.13 µm complementary metal oxide semiconductor process. It consumes 23.2 µW under 1 V analog supply and 0.5 V digital supply. Measured results show a peak signal-to-distortion-and-noise ratio of 55.2 dB and an effective resolution bandwidth up to 1.1 MHz when it operates at 1.1 MS/s. Its figure-of-merit is 44.1 fJ/conversion-step.

  9. A Design of a New Column-Parallel Analog-to-Digital Converter Flash for Monolithic Active Pixel Sensor

    Directory of Open Access Journals (Sweden)

    Mostafa Chakir

    2017-01-01

    Full Text Available The CMOS Monolithic Active Pixel Sensor (MAPS for the International Linear Collider (ILC vertex detector (VXD expresses stringent requirements on their analog readout electronics, specifically on the analog-to-digital converter (ADC. This paper concerns designing and optimizing a new architecture of a low power, high speed, and small-area 4-bit column-parallel ADC Flash. Later in this study, we propose to interpose an S/H block in the converter. This integration of S/H block increases the sensitiveness of the converter to the very small amplitude of the input signal from the sensor and provides a sufficient time to the converter to be able to code the input signal. This ADC is developed in 0.18 μm CMOS process with a pixel pitch of 35 μm. The proposed ADC responds to the constraints of power dissipation, size, and speed for the MAPS composed of a matrix of 64 rows and 48 columns where each column ADC covers a small area of 35 × 336.76 μm2. The proposed ADC consumes low power at a 1.8 V supply and 100 MS/s sampling rate with dynamic range of 125 mV. Its DNL and INL are 0.0812/−0.0787 LSB and 0.0811/−0.0787 LSB, respectively. Furthermore, this ADC achieves a high speed more than 5 GHz.

  10. Analog-to-digital conversion

    CERN Document Server

    Pelgrom, Marcel

    2017-01-01

    This textbook is appropriate for use in graduate-level curricula in analog-to-digital conversion, as well as for practicing engineers in need of a state-of-the-art reference on data converters. It discusses various analog-to-digital conversion principles, including sampling, quantization, reference generation, nyquist architectures and sigma-delta modulation. This book presents an overview of the state of the art in this field and focuses on issues of optimizing accuracy and speed, while reducing the power level. This new, third edition emphasizes novel calibration concepts, the specific requirements of new systems, the consequences of 22-nm technology and the need for a more statistical approach to accuracy. Pedagogical enhancements to this edition include additional, new exercises, solved examples to introduce all key, new concepts and warnings, remarks and hints, from a practitioner’s perspective, wherever appropriate. Considerable background information and practical tips, from designing a PCB, to lay-o...

  11. Realization of the digital to analog converter for model of the voltage in network

    Directory of Open Access Journals (Sweden)

    Goncharova O.A.

    2016-12-01

    Full Text Available The article discusses the disadvantages of digital measuring instruments. Formulated the task of modeling the measuring device for different waveforms and measurements with the use of microcomputers. Studied and selected mathematical models to describe the behavior of measuring instruments and for different waveforms. Modeled amperage characteristics of a simple electrical circuit to check the correctness of the choice and implementation of the models. Implemented a program of virtual simulation for signals of different forms. The program allows measurements regardless of the waveform that is a distinctive feature of the developed program.

  12. A 16 b 2 GHz digital-to-analog converter in 0.18 μm CMOS with digital calibration technology

    International Nuclear Information System (INIS)

    Yang Weidong; Pu Jie; Zhang Ruitao; Chen Chao; Zang Jiandong; Li Tiehu; Luo Pu

    2015-01-01

    This paper presents a 16-bit 2 GSPS digital-to-analog converter (DAC) in 0.18 μm CMOS technology. This DAC is implemented using time division multiplex access system architecture in the digital domain. The input data is received with a two-channel LVDS interface. The DLL technology is introduced to meet the timing requirements between phases of the LVDS data and the data sampling clock. A FIFO is designed to absorb the phase difference between the data clock and DAC system clock. A delay controller is integrated to adjust the phase relationship between the high speed digital clock and analog clock, obtaining a sampling rate of 2 GSPS. The current source mismatch at higher bits is calibrated in the digital domain. Test results show that the DAC achieves 74.02 dBC SFDR at analog output of 36 MHz, and DNL less than ±2.1 LSB and INL less than ±4.3 LSB after the chip is calibrated. (paper)

  13. Compensation of multi-channel mismatches in high-speed high-resolution photonic analog-to-digital converter.

    Science.gov (United States)

    Yang, Guang; Zou, Weiwen; Yu, Lei; Wu, Kan; Chen, Jianping

    2016-10-17

    We demonstrate a method to compensate multi-channel mismatches that intrinsically exist in a photonic analog-to-digital converter (ADC) system. This system, nominated time-wavelength interleaved photonic ADC (TWI-PADC), is time-interleaved via wavelength demultiplexing/multiplexing before photonic sampling, wavelength demultiplexing channelization, and electronic quantization. Mismatches among multiple channels are estimated in frequency domain and hardware adjustment are used to approach the device-limited accuracy. A multi-channel mismatch compensation algorithm, inspired from the time-interleaved electronic ADC, is developed to effectively improve the performance of TWI-PADC. In the experiment, we configure out a 4-channel TWI-PADC system with 40 GS/s sampling rate based on a 10-GHz actively mode-locked fiber laser. After multi-channel mismatch compensation, the effective number of bit (ENOB) of the 40-GS/s TWI-PADC system is enhanced from ~6 bits to >8.5 bits when the RF frequency is within 0.1-3.1 GHz and from ~6 bits to >7.5 bits within 3.1-12.1 GHz. The enhanced performance of the TWI-PADC system approaches the limitation determined by the timing jitter and noise.

  14. Analog approach to mixed analog-digital circuit simulation

    Science.gov (United States)

    Ogrodzki, Jan

    2013-10-01

    Logic simulation of digital circuits is a well explored research area. Most up-to-date CAD tools for digital circuits simulation use an event driven, selective trace algorithm and Hardware Description Languages (HDL), e.g. the VHDL. This techniques enable simulation of mixed circuits, as well, where an analog part is connected to the digital one through D/A and A/D converters. The event-driven mixed simulation applies a unified, digital-circuits dedicated method to both digital and analog subsystems. In recent years HDL techniques have been also applied to mixed domains, as e.g. in the VHDL-AMS. This paper presents an approach dual to the event-driven one, where an analog part together with a digital one and with converters is treated as the analog subsystem and is simulated by means of circuit simulation techniques. In our problem an analog solver used yields some numerical problems caused by nonlinearities of digital elements. Efficient methods for overriding these difficulties have been proposed.

  15. Analog-to-digital conversion

    CERN Document Server

    Pelgrom, Marcel J. M

    2013-01-01

    This textbook is appropriate for use in graduate-level curricula in analog to digital conversion, as well as for practicing engineers in need of a state-of-the-art reference on data converters.  It discusses various analog-to-digital conversion principles, including sampling, quantization, reference generation, nyquist architectures and sigma-delta modulation.  This book presents an overview of the state-of-the-art in this field and focuses on issues of optimizing accuracy and speed, while reducing the power level. This new, second edition emphasizes novel calibration concepts, the specific requirements of new systems, the consequences of 45-nm technology and the need for a more statistical approach to accuracy.  Pedagogical enhancements to this edition include more than twice the exercises available in the first edition, solved examples to introduce all key, new concepts and warnings, remarks and hints, from a practitioner’s perspective, wherever appropriate.  Considerable background information and pr...

  16. Simulation of continuously logical base cells (CL BC) with advanced functions for analog-to-digital converters and image processors

    Science.gov (United States)

    Krasilenko, Vladimir G.; Lazarev, Alexander A.; Nikitovich, Diana V.

    2017-10-01

    The paper considers results of design and modeling of continuously logical base cells (CL BC) based on current mirrors (CM) with functions of preliminary analogue and subsequent analogue-digital processing for creating sensor multichannel analog-to-digital converters (SMC ADCs) and image processors (IP). For such with vector or matrix parallel inputs-outputs IP and SMC ADCs it is needed active basic photosensitive cells with an extended electronic circuit, which are considered in paper. Such basic cells and ADCs based on them have a number of advantages: high speed and reliability, simplicity, small power consumption, high integration level for linear and matrix structures. We show design of the CL BC and ADC of photocurrents and their various possible implementations and its simulations. We consider CL BC for methods of selection and rank preprocessing and linear array of ADCs with conversion to binary codes and Gray codes. In contrast to our previous works here we will dwell more on analogue preprocessing schemes for signals of neighboring cells. Let us show how the introduction of simple nodes based on current mirrors extends the range of functions performed by the image processor. Each channel of the structure consists of several digital-analog cells (DC) on 15-35 CMOS. The amount of DC does not exceed the number of digits of the formed code, and for an iteration type, only one cell of DC, complemented by the device of selection and holding (SHD), is required. One channel of ADC with iteration is based on one DC-(G) and SHD, and it has only 35 CMOS transistors. In such ADCs easily parallel code can be realized and also serial-parallel output code. The circuits and simulation results of their design with OrCAD are shown. The supply voltage of the DC is 1.8÷3.3V, the range of an input photocurrent is 0.1÷24μA, the transformation time is 20÷30nS at 6-8 bit binary or Gray codes. The general power consumption of the ADC with iteration is only 50÷100μW, if the

  17. On the extensive unification of digital-to-analog converters and kernels

    Science.gov (United States)

    Liao, Yanchu

    2012-09-01

    System administrators agree that scalable communication is an interesting new topic in the field of steganography, and leading analysts concur. After years of unfortunate re-search into context-free grammar, we argue the intuitive unification of fiber-optic cables and context-free grammar. Our focus here is not on whether sensor networks and randomized algorithms can collaborate to accomplish this aim, but rather on introducing an analysis of DHTs [2] (Soupy Coil).

  18. Comparison of performance of analog-to-digital converters (ADC) for pulse height analyzers

    International Nuclear Information System (INIS)

    Suzuki, Shogo; Hirai, Shoji

    1981-01-01

    In the recent ADCs for pulse height analyzers (PHA), Wilkinson type is a leading one, and those with 50 to 200 MHz clock frequency and 8K channel are mostly on the market. The comparison of the performance of ADCs was conducted under the condition of using these multi-channel PHAs as γ-ray spectrometers. The following three ADCs were compared: ADC incorporated in CANBERRA 8100 MCA, and CANBERRA 8060 ADCs used as the ADCs for 1st and 2nd GAMA systems. In this case, the conversion gains of these ADCs were set at 4K because the memory of 8100 MCA was 4K, and the GAMA systems were also mostly operated at 4K. In this paper, report is made on the measurements of dead time, the change of γ peaks immediately after the power was turned on, the temperature dependence of ADCs the long term stability of ADCs, derivative non-linearity, and integration non-linearity. The dead time of the ADC of 8100 CMA was shorter in the range up to 1000 channels. The temperature dependence was -0.017%/deg C in 8100 MCA, and -0.061 and -0.072%/deg C in GAMA. The long term stability was -0.02%/14 hr in 8100 MCA, and -0.027%/14 hr in 8060 of 1st GAMA. The derivative non-linearity was 0.45% in 8100 MCA, 0.67% in 8060 of 1st GAMA, and the integration non-linearity was 0.075% for 8100 MCA, and 0.085 - 0.1% in 8060 ADCs. Also, the change of γ peaks immediately after the power was turned on for 8100 ADC was better than that of 8060 ADC. (Wakatsuki, Y.)

  19. Optical domain analog to digital conversion methods and apparatus

    Science.gov (United States)

    Vawter, Gregory A

    2014-05-13

    Methods and apparatus for optical analog to digital conversion are disclosed. An optical signal is converted by mapping the optical analog signal onto a wavelength modulated optical beam, passing the mapped beam through interferometers to generate analog bit representation signals, and converting the analog bit representation signals into an optical digital signal. A photodiode receives an optical analog signal, a wavelength modulated laser coupled to the photodiode maps the optical analog signal to a wavelength modulated optical beam, interferometers produce an analog bit representation signal from the mapped wavelength modulated optical beam, and sample and threshold circuits corresponding to the interferometers produce a digital bit signal from the analog bit representation signal.

  20. A Calibration Method for Nonlinear Mismatches in M-Channel Time-Interleaved Analog-to-Digital Converters Based on Hadamard Sequences

    Directory of Open Access Journals (Sweden)

    Husheng Liu

    2016-11-01

    Full Text Available The time-interleaved analog-to-digital converter (TIADC is an architecture used to achieve a high sampling rate and high dynamic performance. However, estimation and compensation methods are required to maintain the dynamic performance of the constituent analog-to-digital converters (ADCs due to channel mismatches. This paper proposes a blind adaptive method to calibrate the nonlinear mismatches in M-channel TIADCs (M-TIADCs. The nonlinearity-induced error signal is reconstructed by the proposed multiplier Hadamard transform (MHT structure, and the nonlinear parameters are estimated by the filtered-X least-mean square (FxLMS algorithm. The performance of cascade calibration is also analyzed. The numerical simulation results show that the proposed method consumes much less hardware resources while maintaining the calibration performance.

  1. FPGA implementation of a single-input fuzzy logic controller for boost converter with the absence of an external analog-to-digital converter

    DEFF Research Database (Denmark)

    Taeed, Fazel; Salam, Z.; Ayob, S.

    2012-01-01

    In this paper, the single-input fuzzy logic controller (FLC) (SIFLC) for boost converter output-voltage regulation is proposed. The SIFLC utilizes the signed distance method that reduces the multidimensional rule table to 1-D with only one input variable, i.e., distance d. The simplification allows...... for the control surface to be approximated by a piecewise linear. It is shown that, despite the simplicity of SIFLC, its control performance is almost equivalent to that of the conventional FLC. As a proof of concept, the SIFLC is implemented using the Altera EP2C35F672C6N field-programmable gate array (FPGA......) and applied on a 50-W boost converter. The SIFLC is compared to the proportional-integral controller; the simulation and practical results indicate that SIFLC exhibits excellent performance for step load and input reference changes. Another feature of this work is the absence of an external analog...

  2. A 16 channel VLSI chip, containing charge amplifier and analog to digital converter, for readout of highly granular particle detectors

    NARCIS (Netherlands)

    Barlag, C; Carlen, L; El Chenawi, K; Garpman, S; Gustafsson, HA; Gustafsson, S; Heine, N; Kampert, KH; Louw, S; Lohner, H; Oskarsson, A; Otterlund, [No Value; Reygers, K; Stenlund, E; Svensson, T; Sundblad, R; Soderstrom, K; Osterman, L

    1998-01-01

    An integrated circuit for readout of particle detectors, producing a charge signal has been developed. The circuit contains 16 channels of charge integration, sample and hold amplifier, followed by an analog multiplexer. The charge content of each channel is digitized, one by one, by a 6 bit

  3. Design of a low-power flash analog-to-digital converter chip for temperature sensors in 0.18 µm CMOS process

    Directory of Open Access Journals (Sweden)

    Al Al

    2015-01-01

    Full Text Available Current paper proposes a simple design of a 6-bit flash analog-to-digital converter (ADC by process in 0.18 μm CMOS. ADC is expected to be used within a temperature sensor which provides analog data output having a range of 360 mV to 560 mV. The complete system consisting of three main blocks, which are the threshold inverter quantization (TIQ-comparator, the encoder and the parallel input serial output (PISO register. The TIQ-comparator functions as quantization of the analog data to the thermometer code. The encoder converts this thermometer code to 6-bit binary code and the PISO register transforms the parallel data into a data series. The design aims to get a flash ADC on low power dissipation, small size and compatible with the temperature sensors. The method is proposed to set each of the transistor channel length to find out the threshold voltage difference of the inverter on the TIQ comparator. A portion design encoder and PISO registers circuit selected a simple circuit with the best performance from previous studies and adjusted to this system. The design has an input range of 285 to 600 mV and 6-bit resolution output. The chip area of the designed ADC is 844.48 x 764.77 µm2 and the power dissipation is 0.162 µW with 1.6 V supply voltage.

  4. Apple interface for experimental instrumentation and control-Pulse counter, timer, digital-to-analog converter, step motor and relays

    International Nuclear Information System (INIS)

    Souza, J.H.; Cernicchiaro, G.R.C.; Cavalcante, J.T.P.D.

    1989-01-01

    An interface plate for Apple II type microcomputer developed aiming to automatize measuring systems in which a TTL pulse counter, output of analogic voltage (with resolution of 12 bits), out put of step-motor control, relay drive, and timer for real time control, are necessary to carry-out the parallel tasks, is described. An application of this plate to a thermoluminescence reader is also presented. (M.C.K.) [pt

  5. Estimation of channel mismatches in time-interleaved analog-to-digital converters based on fractional delay and sine curve fitting.

    Science.gov (United States)

    Guo, Lianping; Tian, Shulin; Jiang, Jun

    2015-03-01

    This paper proposes an algorithm to estimate the channel mismatches in time-interleaved analog-to-digital converter (TIADC) based on fractional delay (FD) and sine curve fitting. Choose one channel as the reference channel and apply FD to the output samples of reference channel to obtain the ideal samples of non-reference channels with no mismatches. Based on least square method, the sine curves are adopted to fit the ideal and the actual samples of non-reference channels, and then the mismatch parameters can be estimated by comparing the ideal sine curves and the actual ones. The principle of this algorithm is simple and easily understood. Moreover, its implementation needs no extra circuits, lowering the hardware cost. Simulation results show that the estimation accuracy of this algorithm can be controlled within 2%. Finally, the practicability of this algorithm is verified by the measurement results of channel mismatch errors of a two-channel TIADC prototype.

  6. A CAMAC unit for charge measuring and pulse shape recording based on a fast, 8-bit parallel analog-to-digital converter

    International Nuclear Information System (INIS)

    Kulka, Z.; Kreciejewski, M.; Nadachowski, M.

    1990-08-01

    A device designed mainly for measuring systems for testing parameters of some type of detectors used in the high energy physics is described. The device is one-module CAMAC unit. It is equipped in a fast, 8-bit parallel analog-to-digital converter ''flash''type with a gated integrator at the input and a static RAM (4096 x 8 bit) at the output. The device enables measurements of the charge in pulses from detectors or registration of the shape of these pulses. The construction, operation and parameters of the circuits of the device are described and the way of programming functions using CAMAC dataway is given. 8 refs., 9 figs. (author)

  7. Analog to digital conversion for nuclear spectrometry

    International Nuclear Information System (INIS)

    Carvalho, P.V.R. de.

    1982-04-01

    A study of the analog to digital conversion techniques for nuclear spectrometry is presented and the main design philosophies of nuclear ADC's are compared. Among them, the most suitable for the current Brazilian conditions, concerning the specifications and components avaiability is the one that employs a statistical correction of successive approximation converters. This technique is described in full detail. A prototype has been developed an tested for the practical demonstration of the theoretical conclusions. These tests was carried on nuclear spectrometry data aquisition system whose implementation is also described. (Author) [pt

  8. Current pulses sampling by flash analog/digital converters and evaluation of the method

    International Nuclear Information System (INIS)

    Jolly, A.

    1987-06-01

    The electronic equipment of the 4π steradian Diogene detector uses the following principle: an analog and time controlled integration is applied to the signal. Since this integration remains active during a fixed time, double track resolution perfomance is limited. The probability of piled up pulses increases with the multiplicity of events detected in drift chambers. This induces wrong values for informations the current division method gives. To allow the separation and the treatment of each pulse, the envelope over a wellknown baseline must be acquired. So we develop a sampling system around Flash Analog/Digital Converters. First, we calculate the standard deviation in the measurement of the Z position along sensitive wires in the detector, as a result of digitization error. Calculations allow us to choose parameters and the number of coding bits we need in 3 possible coding shemes. We show that a cascade, (7 bits) built with 2 Flash converters in front of which a logarithmic transfer fonction is inserted, makes amplitude dynamic compatible with Z position measure. Then, we propose some solutions to realize the prototype, to resolve electronic problems concerning synchronism and high frequencies requirements. At last, a test sequency is performed to characterize the quality obtained. Clock and logic circuits parasitic signals influence, differential linearity and typical pulses reproducibility determine the highest suitable sampling frequency, equal to 83 MHz [fr

  9. High-resolution W-band ISAR imaging system utilizing a logic-operation-based photonic digital-to-analog converter.

    Science.gov (United States)

    Peng, Shaowen; Li, Shangyuan; Xue, Xiaoxiao; Xiao, Xuedi; Wu, Dexin; Zheng, Xiaoping; Zhou, Bingkun

    2018-01-22

    W-band inverse synthetic aperture radar (ISAR) imaging systems are very useful for automatic target recognition and classification due to their high spatial resolution, high penetration and small antenna size. Broadband linear frequency modulated wave (LFMW) is usually applied to this system for its de-chirping characteristic. However, nearly all of the LFMW generated in electronic W-band ISAR system are based on multipliers and mixers, suffering seriously from electromagnetic interference (EMI) and timing jitter. And photonic-assisted LFMW generator reported before is always limited by bandwidth or time aperture. In this paper, for the first time, we propose and experimentally demonstrate a high-resolution W-band ISAR imaging system utilizing a novel logic-operation-based photonic digital-to-analog converter (LOPDAC). The equivalent sampling rate of the LOPDAC is twice as large as the rate of the digital driving signal. Thus, a broadband LFMW with a large time aperture can be generated by the LOPDAC. This LFMW is up-converted to W band with an optical frequency comb. After photonic-assisted de-chirping processing and data processing to the echo, a high-resolution two-dimension image can be obtained. Experimentally, W-band radar with a time-bandwidth product (TBWP) as large as 79200 (bandwidth 8 GHz; temporal duration 9.9 us) is established and investigated. Results show that the two-dimension (range and cross-range) imaging resolution is ~1.9 cm × ~1.6 cm with a sampling rate of 100 MSa/s in the receiver.

  10. Design and implementation of a platform for experimental testing and validation of analog-to-digital converters: static and dynamic parameters

    Directory of Open Access Journals (Sweden)

    Mansour Imen Ben

    2017-01-01

    Full Text Available This paper presents an implementation of a data acquisition system for analog-to-digital converters (ADCs using “Laboratory Virtual Instrument Engineering Workbench (LabVIEW” as software for data analysis. The designed and implemented platform allows interaction with the device under test through means of data acquisition and instrument controls. Developing custom tests in LabVIEW can result in reduced test time, which in turn will help reduce costs in testing. This system was developed for evaluation purposes of ADC's static and dynamic parameters (gain error, offset error, DNL, INL, SNR, SINAD, IMD, etc. using single and multi-frequency signals. The virtual control and analysis instrument was created in “LabVIEW” environment to control test signals generation and data acquisition. The testing performance of the platform is demonstrated using the classical ADC circuit “ADC0804”. A comparison with experimental results obtained by CANTEST platform from Bordeaux University (France is also presented to highlight our platform.

  11. A 515 nW, 0-18 dB Programmable Gain Analog-to-Digital Converter for In-Channel Neural Recording Interfaces.

    Science.gov (United States)

    Rodriguez-Perez, Alberto; Delgado-Restituto, Manuel; Medeiro, Fernando

    2014-06-01

    This paper presents a low-area low-power Switched-Capacitor (SC)-based Programmable-Gain Analog-to-Digital Converter (PG-ADC) suitable for in-channel neural recording applications. The PG-ADC uses a novel implementation of the binary search algorithm that is complemented with adaptive biasing techniques for power saving. It has been fabricated in a standard CMOS 130 nm technology and only occupies 0.0326 mm(2). The PG-ADC has been optimized to operate under two different sampling modes, 27 kS/s and 90 kS/s. The former is tailored for raw data conversion of neural activity, whereas the latter is used for the on-the-fly feature extraction of neural spikes. Experimental results show that, under a voltage supply of 1.2 V, the PG-ADC obtains an ENOB of 7.56 bit (8-bit output) for both sampling modes, regardless of the gain setting. The amplification gain can be programmed from 0 to 18 dB. The power consumption of the PG-ADC at 90 kS/s is 1.52 μW with a FoM of 89.49 fJ/conv, whereas at 27 kS/s it consumes 515 nW and obtains a FoM of 98.31 fJ/conv .

  12. Analog-to-digital conversion using custom CMOS analog memory for the EOS time projection chamber

    International Nuclear Information System (INIS)

    Lee, K.L.; Arthur, A.A.; Jones, R.W.; Matis, H.S.; Nakamura, M.; Kleinfelder, S.A.; Ritter, H.G.; Wienman, H.H.

    1990-01-01

    This paper describes the multiplexing scheme of custom CMOS analog memory integrated circuits, 16 channels x 256 cells, into analog to digital converters (ADC's) to handle 15,360 signal channels of a time projection, chamber detector system. Primary requirements of this system are high density, low power and large dynamic range. The analog memory device multiplexing scheme was designed to digitize the information stored in the memory cells. The digitization time of the ADC's and the settling times for the memory unit were carefully interleaved to optimize the performance and timing during the multiplexing operation. This kept the total number of ADC's, a costly and power dissipative component, to an acceptable minimum

  13. Ultra-High Speed Analog-to-Digital Converters in 14nm FinFET Process and Usage in Digital and Hybrid Phased Array Systems

    Science.gov (United States)

    2017-03-01

    insight into future trends. Background Phased array systems have been in existence for decades for use in radar, sonar , communications, and...factor of 2 raised to the measured ENOB as shown below; Where, The units for the Walden FoM are in Joules per conversion- step. As recently as...2008, typical values for the Walden FoM were approximately 1 to 3 pico-joules per conversion- step for converters operating at sample rates as high as 1

  14. A new approach for digital calibration of timing-mismatch in four-channels time-interleaved analog-to-digital converters

    International Nuclear Information System (INIS)

    Majdinasab, E; Farshidi, E

    2014-01-01

    In this paper employing fractional delay filter in farrow structure and a time delay block a new approach for digital calibration is described that corrects the timing mismatch between four interleaved channels. Fractional delay filter is a good candidate for bandlimited interpolation between samples and farrow structure filter is an efficient way to implement interpolation filter in which Lagrange polynomial approximation method is used for arbitrary sample rate change. In this work, the proposed method is employed for a four-channel ADC and can be applied for an arbitrary number of parallel channels. Simulation results show that after 40 ksamples, the mismatch error converges in detector and spurious components are suppressed after calibration by more than 40 dB

  15. Frequency to Voltage Converter Analog Front-End Prototype

    Science.gov (United States)

    Mata, Carlos; Raines, Matthew

    2012-01-01

    The frequency to voltage converter analog front end evaluation prototype (F2V AFE) is an evaluation board designed for comparison of different methods of accurately extracting the frequency of a sinusoidal input signal. A configurable input stage is routed to one or several of five separate, configurable filtering circuits, and then to a configurable output stage. Amplifier selection and gain, filter corner frequencies, and comparator hysteresis and voltage reference are all easily configurable through the use of jumpers and potentiometers.

  16. Inverter-based successive approximation capacitance-to-digital converter

    KAUST Repository

    Omran, Hesham

    2017-03-23

    An energy-efficient capacitance-to-digital converter (CDC) is provided that utilizes a capacitance-domain successive approximation (SAR) technique. Unlike SAR analog- to-digital converters (ADCs), analysis shows that for SAR CDCs, the comparator offset voltage will result in signal-dependent and parasitic-dependent conversion errors, which necessitates an op-amp-based implementation. The inverter-based SAR CDC contemplated herein provides robust, energy-efficient, and fast operation. The inverter- based SAR CDC may include a hybrid coarse-fine programmable capacitor array. The design of example embodiments is insensitive to analog references, and thus achieves very low temperature sensitivity without the need for calibration. Moreover, this design achieves improved energy efficiency.

  17. Full-Circle Resolver-to-Linear-Analog Converter

    Science.gov (United States)

    Alhorn, Dean C.; Smith, Dennis A.; Howard, David E.

    2005-01-01

    A circuit generates sinusoidal excitation signals for a shaft-angle resolver and, like the arctangent circuit described in the preceding article, generates an analog voltage proportional to the shaft angle. The disadvantages of the circuit described in the preceding article arise from the fact that it must be made from precise analog subcircuits, including a functional block capable of implementing some trigonometric identities; this circuitry tends to be expensive, sensitive to noise, and susceptible to errors caused by temperature-induced drifts and imprecise matching of gains and phases. These disadvantages are overcome by the design of the present circuit. The present circuit (see figure) includes an excitation circuit, which generates signals Ksin(Omega(t)) and Kcos(Omega(t)) [where K is an amplitude, Omega denotes 2(pi)x a carrier frequency (the design value of which is 10 kHz), and t denotes time]. These signals are applied to the excitation terminals of a shaft-angle resolver, causing the resolver to put out signals C sin(Omega(t)-Theta) and C cos(Omega(t)-Theta). The cosine excitation signal and the cosine resolver output signal are processed through inverting comparator circuits, which are configured to function as inverting squarers, to obtain logic-level or square-wave signals .-LL[cos(Omega(t)] and -LL[cos(Omega(t)-Theta)], respectively. These signals are fed as inputs to a block containing digital logic circuits that effectively measure the phase difference (which equals Theta between the two logic-level signals). The output of this block is a pulse-width-modulated signal, PWM(Theta), the time-averaged value of which ranges from 0 to 5 VDC as Theta ranges from .180 to +180deg. PWM(Theta) is fed to a block of amplifying and level-shifting circuitry, which converts the input PWM waveform to an output waveform that switches between precise reference voltage levels of +10 and -10 V. This waveform is processed by a two-pole, low-pass filter, which removes

  18. An introduction to analog and digital communications

    CERN Document Server

    Haykin, Simon

    2012-01-01

    The second edition of this accessible book provides readers with an introductory treatment of communication theory as applied to the transmission of information-bearing signals. While it covers analog communications, the emphasis is placed on digital technology. It begins by presenting the functional blocks that constitute the transmitter and receiver of a communication system. Readers will next learn about electrical noise and then progress to multiplexing and multiple access techniques.

  19. Wide-range charge-to-digital converter for a large-volume Cherenkov detector

    International Nuclear Information System (INIS)

    Potapov, G.A.; Penin, I.V.

    1986-01-01

    Block-diagram of the three-channel FEhU-49B converter of short-range pulse-response for Cherenkov radiation in the 10 6 dynamic range supplied to the input of the K113PV1 10-digit analog-to-digital converter is considered. The converter comprises three analog coordination systems, a system for selection and commutation of data channel and an analog-to-digital converter. The analog data channel represents in-series communication of three-cascade integrating amplifier and a two-cascade amplitude detector. The coefficient of analog channel conversion equals 400 mV/pC. Minimum duration of registered pulses is 10 ns. The equated noise is 200 nA. The dynamic range of channel linearity is 10 3 . The detection threshold of the peak detector is 10 mV. Delay time of information dinode commutation is 200 ns

  20. Efficiency and hardware comparison of analog control-based and digital control-based 70 W two-stage power factor corrector and DC-DC converters

    DEFF Research Database (Denmark)

    Török, Lajos; Munk-Nielsen, Stig

    2011-01-01

    A comparison of an analog and a digital controller driven 70 W two-stage power factor corrector converter is presented. Both controllers are operated in average current-mode-control for the PFC and peak current control for the DC-DC converter. Digital controller design and converter modeling...... is described. Results show that digital control can compete with the analog one in efficiency, PFC and THD....

  1. Efficiency and hardware comparison of analog control-based and digital control-based 70 W two-stage power factor corrector and DC-DC converters

    DEFF Research Database (Denmark)

    Török, Lajos; Munk-Nielsen, Stig

    2011-01-01

    A comparison of an analog and a digital controller driven 70 W two-stage power factor corrector converter is presented. Both controllers are operated in average current-mode-control for the PFC and peak current control for the DC-DC converter. Digital controller design and converter modeling is d...... is described. Results show that digital control can compete with the analog one in efficiency, PFC and THD.......A comparison of an analog and a digital controller driven 70 W two-stage power factor corrector converter is presented. Both controllers are operated in average current-mode-control for the PFC and peak current control for the DC-DC converter. Digital controller design and converter modeling...

  2. A Methodology to Teach Advanced A/D Converters, Combining Digital Signal Processing and Microelectronics Perspectives

    Science.gov (United States)

    Quintans, C.; Colmenar, A.; Castro, M.; Moure, M. J.; Mandado, E.

    2010-01-01

    ADCs (analog-to-digital converters), especially Pipeline and Sigma-Delta converters, are designed using complex architectures in order to increase their sampling rate and/or resolution. Consequently, the learning of ADC devices also encompasses complex concepts such as multistage synchronization, latency, oversampling, modulation, noise shaping,…

  3. Dual charge-to-digital converter type CAMAC 715

    International Nuclear Information System (INIS)

    Kreciejewski, M.; Kulka, Z.

    1986-05-01

    A dual two input 10 bit resolution charge-to-digital converter type 715 is described. It enables digital measurement of charges carried by nanosecond current pulses from two ionizing radiation detectors. Input current pulses are first gated by high-speed linear gates and then are integrated. Resulting amplitudes of voltage pulses are converted with use of Wilkinson rundown technique. A principle of operation as well as a design and performance of charge digitizer are described. The 715 converter is intended mainly for digital n-γ pulse shape discrimination. 8 refs., 4 figs. (author)

  4. A Novel Cyclic Time to Digital Converter Based on Triple-Slope Interpolation and Time Amplification

    Directory of Open Access Journals (Sweden)

    M. Rezvanyvardom

    2015-09-01

    Full Text Available This paper investigates a novel cyclic time-to-digital converter (TDC which employs triple-slope analog interpolation and time amplification techniques for digitizing the time interval between the rising edges of two input signals(Start and Stop. The proposed converter will be a 9-bit cyclic time-to-digital converter that does not use delay lines in its structure. Therefore, it has a low sensitivity to temperature, power supply and process (PVT variations. The other advantages of the proposed converter are low circuit complexity, and high accuracy compared with the time-to-digital converters that have previously been proposed. Also, this converter improves the time resolution and the dynamic range. In the same resolution, linear range and dynamic range, the proposed cyclic TDC reduces the number of circuit elements compared with the converters that have a similar circuit structure. Thus, the converter reduces the chip area, the power consumption and the figure of merit (FoM. In this converter, the integral nonlinearity (INL and differential nonlinearity (DNL errors are reduced. In order to evaluate the idea, the proposed time-to-digital converter is designed in TSMC 45 nm CMOS technology and simulated. Comparison of the theoretical and simulation results confirms the benefits of the proposed TDC.

  5. Converting Taxonomic Descriptions to New Digital Formats

    Directory of Open Access Journals (Sweden)

    Hong Cui

    2008-01-01

    Full Text Available Abstract.--The majority of taxonomic descriptions is currently in print format. The majority of digital descriptions are in formats such as DOC, HTML, or PDF and for human readers. These formats do not convey rich semantics in taxonomic descriptions for computer-aided process. Newer digital formats such as XML and RDF accommodate semantic annotations that allow computers to process the rich semantics on human's behalf, thus open up opportunities for a wide range of innovative usages of taxonomic descriptions, such as searching in more precise and flexible ways, integrating with gnomic and geographic information, generating taxonomic keys automatically, and text data mining and information visualization etc. This paper discusses the challenges in automated conversion of multiple collections of descriptions to XML format and reports an automated system, MARTT. MARTT is a machine-learning system that makes use of training examples to tag new descriptions into XML format. A number of utilities are implemented as solutions to the challenges. The utilities are used to reduce the effort for training example preparation, to facilitate the creation of a comprehensive schema, and to predict system performance on a new collection of descriptions. The system has been tested with several plant and alga taxonomic publications including Flora of China and Flora of North America.

  6. Doubling-resolution analog-to-digital conversion based on PIC18F45K80

    Directory of Open Access Journals (Sweden)

    Yueyang Yuan

    2014-08-01

    Full Text Available Aiming at the analog signal being converted into the digital with a higher precision, a method to improve the analog-to-digital converter (ADC resolution is proposed and described. Based on the microcomputer PIC18F45K80 in which the internal ADC modules are embedded, a circuit is designed for doubling the resolution of ADC. According to the circuit diagram, the mathematical formula for calculating this resolution is derived. The corresponding software and print circuit board assembly is also prepared. With the experiment, a 13 bit ADC is achieved based on the 12 bit ADC module predesigned in the PIC18F45K80.

  7. Method and apparatus for low power analog-to-digital conversion

    Science.gov (United States)

    De Geronimo, Gianluigi; Nambiar, Neena

    2013-10-01

    A method and apparatus for analog-to-digital conversion. An Analog-to-Digital Converter (ADC) includes M ADC.sub.j, j=1, 2, . . . , M. Each ADC.sub.j comprises a number of cells each of which comprises a first switch, a second switch, a current sink and an inverter. An inverter of a cell in an ADC.sub.j changes state in response to a current associate with an input signal of the ADC.sub.j exceeding a threshold, thus switching on the next cell. Each ADC.sub.j is enabled to perform analog-to-digital conversion on a residual current of a previous ADC.sub.j-1 after the previous ADC.sub.j-1 has completed its analog-to-digital conversion and has been disabled.

  8. Sub-picosecond Resolution Time-to-Digital Converter

    Energy Technology Data Exchange (ETDEWEB)

    Bratov, Vladimir [Advanced Science and Novel Technology Company, Rancho Palos Verdes, CA (United States); Katzman, Vladimir [Advanced Science and Novel Technology Company, Rancho Palos Verdes, CA (United States); Binkley, Jeb [Advanced Science and Novel Technology Company, Rancho Palos Verdes, CA (United States)

    2006-03-30

    Time-to-digital converters with sub-picosecond resolutions are needed to satisfy the requirements of time-on-flight measurements of the next generation of high energy and nuclear physics experiments. The converters must be highly integrated, power effective, low cost, and feature plug-and-play capabilities to handle the increasing number of channels (up to hundreds of millions) in future Department of Energy experiments. Current state-off-the-art time-to-digital converter integrated circuits do not have the sufficient degree of integration and flexibility to fulfill all the described requirements. During Phase I, the Advanced Science and Novel Technology Company in cooperation with the nuclear physics division of the Oak Ridge National Laboratory has developed the architecture of a novel time-to-digital converter with multiple channels connected to an external processor through a special interfacing block and synchronized by clock signals generated by an internal phase-locked loop. The critical blocks of the system including signal delay lines and delay-locked loops with proprietary differential delay cells, as well as the required digital code converter and the clock period counter have been designed and simulated using the advanced SiGe120 BiCMOS technological process. The results of investigations demonstrate a possibility to achieve the digitization accuracy within 1ps. ADSANTEC has demonstrated the feasibility of the proposed concept in computer simulations. The proposed system will be a critical component for the next generation of NEP experiments.

  9. Low-Power, Low-Voltage Analog to Digital ΣΔ

    DEFF Research Database (Denmark)

    Wismar, Ulrik Sørensen

    2007-01-01

    implementations of audio band modulators used as CMOS analog to digital converters. The intended application is hearing aids where analog to digital converters are used to convert the preamplied signal from a microphone into a digital signal which is fed into a microprocessor. A hearing aid is battery driven......, and since long operation time is required, low supply voltage and low power consumption are of paramount importance. Consequently, various topologies have been compared to nd the most power ecient audio frequency modulator topology. Chapter 4 of this thesis compares power consumption of two of the most...... prevalent topologies, the single-loop modulator with integration in discrete time and the single-loop modulator with integration in continuous time. Both modulator topologies are with feedback, and all intermediate signals are in the voltage mode. Chapter 5 treats a modulator without feedback. Another...

  10. A slow-speed multiple-channel analog-to-digital data logging system

    Science.gov (United States)

    Lloyd, T. C.; Flaherty, B. J.

    1973-01-01

    The system was developed to record from one up to a maximum of sixteen channels of analog data onto magnetic tape. Each analog channel of data can be sampled at rates of 1, 2, 6, 12, or 60 times per minute. The system is divided into three subunits: a digital clock, an incremental magnetic tape recorder, and a sequential converter. The interfacing requirements of these subunits are presented.

  11. A high speed digital-to-analogue converter

    International Nuclear Information System (INIS)

    Hallgren, B.I.

    1974-02-01

    An 8-bit Digital-to-Analogue converter of the current-weighting type has been constructed using 8 monolithic integrated circuit transistor arrays -one for each bit. The D/A-converter has a voltage output within the range 0 to -2V. The settling time to within half of the least significant bit is about 50 nsec. The temperature dependence and transient response of the converter has been analysed using computer aided design techniques. A comparison is made between the experimental and simulated transient performance. (Auth.)

  12. Wide-band charge-to-digital converter

    International Nuclear Information System (INIS)

    Kantserov, V.A.; Strigin, V.B.

    1987-01-01

    CAMAC two-channel charge-to-digital converter on the base of KR1101PD1 microcircuits, is described. Code length of the converter is 11 bits, conversion time makes up 112 μs, sensitivity is equal to 0.25 p cal./channel, integral non-linearity is 0.1%. The converter may be used in different branches both in multichannel data acquisition/processing systems for pulsed signal coding and at fixed gate for measuring constant or slowly varying voltages

  13. CMOS based capacitance to digital converter circuit for MEMS sensor

    Science.gov (United States)

    Rotake, D. R.; Darji, A. D.

    2018-02-01

    Most of the MEMS cantilever based system required costly instruments for characterization, processing and also has large experimental setups which led to non-portable device. So there is a need of low cost, highly sensitive, high speed and portable digital system. The proposed Capacitance to Digital Converter (CDC) interfacing circuit converts capacitance to digital domain which can be easily processed. Recent demand microcantilever deflection is part per trillion ranges which change the capacitance in 1-10 femto farad (fF) range. The entire CDC circuit is designed using CMOS 250nm technology. Design of CDC circuit consists of a D-latch and two oscillators, namely Sensor controlled oscillator (SCO) and digitally controlled oscillator (DCO). The D-latch is designed using transmission gate based MUX for power optimization. A CDC design of 7-stage, 9-stage and 11-stage tested for 1-18 fF and simulated using mentor graphics Eldo tool with parasitic. Since the proposed design does not use resistance component, the total power dissipation is reduced to 2.3621 mW for CDC designed using 9-stage SCO and DCO.

  14. New system for digital to analog transformation and reconstruction of 12-lead ECGs.

    Science.gov (United States)

    Kothadia, Roshni; Kulecz, Walter B; Kofman, Igor S; Black, Adam J; Grier, James W; Schlegel, Todd T

    2013-01-01

    We describe initial validation of a new system for digital to analog conversion (DAC) and reconstruction of 12-lead ECGs. The system utilizes an open and optimized software format with a commensurately optimized DAC hardware configuration to accurately reproduce, from digital files, the original analog electrocardiographic signals of previously instrumented patients. By doing so, the system also ultimately allows for transmission of data collected on one manufacturer's 12-lead ECG hardware/software into that of any other. To initially validate the system, we compared original and post-DAC re-digitized 12-lead ECG data files (∼5-minutes long) in two types of validation studies in 10 patients. The first type quantitatively compared the total waveform voltage differences between the original and re-digitized data while the second type qualitatively compared the automated electrocardiographic diagnostic statements generated by the original versus re-digitized data. The grand-averaged difference in root mean squared voltage between the original and re-digitized data was 20.8 µV per channel when re-digitization involved the same manufacturer's analog to digital converter (ADC) as the original digitization, and 28.4 µV per channel when it involved a different manufacturer's ADC. Automated diagnostic statements generated by the original versus reconstructed data did not differ when using the diagnostic algorithm from the same manufacturer on whose device the original data were collected, and differed only slightly for just 1 of 10 patients when using a third-party diagnostic algorithm throughout. Original analog 12-lead ECG signals can be reconstructed from digital data files with accuracy sufficient for clinical use. Such reconstructions can readily enable automated second opinions for difficult-to-interpret 12-lead ECGs, either locally or remotely through the use of dedicated or cloud-based servers.

  15. Analog-to-digital conversion to accommodate the dynamics of live music in hearing instruments.

    Science.gov (United States)

    Hockley, Neil S; Bahlmann, Frauke; Fulton, Bernadette

    2012-09-01

    Hearing instrument design focuses on the amplification of speech to reduce the negative effects of hearing loss. Many amateur and professional musicians, along with music enthusiasts, also require their hearing instruments to perform well when listening to the frequent, high amplitude peaks of live music. One limitation, in most current digital hearing instruments with 16-bit analog-to-digital (A/D) converters, is that the compressor before the A/D conversion is limited to 95 dB (SPL) or less at the input. This is more than adequate for the dynamic range of speech; however, this does not accommodate the amplitude peaks present in live music. The hearing instrument input compression system can be adjusted to accommodate for the amplitudes present in music that would otherwise be compressed before the A/D converter in the hearing instrument. The methodology behind this technological approach will be presented along with measurements to demonstrate its effectiveness.

  16. Twenty five channel time-to-digital converter

    International Nuclear Information System (INIS)

    Vedeneev, O.V.; Matsenov, S.I.; Chernykh, R.I.

    1985-01-01

    A 25-channel digital-time converter designed for measuring time delay of particles in cosmic-ray extensive air showers is described. 25 scintillation detectors with 1x0.5x0.05 m overall dimension, placed on the square of 0.5 km 2 , are used to detect air showers. The events are selected by fourfold signal coincidences from specific combinations of scintillation detectors. The event counting rate is approximately 40 hsup(-1). The range of time interval measurements is 150 ns - 6.4 μs. Measurement accuracy is 38 ns at integral nonlinearity of about 1%. Converter temperature instability is 0.003%/C. Probability of failure is 2x10sup(-4) hsup(-1)

  17. Comparison of properties of amplitude-to-digital converters

    International Nuclear Information System (INIS)

    Dryak, P.; Tluchor, D.; JIranek, V.

    1986-01-01

    Integral linearity and the profile of the channel were measured for amplitude-to-digital converters manufactured by CANBERRA, ORTEC, NUCLEAR DATA, TRACOR and TESLA. For some of them differential linearity was also measured. Pulse generator ORTEC 448 was used for determining the parameters. The channel profile was determined only for a short stretch of ca 10 channels in the region of half the range of input amplitudes. The same shape of pulses with a leading edge of 500 ns and a time constant of 5 μs was always used. Graphs are presented of the deviations of the tested converters from linearity and of channel profiles. (M.D.) 2 tabs., 25 figs

  18. Frequency to digital converter for IUAC Linac control system

    International Nuclear Information System (INIS)

    Jain, Mamta; Subramaiam, E.T.; Sahu, B.K.

    2015-01-01

    A frequency to digital converter CAMAC module has been designed and developed for LINAC control systems. This module is used to see the frequency difference of master clock and the resonator frequency digitally without using the oscilloscope. Later on this can be used for automatic tuning and locking of the cavities using piezoelectric actuator based tunner control. This module has eight independent channels to fulfill the need of all the eight cavities of the cryostat. A Schmitt trigger along with level converaccepts almost any form of pulse train, with 30 Vp-p. The time period is measured by counters clocked from a high resolution clock (10 MHz +/- 250 ps). The counter values are cross checked at both the input levels. Frequency is obtained from the computed time period by a special divisor core implemented inside the FPGA. The major task was the implementation of eight individual divisor cores and routing inside one Spartan 3s500E FPGA chip

  19. Implementation of Power Efficient Flash Analogue-to-Digital Converter

    Directory of Open Access Journals (Sweden)

    Taninki Sai Lakshmi

    2014-01-01

    Full Text Available An efficient low power high speed 5-bit 5-GS/s flash analogue-to-digital converter (ADC is proposed in this paper. The designing of a thermometer code to binary code is one of the exacting issues of low power flash ADC. The embodiment consists of two main blocks, a comparator and a digital encoder. To reduce the metastability and the effect of bubble errors, the thermometer code is converted into the gray code and there after translated to binary code through encoder. The proposed encoder is thus implemented by using differential cascade voltage switch logic (DCVSL to maintain high speed and low power dissipation. The proposed 5-bit flash ADC is designed using Cadence 180 nm CMOS technology with a supply rail voltage typically ±0.85 V. The simulation results include a total power dissipation of 46.69 mW, integral nonlinearity (INL value of −0.30 LSB and differential nonlinearity (DNL value of −0.24 LSB, of the flash ADC.

  20. Analog and digital signal analysis from basics to applications

    CERN Document Server

    Cohen Tenoudji, Frédéric

    2016-01-01

    This book provides comprehensive, graduate-level treatment of analog and digital signal analysis suitable for course use and self-guided learning. This expert text guides the reader from the basics of signal theory through a range of application tools for use in acoustic analysis, geophysics, and data compression. Each concept is introduced and explained step by step, and the necessary mathematical formulae are integrated in an accessible and intuitive way. The first part of the book explores how analog systems and signals form the basics of signal analysis. This section covers Fourier series and integral transforms of analog signals, Laplace and Hilbert transforms, the main analog filter classes, and signal modulations. Part II covers digital signals, demonstrating their key advantages. It presents z and Fourier transforms, digital filtering, inverse filters, deconvolution, and parametric modeling for deterministic signals. Wavelet decomposition and reconstruction of non-stationary signals are also discussed...

  1. MASMA: a versatile multifunctional unit (gated window amplifier, analog memory, and height-to-time converter)

    International Nuclear Information System (INIS)

    Goursky, V.; Thenes, P.

    1969-01-01

    This multipurpose unit is designed to accomplish one of the following functions: - gated window amplifier, - Analog memory and - Amplitude-to-time converter. The first function is mainly devoted to improve the poor resolution of pulse-height analyzers with a small number of channels. The analog memory, a new function in the standard range of plug-in modules, is capable of performing a number of operations: 1) fixed delay, or variable delay dependent on an external parameter (application to the analog processing of non-coincident pulses), 2) de-randomiser to increase the efficiency of the pulse height analysis in a spectrometry experiment, 3) linear multiplexer to allow an analyser to serve as many spectrometry devices as memory elements that it possesses. Associated with a coding scaler, this unit, if used as a amplitude-to-time converter, constitutes a Wilkinson A.D.C with a capability of 10 bits (or more) and with a 100 MHz clock frequency. (authors) [fr

  2. Converting To Digital Library in Banking Organizations : Case Study For Library of Central Bank of Libya

    Directory of Open Access Journals (Sweden)

    Asmaa Basher Abou Louefa

    2005-05-01

    Full Text Available A Case study For Library of Central Bank of Libya, it deals the converting to a digital library. It start with an introduction about digital libraries, and technology in libraries, then deal Library of Central Bank of Libya, and it current situation, then states the plan to be converted to digital library.

  3. Analogue to Digital and Digital to Analogue Converters (ADCs and DACs): A Review Update

    CERN Document Server

    Pickering, J.

    2015-06-15

    This is a review paper updated from that presented for CAS 2004. Essentially, since then, commercial components have continued to extend their performance boundaries but the basic building blocks and the techniques for choosing the best device and implementing it in a design have not changed. Analogue to digital and digital to analogue converters are crucial components in the continued drive to replace analogue circuitry with more controllable and less costly digital processing. This paper discusses the technologies available to perform in the likely measurement and control applications that arise within accelerators. It covers much of the terminology and 'specmanship' together with an application-oriented analysis of the realisable performance of the various types. Finally, some hints and warnings on system integration problems are given.

  4. From Analog to Digital Medias in Early Childhood Education

    DEFF Research Database (Denmark)

    Brandt, Erika Zimmer

    2015-01-01

    Research aims: The aim of the study is to explore how the encounters between children and their educators alter when the media changes from analog to digital. Relationship to previous research works Tablets and other handheld, electronic devices has become part of everyday life in kindergartens...... Considerations: A changed media environment reveals a kind of social vacuum. Educators find themselves lacking norms for how to interact in this new reality. This lack of knowhow and experience in this specific area of professionalism creates uncertainty and vulnerability in the informants which require micro...... ethical considerations. Main finding or discussion: The choice of media in educational practice seems to affect not only the horizon of possible topics in dialogue between children and their educators but also seem to affect the ways that topics are being introduced and discussed in the dialogue...

  5. Capacitive digital-to-analogue converters with least significant bit down in differential successive approximation register ADCs

    Directory of Open Access Journals (Sweden)

    Lei Sun

    2014-01-01

    Full Text Available This Letter proposes a least significant bit-down switching scheme in the capacitive digital-to-analogue converters (CDACs of successive approximation register analog-to-digital converter (ADC. Under the same unit capacitor, the chip area and the switching energy are halved without increasing the complexity of logic circuits. Compared with conventional CDAC, when it is applied to one of the most efficient switching schemes, V(cm-based structure, it achieves 93% less switching energy and 75% less chip area with the same differential non linearity (DNL/integral non linearity (INL performance.

  6. Digital parallel-to-series pulse-train converter

    Science.gov (United States)

    Hussey, J.

    1971-01-01

    Circuit converts number represented as two level signal on n-bit lines to series of pulses on one of two lines, depending on sign of number. Converter accepts parallel binary input data and produces number of output pulses equal to number represented by input data.

  7. Transitioning from Analog to Digital Audio Recording in Childhood Speech Sound Disorders

    Science.gov (United States)

    Shriberg, Lawrence D.; Mcsweeny, Jane L.; Anderson, Bruce E.; Campbell, Thomas F.; Chial, Michael R.; Green, Jordan R.; Hauner, Katherina K.; Moore, Christopher A.; Rusiewicz, Heather L.; Wilson, David L.

    2005-01-01

    Few empirical findings or technical guidelines are available on the current transition from analog to digital audio recording in childhood speech sound disorders. Of particular concern in the present context was whether a transition from analog- to digital-based transcription and coding of prosody and voice features might require re-standardizing…

  8. Audio Format Change From Analog to Digital Audio Using the Sony Sound Forge 9.0

    OpenAIRE

    Faisal Safrudin; Yulina Yulina, SKom, MMSI

    2007-01-01

    Changes in an audio analog to digital audio is not only useful in among the journalists or the journalists are also useful for general audiences though. In previous technology we encounter a lot of almost everyone uses the form of analog audio cassettes. Along with the development of technology, analog audio format is rarely used in the presence of digital audio, but it can be overcome by changing the format of analog audio to digital audio using Sony Sound Forge 9.0. The author will discuss ...

  9. High Channel Count Time-to-Digital Converter and Lasercom Processor, Phase II

    Data.gov (United States)

    National Aeronautics and Space Administration — High-channel-count, high-precision, and high-throughput time-to-digital converters (TDC) are needed to support detector arrays used in deep-space optical...

  10. 7.9 pJ/Step Energy-Efficient Multi-Slope 13-bit Capacitance-to-Digital Converter

    KAUST Repository

    Omran, Hesham

    2014-08-01

    In this brief, an energy-efficient capacitance-to-digital converter (CDC) is presented. The proposed CDC uses digitally controlled coarse-fine multi-slope integration to digitize a wide range of capacitance in short conversion time. Both integration current and frequency are scaled, which leads to significant improvement in the energy efficiency of both analog and digital circuitry. Mathematical analysis for circuit nonidealities, noise, and improvement in energy efficiency is provided. A prototype fabricated in a 0.35-μm CMOS process occupies 0.09 mm2 and consumes a total of 153 μA from 3.3 V supply while achieving 13-bit resolution. The operation of the prototype is experimentally verified using MEMS capacitive pressure sensor. Compared to recently published work, the prototype achieves an excellent energy efficiency of 7.9 pJ/Step. © 2004-2012 IEEE.

  11. 0.5 ns resolution, 8-bit time-to-digital converter with flash ADC

    International Nuclear Information System (INIS)

    Sobczynski, C.

    1987-01-01

    A two-channel time-to-digital converter based on an 8-bit flash ADC is presented. The full scale time range of 127.5 ns is digitized to 8 bits providing 500 ps time resolution. The conversion time per channel is less than 800 ns. The design is foreseen to be implemented into Fastbus. (orig.)

  12. A high-linearity digital-to-time converter technique: constant-slope charging

    NARCIS (Netherlands)

    Ru, Z.; Palattella, Claudia; Geraedts, P.F.J.; Klumperink, Eric A.M.; Nauta, Bram

    2015-01-01

    A digital-to-time converter (DTC) controls time delay by a digital code, which is useful, for example, in a sampling oscilloscope, fractional-N PLL, or time-interleaved ADC. This paper proposes constant-slope charging as a method to realize a DTC with intrinsically better integral non-linearity

  13. Converting Topographic Maps into Digital Form to Aid in Archeological Research in the Peten, Guatemala

    Science.gov (United States)

    Aldrich, Serena R.

    1999-01-01

    The purpose of my project was to convert a topographical map into digital form so that the data can be manipulated and easily accessed in the field. With the data in this particular format, Dr. Sever and his colleagues can highlight the specific features of the landscape that they require for their research of the ancient Mayan civilization. Digital elevation models (DEMs) can also be created from the digitized contour features adding another dimension to their research.

  14. Conversion of a servomanipulator from analog to digital control

    International Nuclear Information System (INIS)

    Killough, S.M.; Martin, H.L.; Hamel, W.R.

    1986-01-01

    Oak Ridge National Laboratory (ORNL) has developed expertise in computer control of force-reflecting master/slave servomanipulators as a result of research for the Consolidated Fuel Reprocessing Program. These computer control capabilities have been applied to a commercially available servomanipulator, the TeleOperator Systems SM-229. All of the servo drive and control circuitry has been replaced with commercially available digital controls and amplifiers, and a customer software - package has been developed at ORNL. This conversion to digital computer control resulted in significant improvements in force-reflection characteristics, ease of operation, diagnostic capabilities, indexing features, and potential increased reliability. The system will be used at the Tokamak Fusion Test Reactor at the Princeton Plasma Physics Laboratory (PPPL) for maintenance demonstrations

  15. Digital-Analog Hybrid Scheme and Its Application to Chaotic Random Number Generators

    Science.gov (United States)

    Yuan, Zeshi; Li, Hongtao; Miao, Yunchi; Hu, Wen; Zhu, Xiaohua

    2017-12-01

    Practical random number generation (RNG) circuits are typically achieved with analog devices or digital approaches. Digital-based techniques, which use field programmable gate array (FPGA) and graphics processing units (GPU) etc. usually have better performances than analog methods as they are programmable, efficient and robust. However, digital realizations suffer from the effect of finite precision. Accordingly, the generated random numbers (RNs) are actually periodic instead of being real random. To tackle this limitation, in this paper we propose a novel digital-analog hybrid scheme that employs the digital unit as the main body, and minimum analog devices to generate physical RNs. Moreover, the possibility of realizing the proposed scheme with only one memory element is discussed. Without loss of generality, we use the capacitor and the memristor along with FPGA to construct the proposed hybrid system, and a chaotic true random number generator (TRNG) circuit is realized, producing physical RNs at a throughput of Gbit/s scale. These RNs successfully pass all the tests in the NIST SP800-22 package, confirming the significance of the scheme in practical applications. In addition, the use of this new scheme is not restricted to RNGs, and it also provides a strategy to solve the effect of finite precision in other digital systems.

  16. Digital-to-biological converter for on-demand production of biologics.

    Science.gov (United States)

    Boles, Kent S; Kannan, Krishna; Gill, John; Felderman, Martina; Gouvis, Heather; Hubby, Bolyn; Kamrud, Kurt I; Venter, J Craig; Gibson, Daniel G

    2017-07-01

    Manufacturing processes for biological molecules in the research laboratory have failed to keep pace with the rapid advances in automization and parellelization. We report the development of a digital-to-biological converter for fully automated, versatile and demand-based production of functional biologics starting from DNA sequence information. Specifically, DNA templates, RNA molecules, proteins and viral particles were produced in an automated fashion from digitally transmitted DNA sequences without human intervention.

  17. Nyquist AD Converters, Sensor Interfaces, and Robustness Advances in Analog Circuit Design, 2012

    CERN Document Server

    Baschirotto, Andrea; Steyaert, Michiel

    2013-01-01

    This book is based on the presentations during the 21st workshop on Advances in Analog Circuit Design.  Expert designers provide readers with information about a variety of topics at the frontier of analog circuit design, including Nyquist analog-to-digital converters, capacitive sensor interfaces, reliability, variability, and connectivity.  This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.  Provides a state-of-the-art reference in analog circuit design, written by experts from industry and academia; Presents material in a tutorial-based format; Includes coverage of Nyquist A/D converters, capacitive sensor interfaces, reliability, variability, and connectivity.

  18. From Analog Prototypes to Digital Drawing in the Gallery

    Science.gov (United States)

    Nelson, Karen G.

    2011-01-01

    The "You Are Here" digital drawing interactive is one of the most successful interpretive elements in the renovated Oakland Museum of California Gallery of California Art. This interactive grew from considering how visitors could see themselves in the gallery and how visitor awareness of the creative process could be increased. The…

  19. A Temperature-to-Digital Converter Based on an Optimized Electrothermal Filter

    NARCIS (Netherlands)

    Kashmiri, S.M.; Xia, S.; Makinwa, K.A.A.

    2009-01-01

    This paper describes the design of a CMOS temperature-to-digital converter (TDC). It operates by measuring the temperature-dependent phase shift of an electrothermal filter (ETF). Compared to previous work, this TDC employs an ETF whose layout has been optimized to minimize the thermal phase spread

  20. A 33fJ/Step SAR Capacitance-to-Digital Converter Using a Chain of Inverter-Based Amplifiers

    KAUST Repository

    Omran, Hesham

    2016-11-16

    A 12 - bit energy-efficient capacitive sensor interface circuit that fully relies on capacitance-domain successive approximation (SAR) technique is presented. Analysis shows that for SAR capacitance-to-digital converter (CDC) comparator offset voltage will result in parasitic-dependent conversion errors, which necessitates using an offset cancellation technique. Based on the presented analysis, a SAR CDC that uses a chain of cascode inverter-based amplifiers with near-threshold biasing is proposed to provide robust, energy-efficient, and fast operation. A hybrid coarse-fine capacitive digital-to-analog converter (CapDAC) achieves 11.7 - bit effective resolution, and provides 83% area saving compared to a conventional binary weighted implementation. The prototype fabricated in a 0.18μm CMOS technology is experimentally verified using MEMS capacitive pressure sensor. Experimental results show an energy efficiency figure-of-merit (FoM) of 33 f J/Step which outperforms the state-of-the-art. The CDC output is insensitive to analog references; thus, a very low temperature sensitivity of 2.3 ppm/°C is achieved without the need for calibration.

  1. A Capacitance-To-Digital Converter for MEMS Sensors for Smart Applications.

    Science.gov (United States)

    Pérez Sanjurjo, Javier; Prefasi, Enrique; Buffa, Cesare; Gaggl, Richard

    2017-06-07

    The use of MEMS sensors has been increasing in recent years. To cover all the applications, many different readout circuits are needed. To reduce the cost and time to market, a generic capacitance-to-digital converter (CDC) seems to be the logical next step. This work presents a configurable CDC designed for capacitive MEMS sensors. The sensor is built with a bridge of MEMS, where some of them function with pressure. Then, the capacitive to digital conversion is realized using two steps. First, a switched-capacitor (SC) preamplifier is used to make the capacitive to voltage (C-V) conversion. Second, a self-oscillated noise-shaping integrating dual-slope (DS) converter is used to digitize this magnitude. The proposed converter uses time instead of amplitude resolution to generate a multibit digital output stream. In addition it performs noise shaping of the quantization error to reduce measurement time. This article shows the effectiveness of this method by measurements performed on a prototype, designed and fabricated using standard 0.13 µm CMOS technology. Experimental measurements show that the CDC achieves a resolution of 17 bits, with an effective area of 0.317 mm², which means a pressure resolution of 1 Pa, while consuming 146 µA from a 1.5 V power supply.

  2. Low-Power, Low-Voltage Resistance-to-Digital Converter for Sensing Applications

    Directory of Open Access Journals (Sweden)

    Sergey Y. YURISH

    2016-09-01

    Full Text Available IC (ASIP of Universal Sensors and Transducers Interface (USTI-MOB with low power consumption, working in the resistive measurement mode (one of 26 possible measuring modes is described in the article. The proposed IC has 20 W to 4.5 M W range of measurement, relative error< ±0.04 %, 0.85 mA supply current and 1.2 V supply voltage. The worst-case error of about< ±1.54 % is observed. IC has three popular serial interfaces: I2C, SPI and RS232/USB. Due to high metrological performance and technical characteristics the USTI- MOB is well suitable for such application as: sensor systems for IoT, wearable and mobile devices, and digital multimeters. The ICs can also work with any quasi-digital resistive converters, in which the resistance is converted to frequency, period, duty-cycle or pulse width.

  3. Digital to analog resistive switching transition induced by graphene buffer layer in strontium titanate based devices.

    Science.gov (United States)

    Wan, Tao; Qu, Bo; Du, Haiwei; Lin, Xi; Lin, Qianru; Wang, Da-Wei; Cazorla, Claudio; Li, Sean; Liu, Sidong; Chu, Dewei

    2018-02-15

    Resistive switching behaviour can be classified into digital and analog switching based on its abrupt and gradual resistance change characteristics. Realizing the transition from digital to analog switching in the same device is essential for understanding and controlling the performance of the devices with various switching mechanisms. Here, we investigate the resistive switching in a device made with strontium titanate (SrTiO 3 ) nanoparticles using X-ray diffractometry, scanning electron microscopy, Raman spectroscopy, and direct electrical measurements. It is found that the well-known rupture/formation of Ag filaments is responsible for the digital switching in the device with Ag as the top electrode. To modulate the switching performance, we insert a reduced graphene oxide layer between SrTiO 3 and the bottom FTO electrode owing to its good barrier property for the diffusion of Ag ions and high out-of-plane resistance. In this case, resistive switching is changed from digital to analog as determined by the modulation of interfacial resistance under applied voltage. Based on that controllable resistance, potentiation and depression behaviours are implemented as well. This study opens up new ways for the design of multifunctional devices which are promising for memory and neuromorphic computing applications. Copyright © 2017 Elsevier Inc. All rights reserved.

  4. Analog-to-Digital Cognitive Radio: Sampling, Detection, and Hardware

    Science.gov (United States)

    Cohen, Deborah; Tsiper, Shahar; Eldar, Yonina C.

    2018-01-01

    The proliferation of wireless communications has recently created a bottleneck in terms of spectrum availability. Motivated by the observation that the root of the spectrum scarcity is not a lack of resources but an inefficient managing that can be solved, dynamic opportunistic exploitation of spectral bands has been considered, under the name of Cognitive Radio (CR). This technology allows secondary users to access currently idle spectral bands by detecting and tracking the spectrum occupancy. The CR application revisits this traditional task with specific and severe requirements in terms of spectrum sensing and detection performance, real-time processing, robustness to noise and more. Unfortunately, conventional methods do not satisfy these demands for typical signals, that often have very high Nyquist rates. Recently, several sampling methods have been proposed that exploit signals' a priori known structure to sample them below the Nyquist rate. Here, we review some of these techniques and tie them to the task of spectrum sensing in the context of CR. We then show how issues related to spectrum sensing can be tackled in the sub-Nyquist regime. First, to cope with low signal to noise ratios, we propose to recover second-order statistics from the low rate samples, rather than the signal itself. In particular, we consider cyclostationary based detection, and investigate CR networks that perform collaborative spectrum sensing to overcome channel effects. To enhance the efficiency of the available spectral bands detection, we present joint spectrum sensing and direction of arrival estimation methods. Throughout this work, we highlight the relation between theoretical algorithms and their practical implementation. We show hardware simulations performed on a prototype we built, demonstrating the feasibility of sub-Nyquist spectrum sensing in the context of CR.

  5. A bandgap voltage reference generator for an analogue-to-digital converter

    Science.gov (United States)

    Su, Liu; Feng, Liu

    2003-09-01

    We propose a bandgap voltage reference generator with low power supply design, implemented in complementary metal-oxide silicon integrated circuit technology. Its stability and immunity have an important effect on the performance of the analogue-to-digital converter. With HSPICE simulation, the temperature coefficient and power supply rejection ratio became several ppm °C-1 and 54 dB, respectively. Moreover, the power consumption was only 0.25 mw.

  6. Analog-to-digital conversion using custom CMOS analog memory for the EOS time projection chamber

    International Nuclear Information System (INIS)

    Lee, K.L.; Arthur, A.A.; Jones, R.W.; Matis, H.S.; Nakamura, M.; Kleinfelder, S.A.; Ritter, H.G.; Wieman, H.H.

    1991-01-01

    This paper reports on an expert system for generating control rod patterns that has been developed. The knowledge is transformed into IF-THEN rules. The inference engine uses the Rete pattern matching algorithm to match facts, and rule premises and conflict resolution strategies to make the system function intelligently. A forward-chaining mechanism is adopted in the inference engine. The system is implemented in the Common Lisp programming language. The three-dimensional core simulation model performs the core status and burnup calculations. The system is successfully demonstrated by generating control rod programming for the 2894-MW (thermal) Kuosheng nuclear power plant in Taiwan. The computing time is tremendously reduced compared to programs using mathematical methods

  7. Sensor Interfaces for Private Home Automation: From Analog to Digital, Wireless and Autonomous

    Directory of Open Access Journals (Sweden)

    Erich Leder

    2007-08-01

    Full Text Available In this paper a flexible and reliable system for smart home automation is presented. It is based on standardized hardware and open source communication protocols. Firstly, a special sensor interface has been developed, which allows the measurement of (slow analog signals to be determined by inexpensive digital PLC input terminals. Right now, up to eleven different modules have been implemented and the system is being tested in several configurations. In a second step, the communication is digitized. With the digitalization of the sensor modules, based on the implementation of a PIC Microcontroller, more intelligence is provided to the module, which increases the power and flexibility of the whole system. Thirdly, a wireless sensor-system consisting of a base station and of a mobile measuring unit is developed. The autonomous mobile unit is realized by using solar powering, gold cap energy storage, low-power circuits and a radio communication interface.

  8. A new delay line loops shrinking time-to-digital converter in low-cost FPGA

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, Jie, E-mail: zhangjie071063@163.com [State Key Laboratory of Geodesy and Earth’s Dynamics, Institute of Geodesy and Geophysics, CAS, Wuhan, China, 430077 (China); University of Chinese Academy of Sciences, Beijing, China, 100049 (China); Zhou, Dongming [State Key Laboratory of Geodesy and Earth’s Dynamics, Institute of Geodesy and Geophysics, CAS, Wuhan, China, 430077 (China)

    2015-01-21

    The article provides the design and test results of a new time-to-digital converter (TDC) based on delay line loops shrinking method and implemented in a low-cost field programmable gate array (FPGA) device. A technique that achieves high resolution with low cost and flexibility is presented. The technique is based on two delay line loops which are used to directly shrink the measured time interval in the designed TDC, and the resolution is dependent on the difference between the entire delay times of the two delay line loops. In order to realize high resolution and eliminate temperature influence, the two delay line loops consist of the same delay cells with the same number. A delay-locked loop (DLL) is used to stabilize the resolution against process variations and ambient conditions. Meanwhile, one method is used to accurately evaluate the resolution of the implemented TDC. The converter has been implemented in a general-propose FPGA device (Actel SmartFusion A2F200M3). A single shot resolution of the implemented converter is 63.3 ps and the measurement standard deviation is about 61.7 ps within the measurement range of 5 ns. - Highlights: • We provide a new FPGA-integrated time-to-digital converter based on delay line loops method which used two delay line loops to directly shrink time intervals with only rising edges. • The two delay line loops consist of the same delay cells with the same number and symmetrical structure. • The resolution is dependent on the difference between the entire delays of the two delay line loops. • We use delay-locked loop to stabilize the resolution against temperature and supply voltage.

  9. Note: All-digital CMOS MOS-capacitor-based pulse-shrinking mechanism suitable for time-to-digital converters.

    Science.gov (United States)

    Chen, Chun-Chi; Hwang, Chorng-Sii; Lin, You-Ting; Liu, Keng-Chih

    2015-12-01

    This paper presents an all-digital CMOS pulse-shrinking mechanism suitable for time-to-digital converters (TDCs). A simple MOS capacitor is used as a pulse-shrinking cell to perform time attenuation for time resolving. Compared with a previous pulse-shrinking mechanism, the proposed mechanism provides an appreciably improved temporal resolution with high linearity. Furthermore, the use of a binary-weighted pulse-shrinking unit with scaled MOS capacitors is proposed for achieving a programmable resolution. A TDC involving the proposed mechanism was fabricated using a TSMC (Taiwan Semiconductor Manufacturing Company) 0.18-μm CMOS process, and it has a small area of nearly 0.02 mm(2) and an integral nonlinearity error of ±0.8 LSB for a resolution of 24 ps.

  10. Methodology for the digital calibration of analog circuits and systems with case studies

    CERN Document Server

    Pastre, Marc

    2006-01-01

    Methodology for the Digital Calibration of Analog Circuits and Systems shows how to relax the extreme design constraints in analog circuits, allowing the realization of high-precision systems even with low-performance components. A complete methodology is proposed, and three applications are detailed. To start with, an in-depth analysis of existing compensation techniques for analog circuit imperfections is carried out. The M/2+M sub-binary digital-to-analog converter is thoroughly studied, and the use of this very low-area circuit in conjunction with a successive approximations algorithm for digital compensation is described. A complete methodology based on this compensation circuit and algorithm is then proposed. The detection and correction of analog circuit imperfections is studied, and a simulation tool allowing the transparent simulation of analog circuits with automatic compensation blocks is introduced. The first application shows how the sub-binary M/2+M structure can be employed as a conventional di...

  11. Simulation of the High Performance Time to Digital Converter for the ATLAS Muon Spectrometer trigger upgrade

    International Nuclear Information System (INIS)

    Meng, X.T.; Levin, D.S.; Chapman, J.W.; Zhou, B.

    2016-01-01

    The ATLAS Muon Spectrometer endcap thin-Resistive Plate Chamber trigger project compliments the New Small Wheel endcap Phase-1 upgrade for higher luminosity LHC operation. These new trigger chambers, located in a high rate region of ATLAS, will improve overall trigger acceptance and reduce the fake muon trigger incidence. These chambers must generate a low level muon trigger to be delivered to a remote high level processor within a stringent latency requirement of 43 bunch crossings (1075 ns). To help meet this requirement the High Performance Time to Digital Converter (HPTDC), a multi-channel ASIC designed by CERN Microelectronics group, has been proposed for the digitization of the fast front end detector signals. This paper investigates the HPTDC performance in the context of the overall muon trigger latency, employing detailed behavioral Verilog simulations in which the latency in triggerless mode is measured for a range of configurations and under realistic hit rate conditions. The simulation results show that various HPTDC operational configurations, including leading edge and pair measurement modes can provide high efficiency (>98%) to capture and digitize hits within a time interval satisfying the Phase-1 latency tolerance.

  12. Energy-Efficient Capacitance-to-Digital Converters for Smart Sensor Applications

    KAUST Repository

    Alhoshany, Abdulaziz

    2017-12-01

    One of the key requirements in the design of wireless sensor nodes and miniature biomedical devices is energy efficiency. For a sensor node, which is a sensor and readout circuit, to survive on limited energy sources such as a battery or harvested energy, its energy consumption should be minimized. Capacitive sensors are candidates for use in energy-constrained applications, as they do not consume static power and can be used in a wide range of applications to measure different physical, chemical or biological quantities. However, the energy consumption is dominated by the capacitive interface circuit, i.e. the capacitance-to-digital converter (CDC). Several energy-efficient CDC architectures are introduced in this dissertation to meet the demand for high resolution and energy efficiency in smart capacitive sensors. First, we propose an energy-efficient CDC based on a differential successive-approximation data converter. The proposed differential CDC employs an energy-efficient operational transconductance amplifier (OTA) based on an inverter. A wide capacitance range with fine absolute resolution is implemented in the proposed coarse-fine DAC architecture which saves 89% of silicon area. The proposed CDC achieves an energy efficiency figure-of-merit () of 45.8fJ/step, which is the best reported energy efficiency to date. Second, we propose an energy efficient CDC for high-precision capacitive resolution by using oversampling and noise shaping. The proposed CDC achieves 150 aF absolute resolution and an energy efficiency of 187fJ/conversion-step which outperforms state of the art high-precision differential CDCs. In the third and last part, we propose an in-vitro cancer diagnostic biosensor-CMOS platform for low-power, rapid detection, and low cost. The introduced platform is the first to demonstrate the ability to screen and quantify the spermidine/spermine N1 acetyltransferase (SSAT) enzyme which reveals the presence of early-stage cancer, on the surface of a

  13. Design of a delay-locked-loop-based time-to-digital converter

    Science.gov (United States)

    Zhaoxin, Ma; Xuefei, Bai; Lu, Huang

    2013-09-01

    A time-to-digital converter (TDC) based on a reset-free and anti-harmonic delay-locked loop (DLL) circuit for wireless positioning systems is discussed and described. The DLL that generates 32-phase clocks and a cycle period detector is employed to avoid “false locking". Driven by multiphase clocks, an encoder detects pulses and outputs the phase of the clock when the pulse arrives. The proposed TDC was implemented in SMIC 0.18 μm CMOS technology, and its core area occupies 0.7 × 0.55 mm2. The reference frequency ranges from 20 to 150 MHz. An LSB resolution of 521 ps can be achieved by using a reference clock of 60 MHz and the DNL is less than ±0.75 LSB. It dissipates 31.5 mW at 1.8 V supply voltage.

  14. CMOS time-to-digital converters for mixed-mode signal processing

    Directory of Open Access Journals (Sweden)

    Fei Yuan

    2014-04-01

    Full Text Available This study provides an in-depth review of the principles, architectures and design techniques of CMOS time-to-digital converters (TDCs. The classification of TDCs is introduced. It is followed by the examination of the parameters quantifying the performance of TDCs. Sampling TDCs including direct-counter TDCs, tapped delay-line TDCs, pulse-shrinking delay-line TDCs, cyclic pulse-shrinking TDCs, direct-counter TDCs with interpolation, vernier TDCs, flash TDCs, successive approximation TDCs and pipelined TDCs are studied and their pros and cons are compared. Noise-shaping TDCs that reduce in-band noise below technology limit are investigated. These TDCs include gated ring oscillator TDCs, switched ring oscillator TDCs, relaxation oscillator TDCs, ΔΣ TDCs and MASH TDCs. The performance of sampling and noise-shaping TDCs is compared. The direction of future research on TDCs is explored.

  15. Design rules for superconducting analog-digital transducers

    International Nuclear Information System (INIS)

    Haddad, Taghrid

    2015-01-01

    This Thesis is a contribution for dimensioning aspects of circuits designs in superconductor electronics. Mainly superconductor comparators inclusive Josephson comparators as well as QOJS-Comparators are investigated. Both types were investigated in terms of speed and sensitivity. The influence of the thermal noise on the decision process of the comparators represent in so called gray zone, which is analysed in this thesis. Thereby, different relations between design parameters were derived. A circuit model of the Josephson comparator was verified by experiments. Concepts of superconductor analog-to-digital converters, which are based on above called comparators, were investigated in detail. From the comparator design rules, new rules for AD-converters were derived. Because of the reduced switching energy, the signal to noise ratio (SNR) of the circuits is affected and therefore the reliability of the decision-process is affected. For special applications with very demanding requirements in terms of the speed and accuracy superconductor analog-to-digital converters offer an excellent performance. This thesis provides relations between different design paramenters and shows resulting trade-offs, This method is transparent and easy to transfer to other circuit topologies. As a main result, a highly predictive tool for dimensioning of superconducting ADC's is proved.

  16. Latin Letters Recognition Using Optical Character Recognition to Convert Printed Media Into Digital Format

    Directory of Open Access Journals (Sweden)

    Rio Anugrah

    2017-12-01

    Full Text Available Printed media is still popular now days society. Unfortunately, such media encountered several drawbacks. For example, this type of media consumes large storage that impact in high maintenance cost. To keep printed information more efficient and long-lasting, people usually convert it into digital format. In this paper, we built Optical Character Recognition (OCR system to enable automatic conversion the image containing the sentence in Latin characters into digital text-shaped information. This system consists of several interrelated stages including preprocessing, segmentation, feature extraction, classifier, model and recognition. In preprocessing, the median filter is used to clarify the image from noise and the Otsu’s function is used to binarize the image. It followed by character segmentation using connected component labeling. Artificial neural network (ANN is used for feature extraction to recognize the character. The result shows that this system enable to recognize the characters in the image whose success rate is influenced by the training of the system.

  17. Analogical Problems with Digital Data

    NARCIS (Netherlands)

    Widlok, T.

    2013-01-01

    Current initiatives of digitally archiving ethnographic and linguistic data promise considerable advantages with regard to longevity and accessibility. This article discusses these ‘digital promises’ in the context of projects funded by recent research programs on endangered languages and cultures.

  18. Analog and digital image quality

    International Nuclear Information System (INIS)

    Sardo, A.

    2004-01-01

    Background. Lastly the X-ray facilities are moving to a slow, but continuous process of digitalization. The dry laser printers allow hardcopy images with optimum resolution and contrast for all the modalities. In breast imaging, the delay of digitalization depends to the high cost of digital systems and, at times, to the doubts of the diagnostic accuracy of reading the breast digital images. Conclusions. The Screen-film mammography (SFM) is the most efficient diagnostic modality to detect the breast cancer in early stage and with reasonable cost. The digital mammography (DM) with the independent capturing, displaying, processing, printing and archiving phases, makes possible an optimisation of the image quality for each, single phase, assuring a satisfactory diagnosis. (author)

  19. BacNet and Analog/Digital Interfaces of the Building Controls Virtual Testbed

    Energy Technology Data Exchange (ETDEWEB)

    Nouidui, Thierry Stephane [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Wetter, Michael [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Li, Zhengwei [Georgia Inst. of Technology, Atlanta, GA (United States); Pang, Xiufeng [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Bhattacharya, Prajesh [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Haves, Philip [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States)

    2011-11-01

    This paper gives an overview of recent developments in the Building Controls Virtual Test Bed (BCVTB), a framework for co-simulation and hardware-in-the-loop. First, a general overview of the BCVTB is presented. Second, we describe the BACnet interface, a link which has been implemented to couple BACnet devices to the BCVTB. We present a case study where the interface was used to couple a whole building simulation program to a building control system to assess in real-time the performance of a real building. Third, we present the ADInterfaceMCC, an analog/digital interface that allows a USB-based analog/digital converter to be linked to the BCVTB. In a case study, we show how the link was used to couple the analog/digital converter to a building simulation model for local loop control.

  20. A REVIEW OF HUMAN-SYSTEM INTERFACE DESIGN ISSUES OBSERVED DURING ANALOG-TO-DIGITAL AND DIGITAL-TO-DIGITAL MIGRATIONS IN U.S. NUCLEAR POWER PLANTS

    Energy Technology Data Exchange (ETDEWEB)

    Kovesdi, C.; Joe, J.

    2017-05-01

    The United States (U.S.) Department of Energy (DOE) Light Water Reactor Sustainability (LWRS) program is developing a scientific basis through targeted research and development (R&D) to support the U.S. nuclear power plant (NPP) fleet in extending their existing licensing period and ensuring their long-term reliability, productivity, safety, and security. Over the last several years, human factors engineering (HFE) professionals at the Idaho National Laboratory (INL) have supported the LWRS Advanced Instrumentation, Information, and Control (II&C) System Technologies pathway across several U.S. commercial NPPs in analog-to-digital migrations (i.e., turbine control systems) and digital-to-digital migrations (i.e., Safety Parameter Display System). These efforts have included in-depth human factors evaluation of proposed human-system interface (HSI) design concepts against established U.S. Nuclear Regulatory Commission (NRC) design guidelines from NUREG-0700, Rev 2 to inform subsequent HSI design prior to transitioning into Verification and Validation. This paper discusses some of the overarching design issues observed from these past HFE evaluations. In addition, this work presents some observed challenges such as common tradeoffs utilities are likely to face when introducing new HSI technologies into NPP hybrid control rooms. The primary purpose of this work is to distill these observed design issues into general HSI design guidance that industry can use in early stages of HSI design.

  1. Subnanosecond time-to-digital converter implemented in a Kintex-7 FPGA

    Science.gov (United States)

    Sano, Y.; Horii, Y.; Ikeno, M.; Sasaki, O.; Tomoto, M.; Uchida, T.

    2017-12-01

    Time-to-digital converters (TDCs) are used in various fields, including high-energy physics. One advantage of implementing TDCs in field-programmable gate arrays (FPGAs) is the flexibility on the modification of the logics, which is useful to cope with the changes in the experimental conditions. Recent FPGAs make it possible to implement TDCs with a time resolution less than 10 ps. On the other hand, various drift chambers require a time resolution of O(0.1) ns, and a simple and easy-to-implement TDC is useful for a robust operation. Herein an eight-channel TDC with a variable bin size down to 0.28 ns is implemented in a Xilinx Kintex-7 FPGA and tested. The TDC is based on a multisampling scheme with quad phase clocks synchronised with an external reference clock. Calibration of the bin size is unnecessary if a stable reference clock is available, which is common in high-energy physics experiments. Depending on the channel, the standard deviation of the differential nonlinearity for a 0.28 ns bin size is 0.13-0.31. The performance has a negligible dependence on the temperature. The power consumption and the potential to extend the number of channels are also discussed.

  2. SNR approach for performance evaluation of time-stretching photonic analogue to digital converter system.

    Science.gov (United States)

    Alves, Tiago M F; Cartaxo, Adolfo V T

    2011-01-17

    A semi-analytical simulation method (SASM) is proposed to evaluate the signal-to-noise ratio (SNR) of time stretched signals at the output of photonic analogue-to-digital converter (Ph-ADC) system. Analytical expressions of the signal at Ph-ADC output considering generic electrical signals applied to the electro-optic modulators of the Ph-ADC are derived. The contribution to the total variance of the received signal from the noise introduced by the electrical transmitter and receiver, and by the optical amplifier are derived analytically taking into account the pulsed nature of the optical signal. The proposed SASM shows excellent agreement of SNR estimates with the estimates provided by Monte Carlo simulation. This result is confirmed for variance dominantly imposed by the noise introduced by the electrical transmitter, by the optical amplifier and by the electrical receiver. A simplified approach is also proposed and compared with previous work. It is shown that mean power estimates obtained from this simplified approach are valid while the modulator is operating in the linear region and the signal is not affected by the frequency response of the electrical receiver filter. Additionally, it is concluded that the estimates of the noise variance due to the electrical transmitter are acceptable when a small signal analysis of noise along the Ph-ADC is valid.

  3. A CMOS delay locked loop and sub-nanosecond time-to-digital converter chip

    International Nuclear Information System (INIS)

    Santos, D.M.; Dow, S.F.; Flasck, J.M.; Levi, M.E.

    1996-01-01

    Phase-locked loops have been employed in the past to obtain sub-nanosecond time resolution in high energy physics and nuclear science applications. An alternative solution based on a delay-locked loop (DLL) is described. This solution allows for a very high level of integration yet still offers resolution in the sub-nanosecond regime. Two variations on this solution are outlined. A novel phase detector, based on the Mueller C-element, is used to implement a charge pump where the injected charge approaches zero as the loop approaches lock on the leading edge of an input clock reference. This greatly reduces timing jitter. In the second variation the loop locks to both the leading and trailing clock edges. In this second implementation, software coded layout generators are used to automatically layout a highly integrated, multichannel, time-to-digital converter (TDC) targeted for one specific frequency. The two circuits, DLL and TDC, are implemented in CMOS 1.2 microm and 0.8 microm technologies, respectively. Test results show a timing jitter of less than 30 ps for the DLL circuit and less than 190 ps integral and differential nonlinearity for the TDC circuit

  4. A flexible multi-channel high-resolution time-to-digital converter ASIC

    CERN Document Server

    Mota, M; Debieux, S; Ryzhov, V; Moreira, P; Marchioro, A

    2000-01-01

    A data driven multi-channel Time-to-Digital Converter (TDC) circuit with programmable resolution ( similar to 25ps - 8OOps binning) and a dynamic range of 102.4mus has been implemented in a 0.25mum CMOS technology. An on-chip PLL is used for clock multiplication up to 320MHz from an external 40MHz reference. A 32 element Delay Locked Loop (DLL) performs time interpolation down to 97.5ps. Finally, finer time interpolation is obtained using four samples of the DLL separated by 24.5ps generated by an adjustable on-chip RC delay line. In the lower resolution modes of operation, 32 TDC channels are available. In the highest resolution mode eight channels are available, since four low-resolution channels are used to perform a single fine time interpolation. The TDC is capable of measuring both leading and trailing edges of the input signal. Measurements are initially stored as time stamps in individual four-location deep asynchronous channel buffers. After proper encoding, measurements are written into four 256-dee...

  5. High resolution distributed time-to-digital converter (TDC) in a White Rabbit network

    International Nuclear Information System (INIS)

    Pan, Weibin; Gong, Guanghua; Du, Qiang; Li, Hongming; Li, Jianmin

    2014-01-01

    The Large High Altitude Air Shower Observatory (LHAASO) project consists of a complex detector array with over 6000 detector nodes spreading over 1.2 km 2 areas. The arrival times of shower particles are captured by time-to-digital converters (TDCs) in the detectors' frontend electronics, the arrival direction of the high energy cosmic ray are then to be reconstructed from the space-time information of all detector nodes. To guarantee the angular resolution of 0.5°, a time synchronization of 500 ps (RMS) accuracy and 100 ps precision must be achieved among all TDC nodes. A technology enhancing Gigabit Ethernet, called the White Rabbit (WR), has shown the capability of delivering sub-nanosecond accuracy and picoseconds precision of synchronization over the standard data packet transfer. In this paper we demonstrate a distributed TDC prototype system combining the FPGA based TDC and the WR technology. With the time synchronization and data transfer services from a compact WR node, separate FPGA-TDC nodes can be combined to provide uniform time measurement information for correlated events. The design detail and test performance will be described in the paper

  6. Radiation-tolerant delta-sigma time-to-digital converters

    CERN Document Server

    Cao, Ying; Steyaert, Michiel

    2015-01-01

    This book focuses on the design of a Mega-Gray (a standard unit of total ionizing radiation) radiation-tolerant ps-resolution time-to-digital converter (TDC) for a light detection and ranging (LIDAR) system used in a gamma-radiation environment. Several radiation-hardened-by-design (RHBD) techniques are demonstrated throughout the design of the TDC and other circuit techniques to improve the TDC's resolution in a harsh environment are also investigated. Readers can learn from scratch how to design a radiation-tolerant IC. Information regarding radiation effects, radiation-hardened design techniques and  measurements are organized in such a way that readers can easily gain a thorough understanding of the topic. Readers will also learn the design theory behind the newly proposed delta-sigma TDC. Readers can quickly acquire knowledge about the design of radiation-hardened bandgap voltage references and low-jitter relaxation oscillators, which are introduced in the content from a designer's perspective.   · �...

  7. Analog and digital dividers for mass spectrometers

    International Nuclear Information System (INIS)

    Osipov, A.K.

    1980-01-01

    Errors of four different types of stress dividers used in statical mass-spectrometers for determination of mass number by accelerating stress are analyzed. The simplest flowsheet of the analog divider comprises operation amplifier, in the chain of the negative feedback of which a multiplication device on differential cascade is switched- in. This analog divider has high sensitivity to temperature and high error approximately 5%. Application of the multiplier on differential cascade with normalization permits to increase temperature stability and decrease the error up to 1%. Another type of the analog divider is a logarithmic divider the error of which is constant within the whole operation range and it constitutes 1-5%. The digital divider with a digital-analog transformer (DAT) has the error of +-0.015% which is determined by the error of detectors and resistance of keys in the locked state. Considered is the design of a divider based on transformation of the inlet stress into the time period. The error of the divider is determined in this case mainly by stress of the zero shift of the operation amplifier (it should be compensated) and relative threshold stability of the comparator triggering which equals (2-3)x10 -4 . It is noted that the divider with DAT application and the divider with the use of stress transformation within the time period are most perspective ones for statical mass-spectrometers [ru

  8. The influence of the analog-to-digital conversion error on the JT-60 plasma position/shape feedback control system

    International Nuclear Information System (INIS)

    Yoshida, Michiharu; Kurihara, Kenichi

    1995-12-01

    In the plasma feedback control system (PFCS) and the direct digital controller (DDC) for the poloidal field coil power supply in the JT-60 tokamak, it is necessary to observe signals of all the poloidal field coil currents. Each of the signals, originally measured by a single sensor, is distributed to the PFCS and DDC through different cable routes and different analog-to-digital converters from each other. This produces the conversion error to the amount of several bits. Consequently, proper voltage from feedback calculation cannot be applied to the coil, and hence the control performance is possibly supposed to deteriorate to a certain extent. This paper describes how this error makes an influence on the plasma horizontal position control and how to improve the deteriorated control performance. (author)

  9. Comparison between analog and digital filters

    Directory of Open Access Journals (Sweden)

    Zoltan Erdei

    2010-12-01

    Full Text Available Digital signal processing(DSP is one of the most powerful technologies and will model science and engineering in the 21st century. Revolutionary changes have already been made in different areas of research such as communications, medical imaging, radar and sonar technology, high fidelity audio signal reproducing etc. Each of these fields developed a different signal processing technology with its own algorithms, mathematics and technology, Digital filters are used in two general directions: to separate mixed signals and to restore signals that were compromised in different modes. The objective of this paper is to compare some basic digital filters versus analog filters such as low-pass, high-pass, band-pass filters. Scientists and engineers comprehend that, in comparison with analog filters, digital filters can process the same signal in real-time with broader flexibility. This understanding is considered important to instill incentive for engineers to become interested in the field of DSP. The analysis of the results will be made using dedicated libraries in MATLAB and Simulink software, such as the Signal Processing Toolbox.

  10. A 45.8fJ/Step, energy-efficient, differential SAR capacitance-to-digital converter for capacitive pressure sensing

    KAUST Repository

    Alhoshany, Abdulaziz

    2016-05-03

    An energy-efficient readout circuit for a capacitive sensor is presented. The capacitive sensor is digitized by a 12-bit energy efficient capacitance-to-digital converter (CDC) that is based on a differential successive-approximation architecture. This CDC meets extremely low power requirements by using an operational transconductance amplifier (OTA) that is based on a current-starved inverter. It uses a charge-redistribution DAC that involves coarse-fine architecture. We split the DAC into a coarse-DAC and a fine-DAC to allow a wide capacitance range in a compact area. It covers a wide range of capacitance of 16.14 pF with a 4.5 fF absolute resolution. An analog comparator is implemented by cross-coupling two 3-input NAND gates to enable power and area efficient operation. The prototype CDC was fabricated using a standard 180 nm CMOS technology. The 12-bit CDC has a measurement time of 42.5 μs, and consumes 3.54 μW and 0.29 μW from analog and digital supplies, respectively. This corresponds to a state-of-the-art figure-of-merit (FoM) of 45.8 fJ/conversion-step. © 2016 Elsevier B.V. All rights reserved.

  11. Digitized self-oscillating loop for piezoelectric transformer-based power converters

    DEFF Research Database (Denmark)

    Ekhtiari, Marzieh; Andersen, Thomas; Zhang, Zhe

    2016-01-01

    A new method is implemented in designing of self-oscillating loop for driving piezoelectric transformers. The implemented method is based on combining both analog and digital control systems. Digitized delay, or digitized phase shift through the self-oscillating loop results in a very precise...... frequency control and ensures an optimum operation of the piezoelectric transformer in terms of voltage gain and efficiency. In this work, additional time delay is implemented digitally for the first time through 16 bit digital-to-analog converter to the self-oscillating loop. Delay control setpoints...... updates at a rate of 417 kHz. This allows the control loop to dynamically follow frequency changes of the transformer in each resonant cycle. The operation principle behind self-oscillating is discussed in this paper. Moreover, experimental results are reported....

  12. Energy-Efficient Capacitance-to-Digital Converters for Low-Energy Sensor Nodes

    KAUST Repository

    Omran, Hesham

    2015-11-01

    Energy efficiency is a key requirement for wireless sensor nodes, biomedical implants, and wearable devices. The energy consumption of the sensor node needs to be minimized to avoid battery replacement, or even better, to enable the device to survive on energy harvested from the ambient. Capacitive sensors do not consume static power; thus, they are attractive from an energy efficiency perspective. In addition, they can be employed in a wide range of sensing applications. However, the sensor readout circuit–i.e., the capacitance-to-digital converter (CDC)–can be the dominant source of energy consumption in the system. Thus, the development of energy-efficient CDCs is crucial to minimizing the energy consumption of capacitive sensor nodes. In the first part of this dissertation, we propose several energy-efficient CDC architectures for low-energy sensor nodes. First, we propose a digitally-controlled coarsefine multislope CDC that employs both current and frequency scaling to achieve significant improvement in energy efficiency. Second, we analyze the limitations of successive approximation (SAR) CDC, and we address these limitations by proposing a robust parasitic-insensitive opamp-based SAR CDC. Third, we propose an inverter-based SAR CDC that achieves an energy efficiency figure-of-merit (FoM) of 31fJ/Step, which is the best energy efficiency FoM reported to date. Fourth, we propose a differential SAR CDC with quasi-dynamic operation to maintain excellent energy efficiency for a scalable sample rate. In the second part of this dissertation, we study the matching properties of small integrated capacitors, which are an integral component of energy-efficient CDCs. Despite conventional wisdom, we experimentally illustrate that the mismatch of small capacitors can be directly measured, and we report mismatch measurements for subfemtofarad integrated capacitors. We also correct the common misconception that lateral capacitors match better than vertical capacitors

  13. Design and Implementation of Digital Current Mode Controller for DC-DC Converters

    DEFF Research Database (Denmark)

    Taeed, Fazel

    In the recent decades, shortage of fossil fuels and global warming have increased the demand for renewable energy resources. Dc-dc converters are widely used in renewable energy systems, electric vehicles, and battery chargers. In practical applications, dc-dc converters are required to be regula......In the recent decades, shortage of fossil fuels and global warming have increased the demand for renewable energy resources. Dc-dc converters are widely used in renewable energy systems, electric vehicles, and battery chargers. In practical applications, dc-dc converters are required...... to be regulated by a closed-loop controller. The Peak Current Mode Control (PCMC) is one of the most promising control methods for dc-dc converters. It has been known for high bandwidth (speed), and inherent current protection. Increasing the controller bandwidth decreases the output filter size and cost. Analog...... controllers (including PCMC) are sensitive to temperature drift, component aging and noise. Digital controllers do not have the aforementioned drawbacks of analog controllers; but they have lower bandwidth than analog controllers due to the sampling and calculation delays. Generally, analog controllers have...

  14. Wide-range time-to-digital converters with a high resolution

    International Nuclear Information System (INIS)

    Aul'chenko, V.M.

    1977-01-01

    A combined time-number converter in which measurements of time intervals to within a period of clock frequency are made directly and those within a period are by a time-amplitude-code conversion is described. It allows time intervals up to 4 mcsec with a resolution of 100 psec to be measured. The differential nonlinearity of conversion is not greater than +-1.5%, and the integral error from measurements of time intervals is not greater than +-100 psec

  15. Method and apparatus for analog signal conditioner for high speed, digital x-ray spectrometer

    International Nuclear Information System (INIS)

    Warburton, W.K.; Hubbard, B.

    1999-01-01

    A signal processing system which accepts input from an x-ray detector-preamplifier and produces a signal of reduced dynamic range for subsequent analog-to-digital conversion is disclosed. The system conditions the input signal to reduce the number of bits required in the analog-to-digital converter by removing that part of the input signal which varies only slowly in time and retaining the amplitude of the pulses which carry information about the x-rays absorbed by the detector. The parameters controlling the signal conditioner's operation can be readily supplied in digital form, allowing it to be integrated into a feedback loop as part of a larger digital x-ray spectroscopy system. 13 figs

  16. Digitally controlled analog proportional-integral-derivative (PID) controller for high-speed scanning probe microscopy.

    Science.gov (United States)

    Dukic, Maja; Todorov, Vencislav; Andany, Santiago; Nievergelt, Adrian P; Yang, Chen; Hosseini, Nahid; Fantner, Georg E

    2017-12-01

    Nearly all scanning probe microscopes (SPMs) contain a feedback controller, which is used to move the scanner in the direction of the z-axis in order to maintain a constant setpoint based on the tip-sample interaction. The most frequently used feedback controller in SPMs is the proportional-integral (PI) controller. The bandwidth of the PI controller presents one of the speed limiting factors in high-speed SPMs, where higher bandwidths enable faster scanning speeds and higher imaging resolution. Most SPM systems use digital signal processor-based PI feedback controllers, which require analog-to-digital and digital-to-analog converters. These converters introduce additional feedback delays which limit the achievable imaging speed and resolution. In this paper, we present a digitally controlled analog proportional-integral-derivative (PID) controller. The controller implementation allows tunability of the PID gains over a large amplification and frequency range, while also providing precise control of the system and reproducibility of the gain parameters. By using the analog PID controller, we were able to perform successful atomic force microscopy imaging of a standard silicon calibration grating at line rates up to several kHz.

  17. Digitally controlled analog proportional-integral-derivative (PID) controller for high-speed scanning probe microscopy

    Science.gov (United States)

    Dukic, Maja; Todorov, Vencislav; Andany, Santiago; Nievergelt, Adrian P.; Yang, Chen; Hosseini, Nahid; Fantner, Georg E.

    2017-12-01

    Nearly all scanning probe microscopes (SPMs) contain a feedback controller, which is used to move the scanner in the direction of the z-axis in order to maintain a constant setpoint based on the tip-sample interaction. The most frequently used feedback controller in SPMs is the proportional-integral (PI) controller. The bandwidth of the PI controller presents one of the speed limiting factors in high-speed SPMs, where higher bandwidths enable faster scanning speeds and higher imaging resolution. Most SPM systems use digital signal processor-based PI feedback controllers, which require analog-to-digital and digital-to-analog converters. These converters introduce additional feedback delays which limit the achievable imaging speed and resolution. In this paper, we present a digitally controlled analog proportional-integral-derivative (PID) controller. The controller implementation allows tunability of the PID gains over a large amplification and frequency range, while also providing precise control of the system and reproducibility of the gain parameters. By using the analog PID controller, we were able to perform successful atomic force microscopy imaging of a standard silicon calibration grating at line rates up to several kHz.

  18. Analog and digital communication systems

    CERN Document Server

    Roden, Martin S

    1996-01-01

    New edition of an introductory text that balances theoretical foundations with practical design. Reorganization and updates in this edition include the section on digital communications as well as design applications and computer exercises: many graphs are prepared and formulas solved using MATLAB...

  19. Making the Switch to Digital Audio

    Directory of Open Access Journals (Sweden)

    Shannon Gwin Mitchell

    2004-12-01

    Full Text Available In this article, the authors describe the process of converting from analog to digital audio data. They address the step-by-step decisions that they made in selecting hardware and software for recording and converting digital audio, issues of system integration, and cost considerations. The authors present a brief description of how digital audio is being used in their current research project and how it has enhanced the “quality” of their qualitative research.

  20. Analog circuit design structured mixed-mode design, multi-bit sigma-delta converters, short range RF circuits

    CERN Document Server

    van Roermund, Arthur

    2007-01-01

    Preface. Part I: Structured Mixed-Mode Design. Introduction. Structured Oscillator Design; C. Verhoeven, A. van Staveren. Systematic Design of High-frequency gm-C Filters; E. Lauwers, G. Gielen. Structured LNA Design; E.H. Nordholt. High-Level Simulation and Modeling Tools for Mixed-Signal Front-ends of Wireless Systems; P. Wambacq, et al. Structured Simulation-Based Analog Design Synthesis; R.A. Rutenbar. Structured Analog layout Design; K. Lampaert. Part II: Multi-Bit Sigma Delta Converters. Introduction. Architecture Considerations for Multi-Bit SigmaDelta ADCs; T. Brooks. Multirate Sigma-Delta Modulators, an Alternative to Multibit; F. Colodro, A. Torralba. Circuit Design Aspects of Multi-Bit Delta-Sigma Converters; Y. Geerts, et al. High-speed Digital to Analog Converter Issues with Applications to Sigma Delta Modulators; K. Doris, et al. Correction-Free Multi-Bit Sigma-Delta Modulators for ADSL; R. del Rio, et al. Sigma Delta Converters in Wireline Communications; A. Wiesbauer, et al. Part III: Short Ra...

  1. Low-frequency analog signal distribution on digital photonic networks by optical delta-sigma modulation

    Science.gov (United States)

    Kanno, Atsushi; Kawanishi, Tetsuya

    2013-12-01

    We propose a delta-sigma modulation scheme for low- and medium-frequency signal transmission in a digital photonic network system. A 10-Gb/s-class optical transceiver with a delta-sigma modulator utilized as a high-speed analog-to-digital converter (ADC) provides a binary optical signal. On the signal reception side, a low-cost and slow-speed photonic receiver directly converts the binary signal into an analog signal at frequencies from several hundreds of kilohertz several tens of megahertz. Further, by using a clock and data recovery circuit at the receiver to reduce jitters, the single-sideband phase noise of the generated signals can be significantly reduced.

  2. A robust parasitic-insensitive successive approximation capacitance-to-digital converter

    KAUST Repository

    Omran, Hesham

    2014-09-01

    In this paper, we present a capacitive sensor digital interface circuit using true capacitance-domain successive approximation that is independent of supply voltage. Robust operation is achieved by using a charge amplifier stage and multiple comparison technique. The interface circuit is insensitive to parasitic capacitances, offset voltages, and charge injection, and is not prone to noise coupling. The proposed design achieves very low temperature sensitivity of 25ppm/oC. A coarse-fine programmable capacitance array allows digitizing a wide capacitance range of 16pF with 12.5-bit quantization limited resolution in a compact area of 0.07mm2. The fabricated prototype is experimentally verified using on-chip sensor and off-chip MEMS capacitive pressure sensor. © 2014 IEEE.

  3. An FPGA-Integrated Time-to-Digital Converter Based on a Ring Oscillator for Programmable Delay Line Resolution Measurement

    Directory of Open Access Journals (Sweden)

    Chao Chen

    2014-01-01

    Full Text Available We describe the architecture of a time-to-digital converter (TDC, specially intended to measure the delay resolution of a programmable delay line (PDL. The configuration, which consists of a ring oscillator, a frequency divider (FD, and a period measurement circuit (PMC, is implemented in a field programmable gate array (FPGA device. The ring oscillator realized in loop containing a PDL and a look-up table (LUT generates periodic oscillatory pulses. The FD amplifies the oscillatory period from nanosecond range to microsecond range. The time-to-digital conversion is based on counting the number of clock cycles between two consecutive pulses of the FD by the PMC. Experiments have been conducted to verify the performance of the TDC. The achieved relative errors for four PDLs are within 0.50%–1.21% and the TDC has an equivalent resolution of about 0.4 ps.

  4. A multi-channel 24.4 ps bin size Time-to-Digital Converter for HEP applications

    CERN Document Server

    Mester, C; Morira, P

    2008-01-01

    A multi-channel time-tagging Time-to-Digital Converter (TDC) ASIC with a resolution of 24.4 ps (bin size) has been implemented and fabricated in a 130 nm CMOS technology. An on-chip PLL is used to generate an internal timing reference from an external 40 MHz clock source. The circuit is based on a 32 element Delay Locked Loop (DLL) which performs the time interpolation. The 32 channel architecture of the TDC is suitable for both triggered and non-triggered applications. The prototype contains test structures such as a substrate noise generator. The paper describes the circuit architecture and its principles of operation.

  5. An Open-Source Tool Set Enabling Analog-Digital-Software Co-Design

    Directory of Open Access Journals (Sweden)

    Michelle Collins

    2016-02-01

    Full Text Available This paper presents an analog-digital hardware-software co-design environment for simulating and programming reconfigurable systems. The tool simulates, designs, as well as enables experimental measurements after compiling to configurable systems in the same integrated design tool framework. High level software in Scilab/Xcos (open-source programs similar to MATLAB/Simulink that converts the high-level block description by the user to blif format (sci2blif, which acts as an input to the modified VPR tool, including the code v p r 2 s w c s , encoding the specific platform through specific architecture files, resulting in a targetable switch list on the resulting configurable analog–digital system. The resulting tool uses an analog and mixed-signal library of components, enabling users and future researchers access to the basic analog operations/computations that are possible.

  6. Development of a time-to-digital converter ASIC for the upgrade of the ATLAS Monitored Drift Tube detector

    Science.gov (United States)

    Wang, Jinhong; Liang, Yu; Xiao, Xiong; An, Qi; Chapman, John W.; Dai, Tiesheng; Zhou, Bing; Zhu, Junjie; Zhao, Lei

    2018-02-01

    The upgrade of the ATLAS muon spectrometer for the high-luminosity LHC requires new trigger and readout electronics for various elements of the detector. We present the design of a time-to-digital converter (TDC) ASIC prototype for the ATLAS Monitored Drift Tube (MDT) detector. The chip was fabricated in a GlobalFoundries 130 nm CMOS technology. Studies indicate that its timing and power dissipation characteristics meet the design specifications, with a timing bin variation of ±40 ps for all 48 TDC slices and a power dissipation of about 6.5 mW per slice.

  7. Regulatory requirements for replacement of analog systems with digital upgrades

    International Nuclear Information System (INIS)

    Loeser, P.J.

    1993-01-01

    This paper reviews briefly the regulatory guidelines which must be met in order to replace analog systems in nuclear power plants with digital systems. There is a move to do such replacements for a number of reasons: analog systems are aging, and showing considerable drift; few vendors manufacture analog systems today; support and parts are hard to get; digital systems provide flexibility. There is a safety concern however about undesirable and unpredictable effects to digital safety equipment due to plant transients, accidents, post-accident condition, and EMI/RF environmental interferences. License holders must comply with the requirements of 10 C.F.R. 50.59, which deals with safety concerns with respect to any changes to operating plants which may have an impact on the safety of the plant. NRC staff is taking the position that all digital upgrades will require an evaluation under this regulation

  8. A multi-channel time-to-digital converter chip for drift chamber readout

    International Nuclear Information System (INIS)

    Santos, D.M.; Chau, A.; DeBusshere, D.; Dow, S.; Flasck, J.; Levi, M.; Kirsten, F.; Su, E.

    1995-12-01

    A complete, multi-channel, timing and amplitude measurement IC for use in drift chamber applications is described. By targeting specific resolutions, i.e. 6-bits of resolution for both time and amplitude, area and power can be minimized while achieving the proper level of measurement accuracy. Time is digitized using one eight channel TDC comprised of a delay locked loop and eight sets of latches and encoders. Amplitude (for dE/dx) is digitized using a dual-range FADC for each channel. Eight bits of dynamic range with six bits of accuracy are achieved with the dual-range. The timing and amplitude information is multiplexed into one DRAM (Dynamic Random Access Memory) trigger latency buffer. Interesting events are then transferred into an SRAM (Static Random Access Memory) readout buffer before the latency time has expired. The design has been optimized to achieve the requisite resolution using the smallest area and lowest power. The circuit has been implemented in a 0.8μ triple metal CMOS process. The TDC sub-element has been measured to have better than 135 ps time resolution and 35 ps jitter. The DRAM has a measured cycle time of 80 MHz

  9. Analog/digital pH meter system I.C.

    Science.gov (United States)

    Vincent, Paul; Park, Jea

    1992-01-01

    The project utilizes design automation software tools to design, simulate, and fabricate a pH meter integrated circuit (IC) system including a successive approximation type seven-bit analog to digital converter circuits using a 1.25 micron N-Well CMOS MOSIS process. The input voltage ranges from 0.5 to 1.0 V derived from a special type pH sensor, and the output is a three-digit decimal number display of pH with one decimal point.

  10. Unified Digital Periodic Signal Filters for Power Converter Systems

    DEFF Research Database (Denmark)

    Yang, Yongheng; Xin, Zhen; Zhou, Keliang

    2017-01-01

    Periodic signal controllers like repetitive and resonant controllers have demonstrated much potential in the control of power electronic converters, where periodic signals (e.g., ac voltages and currents) can be precisely regulated to follow references. Beyond the control of periodic signals, ac...... signal processing (e.g., in synchronization and pre-filtering) is also very important for power converter systems. Hence, this paper serves to unify digital periodic signal filters so as to maximize their roles in power converter systems (e.g., enhance the control of ac signals). The unified digital...... periodic signal filters behave like a comb filter, but it can also be configured to selectively filter out the harmonics of interest (e.g., the odd-order harmonics in single-phase power converter systems). Moreover, a virtual variable-sampling-frequency unit delay that enables frequency adaptive periodic...

  11. A 9-Channel, 100 ps LSB Time-to-Digital Converter for the NA62 Gigatracker Readout ASIC (TDCpix)

    International Nuclear Information System (INIS)

    Perktold, L; Rinella, G Aglieri; Noy, M; Kluge, A; Kloukinas, K; Kaplon, J; Jarron, P; Morel, M; Fiorini, M; Martin, E

    2012-01-01

    The TDCpix ASIC is the readout chip for the Gigatracker station of the NA62 experiment. Each station of the Gigatracker needs to provide time stamping of individual particles to 200 ps-rms or better. Bump-bonded to the pixel sensor the ASIC serves an array of 40 columns x 40 pixels. The high precision time measurement of the discriminated hit signals is accomplished with a set of 40 TDCs sitting in the End-Of-Column region of the ASIC. Each TDC provides 9 channels per column. For the time-to-digital converter (TDC) a delay-locked-loop (DLL) approach is employed to achieve a constant time binning of 100 ps. Simulation results show that an average rms time resolution of 33 ps with a power consumption of the TDC better than 33 mW per column is achieved. This contribution will present the design, simulation results and implementation challenges of the TDC.

  12. Two applications of direct digital down converters in beam diagnostics

    International Nuclear Information System (INIS)

    Powers, Tom; Flood, Roger; Hovater, Curt; Musson, John

    2000-01-01

    The technologies of direct digital down converters, digital frequency synthesis, and digital signal processing are being used in many commercial applications. Because of this commercialization, the component costs are being reduced to the point where they are economically viable for large scale accelerator applications. This paper will discuss two applications of these technologies to beam diagnostics. In the first application the combination of direct digital frequency synthesis and direct digital down converters are coupled with digital signal processor technology in order to maintain the stable gain environment required for a multi-electrode beam position monitoring system. This is done by injecting a CW reference signal into the electronics as part of the front-end circuitry. In the second application direct digital down converters are used to provide a novel approach to the measurement of beam intensity using cavity current monitors. In this system a pair of reference signals are injected into the cavity through an auxiliary port. The beam current is then calculated as the ratio of the beam signal divided by the average of the magnitude of the two reference signals

  13. A 16 channel high resolution (<11 ps RMS) Time-to-Digital Converter in a Field Programmable Gate Array

    International Nuclear Information System (INIS)

    Ugur, C; Bayer, E; Kurz, N; Traxler, M

    2012-01-01

    A 16-channel Time-to-Digital Converter (TDC) was implemented in a general purpose Field-Programmable Gate Array (FPGA). The fine time calculations are achieved by using the dedicated carry-chain lines. The coarse counter defines the coarse time stamp. In order to overcome the negative effects of temperature and power supply dependency bin-by-bin calibration is applied. The time interval measurements are done using 2 channels. The time resolution of channels are calculated for 1 clock cycle and a minimum of 10.3 ps RMS on two channels, yielding 7.3 ps RMS (10.3 ps/√2) on a single channel is achieved.

  14. Comparison of analog and digital pulse-shape-discrimination systems

    Energy Technology Data Exchange (ETDEWEB)

    Sosa, C.S., E-mail: cssosa@umich.edu; Flaska, M.; Pozzi, S.A.

    2016-08-01

    Pulse shape discrimination (PSD) performance of two optimized PSD systems (one digital and one analog) is compared in this work. One system uses digital charge integration, while the other system uses analog zero crossing. Measurements were conducted with each PSD system using the CAEN V1720 (250 MHz) data acquisition system. An organic-liquid scintillator, coupled to a photo-multiplier tube, was used to detect neutrons and gamma rays from a Cf-252 spontaneous-fission source. The PSD performance of both systems was optimized and quantified using a traditional figure-of-merit (FOM) approach. FOM's were found for three, 300 keVee light-output bins, spanning from 100 to 1000 keVee, and one larger bin from 100 to 1800 keVee. Digital PSD outperformed analog PSD in the lowest light-output bin by approximately 50%, and by 11% for the highest light-output bin.

  15. Integrated power electronic converters and digital control

    CERN Document Server

    Emadi, Ali; Nie, Zhong

    2009-01-01

    Non-isolated DC-DC ConvertersBuck ConverterBoost ConverterBuck-Boost ConverterIsolated DC-DC ConvertersFlyback ConverterForward ConverterPush-Pull ConverterFull-Bridge ConverterHalf-Bridge ConverterPower Factor CorrectionConcept of PFCGeneral Classification of PFC CircuitsHigh Switching Frequency Topologies for PFCApplication of PFC in Advanced Motor DrivesIntegrated Switched-Mode Power ConvertersSwitched-Mode Power SuppliesThe Concept of Integrated ConverterDefinition of Integrated Switched-Mode Power Supplies (ISMPS)Boost-Type Integrated TopologiesGeneral Structure of Boost-Type Integrated T

  16. A Low-Power Gateable Vernier Ring Oscillator Time-to-Digital Converter for Biomedical Imaging Applications.

    Science.gov (United States)

    Cheng, Zeng; Deen, M Jamal; Peng, Hao

    2016-04-01

    In this paper, a high resolution, high precision and ultra-low power consumption time-to-digital converter (TDC) is presented. The proposed TDC is based on the gateable Vernier ring oscillator architecture. Fine resolution is achieved through two ring oscillators arranged in the Vernier configuration. This TDC employs a single-transition end-of-conversion detection circuit and turns off the ring oscillators whenever the conversion is completed to reduce power consumption. The prototype chip is fabricated in a standard 130 nm digital CMOS process and its area is only 0.03 mm(2). Using a 1.2 V supply, the TDC achieves a resolution of 7.3 ps, a single-shot precision of 1.0LSB, and an average power consumption of 1.2 mW. A root-mean-square integral nonlinearity (INL) of 1.2 LSB is obtained with the help of an INL look-up-table calibration. Compared to previously reported ring-oscillator based TDCs, the proposed design achieves the lowest power consumption to date.

  17. Digital-to-analog device for continuous detection of neutron damping decrement in logging

    International Nuclear Information System (INIS)

    Sokolov, Yu.I.; Zinchenko, A.I.; Rudenko, Eh.L.

    1976-01-01

    Algorithms are analyzed for a continuous detection of the damping decrement (DD) of the thermal neutron density in time, characterizing absorptive and diffusion properties of a bed; an an automated measuring device has been developed. The design of a digital calculator involving reguired mathematical and logical operations in the DD measurement by the specified algorithms necessitated the use of a system of elements with a diode-transistor RC logic. Following laboratory tests the mock-up of the calculator was subjected to borehole tests as part of the pulsed neutron logging apparatus of the IGN-4 type. A continuous detection of the DD reciprocal with a parallel recording of the differential and integral curves of pulsed neutron-neutron logging has been performed. The borehole tests revealed the efficiency of the new device and the possibility of its use together with the apparatus of the IGN-4 type

  18. High quality digital holographic reconstruction on analog film

    Science.gov (United States)

    Nelsen, B.; Hartmann, P.

    2017-05-01

    High quality real-time digital holographic reconstruction, i.e. at 30 Hz frame rates, has been at the forefront of research and has been hailed as the holy grail of display systems. While these efforts have produced a fascinating array of computer algorithms and technology, many applications of reconstructing high quality digital holograms do not require such high frame rates. In fact, applications such as 3D holographic lithography even require a stationary mask. Typical devices used for digital hologram reconstruction are based on spatial-light-modulator technology and this technology is great for reconstructing arbitrary holograms on the fly; however, it lacks the high spatial resolution achievable by its analog counterpart, holographic film. Analog holographic film is therefore the method of choice for reconstructing highquality static holograms. The challenge lies in taking a static, high-quality digitally calculated hologram and effectively writing it to holographic film. We have developed a theoretical system based on a tunable phase plate, an intensity adjustable high-coherence laser and a slip-stick based piezo rotation stage to effectively produce a digitally calculated hologram on analog film. The configuration reproduces the individual components, both the amplitude and phase, of the hologram in the Fourier domain. These Fourier components are then individually written on the holographic film after interfering with a reference beam. The system is analogous to writing angularly multiplexed plane waves with individual component phase control.

  19. Design of Pipeline Analog-To-Digital Converters Via Geometric Programming

    National Research Council Canada - National Science Library

    Hershenson, Maria

    2002-01-01

    .... This method computes the sizes of the different components (transistors, capacitors, etc.) in a predefined ADC topology so that the design specifications are met in the desired process technology...

  20. Optically Assisted Analog-to-Digital Converter for Next Generation "Software Defined" Radios, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Next generation commercial and DoD communication systems must meet the demand for higher data rates and the growing number of users in an increasingly over-taxed...

  1. Analog-to-digital interface and real-time measurement of the phase volume of a beam using an ''elektronika-1001'' computer

    International Nuclear Information System (INIS)

    Batkin, V.I.; Getmanov, V.N.

    1984-01-01

    The authors describe a system for multichannel exchange of analog and digital signals between an Elektronika 100I computer and experimental hardware via noise-immune connecting lines. Diagrams illustrate the analog-to-digital interface and the connections between that interface and a multiwire secondary-emission profile detector. The dynamic measurement range of the system is 1-10 -4 pC per wire. Analog and digital data are input at 12.5 kHz and 30 kHz respectively. The time required to analyze the beam shape and make corrections is 150 microseconds. The geometric parameters of the beam are measured accurately to 20 micrometers. The angular divergence of the beam is 10 -4 rad

  2. Epistemic Function and Ontology of Analog and Digital Images

    Directory of Open Access Journals (Sweden)

    Aleksandra Łukaszewicz Alcaraz

    2016-01-01

    Full Text Available The important epistemic function of photographic images is their active role in construction and reconstruction of our beliefs concerning the world and human identity, since we often consider photographs as presenting reality or even the Real itself. Because photography can convince people of how different social and ethnic groups and even they themselves look, documentary projects and the dissemination of photographic practices supported the transition from disciplinary society to the present-day society of control. While both analog and digital images are formed from the same basic materia, the ways in which this matter appears are distinctive. In the case of analog photography, we deal with physical and chemical matter, whereas with digital images we face electronic matter. Because digital photography allows endless modification of the image, we can no longer believe in the truthfulness of digital images.

  3. Anticipatory Functions, Digital-Analog Forms and Biosemiotics

    DEFF Research Database (Denmark)

    Arnellos, Argyris; Bruni, Luis Emilio; El-Hani, Charbel Niño

    2012-01-01

    our overall approach. We adopt a Peircean approach to Biosemiotics, and a dynamical approach to Digital-Analog relations and to the interplay between different levels of functionality in autonomous systems, taking an integrative approach. We then apply the underlying biosemiotic logic to a particular...

  4. CRAC channels drive digital activation and provide analog control and synergy to Ca(2+)-dependent gene regulation.

    Science.gov (United States)

    Kar, Pulak; Nelson, Charmaine; Parekh, Anant B

    2012-02-07

    Ca(2+)-dependent gene expression is critical for cell growth, proliferation, plasticity, and adaptation [1-3]. Because a common mechanism in vertebrates linking cytoplasmic Ca(2+) signals with activation of protein synthesis involves the nuclear factor of activated T cells (NFAT) family of transcription factors [4, 5], we have quantified protein expression in single cells following physiological Ca(2+) signals by using NFAT-driven expression of a genetically encoded fluorescent protein. We find that gene expression following CRAC channel activation is an all-or-nothing event over a range of stimulus intensities. Increasing agonist concentration recruits more cells but each responding cell does so in an essentially digital manner. Furthermore, Ca(2+)-dependent gene expression shows both short-term memory and strong synergy, where two pulses of agonist, which are ineffectual individually, robustly activate gene expression provided that the time interval between them is short. Such temporal filtering imparts coincidence detection to Ca(2+)-dependent gene activation. The underlying molecular basis mapped to time-dependent, nonlinear accumulation of nuclear NFAT. Local Ca(2+) near CRAC channels has to rise above a threshold level to drive gene expression, providing analog control to the digital activation process and a means to filter out fluctuations in background noise from activating transcription while ensuring robustness and high fidelity in the excitation-transcription coupling mechanism. Copyright © 2012 Elsevier Ltd. All rights reserved.

  5. Changes of radio-technological studies in the field of medical imaging. From analogous studies to digital ones

    International Nuclear Information System (INIS)

    Shiraishi, Junji; Uchiyama, Yoshikazu; Honda, Michitaka; Ogura, Toshihiro; Kunitomo, Hiroshi; Kishimoto, Kenji; Ishii, Rie; Hara, Takeshi; Tanaka, Rie

    2014-01-01

    Eight authors briefly describe practical reviews of domestic changes in the title of their expertized field for the purpose of enlightenment. Reviews concern following studies: on the construction of medical images, on characteristics of input/output, of resolution, of noise, on whole assessment of images with noise-equivalent number of quanta/detective quantum efficiency (NEQ/DQE), with subjectivity, on computer-aided diagnosis (CAD), and on image displaying system assessment. X-ray image subtraction along with the development of CT is the origin of real-time digitalized image construction. Studies on the input/output affects the quality of images and exposure dose to patients, which have contributed to works of investigators at manufacturing and technologists on site. Then described are changes in the assessment of image by digital radiography (DR), of which basis was originally established at analogous sensitizer/film (S/F) era, of image resolution and of noise characteristic assessment, during the period from S/F to DR systems. Assessment of images with NEQ/DQE has been essentially based on the description in the 'Image Science' published in 1974 and its derived domestic educational researches; and the assessment with subjectivity involves the receiver operating characteristic (ROC), which leads to computer-aided diagnosis (CAD). Studies on image display are now changing responding to clinical and social needs. (T.T.)

  6. Digial Technology Qualification Task 2 - Suitability of Digital Alternatives to Analog Sensors and Actuators

    Energy Technology Data Exchange (ETDEWEB)

    Ted Quinn; Jerry Mauck

    2012-09-01

    The next generation reactors in the U.S. are an opportunity for vendors to build new reactor technology with advanced Instrumentation and Control Systems (control rooms, DCS, etc.). The advances made in the development of many current generation operating reactors in other parts of the world are being used in the design and construction of new plants. These new plants are expected to have fully integrated digital control rooms, computerized procedures, integrated surveillance testing with on-line monitoring and a major effort toward improving the O&M and fault survivability of the overall systems. In addition the designs are also incorporating major improvements in the man-machine interface based on lessons learned in nuclear and other industries. The above relates primarily to the scope of supply in instrumentation and control systems addressed by Chapter 7 of the Standard Review Plan (SRP) NUREG-0800 (Reference 9.5), and the associated Balance of Plant (BOP) I&C systems. This does not relate directly to the actuator and motor, breaker, initiation circuitry, valve position, etc. which is the subject of this report and normally outside of the traditional Distributed Control System (DCS), for both safety and non-safety systems. The recommendations presented in this report will be used as input to I&C research programming for the implementation of lessons learned during the early phases of new build both for large light water reactors (LWR) and also small modular reactors (SMR). This report is intended to support current research plans and provide user (vendor, owner-operator) input to the optimization of these research plans.

  7. A multi-path gated ring oscillator based time-to-digital converter in 65 nm CMOS technology

    Science.gov (United States)

    Chen, Jiang; Yumei, Huang; Zhiliang, Hong

    2013-03-01

    A gated ring oscillator (GRO) based time-to-digital converter (TDC) is presented. To enhance the resolution of the TDC, a multi-path structure for the GRO is used to achieve a higher oscillation frequency and an input stage is also presented to equivalently amplify the input time difference with a gain of 2. The GRO based TDC circuit is fabricated in TSMC 65 nm CMOS technology and the core area is about 0.02 mm2. According to the measurement results, the effective resolution of this circuit is better than 4.22 ps under a 50 MHz clock frequency. With a 1 ns input range, the maximum clock frequency of this circuit is larger than 200 MHz. Under a 1 V power supply, with a 200-800 ps input time difference, the measured power consumption is 1.24 to 1.72 mW at 50 MHz clock frequency and 1.73 to 2.20 mW at 200 MHz clock frequency.

  8. Analog-to-digital conversion of spectrometric data in information-control systems of activation analysis

    International Nuclear Information System (INIS)

    Mamonov, E.I.

    1972-01-01

    Analogue-digital conversion (ADC) techniques in nuclear radiation spectrometer channels is a most important link of information control systems in activation analysis. For the development of the ADC of spectrometer channels logico-structural methods of increasing the capacity, procedures for boosting frequency modes and improving the accuracy are promising. Procedures are suggested for increasing the ADC capacity. Insufficient stability and noticeable non-linearity of the spectrometer channel can be corrected at the information processing stage if their regularities are known. Capacity limitations make the development of ADC featuring high stability, capacity and linearity quite urgent

  9. A High-Linearity, Ring-Oscillator-Based, Vernier Time-to-Digital Converter Utilizing Carry Chains in FPGAs

    Science.gov (United States)

    Cui, Ke; Ren, Zhongjie; Li, Xiangyu; Liu, Zongkai; Zhu, Rihong

    2017-01-01

    Time-to-digital converters (TDCs) using dedicated carry chains of field programmable gate arrays (FPGAs) are usually organized in tapped-delay-line type which are intensively researched in recent years. However this method incurs poor differential nonlinearity (DNL) which arises from the inherent uneven bin granularity. This paper proposes a TDC architecture which utilizes the carry chains in a quite different manner in order to alleviate this long-standing problem. Two independent carry chains working as the delay lines for the fine time interpolation are organized in a ring-oscillator-based Vernier style and the time difference between them is finely adjusted by assigning different number of basic delay cells. A specific design flow is described to obtain the desired delay difference. The TDC was implemented on a Stratix III FPGA. Test results show that the obtained resolution is 31 ps and the DNL\\INL is in the range of (-0.080 LSB, 0.073 LSB)(-0.087 LSB, 0.091 LSB). This demonstrates that the proposed architecture greatly improves linearity compared to previous techniques. Additionally the resource cost is rather low which uses only 319 LUTs and 104 registers per TDC channel.

  10. A digital instantaneous frequency measurement technique utilising high speed analogue to digital converters and field programmable gate arrays

    CSIR Research Space (South Africa)

    Herselman, PLR

    2007-09-01

    Full Text Available is contaminated by the noise as the SNR decreases. The mean deviation, maximum absolute error and the Root-Mean-Squared (RMS) error are plotted as a function of frequency for the various SNRs in Fig. 4. The bias introduced for low SNR signals is obvious (Fig... characteristics in real- time by changing the filter coefficients on-the-fly. The biasing effect at low SNR levels can be reduced by designing the FIR filters to have lower cut-off frequencies. The adverse effect of doing this would be increased latency, once...

  11. High frequency, high time resolution time-to-digital converter employing passive resonating circuits

    Energy Technology Data Exchange (ETDEWEB)

    Ripamonti, Giancarlo; Abba, Andrea; Geraci, Angelo [Department of Electronics, Politecnico di Milano, via C. Golgi 40, Milano 20133 (Italy)

    2010-05-15

    A method for measuring time intervals accurate to the picosecond range is based on phase measurements of oscillating waveforms synchronous with their beginning and/or end. The oscillation is generated by triggering an LC resonant circuit, whose capacitance is precharged. By using high Q resonators and a final active quenching of the oscillation, it is possible to conjugate high time resolution and a small measurement time, which allows a high measurement rate. Methods for fast analysis of the data are considered and discussed with reference to computing resource requirements, speed, and accuracy. Experimental tests show the feasibility of the method and a time accuracy better than 4 ps rms. Methods aimed at further reducing hardware resources are finally discussed.

  12. Digital circuit for the introduction and later removal of dither from an analog signal

    Science.gov (United States)

    Borgen, Gary S.

    1994-05-01

    An electronics circuit is presented for accurately digitizing an analog audio or like data signal into a digital equivalent signal by introducing dither into the analog signal and then subsequently removing the dither from the digitized signal prior to its conversion to an analog signal which is a substantial replica of the incoming analog audio or like data signal. The electronics circuit of the present invention is characterized by a first pseudo-random number generator which generates digital random noise signals or dither for addition to the digital equivalent signal and a second pseudo-random number generator which generates subtractive digital random noise signals for the subsequent removal of dither from the digital equivalent signal prior its conversion to the analog replica signal.

  13. The application of standardized control and interface circuits to three dc to dc power converters.

    Science.gov (United States)

    Yu, Y.; Biess, J. J.; Schoenfeld, A. D.; Lalli, V. R.

    1973-01-01

    Standardized control and interface circuits were applied to the three most commonly used dc to dc converters: the buck-boost converter, the series-switching buck regulator, and the pulse-modulated parallel inverter. The two-loop ASDTIC regulation control concept was implemented by using a common analog control signal processor and a novel digital control signal processor. This resulted in control circuit standardization and superior static and dynamic performance of the three dc-to-dc converters. Power components stress control, through active peak current limiting and recovery of switching losses, was applied to enhance reliability and converter efficiency.

  14. Use of an anthropomorphic hand phantom to verify the radiation intensity that is needed to modify the analog and digital radiographic quality

    International Nuclear Information System (INIS)

    Bandeira, Caroline K.; Vieira, Michele P.M.M.; Felix, Jose E.R.

    2014-01-01

    The radiology is a field of medicine that is in constantly expansion and advancing. This can be noticed with the transition from analog to digital radiology systems, it is important that professionals understand image formation in both systems in order to produce radiographies with diagnostic quality. Therefore, the objective of this work is to present the importance of radiological protection by changing values of technical parameters while the quality of radiographic imaging is sustained. An anthropomorphic hand phantom was built in order to obtain radiographies, as it is necessary to respect the Brazilian regulations (Portaria 453/98) which forbids the use of radiation in patients for testing. Three analog and eight digital radiographies were obtained using fixed kVp and varying mAs. Each image was compared to the others acquired in the same location. Digital radiographies have shown that approximately 28% of change in mAs is necessary to change noise, whereas approximately 33,3% is necessary in the analog system to change density. The conclusion is that computerized systems need less x-ray intensity to modify image features and can reduce the patient radiation doses. However, more testing must be conducted in different radiologic environments to confirm the results obtained in the present study. (author)

  15. Modules of the SUMMA system for data readout to the oscillograph, digital display devices and digital printing

    International Nuclear Information System (INIS)

    Bushnin, Yu.B.; Denisenko, A.A.; Dunajtsev, A.F.; Rybakov, V.G.; Sytin, A.N.

    1975-01-01

    The modules of the ''Summa'' system are described which allow outputting of information to an oscilloscope, a digital tableau, and a digital printing mechanism; they are: a digital-analog converter, a converter that converts a binary code to a binary-decimal code, a digital display module, a block for outputting to a digital printing mechanism, and a block for stipulating the programs during information outputting. The block diagrams of the modules and the block diagram of the information-outputting programs are presented

  16. On automatic synthesis of analog/digital circuits

    Energy Technology Data Exchange (ETDEWEB)

    Beiu, V.

    1998-12-31

    The paper builds on a recent explicit numerical algorithm for Kolmogorov`s superpositions, and will show that in order to synthesize minimum size (i.e., size-optimal) circuits for implementing any Boolean function, the nonlinear activation function of the gates has to be the identity function. Because classical and--or implementations, as well as threshold gate implementations require exponential size, it follows that size-optimal solutions for implementing arbitrary Boolean functions can be obtained using analog (or mixed analog/digital) circuits. Conclusions and several comments are ending the paper.

  17. DIY Hybrid Analog/Digital Modular Synthesis

    OpenAIRE

    Surges, Greg

    2012-01-01

    This paper describes three hardware devices for integrating modular synthesizers with computers, each with a different approach to the relationship between hardware and software. The devices discussed are the USB-Octomod, an 8-channel OSC-compatible computer-controlled control-voltage generator, the tabulaRasa, a hardware table-lookup oscillator synthesis module with corresponding waveform design software, and the pucktronix.snake.corral, a dual 8x8 computer-controlled analog signal routing m...

  18. Analog pulse processor

    Science.gov (United States)

    Wessendorf, Kurt O.; Kemper, Dale A.

    2003-06-03

    A very low power analog pulse processing system implemented as an ASIC useful for processing signals from radiation detectors, among other things. The system incorporates the functions of a charge sensitive amplifier, a shaping amplifier, a peak sample and hold circuit, and, optionally, an analog to digital converter and associated drivers.

  19. Restructuring of a flash A/D converter to improve SEU rad tolerance

    International Nuclear Information System (INIS)

    Monnier, T.; Roche, R.M.; Corbiere, F.

    1999-01-01

    The purpose of this work is to present how structural changes in the conventional Flash Analog to Digital Converter can secure it for a harsh radiation environment. The method consists in a coupling of two complementary techniques: a robust reconfiguration of the logical structure joined to a design hardening of the individual blocks. This approach preserves the ADC performances. (authors)

  20. Simple Digital Control of a Two-Stage PFC Converter Using DSPIC30F Microprocessor

    DEFF Research Database (Denmark)

    Török, Lajos; Munk-Nielsen, Stig

    2010-01-01

    The use of dsPIC digital signal controllers (DSC) in Switch Mode Power Supply (SMPS) applications opens new perspectives for cheap and flexible digital control solutions. This paper presents the digital control of a two stage power factor corrector (PFC) converter. The PFC circuit is designed...... and built for 70W rated output power. Average current mode control for boost converter and current programmed control for forward converter are implemented on a dsPIC30F1010. Pulse Width Modulation (PWM) technique is used to drive the switching MOSFETs. Results show that digital solutions with ds...

  1. Project Birdseye Aerial Photograph Collection: Digital and Analog Materials

    Data.gov (United States)

    National Oceanic and Atmospheric Administration, Department of Commerce — This collection consists of both analog and digital aerial photographs from Arctic areas in and around Baffin Bay, the Labrador Sea, the Arctic Ocean, the Beaufort...

  2. A Cost-Effective 10-Bit D/A Converter for Digital-Input MOEMS Micromirror Actuation

    Directory of Open Access Journals (Sweden)

    Sergio Saponara

    2010-01-01

    Full Text Available The design of a 10-bit resistor-string digital-to-analog converter (DAC for MOEMS micromirror interfacing is addressed in this paper. The proposed DAC, realized in a 0.18-μm BCD technology, features a folded resistor-string stage with a switch matrix and address decoders plus an output voltage buffer stage. The proposed DAC and buffer circuitry are key elements of an innovative scanning micromirror actuator, characterized by direct digital input, full differential driving, and linear response. With respect to the the state-of-the-art resistor-string converters in similar technologies, the proposed DAC has comparable nonlinearity (INL, DNL performances while it has the advantage of a smaller area occupation, 0.17 mm2, including output buffer, and relatively low-power consumption, 200 μW at 500 kSPS and few μW in idle mode.

  3. Programmable electronic system for analog and digital gamma cameras modernization

    International Nuclear Information System (INIS)

    Osorio Deliz, J. F.; Diaz Garcia, A.; Arista Omeu, E. J.

    2013-01-01

    At present the use of analog and digital gamma cameras is continuously increasing in developing countries. Many of them still largely rely in old hardware electronics, which in many cases limits their use in actual nuclear medicine diagnostic studies. For this reason worldwide there are different medical equipment manufacturing companies engaged into partial or total Gamma Cameras modernization. Nevertheless in several occasions acquisition prices are not affordable for developing countries. This work describes the basic features of a programmable electronic system that allows improving acquisitions functions and processing of analog and digital gamma cameras. This system is based on an electronic board for the acquisition and digitization of nuclear pulses which have been generated by gamma camera detector. It comprises a hardware interface with PC and the associated software to fully signal processing. Signal shaping and image processing are included. The extensive use of reference tables in the processing and signal imaging software allowed the optimization of the processing speed. Time design and system cost were also decreased. (Author)

  4. Bandwidth tunable microwave photonic filter based on digital and analog modulation

    Science.gov (United States)

    Zhang, Qi; Zhang, Jie; Li, Qiang; Wang, Yubing; Sun, Xian; Dong, Wei; Zhang, Xindong

    2018-05-01

    A bandwidth tunable microwave photonic filter based on digital and analog modulation is proposed and experimentally demonstrated. The digital modulation is used to broaden the effective gain spectrum and the analog modulation is to get optical lines. By changing the symbol rate of data pattern, the bandwidth is tunable from 50 MHz to 700 MHz. The interval of optical lines is set according to the bandwidth of gain spectrum which is related to the symbol rate. Several times of bandwidth increase are achieved compared to a single analog modulation and the selectivity of the response is increased by 3.7 dB compared to a single digital modulation.

  5. Digitizing high frequency signals using serial analog memories

    International Nuclear Information System (INIS)

    Coonrod, J.W.

    1975-10-01

    An online computer system has been developed as a replacement for oscilloscopes and cameras on the Tormac project. Up to 32 simultaneous waveforms are recorded at up to 2 MHz in analog shift registers, then digitized sequentially after the event into a small PDP-11 computer. Data and functions of data may be displayed or plotted locally, and then forwarded for storage at a larger, remote computer via a network arrangement. Advantages over scopes have been lower incremental cost (approximately $200/channel), less noise pickup, better resolution (less than 1%), and immediate presentation of data

  6. Analog Design for Digital Deployment of a Serious Leadership Game

    Science.gov (United States)

    Maxwell, Nicholas; Lang, Tristan; Herman, Jeffrey L.; Phares, Richard

    2012-01-01

    This paper presents the design, development, and user testing of a leadership development simulation. The authors share lessons learned from using a design process for a board game to allow for quick and inexpensive revision cycles during the development of a serious leadership development game. The goal of this leadership simulation is to accelerate the development of leadership capacity in high-potential mid-level managers (GS-15 level) in a federal government agency. Simulation design included a mixed-method needs analysis, using both quantitative and qualitative approaches to determine organizational leadership needs. Eight design iterations were conducted, including three user testing phases. Three re-design iterations followed initial development, enabling game testing as part of comprehensive instructional events. Subsequent design, development and testing processes targeted digital application to a computer- and tablet-based environment. Recommendations include pros and cons of development and learner testing of an initial analog simulation prior to full digital simulation development.

  7. Medieval Storytelling and Analogous Oral Traditions Today: Two Digital Databases

    Directory of Open Access Journals (Sweden)

    Evelyn Birge Vitz

    2013-10-01

    Full Text Available This essay presents two open-access digital databases of video clips of modern performances of medieval narratives and analogous living oral storytelling traditions: Performing Medieval Narrative Today: A Video Showcase and Arthurian Legend in Performance. To help people recognize the performability of medieval narratives, these websites offer examples of medieval-type storytelling that are still alive today in various parts of the world, as well as clips from performances of medieval narrative created by a new generation of storytellers.

  8. A new time-digital convert circuit based on digital delay line

    International Nuclear Information System (INIS)

    Liu Haifeng; Guo Ying; Zhang Zhi

    2004-01-01

    An introduction of a new method of time-digital convert circuit based on digital delay line is given. High precision and good reliability can be realized when it is combined with traditional counting convert method in the measurement of large scale pulse width and low frequency self-excitation oscillator. (authors)

  9. Digitally Controlled Point of Load Converter with Very Fast Transient Response

    DEFF Research Database (Denmark)

    Jakobsen, Lars Tønnes; Andersen, Michael Andreas E.

    2007-01-01

    voltage mode control and very fast transient response. The DiSOM modulator is combined with a digital PID compensator algorithm is implemented in a hybrid CPLD/FPGA and is used to control a synchronous Buck converter, which is used in typical Point of Load applications. The computational time is only...... and comparator the DiSOM modulator allows the sampling frequency of the output voltage control loop to be higher than the switching frequency of the power converter, typically a DC/DC converter. The features of the DiSOM modulator makes it possible to design a digitally controlled DC/DC converter with linear...... three clock cycles from the time the A/D converter result is read by the control algorithm to the time the duty cycle command is updated. A typical POL converter has been built and the experimental results show that the transient response of the converter is very fast. The output voltage overshoot...

  10. Digitally-controlled PC-interfaced Boost Converter for Educational Purposes

    DEFF Research Database (Denmark)

    Ljusev, Petar; Andersen, Michael A. E.

    2004-01-01

    This paper describes implementation of a simple digital PID control algorithm for a boost converter using a cheap fixed-point 8-bit microcontroller. Serial communication to a PC server program is established for easier downloading of compensator parameters and current and voltage waveform...... acquisition. At the end, client program is presented which uses TCP/IP connection for operating the digitally controlled boost converter over Internet. The aim of this cheap and flexible PC-interfaced boost converter bench is predominantly educational, to allow students to synthesize different digital...... controllers and compare their performance....

  11. Two-Phase Interleaved Buck Converter with a new Digital Self-Oscillating Modulkator

    DEFF Research Database (Denmark)

    Jakobsen, Lars Tønnes; Andersen, Michael Andreas E.

    2007-01-01

    This paper presents a new Digital Self-Oscillating Modulator (DiSOM) for DC/DC converters. The DiSOM modulator alllows the digital control algorithm to sample the output voltage at a sampling frequency higher than the converter switching frequency. This enables higher control loop bandwidth than......SOM modulator and a digital control algorithm have been implemented in an FPGA. Experimental results show that the converter has a very fast transient response when a loadstep is applied to the output. For a loadstep of 50% of nominal output current the output voltage overshoot is less than 2.5% of the nominal...

  12. Digital control of high-frequency switched-mode power converters

    CERN Document Server

    Corradini, Luca; Mattavelli, Paolo; Zane, Regan

    This book is focused on the fundamental aspects of analysis, modeling and design of digital control loops around high-frequency switched-mode power converters in a systematic and rigorous manner Comprehensive treatment of digital control theory for power converters Verilog and VHDL sample codes are provided Enables readers to successfully analyze, model, design, and implement voltage, current, or multi-loop digital feedback loops around switched-mode power converters Practical examples are used throughout the book to illustrate applications of the techniques developed Matlab examples are also

  13. arXiv Development of a time-to-digital converter ASIC for the upgrade of the ATLAS Monitored Drift Tube detector

    CERN Document Server

    INSPIRE-00225390; Xiao, Xiong; An, Qi; Chapman, John W.; Dai, Tiesheng; Zhou, Bing; Zhu, Junjie; Zhao, Lei

    2018-02-01

    The upgrade of the ATLAS muon spectrometer for the high-luminosity LHC requires new trigger and readout electronics for various elements of the detector. We present the design of a time-to-digital converter (TDC) ASIC prototype for the ATLAS Monitored Drift Tube (MDT) detector. The chip was fabricated in a GlobalFoundries 130 nm CMOS technology. Studies indicate that its timing and power dissipation characteristics meet the design specifications, with a timing bin variation of ± 40 ps for all 48 TDC slices and a power dissipation of about 6.5 mW per slice.

  14. Multichannel low power time-to-digital converter card with 21 ps precision and full scale range up to 10 μs

    Energy Technology Data Exchange (ETDEWEB)

    Tamborini, D., E-mail: davide.tamborini@polimi.it; Portaluppi, D.; Villa, F.; Tosi, A. [Politecnico di Milano, Dipartimento di Elettronica, Informazione e Bioingegneria, Piazza Leonardo Da Vinci 32, 20133 Milano (Italy); Tisa, S. [Micro Photon Devices, via Stradivari 4, 39100 Bolzano (Italy)

    2014-11-15

    We present a Time-to-Digital Converter (TDC) card with a compact form factor, suitable for multichannel timing instruments or for integration into more complex systems. The TDC Card provides 10 ps timing resolution over the whole measurement range, which is selectable from 160 ns up to 10 μs, reaching 21 ps rms precision, 1.25% LSB rms differential nonlinearity, up to 3 Mconversion/s with 400 mW power consumption. The I/O edge card connector provides timing data readout through either a parallel bus or a 100 MHz serial interface and further measurement information like input signal rate and valid conversion rate (typically useful for time-correlated single-photon counting application) through an independent serial link.

  15. Multichannel low power time-to-digital converter card with 21 ps precision and full scale range up to 10 μs

    International Nuclear Information System (INIS)

    Tamborini, D.; Portaluppi, D.; Villa, F.; Tosi, A.; Tisa, S.

    2014-01-01

    We present a Time-to-Digital Converter (TDC) card with a compact form factor, suitable for multichannel timing instruments or for integration into more complex systems. The TDC Card provides 10 ps timing resolution over the whole measurement range, which is selectable from 160 ns up to 10 μs, reaching 21 ps rms precision, 1.25% LSB rms differential nonlinearity, up to 3 Mconversion/s with 400 mW power consumption. The I/O edge card connector provides timing data readout through either a parallel bus or a 100 MHz serial interface and further measurement information like input signal rate and valid conversion rate (typically useful for time-correlated single-photon counting application) through an independent serial link

  16. A Power Conditioning Stage Based on Analog-Circuit MPPT Control and a Superbuck Converter for Thermoelectric Generators in Spacecraft Power Systems

    Science.gov (United States)

    Sun, Kai; Wu, Hongfei; Cai, Yan; Xing, Yan

    2014-06-01

    A thermoelectric generator (TEG) is a very important kind of power supply for spacecraft, especially for deep-space missions, due to its long lifetime and high reliability. To develop a practical TEG power supply for spacecraft, a power conditioning stage is indispensable, being employed to convert the varying output voltage of the TEG modules to a definite voltage for feeding batteries or loads. To enhance the system reliability, a power conditioning stage based on analog-circuit maximum-power-point tracking (MPPT) control and a superbuck converter is proposed in this paper. The input of this power conditioning stage is connected to the output of the TEG modules, and the output of this stage is connected to the battery and loads. The superbuck converter is employed as the main circuit, featuring low input current ripples and high conversion efficiency. Since for spacecraft power systems reliable operation is the key target for control circuits, a reset-set flip-flop-based analog circuit is used as the basic control circuit to implement MPPT, being much simpler than digital control circuits and offering higher reliability. Experiments have verified the feasibility and effectiveness of the proposed power conditioning stage. The results show the advantages of the proposed stage, such as maximum utilization of TEG power, small input ripples, and good stability.

  17. Terrestrial Analogs to Mars

    Science.gov (United States)

    Farr, T. G.; Arcone, S.; Arvidson, R. W.; Baker, V.; Barlow, N. G.; Beaty, D.; Bell, M. S.; Blankenship, D. D.; Bridges, N.; Briggs, G.; Bulmer, M.; Carsey, F.; Clifford, S. M.; Craddock, R. A.; Dickerson, P. W.; Duxbury, N.; Galford, G. L.; Garvin, J.; Grant, J.; Green, J. R.; Gregg, T. K. P.; Guinness, E.; Hansen, V. L.; Hecht, M. H.; Holt, J.; Howard, A.; Keszthelyi, L. P.; Lee, P.; Lanagan, P. D.; Lentz, R. C. F.; Leverington, D. W.; Marinangeli, L.; Moersch, J. E.; Morris-Smith, P. A.; Mouginis-Mark, P.; Olhoeft, G. R.; Ori, G. G.; Paillou, P.; Reilly, J. F., II; Rice, J. W., Jr.; Robinson, C. A.; Sheridan, M.; Snook, K.; Thomson, B. J.; Watson, K.; Williams, K.; Yoshikawa, K.

    2002-08-01

    It is well recognized that interpretations of Mars must begin with the Earth as a reference. The most successful comparisons have focused on understanding geologic processes on the Earth well enough to extrapolate to Mars' environment. Several facets of terrestrial analog studies have been pursued and are continuing. These studies include field workshops, characterization of terrestrial analog sites, instrument tests, laboratory measurements (including analysis of Martian meteorites), and computer and laboratory modeling. The combination of all these activities allows scientists to constrain the processes operating in specific terrestrial environments and extrapolate how similar processes could affect Mars. The Terrestrial Analogs for Mars Community Panel has considered the following two key questions: (1) How do terrestrial analog studies tie in to the Mars Exploration Payload Assessment Group science questions about life, past climate, and geologic evolution of Mars, and (2) How can future instrumentation be used to address these questions. The panel has considered the issues of data collection, value of field workshops, data archiving, laboratory measurements and modeling, human exploration issues, association with other areas of solar system exploration, and education and public outreach activities.

  18. Time-interleaved high-speed D/A converters

    NARCIS (Netherlands)

    Olieman, E.

    2016-01-01

    This thesis is on power efficient very high-speed digital-to-analog converters (DACs) in CMOS technology, intended to generate signals from DC to RF. Components in RF signal chains are nowadays often moved from the analog domain to the digital domain. This allows for more flexibility and better

  19. Some important aspects of the amplitude, charge and shape analog signals digitization in nuclear physics experiment

    International Nuclear Information System (INIS)

    Kulka, Z.

    1995-01-01

    One of the fundamental reasons of the special requirements concerning analog-to-digital converters (ADC's) used in nuclear experimental physics, especially in nuclear spectroscopy, in comparison to the conventional ADC's is a fact that they are utilized for continuous distribution measurements which are the nuclear radiation spectra. The ADC's used for distribution registration in form of amplitude or charge histogram spectra should have the differential linearity of two orders of magnitude better than that for conventional ADC's. Moreover, the problem of achievement the acceptable differential linearity (as well as stability) in nuclear spectroscopy is much more complicated because high resolution and high speed of the converters are also required. The first requirement comes out from application of semiconductor detectors, the second one comes from the statistical character of the nuclear processes, as well as, a necessity of collection of huge amount of nuclear data - often in a short time. In this report the influence of the specific needs of the nuclear experiments on the conversion methods selection and construction principles of the pulse ADC's is analyzed. Focus is taken on these ADC's which are used mainly to digital amplitude and charge detector signals measurements in nuclear spectroscopy. Based on the chosen examples of different types of ADC's it is shown how to obtain the required metrological parameters by using enlarged converter's structures and proper choice of the electronics components. In addition, a problem of the detector signals shape measurements in particle physics using the high speed flash ADC's is also discussed. (author). 196 refs, 99 figs, 7 tabs

  20. Synthetic analog and digital circuits for cellular computation and memory.

    Science.gov (United States)

    Purcell, Oliver; Lu, Timothy K

    2014-10-01

    Biological computation is a major area of focus in synthetic biology because it has the potential to enable a wide range of applications. Synthetic biologists have applied engineering concepts to biological systems in order to construct progressively more complex gene circuits capable of processing information in living cells. Here, we review the current state of computational genetic circuits and describe artificial gene circuits that perform digital and analog computation. We then discuss recent progress in designing gene networks that exhibit memory, and how memory and computation have been integrated to yield more complex systems that can both process and record information. Finally, we suggest new directions for engineering biological circuits capable of computation. Copyright © 2014 The Authors. Published by Elsevier Ltd.. All rights reserved.

  1. Converting Radiology Operations in a Six-Hospital Healthcare System from Film-Based to Digital: Another Leadership Role for the Diagnostic Medical Physicist

    International Nuclear Information System (INIS)

    Arreola, Manuel M.; Rill, Lynn N.

    2004-01-01

    As medical facilities across the United States continue to convert their radiology operations from film-based to digital environments, partially accomplished and failed endeavors are frequent because of the lack of competent and knowledgeable leadership. The diagnostic medical physicist is, without a doubt, in a privileged position to take such a leadership role, not only because of her/his understanding of the basics principles of new imaging modalities, but also because of her/his inherent participation in workflow design and educational/training activities. A well-structured approach by the physicist will certainly lead the project to a successful completion, opening, in turn, new opportunities for the medical physicist to become an active participant in the decision-making process for an institution

  2. An 8-bit 100-MS/s digital-to-skew converter embedded switch with a 200-ps range for time-interleaved sampling

    Science.gov (United States)

    Xiaoshi, Zhu; Chixiao, Chen; Jialiang, Xu; Fan, Ye; Junyan, Ren

    2013-03-01

    A sampling switch with an embedded digital-to-skew converter (DSC) is presented. The proposed switch eliminates time-interleaved ADCs' skews by adjusting the boosted voltage. A similar bridged capacitors' charge sharing structure is used to minimize the area. The circuit is fabricated in a 0.18 μm CMOS process and achieves sub-1 ps resolution and 200 ps timing range at a rate of 100 MS/s. The power consumption is 430 μW at maximum. The measurement result also includes a 2-channel 14-bit 100 MS/s time-interleaved ADCs (TI-ADCs) with the proposed DSC switch's demonstration. This scheme is widely applicable for the clock skew and aperture error calibration demanded in TI-ADCs and SHA-less ADCs.

  3. Predictive digital peak current mode controller for DC-DC converters capable of operating over the full 0-100% duty cycle range

    DEFF Research Database (Denmark)

    Andersen, Karsten Holm; Nymand, Morten

    2017-01-01

    In this paper, a high performance fully digital peak current mode controller for DC-DC converters which supports the full duty cycle range from 0-100% is presented. Support for low duty cycle is very important during short circuit or converter overload and support for high duty cycle is important...... for faster response during a transient and for providing a larger output voltage range. The digital current controller is based on a new method, which estimates the inductor current in the middle of the falling current slope. The estimated inductor current is based on sampling the inductor current in either...... duty cycle range of 0-100%. The experimental results furthermore demonstrate the achievement of a very fast digital controller with a crossover frequency about 1/10 of the switching frequency, which is comparable to that obtained by analog peak current mode control....

  4. 75 FR 59100 - Removal of Regulations That Implement and Administer a Coupon Program for Digital-to-Analog...

    Science.gov (United States)

    2010-09-27

    ... Digital Television Transition and Public Safety Fund (the Fund).\\2\\ \\1\\ See Title III of the Deficit... of section 3005 of the Digital Television Transition and Public Safety Act of 2005, as subsequently... Television Transition and Public Safety Act of 2005 (the Act), Public Law 109-171, as amended by the DTV...

  5. MASMA: a versatile multifunctional unit (gated window amplifier, analog memory, and height-to-time converter); Element multifonctionnel M.A.S.M.A. (module amplificateur a seuil, memoire analogique et convertisseur amplitude-temps)

    Energy Technology Data Exchange (ETDEWEB)

    Goursky, V.; Thenes, P. [Commissariat a l' Energie Atomique, Saclay (France). Centre d' Etudes Nucleaires

    1969-07-01

    This multipurpose unit is designed to accomplish one of the following functions: - gated window amplifier, - Analog memory and - Amplitude-to-time converter. The first function is mainly devoted to improve the poor resolution of pulse-height analyzers with a small number of channels. The analog memory, a new function in the standard range of plug-in modules, is capable of performing a number of operations: 1) fixed delay, or variable delay dependent on an external parameter (application to the analog processing of non-coincident pulses), 2) de-randomiser to increase the efficiency of the pulse height analysis in a spectrometry experiment, 3) linear multiplexer to allow an analyser to serve as many spectrometry devices as memory elements that it possesses. Associated with a coding scaler, this unit, if used as a amplitude-to-time converter, constitutes a Wilkinson A.D.C with a capability of 10 bits (or more) and with a 100 MHz clock frequency. (authors) [French] Le present element est concu pour etre utilise dans l'un des modes de fonctionnement suivants: - amplificateur a seuil avec porte, - memoire analogique, - convertisseur amplitude-temps. La fonction amplificateur a seuil est destinee principalement a remedier a la resolution insuffisante de certains analyseurs d'amplitude possedant un faible nombre de canaux. La fonction memoire analogique est une fonction qui n'existe pas encore dans la gamme d'elements standardises. Elle peut trouver de nombreuses applications; a titre d'exemple, citons: 1) element de retard fixe ou dependant d'un parametre externe (application au calcul analogique portant sur les impulsions), 2) memoire-tampon: placee devant un analyseur, elle augmente l'efficacite d'analyse d'une chaine de spectrometrie, 3) multiplexeur analogique, permettant a un seul analyseur de desservir autant de voies de spectrometrie qu'il possede de memoires. En fonction convertisseur amplitude-temps, ce tiroir

  6. Characterization of a detector chain using a FPGA-based time-to-digital converter to reconstruct the three-dimensional coordinates of single particles at high flux

    Energy Technology Data Exchange (ETDEWEB)

    Nogrette, F.; Chang, R.; Bouton, Q.; Westbrook, C. I.; Clément, D. [Laboratoire Charles Fabry, Institut d’Optique Graduate School, CNRS, Univ. Paris-Saclay, 91127 Palaiseau cedex (France); Heurteau, D.; Sellem, R. [Fédération de Recherche LUMAT (DTPI), CNRS, Univ. Paris-Sud, Institut d’Optique Graduate School, Univ. Paris-Saclay, F-91405 Orsay (France)

    2015-11-15

    We report on the development of a novel FPGA-based time-to-digital converter and its implementation in a detection chain that records the coordinates of single particles along three dimensions. The detector is composed of micro-channel plates mounted on top of a cross delay line and connected to fast electronics. We demonstrate continuous recording of the timing signals from the cross delay line at rates up to 4.1 × 10{sup 6} s{sup −1} and three-dimensional reconstruction of the coordinates up to 3.2 × 10{sup 6} particles per second. From the imaging of a calibrated structure we measure the in-plane resolution of the detector to be 140(20) μm at a flux of 3 × 10{sup 5} particles per second. In addition, we analyze a method to estimate the resolution without placing any structure under vacuum, a significant practical improvement. While we use UV photons here, the results of this work apply to the detection of other kinds of particles.

  7. Upgrade Analog Readout and Digitizing System for ATLAS TileCal Demonstrator

    CERN Document Server

    Tang, F; The ATLAS collaboration; Akerstedt, H; Biot, A; Bohm, C; Carrio, F; Drake, G; Hildebrand, K; Muschter, S; Oreglia, M; Paramonov, A

    2013-01-01

    A potential upgrade for the front-end electronics and signal digitization and data acquisition system of the ATLAS hadron calorimeter for the high luminosity Large Hadron Collider (HL-LHC) is described. A Demonstrator is being built to readout a slice of the TileCal detector. The on-detector electronics includes up to 48 Analog Front-end Boards for PMT analog signal processing, 4 Main Boards for data digitization and slow controls, 4 Daughter Boards with high speed optical links to interface the on-detector and off-detector electronics. Two super readout driver boards are used for off-detector data acquisition and fulfilling digital trigger.\

  8. The mixed analog/digital shaper of the LHCb preshower

    CERN Document Server

    Lecoq, J; Cornat, R; Perret, P; Trouilleau, C

    2001-01-01

    The LHCb preshower signals show so many fluctuations at low energy that a classical shaping is not usable at all. Thanks to the fact that the fraction of the collected energy during a whole LHC beam crossing time is 85%, we studied the special solution we presented at Snowmass 1999 workshop. This solution consists of 2 interleaved fast integrators, one being in integrate mode when the other is digitally reset. Two track-and-hold systems and an analog multiplexer are used to give at the output 85% of the signal plus 15% of the previous one. These 15% are digitally computed from the previous sample, and subtracted. A completely new design of this solution had to be made. This new design is described, including new methods to decrease the supply voltage and the noise, as well as to increase the quality of the reset and the linearity. An output stage, consisting of an AB class push-pull using only NPN transistors is also described. Laboratory and beam test results are given. (5 refs).

  9. A novel demodulator/detector for digital and analog signals on LMR channels

    Science.gov (United States)

    Saulnier, Gary J.; Rafferty, William

    1990-01-01

    The design, implementation, and performance of an all-digital demodulator/detector suitable for differentially encoded phase-shift keying (DPSK), continuous-phase frequency-shift keying (CPFSK), frequency-shift keying (FSK), and analog FM are discussed. In this demodulator/detector, two detectors, one noncoherent and another differentially coherent, operate simultaneously to provide data detection and automatic frequency control (AFC). Test results indicate that the system provides improved performance over the conventional analog quadrature detector for two-period raised-cosine (2RC) CPFSK modulation in additive white Gaussian noise (AWGN) and Rayleigh fading channels. Being all-digital, the demodulator/detector is well suited for integrated circuit implementation. In addition, the system performs as well as the analog quadrature detector for analog FM voice transmissions, thereby maintaining full compatibility with analog land mobile radio (LMR) transmissions.

  10. Simplified design of data converters

    CERN Document Server

    Lenk, John

    1997-01-01

    Simplified Design of Data Converters shows how to design and experiment with data converters, both analog-to-digital and digital to analog. The design approach here is the same one used in all of John Lenk's best-selling books on simplified and practical design. Throughout the book, design problems start with guidelines for selecting all components on a trial-value basis, assuming a specific design goal and set of conditions. Then, using the guideline values in experimental circuits, the desired results are produced by varying the experimental component values, if needed.If you are a w

  11. Quality assessment of the digitalization process of analog x-ray images

    International Nuclear Information System (INIS)

    Georgieva, D.

    2014-01-01

    Computer-assisted diagnosis enabled doctors for a second point-of-view on the test results. This improves the diseases' early detection and significantly reduces the chance of errors. These methods very nicely complemented the possibilities of digital medical imaging apparatus, but in analog images their applicability and results entirely depend on the quality of analog images digitalisation. Today many standards and remarks for good practices discuss the digital apparatus image quality but the digitalisation process of analog medical images is not a part of them. Medical imaging apparatus have become digital, but within an entirely digital medical environment is necessary for their ability to blend with the old analog medical imaging carriers. The life of patients doesn't start with the beginning of digital era and for the aim of tracking diseases it is necessary to use the new digital images as well as older analog ones. For the generation of 40-50 years a large archive of images is piled up, which should be accounted of in the diagnosis process. This article is the author's study of the digitalized image quality problem. It offers a new approach to the x-ray image digitalisation - getting the HDR-image by optical sensor. After the HDR-image generation method offers to be used a digital signal processing to improve the quality of the final 16 bit gray scale medical image. The new method for medical image enhancement is proposed - it improves the image contrast, it increases or preserves the dynamic range and it doesn't lead to the loss of small low contrast structures in the image. Key words: Quality of Digital X-Rays Images

  12. Hybrid digital-analog coding with bandwidth expansion for correlated Gaussian sources under Rayleigh fading

    Science.gov (United States)

    Yahampath, Pradeepa

    2017-12-01

    Consider communicating a correlated Gaussian source over a Rayleigh fading channel with no knowledge of the channel signal-to-noise ratio (CSNR) at the transmitter. In this case, a digital system cannot be optimal for a range of CSNRs. Analog transmission however is optimal at all CSNRs, if the source and channel are memoryless and bandwidth matched. This paper presents new hybrid digital-analog (HDA) systems for sources with memory and channels with bandwidth expansion, which outperform both digital-only and analog-only systems over a wide range of CSNRs. The digital part is either a predictive quantizer or a transform code, used to achieve a coding gain. Analog part uses linear encoding to transmit the quantization error which improves the performance under CSNR variations. The hybrid encoder is optimized to achieve the minimum AMMSE (average minimum mean square error) over the CSNR distribution. To this end, analytical expressions are derived for the AMMSE of asymptotically optimal systems. It is shown that the outage CSNR of the channel code and the analog-digital power allocation must be jointly optimized to achieve the minimum AMMSE. In the case of HDA predictive quantization, a simple algorithm is presented to solve the optimization problem. Experimental results are presented for both Gauss-Markov sources and speech signals.

  13. Spike-compensated Low-Voltage Unity-Gain-Reset Switched-Capacitor Algorithmic Digital-to-Analog Converters

    OpenAIRE

    大野, 憲司; 松本, 寛樹

    2009-01-01

    In this paper, they shows two Low-Voltage Switched-Capacitor (SC) cyclic DACs. They are proposed which consists of a switch, capacitor, MOSFET and operational amplifier (op-amp). Circuit operation is evaluated on SIMetrix.

  14. Method of pedestal and common-mode noise correction for switched-capacitor analog memories

    Science.gov (United States)

    Britton, Charles L.

    1996-01-01

    A method and apparatus for correcting common-mode noise and pedestal noise in a multichannel array of switched-capacitor analog memories wherein each analog memory is connected to an associated analog-to-digital converter. The apparatus comprises a single differential element in two different embodiments. In a first embodiment, the differential element is a reference analog memory connected to a buffer. In the second embodiment, the differential element is a reference analog memory connected to a reference analog-to-digital connected to an array of digital summing circuits.

  15. High-speed analog-digital processor for event sampling by particle-number difference

    International Nuclear Information System (INIS)

    Kalinnikov, V.A.; Nikityuk, N.M.

    1986-01-01

    This paper describes a processor designed for event sampling according to the difference in the numbers of particles passing through two hodoscope planes with 64 and 128 inputs. The signal delay of the process is less than 55 nsec. Data compression is employed to increase economy and speed. Parallel compressors can be implemented by digital as well as analog integrated circuits. A block diagram of the analog-digital processor is shown. The circuit is implemented in the CAMAC standard and occupies a unit of width 3M. To eliminate temperature drift of the logic signals, temperature regulation of the reference voltage is used at the summation point in the analog-digital processor

  16. Archive of Digitized Analog Boomer Seismic Reflection Data Collected from Lake Pontchartrain, Louisiana, to Mobile Bay, Alabama, During Cruises Onboard the R/V ERDA-1, June and August 1992

    Science.gov (United States)

    Sanford, Jordan M.; Harrison, Arnell S.; Wiese, Dana S.; Flocks, James G.

    2008-01-01

    . The acoustic energy is reflected at density boundaries (such as the seafloor or sediment layers beneath the seafloor), detected by the hydrophone receiver, and the amplitude of the reflected energy is recorded by an Edward P. Curley Lab (EPC) thermal plotter. This process is repeated at timed intervals (for example, 0.5 s) and recorded for specific intervals of time (for example, 100 ms). The timed intervals are also referred to as the shot interval or fire rate. On analog records, the recorded interval is referred to as the sweep, which is the amount of time the recorder stylus takes to sweep from the top of the record to the bottom of the record, thereby recording the amplitude of the reflected energy of one shot. In this way, consecutive recorded shots produce a two-dimensional (2-D) vertical image of the shallow geologic structure beneath the ship track. Many of the geophysical data collected by the USGS prior to the late 1990s were recorded in analog format and stored as paper copies. Scientists onboard made hand-written annotations onto these records to note latitude and longitude, time, line number, course heading, and geographic points of reference. Each paper roll typically contained numerous survey lines and could reach more than 90 ft in length. All rolls are stored at the USGS FISC-St. Petersburg, FL. To preserve the integrity of these records and improve accessibility, analog holdings were converted to digital files.

  17. Dual-Phase Tapped-Delay-Line Time-to-Digital Converter With On-the-Fly Calibration Implemented in 40 nm FPGA.

    Science.gov (United States)

    Won, Jun Yeon; Kwon, Sun Il; Yoon, Hyun Suk; Ko, Guen Bae; Son, Jeong-Whan; Lee, Jae Sung

    2016-02-01

    This paper describes two novel time-to-digital converter (TDC) architectures. The first is a dual-phase tapped-delay-line (TDL) TDC architecture that allows us to minimize the clock skew problem that causes the highly nonlinear characteristics of the TDC. The second is a pipelined on-the-fly calibration architecture that continuously compensates the nonlinearity and calibrates the fine times using the most up-to-date bin widths without additional dead time. The two architectures were combined and implemented in a single Virtex-6 device (ML605, Xilinx) for time interval measurement. The standard uncertainty for the time intervals from 0 to 20 ns was less than 12.83 ps-RMS (root mean square). The resolution (i.e., the least significant bit, LSB) of the TDC was approximately 10 ps at room temperature. The differential nonlinearity (DNL) values were [-1.0, 1.91] and [-1.0, 1.88] LSB and the integral nonlinearity (INL) values were [-2.20, 2.60] and [-1.63, 3.93] LSB for the two different TDLs that constitute one TDC channel. During temperature drift from 10 to 50(°)C, the TDC with on-the-fly calibration maintained the standard uncertainty of 11.03 ps-RMS.

  18. Development of reconfigurable analog and digital circuits for plasma diagnostics measurement systems

    International Nuclear Information System (INIS)

    Srivastava, Amit Kumar; Sharma, Atish; Raval, Tushar

    2009-01-01

    In long pulse discharge tokamak, a large number of diagnostic channels are being used to understand the complex behavior of plasma. Different diagnostics demand different types of analog and digital processing for plasma parameters measurement. This leads to variable requirements of signal processing for diagnostic measurement. For such types of requirements, we have developed hardware with reconfigurable electronic devices, which provide flexible solution for rapid development of measurement system. Here the analog processing is achieved by Field Programmable Analog Array (FPAA) integrated circuit while reconfigurable digital devices (CPLD/FPGA) achieve digital processing. FPAA's provide an ideal integrated platform for implementing low to medium complexity analog signal processing. With dynamic reconfigurability, the functionality of the FPAA can be reconfigured in-system by the designer or on the fly by a microprocessor. This feature is quite useful to manipulate the tuning or the construction of any part of the analog circuit without interrupting operation of the FPAA, thus maintaining system integrity. The hardware operation control logic circuits are configured in the reconfigurable digital devices (CPLD/FPGA) to control proper hardware functioning. These reconfigurable devices provide the design flexibility and save the component space on the board. It also provides the flexibility for various setting through software. The circuit controlling commands are either issued by computer/processor or generated by circuit itself. (author)

  19. Sampled data CT system including analog filter and compensating digital filter

    International Nuclear Information System (INIS)

    Glover, G. H.; DallaPiazza, D. G.; Pelc, N. J.

    1985-01-01

    A CT scanner in which the amount of x-ray information acquired per unit time is substantially increased by using a continuous-on x-ray source and a sampled data system with the detector. An analog filter is used in the sampling system for band limiting the detector signal below the highest frequency of interest, but is a practically realizable filter and is therefore non-ideal. A digital filter is applied to the detector data after digitization to compensate for the characteristics of the analog filter, and to provide an overall filter characteristic more nearly like the ideal

  20. A high precision time-to-digital converter based on multi-phase clock implemented within Field-Programmable-Gate-Array

    International Nuclear Information System (INIS)

    Chen Kai; Liu Shubin; An Qi

    2010-01-01

    In this paper, the design of a coarse-fine interpolation Time-to-Digital Converter (TDC) is implemented in an ALTERA's Cyclone FPGA. The carry-select chain performs as the tapped delay line. The Logic Array Block (LAB) having a propagation delay of 165 ps in the chain is synthesized as delay cell. Coarse counters triggered by the global clock count the more significant bits of the time data. This clock is also fed through the delay line, and LABs create the copies. The replicas are latched by the tested event signal, and the less significant bits are encoded from the latched binary bits. Single-shot resolution of the TDC can be 60 ps. The worst Differential Nonlinearity (DNL) is about 0.2 Least Significant Bit (LSB, 165 ps in this TDC module), and the Integral Nonlinearity (INL) is 0.6 LSB. In comparison with other architectures using the synchronous global clock to sample the taps, this architecture consumed less electric power and logic cells, and is more stable. (authors)

  1. High-Speed, Low-Power ADC for Digital Beam Forming (DBF) Systems Project

    Data.gov (United States)

    National Aeronautics and Space Administration — Ridgetop Group will design a high-speed, low-power silicon germanium (SiGe)-based, analog-to-digital converter (ADC) to be a key element for digital beam forming...

  2. High-Speed, Low-Power ADC for Digital Beam Forming (DBF) Systems Project

    Data.gov (United States)

    National Aeronautics and Space Administration — In Phase 1, Ridgetop Group designed a high-speed, yet low-power silicon germanium (SiGe)-based, analog-to-digital converter (ADC) to be a key element for digital...

  3. High-Speed, Low-Power ADC for Digital Beam Forming (DBF) Systems, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Ridgetop Group will design a high-speed, low-power silicon germanium (SiGe)-based, analog-to-digital converter (ADC) to be a key element for digital beam forming...

  4. High-Speed, Low-Power ADC for Digital Beam Forming (DBF) Systems, Phase II

    Data.gov (United States)

    National Aeronautics and Space Administration — In Phase 1, Ridgetop Group designed a high-speed, yet low-power silicon germanium (SiGe)-based, analog-to-digital converter (ADC) to be a key element for digital...

  5. Potential Upgrade of the CMS Tracker Analog Readout Optical Links Using Bandwidth Efficient Digital Modulation

    OpenAIRE

    Dris, Stefanos; Foudas, Costas; Gill, Karl; Grabit, Robert; Ricci, Daniel; Troska, Jan; Vasey, Francois

    2010-01-01

    The potential application of advanced digital communication schemes in a future upgrade of the CMS Tracker readout optical links is currently being investigated at CERN. We show experimentally that multi-Gbit/s data rates are possible over the current 40 MSamples/s analog optical links by employing techniques similar to those used in ADSL. The concept involves using one or more digitally-modulated sinusoidal carriers in order to make efficient use of the available bandwidth.

  6. Potential Upgrade of the CMS Tracker Analog Readout Optical Links using Bandwidth Efficient Digital Modulation

    CERN Document Server

    Dris, Stefanos; Gill, K; Grabit, R; Ricci, D; Troska, J; Vasey, F

    2007-01-01

    The potential application of advanced digital communication schemes in a future upgrade of the CMS Tracker readout optical links is currently being investigated at CERN. We show experimentally that multi-Gbit/s data rates are possible over the current 40 MSamples/s analog optical links by employing techniques similar to those used in ADSL. The concept involves using one or more digitally-modulated sinusoidal carriers in order to make efficient use of the available bandwidth.

  7. Sobre A Era Digital: Do Analógico Ao “Algorithmicturn” / About The Digital Age: From Analog To "Algorithmic Turn"

    OpenAIRE

    Cádima, Francisco Rui; Universidade Nova de Lisboa

    2015-01-01

    RESUMO Tal como EvgenyMorozov (2012) afirma: "em vez de celebrar o nirvana mítico de desintermediação, devemos antes olhar para as blackboxes de algoritmos de spam e propaganda". Nesta nova era digital, os media e o campo da comunicação estão a atravessar um ponto de viragem e novas convergências críticas, a diferentes níveis. Neste artigovamos explorar, nomeadamente, um dos grandes problemas para os meios de comunicação e o jornalismo de hoje, por exemplo, o surgimento de novos intermediário...

  8. Comparative study of digital laser film and analog paper image recordings

    International Nuclear Information System (INIS)

    Lee, K.R.; Cox, G.G.; Templeton, A.W.; Preston, D.F.; Anderson, W.H.; Hensley, K.S.; Dwyer, S.J.

    1987-01-01

    The increase in the use of various imaging modalities demands higher quality and more efficacious analog image recordings. Laser electronic recordings with digital array prints of 4,000 x 5,000 x 12 bits obtained using laser-sensitive film or paper are being evaluated. Dry silver paper recordings are being improved and evaluated. High-resolution paper dot printers are being studied to determine their gray-scale capabilities. The authors evaluated the image quality, costs, clinical utilization, and acceptability of CT scans, MR images, digital subtraction angiograms, digital radiographs, and radionuclide scans recorded by seven different printers (three laser, three silver paper, and one dot) and compared the same features in conventional film recording. This exhibit outlines the technical developments and instrumentation of digital laser film and analog paper recorders and presents the results of the study

  9. Analysis of parallel optical sampling rate and ADC requirements in digital coherent receivers

    DEFF Research Database (Denmark)

    Lorences Riesgo, Abel; Galili, Michael; Peucheret, Christophe

    2012-01-01

    We comprehensively assess analog-to-digital converter requirements in coherent digital receiver schemes with parallel optical sampling. We determine the electronic requirements in accordance with the properties of the free running local oscillator....

  10. Teleseism-based Relative Time Corrections for Modern Analyses of Digitized Analog Seismograms

    Science.gov (United States)

    Lee, T. A.; Ishii, M.

    2017-12-01

    With modern-day instruments and seismic networks timed by GPS systems, synchronization of data streams is all but a forgone conclusion. However, during the analog era, when each station had its own clock, comparing data timing from different stations was a far more daunting prospect. Today, with recently developed methods by which analog data can be digitized, having the ability to accurately reconcile the timings of two separate stations would open decades worth of data to modern analyses. For example, one possible and exciting application would be using noise interferometry with digitized analog data in order to investigate changing structural features (on a volcano for example) over a much longer timescale than was previously possible. With this in mind, we introduce a new approach to sync time between stations based on teleseismic arrivals. P-wave arrivals are identified at stations for pairs of earthquakes from the digital and analog eras that have nearly identical distances, locations, and depths. Assuming accurate timing of the modern data, relative time corrections between a pair of stations can then be inferred for the analog data. This method for time correction depends upon the analog stations having modern equivalents, and both having sufficiently long durations of operation to allow for recording of usable teleseismic events. The Hawaii Volcano Observatory (HVO) network is an especially ideal environment for this, as it not only has a large and well-preserved collection of analog seismograms, but also has a long operating history (1912 - present) with many of the older stations having modern equivalents. As such, the scope of this project is to calculate and apply relative time corrections to analog data from two HVO stations, HILB (1919-present) and UWE (1928-present)(HILB now part of Pacific Tsunami network). Further application of this method could be for investigation of the effects of relative clock-drift, that is, the determining factor for how

  11. Digital control of grid connected converters for distributed power generation

    Energy Technology Data Exchange (ETDEWEB)

    Skjellnes, Tore

    2008-07-01

    Pulse width modulated converters are becoming increasingly popular as their cost decreases and power rating increases. The new trend of small scale power producers, often using renewable energy sources, has created new demands for delivery of energy to the grid. A major advantage of the pulse width modulated converter is the ability to control the output voltage at any point in the voltage period. This enables rapid response to load changes and non-linear loads. In addition it can shape the voltage in response to the output current to create an outward appearance of a source impedance. This is called a virtual impedance. This thesis presents a controller for a voltage controlled three phase pulse width modulated converter. This controller enables operation in standalone mode, in parallel with other converters in a micro grid, and in parallel with a strong main grid. A time varying virtual impedance is presented which mainly attenuates reactive currents. A method of investigating the overall impedance including the virtual impedance is presented. New net standards have been introduced, requiring the converter to operate even during severe dips in the grid voltage. Experiments are presented verifying the operation of the controller during voltage dips. (Author). 37 refs., 65 figs., 10 tabs

  12. Telling time from analog and digital clocks: A multiple-route account

    NARCIS (Netherlands)

    Korvorst, M.H.W.; Roelofs, A.P.A.; Levelt, W.J.M.

    2007-01-01

    Does the naming of clocks always require conceptual preparation? To examine this question, speakers were presented with analog and digital clocks that had to be named in Dutch using either a relative (e.g., "quarter to four") or an absolute (e.g., "three forty-five") clock time expression format.

  13. Analog Fixed Maximum Power Point Control for a PWM Step-downConverter for Water Pumping Installations

    DEFF Research Database (Denmark)

    Beltran, H.; Perez, E.; Chen, Zhe

    2009-01-01

    This paper describes a Fixed Maximum Power Point analog control used in a step-down Pulse Width Modulated power converter. The DC/DC converter drives a DC motor used in small water pumping installations, without any electric storage device. The power supply is provided by PV panels working around...

  14. A -104dBc/Hz In-Band Phase Noise 3GHz All Digital PLL with Phase Interpolation Based Hierarchical Time to Digital Converter

    Science.gov (United States)

    Miyashita, Daisuke; Kobayashi, Hiroyuki; Deguchi, Jun; Kousai, Shouhei; Hamada, Mototsugu; Fujimoto, Ryuichi

    This paper presents an ADPLL using a hierarchical TDC composed of a 4fLO DCO followed by a divide-by-4 circuit and three stages of known phase interpolators. We derived simple design requirements for ensuring precision of the phase interpolator. The proposed architecture provides immunity to PVT and local variations, which allows calibration-free operation, as well as sub-inverter delay resolution contributing to good in-band phase noise performance. Also the hierarchical TDC makes it possible to employ a selective activation scheme for power saving. Measured performances demonstrate the above advantages and the in-band phase noise reaches -104dBc/Hz. It is fabricated in a 65nm CMOS process and the active area is 0.18mm2.

  15. Analog Audio Format Changes From Being Digital Audio Using Sony Sound Forge 9.0

    OpenAIRE

    Faisal Safrudin; Yulina Yulina

    2010-01-01

    Perubahan sebuah audio analog ke audio digital tidak hanya berguna padakalangan jurnalis atau wartawan juga bermanfaat untuk khalayak umumsekalipun. Pada teknologi sebelumnya banyak kita jumpai hampir setiap orangmenggunakan audio analog yaitu berupa kaset. Sejalannya perkembanganteknologi, format audio analog sudah jarang digunakan dengan hadirnya audiodigital, namun hal tersebut dapat diatasi dengan merubah format audio analog keaudio digital dengan menggunakan Sony Sound Forge 9.0. Penulis...

  16. Analog electronics for radiation detection

    CERN Document Server

    2016-01-01

    Analog Electronics for Radiation Detection showcases the latest advances in readout electronics for particle, or radiation, detectors. Featuring chapters written by international experts in their respective fields, this authoritative text: Defines the main design parameters of front-end circuitry developed in microelectronics technologies Explains the basis for the use of complementary metal oxide semiconductor (CMOS) image sensors for the detection of charged particles and other non-consumer applications Delivers an in-depth review of analog-to-digital converters (ADCs), evaluating the pros and cons of ADCs integrated at the pixel, column, and per-chip levels Describes incremental sigma delta ADCs, time-to-digital converter (TDC) architectures, and digital pulse-processing techniques complementary to analog processing Examines the fundamental parameters and front-end types associated with silicon photomultipliers used for single visible-light photon detection Discusses pixel sensors ...

  17. A Nonlinear Digital Control Solution for a DC/DC Power Converter

    Science.gov (United States)

    Zhu, Minshao

    2002-01-01

    A digital Nonlinear Proportional-Integral-Derivative (NPID) control algorithm was proposed to control a 1-kW, PWM, DC/DC, switching power converter. The NPID methodology is introduced and a practical hardware control solution is obtained. The design of the controller was completed using Matlab (trademark) Simulink, while the hardware-in-the-loop testing was performed using both the dSPACE (trademark) rapid prototyping system, and a stand-alone Texas Instruments (trademark) Digital Signal Processor (DSP)-based system. The final Nonlinear digital control algorithm was implemented and tested using the ED408043-1 Westinghouse DC-DC switching power converter. The NPID test results are discussed and compared to the results of a standard Proportional-Integral (PI) controller.

  18. Converting to Broadsheet.

    Science.gov (United States)

    Willis, Tony

    2002-01-01

    Describes a high-school journalism adviser's experiences in shifting production to a broadsheet format. Addresses: rethinking content, redesigning support materials, developing a public relations strategy to help readers make the transition, and anticipating complications. (RS)

  19. Digital peak current mode control with adaptive slope compensation for DC-DC converters

    DEFF Research Database (Denmark)

    Andersen, Karsten Holm; Nymand, Morten

    2017-01-01

    This paper presents an adaptive slope compensation method for peak current mode control of digital controlled DC-DC converters, which controls the quality factor of the complex conjugated poles at half the switching frequency. Using quality factor control enables optimization of the dynamic...... performance and stability of current mode control. The presented method adapt to DC-DC converter operating conditions by estimating the rising and falling inductor current slopes, to apply a current slope compensation value to obtain a constant quality factor. The experimental results verifies the theoretical...

  20. High Resolution Spectrum Estimation for Digital Tracking Array

    Science.gov (United States)

    2009-12-01

    provide the initial tuning for the local oscillator (LO) and phase lock loop ( PLL ) to synchronize to the desired frequency. Due to the digital nature of... converted to baseband frequency using single channel or in-phase (I) and quad-phase (Q) channel down- converter before it is digitized using an analog- to...digital (ADC) converter . Three distinct frequency estimation methods, namely multiple signal classification (MUSIC), estimation of signal parameters

  1. Integrated electrofluidic circuits: pressure sensing with analog and digital operation functionalities for microfluidics.

    Science.gov (United States)

    Wu, Chueh-Yu; Lu, Jau-Ching; Liu, Man-Chi; Tung, Yi-Chung

    2012-10-21

    Microfluidic technology plays an essential role in various lab on a chip devices due to its desired advantages. An automated microfluidic system integrated with actuators and sensors can further achieve better controllability. A number of microfluidic actuation schemes have been well developed. In contrast, most of the existing sensing methods still heavily rely on optical observations and external transducers, which have drawbacks including: costly instrumentation, professional operation, tedious interfacing, and difficulties of scaling up and further signal processing. This paper reports the concept of electrofluidic circuits - electrical circuits which are constructed using ionic liquid (IL)-filled fluidic channels. The developed electrofluidic circuits can be fabricated using a well-developed multi-layer soft lithography (MSL) process with polydimethylsiloxane (PDMS) microfluidic channels. Electrofluidic circuits allow seamless integration of pressure sensors with analog and digital operation functions into microfluidic systems and provide electrical readouts for further signal processing. In the experiments, the analog operation device is constructed based on electrofluidic Wheatstone bridge circuits with electrical outputs of the addition and subtraction results of the applied pressures. The digital operation (AND, OR, and XOR) devices are constructed using the electrofluidic pressure controlled switches, and output electrical signals of digital operations of the applied pressures. The experimental results demonstrate the designed functions for analog and digital operations of applied pressures are successfully achieved using the developed electrofluidic circuits, making them promising to develop integrated microfluidic systems with capabilities of precise pressure monitoring and further feedback control for advanced lab on a chip applications.

  2. Advances in analog and RF IC design for wireless communication systems

    CERN Document Server

    Manganaro, Gabriele

    2013-01-01

    Advances in Analog and RF IC Design for Wireless Communication Systems gives technical introductions to the latest and most significant topics in the area of circuit design of analog/RF ICs for wireless communication systems, emphasizing wireless infrastructure rather than handsets. The book ranges from very high performance circuits for complex wireless infrastructure systems to selected highly integrated systems for handsets and mobile devices. Coverage includes power amplifiers, low-noise amplifiers, modulators, analog-to-digital converters (ADCs) and digital-to-analog converters

  3. A high accuracy 22 bit sigma-delta converter for digital regulation of superconducting magnet currents

    CERN Document Server

    Pett, John G

    1999-01-01

    The design of the latest CERN particle accelerator for high energy particle physics research, the Large Hadron Collider (LHC), has been underway for some years. The new machine requires stronger magnetic fields which necessitates $9 the use of super-conducting magnets around most of the 27km ring tunnel. The powering of these magnets, with currents up to 13 kA, presents new challenges in precision, which can be summarised as an improvement in setting and $9 regulation of certain currents to the part per million (ppm) level. This represents approximately a factor of ten improvement over present analogue methods. This paper will concentrate on the design and performance of the analogue to $9 digital converter (ADC), which is the key element in the digital regulation loops employed in each magnet power converter. (1 refs).

  4. IS THERE ROOM FOR DURABLE ANALOG INFORMATION STORAGE IN A DIGITAL WORLD

    Energy Technology Data Exchange (ETDEWEB)

    R. A. STUTZ; L. HERETH

    2000-09-20

    Information technology has completely changed our concept of record keeping--the advent of digital records was a momentous discovery, as significant as the invention of the printing press. Digital records allowed huge amounts of information to be stored in a very small space and to be examined quickly. However, digital documents are much more vulnerable to the passage of time than printed documents, because the media on which they are stored are easily affected by physical phenomena, such as magnetic fields, oxidation, material decay, and by various environmental factors that may erase the information. Even more important, digital information becomes obsolete, because even if future generations maybe able to read it, they may not necessarily be able to interpret it. Over the centuries analog documents have been written on solid materials such as stone, clay and metal plates using tools to inscribe the characters. These archival methods have preserved records for centuries, and even millennia, but suffer from low information density. Modem methods facilitate writing pages on smooth material surfaces at high information densities. This writing can generate from about 25 to 100,000 times the area information density of microfilm and work with either analog or digital storage methods. Information of all types is becoming more dependent on digital records. These records are often created and stored on computer systems by scanning in documents or creating them directly on the system. Often analog information (human viewable information) is forced into binary form (ones and zeros). The necessity for the accurate and accessible storage of these documents is increasing for a number of reasons, including legal and environment issues. This paper will discuss information storage life, methods of information storage, media life considerations, and life cycle costs associated with several methods of storage.

  5. Biomass compounds converted to gasoline

    Energy Technology Data Exchange (ETDEWEB)

    1979-10-08

    It is claimed that corn, castor, and jojoba oils as well as Hevea latex can be converted in high yields to gasoline by passage over zeolite catalysts at 450 degrees to 500 degrees centigrade. Gasoline yields are 60% from corn oil (essentially tristearin), compared with 50% yields from methanol. Latex depolymerizes before conversion. Fat and oil molecules adopt conformations that enable them to enter zeolite interstices, resulting in high yields of C6 to C9 aromatics.

  6. Number-to-voltage converter on commutated condensers

    International Nuclear Information System (INIS)

    Grekhov, Yu.N.

    1975-01-01

    A code-voltage converter using precision voltage dividers based on commutated capacitors [1] is described which is distinguished by the absence of precision elements. Each digit includes eight field-effect transistors in two 1KT682 microcircuit assemblies and three microcapacitors with a conventional unstable capacitance 6200 pF +- 50%. The converter has a speed of response that is not inferior to that of converters based on R-2R matrices, while in time stability of the characteristics, low interference level, and low output impedance it is superior to such converters

  7. Eksplorasi Desain Dasar (Nirmana melalui Kombinasi Media Grafis Analog dan Digital: Suatu Penelitian Kelas/Studio

    Directory of Open Access Journals (Sweden)

    Anita Rahardja

    2013-10-01

    Full Text Available This article is based on a research aiming to contextualize the fundamental principles of art and design to current setting in which analog media are no longer chosen as the ultimate hardware/tools. It is important considering digital hardware becomes more and more prevalent even preferred by students, whereas analog tools are getting harder to obtain, expensive and less ecological friendly. The goal of this research is to produce method analysis and the creation of two-dimensional basic design through digital media (Camera followed by conventional drawing tools, documented and conducted by the lecturers and the students. So far, almost 100% of the studies concerning basic design could only be found in foreign publications, with visual work examples that cannot be used freely in Indonesian local education due to copyright issue. Therefore, a literature study is conducted to examine the formal objects of this research which are the elements and fundamental principles in design, followed by ideation and visualization processes carried by the students in basic design classes through the semester. The visualization itself will integrate analog and digital media to generate the material objects of the research, which is a series of two dimensional design compositions. These compositions are then analyzed and classified to taxonomic category of fundamental principles of two-dimensional design as an integral part of teaching-learning process (self-evaluation class for future improvement. 

  8. Randomized trial of digital versus analog pleural drainage in patients with or without a pulmonary air leak after lung resection.

    Science.gov (United States)

    Gilbert, Sebastien; McGuire, Anna L; Maghera, Sonam; Sundaresan, Sudhir R; Seely, Andrew J; Maziak, Donna E; Shamji, Farid M; Villeneuve, P James

    2015-11-01

    An unclear aspect of digital pleural drainage technology is whether it can benefit all lung resection patients or only those who have a postoperative air leak. The aim of this study was to evaluate the impact of digital pleural drainage on time to chest tube removal and length of hospitalization, taking into consideration postoperative air leak status. A single-center, randomized, controlled, open-label, parallel-group trial was conducted. On postoperative day 1, stratification according to air leak status was performed by 2 independent, blinded observers. Patients were randomized to a water-sealed, pleural drainage device (analog) or to a digital device (digital). In both air leak groups (no air leak = 87; air leak = 85), patient factors and operative details were comparable. In the no air leak group, the difference in median chest tube drainage between analog and digital randomization arms was not statistically significant (3 days vs 2.9 days; P = .05). Median length of stay was also comparable in that group (analog = 4.3 days; digital = 4 days; P = .09). In patients with an air leak, similar findings were observed for chest tube duration (analog = 5.6 days; digital = 4.9 days; P = .11) and length of stay (analog = 6.2 days; digital = 6.2 days; P = .36). Chest tube clamping trials were significantly reduced in the digital arm of the air leak absent (0% vs 16%; P = .01) and air leak present groups (23% vs 50%; P = .01). Although digital devices decreased tube clamping trials, the impact on duration of chest tube drainage and hospital stay was not statistically significant, even after stratifying by postoperative air leak status. Copyright © 2015 The American Association for Thoracic Surgery. Published by Elsevier Inc. All rights reserved.

  9. Cheating and Feeling Honest: Committing and Punishing Analog versus Digital Academic Dishonesty Behaviors in Higher Education

    Directory of Open Access Journals (Sweden)

    Adi Friedman

    2016-12-01

    Full Text Available This study examined the phenomenon of academic dishonesty among university students. It was based on Pavela’s (1997 framework of types of academic dishonesty (cheating, plagiarism, fabrication, and facilitation and distinguished between digital and “traditional”- analog dishonesty. The study analyzed cases of academic dishonesty offenses committed by students, as well as the reasons for academic dishonesty behaviors, and the severity of penalties for violations of academic integrity. The motivational framework for committing an act of academic dishonesty (Murdock & Anderman, 2006 and the Self-Concept Maintenance model (Mazar, Amir, & Ariely, 2008 were employed to analyze the reasons for students’ dishonest behaviors. We analyzed 315 protocols of the Disciplinary Committee, at The Open University of Israel, from 2012-2013 that represent all of the offenses examined by the Committee during one and a half years. The findings showed that analog dishonesty was more prevalent than digital dishonesty. According to the students, the most prevalent reason for their academic dishonesty was the need to maintain a positive view of self as an honest person despite violating ethical codes. Interestingly, penalties for analog dishonesty were found to be more severe than those imposed for digital dishonesty. Surprisingly, women were penalized more severely than men, despite no significant gender differences in dishonesty types or in any other parameter explored in the study. Findings of this study shed light on the scope and roots of academic dishonesty and may assist institutions in coping effectively with this phenomenon.

  10. Drawing Analogies to Deepen Learning

    Science.gov (United States)

    Fava, Michelle

    2017-01-01

    This article offers examples of how drawing can facilitate thinking skills that promote analogical reasoning to enable deeper learning. The instructional design applies cognitive principles, briefly described here. The workshops were developed iteratively, through feedback from student and teacher participants. Elements of the UK National…

  11. Digital Carrier Modulation and Sampling Issues of Matrix Converters

    DEFF Research Database (Denmark)

    Loh, Poh Chiang; Rong, Runjie; Blaabjerg, Frede

    2009-01-01

    Although the modulation of ac-ac matrix converters using space vector theory has long been established, their carrierbased modulation principles have only recently attracted some attention. Reasons commonly stated for evaluating the carrier-based alternative include simpler converter control beca...

  12. Naming analog clocks conceptually facilitates naming digital clocks

    NARCIS (Netherlands)

    Meeuwissen, M.H.W.; Roelofs, A.P.A.; Levelt, W.J.M.

    2004-01-01

    Naming digital clocks (e.g., 2:45, say "quarter to three") requires conceptual operations on the minute and hour information displayed in the input for producing the correct relative time expression. The interplay of these conceptual operations was investigated using a repetition priming paradigm.

  13. 47 CFR 76.1630 - MVPD digital television transition notices.

    Science.gov (United States)

    2010-10-01

    ... stations and with cable and satellite TV services, gaming consoles, VCRs, DVD players, and similar products... subsidized coupons for digital-to-analog converter boxes; (3) And explain clearly what effect, if any, the...

  14. Size of the aliphatic chain of sodium houttuyfonate analogs determines their affinity for renin and angiotensin I converting enzyme.

    Science.gov (United States)

    Yuan, Lujiang; Wu, Jianping; Aluko, Rotimi E

    2007-08-01

    Sodium houttuyfonate analogs (SHAs), CH(3)-(CH(2))(n)-CO-CH(2)-CH(OH)SO(3)Na, (n=6-14) were synthesized and their molecular interactions with renin and angiotensin I converting enzyme (ACE) studied using fluorescence quenching techniques. Unlike renin, inhibition of ACE activity was not directly proportional to the aliphatic chain length of SHAs. Ability of SHAs to inhibit enzyme activities and quench protein fluorescence was greater with renin than with ACE. The presence of an ACE substrate (angiotensin I) did not reduce quenching ability of SHAs, suggesting that enzyme-inhibitor interactions did not involve the active site or the substrate was displaced by inhibitor molecules. The results showed that renin is a more sensitive target than ACE for the potential antihypertensive ability of SHAs.

  15. Digital versus analog complete-arch impressions for single-unit premolar implant crowns: Operating time and patient preference.

    Science.gov (United States)

    Schepke, Ulf; Meijer, Henny J A; Kerdijk, Wouter; Cune, Marco S

    2015-09-01

    Digital impression-making techniques are supposedly more patient friendly and less time-consuming than analog techniques, but evidence is lacking to substantiate this assumption. The purpose of this in vivo within-subject comparison study was to examine patient perception and time consumption for 2 complete-arch impression-making methods: a digital and an analog technique. Fifty participants with a single missing premolar were included. Treatment consisted of implant therapy. Three months after implant placement, complete-arch digital (Cerec Omnicam; Sirona) and analog impressions (semi-individual tray, Impregum; 3M ESPE) were made, and the participant's opinion was evaluated with a standard questionnaire addressing several domains (inconvenience, shortness of breath, fear of repeating the impression, and feelings of helplessness during the procedure) with the visual analog scale. All participants were asked which procedure they preferred. Operating time was measured with a stopwatch. The differences between impressions made for maxillary and mandibular implants were also compared. The data were analyzed with paired and independent sample t tests, and effect sizes were calculated. Statistically significant differences were found in favor of the digital procedure regarding all subjective domains (Pdigital procedure to the analog procedure. The mean duration of digital impression making was 6 minutes and 39 seconds (SD=1:51) versus 12 minutes and 13 seconds (SD=1:24) for the analog impression (PDigital impression making for the restoration of a single implant crown takes less time than analog impression making. Furthermore, participants preferred the digital scan and reported less inconvenience, less shortness of breath, less fear of repeating the impression, and fewer feelings of helplessness during the procedure. Copyright © 2015 Editorial Council for the Journal of Prosthetic Dentistry. Published by Elsevier Inc. All rights reserved.

  16. Use of an anthropomorphic hand phantom to verify the radiation intensity that is needed to modify the analog and digital radiographic quality; Uso de um fantoma antropomorfo de mao para verificar a intensidade da radiacao que e necessaria para modificar a qualidade da radiografia analogica e a digital

    Energy Technology Data Exchange (ETDEWEB)

    Bandeira, Caroline K.; Vieira, Michele P.M.M., E-mail: kretezel@hotmail.com, E-mail: michele.vieira@ifpr.edu.br [Instituto Federal do Parana (IFPR), Curitiba, PR (Brazil); Felix, Jose E.R., E-mail: felix@anomati.net [Universidade Federal do Triangulo Mineiro (UFTM), Uberaba, MG (Brazil)

    2014-07-01

    The radiology is a field of medicine that is in constantly expansion and advancing. This can be noticed with the transition from analog to digital radiology systems, it is important that professionals understand image formation in both systems in order to produce radiographies with diagnostic quality. Therefore, the objective of this work is to present the importance of radiological protection by changing values of technical parameters while the quality of radiographic imaging is sustained. An anthropomorphic hand phantom was built in order to obtain radiographies, as it is necessary to respect the Brazilian regulations (Portaria 453/98) which forbids the use of radiation in patients for testing. Three analog and eight digital radiographies were obtained using fixed kVp and varying mAs. Each image was compared to the others acquired in the same location. Digital radiographies have shown that approximately 28% of change in mAs is necessary to change noise, whereas approximately 33,3% is necessary in the analog system to change density. The conclusion is that computerized systems need less x-ray intensity to modify image features and can reduce the patient radiation doses. However, more testing must be conducted in different radiologic environments to confirm the results obtained in the present study. (author)

  17. Project Birdseye Aerial Photograph Collection: Digital and Analog Materials, Version 1

    Data.gov (United States)

    National Aeronautics and Space Administration — This collection consists of both analog and digital aerial photographs from Arctic areas in and around Baffin Bay, the Labrador Sea, the Arctic Ocean, the Beaufort...

  18. Synthesis of Digital Automatic Control System for Non-Transformer Step-Up Converter of Constant Voltage

    Directory of Open Access Journals (Sweden)

    A. V. Мironovich

    2008-01-01

    Full Text Available The paper is devoted to investigation of semi-conductor pulse step-up converter of constant voltage which is operating in the boundary-continuous current mode of a choke with digital control. The algorithms that have been developed make it possible to calculate the given value of coke current and sustain its saw-shape form with the help of digital control device. Values of feed back coefficients have been calculated by object coordinates at discrete character concerning change of control action.The paper contains results of computer converter simulation in MATLAB model. The results prove that digital control with discrete period of 0.001 second can be implemented to step-up converter of constant voltage in the boundary-continuous current mode of a choke.

  19. Conversion of teaching file cases from film to digital format: a comparison between use of a diagnostic-quality digitizer and use of a flatbed scanner with transparency adapter.

    Science.gov (United States)

    Bassignani, Matthew J; Bubash-Faust, Lori; Ciambotti, Jonathan; Moran, Ruth; McIlhenny, Joan

    2003-05-01

    The authors' institution had decided to convert its radiology teaching files from film to digital media. This study was performed to determine the simplest method for converting the analog film images to digital images without a subsequent loss in diagnostic accuracy. Twenty chest radiographs that demonstrated interstitial lung disease were randomly selected from the departmental teaching files and matched with 20 control radiographs from healthy adults. Analog film images were converted with both a diagnostic-quality film image digitizer (digitized) and a flatbed scanner equipped with a transparency adapter (scanned). Three radiology faculty members reviewed a mixed set of corresponding analog film, digitized, and scanned images. Reviewers judged whether each image depicted interstitial lung disease, indicated their level of confidence in the diagnosis, and rated each image for quality. Image quality was assessed by each reviewer subjectively at the time of viewing the individual image, without regard to other images. A one-way analysis of variance was performed to determine whether there was a statistically significant difference in diagnostic accuracy between the three image formats. Agreement in diagnosis between corresponding images in the three different formats was evaluated for each reviewer with the McNemar test. There was no statistically significant difference in diagnostic accuracy between analog film and scanned images, but there was such a difference between these two groups and digitized images. Accuracy was 97% for analog film, 94% for scanned, and 89% for digitized images. Results of the McNemar test showed no statistically significant difference in agreement between the analog film images and the scanned images for any of the reviewers (P > .05). A high-end flatbed scanner with transparency adapter provided accurate, simple, and inexpensive conversion of analog film teaching files to digital format, with no loss of the ability to detect or

  20. Documentary Realism, Sampling Theory and Peircean Semiotics: electronic audiovisual signs (analog or digital as indexes of reality

    Directory of Open Access Journals (Sweden)

    Hélio Godoy

    2007-07-01

    Full Text Available This paper addresses Documentary Realism, focusing on thephysical phenomena of transduction that take place in analog and digital audiovisual systems, herein analyzed in the light of the Sampling Theory, within the framework of Shannon and Weaver’s Information Theory. Transduction is a process by which one type of energy is transformed into another, or by which information is transcodified. Within the scope of Documentary Realism, it cannotbe claimed that electronic audiovisual signs, because of their technical digital features lead to a rupture with reality. Rather, the digital documentary, based on electronic digital cinematography, is still an index of reality.

  1. Graphical Evaluation of Time-Delay Compensation Techniques for Digitally Controlled Converters

    DEFF Research Database (Denmark)

    Lu, Minghui; Wang, Xiongfei; Loh, Poh Chiang

    2018-01-01

    A main design constraint of the digitally controlled power electronics converters is the time delay of control systems, which may lead to the reduced control loop bandwidth and even unstable dynamics. Numerous time-delay compensation methods have been developed, of which the model-free schemes...... are independent to model accuracy whereas the model-based alternatives are sensitive to system modeling. This paper first presents a graphical illustration of four model-free delay compensation techniques, where their principles and performances are intuitively elaborated and compared by means of the impulse area....... Simulations and experimental test results validate the effectiveness of the graphical comparisons and the proposed approach....

  2. Upgrade Analog Readout and Digitizing System for ATLAS TileCal Demonstrator

    CERN Document Server

    Tang, F; The ATLAS collaboration; Akerstedt, H; Biot, A; Bohm, C; Carrio, F; Drake, G; Hildebrand, K; Muschter, S; Oreglia, M; Paramonov, A

    2013-01-01

    A potential upgrade for the front-end electronics and signal digitization and data acquisition system of the ATLAS hadron calorimeter for the high luminosity Large Hadron Collider (HL-LHC) is described. A Demonstrator is being built to readout a slice of the TileCal detector. The on-detector electronics includes up to 48 Analog Front-end Boards for PMT analog signal processing, 4 Main Boards for data digitization and slow controls, 4 Daughter Boards with high speed optical links to interface the on-detector and off-detector electronics. Two super readout driver boards are used for off-detector data acquisition and fulfilling digital trigger. The ATLAS Tile Calorimeter on-detector electronics is housed in the drawers at the back of each of the 256 detector wedges. Each drawer services up to 48 photomultiplier tubes. The new readout system is designed to replace the present system as it will reach component lifetime and radiation tolerance limits making it incompatible with continued use into the HL-LHC era. Wi...

  3. Decimal multiplication using compressor based-BCD to binary converter

    Directory of Open Access Journals (Sweden)

    Sasidhar Mukkamala

    2018-02-01

    Full Text Available The objective of this work is to implement a scalable decimal to binary converter from 8 to 64 bits (i.e 2-digit to 16-digit using parallel architecture. The proposed converters, along with binary coded decimal (BCD adder and binary to BCD converters, are used in parallel implementation of Urdhva Triyakbhyam (UT-based 32-bit BCD multiplier. To increase the performance, compressor circuits were used in converters and multiplier. The designed hardware circuits were verified by behavioural and post layout simulations. The implementation was carried out using Virtex-6 Field Programmable Gate Array (FPGA and Application Specific Integrated Circuit (ASIC with 90-nm technology library platforms. The results on FPGA shows that compressor based converters and multipliers produced less amount of propagation delay with a slight increase of hardware resources. In case of ASIC implementation, a compressor based converter delay is equivalent to conventional converter with a slight increase of gate count. However, the reduction of delay is evident in case of compressor based multiplier.

  4. A portable digital speech-rate converter for hearing impairment.

    Science.gov (United States)

    Nejime, Y; Aritsuka, T; Imamura, T; Ifukube, T; Matsushima, J

    1996-06-01

    A real-time hand-sized portable device that slows speech speed without changing the pitch is proposed for hearing impairment. By using this device, people can listen to fast speech at a comfortable speed. A combination of solid-state memory recording and real-time digital signal processing with a single chip processor enables this unique function. A simplified pitchsynchronous, time-scale-modification algorithm is proposed to minimize the complexity of the DSP operation. Unlike the traditional algorithm, this dynamic-processing algorithm reduces distortion even when the expansion rate is only just above 1. Seven out of 10 elderly hearing-impaired listeners showed improvement in a sentence recognition test when using speech-rate conversion with the largest expansion rate, although no improvement was observed in a word recognition test. Some subjects who showed large improvement had limited auditory temporal resolution, but the correlation was not significant. The results suggest that, unlike conventional hearing aids, this device can be used to overcome the deterioration of auditory ability by improving the transfer of information from short-term (echoic) memory into a more stable memory trace in the human auditory system.

  5. SOI Fully complementary BI-JFET-MOS technology for analog-digital applications with vertical BJT's

    International Nuclear Information System (INIS)

    Delevoye, E.; Blanc, J.P.; Bonaime, J.; Pontcharra, J. de; Gautier, J.; Martin, F.; Truche, R.

    1993-01-01

    A silicon-on-insulator, fully complementary, Bi-JFET-MOS technology has been developed for realizing multi-megarad hardened mixed analog-digital circuits. The six different active components plus resistors and capacitors have been successfully integrated in a 25-mask process using SIMOX substrate and 1 μm thick epitaxial layer. Different constraints such as device compatibility, complexity not higher than BiCMOS technology and breakdown voltages suitable for analog applications have been considered. Several process splits have been realized and all the characteristics presented here have been measured on the same split. P + gate is used for PMOS transistor to get N and PMOST symmetrical characteristics. Both NPN and PNP vertical bipolar transistors with poly-emitters show f T > 5 GHz. 2-separated gate JFET's need no additional mask. (authors). 9 figs., 1 tab

  6. Digitala spelmekaniker : för att skapa en analog brädspels prototyp

    OpenAIRE

    Rudvi, Emil

    2013-01-01

    Analog games misses a lot of quick games in terms of game time and play time in the FPS genre. This genre often takes more time to play in an analog game. Could the game play become quicker by examining the different game mechanics in order to give the players a smoother game play by a reduction of downtime. Game mechanics that could be found in a digital FPS game such as Doom III, were converted to a prototype. These digital gameplay mechanics were converted so that an analog game could be p...

  7. Energy savings opportunities in the global digital television transition

    OpenAIRE

    Park, WY; Gopal, A; Phadke, A

    2017-01-01

    © 2016, The Author(s). Globally, terrestrial television (TV) broadcasting is in the midst of a complete transition to digital signals. The last analog terrestrial broadcast is expected to be switched off in the early 2020s. This transition presents huge energy savings opportunities that have thus far been ignored. Digital TV switchovers have likely increased energy consumption as countries have completed transitions by providing digital TV converters to analog TV users, which increase energy ...

  8. How to deal with substrate bounce in analog circuits in epi-type CMOS technology

    NARCIS (Netherlands)

    Nauta, Bram; Hoogzaad, Gian; Hoogzaad, G.; Donnay, S.; Gielen, G.

    2003-01-01

    Substrate noise is one of the key problems in mixed analog/digital ICs. Although measures are known to reduce substrate noise, the noise will never be completely eliminated since this requires larger chip area or exotic packages and thus higher cost. Analog circuits on digital ICs simply have to be

  9. Digital versus analog complete-arch impressions for single-unit premolar implant crowns : Operating time and patient preference

    NARCIS (Netherlands)

    Schepke, Ulf; Meijer, Henny J. A.; Kerdijk, Wouter; Cune, Marco S.

    Statement of problem. Digital impression-making techniques are supposedly more patient friendly and less time-consuming than analog techniques, but evidence is lacking to substantiate this assumption. Purpose. The purpose of this in vivo within-subject comparison study was to examine patient

  10. Digitization of Bromide Paper Records to Extract One-Minute Geomagnetic Data

    Directory of Open Access Journals (Sweden)

    N Mashiko

    2013-05-01

    Full Text Available Many long-term geomagnetic observation results recorded on photographic bromide paper have not yet been fully digitized. To that end, we developed a method to automatically convert photographic records to one-minute digital data. We applied our method to the observation records of Kakioka Magnetic Observatory and confirmed that the resolution of time and amplitude could be greatly improved by numerical conversion compared with conventional data conversion by hand scaling. Our results suggest that highly precise digitization of analog magnetograms is possible.

  11. Network-Physics(NP) Bec DIGITAL(#)-VULNERABILITY Versus Fault-Tolerant Analog

    Science.gov (United States)

    Alexander, G. K.; Hathaway, M.; Schmidt, H. E.; Siegel, E.

    2011-03-01

    Siegel[AMS Joint Mtg.(2002)-Abs.973-60-124] digits logarithmic-(Newcomb(1881)-Weyl(1914; 1916)-Benford(1938)-"NeWBe"/"OLDbe")-law algebraic-inversion to ONLY BEQS BEC:Quanta/Bosons= digits: Synthesis reveals EMP-like SEVERE VULNERABILITY of ONLY DIGITAL-networks(VS. FAULT-TOLERANT ANALOG INvulnerability) via Barabasi "Network-Physics" relative-``statics''(VS.dynamics-[Willinger-Alderson-Doyle(Not.AMS(5/09)]-]critique); (so called)"Quantum-computing is simple-arithmetic(sans division/ factorization); algorithmic-complexities: INtractibility/ UNdecidability/ INefficiency/NONcomputability / HARDNESS(so MIScalled) "noise"-induced-phase-transitions(NITS) ACCELERATION: Cook-Levin theorem Reducibility is Renormalization-(Semi)-Group fixed-points; number-Randomness DEFINITION via WHAT? Query(VS. Goldreich[Not.AMS(02)] How? mea culpa)can ONLY be MBCS "hot-plasma" versus digit-clumping NON-random BEC; Modular-arithmetic Congruences= Signal X Noise PRODUCTS = clock-model; NON-Shor[Physica A,341,586(04)] BEC logarithmic-law inversion factorization:Watkins number-thy. U stat.-phys.); P=/=NP TRIVIAL Proof: Euclid!!! [(So Miscalled) computational-complexity J-O obviation via geometry.

  12. Evaluating droplet digital PCR for the quantification of human genomic DNA: converting copies per nanoliter to nanograms nuclear DNA per microliter.

    Science.gov (United States)

    Duewer, David L; Kline, Margaret C; Romsos, Erica L; Toman, Blaza

    2018-05-01

    The highly multiplexed polymerase chain reaction (PCR) assays used for forensic human identification perform best when used with an accurately determined quantity of input DNA. To help ensure the reliable performance of these assays, we are developing a certified reference material (CRM) for calibrating human genomic DNA working standards. To enable sharing information over time and place, CRMs must provide accurate and stable values that are metrologically traceable to a common reference. We have shown that droplet digital PCR (ddPCR) limiting dilution end-point measurements of the concentration of DNA copies per volume of sample can be traceably linked to the International System of Units (SI). Unlike values assigned using conventional relationships between ultraviolet absorbance and DNA mass concentration, entity-based ddPCR measurements are expected to be stable over time. However, the forensic community expects DNA quantity to be stated in terms of mass concentration rather than entity concentration. The transformation can be accomplished given SI-traceable values and uncertainties for the number of nucleotide bases per human haploid genome equivalent (HHGE) and the average molar mass of a nucleotide monomer in the DNA polymer. This report presents the considerations required to establish the metrological traceability of ddPCR-based mass concentration estimates of human nuclear DNA. Graphical abstract The roots of metrological traceability for human nuclear DNA mass concentration results. Values for the factors in blue must be established experimentally. Values for the factors in red have been established from authoritative source materials. HHGE stands for "haploid human genome equivalent"; there are two HHGE per diploid human genome.

  13. Codebook Design and Hybrid Digital/Analog Coding for Parallel Rayleigh Fading Channels

    OpenAIRE

    Shi, Shuying; Larsson, Erik G.; Skoglund, Mikael

    2011-01-01

    Low-delay source-channel transmission over parallel fading channels is studied. In this scenario separate sourceand channel coding is highly suboptimal. A scheme based on hybrid digital/analog joint source-channel coding istherefore proposed, employing scalar quantization and polynomial-based analog bandwidth expansion. Simulationsdemonstrate substantial performance gains. Funding agencies|European Community|248993|EL-LIIT||Knut and Alice Wallenberg Foundation||

  14. High-speed charge-to-time converter ASIC for the Super-Kamiokande detector

    International Nuclear Information System (INIS)

    Nishino, H.; Awai, K.; Hayato, Y.; Nakayama, S.; Okumura, K.; Shiozawa, M.; Takeda, A.; Ishikawa, K.; Minegishi, A.; Arai, Y.

    2009-01-01

    A new application-specific integrated circuit (ASIC), the high-speed charge-to-time converter (QTC) IWATSU CLC101, provides three channels, each consisting of preamplifier, discriminator, low-pass filter, and charge integration circuitry, optimized for the waveform of a photomultiplier tube (PMT). This ASIC detects PMT signals using individual built-in discriminators and drives output timing signals whose width represents the integrated charge of the PMT signal. Combined with external input circuits composed of passive elements, the QTC provides full analog signal processing for the detector's PMTs, ready for further processing by time-to-digital converters (TDCs). High-rate (>1MHz) signal processing is achieved by short-charge-conversion-time and baseline-restoration circuits. Wide-range charge measurements are enabled by offering three gain ranges while maintaining a short cycle time. QTC chip test results show good analog performance, with efficient detection for a single photoelectron signal, four orders of magnitude dynamic range (0.3mV∼3V; 0.2∼2500pC), 1% charge linearity, 0.2 pC charge resolution, and 0.1 ns timing resolution. Test results on ambient temperature dependence, channel isolation, and rate dependence also meet specifications.

  15. A Design Methodology for Power-efficient Continuous-time Sigma-Delta A/D Converters

    DEFF Research Database (Denmark)

    Nielsen, Jannik Hammel; Bruun, Erik

    2003-01-01

    In this paper we present a design methodology for optimizing the power consumption of continuous-time (CT) ΣΔ A/D converters. A method for performance prediction for ΣΔ A/D converters is presented. Estimation of analog and digital power consumption is derived and employed to predict the most power...

  16. An emergent approach to analogical inference

    Science.gov (United States)

    Thibodeau, Paul H.; Flusberg, Stephen J.; Glick, Jeremy J.; Sternberg, Daniel A.

    2013-03-01

    In recent years, a growing number of researchers have proposed that analogy is a core component of human cognition. According to the dominant theoretical viewpoint, analogical reasoning requires a specific suite of cognitive machinery, including explicitly coded symbolic representations and a mapping or binding mechanism that operates over these representations. Here we offer an alternative approach: we find that analogical inference can emerge naturally and spontaneously from a relatively simple, error-driven learning mechanism without the need to posit any additional analogy-specific machinery. The results also parallel findings from the developmental literature on analogy, demonstrating a shift from an initial reliance on surface feature similarity to the use of relational similarity later in training. Variants of the model allow us to consider and rule out alternative accounts of its performance. We conclude by discussing how these findings can potentially refine our understanding of the processes that are required to perform analogical inference.

  17. Analog Readout and Digitizing System for ATLAS TileCal Demonstrator

    CERN Document Server

    Tang, F; The ATLAS collaboration

    2014-01-01

    The TileCal Demonstrator is a prototype for a future upgrade to the ATLAS hadron calorimeter when the Large Hadron Collider increases luminosity in year 2023 (HL-LHC). It will be used for functionality and performance tests. The Demonstrator has 48 channels of upgraded readout and digitizing electronics and a new digital trigger capability, but is backwards-compatible with the present detector system insofar as it also provides analog trigger signals. The Demonstrator is comprised of 4 identical mechanical mini-drawers, each equipped with up to 12 photomultipliers (PMTs). The on-detector electronics includes 45 Front-End Boards, each serving an individual PMT; 4 Main Boards, each to control and digitize up to 12 PMT signals, and 4 corresponding high-speed Daughter Boards serving as data hubs between on-detector and off-detector electronics. The Demonstrator is fully compatible with the present system, accepting ATLAS triggers, timing and slow control commands for the data acquisition, detector control, and de...

  18. Upgrade Analog Readout and Digitizing System for ATLAS TileCal Demonstrator

    CERN Document Server

    Tang, F; Anderson, K; Bohm, C; Hildebrand, K; Muschter, S; Oreglia, M

    2015-01-01

    The TileCal Demonstrator is a prototype for a future upgrade to the ATLAS hadron calorimeter when the Large Hadron Collider increases luminosity in year 2023 (HL-LHC). It will be used for functionality and performance tests. The Demonstrator has 48 channels of upgraded readout and digitizing electronics and a new digital trigger capability, but is backwards-compatible with the present detector system insofar as it also provides analog trigger signals. The Demonstrator is comprised of 4 identical mechanical mini-drawers, each equipped with up to 12 photomultipliers (PMTs). The on-detector electronics includes 45 Front-End Boards, each serving an individual PMT; 4 Main Boards, each to control and digitize up to 12 PMT signals, and 4 corresponding high-speed Daughter Boards serving as data hubs between on-detector and off-detector electronics. The Demonstrator is fully compatible with the present system, accepting ATLAS triggers, timing and slow control commands for the data acquisition, detector control, and de...

  19. Digital modulation schemes for high speed transmission through low bandwidth lowpass analog links

    Science.gov (United States)

    Andrawis, Alfred S.; Flippin, Quentin J.

    1995-01-01

    Existing NTSC (National Television System Committee) standard will be phased out and replaced with HDTV (High Definition Television) standard within the next 10 years. Accordingly, the existing video network system operated by NASA will become obsolete and requires either replacement or modification to accommodate digital transmission. Network replacement is extremely expensive, hence, several digital modulation schemes are investigated in this report to accomplish digital transmission over existing analog links saving NASA from the cost of network replacement. There are two competing transmission systems available for HDTV transmission over limited bandwidth channels. The cost and performance of the two competing schemes are remarkably similar. However, the input data rate in such a case is limited to 40 Mbit/s. Transmission of higher data rates is possible using simple signal processing techniques. On the other hand, a third transmission system, multilevel pulse amplitude modulation (M-PAM) is proposed. M-PAM is the first stage of the well known M-VSB. This M-PAM scheme is much simpler and uses the channel more efficiently. The three schemes are compared and preliminary conclusions were made. Despite of several similarities, each modulation scheme has it unique merits. To determine the suitability of each scheme, more investigations and laboratory tests for all schemes are needed.

  20. Digital coherent receiver employing photonic downconversion for phase modulated radio-over-fibre links

    DEFF Research Database (Denmark)

    Zibar, Darko; Caballero Jambrina, Antonio; Guerrero Gonzalez, Neil

    2009-01-01

    A digital coherent receiver employing photonic downconversion is presented and experimentally demonstrated for phase-modulated radio-over-fibre optical links. The receiver is capable of operating at frequencies exceeding the bandwidth of electrical analog-to-digital converter by using photonic...... downconversion to translate the high-frequency input RF signal to the operating frequency range of the analog-to-digital converter. First, using linear digital demodulation scheme we measure SFDR of the link at microwave frequency of 5 GHz. Thereafter, successful signal demodulation of 50 Mbit/s binary phase...... shift keying (BPSK) modulated data signal at 5 GHz RF carrier frequency is experimentally demonstrated by using an analog-to-digital converter with only 1 GHz bandwidth. We successfully demonstrate signal demodulation, using the proposed digital coherent receiver with photonic downconversion, after 40...

  1. Optical Injection Locking of Vertical Cavity Surface-Emitting Lasers: Digital and Analog Applications

    Science.gov (United States)

    Parekh, Devang

    With the rise of mobile (cellphones, tablets, notebooks, etc.) and broadband wireline communications (Fiber to the Home), there are increasing demands being placed on transmitters for moving data from device to device and around the world. Digital and analog fiber-optic communications have been the key technology to meet this challenge, ushering in ubiquitous Internet and cable TV over the past 20 years. At the physical layer, high-volume low-cost manufacturing of semiconductor optoelectronic devices has played an integral role in allowing for deployment of high-speed communication links. In particular, vertical cavity surface emitting lasers (VCSEL) have revolutionized short reach communications and are poised to enter more markets due to their low cost, small size, and performance. However, VCSELs have disadvantages such as limited modulation performance and large frequency chirp which limits fiber transmission speed and distance, key parameters for many fiber-optic communication systems. Optical injection locking is one method to overcome these limitations without re-engineering the VCSEL at the device level. By locking the frequency and phase of the VCSEL by the direct injection of light from another laser oscillator, improved device performance is achieved in a post-fabrication method. In this dissertation, optical injection locking of VCSELs is investigated from an applications perspective. Optical injection locking of VCSELs can be used as a pathway to reduce complexity, cost, and size of both digital and analog fiber-optic communications. On the digital front, reduction of frequency chirp via bit pattern inversion for large-signal modulation is experimentally demonstrated showing up to 10 times reduction in frequency chirp and over 90 times increase in fiber transmission distance. Based on these results, a new reflection-based interferometric model for optical injection locking was established to explain this phenomenon. On the analog side, the resonance

  2. Cheating and Feeling Honest: Committing and Punishing Analog versus Digital Academic Dishonesty Behaviors in Higher Education

    Science.gov (United States)

    Friedman, Adi; Blau,Ina; Eshet-Alkalai, Yoram

    2016-01-01

    This study examined the phenomenon of academic dishonesty among university students. It was based on Pavela's (1997) framework of types of academic dishonesty (cheating, plagiarism, fabrication, and facilitation) and distinguished between digital and "traditional"- analog dishonesty. The study analyzed cases of academic dishonesty…

  3. Mixed Analog/Digital Matrix-Vector Multiplier for Neural Network Synapses

    DEFF Research Database (Denmark)

    Lehmann, Torsten; Bruun, Erik; Dietrich, Casper

    1996-01-01

    In this work we present a hardware efficient matrix-vector multiplier architecture for artificial neural networks with digitally stored synapse strengths. We present a novel technique for manipulating bipolar inputs based on an analog two's complements method and an accurate current rectifier...

  4. A time-to-amplitude converter with constant fraction timing discriminators for short time interval measurements

    International Nuclear Information System (INIS)

    Kostamovaara, J.; Myllylae, R.

    1985-01-01

    The construction and the performance of a time-to-amplitude converter equipped with constant fraction discriminators is described. The TAC consists of digital and analog parts which are constructed on two printed circuit boards, both of which are located in a single width NIM module. The dead time of the TAC for a start pulse which is not followed by a stop pulse within the time range of the device (proportional100 ns) is only proportional100 ns, which enables one to avoid counting rate saturation even with a high random input signal rate. The differential and integral nonlinearities of the TAC are better than +-1.5% and 0.05%, respectively. The resolution for input timing pulses of constant shape is 20 ps (fwhm), and less than 10 ps (fwhm) with a modification in the digital part. The walk error of the constant fraction timing discriminators is presented and various parameters affecting it are discussed. The effect of the various disturbances in linearity caused by the fast ECL logic and their minimization are also discussed. The time-to-amplitude converter has been used in positron lifetime studies and for laser range finding. (orig.)

  5. Opportunistic beam training with hybrid analog/digital codebooks for mmWave systems

    KAUST Repository

    Eltayeb, Mohammed E.

    2016-02-25

    © 2015 IEEE. Millimeter wave (mmWave) communication is one solution to provide more spectrum than available at lower carrier frequencies. To provide sufficient link budget, mmWave systems will use beamforming with large antenna arrays at both the transmitter and receiver. Training these large arrays using conventional approaches taken at lower carrier frequencies, however, results in high overhead. In this paper, we propose a beam training algorithm that efficiently designs the beamforming vectors with low training overhead. Exploiting mmWave channel reciprocity, the proposed algorithm relaxes the need for an explicit feedback channel, and opportunistically terminates the training process when a desired quality of service is achieved. To construct the training beamforming vectors, a new multi-resolution codebook is developed for hybrid analog/digital architectures. Simulation results show that the proposed algorithm achieves a comparable rate to that obtained by exhaustive search solutions while requiring lower training overhead when compared to prior work.

  6. Optimum phase shift in the self-oscillating loop for piezoelectric transformer-based power converters

    DEFF Research Database (Denmark)

    Ekhtiari, Marzieh; Zsurzsan, Tiberiu-Gabriel; Andersen, Michael A. E.

    2017-01-01

    A new method is implemented in designing of self-oscillating loop for driving piezoelectric transformers. The implemented method is based on combining both analog and digital control systems. Digitally controlled time delay through the self-oscillating loop results in very precise frequency control...... and ensures optimum operation of the piezoelectric transformer in terms of gain and efficiency. Time delay is implemented digitally for the first time through a 16 bit digital-to-analog converter in the self-oscillating loop. The new design of the delay circuit provides 45 ps time resolution, enabling fine...

  7. Digitally Controlled Converter with Dynamic Change of Control Law and Power Throughput

    DEFF Research Database (Denmark)

    Nesgaard, Carsten; Andersen, Michael Andreas E.; Nielsen, Nils

    2003-01-01

    the substitution of analog controllers with their digital counterparts are considered. The outline of the paper is divided into two segments – the first being an experimental analysis of the timing behavior by means of code optimization – the second being an examination of the dynamics of incorporating two control......With the continuous development of faster and cheaper microprocessors the field of applications for digital control is constantly expanding. Based on this trend the paper at hand describes the analysis and implementation of multiple control laws within the same controller. Also, implemented within...

  8. "Forback" Dc-To-Dc Converters

    Science.gov (United States)

    Lukemire, Alan T.

    1992-01-01

    Dc-to-dc power-converter circuits called "forback" resemble circuits of standard configurations called "forward", "flyback", and "Cuk". Circuit employs minor modifications to existing topologies, combines advantages, while eliminating disadvantages, of older circuits.

  9. Computational approaches to analogical reasoning current trends

    CERN Document Server

    Richard, Gilles

    2014-01-01

    Analogical reasoning is known as a powerful mode for drawing plausible conclusions and solving problems. It has been the topic of a huge number of works by philosophers, anthropologists, linguists, psychologists, and computer scientists. As such, it has been early studied in artificial intelligence, with a particular renewal of interest in the last decade. The present volume provides a structured view of current research trends on computational approaches to analogical reasoning. It starts with an overview of the field, with an extensive bibliography. The 14 collected contributions cover a large scope of issues. First, the use of analogical proportions and analogies is explained and discussed in various natural language processing problems, as well as in automated deduction. Then, different formal frameworks for handling analogies are presented, dealing with case-based reasoning, heuristic-driven theory projection, commonsense reasoning about incomplete rule bases, logical proportions induced by similarity an...

  10. 47 CFR 25.212 - Narrowband analog transmissions, digital transmissions, and video transmissions in the GSO Fixed...

    Science.gov (United States)

    2010-10-01

    ... be routinely licensed for transmission of SCPC services if the maximum power densities into the antenna do not exceed +0.5 dBW/4 kHz for analog SCPC carriers with bandwidths up to 200 kHz, and do not exceed −2.7 dBW/4 kHz for narrow and/or wideband digital SCPC carriers. (2) For earth stations licensed...

  11. 10 ps resolution, 160 ns full scale range and less than 1.5% differential non-linearity time-to-digital converter module for high performance timing measurements

    Energy Technology Data Exchange (ETDEWEB)

    Markovic, B.; Tamborini, D.; Villa, F.; Tisa, S.; Tosi, A.; Zappa, F. [Politecnico di Milano, Dipartimento di Elettronica e Informazione, Piazza Leonardo da Vinci 32, 20133 Milano (Italy)

    2012-07-15

    We present a compact high performance time-to-digital converter (TDC) module that provides 10 ps timing resolution, 160 ns dynamic range and a differential non-linearity better than 1.5% LSB{sub rms}. The TDC can be operated either as a general-purpose time-interval measurement device, when receiving external START and STOP pulses, or in photon-timing mode, when employing the on-chip SPAD (single photon avalanche diode) detector for detecting photons and time-tagging them. The instrument precision is 15 ps{sub rms} (i.e., 36 ps{sub FWHM}) and in photon timing mode it is still better than 70 ps{sub FWHM}. The USB link to the remote PC allows the easy setting of measurement parameters, the fast download of acquired data, and their visualization and storing via an user-friendly software interface. The module proves to be the best candidate for a wide variety of applications such as: fluorescence lifetime imaging, time-of-flight ranging measurements, time-resolved positron emission tomography, single-molecule spectroscopy, fluorescence correlation spectroscopy, diffuse optical tomography, optical time-domain reflectometry, quantum optics, etc.

  12. The Solar Probe Plus Radio Frequency Spectrometer: Measurement requirements, analog design, and digital signal processing

    Science.gov (United States)

    Pulupa, M.; Bale, S. D.; Bonnell, J. W.; Bowen, T. A.; Carruth, N.; Goetz, K.; Gordon, D.; Harvey, P. R.; Maksimovic, M.; Martínez-Oliveros, J. C.; Moncuquet, M.; Saint-Hilaire, P.; Seitz, D.; Sundkvist, D.

    2017-03-01

    The Radio Frequency Spectrometer (RFS) is a two-channel digital receiver and spectrometer, which will make remote sensing observations of radio waves and in situ measurements of electrostatic and electromagnetic fluctuations in the solar wind. A part of the FIELDS suite for Solar Probe Plus (SPP), the RFS is optimized for measurements in the inner heliosphere, where solar radio bursts are more intense and the plasma frequency is higher compared to previous measurements at distances of 1 AU or greater. The inputs to the RFS receiver are the four electric antennas mounted near the front of the SPP spacecraft and a single axis of the SPP search coil magnetometer (SCM). Each RFS channel selects a monopole or dipole antenna input, or the SCM input, via multiplexers. The primary data products from the RFS are autospectra and cross spectra from the selected inputs. The spectra are calculated using a polyphase filter bank, which enables the measurement of low amplitude signals of interest in the presence of high-amplitude narrowband noise generated by spacecraft systems. We discuss the science signals of interest driving the RFS measurement objectives, describe the RFS analog design and digital signal processing, and show examples of current performance.

  13. Visualizing along-strike change in deformation style using analog modeling and digital visualization software

    Science.gov (United States)

    Burberry, C. M.

    2012-12-01

    It is a well-known phenomenon that deformation style varies in space; both along the strike of a deformed belt and along the strike of individual structures within that belt. This variation in deformation style is traditionally visualized with a series of closely spaced 2D cross-sections. However, the use of 2D section lines implies plane strain along those lines, and the true 3D nature of the deformation is not necessarily captured. By using a combination of remotely sensed data, analog modeling of field datasets and this remote data, and numerical and digital visualization of the finished model, a 3D understanding and restoration of the deformation style within the region can be achieved. The workflow used for this study begins by considering the variation in deformation style which can be observed from satellite images and combining this data with traditional field data, in order to understand the deformation in the region under consideration. The conceptual model developed at this stage is then modeled using a sand and silicone modeling system, where the kinematics and dynamics of the deformation processes can be examined. A series of closely-spaced cross-sections, as well as 3D images of the deformation, are created from the analog model, and input into a digital visualization and modeling system for restoration. In this fashion, a valid 3D model is created where the internal structure of the deformed system can be visualized and mined for information. The region used in the study is the Sawtooth Range, Montana. The region forms part of the Montana Disturbed Belt in the Front Ranges of the Rocky Mountains, along strike from the Alberta Syncline in the Canadian Rocky Mountains. Interpretation of satellite data indicates that the deformation front structures include both folds and thrust structures. The thrust structures vary from hinterland-verging triangle zones to foreland-verging imbricate thrusts along strike, and the folds also vary in geometry along

  14. Method for Converter Synchronization with RF Injection

    OpenAIRE

    Joshua P. Bruckmeyer; Ivica Kostanic

    2015-01-01

    This paper presents an injection method for synchronizing analog to digital converters (ADC). This approach can eliminate the need for precision routed discrete synchronization signals of current technologies, such as JESD204. By eliminating the setup and hold time requirements at the conversion (or near conversion) clock rate, higher sample rate systems can be synchronized. Measured data from an existing multiple ADC conversion system was used to evaluate the method. Coherent beams were simu...

  15. Digital circuits for computer applications: A compilation

    Science.gov (United States)

    1972-01-01

    The innovations in this updated series of compilations dealing with electronic technology represent a carefully selected collection of digital circuits which have direct application in computer oriented systems. In general, the circuits have been selected as representative items of each section and have been included on their merits of having universal applications in digital computers and digital data processing systems. As such, they should have wide appeal to the professional engineer and scientist who encounter the fundamentals of digital techniques in their daily activities. The circuits are grouped as digital logic circuits, analog to digital converters, and counters and shift registers.

  16. Stop preaching to the converted

    Science.gov (United States)

    Landrum, Asheley R.; Lull, Robert B.

    2017-08-01

    Traditional moral arguments fail to persuade conservative climate sceptics. Pope Francis' gifting of his climate encyclical to President Trump prior to his leaving the Paris Agreement shows that even a religious leader's persuasive power is constrained by how his message resonates with conservative moral values.

  17. Ping-Pong Beam Training with Hybrid Digital-Analog Antenna Arrays

    DEFF Research Database (Denmark)

    Manchón, Carles Navarro; Carvalho, Elisabeth De; Andersen, Jørgen Bach

    2017-01-01

    In this article we propose an iterative training scheme that approximates optimal beamforming between two transceivers equipped with hybrid digital-analog antenna arrays. Inspired by methods proposed for digital arrays that exploit algebraic power iterations, the proposed training procedure...... updated by a simple "beam split and drop" strategy that tracks the directions from which signals with largest magnitude are being received. The resulting scheme has minimal computational complexity and converges with only a handful of iterations. As shown in the numerical assessment, the method...

  18. The charge pump PLL clock generator designed for the 1.56 ns bin size time-to-digital converter pixel array of the Timepix3 readout ASIC

    CERN Document Server

    Fu, Y et al.

    2014-01-01

    Timepix3 is a newly developed pixel readout chip which is expected to be operated in a wide range of gaseous and silicon detectors. It is made of 256×256 pixels organized in a square pixel-array with 55 µm pitch. Oscillators running at 640 MHz are distributed across the pixel-array and allow for a highly accurate measurement of the arrival time of a hit. This paper concentrates on a low-jitter phase locked loop (PLL) that is located in the chip periphery. This PLL provides a control voltage which regulates the actual frequency of the individual oscillators, allowing for compensation of process, voltage, and temperature variations.

  19. Cheating and Feeling Honest: Committing and Punishing Analog versus Digital Academic Dishonesty Behaviors in Higher Education

    OpenAIRE

    Adi Friedman; Ina Blau; Yoram Eshet-Alkalai

    2016-01-01

    This study examined the phenomenon of academic dishonesty among university students. It was based on Pavela’s (1997) framework of types of academic dishonesty (cheating, plagiarism, fabrication, and facilitation) and distinguished between digital and “traditional”- analog dishonesty. The study analyzed cases of academic dishonesty offenses committed by students, as well as the reasons for academic dishonesty behaviors, and the severity of penalties for violations of academic integrity. The mo...

  20. Quantum secure direct communication of digital and analog signals using continuum coherent states

    Science.gov (United States)

    Guerra, Antônio Geovan de Araújo Holanda; Rios, Francisco Franklin Sousa; Ramos, Rubens Viana

    2016-11-01

    In this work, we present optical schemes for secure direct quantum communication of digital and analog signals using continuum coherent states and frequency-dependent phase modulation. The main advantages of the proposed schemes are that they do not use entangled states and they can be implemented with today technology. The theory of quantum interference of continuum coherent state is described, and the optical setups for secure direct communication are presented and their securities are discussed.

  1. Modeling and analysis of anti-scatter grids for analogical and digital systems using MCNPX

    International Nuclear Information System (INIS)

    Correa, Samanda C.A.; Souza, Edmilson M.; Silva, Ademir X.; Lopes, Ricardo T.

    2007-01-01

    Monte Carlo code MCNPX was used for modeling of the antiscatter grids. The performance analysis of grid was investigated for analogical and digital systems by calculation of contrast improvement factor (CIF), bucky factor (BF) and signal improvement factor (SIF). The accuracy of simulation of the grids was validated through comparison with measured results demonstrating good agreement, thus increasing the reliability of the results presented in this paper. (author)

  2. Greenland Snow Pit and Core Stratigraphy (Analog and Digital Formats)

    Data.gov (United States)

    National Oceanic and Atmospheric Administration, Department of Commerce — This data set is comprised of scientific field study notebooks from geologist Carl S. Benson describing his traverses of Greenland from 1952 to 1955. The notebooks...

  3. Errant Bodies: Relational Aesthetics, Digital Communication, and the Autistic Analogy

    Directory of Open Access Journals (Sweden)

    Anne Pasek

    2015-11-01

    Full Text Available This paper addresses growing anxieties over the past two decades within media studies and visual art concerning the negative effects of technological sociality. Noting the recurrent use of the language of cognitive impairments—particularly that of autism—in appraisals of mediated relational deficits, this paper investigates the parallel production of ability and disability within privileged models of relationality and its aesthetics. Rather than attempting to police or restore valorized forms and practices of interpersonal exchange, I call for a more inclusive approach to relationality predicated upon a disability studies approach. Looking specifically to the Second Life performance works of Eva and Franco Mattes, I argue that technologically-produced social impairments can be productively approached as sites of alternative and adaptive relationalities.

  4. Topical Meeting of Broadband Analog and Digital Optoelectronics

    Science.gov (United States)

    1992-01-01

    coeffient is 13 pm/ 0 C. REFERENCES 1. K. L. Belsley, J. B. Carroll , L. A. Hess, D. R. Huber, and D. Schmadel, "Optically Multiplexed Interferometric...Dimension", BYTE, Nov. 1988. 2. T. M. Pinkston and U. Efron, "Optical Interconnects in the 3-D Computer for Fast Parallel Sorting", To Be Published in

  5. An Implantable Mixed Analog/Digital Neural Stimulator Circuit

    DEFF Research Database (Denmark)

    Gudnason, Gunnar; Bruun, Erik; Haugland, Morten

    1999-01-01

    This paper describes a chip for a multichannel neural stimulator for functional electrical stimulation. The chip performs all the signal processing required in an implanted neural stimulator. The power and signal transmission to the stimulator is carried out via an inductive link. From the signal...

  6. A linear temperature-to-frequency converter

    DEFF Research Database (Denmark)

    Løvborg, Leif

    1965-01-01

    , and that the maximum value of the temperature-frequency coefficient beta in this point is-1/3 alpha, where a is the temperature coefficient of the thermistor at the corresponding temperature. Curves showing the range in which the converter is expected to be linear to within plusmn0.1 degC are given. A laboratory......-built converter having beta = 1.0% degC-1 at 25degC is found to be linear to within plusmn0. 1 degC from 10 to 40degC....

  7. The ALTRO Chip A 16-channel A/D Converter and Digital Processor for Gas Detectors

    CERN Document Server

    Esteve-Bosch, R; Mota, B; Musa, L

    2003-01-01

    The ALTRO (ALICE TPC Read Out) chip is a mixed-signal integrated circuit designed to be one of the building blocks of the readout electronics for gas detectors. Originally conceived and optimised for the Time Projection Chamber (TPC) of the ALICE experiment at the CERN LHC, its architecture and programmability makes it suitable for the readout of a wider class of gas detectors. In one single chip, the analogue signals from 16 channels are digitised, processed, compressed and stored in a multi-acquisition memory. The Analogue-to- Digital converters embedded in the chip have a 10-bit dynamic range and a maximum sampling rate in the range of 20 to 40MHz. After digitisation, a pipelined hardwired Processor is able to remove from the input signal a wide range of systematic and non-systematic perturbations, related to the non-ideal behaviour of the detector, temperature variation of the electronics, environmental noise, etc. Moreover, the Processor is able to suppress the signal tail within 1mus after the pulse pea...

  8. Device for logarithmic representation of binary numbers in analog form

    International Nuclear Information System (INIS)

    Georgiev, A.; Zhuravlev, N.I.; Zinov, V.G.; Salamatin, A.V.

    1986-01-01

    A logarithmic converter is described in which the mantissa of the logarithm is obtained from the values of several more-significant bits of a binary number with the aid of a table stored in read-only memory. The obtained codes are then put into analog form by a digital-analog converter. The error for 16-bit numbers is 0.17%

  9. Conception and realization of a multichannel amplitude converter

    International Nuclear Information System (INIS)

    Bendebiche, L.

    1992-11-01

    A compact Analog to Digital Converter system suitable for high resolution γ-ray analysers has been developed based on the ADADC84 12-bit converter from Analog Devices. The converter was equipped with a peak detector and a stretcher, and with a memory card providing the sliding scale circuits, the lower threshold, the channel number identification and the zero suppression. The conversion time is 10 μs and the differential non linearity is less than ±1% for a 12-bit resolution. The converter consists of a 12-bit spectroscopy analog-to-digital converter (ADC) while the memory card includes a 8K 24-bit buffer memory. The two cards are plugged into a slot of an IBM PC AT and using an emulation software converts the micro-computer into a full-featured pulse height analyser. In data acquisition mode, the cards can operate independently, making the computer free for other tasks. The software offers acquisition control, visualization, data handling functions and various types of result presentation

  10. Converting skeletal structures to quad dominant meshes

    DEFF Research Database (Denmark)

    Bærentzen, Jakob Andreas; Misztal, Marek Krzysztof; Welnicka, Katarzyna

    2012-01-01

    We propose the Skeleton to Quad-dominant polygonal Mesh algorithm (SQM), which converts skeletal structures to meshes composed entirely of polar and annular regions. Both types of regions have a regular structure where all faces are quads except for a single ring of triangles at the center of eac...

  11. Digitally-assisted analog and RF CMOS circuit design for software-defined radio

    CERN Document Server

    Okada, Kenichi

    2011-01-01

    This book describes the state-of-the-art in RF, analog, and mixed-signal circuit design for Software Defined Radio (SDR). It synthesizes for analog/RF circuit designers the most important general design approaches to take advantage of the most recent CMOS technology, which can integrate millions of transistors, as well as several real examples from the most recent research results.

  12. Exploration of strategies for implementation of screen-printed mercuric iodide converters in direct detection AMFPIs for digital breast tomosynthesis

    Science.gov (United States)

    Antonuk, Larry E.; El-Mohri, Youcef; Zhao, Qihua; Jiang, Hao

    2017-03-01

    Digital breast tomosynthesis (DBT) has become an increasingly important tool in the diagnosis of breast disease. For those DBT imaging systems based on active matrix, flat-panel imager (AMFPI) arrays, the incident radiation is detected directly or indirectly by means of an a-Se or CsI:Tl x-ray converter, respectively. While all AMFPI DBT devices provide clinically useful volumetric information, their performance is limited by the relatively modest average signal generated per interacting X ray by present converters compared to the electronic additive noise of the system. To address this constraint, we are pursuing the development of a screen-printed form of mercuric iodide (SP HgI2) which has demonstrated considerably higher sensitivities (i.e., larger average signal per interacting X ray) than those of conventional a-Se and CsI:Tl converters, as well as impressive DQE and MTF performance under mammographic irradiation conditions. A converter offering such enhanced sensitivity would greatly improve signal-to-noise performance and facilitate quantum-limited imaging down to significantly lower exposures than present AMFPI DBT systems. However, before this novel converter material can be implemented practically, challenges associated with SP HgI2 must be addressed. Most significantly, high levels of charge trapping (which lead to image lag as well as fall-off in DQE at higher exposures) need to be reduced - while improving the uniformity in pixel-to-pixel signal response as well as maintaining low dark current and otherwise favorable DQE performance. In this paper, a pair of novel strategies for overcoming the challenge of charge trapping in SP HgI2 converters are described, and initial results from empirical and calculational studies of these strategies are reported.

  13. Obstacle Avoidance and Target Acquisition for Robot Navigation Using a Mixed Signal Analog/Digital Neuromorphic Processing System

    Directory of Open Access Journals (Sweden)

    Moritz B. Milde

    2017-07-01

    Full Text Available Neuromorphic hardware emulates dynamics of biological neural networks in electronic circuits offering an alternative to the von Neumann computing architecture that is low-power, inherently parallel, and event-driven. This hardware allows to implement neural-network based robotic controllers in an energy-efficient way with low latency, but requires solving the problem of device variability, characteristic for analog electronic circuits. In this work, we interfaced a mixed-signal analog-digital neuromorphic processor ROLLS to a neuromorphic dynamic vision sensor (DVS mounted on a robotic vehicle and developed an autonomous neuromorphic agent that is able to perform neurally inspired obstacle-avoidance and target acquisition. We developed a neural network architecture that can cope with device variability and verified its robustness in different environmental situations, e.g., moving obstacles, moving target, clutter, and poor light conditions. We demonstrate how this network, combined with the properties of the DVS, allows the robot to avoid obstacles using a simple biologically-inspired dynamics. We also show how a Dynamic Neural Field for target acquisition can be implemented in spiking neuromorphic hardware. This work demonstrates an implementation of working obstacle avoidance and target acquisition using mixed signal analog/digital neuromorphic hardware.

  14. Neural recording front-end IC using action potential detection and analog buffer with digital delay for data compression.

    Science.gov (United States)

    Liu, Lei; Yao, Lei; Zou, Xiaodan; Goh, Wang Ling; Je, Minkyu

    2013-01-01

    This paper presents a neural recording analog front-end IC intended for simultaneous neural recording with action potential (AP) detection for data compression in wireless multichannel neural implants. The proposed neural recording front-end IC detects the neural spikes and sends only the preserved AP information for wireless transmission in order to reduce the overall power consumption of the neural implant. The IC consists of a low-noise neural amplifier, an AP detection circuit and an analog buffer with digital delay. The neural amplifier makes use of a current-reuse technique to maximize the transconductance efficiency for attaining a good noise efficiency factor. The AP detection circuit uses an adaptive threshold voltage to generate an enable signal for the subsequent functional blocks. The analog buffer with digital delay is employed using a finite impulse response (FIR) filter which preserves the AP waveform before the enable signal as well as provides low-pass filtering. The neural recording front-end IC has been designed using standard CMOS 0.18-µm technology occupying a core area of 220 µm by 820 µm.

  15. Advances in Analog Circuit Design 2015

    CERN Document Server

    Baschirotto, Andrea; Harpe, Pieter

    2016-01-01

    This book is based on the 18 tutorials presented during the 24th workshop on Advances in Analog Circuit Design. Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, including low-power and energy-efficient analog electronics, with specific contributions focusing on the design of efficient sensor interfaces and low-power RF systems. This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development. ·         Provides a state-of-the-art reference in analog circuit design, written by experts from industry and academia; ·         Presents material in a tutorial-based format; ·         Includes coverage of high-performance analog-to-digital and digital to analog converters, integrated circuit design in scaled technologies, and time-domain signal processing.

  16. eeDAP: an evaluation environment for digital and analog pathology

    Science.gov (United States)

    Gallas, Brandon D.; Cheng, Wei-Chung; Gavrielides, Marios A.; Ivansky, Adam; Keay, Tyler; Wunderlich, Adam; Hipp, Jason; Hewitt, Stephen M.

    2014-03-01

    Purpose: The purpose of this work is to present a platform for designing and executing studies that compare pathologists interpreting histopathology of whole slide images (WSI) on a computer display to pathologists interpreting glass slides on an optical microscope. Methods: Here we present eeDAP, an evaluation environment for digital and analog pathology. The key element in eeDAP is the registration of theWSI to the glass slide. Registration is accomplished through computer control of the microscope stage and a camera mounted on the microscope that acquires images of the real time microscope view. Registration allows for the evaluation of the same regions of interest (ROIs) in both domains. This can reduce or eliminate disagreements that arise from pathologists interpreting different areas and focuses the comparison on image quality. Results: We reduced the pathologist interpretation area from an entire glass slide (≈10-30 mm)2 to small ROIs google.com (project: eeDAP) as Matlab source or as a precompiled stand-alone license-free application.

  17. Tests on a digital neutron-gamma pulse shape discriminator with NE213

    International Nuclear Information System (INIS)

    Bell, Z.W.

    1981-01-01

    A technique using charge sensitive analog-to-digital converters to do neutron-gamma pulse shape discrimination is reported. The converters are gated by short (135 ns) pulses so as to reduce pile-up and the timing is such that the slow and total light output from the scintillator are measured. Preliminary tests indicate that the system performs reasonably well but poorer than some reported analog systems employing gated integrators or cross-over techniques. (orig.)

  18. Analog and hybrid computing

    CERN Document Server

    Hyndman, D E

    2013-01-01

    Analog and Hybrid Computing focuses on the operations of analog and hybrid computers. The book first outlines the history of computing devices that influenced the creation of analog and digital computers. The types of problems to be solved on computers, computing systems, and digital computers are discussed. The text looks at the theory and operation of electronic analog computers, including linear and non-linear computing units and use of analog computers as operational amplifiers. The monograph examines the preparation of problems to be deciphered on computers. Flow diagrams, methods of ampl

  19. Control of AC–DC grid side converter with single AC current sensor

    Indian Academy of Sciences (India)

    Himanshu Misra

    2017-11-24

    Nov 24, 2017 ... Introduction. Three-phase grid-connected pulse width modulation (PWM) converters have widespread applications such as motor drives, UPS, power quality conditioners and DFIG [1]. ..... in a-axis grid current (due to sensor and analog to digital .... current is proportional to the difference between refer-.

  20. Digital Simulation of Closed Loop Zvs-Zcs Bidirectional Dc-Dc Converter for Fuel Cell and Battery Application

    Directory of Open Access Journals (Sweden)

    V. V. Subrahmanya Kumar Bhajana

    2010-08-01

    Full Text Available A closed loop ZVS-ZCS bidirectional dc-dc converter is modeled and appropriate digital simulations are provided. With the ZVS-ZCS concept, the MATLAB simulation results of application to a fuel cell and battery application have been obtained whenever the input voltage exceeds the given 24V, at that time the load voltage will change from 180V to 230V. But due to this usage the load is disturbed and there is instability in the model. Using closed loop the output voltage is stabilized.

  1. PHOTO ENCODING OF ANALOG WATER METER FOR USER ACCESS AND PAYMENT SYSTEM

    OpenAIRE

    GODFREY A. MILLS; MOSES A. ACQUAH; APPAH BREMANG

    2012-01-01

    This paper presents design reconfiguration of analog water meter to provide remote access to user water consumption and billing records, payments, and meter device monitoring using photo-encoding as the detecting method for water consumption, a PIC18F2423 microcontroller for data processing, and SMS (short message service) technology for data transportation. To validate the system design, an analog water meter was converted into a digital equivalent and interfaced to the cellular network to t...

  2. An analogical approach to grammaticalization

    NARCIS (Netherlands)

    Fischer, O.; Stathi, K.; Gehweiler, E.; König, E.

    2010-01-01

    Two well-known approaches to language change illustrate a fundamental difference between functional and formal linguistics as to what are considered important mechanisms in change. In Grammaticalization, emphasis is on the semantic-pragmatic factors guiding change, while Generative Theory

  3. Digital Fuzzy logic and PI control of phase-shifted full-bridge current-doubler converter

    DEFF Research Database (Denmark)

    Török, Lajos; Munk-Nielsen, Stig

    2011-01-01

    of the converter was built in Matlab/Simulink using PLECS. A 600W PSFB convert was designed and built and the control strategies were implemented in a 16 bit fixed point dsPIC microcontroller. The advantages and disadvantages of using Fuzzy logic control are highlighted.......Simple digital fuzzy logic voltage control of a phaseshifted full-bridge (PSFB) converter is proposed in this article. A comparison of the fuzzy controller and the classical PI voltage controller is presented and their effects on the converter dynamics are analyzed. Simulation model...

  4. A physical analogy to fuzzy clustering

    DEFF Research Database (Denmark)

    Jantzen, Jan

    2004-01-01

    This tutorial paper provides an interpretation of the membership assignment in the fuzzy clustering algorithm fuzzy c-means. The membership of a data point to several clusters is shown to be analogous to the gravitational forces between bodies of mass. This provides an alternative way to explain...

  5. MOCCASIN: converting MATLAB ODE models to SBML.

    Science.gov (United States)

    Gómez, Harold F; Hucka, Michael; Keating, Sarah M; Nudelman, German; Iber, Dagmar; Sealfon, Stuart C

    2016-06-15

    MATLAB is popular in biological research for creating and simulating models that use ordinary differential equations (ODEs). However, sharing or using these models outside of MATLAB is often problematic. A community standard such as Systems Biology Markup Language (SBML) can serve as a neutral exchange format, but translating models from MATLAB to SBML can be challenging-especially for legacy models not written with translation in mind. We developed MOCCASIN (Model ODE Converter for Creating Automated SBML INteroperability) to help. MOCCASIN can convert ODE-based MATLAB models of biochemical reaction networks into the SBML format. MOCCASIN is available under the terms of the LGPL 2.1 license (http://www.gnu.org/licenses/lgpl-2.1.html). Source code, binaries and test cases can be freely obtained from https://github.com/sbmlteam/moccasin : mhucka@caltech.edu More information is available at https://github.com/sbmlteam/moccasin. © The Author 2016. Published by Oxford University Press.

  6. On the comparison of analog and digital SiPM readout in terms of expected timing performance

    Energy Technology Data Exchange (ETDEWEB)

    Gundacker, S., E-mail: stefan.gundacker@cern.ch; Auffray, E.; Jarron, P.; Meyer, T.; Lecoq, P.

    2015-07-01

    In time of flight positron emission tomography (TOF-PET) and in particular for the EndoTOFPET-US Project (Frisch, 2013 [1]), and other applications for high energy physics, the multi-digital silicon photomultiplier (MD-SiPM) was recently proposed (Mandai and Charbon, 2012 [2]), in which the time of every single photoelectron is being recorded. If such a photodetector is coupled to a scintillator, the largest and most accurate timing information can be extracted from the cascade of the scintillation photons, and the most probable time of positron emission determined. The readout concept of the MD-SiPM is very different from that of the analog SiPM, where the individual photoelectrons are merely summed up and the output signal fed into the readout electronics. We have developed a comprehensive Monte Carlo (MC) simulation tool that describes the timing properties of the photodetector and electronics, the scintillation properties of the crystal and the light transfer within the crystal. In previous studies we have compared MC simulations with coincidence time resolution (CTR) measurements and found good agreement within less than 10% for crystals of different lengths (from 3 mm to 20 mm) coupled to SiPMs from Hamamatsu. In this work we will use the developed MC tool to directly compare the highest possible time resolution for both the analog and digital readout of SiPMs with different scintillator lengths. The presented studies reveal that the analog readout of SiPMs with microcell signal pile-up and leading edge discrimination can lead to nearly the same time resolution as compared to the maximum likelihood time estimation applied to MD-SiPMs. Consequently there is no real preference for either a digital or analog SiPM for the sake of achieving highest time resolution. However, the best CTR in the analog SiPM is observed for a rather small range of optimal threshold values, whereas the MD-SiPM provides stable CTR after roughly 20 registered photoelectron timestamps in

  7. MOCCASIN: converting MATLAB ODE models to SBML

    OpenAIRE

    G?mez, Harold F.; Hucka, Michael; Keating, Sarah M.; Nudelman, German; Iber, Dagmar; Sealfon, Stuart C.

    2016-01-01

    Summary: MATLAB is popular in biological research for creating and simulating models that use ordinary differential equations (ODEs). However, sharing or using these models outside of MATLAB is often problematic. A community standard such as Systems Biology Markup Language (SBML) can serve as a neutral exchange format, but translating models from MATLAB to SBML can be challenging?especially for legacy models not written with translation in mind. We developed MOCCASIN (Model ODE Converter for ...

  8. BPSK Demodulation Using Digital Signal Processing

    Science.gov (United States)

    Garcia, Thomas R.

    1996-01-01

    A digital communications signal is a sinusoidal waveform that is modified by a binary (digital) information signal. The sinusoidal waveform is called the carrier. The carrier may be modified in amplitude, frequency, phase, or a combination of these. In this project a binary phase shift keyed (BPSK) signal is the communication signal. In a BPSK signal the phase of the carrier is set to one of two states, 180 degrees apart, by a binary (i.e., 1 or 0) information signal. A digital signal is a sampled version of a "real world" time continuous signal. The digital signal is generated by sampling the continuous signal at discrete points in time. The rate at which the signal is sampled is called the sampling rate (f(s)). The device that performs this operation is called an analog-to-digital (A/D) converter or a digitizer. The digital signal is composed of the sequence of individual values of the sampled BPSK signal. Digital signal processing (DSP) is the modification of the digital signal by mathematical operations. A device that performs this processing is called a digital signal processor. After processing, the digital signal may then be converted back to an analog signal using a digital-to-analog (D/A) converter. The goal of this project is to develop a system that will recover the digital information from a BPSK signal using DSP techniques. The project is broken down into the following steps: (1) Development of the algorithms required to demodulate the BPSK signal; (2) Simulation of the system; and (3) Implementation a BPSK receiver using digital signal processing hardware.

  9. Local digital control of power electronic converters in a dc microgrid based on a-priori derivation of switching surfaces

    Science.gov (United States)

    Banerjee, Bibaswan

    In power electronic basedmicrogrids, the computational requirements needed to implement an optimized online control strategy can be prohibitive. The work presented in this dissertation proposes a generalized method of derivation of geometric manifolds in a dc microgrid that is based on the a-priori computation of the optimal reactions and trajectories for classes of events in a dc microgrid. The proposed states are the stored energies in all the energy storage elements of the dc microgrid and power flowing into them. It is anticipated that calculating a large enough set of dissimilar transient scenarios will also span many scenarios not specifically used to develop the surface. These geometric manifolds will then be used as reference surfaces in any type of controller, such as a sliding mode hysteretic controller. The presence of switched power converters in microgrids involve different control actions for different system events. The control of the switch states of the converters is essential for steady state and transient operations. A digital memory look-up based controller that uses a hysteretic sliding mode control strategy is an effective technique to generate the proper switch states for the converters. An example dcmicrogrid with three dc-dc boost converters and resistive loads is considered for this work. The geometric manifolds are successfully generated for transient events, such as step changes in the loads and the sources. The surfaces corresponding to a specific case of step change in the loads are then used as reference surfaces in an EEPROM for experimentally validating the control strategy. The required switch states corresponding to this specific transient scenario are programmed in the EEPROM as a memory table. This controls the switching of the dc-dc boost converters and drives the system states to the reference manifold. In this work, it is shown that this strategy effectively controls the system for a transient condition such as step changes

  10. Digital image processing for thermal observation system

    Science.gov (United States)

    Yu, Wee K.; Song, In Seob; Yoon, Eon S.; Lee, Y. S.; Moon, M. G.; Hong, Seok-Min; Kim, J. K.

    1995-05-01

    This paper describes the digital image processing techniques of a thermal observation system, which is a serial/parallel scan and standard TV display type using a SPRITE (Signal PRocessing In The Element) detector. The designed digital electronics has two major signal processing stages: a high speed digital scan converter and an autoregressive (AR) filter. The digital scan converter is designed with analog-to-digital converter (ADC) and dual port RAM that can carry out reading and writing simultaneously, thus enabling compact scan conversion. The scan converter reformats the five parallel analog signals generated from the detector elements into serial digital signals compatible with RS-170 video rate. For the improvement of signal-to- noise ratio and compensation for the gamma effect of the monitor, we have implemented a real time 1st order AR filter that adopts frame averaging method. With the look-up-table (LUT) ROM that contains the frame averaging factors and the gamma coefficients, this digital filter performs the noise reduction and the gamma correction at the same time. This digital image processor has been proven to provide excellent image quality and superior detection capability for distant targets at night time.

  11. A Wideband 2x13-bit All-Digital I/Q RF-DAC

    NARCIS (Netherlands)

    Alavi, S.M.; Staszewski, R.B.; De Vreede, L.C.N.; Long, J.R.

    2014-01-01

    This paper presents a wideband 2 13-bit in-phase/quadrature-phase (I/Q) RF digital-to-analog converter-based all-digital modulator realized in 65-nm CMOS. The isolation between I and Q paths is guaranteed employing 25% duty-cycle differential quadrature clocks. With a 1.3-V supply and an on-chip

  12. Integration of analog and digital instrumentation and control systems in hybrid control rooms

    International Nuclear Information System (INIS)

    2010-01-01

    he IAEA's activities in the area of nuclear power plant operating performance and life cycle management are aimed at increasing Member State capabilities in utilizing good engineering and management practices as developed and transferred by the IAEA. In particular, the IAEA supports the improvement of nuclear power plant performance, plant life management, training, power uprating, operational license renewal, and the modernization of instrumentation and control (I and C) systems of plants. The issue of the integration of analog and digital I and C systems in hybrid control rooms was suggested by the IAEA Technical Working Group on Nuclear Power Plant Control and Instrumentation (TWG-NPPCI) at its meetings in 2003 and 2005. The subject was then approved by the IAEA and included in its work programmes for 2006-2009. The purpose of this report is to help nuclear utilities in planning control room and other human system interface (HSI) changes, making appropriate use of modern technologies. These technologies would aid in managing ageing and obsolescence, and facilitate improvements in plant performance and safety. This report covers a broad spectrum of potential changes to the control room ranging from the replacement of a few obsolete components with newer digital devices to a fully computerized control room. New digital technologies offer significant opportunities to improve access to and presentation of information to the user, e.g. operators, maintenance staff and management. However, this technology should be used prudently. In some cases, modernization is undertaken to resolve ageing and obsolescence or to meet regulatory requirements for license renewal. The integration of new technologies during main control room (MCR) modernizations should be performed cautiously and all affected aspects of plant maintenance, and operation should be carefully considered, paying particular attention to the human factors elements of these aspects. This report describes a

  13. [Development of a digital EEG signal acquiring system based on virtual instrument technology].

    Science.gov (United States)

    Ying, Jun; Chen, Guang-Fei; He, Shi-Lin

    2009-09-01

    This paper introduces an 16-lead digital EEG signal acquisition system, which applies MCU MSP430 as central control unit with high performance analog devices and high speed multi-channel, multi-bit analog-to-digital converter as peripheral to retrench analog circuit. Data is transferred to PC by USART interface. Software on PC based on virtual instrument technology realizes real-time detection, display and storage. The system has many advantages such as high precision, stable performance, small volume and low power dissipation, thus provides a new means for digital EEG signal acquisition.

  14. Fabrication of a resin appliance with alloy components using digital technology without an analog impression.

    Science.gov (United States)

    Al Mortadi, Noor; Jones, Quentin; Eggbeer, Dominic; Lewis, Jeffrey; Williams, Robert J

    2015-11-01

    The aim of this study was to fabricate a resin appliance incorporating "wire" components without the use of an analog impression and dental casts using an intraoral scanner and computer technology to build the appliance. This unique alignment of technology offers an enormous reduction in the number of fabrication steps when compared with more traditional methods of manufacture. The prototype incorporated 2 Adams clasps and a fitted labial bow. The alloy components were built from cobalt-chromium in an initial powdered form using established digital technology methods and then inserted into a build of a resin base plate. This article reports the first known use of computer-aided design and additive manufacture to fabricate a resin and alloy appliance, and constitutes proof of the concept for such manufacturing. The original workflow described could be seen as an example for many other similar appliances, perhaps with active components. The scan data were imported into an appropriate specialized computer-aided design software, which was used in conjunction with a force feedback (haptic) interface. The appliance designs were then exported as stereolithography files and transferred to an additive manufacturing machine for fabrication. The results showed that the applied techniques may provide new manufacturing and design opportunities in orthodontics and highlights the need for intraoral-specific additive manufacture materials to be produced and tested for biocompatibility compliance. In a trial, the retainer was fitted orally and judged acceptable by the clinician according to the typical criteria when placing such appliances in situ. Copyright © 2015 American Association of Orthodontists. Published by Elsevier Inc. All rights reserved.

  15. Optical Flow in a Smart Sensor Based on Hybrid Analog-Digital Architecture

    Directory of Open Access Journals (Sweden)

    Pablo Guzmán

    2010-03-01

    Full Text Available The purpose of this study is to develop a motion sensor (delivering optical flow estimations using a platform that includes the sensor itself, focal plane processing resources, and co-processing resources on a general purpose embedded processor. All this is implemented on a single device as a SoC (System-on-a-Chip. Optical flow is the 2-D projection into the camera plane of the 3-D motion information presented at the world scenario. This motion representation is widespread well-known and applied in the science community to solve a wide variety of problems. Most applications based on motion estimation require work in real-time; hence, this restriction must be taken into account. In this paper, we show an efficient approach to estimate the motion velocity vectors with an architecture based on a focal plane processor combined on-chip with a 32 bits NIOS II processor. Our approach relies on the simplification of the original optical flow model and its efficient implementation in a platform that combines an analog (focal-plane and digital (NIOS II processor. The system is fully functional and is organized in different stages where the early processing (focal plane stage is mainly focus to pre-process the input image stream to reduce the computational cost in the post-processing (NIOS II stage. We present the employed co-design techniques and analyze this novel architecture. We evaluate the system’s performance and accuracy with respect to the different proposed approaches described in the literature. We also discuss the advantages of the proposed approach as well as the degree of efficiency which can be obtained from the focal plane processing capabilities of the system. The final outcome is a low cost smart sensor for optical flow computation with real-time performance and reduced power consumption that can be used for very diverse application domains.

  16. Optical flow in a smart sensor based on hybrid analog-digital architecture.

    Science.gov (United States)

    Guzmán, Pablo; Díaz, Javier; Agís, Rodrigo; Ros, Eduardo

    2010-01-01

    The purpose of this study is to develop a motion sensor (delivering optical flow estimations) using a platform that includes the sensor itself, focal plane processing resources, and co-processing resources on a general purpose embedded processor. All this is implemented on a single device as a SoC (System-on-a-Chip). Optical flow is the 2-D projection into the camera plane of the 3-D motion information presented at the world scenario. This motion representation is widespread well-known and applied in the science community to solve a wide variety of problems. Most applications based on motion estimation require work in real-time; hence, this restriction must be taken into account. In this paper, we show an efficient approach to estimate the motion velocity vectors with an architecture based on a focal plane processor combined on-chip with a 32 bits NIOS II processor. Our approach relies on the simplification of the original optical flow model and its efficient implementation in a platform that combines an analog (focal-plane) and digital (NIOS II) processor. The system is fully functional and is organized in different stages where the early processing (focal plane) stage is mainly focus to pre-process the input image stream to reduce the computational cost in the post-processing (NIOS II) stage. We present the employed co-design techniques and analyze this novel architecture. We evaluate the system's performance and accuracy with respect to the different proposed approaches described in the literature. We also discuss the advantages of the proposed approach as well as the degree of efficiency which can be obtained from the focal plane processing capabilities of the system. The final outcome is a low cost smart sensor for optical flow computation with real-time performance and reduced power consumption that can be used for very diverse application domains.

  17. Real-time digital x-ray subtraction imaging

    International Nuclear Information System (INIS)

    Mistretta, C.A.; Kruger, R.A.; Houk, T.L.

    1982-01-01

    A method of producing visible difference images derived from an x-ray image of an anatomical subject is described. X-rays are directed through the subject, and the image is converted into television fields comprising trains of analog video signals. The analog signals are converted into digital signals, which are then integrated over a predetermined time corresponding to several television fields. Difference video signals are produced by performing a subtraction between the ongoing video signals and the corresponding integrated signals, and are converted into visible television difference images representing changes in the x-ray image

  18. How to use analogies for breakthrough innovations

    OpenAIRE

    Schild, Katharina; Herstatt, Cornelius; Lüthje, Christian

    2004-01-01

    Analogies can trigger breakthrough ideas in new product development. Numerous examples demonstrate that substantial innovations often result from transferring problem solutions from one industry or domain to another. For instance, the designers of the new running shoe generation of Nike, “Nike SHOX”, use the same suspension concept like the technologies applied for Formula 1 racing cars, or the biological Lotus-effect led to the development of various self-cleaning surfaces. Academic resea...

  19. Converting DYNAMO simulations to Powersim Studio simulations

    Energy Technology Data Exchange (ETDEWEB)

    Walker, La Tonya Nicole; Malczynski, Leonard A.

    2014-02-01

    DYNAMO is a computer program for building and running 'continuous' simulation models. It was developed by the Industrial Dynamics Group at the Massachusetts Institute of Technology for simulating dynamic feedback models of business, economic, and social systems. The history of the system dynamics method since 1957 includes many classic models built in DYANMO. It was not until the late 1980s that software was built to take advantage of the rise of personal computers and graphical user interfaces that DYNAMO was supplanted. There is much learning and insight to be gained from examining the DYANMO models and their accompanying research papers. We believe that it is a worthwhile exercise to convert DYNAMO models to more recent software packages. We have made an attempt to make it easier to turn these models into a more current system dynamics software language, Powersim © Studio produced by Powersim AS2 of Bergen, Norway. This guide shows how to convert DYNAMO syntax into Studio syntax.

  20. Forback DC-to-DC converter

    Science.gov (United States)

    Lukemire, Alan T.

    1995-05-01

    A pulse-width modulated DC-to-DC power converter including a first inductor, i.e. a transformer or an equivalent fixed inductor equal to the inductance of the secondary winding of the transformer, coupled across a source of DC input voltage via a transistor switch which is rendered alternately conductive (ON) and nonconductive (OFF) in accordance with a signal from a feedback control circuit is described. A first capacitor capacitively couples one side of the first inductor to a second inductor which is connected to a second capacitor which is coupled to the other side of the first inductor. A circuit load shunts the second capacitor. A semiconductor diode is additionally coupled from a common circuit connection between the first capacitor and the second inductor to the other side of the first inductor. A current sense transformer generating a current feedback signal for the switch control circuit is directly coupled in series with the other side of the first inductor so that the first capacitor, the second inductor and the current sense transformer are connected in series through the first inductor. The inductance values of the first and second inductors, moreover, are made identical. Such a converter topology results in a simultaneous voltsecond balance in the first inductance and ampere-second balance in the current sense transformer.

  1. An analog-digital hybrid RX beamformer chip with non-uniform sampling for ultrasound medical imaging with 2D CMUT array.

    Science.gov (United States)

    Um, Ji-Yong; Kim, Yoon-Jee; Cho, Seong-Eun; Chae, Min-Kyun; Song, Jongkeun; Kim, Baehyung; Lee, Seunghun; Bang, Jihoon; Kim, Youngil; Cho, Kyungil; Kim, Byungsub; Sim, Jae-Yoon; Park, Hong-June

    2014-12-01

    To reduce the memory area, a two-stage RX beamformer (BF) chip with 64 channels is proposed for the ultrasound medical imaging with a 2D CMUT array. The chip retrieved successfully two B-mode phantom images with a steering angle from -45 (°) to +45 (°), the maximum delay range of 8 μs, and the delay resolution of 6.25 ns. An analog-digital hybrid BF (HBF) is chosen for the proposed chip to utilize the easy beamforming operation in the digital domain and also to reduce chip area by minimizing the number of ADCs. The chip consists of eight analog beamformers (ABF) for the 1st-stage and a digital beamformer (DBF) for the 2nd-stage. The two-stage architecture reduces the memory area of both ABF and DBF by around four times. The DBF circuit is divided into three steps to further reduce the digital FIFO memory area by around twice. Coupled with the non-uniform sampling scheme, the proposed two-stage HBF chip reduces the total memory area by around 40 times compared to the uniform-sampling single-stage BF chip. The chip fabricated in a 0.13- μm CMOS process occupies the area of 19.4 mm(2), and dissipates 1.14 W with the analog supply of 3.3 V and the digital supply of 1.2 V.

  2. Digitized analog boomer seismic-reflection data collected during U.S. Geological Survey cruises Erda 90-1_HC, Erda 90-1_PBP, and Erda 91-3 in Mississippi Sound, June 1990 and September 1991

    Science.gov (United States)

    Bosse, Stephen T.; Flocks, James G.; Forde, Arnell S.

    2017-04-21

    The U.S. Geological Survey (USGS) Coastal and Marine Geology Program has actively collected geophysical and sedimentological data in the northern Gulf of Mexico for several decades, including shallow subsurface data in the form of high-resolution seismic-reflection profiles (HRSP). Prior to the mid-1990s most HRSP data were collected in analog format as paper rolls of continuous profiles up to 25 meters long. A large portion of this data resides in a single repository with minimal metadata. As part of the National Geological and Geophysical Data Preservation Program, scientists at the USGS St. Petersburg Coastal and Marine Science Center are converting the analog paper records to digital format using a large-format continuous scanner.This report, along with the accompanying USGS data release (Bosse and others, 2017), serves as an archive of seismic profiles with headers, converted Society of Exploration Geophysicists Y format (SEG-Y) files, navigation data, and geographic information system data files for digitized boomer seismic-reflection data collected from the Research Vessel (R/V) Erda during two cruises in 1990 and 1991. The Erda 90-1 geophysical cruise was conducted in two legs. The first leg included seismic data collected from the Hancock County region of the Mississippi Sound (Erda 90-1_HC) from June 4 to June 6, 1990. The second leg included seismic data collected from the Petit Bois Pass area of Mississippi Sound (Erda 90-1_PBP) from June 8 to June 9, 1990. The Erda 91-3 cruise occurred between September 12 and September 23, 1991, and surveyed the Mississippi Sound region just west of Horn Island, Mississippi.

  3. DigitSeis: A New Digitization Software and its Application to the Harvard-Adam Dziewoński Observatory Collection

    Science.gov (United States)

    Bogiatzis, P.; Altoé, I. L.; Karamitrou, A.; Ishii, M.; Ishii, H.

    2015-12-01

    DigitSeis is a new open-source, interactive digitization software written in MATLAB that converts digital, raster images of analog seismograms to readily usable, discretized time series using image processing algorithms. DigitSeis automatically identifies and corrects for various geometrical distortions of seismogram images that are acquired through the original recording, storage, and scanning procedures. With human supervision, the software further identifies and classifies important features such as time marks and notes, corrects time-mark offsets from the main trace, and digitizes the combined trace with an analysis to obtain as accurate timing as possible. Although a large effort has been made to minimize the human input, DigitSeis provides interactive tools for challenging situations such as trace crossings and stains in the paper. The effectiveness of the software is demonstrated with the digitization of seismograms that are over half a century old from the Harvard-Adam Dziewoński observatory that is still in operation as a part of the Global Seismographic Network (station code HRV and network code IU). The spectral analysis of the digitized time series shows no spurious features that may be related to the occurrence of minute and hour marks. They also display signals associated with significant earthquakes, and a comparison of the spectrograms with modern recordings reveals similarities in the background noise.

  4. Mechanical vibration to electrical energy converter

    Science.gov (United States)

    Kellogg, Rick Allen [Tijeras, NM; Brotz, Jay Kristoffer [Albuquerque, NM

    2009-03-03

    Electromechanical devices that generate an electrical signal in response to an external source of mechanical vibrations can operate as a sensor of vibrations and as an energy harvester for converting mechanical vibration to electrical energy. The devices incorporate a magnet that is movable through a gap in a ferromagnetic circuit, wherein a coil is wound around a portion of the ferromagnetic circuit. A flexible coupling is used to attach the magnet to a frame for providing alignment of the magnet as it moves or oscillates through the gap in the ferromagnetic circuit. The motion of the magnet can be constrained to occur within a substantially linear range of magnetostatic force that develops due to the motion of the magnet. The devices can have ferromagnetic circuits with multiple arms, an array of magnets having alternating polarity and, encompass micro-electromechanical (MEM) devices.

  5. System-Level Power Optimization for a ΣΔ D/A Converter for Hearing-Aid Application

    DEFF Research Database (Denmark)

    Pracný, Peter; Jørgensen, Ivan Harald Holger; Bruun, Erik

    2013-01-01

    This paper deals with a system-level optimization of a back-end of audio signal processing chain for hearing-aids, including a sigma-delta modulator digital-to-analog converter (DAC) and a Class D power amplifier. Compared to other stateof-the-art designs dealing with sigma-delta modulator design...

  6. Protocol converter for serial communication between digital rectifier controllers and a power plant SCADA system

    Directory of Open Access Journals (Sweden)

    Vukić Vladimir Đ.

    2016-01-01

    Full Text Available The paper describes the protocol converter INT-485-MBRTU, developed for serial communication between the thyristor rectifier (based on the proprietary protocol "INT-CPD-05", according to standard RS-485 and the SCADA system (based on protocol "Modbus RTU", of the same standard in the thermal power plant "Nikola Tesla B1". Elementary data on industrial communication protocols and communication gateways were provided. The basic technical characteristics of the "Omron" programmable logic controller CJ series were described, as well as the developed device INT-485-MBRTU. Protocol converters with two versions of communication software were tested, differing only in one control word, intended for a forced successive change of communication sequences, in opposite to automatic sequence relieve. The device iNT-485-MBRTU, with the program for forced successive change of communication sequences, demonstrated the reliability of data transfer of 100 %, in a sample of approximately 480 messages. For nearly the same sample, the same protocol converter, with a version of the program without any type of message identifiers, transferred less than 60 % of the foreseen data. During multiple sixty-hour tests, the reliability of data transfer of at least 99.9979% was recorded, in 100% of the analysed cases, and for a sample of nearly 96,000 pairs of the send and receive messages. We analysed the results and estimated the additional possibilities for application of the INT-485-MBRTU protocol converter.

  7. Data Acquisition and Digital Filtering for Infrasonic Records on Active Volcanoes

    Directory of Open Access Journals (Sweden)

    José Chilo

    2007-03-01

    Full Text Available This paper presents the design of a digital data acquisition system for volcanic infrasound records. The system includes four electret condenser element microphones, a QF4A512 programmable signal converter from Quickfilter Technologies and a MSP430 microcontroller from Texas Instruments. The signal output of every microphone is converted to digital via a 16-bit Analog to Digital Converter (ADC. To prevent errors in the conversion process, Anti-Aliasing Filters are employed prior to the ADC. Digital filtering is performed after the ADC using a Digital Signal Processor, which is implemented on the QF4A512. The four digital signals are summed to get only one signal. Data storing and digital wireless data transmission will be described in a future paper.

  8. 47 CFR 74.796 - Modification of digital transmission systems and analog transmission systems for digital operation.

    Science.gov (United States)

    2010-10-01

    ...) Subtract the value determined in the previous step from the authorized effective radiated power (“ERP”) of... ERP must be expressed in decibels above one kilowatt: ERP(dBk) = 10 log ERP(kW); (4) Convert the ERP calculated in the previous step to units of kilowatts; and (5) The ERP value determined through the above...

  9. Delta-Sigma Modulated Photodetection Method to Reduce Laser Power Project

    Data.gov (United States)

    National Aeronautics and Space Administration — This delta-sigma technique may be thought of as a form of analog-to-digital converter (ADC). The proposed network offers a means of processing electronic signals...

  10. Digital control card based on digital signal processor

    International Nuclear Information System (INIS)

    Hou Shigang; Yin Zhiguo; Xia Le

    2008-01-01

    A digital control card based on digital signal processor was developed. Two Freescale DSP-56303 processors were utilized to achieve 3 channels proportional- integral-differential regulations. The card offers high flexibility for 100 MeV cyclotron RF system development. It was used as feedback controller in low level radio frequency control prototype, with the feedback gain parameters continuously adjustable. By using high precision analog to digital converter with 500 kHz sampling rate, a regulation bandwidth of 20 kHz was achieved. (authors)

  11. Wideband Spectroscopy: The Design and Implementation of a 3 GHz Bandwidth, 8192 Channel, Polyphase Digital Spectrometer

    Science.gov (United States)

    Monroe, Ryan M.

    2011-01-01

    A family of state-of-the-art digital Fourier transform spectrometers has been developed, with a combination of high bandwidth and fine resolution unavailable elsewhere. Analog signals consisting of radiation emitted by constituents in planetary atmospheres or galactic sources are downconverted and subsequently digitized by a pair of interleaved Analog-to-Digital Converters, (ADC). This 6 Gsps (giga-sample per second) digital representation of the analog signal is then processed through an FPGA-based streaming Fast Fourier Transform (FFT), the key development described below. Digital spectrometers have many advantages over previously used analog spectrometers, especially in terms of accuracy and resolution, both of which are particularly important for the type of scientific questions to be addressed with next-generation radiometers. the implementation, results and underlying math for this spectrometer, as well as, potential for future extension to even higher bandwidth, resolution and channel orthogonality, needed to support proposed future advanced atmospheric science and radioastronomy, are discussed.

  12. Wideband Spectroscopy: The Design and Implementation of a 3 GHz, 2048 Channel Digital Spectrometer

    Science.gov (United States)

    Monroe, Ryan M.

    2011-01-01

    A state-of-the-art digital Fourier Transform spectrometer has been developed, with a combination of high bandwidth and fine resolution unavailable elsewhere. Analog signals consisting of radiation emitted by constituents in planetary atmospheres or galactic sources are downconverted and subsequently digitized by a pair of interleaved Analog-to-Digital Converters (ADC). This 6 Gsps (giga sample per second) digital representation of the analog signal is then processed through an FPGA-based streaming Fast Fourier Transform (FFT), the key development described below. Digital spectrometers have many advantages over previously used analog spectrometers, especially in terms of accuracy and resolution, both of which are particularly important for the type of scientific questions to be addressed with next-generation radiometers. The implementation, results and underlying math for this spectrometer, as well as potential for future extension to even higher bandwidth, resolution and channel orthogonality, needed to support proposed future advanced atmospheric science and radioastronomy, are discussed.

  13. Digital Signal Processing System for Active Noise Reduction

    Science.gov (United States)

    Edmonson, William W.; Tucker, Jerry

    2002-12-01

    Over the years there has been a need to improve the comfort of passengers in flight. One avenue for increasing comfort is to reduce cabin noise that is attributed to the engine and the vibration of fuselage panels that radiate sound. High frequency noise can be abated using sound absorbing material. Though, for low frequency noise the sound absorption material would have to very thick, thereby reducing the cabin size. To reduce these low frequency disturbances, active noise control systems (ANC) is being developed that utilizes feedback for cancellation of the disturbance. The active noise control system must be small in size, be a low power device, and operate in real-time. It must also be numerically stable i.e. insensitive to temperature and pressure variations. The ANC system will be a module that consists of digital signal processor (DSP), analog-digital and digital-analog converters, power converters, an actuator and sensors. The DSP will implement the feedback control algorithm that controls the actuators. This module will be attached to panels on the inside of the fuselage for actively eliminating resonant modes of the structure caused by turbulent flow across the fuselage Skin. A hardware prototype of the ANC system must be able to eliminate broadband noise consisting of a bandwidth between 100 Hz and 1500 Hz, which requires a sample rate of 5000 Hz. The analog/digital converters output accuracy is 16 bits with a 2's-compliment format and a very short acquisition time. This will also yield the appropriate dynamic range. Similar specifications are required of the digital/analog converter. The processor section of the system integrates a digital signal processor (TI TMS320C33) with analog/digital (Burr-Brown ADS8320) and digital/analog signal (DAC853 1) converters. The converters with associated power conditioning circuitry and test points reside on a daughter board that sits on top of a Spectrum Digital evaluation module. This will have the ability to test

  14. Matrix converter applied to energy saving for street lighting systems

    OpenAIRE

    Román Lumbreras, Manuel; Velasco Quesada, Guillermo; Conesa Roca, Alfons

    2010-01-01

    This work presents a three-phase AC-AC converter, with independent phase control, based on matrix-converter structure. This converter is applied to electrical energy saving on the public lighting systems by means of regulation and control of the voltage applied to the lamps. The developed converter represents a technological improvement with respect to the traditional systems based on an autotransformer: it reduces system cost and volume, and increases lamps lifetime.

  15. Digital media labs in libraries

    CERN Document Server

    Goodman, Amanda L

    2014-01-01

    Families share stories with each other and veterans reconnect with their comrades, while teens edit music videos and then upload them to the web: all this and more can happen in the digital media lab (DML), a gathering of equipment with which people create digital content or convert content that is in analog formats. Enabling community members to create digital content was identified by The Edge Initiative, a national coalition of leading library and local government organizations, as a library technology benchmark. Surveying academic and public libraries in a variety of settings and sharing a

  16. Analog Spectrophotometers in the Digital Age: Data Acquisition on a Budget

    Science.gov (United States)

    Nazarenko, Alexander Y.; Nazarenko, Natalie A.

    2005-01-01

    The interfacing of various spectrometers with analog output to a personal computer running Microsoft Excel in the Windows environment is described. This low cost data acquisition solution is a useful replacement of a chart recorder for various UV-visible and infrared scanning spectrophotometers.

  17. CMOS sigma-delta converters practical design guide

    CERN Document Server

    De la Rosa, Jose M

    2013-01-01

    A comprehensive overview of Sigma-Delta Analog-to-Digital Converters (ADCs) and a practical guide to their design in nano-scale CMOS for optimal performance. This book presents a systematic and comprehensive compilation of sigma-delta converter operating principles, the new advances in architectures and circuits, design methodologies and practical considerations - going from system-level specifications to silicon integration, packaging and measurements, with emphasis on nanometer CMOS implementation. The book emphasizes practical design issues - from high-level behavioural modelling i

  18. Improvement of the characterization of ultrasonic data by means of digital signal processing

    International Nuclear Information System (INIS)

    Bieth, M.; Romy, D.; Weigel, D.

    1985-01-01

    The digital signal processing method for averaging using minima developed by Framatome allows to improve signal-to-noise ratio up to 7 dB during ultrasonic testing of cast stainless steel structures (primary pipes of PWR power plants). Application of digital signal processing to industrial testing conditions requires the availability of a fast analog-digital converter capable of real time processings which has been developed by CGR [fr

  19. Digital positron lifetime: the influence of noise

    International Nuclear Information System (INIS)

    Krille, Arnold; Krause-Rehberg, Reinhard; Anwand, Wolfgang

    2011-01-01

    In contrast to the world around where everything seems to go digital as soon as possible, positron lifetime spectrometers are kind of a 'last sanctuary' for analog measurements. Only a few of the newer spectrometers use the analog-digital-converters directly after the photomultipliers and extract the timing information via computer. Judging from their results it seems as if the current available converters and the timing mathematics are only as good as the conventional analog setup in the timing resolution. As it is decided that EPOS [1] will use digital positron lifetime, we try to find some reasons for limited timing resolution by simulating anode pulses from the photomultipliers and measuring the FWHM. We create pulses similar to current state-of-the-art 4GS/s digitizers but can control the level of noise and the bit-depth independently. We found that especially the noise (that would come from the analog electronics in/before the converters) has a great influence on the timing resolution. Also we try to use lowpass filtering to reduce that influence with great success.

  20. Transitioning to digital radiography

    Energy Technology Data Exchange (ETDEWEB)

    Miranda, F., E-mail: Francisco.Miranda@pwc.ca [Pratt & Whitney Canada, Longueuil, Quebec (Canada)

    2015-09-15

    This article provides insight on the technical and business considerations necessary to implement or to transition to digital radiography Continued refinements in digital radiography technology have resulted in significant improvements in image quality and detectability of indications. These improvements have resulted in the acceptance of the technology by users and aerospace primes for final product inspection and disposition. Digital radiography has also been identified as an interesting cost reduction initiative with the potential of providing gains in productivity through increased throughput and decreased inspection lead-times and resulting costs. (author)

  1. Image processing to optimize wave energy converters

    Science.gov (United States)

    Bailey, Kyle Marc-Anthony

    The world is turning to renewable energies as a means of ensuring the planet's future and well-being. There have been a few attempts in the past to utilize wave power as a means of generating electricity through the use of Wave Energy Converters (WEC), but only recently are they becoming a focal point in the renewable energy field. Over the past few years there has been a global drive to advance the efficiency of WEC. Placing a mechanical device either onshore or offshore that captures the energy within ocean surface waves to drive a mechanical device is how wave power is produced. This paper seeks to provide a novel and innovative way to estimate ocean wave frequency through the use of image processing. This will be achieved by applying a complex modulated lapped orthogonal transform filter bank to satellite images of ocean waves. The complex modulated lapped orthogonal transform filterbank provides an equal subband decomposition of the Nyquist bounded discrete time Fourier Transform spectrum. The maximum energy of the 2D complex modulated lapped transform subband is used to determine the horizontal and vertical frequency, which subsequently can be used to determine the wave frequency in the direction of the WEC by a simple trigonometric scaling. The robustness of the proposed method is provided by the applications to simulated and real satellite images where the frequency is known.

  2. Design of High-Voltage Switch-Mode Power Amplifier Based on Digital-Controlled Hybrid Multilevel Converter

    Directory of Open Access Journals (Sweden)

    Yanbin Hou

    2016-01-01

    Full Text Available Compared with conventional Class-A, Class-B, and Class-AB amplifiers, Class-D amplifier, also known as switching amplifier, employs pulse width modulation (PWM technology and solid-state switching devices, capable of achieving much higher efficiency. However, PWM-based switching amplifier is usually designed for low-voltage application, offering a maximum output voltage of several hundred Volts. Therefore, a step-up transformer is indispensably adopted in PWM-based Class-D amplifier to produce high-voltage output. In this paper, a switching amplifier without step-up transformer is developed based on digital pulse step modulation (PSM and hybrid multilevel converter. Under the control of input signal, cascaded power converters with separate DC sources operate in PSM switch mode to directly generate high-voltage and high-power output. The relevant topological structure, operating principle, and design scheme are introduced. Finally, a prototype system is built, which can provide power up to 1400 Watts and peak voltage up to ±1700 Volts. And the performance, including efficiency, linearity, and distortion, is evaluated by experimental tests.

  3. Three new DC-to-DC Single-Switch Converters

    Directory of Open Access Journals (Sweden)

    Barry W. Williams

    2017-06-01

    Full Text Available This paper presents a new family of three previously unidentified dc-to-dc converters, buck, boost, and buck-boost voltage-transfer-function topologies, which offer advantageous transformer coupling features and low capacitor dc voltage stressing. The three single-switch, single-diode, converters offer the same features as basic dc-to-dc converters, such as the buck function with continuous output current and the boost function with continuous input current. Converter time-domain simulations and experimental results (including transformer coupling support and extol the dc-to-dc converter concepts and analysis presented.

  4. High Speed Digitizer for Remote Sensing, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Alphacore, Inc. proposes to design and characterize a 24Gsps (giga-samples per-second), 6-bit, low-power, and low-cost analog-to-digital converter (ADC) for use in a...

  5. Digitization errors using digital charge division positionsensitive detectors

    International Nuclear Information System (INIS)

    Berliner, R.; Mildner, D.F.R.; Pringle, O.A.

    1981-01-01

    The data acquisition speed and electronic stability of a charge division position-sensitive detector may be improved by using digital signal processing with a table look-up high speed multiply to form the charge division quotient. This digitization process introduces a positional quantization difficulty which reduces the detector position sensitivity. The degree of the digitization error is dependent on the pulse height spectrum of the detector and on the resolution or dynamic range of the system analog-to-digital converters. The effects have been investigated analytically and by computer simulation. The optimum algorithm for position sensing determination using 8-bit digitization and arithmetic has a digitization error of less than 1%. (orig.)

  6. Device for modular input high-speed multi-channel digitizing of electrical data

    Science.gov (United States)

    VanDeusen, Alan L.; Crist, Charles E.

    1995-09-26

    A multi-channel high-speed digitizer module converts a plurality of analog signals to digital signals (digitizing) and stores the signals in a memory device. The analog input channels are digitized simultaneously at high speed with a relatively large number of on-board memory data points per channel. The module provides an automated calibration based upon a single voltage reference source. Low signal noise at such a high density and sample rate is accomplished by ensuring the A/D converters are clocked at the same point in the noise cycle each time so that synchronous noise sampling occurs. This sampling process, in conjunction with an automated calibration, yields signal noise levels well below the noise level present on the analog reference voltages.

  7. High-Precision Hysteresis Sensing of the Quartz Crystal Inductance-to-Frequency Converter.

    Science.gov (United States)

    Matko, Vojko; Milanović, Miro

    2016-06-28

    A new method for the automated measurement of the hysteresis of the temperature-compensated inductance-to-frequency converter with a single quartz crystal is proposed. The new idea behind this method is a converter with two programmable analog switches enabling the automated measurement of the converter hysteresis, as well as the temperature compensation of the quartz crystal and any other circuit element. Also used is the programmable timing control device that allows the selection of different oscillating frequencies. In the proposed programmable method two different inductances connected in series to the quartz crystal are switched in a short time sequence, compensating the crystal's natural temperature characteristics (in the temperature range between 0 and 50 °C). The procedure allows for the measurement of the converter hysteresis at various values of capacitance connected in parallel with the quartz crystal for the converter sensitivity setting at selected inductance. It, furthermore, enables the measurement of hysteresis at various values of inductance at selected parallel capacitance (sensitivity) connected to the quartz crystal. The article shows that the proposed hysteresis measurement of the converter, which converts the inductance in the range between 95 and 100 μH to a frequency in the range between 1 and 200 kHz, has only 7 × 10(-13) frequency instability (during the temperature change between 0 and 50 °C) with a maximum 1 × 10(-11) hysteresis frequency difference.

  8. High-Precision Hysteresis Sensing of the Quartz Crystal Inductance-to-Frequency Converter

    Directory of Open Access Journals (Sweden)

    Vojko Matko

    2016-06-01

    Full Text Available A new method for the automated measurement of the hysteresis of the temperature-compensated inductance-to-frequency converter with a single quartz crystal is proposed. The new idea behind this method is a converter with two programmable analog switches enabling the automated measurement of the converter hysteresis, as well as the temperature compensation of the quartz crystal and any other circuit element. Also used is the programmable timing control device that allows the selection of different oscillating frequencies. In the proposed programmable method two different inductances connected in series to the quartz crystal are switched in a short time sequence, compensating the crystal’s natural temperature characteristics (in the temperature range between 0 and 50 °C. The procedure allows for the measurement of the converter hysteresis at various values of capacitance connected in parallel with the quartz crystal for the converter sensitivity setting at selected inductance. It, furthermore, enables the measurement of hysteresis at various values of inductance at selected parallel capacitance (sensitivity connected to the quartz crystal. The article shows that the proposed hysteresis measurement of the converter, which converts the inductance in the range between 95 and 100 μH to a frequency in the range between 1 and 200 kHz, has only 7 × 10−13 frequency instability (during the temperature change between 0 and 50 °C with a maximum 1 × 10−11 hysteresis frequency difference.

  9. Possible applications of the sigma delta digitizer in particle physics

    International Nuclear Information System (INIS)

    Hallgren, B.

    1991-01-01

    The sigma delta (ΣΔ) principle is an analog-to-digital conversion technique based on high-frequency sampling and low-pass filtering of the quantization noise. Resolution in time is exchanged for that in amplitude so as to avoid the difficulty of implementing complex precision analog circuits, in favour of digital circuits. The approach is attractive because it will make it possible to integrate complete channels of high resolution analog-to-digital converters and time digitizers in submicron digital VLSI technologies. Advantage is taken of the fact that the state-of-the-art VLSI is better suited for providing fast digital circuits than for providing precise analog circuits. This article describes the principle and the performance of the ideal ΣΔ digitizer. The design and measurements of a new 10 MHz prototype circuit of a second-order ΣΔ is presented to show the high speed operation of such a circuit. The expected performance of a CMOS test design using the same principles is discussed. Digital filters, useful for particle physics, are introduced. A comparison to other digitizing techniques is made and the potential applications of the ΣΔ digitizer in particle physics are outlined. (orig.)

  10. Power quality improvement by using multi-pulse AC-DC converters for DC drives: Modeling, simulation and its digital implementation

    Directory of Open Access Journals (Sweden)

    Mohd Tariq

    2014-12-01

    Full Text Available The paper presents the modeling, simulation and digital implementation of power quality improvement of DC drives by using multi pulse AC–DC converter. As it is a well-known fact that power quality determines the fitness of electrical power to consumer devices, hence an effort has been made to improve power quality in this work. Simulation and digital implementation with the help of MATLAB/Simulink has been done and results obtained are discussed in detail to verify the theoretical results. The multipulse converter was connected with DC drives and was run at no load condition to find out the transient and steady state performances. FFT analysis has been performed and Total Harmonic Distortion (THD results obtained at different pulses are shown here.

  11. A high capacity data recording device based on a digital audio processor and a video cassette recorder.

    Science.gov (United States)

    Bezanilla, F

    1985-01-01

    A modified digital audio processor, a video cassette recorder, and some simple added circuitry are assembled into a recording device of high capacity. The unit converts two analog channels into digital form at 44-kHz sampling rate and stores the information in digital form in a common video cassette. Bandwidth of each channel is from direct current to approximately 20 kHz and the dynamic range is close to 90 dB. The total storage capacity in a 3-h video cassette is 2 Gbytes. The information can be retrieved in analog or digital form. PMID:3978213

  12. Design and implementation of a reconfigurable mixed-signal SoC based on field programmable analog arrays

    Science.gov (United States)

    Liu, Lintao; Gao, Yuhan; Deng, Jun

    2017-11-01

    This work presents a reconfigurable mixed-signal system-on-chip (SoC), which integrates switched-capacitor-based field programmable analog arrays (FPAA), analog-to-digital converter (ADC), digital-to-analog converter, digital down converter , digital up converter, 32-bit reduced instruction-set computer central processing unit (CPU) and other digital IPs on a single chip with 0.18 μm CMOS technology. The FPAA intellectual property could be reconfigured as different function circuits, such as gain amplifier, divider, sine generator, and so on. This single-chip integrated mixed-signal system is a complete modern signal processing system, occupying a die area of 7 × 8 mm 2 and consuming 719 mW with a clock frequency of 150 MHz for CPU and 200 MHz for ADC/DAC. This SoC chip can help customers to shorten design cycles, save board area, reduce the system power consumption and depress the system integration risk, which would afford a big prospect of application for wireless communication. Project supported by the National High Technology and Development Program of China (No. 2012AA012303).

  13. Digital Control of a High Voltage (2.5 kV) Bidirectional Flyback DC-DC Converter for Driving a Capacitive Incremental Actuator

    DEFF Research Database (Denmark)

    Thummala, Prasanth; Maksimovic, Dragan; Zhang, Zhe

    2016-01-01

    the incremental motion by charging and discharging the capacitive actuators. The bidirectional flyback converter employs a digital controller to improve efficiency and charge/discharge speed using the valley switching technique during both charge and discharge processes, without the need to sense signals...... on the output high-voltage (HV) side. Experimental results verifying the bidirectional operation of a high voltage flyback converter are presented, using a 3 kV polypropylene film capacitor as the load. The energy loss distributions of the converter when 4 kV and 4.5 kV HV MOSFETs are used on HV side...... are presented. The flyback prototype with a 4 kV MOSFET demonstrated 89% charge energy efficiency to charge the capacitive load from 0 V to 2.5 kV, and 84% discharge energy efficiency to discharge it from 2.5 kV to 0 V, respectively....

  14. Analog circuit design

    CERN Document Server

    Dobkin, Bob

    2012-01-01

    Analog circuit and system design today is more essential than ever before. With the growth of digital systems, wireless communications, complex industrial and automotive systems, designers are being challenged to develop sophisticated analog solutions. This comprehensive source book of circuit design solutions aids engineers with elegant and practical design techniques that focus on common analog challenges. The book's in-depth application examples provide insight into circuit design and application solutions that you can apply in today's demanding designs. <

  15. Data Converter for Multistandard Mobile Phones

    DEFF Research Database (Denmark)

    Yurttas, Aziz; Bruun, Erik; Jensen, Rasmus Glarborg

    2004-01-01

    This paper describes an analog to digital converter (ADC) for mobile communication systems using a direct down conversion architecture. The ADC can be programmed to meet the requirements of different communication standards, including GSM (Global System for Mobile communication) and WCDMA (Wideband....... The entire ADC consumes about 5.5 mW and occupies an active area of about 0.36 mm(2). A test circuit has been developed and fabricated and measurements show that both the required programmability and the required performance can be obtained using the proposed configurations....

  16. Digital Light Processing and MEMS: reflecting the digital display needs of the networked society

    Science.gov (United States)

    Hornbeck, Larry J.

    1996-08-01

    Digital video technology is becoming increasingly important to the networked society. The natural interface to digital video is a digital display, one that accepts electrical bits at its input and converts them into optical bits at the output. The digital-to-analog processing function is performed in the mind of the observer. Texas Instruments has developed such a display with its recent market introduction of the Digital Light ProcessingTM (DLPTM) projection display. DLP technology is based on the Digital Micromirror DeviceTM (DMDTM), a microelectromechanical systems (MEMS) array of semiconductor-based digital light switches. The DMD switching array precisely controls a light source for projection display and digital printing applications. This paper presents an overview of DLP technology along with the architecture, projection operation, manufacture, and reliability of the DMD. Features of DMD technology that distinguish it from conventional MEMS technology are explored. Finally, the paper provides a view of DLP business opportunities.

  17. Current Controller for Multi-level Front-end Converter and Its Digital Implementation Considerations on Three-level Flying Capacitor Topology

    Science.gov (United States)

    Tekwani, P. N.; Shah, M. T.

    2017-10-01

    This paper presents behaviour analysis and digital implementation of current error space phasor based hysteresis controller applied to three-phase three-level flying capacitor converter as front-end topology. The controller is self-adaptive in nature, and takes the converter from three-level to two-level mode of operation and vice versa, following various trajectories of sector change with the change in reference dc-link voltage demanded by the load. It keeps current error space phasor within the prescribed hexagonal boundary. During the contingencies, the proposed controller takes the converter in over modulation mode to meet the load demand, and once the need is satisfied, controller brings back the converter in normal operating range. Simulation results are presented to validate behaviour of controller to meet the said contingencies. Unity power factor is assured by proposed controller with low current harmonic distortion satisfying limits prescribed in IEEE 519-2014. Proposed controller is implemented using TMS320LF2407 16-bit fixed-point digital signal processor. Detailed analysis of numerical format to avoid overflow of sensed variables in processor, and per-unit model implementation in software are discussed and hardware results are presented at various stages of signal conditioning to validate the experimental setup. Control logic for the generation of reference currents is implemented in TMS320LF2407A using assembly language and experimental results are also presented for the same.

  18. High performance printed N and P-type OTFTs enabling digital and analog complementary circuits on flexible plastic substrate

    Science.gov (United States)

    Jacob, S.; Abdinia, S.; Benwadih, M.; Bablet, J.; Chartier, I.; Gwoziecki, R.; Cantatore, E.; van Roermund, A. H. M.; Maddiona, L.; Tramontana, F.; Maiellaro, G.; Mariucci, L.; Rapisarda, M.; Palmisano, G.; Coppard, R.

    2013-06-01

    This paper presents a printed organic complementary technology on flexible plastic substrate with high performance N and P-type Organic Thin Film Transistors (OTFTs), based on small-molecule organic semiconductors in solution. Challenges related to the integration of both OTFT types in a common complementary flow are addressed, showing the importance of surface treatments. Stability on single devices and on an elementary complementary digital circuit (ring oscillator) is studied, demonstrating that a robust and reliable flow with high electrical performances can be established for printed organic devices. These devices are used to manufacture several analog and digital building blocks. The design is carried out using a model specifically developed for this technology, and taking into account the parametric variability. High-frequency measurements of printed envelope detectors show improved speed performance, resulting from the high mobility of the OTFTs. In addition, a compact dynamic flip-flop and a low-offset comparator are demonstrated, thanks to availability of both n-type and p-type OTFTs in the technology. Measurement results are in good agreement with the simulations. The circuits presented establish a complete library of building blocks for the realization of a printed RFID tag.

  19. A digital system for image acquisition and its application to X-ray detection

    International Nuclear Information System (INIS)

    Lima Junior, H.P.; Guedes, G.P.; Barbosa, A.F.

    1998-01-01

    A digital system for image acquisition is described. Which is able to process two electric signals of amplitude varying from 0 to 10 Volts and correlate them in a two dimensional histogram. X and Y coordinates for every event are derived from the amplitudes of two coincident - within an AND gate transition time - pulses. The system is composed of two Analog-to-digital Converters (ADC's), control electronics and a coincidence gate generator, implement in a card that is plugged to any IBM compatible PC ISA bus. Data acquisition rate may be as high as 3.6 x 10 5 events per second in computers equipped with Pentium 233 MHZ processor. Software code has been written in the Delphi environment using Assembly routines. Image size may be chosen from 256 x 256 to 1024 x 1024 pixels. Images are shown that illustrate the applicability to detection systems based on two dimensional position sensitive X-ray detectors. (author)

  20. A Mixed Analog-Digital Radiation Hard Technology for High Energy Physics Electronics: DMILL~(Durci~Mixte~sur~Isolant~Logico-Lineaire)

    CERN Multimedia

    Lugiez, F; Leray, J; Rouger, M; Fourches, N T; Musseau, O; Potheau, R

    2002-01-01

    %RD29 %title\\\\ \\\\Physics experiments under preparation with the future LHC require a fast, low noise, very rad-hard (>10 Mrad and >10$^{14}$ neutron/cm$^{2}$), mixed analog-digital microelectronics VLSI technology.\\\\ \\\\The DMILL microelectronics technology (RD29) was developed between 1990 and 1995 by a Consortium gathering the CEA and the firm Thomson-TCS, with the collaboration of IN2P3. The goal of the DMILL program, which is now completed, was to provide the High Energy Physics community, space industry, nuclear industry, and other applications, with an industrial very rad-hard mixed analog-digital microelectronics technology.\\\\ \\\\DMILL integrates mixed analog-digital very rad-hard (>10 Mrad and >10$^{14}$ neutron/cm$^{2}$) vertical bipolar, 0.8 $\\mu$m CMOS and 1.2 $\\mu$m PJFET transistors. Its SOI substrate and its dielectric trenches strongly reduce SEU sensitivity and completely eliminate any possibility of latch-up. Its four transistors are optimized to obtain low-noise features. DMILL also integrates...

  1. Editoração científica: as duas faces - analógica e digital Scientific publishing: the two faces - analogic and digital

    Directory of Open Access Journals (Sweden)

    Carlos Teixeira Brandt

    2004-12-01

    Full Text Available A Associação Brasileira de Editores Científicos (ABEC promoveu, em setembro de 2004, o III Workshop de Editores Científicos em Recife. O enfoque principal foi sobre a forma de divulgação do conhecimento científico: analógico ou digital. Contudo, foram também discutidas as formas de financiamento da produção e divulgação desse conhecimento. A importância maior na produção do conhecimento esteve associada aos institutos de pesquisa, as universidades e as sociedades científicas. Tem sido observada uma tendência ao aumento no gerenciamento eletrônico da editoração e a informatização da divulgação; sobretudo pelo menor custo e maior facilidade; se os recursos humanos das ciências da informação estiverem disponíveis, todavia, a convivência da formatação analógica e digital é esperada por bastante tempo. Foi apresentada a idéia de um sítio eletrônico dos editores, com certificação digital, para que os autores da produção do conhecimento pudessem, com mais facilidade enviar os seus manuscritos. A seleção pelo corpo editorial das revistas desses manuscritos e a participação do corpo editorial na orientação da elaboração dos mesmos foi enfatizada. Essa atitude poderia aumentar a publicação do conhecimento produzido, particularmente daquele advindo dos programas de pós-graduação das universidades. Durante todo o evento ficou evidente a essencialidade da produção do conhecimento como elemento básico de evolução da própria sociedade humana.The Brazilian Association for the Scientific Editors (ABEC promoted in September, 2004, the III Workshop for the Scientific Editors in Recife, Pernambuco - Brazil. The main focus was in the way that the scientific knowledge needs to be spread out : analogical or digital. However, the financial support for the production and the divulgation of this knowledge was also discussed. In the production it was agreed that it is made in the research institutes; universities

  2. Switching power converters medium and high power

    CERN Document Server

    Neacsu, Dorin O

    2013-01-01

    An examination of all of the multidisciplinary aspects of medium- and high-power converter systems, including basic power electronics, digital control and hardware, sensors, analog preprocessing of signals, protection devices and fault management, and pulse-width-modulation (PWM) algorithms, Switching Power Converters: Medium and High Power, Second Edition discusses the actual use of industrial technology and its related subassemblies and components, covering facets of implementation otherwise overlooked by theoretical textbooks. The updated Second Edition contains many new figures, as well as

  3. The programmable analog circuitry of the CDF trigger

    International Nuclear Information System (INIS)

    Sanders, H.; Amidei, D.; Campbell, M.

    1986-01-01

    A flexible trigger has been partially built to trigger the CDF, Colliding Detector at Fermilab. A programmable analog system can yield a large dynamic range of outputs. With suitable management it will control noise to achieve the high resolution and fast process necessary for such a trigger. The first level output will be delivered in three microseconds after a beam crossing. The system is designed to have a resolution of one part in one thousand. Analog processing, where just summing is involved, can handle many channels faster than an equivalent digital processor exhibiting the same resolution. As a result, this system will be much simpler with far less components. Digital intervention controls channel gain and bias. It also sets a comparison level, and includes or excludes individual channels in the various output summing networks that will determine the trigger result. The results of the analog processing which are input to the digital control include the value of the channel magnitude comparison, the sign of the results of the various sums and finally the fast flash analog to digital converter output values. A set of DACS are used to control the pedestal of the respective various sum networks

  4. A Development of Auto Calibration Analog Input Module for Safety-related Controller

    International Nuclear Information System (INIS)

    Yoo, Kwan Woo; Yun, Dong Hwa; Hwang, Sung Jae; Lee, Dong Il

    2014-01-01

    The purpose of this paper is to provide the auto calibration analog input module design of POSAFE-Q is a PLC(Programmable Logic Controller) that has been developed for the evaluation of safety-related. Analog input module from the control equipment of the safety-related, has a very significant proportion. Analog input module is a device that converts digital data that can be that the processor module recognizes the analog signals from the pressure device in the field, the flow rate, and temperature. In this paper, to check the Auto Calibration function of the RTD (Resistance Temperature Detector) input module. In order to ensure the accuracy of the analog input module, calibration function is required, it is necessary to ensure the accuracy of ±0.1% (1% in the standard PT100 sensor)

  5. Short term wave forecasting, using digital filters, for improved control of Wave Energy Converters

    DEFF Research Database (Denmark)

    Tedd, James; Frigaard, Peter

    2007-01-01

    This paper presents a Digital Filter method for real time prediction of waves incident upon a Wave Energy device. The method transforms waves measured at a point ahead of the device, to expected waves incident on the device. The relationship between these incident waves and power capture is derived...... experimentally. Results are shown form measurements taken on the Wave Dragon prototype device, a floating overtopping device situated in Northern Denmark. In this case the method is able to accurately predict the surface elevation at the device 11.2 seconds before the measurement is made. This is sufficient...

  6. Evaluation and optimization of the bandwidth of static converters: application to multi-cell converters; Evaluation et optimisation de la bande passante des convertisseurs statiques

    Energy Technology Data Exchange (ETDEWEB)

    Aime, M.

    2003-11-15

    Thanks to the technological progress achieved in the field of power electronics, the use of static converters has spread to new applications. In particular, some applications such as active filtering or the supply of special AC machines require power converters having good dynamic performances. The subject of this thesis is to evaluate systematically the dynamic performances of multi-cell converters, and then to optimize these performances. This document is organized in four chapters. The first one summarizes the main multilevel converter structures, and some control strategies dedicated to these structures. The second chapter presents the evaluation criteria chosen to quantify the dynamic performances of static converters. These criteria are then used to compare the performances obtained with two different PWM strategies. An optimized strategy which results from a trade-off between the two former strategies is then introduced. The third chapter shows a new control strategy of multi-cell voltage source converters. This new strategy enables to control the peak current at a fixed switching frequency. The operation of this controller is explained, and the results obtained by digital simulations are presented and discussed. The fourth chapter deals with the experimental achievement of the peak current control. In particular, the implementation of the control algorithm within a FPGA is demonstrated. Finally, the conclusion of this thesis presents some orientations for further developments, in order to improve the current control strategy and to widen its field of applications. (author)

  7. Converting Geometry from Creo Parametric to BRL-CAD

    Science.gov (United States)

    2017-06-28

    ARL-SR-0376 ● JUNE 2017 US Army Research Laboratory Converting Geometry from Creo Parametric to BRL- CAD by Clifford W Yapp...to the originator. ARL-SR-0376 ● JUNE 2017 US Army Research Laboratory Converting Geometry from Creo Parametric to BRL- CAD by...

  8. From Digital Divide to Digital Democracy.

    Science.gov (United States)

    de los Santos, Gerardo E., Ed.; de los Santos, Alfredo G., Jr., Ed.; Milliron, Mark David, Ed.

    This publication is one of many efforts of the League for Innovation in the Community College to address the issue of societal technology access and learning needs. This work addresses the issue of the digital divide, which includes the often conflicting perspectives of information technology (IT) access and literacy needs held by government…

  9. A contribution to the design of fast code converters for position encoders

    Science.gov (United States)

    Denic, Dragan B.; Dincic, Milan R.; Miljkovic, Goran S.; Peric, Zoran H.

    2016-10-01

    Pseudorandom binary sequences (PRBS) are very useful in many areas of applications. Absolute position encoders based on PRBS have many advantages. However, the pseudorandom code is not directly applicable to the digital electronic systems, hence a converter from pseudorandom to natural binary code is needed. Recently, a fast pseudorandom/natural code converter based on Galois PRBS generator (much faster than previously used converter based on Fibonacci PRBS generator) was proposed. One of the main parts of the Galois code converter is an initial logic. The problem of the design of the initial logic has been solved only for some single values of resolution, but it is still not solved for any value of resolution, which significantly limits the applicability of the fast Galois code converter. This paper solves this problem presenting the solution for the design of the initial logic of the fast Galois pseudorandom/natural code converters used in the pseudorandom position encoders, in general manner, that is for any value of the resolution, allowing for a wide applicability of the fast Galois pseudorandom position encoders. Rigorous mathematical derivation of the formula for the designing of the initial logic is presented. Simulation of the proposed converter is performed in NI MultiSim software. The proposed solution, although developed for pseudorandom position encoders, can be used in many other fields where PRBS are used.

  10. An iconic, analogical approach to grammaticalization

    NARCIS (Netherlands)

    Fischer, O.; Conradie, C.J.; Johl, R.; Beukes, M.; Fischer, O.; Ljungberg, C.

    2010-01-01

    This paper addresses a number of problems connected with the ‘apparatus’ used in grammaticalization theory. It will be argued that we get a better grip on what happens in processes of grammaticalization (and its ‘opposite’, lexicalization) if the process is viewed in terms of analogical processes,

  11. A 256 channel digital filter for a data acquisition system

    International Nuclear Information System (INIS)

    Roberts, W.; Aikens, B.

    1991-01-01

    The TRIUMF Central Control System (CCS) employs several data acquisition systems to monitor its operational parameters. Each system multiplexes 256 analog channels into one analog to digital converter. Space constraints on the multiplexer cards prohibit the installation of adequate anti-alias filters which allows 60 Hz and other noise to corrupt the measurements. The new system overcomes this problem by sampling each channel at a 160 samples/second rate and using a DSP microcomputer to lowpass filter the data. The multiplexer and analog-digital converter operate at 256 times the channel sample rate. The channel filter bandwidth is restricted to approximately 1 Hz due to the rate at which the CCS reads the data. One DSP microcomputer is able to filter the 256 channels in a multiplexed system at a cost less than that of the anti-alias filters which would otherwise have been required

  12. The Politics of Mass Digitization

    DEFF Research Database (Denmark)

    Thylstrup, Nanna Bonde

    Mass-digitization of cultural-heritage archives has become increasingly pervasive. From Google Books to Europeana, bounded material is converted into ephemeral data on an unprecedented scale, promising to provide mankind with readily accessible and enduring reservoirs of knowledge. Interrogating...... this phenomenon, this dissertation asks how mass digitization affects the politics of cultural heritage. Its central argument is that mass digitization of cultural heritage is neither a neutral technical process, nor a transposition of the politics of analog cultural heritage to the digital realm on a 1:1 scale....... Rather, it should be understood as distinct subpolitical processes that bring together a multiplicity of interests and actors hitherto foreign to the field of cultural heritage archives. Mass digitization is thus upheaving the disciplinary enclosures of cultural heritage and gives rise to new territorial...

  13. Analog circuit design a tutorial guide to applications and solutions

    CERN Document Server

    Williams, Jim

    2011-01-01

    * Covers the fundamentals of linear/analog circuit and system design to guide engineers with their design challenges. * Based on the Application Notes of Linear Technology, the foremost designer of high performance analog products, readers will gain practical insights into design techniques and practice. * Broad range of topics, including power management tutorials, switching regulator design, linear regulator design, data conversion, signal conditioning, and high frequency/RF design. * Contributors include the leading lights in analog design, Robert Dobkin, Jim Willia

  14. A CMOS rail-to-rail linear VI-converter

    NARCIS (Netherlands)

    Vervoort, P.P.; Vervoort, P.P.; Wassenaar, R.F.

    1995-01-01

    A linear CMOS VI-converter operating in strong inversion with a common-mode input range from the negative to the positive supply rail is presented. The circuit consists of three linear VI-converters based on the difference of squares principle. Two of these perform the actual V to I conversion,

  15. Study and achievement of a digital-analog-divider; Etude et realisation d'un diviseur-analogique-numerique

    Energy Technology Data Exchange (ETDEWEB)

    Petin, A. [Commissariat a l' Energie Atomique, Cadarache (France). Centre d' Etudes Nucleaires

    1969-04-01

    This apparatus is designed to give directly, in digital form, the value of the ratio Vt1/V2 two analog voltages. It consists essentially of an analog-digital coder operating by successive weighing; the comparison voltage is made proportional to the divider V2 in the coder. The input dynamics are such that the voltages Vi and V2 are all in the range -50 mV to -5 V. Each of the circuits has an input impedance of about 10 K{omega}. As for the quotient, it is a binary number given in series and parallel form; it is made up of 8 bits, this giving a change of 1/16 to 16 per jump of 1/16 in the zone where the accuracy is highest (V2 {>=} 800 mV). The time required for a division is, at best, 15 {mu}sec. During the time of calculation, the voltages V{sub 1} and V{sub 2} should not vary by more than 1 per cent and 0.5 per cent respectively. The theory of the system and the investigation of a synoptic diagram, the study of the circuits and the actual construction are presented. (author) [French] Cet appareil est destine a fournir directement sous forme numerique la valeur du rapport V1/V2 de deux tensions analogiques. Il est constitue essentiellement d'un codeur analogique-numerique fonctionnant par pesees successives dans lequel la tension de reference est rendue proportionnelle au diviseur V2. La dynamique d'entree est telle que les tensions V1 et V2 peuvent etre comprises dans l'intervalle -50 mV a -5 V. Chacune des voies presente une impedance d'entree d'environ 10 K{omega}. En ce qui concerne le quotient, c'est un nombre binaire delivre sous les formes serie et parallele ; il est compose de 8 bits, ce qui donne une variation de 1/16 a 16 par bond de 1/16 dans la zone de meilleure precision (V2 {>=} 800 mV). Le temps necessaire pour effectuer la division est au mieux de 15 {mu}s. Durant le temps de calcul les tensions V{sub 1} et V{sub 2} ne doivent pas varier respectivement de plus de 1 pour cent et 0.5 pour cent. Apres avoir etabli la

  16. Understanding delta-sigma data converters

    CERN Document Server

    Pavan, Shanti; Temes, Gabor C

    2017-01-01

    This new edition introduces novel analysis and design techniques for delta-sigma (ΔΣ) converters in physical and conceptual terms, and includes new chapters that explore developments in the field over the last decade. This book explains the principles and operation of delta-sigma analog-to-digital converters (ADCs) in physical and conceptual terms in accordance with the most recent developments in the field. The interest of ΔΣ converter designers has shifted significantly over the past decade, due to many new applications for data converters at the far ends of the frequency spectrum. Continuous-time delta-sigma A/D converters with GHz clocks, of both lowpass and bandpass types, are required for wireless applications. At the other extreme, multiplexed ADCs with very narrow (sometimes 10 Hz wide) signal bandwidths, but very high accuracy are needed in the interfaces of biomedical and environmental sensors. To reflect the changing eeds of designers, the second edition includes significant new material on bo...

  17. Short term wave forecasting, using digital filters, for improved control of Wave Energy Converters

    Energy Technology Data Exchange (ETDEWEB)

    Tedd, J.; Frigaard, P. [Department of Civil Engineering, Aalborg University, Aalborg (Denmark)

    2007-07-01

    This paper presents a Digital Filter method for real time prediction of waves incident upon a Wave Energy device. The method transforms waves measured at a point ahead of the device, to expected waves incident on the device. The relationship between these incident waves and power capture is derived experimentally. Results are shown form measurements taken on the Wave Dragon prototype device, a floating overtopping device situated in Northern Denmark. In this case the method is able to accurately predict the surface elevation at the device 11.2 seconds before the measurement is made. This is sufficient to allow advanced control systems to be developed using this knowledge to significantly improve power capture.

  18. Short term wave forecasting, using digital filters, for improved control of Wave Energy Converters

    DEFF Research Database (Denmark)

    Tedd, James; Frigaard, Peter

    2007-01-01

    This paper presents a Digital Filter method for real time prediction of waves incident upon a Wave Energy device. The method transforms waves measured at a point ahead of the device, to expected waves incident on the device. The relationship between these incident waves and power capture is derived...... experimentally. Results are shown form measurements taken on the Wave Dragon prototype device, a floating overtopping device situated in Northern Denmark. In this case the method is able to accurately predict the surface elevation at the device 11.2 seconds before the measurement is made. This is sufficient...... to allow advanced control systems to be developed using this knowledge to significantly improve power capture....

  19. Digital signal processing for He3 proportional counter

    International Nuclear Information System (INIS)

    Zeynalov, Sh.S.; Ahmadov, Q.S.

    2010-01-01

    Full text : Data acquisition systems for nuclear spectroscopy have traditionally been based on systems with analog shaping amplifiers followed by analog-to-digital converters. Recently, however, new systems based on digital signal processing make possible to replace the analog shaping and timing circuitry the numerical algorithms to derive properties of the pulse such as its amplitude. DSP is a fully numerical analysis of the detector pulse signals and this technique demonstrates significant advantages over analog systems in some circumstances. From a mathematical point of view, one can consider the signal evolution from the detector to the ADC as a sequence of transformations that can be described by precisely defined mathematical expressions. Digital signal processing with ADCs has the possibility to utilize further information on the signal pulses from radiation detectors. In the experiment each step of the signal generation in the 3He filled proportional counter was described using digital signal processing techniques (DSP). The electronic system has consisted of a detector, a preamplifier and a digital oscilloscope. The pulses from the detector were digitized using a digital storage oscilloscope. This oscilloscope allowed signal digitization with accuracy of 8 bit (256 levels) and with frequency of up to 5 * 10 8 samples/s. As a neutron source was used Cf-252. To obtain detector output current pulse I(t) created by the motions of the ions/electrons pairs was written an algorithm which can easily be programmed using modern computer programming languages.

  20. Analog Tools in Digital History Classrooms: An Activity-Theory Case Study of Learning Opportunities in Digital Humanities

    Science.gov (United States)

    Craig, Kalani

    2017-01-01

    Digital humanities is often presented as classroom savior, a narrative that competes against the idea that technology virtually guarantees student distraction. However, these arguments are often based on advocacy and anecdote, so we lack systematic research that explores the effect of digital-humanities tools and techniques such as text mining,…

  1. Using Analogies to Prevent Misconceptions about Chemical Equilibrium

    Science.gov (United States)

    Sahin Pekmez, Esin

    2010-01-01

    The main purpose of this study was to find the effectiveness of using analogies to prevent misconceptions about chemical equilibrium. Nineteen analogies, which were based on dynamic aspects of chemical equilibrium and application of Le Chatelier's principle, were developed. The participations of this study consisted of 11th grade students (n: 151)…

  2. Digital and analog fiber optic communications for CATV and FTTx applications

    CERN Document Server

    Brillant, Avigdor

    2008-01-01

    This book is intended to provide a step-by-step guide to all design aspects and tradeoffs from theory to application for fiber-optics transceiver electronics. Presenting a compendium of information in a structured way, this book enables the engineer to develop a methodical design approach, a deep understanding of specifications parameters and the reasons behind them, as well as their effects and consequences on system performance, which are essential for proper component design. Further, a fundamental understanding of RF, digital circuit design, and linear and nonlinear phenomena is important

  3. EVALUATION OF A PROCESS TO CONVERT BIOMASS TO METHANOL FUEL

    Science.gov (United States)

    The report gives results of a review of the design of a reactor capable of gasifying approximately 50 lb/hr of biomass for a pilot-scale facility to develop, demonstrate, and evaluate the Hynol Process, a high-temperature, high-pressure method for converting biomass into methanol...

  4. Absolute quantification by droplet digital PCR versus analog real-time PCR

    Science.gov (United States)

    Hindson, Christopher M; Chevillet, John R; Briggs, Hilary A; Gallichotte, Emily N; Ruf, Ingrid K; Hindson, Benjamin J; Vessella, Robert L; Tewari, Muneesh

    2014-01-01

    Nanoliter-sized droplet technology paired with digital PCR (ddPCR) holds promise for highly precise, absolute nucleic acid quantification. Our comparison of microRNA quantification by ddPCR and real-time PCR revealed greater precision (coefficients of variation decreased by 37–86%) and improved day-to-day reproducibility (by a factor of seven) of ddPCR but with comparable sensitivity. When we applied ddPCR to serum microRNA biomarker analysis, this translated to superior diagnostic performance for identifying individuals with cancer. PMID:23995387

  5. Digitally intensive DC-DC converter for extreme space environments, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — The Space Micro –Arizona State University (ASU) team will develop an all-digitally controlled, wide temperature range point-of-load switch-mode DC-DC regulator core...

  6. Digitally intensive DC-DC converter for extreme space environments, Phase II

    Data.gov (United States)

    National Aeronautics and Space Administration — The Space Micro-Arizona State University (ASU) team will develop an all-digitally controlled, wide temperature range point-of-load switch-mode DC-DC regulator core...

  7. A DSP controlled one-to-three phase matrix converter

    Energy Technology Data Exchange (ETDEWEB)

    Dubovsky, J.; Dobrucly, B; Tabacek, R.; Havrila, R. [Department of Electric Traction and Energetics Faculty of Electrical Engineering, University of Zilina (Slovakia)

    1997-12-31

    This paper deals with the theoretical analysis computer simulation and experimental results of IM fed by a one-to-three phase matrix converter which offers a unique solution for single phase electric traction applications. The proposed drive in comparison with currently used conventional drives reduces the number of power switching elements of the converter, which increases drives dependability and brings lower investment in power electronics used in drive. Further advantage is that the converter is controlled with nearly unity power factor which cuts down the operational expenses and offers higher overall performance of the drive. (orig.) 6 refs.

  8. Introduction to digital communication systems

    CERN Document Server

    Wesolowski, Krzysztof

    2009-01-01

    Combining theoretical knowledge and practical applications, this advanced-level textbook covers the most important aspects of contemporary digital communication systems. Introduction to Digital Communication Systems focuses on the rules of functioning digital communication system blocks, starting with the performance limits set by the information theory. Drawing on information relating to turbo codes and LDPC codes, the text presents the basic methods of error correction and detection, followed by baseband transmission methods, and single- and multi-carrier digital modulations. The basi

  9. A full digital approach to the TDCR method

    International Nuclear Information System (INIS)

    Mini, Giuliano; Pepe, Francesco; Tintori, Carlo; Capogni, Marco

    2014-01-01

    Current state of the art solutions based on the Triple to Double Coincidence Ratio method are generally large size, heavy-weight and not transportable systems. This is due, on one side, to large detectors and scintillation chambers and, on the other, to bulky analog electronics for data acquisition. CAEN developed a new, full digital approach to TDCR technique based on a portable, stand-alone, high-speed multichannel digitizer, on-board Digital Pulse Processing and dedicated DAQ software that emulates the well-known MAC3 analog board. - Highlights: • CAEN Desktop Digitizers used to emulate the MAC3 analog board in TDCR acquisition. • Spectroscopic application of the CAEN digitizers to the TDCR for charge spectra. • Development of two different softwares by CAEN and ENEA-INMRI for TDCR analysis. • Single electron peak obtained by CAEN digitizer and ENEA-INMRI portable TDCR. • Measurements of 90 Sr/ 90 Y by the new TDCR device equipped with CAEN digitizers

  10. Studies on a Hybrid Full-Bridge/Half-Bridge Bidirectional CLTC Multi-Resonant DC-DC Converter with a Digital Synchronous Rectification Strategy

    Directory of Open Access Journals (Sweden)

    Shu-huai Zhang

    2018-01-01

    Full Text Available This study presents a new bidirectional multi-resonant DC-DC converter, which is named CLTC. The converter adds an auxiliary transformer and an extra resonant capacitor based on a LLC resonant DC-DC converter, achieving zero-voltage switching (ZVS for the input inverting switches and zero-current switching (ZCS for the output rectifiers in all load range. The converter also has a wide gain range in two directions. When the load is light, a half-bridge configuration is adopted instead of a full-bridge configuration to solve the problem of voltage regulation. By this method, the voltage gain becomes monotonous and controllable. Besides, the digital synchronous rectification strategy is proposed in forward mode without adding any auxiliary circuit. The conduction time of synchronous rectifiers equals the estimation value of body diodes’ conduction time with the lightest load. Power loss analysis is also conducted in different situations. Finally, the theoretical analysis is validated by a 5 kW prototype.

  11. A fast radiation-to-coherent light converter

    International Nuclear Information System (INIS)

    Wang, C.L.; Flatley, J.E.; Stewart, P.H.

    1988-01-01

    We have developed a radiation-to-coherent light converter (RCLC) with a monolithically integrated semiconductor chip that consists of a chromium-doped GaAs photoconductor detector modulates the laser diode, which has been biased above the lasing threshold, thus converting a radiation pulse to an electric pulse and then to a light pulse. The laser pulse is then transmitted to a fast recorder through a high-bandwidth optical fiber. In the absence of a single-step x-ray pumped laser, our converter appears to be the first integrated device that can efficiently convert x-ray flux into coherent light. This device has been tested successfully with the 50-ps electron beams of a 17-MeV linear accelerator and with 50-ns x-ray pulses from a Z-pinch plasma source. 2 refs., 9 figs

  12. Assembly processor program converts symbolic programming language to machine language

    Science.gov (United States)

    Pelto, E. V.

    1967-01-01

    Assembly processor program converts symbolic programming language to machine language. This program translates symbolic codes into computer understandable instructions, assigns locations in storage for successive instructions, and computer locations from symbolic addresses.

  13. Application of the matrix converter to power flow control

    Directory of Open Access Journals (Sweden)

    Szcześniak P.

    2014-09-01

    Full Text Available Advanced power electronic converters can provide the means to control power flow and ensure proper and secure operation of the future power grid. The small electrical energy sources dispersed in electrical power systems referred to as distributed generation are one of the most significant parts of future grids - Smart Grids. The threephase, direct matrix converter is an alternative solution to the conventional AC-DC-AC converter for interfacing two AC systems in distributed power generation with different voltage and/or frequency parameters. This paper presents a control analysis of a threephase matrix converter employed as a power interface of future electrical grids. The proposed system has been successfully tested for bidirectional power flow operation with different grid operating conditions, such as, frequency and voltage variation

  14. A 2.5 GS/s 14-bit D/A converter with 8 to 1 MUX

    Science.gov (United States)

    Jun'an, Zhang; Guangjun, Li; Ruitao, Zhang; Dongbing, Fu; Jiaoxue, Li; Yafeng, Wei; Bo, Yan; Jun, Liu; Ruzhang, Li

    2016-03-01

    A 2.5 GS/s 14-bit D/A converter (DAC) with 8 to 1 MUX is presented. This 14-bit DAC uses a “5+9” segment PMOS current-steering architecture. A bias circuit which ensures the PMOS current source obtains a larger output impedance under every PVT (process, source voltage and temperature) corner is also presented. The 8 to 1 MUX has a 3 stage structure, and a proper timing sequence is designed to ensure reliable data synthesis. A DEM function which is merged with a “5-31” decoder is used to improve the DAC's dynamic performance. This DAC is embedded in a 2.5 GHz direct digital frequency synthesizer (DDS) chip, and is implemented in a 0.18 μm CMOS technology, occupies 4.86 × 2. 28 mm2 including bond pads (DAC only), and the measured performance is SFDR > 40 dB (with and without DEM) for output signal frequency up to 1 GHz. Compared with other present published DACs with a non-analog-resample structure (means return-to-zero or quad-switch structure is unutilized), this paper DAC's clock frequency (2.5 GHz) and higher output frequency SFDR (> 40 dB, up to 1 GHz) has some competition. Project supported by the National Natural Science Foundation of China (Nos. 61006027, 61176030), the Research Foundation of Key Laboratory of Analog Integrated Circuit (Nos. 9140C0902120C09034, 9140c090204130c09042), and the Fundamental Research Funds for the Central Universities of China (No. ZYGX2012J003).

  15. Design of a MGy radiation tolerant resolver-to-digital convertor IC for remotely operated maintenance in harsh environments

    Energy Technology Data Exchange (ETDEWEB)

    Leroux, Paul, E-mail: paul.leroux@kuleuven.be [KU Leuven, Dept. of Electrical Engineering (ESAT), AdvISe, Kleinhoefstraat 4, 2440 Geel (Belgium); Van Koeckhoven, Wesley; Verbeeck, Jens [KU Leuven, Dept. of Electrical Engineering (ESAT), AdvISe, Kleinhoefstraat 4, 2440 Geel (Belgium); Van Uffelen, Marco; Esqué, Salvador; Ranz, Roberto; Damiani, Carlo [Fusion for Energy, Torres Diagonal Litoral B3, Josep Pla 2, 08019 Barcelona (Spain); Hamilton, David [ITER Organization, Route de Vinon sur Verdon, 13115 Saint Paul-lez-Durance (France)

    2014-10-15

    During future ITER maintenance operations, sensors and their embarked electronics will be exposed to a hostile and radioactive environment. This paper presents the design of a MGy radiation tolerant 16 bit resolver-to-digital converter (RDC) in 130 nm CMOS technology. The RDC features a Type II digital tracking loop, able to track resolvers with speeds up to 300 rps, and excitation frequencies up to 4 kHz. The RDC uses two integrated ΔΣ-analog-to-digital converters (ADCs) to digitize the resolver outputs. The 16 bit, 10 kHz ADCs utilize a correlated double sampling technique to remove radiation induced offset and 1/f-noise. The front-end features a static angular resolution of 16 bits (4.2 arcsec{sub rms}) and a resolution of 10 bits (6 arcmin{sub rms}) at a rotor speed of 100 rps. The circuit has a simulated radiation tolerance exceeding 1 MGy. It has the ability to operate under temperatures up to 125 °C, and to allow multiplexing with signals from other conventional sensors for compact, robust read-out architectures.

  16. A review of common methods to convert morphine to methadone

    Directory of Open Access Journals (Sweden)

    Eric Wong

    2013-01-01

    Full Text Available When dosed appropriately on carefully chosen patients, methadone can be a very safe and effective choice in managing chronic pain. Many authors have discussed important issues surrounding patient selection, drug interactions, screening for QTc prolongation and monitoring. This article will focus on the dosing dilemma that exists after the patient is deemed an appropriate candidate for methadone and a conversion is necessary from another opioid. Despite many publications dedicated to addressing this challenging topic, there is no consensus on the most appropriate method for converting an opioid regimen to methadone. Given the lack of concrete guidance, clinicians in a community setting are likely to be faced with an increased challenge if there are no available pain specialists to provide clinical support. Common methods for converting morphine to methadone will be reviewed and two clinical patient scenarios used to illustrate the outcomes of applying the methods.

  17. Coordinated Control of Wave Energy Converters Subject to Motion Constraints

    Directory of Open Access Journals (Sweden)

    Liguo Wang

    2016-06-01

    Full Text Available In this paper, a generic coordinated control method for wave energy converters is proposed, and the constraints on motion amplitudes and the hydrodynamic interaction between converters are considered. The objective of the control problem is to maximize the energy converted from ocean waves, and this is achieved by coordinating the power take-off (PTO damping of each wave energy converter in the frequency domain in each sea state. In a case study, a wave energy farm consisting of four converters based on the concept developed by Uppsala University is studied. In the solution, motion constraints, including constraints on the amplitudes of displacement and velocity, are included. Twelve months of sea states, based on measured wave data at the Lysekil test site on the Swedish west coast, are used in the simulation to evaluate the performance of the wave energy farm using the new method. Results from the new coordinated control method and traditional control method are compared, indicating that the coordinated control of wave energy converters is an effective way to improve the energy production of wave energy farm in harmonic waves.

  18. Experience With Sampling Of 500 MHz Rf Signal For Digital Receiver Applications

    CERN Document Server

    Mavric, U; Ursic, R

    2003-01-01

    This article will present test results of a prototype system that was built to evaluate feasibility of a direct sampling of a 500 MHz RF signal for use in digital receiver applications. The system consists of a variable gain RF front end, a fast analog to digital converter (ADC) and a field programmable gate array (FPGA) providing glue-logic between the ADC and a PC computer.

  19. FROM DIGITIZED SCIENCE TO DIGITIZED SOCIETY

    Directory of Open Access Journals (Sweden)

    I. P. Smirnov

    2017-01-01

    Full Text Available Introduction. Along with other innovations, in recent years, scientometric methods for measurement of scientists’ and research teams’ results in the scientific sphere have been widely adopted. The Russian practice of application of those methods to determine the degree of academics’ performance isn't unambiguous and eventually can have negative, destructive consequences for domestic science. In this regard, this very burning issue is required for urgent thorough public discussion by scientific community.The aim of the article is a critical analysis of the topical problems of science reform in the light of the law “On the Russian Academy of Sciences, the reorganization of state academies of sciences and amendments to certain legislative acts of theRussian Federation” (№ 253-RF, 27 September, 2013. Also, the author notes the importance of methods for evaluating the effectiveness of scholarly endeavor.Results and scientific novelty. On the example of the system of digital indicators operating in the Russian Academy of Education, formed on the basis of the requirements of the Ministry of Education and Science of the Russian Federation and Federal Agency of Scientific Organizations, it is shown that it is impossible to evaluate the scientific result objectively.It is clearly proved that the indicators used, primarily the number of publications and the citation index, in modern conditions give distorted landmarks, become a brake on science, reduce its ability to self-development. The image of scientists and whole institutions is formed on false indicators.Academic and many scientific journals have acquired a commercial nature; there is no real evaluative analysis of the manuscripts, which have been submitted into the editorial office; there is no selection according to relevance and significance of the submitted material. Real examples, provided in the article, demonstrate frequent violations of ethical principles when forming authorial

  20. Compensated digital readout family

    Science.gov (United States)

    Ludwig, David E.; Skow, Michael

    1991-11-01

    ISC has completed test on an IC which has 32 channels of amplifiers, low pass anti-aliasing filters, 13-bit analog-to-digital (A/D) converters with non-uniformity correction per channel and a digital multiplexer. The single slope class of A/D conversion is described, as are the unique variations required for incorporation of this technique for use with on-focal plane detector readout electronics. This paper describes the architecture used to implement the digital on-focal plane signal processing functions. Results from measured data on a test IC are presented for a circuit containing these functions operating at a sensor frame rate of 1000 hertz.

  1. Analog signal isolation techniques

    Energy Technology Data Exchange (ETDEWEB)

    Beadle, E.R.

    1992-12-31

    This paper discusses several techniques for isolating analog signals in an accelerator environment. The techniques presented here encompass isolation amplifiers, voltage-to-frequency converters (VIFCs), transformers, optocouplers, discrete fiber optics, and commercial fiber optic links. Included within the presentation of each method are the design issues that must be considered when selecting the isolation method for a specific application.

  2. Analog signal isolation techniques

    Energy Technology Data Exchange (ETDEWEB)

    Beadle, E.R.

    1992-01-01

    This paper discusses several techniques for isolating analog signals in an accelerator environment. The techniques presented here encompass isolation amplifiers, voltage-to-frequency converters (VIFCs), transformers, optocouplers, discrete fiber optics, and commercial fiber optic links. Included within the presentation of each method are the design issues that must be considered when selecting the isolation method for a specific application.

  3. Is the link from working memory to analogy causal? No analogy improvements following working memory training gains.

    Directory of Open Access Journals (Sweden)

    J Elizabeth Richey

    Full Text Available Analogical reasoning has been hypothesized to critically depend upon working memory through correlational data, but less work has tested this relationship through experimental manipulation. An opportunity for examining the connection between working memory and analogical reasoning has emerged from the growing, although somewhat controversial, body of literature suggests complex working memory training can sometimes lead to working memory improvements that transfer to novel working memory tasks. This study investigated whether working memory improvements, if replicated, would increase analogical reasoning ability. We assessed participants' performance on verbal and visual analogy tasks after a complex working memory training program incorporating verbal and spatial tasks. Participants' improvements on the working memory training tasks transferred to other short-term and working memory tasks, supporting the possibility of broad effects of working memory training. However, we found no effects on analogical reasoning. We propose several possible explanations for the lack of an impact of working memory improvements on analogical reasoning.

  4. Is the Link from Working Memory to Analogy Causal? No Analogy Improvements following Working Memory Training Gains

    Science.gov (United States)

    Richey, J. Elizabeth; Phillips, Jeffrey S.; Schunn, Christian D.; Schneider, Walter

    2014-01-01

    Analogical reasoning has been hypothesized to critically depend upon working memory through correlational data [1], but less work has tested this relationship through experimental manipulation [2]. An opportunity for examining the connection between working memory and analogical reasoning has emerged from the growing, although somewhat controversial, body of literature suggests complex working memory training can sometimes lead to working memory improvements that transfer to novel working memory tasks. This study investigated whether working memory improvements, if replicated, would increase analogical reasoning ability. We assessed participants’ performance on verbal and visual analogy tasks after a complex working memory training program incorporating verbal and spatial tasks [3], [4]. Participants’ improvements on the working memory training tasks transferred to other short-term and working memory tasks, supporting the possibility of broad effects of working memory training. However, we found no effects on analogical reasoning. We propose several possible explanations for the lack of an impact of working memory improvements on analogical reasoning. PMID:25188356

  5. Is the link from working memory to analogy causal? No analogy improvements following working memory training gains.

    Science.gov (United States)

    Richey, J Elizabeth; Phillips, Jeffrey S; Schunn, Christian D; Schneider, Walter

    2014-01-01

    Analogical reasoning has been hypothesized to critically depend upon working memory through correlational data, but less work has tested this relationship through experimental manipulation. An opportunity for examining the connection between working memory and analogical reasoning has emerged from the growing, although somewhat controversial, body of literature suggests complex working memory training can sometimes lead to working memory improvements that transfer to novel working memory tasks. This study investigated whether working memory improvements, if replicated, would increase analogical reasoning ability. We assessed participants' performance on verbal and visual analogy tasks after a complex working memory training program incorporating verbal and spatial tasks. Participants' improvements on the working memory training tasks transferred to other short-term and working memory tasks, supporting the possibility of broad effects of working memory training. However, we found no effects on analogical reasoning. We propose several possible explanations for the lack of an impact of working memory improvements on analogical reasoning.

  6. Techniques for transmitting digital data on the Spacelab's analog video channel

    Science.gov (United States)

    Smith, Dean L.; Hanby, Walter D.

    1993-01-01

    A study was made of various techniques for transmitting digital data over a composite video channel. Transmitting data from experiments on the Space Shuttle Orbiter over a video channel is attractive since extra channel capacity is needed. Broadcast television telecommunications schemes and other techniques described in the literature were reviewed and compared. PSK (Phase Shift Keying), MPSK (m-ary PSK), or PAM (Pulse Amplitude Modulation) can be transmitted on visible lines of a frame, unassigned lines of the VBI (Vertical Blanking Interval), or during the HBI (Horizontal Blanking Interval). All three modulation techniques can be attractive under the proper conditions. However, PAM on visible lines or during the VBI should be relatively easy to implement, provide adequate average data rates, and give acceptable BERs (Bit Error Rates).

  7. Analog and mixed-signal electronics

    CERN Document Server

    Stephan, Karl

    2015-01-01

    A practical guide to analog and mixed-signal electronics, with an emphasis on design problems and applications This book provides an in-depth coverage of essential analog and mixed-signal topics such as power amplifiers, active filters, noise and dynamic range, analog-to-digital and digital-to-analog conversion techniques, phase-locked loops, and switching power supplies. Readers will learn the basics of linear systems, types of nonlinearities and their effects, op-amp circuits, the high-gain analog filter-amplifier, and signal generation. The author uses system design examples to motivate

  8. Color to black-and-white converter

    Science.gov (United States)

    Perry, W. E.

    1977-01-01

    Lanthanum-modified lead zirconate titanate ceramic plate, when sandwiched between pair of conventional light polarizers, forms electrically controlled coverter for television camera. Assembly can be used with camera at remote site to enable camera to transmit color or black and white signal on command.

  9. Methane converted to low emission energy

    International Nuclear Information System (INIS)

    Kelly, Michael; McLennan, Tim

    2006-01-01

    A new project is underway at a major mine site in China to capture and use waste methane gas from coal mines. The three-year joint project will develop and demonstrate an innovative new Australian technology that captures harmful methane gas from coal mine ventilation air and uses it to produce low emission energy. The project will demonstrate that ventilation air from coal mines, which is largely untapped to date, can be safely captured to provide a source of electricity. An additional benefit of using ventilation air methane from coal mines is an increase in mine safety due to the reduced risk of gas explosions. The project is based on ventilation air methane catalytic combustion gas turbine (VAMCAT) technology. The project will fabricate a prototype demonstration unit and demonstrate the technology in a laboratory in Australia. Once tested in the laboratory the operational performance data and experience obtained will be used to design a 1% I methane turbine for demonstration at Huainan Mine, China. This project will develop technology that uses waste coal mine methane currently vented i into the atmosphere to create electricity and by doing so will reduce greenhouse gas emissions and improve mine safety. Development of this prototype will advance Australia's and China's capacity to reduce the potential greenhouse impact of coal through the development and deployment of VAMCAT technology as a practical solution for mitigating and utilising mine methane to generate power. The project will be implemented by the CSIRO with the Australian Government contributing a grant worth $350 000 to this $1.9 million project. Copyright (2006) Reed Business Information

  10. Gas-to-hydraulic power converter

    Science.gov (United States)

    Galloway, C. W. (Inventor)

    1982-01-01

    A gas piston driven hydraulic piston pump is described in which the gas cycle is of high efficiency by injecting the gas in slugs at the beginning of each power stroke. The hydraulic piston is disposed to operate inside the as piston, and the two pistons, both slidably but nonrotatably mounted, are coupled together with a rotating but non-sliding motion transfer ring extending into antifriction grooves in the sidewalls of the two pistons. To make the hydraulic piston move at a constant speed during constant hydraulic horsepower demand and thus exert a constant pressure on the hydraulic fluid, these grooves are machined with variable pitches and one is the opposite of the other, i.e., the gas piston groove increases in pitch during its power stroke while the hydraulic piston groove decreases. Any number of piston assembly sets may be used to obtain desired hydraulic horsepower.

  11. Converting lignin to aromatics: step by step

    NARCIS (Netherlands)

    Strassberger, Z.I.

    2014-01-01

    Lignin, the glue that holds trees together, is the most abundant natural resource of aromatics. In that respect, it is a far more advanced resource than crude oil. This is because lignin already contains the aromatic functional groups. Thus, catalytic conversion of lignin to high-value aromatics is

  12. Mini lathe machine converted to CNC

    Directory of Open Access Journals (Sweden)

    Alexandru Morar

    2012-06-01

    Full Text Available This paper presents the adaptation of a mechanical mini-lathing machine to a computerized numerical control (CNC lathing machine. This machine is composed of a ASIST mini-lathe and a two-degrees-of-freedom XZ stage designed specifically for this application. The whole system is controlled from a PC using adequate CNC control software.

  13. Converting energy to medical progress [nuclear medicine

    International Nuclear Information System (INIS)

    2001-01-01

    For over 50 years the Office of Biological and Environmental Research (BER) of the United States Department of Energy (DOE) has been investing to advance environmental and biomedical knowledge connected to energy. The BER Medical Sciences program fosters research to develop beneficial applications of nuclear technologies for medical diagnosis and treatment of many diseases. Today, nuclear medicine helps millions of patients annually in the United States. Nearly every nuclear medicine scan or test used today was made possible by past BER-funded research on radiotracers, radiation detection devices, gamma cameras, PET and SPECT scanners, and computer science. The heart of biological research within BER has always been the pursuit of improved human health. The nuclear medicine of tomorrow will depend greatly on today's BER-supported research, particularly in the discovery of radiopharmaceuticals that seek specific molecular and genetic targets, the design of advanced scanners needed to create meaningful images with these future radiotracers, and the promise of new radiopharmaceutical treatments for cancers and genetic diseases

  14. Converting energy to medical progress [nuclear medicine

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    2001-04-01

    For over 50 years the Office of Biological and Environmental Research (BER) of the United States Department of Energy (DOE) has been investing to advance environmental and biomedical knowledge connected to energy. The BER Medical Sciences program fosters research to develop beneficial applications of nuclear technologies for medical diagnosis and treatment of many diseases. Today, nuclear medicine helps millions of patients annually in the United States. Nearly every nuclear medicine scan or test used today was made possible by past BER-funded research on radiotracers, radiation detection devices, gamma cameras, PET and SPECT scanners, and computer science. The heart of biological research within BER has always been the pursuit of improved human health. The nuclear medicine of tomorrow will depend greatly on today's BER-supported research, particularly in the discovery of radiopharmaceuticals that seek specific molecular and genetic targets, the design of advanced scanners needed to create meaningful images with these future radiotracers, and the promise of new radiopharmaceutical treatments for cancers and genetic diseases.

  15. Converting Access / Excel Database to Winisis

    OpenAIRE

    Rajasekharan, K.; Nafala, K. M.

    2007-01-01

    The basic objective of this manual is to help the conversion of Access /Excel database into Winisis. All essential steps are provided with screenshots. The web address of the location of the conversion software db3iso is also provided as footnotes.

  16. Converting Energy to Medical Progress [Nuclear Medicine

    Science.gov (United States)

    2001-04-01

    For over 50 years the Office of Biological and Environmental Research (BER) of the United States Department of Energy (DOE) has been investing to advance environmental and biomedical knowledge connected to energy. The BER Medical Sciences program fosters research to develop beneficial applications of nuclear technologies for medical diagnosis and treatment of many diseases. Today, nuclear medicine helps millions of patients annually in the United States. Nearly every nuclear medicine scan or test used today was made possible by past BER-funded research on radiotracers, radiation detection devices, gamma cameras, PET and SPECT scanners, and computer science. The heart of biological research within BER has always been the pursuit of improved human health. The nuclear medicine of tomorrow will depend greatly on today's BER-supported research, particularly in the discovery of radiopharmaceuticals that seek specific molecular and genetic targets, the design of advanced scanners needed to create meaningful images with these future radiotracers, and the promise of new radiopharmaceutical treatments for cancers and genetic diseases.

  17. Software approach to automatic patching of analog computer

    Science.gov (United States)

    1973-01-01

    The Automatic Patching Verification program (APV) is described which provides the hybrid computer programmer with a convenient method of performing a static check of the analog portion of his study. The static check insures that the program is patched as specified, and that the computing components being used are operating correctly. The APV language the programmer uses to specify his conditions and interconnections is similar to the FORTRAN language in syntax. The APV control program reads APV source program statements from an assigned input device. Each source program statement is processed immediately after it is read. A statement may select an analog console, set an analog mode, set a potentiometer or DAC, or read from the analog console and perform a test. Statements are read and processed sequentially. If an error condition is detected, an output occurs on an assigned output device. When an end statement is read, the test is terminated.

  18. Neurosteroids: oligodendrocyte mitochondria convert cholesterol to pregnenolone

    International Nuclear Information System (INIS)

    Hu, Z.Y.; Bourreau, E.; Jung-Testas, I.; Robel, P.; Baulieu, E.E.

    1987-01-01

    Oligodendrocyte mitochondria from 21-day-old Sprague-Dawley male rats were incubated with 100 nM [ 3 H]cholesterol. It yielded [ 3 H]pregnenolone at a rate of 2.5 +/- 0.7 and 5-[ 3 H]pregnene-3β,20α-diol at a rate of 2.5 +/- 1.1 pmol per mg of protein per hr. Cultures of glial cells from 19- to 21-day-old fetuses (a mixed population of astrocytes and oligodendrocytes) were incubated for 24 hr with [ 3 H]mevalonolactone. [ 3 H]Cholesterol, [ 3 H]pregnenolone, and 5-[ 3 H]pregnene-3β,20α-diol were characterized in cellular extracts. The formation of the 3 H-labeled steroids was increased by dibutyryl cAMP (0.2 mM) added to the culture medium. The active cholesterol side-chain cleavage mechanism, recently suggested immunohistochemically and already observed in cultures of C6 glioma cells, reinforces the concept of neurosteroids applied to Δ 5 -3β-hydroxysteroids previously isolated from brain

  19. Digital mineral logging system

    International Nuclear Information System (INIS)

    West, J.B.

    1980-01-01

    A digital mineral logging system acquires data from a mineral logging tool passing through a borehole and transmits the data uphole to an electronic digital signal processor. A predetermined combination of sensors, including a deviometer, is located in a logging tool for the acquisition of the desired data as the logging tool is raised from the borehole. Sensor data in analog format is converted in the logging tool to a digital format and periodically batch transmitted to the surface at a predetermined sampling rate. An identification code is provided for each mineral logging tool, and the code is transmitted to the surface along with the sensor data. The self-identifying tool code is transmitted to the digital signal processor to identify the code against a stored list of the range of numbers assigned to that type of tool. The data is transmitted up the d-c power lines of the tool by a frequency shift key transmission technique. At the surface, a frequency shift key demodulation unit transmits the decoupled data to an asynchronous receiver interfaced to the electronic digital signal processor. During a recording phase, the signals from the logging tool are read by the electronic digital signal processor and stored for later processing. During a calculating phase, the stored data is processed by the digital signal processor and the results are outputted to a printer or plotter, or both

  20. Method for converting uranium oxides to uranium metal

    International Nuclear Information System (INIS)

    Duerksen, W.K.

    1988-01-01

    A method for converting uranium oxide to uranium metal is described comprising the steps of heating uranium oxide in the presence of a reducing agent to a temperature sufficient to reduce the uranium oxide to uranium metal and form a heterogeneous mixture of a uranium metal product and oxide by-products, heating the mixture in a hydrogen atmosphere at a temperature sufficient to convert uranium metal in the mixture to uranium hydride, cooling the resulting uranium hydride-containing mixture to a temperature sufficient to produce a ferromagnetic transition in the uranium hydride, magnetically separating the cooled uranium hydride from the mixture, and thereafter heating the separated uranium hydride in an inert atmosphere to a temperature sufficient to convert the uranium hydride to uranium metal

  1. Advanced Techniques to Improve the Performance of OFDM Wireless LAN

    Science.gov (United States)

    2004-06-01

    recent years and have found applications in a number of di- verse areas including telephone-line based ADSL links, digital audio and video broadcasting...attention in recent years and have found applications in a number of diverse areas including telephone-line based ADSL links, digital audio and...ADC Analog to Digital Converter ADSL Asymmetric Digital Subscriber Line AP Access Point AWGN Additive White Gaussian Noise BER Bit Error

  2. Improved performance of analog and digital acousto-optic modulation with feedback under profiled beam propagation for secure communication using chaos

    Science.gov (United States)

    Almehmadi, Fares S.; Chatterjee, Monish R.

    2014-12-01

    Using intensity feedback, the closed-loop behavior of an acousto-optic hybrid device under profiled beam propagation has been recently shown to exhibit wider chaotic bands potentially leading to an increase in both the dynamic range and sensitivity to key parameters that characterize the encryption. In this work, a detailed examination is carried out vis-à-vis the robustness of the encryption/decryption process relative to parameter mismatch for both analog and pulse code modulation signals, and bit error rate (BER) curves are used to examine the impact of additive white noise. The simulations with profiled input beams are shown to produce a stronger encryption key (i.e., much lower parametric tolerance thresholds) relative to simulations with uniform plane wave input beams. In each case, it is shown that the tolerance for key parameters drops by factors ranging from 10 to 20 times below those for uniform plane wave propagation. Results are shown to be at consistently lower tolerances for secure transmission of analog and digital signals using parameter tolerance measures, as well as BER performance measures for digital signals. These results hold out the promise for considerably greater information transmission security for such a system.

  3. Beginning analog electronics through projects

    CERN Document Server

    Singmin, Andrew

    2001-01-01

    Analog electronics is the simplest way to start a fun, informative, learning program. Beginning Analog Electronics Through Projects, Second Edition was written with the needs of beginning hobbyists and students in mind. This revision of Andrew Singmin's popular Beginning Electronics Through Projects provides practical exercises, building techniques, and ideas for useful electronics projects. Additionally, it features new material on analog and digital electronics, and new projects for troubleshooting test equipment.Published in the tradition of Beginning Electronics Through Projects an

  4. Image processing by use of the digital cross-correlator

    International Nuclear Information System (INIS)

    Katou, Yoshinori

    1982-01-01

    We manufactured for trial an instrument which achieved the image processing using digital correlators. A digital correlator perform 64-bit parallel correlation at 20 MH. The output of a digital correlator is a 7-bit word representing. An A-D converter is used to quantize it a precision of six bits. The resulting 6-bit word is fed to six correlators, wired in parallel. The image processing achieved in 12 bits, whose digital outputs converted an analog signal by a D-A converter. This instrument is named the digital cross-correlator. The method which was used in the image processing system calculated the convolution with the digital correlator. It makes various digital filters. In the experiment with the image processing video signals from TV camera were used. The digital image processing time was approximately 5 μs. The contrast was enhanced and smoothed. The digital cross-correlator has the image processing of 16 sorts, and was produced inexpensively. (author)

  5. Application handbook for a Standardized Control Module (SCM) for DC-DC converters, volume 1

    Science.gov (United States)

    Lee, F. C.; Mahmoud, M. F.; Yu, Y.

    1980-01-01

    The standardized control module (SCM) was developed for application in the buck, boost and buck/boost DC-DC converters. The SCM used multiple feedback loops to provide improved input line and output load regulation, stable feedback control system, good dynamic transient response and adaptive compensation of the control loop for changes in open loop gain and output filter time constraints. The necessary modeling and analysis tools to aid the design engineer in the application of the SCM to DC-DC Converters were developed. The SCM functional block diagram and the different analysis techniques were examined. The average time domain analysis technique was chosen as the basic analytical tool. The power stage transfer functions were developed for the buck, boost and buck/boost converters. The analog signal and digital signal processor transfer functions were developed for the three DC-DC Converter types using the constant on time, constant off time and constant frequency control laws.

  6. A 10-b 50-MS/s 820- μW SAR ADC With On-Chip Digital Calibration.

    Science.gov (United States)

    Yoshioka, Masato; Ishikawa, Kiyoshi; Takayama, Takeshi; Tsukamoto, Sanroku

    2010-12-01

    This 10-b 50-MSamples/s SAR analog-to-digital converter (ADC) features on-chip digital calibration techniques, comparator offset cancellation, a capacitor digital-to-analog converter (CDAC) linearity calibration, and internal clock control to compensate for PVT variations. A split-CDAC reduces the exponential increase in the number of unit capacitors needed and enables the input load capacitance to be as small as the kT/C noise restriction. The prototype fabricated in 65 nm 1P7M complementary metal-oxide semiconductor with MIM capacitor achieves 56.6 dB SNDR at 50-MSamples/s, 25-MHz input frequency and consumes 820 μW from a 1.0-V supply, including the digital calibration circuits. The figure of merit was 29.7 fJ/conversion-step under the Nyquist condition. The ADC occupied an active area of 0.039 mm(2) .

  7. Quartz crystal microbalance based on passive frequency to voltage converter

    International Nuclear Information System (INIS)

    Burda, Ioan; Tunyagi, Arthur

    2012-01-01

    In dynamics of evaporation or drying of microdrops from a solid surface, a faster and precise quartz crystal microbalance (QCM) is needed. The fast QCM based on frequency to voltage converter is an attractive and powerful tool in the investigation of the dynamic regime of evaporation to translate the frequency shift in terms of a continuous voltage change. The frequency shift monitoring in fast QCM applications is a real challenge for electronic processing interface. Originally developed as a frequency shift processing interface, this novel passive frequency to voltage converter can produce faster, stable, and accurate results in regard to the QCM sensor behavior. In this article, the concept and circuit of passive frequency to voltage converter will be explained followed by static and dynamic characterization. Experimental results of microdrops evaporation will be given.

  8. Binary to Octal and Octal to Binary Code Converter Using Mach-Zehnder Interferometer for High Speed Communication

    Science.gov (United States)

    Pal, Amrindra; Kumar, Santosh; Sharma, Sandeep

    2017-05-01

    Binary to octal and octal to binary code converter is a device that allows placing digital information from many inputs to many outputs. Any application of combinational logic circuit can be implemented by using external gates. In this paper, binary to octal and octal to binary code converter is proposed using electro-optic effect inside lithium-niobate based Mach-Zehnder interferometers (MZIs). The MZI structures have powerful capability to switching an optical input signal to a desired output port. The paper constitutes a mathematical description of the proposed device and thereafter simulation using MATLAB. The study is verified using beam propagation method (BPM).

  9. Some researches on converting a C++ software to java

    International Nuclear Information System (INIS)

    Ding Yuzheng; Wang Taijie; Dai Guiliang

    1997-01-01

    Because of Java's flexibility, portability, and relative simplicity, Java programming language has sparked considerable interest among software developers. The author presents the experience on converting a C++ off-line software prototype to Java. Some benefits of Java while converting the C++ prototype to Java and also some limitations of Java are described. Some of these limitations arise from the differences between Java and C++, Others are due to weakness of Java itself. The article also introduces some methods to work around Java's limitations

  10. Method for converting sucrose to .beta.-D-glucose

    Science.gov (United States)

    Simmons, Blake A [San Francisco, CA; Volponi, Joanne V [Livermore, CA; Ingersoll, David [Albuquerque, NM; Walker, Andrew [Woodinville, WA

    2009-07-07

    Disclosed is an apparatus and method for continuously converting sucrose to .beta.-D-glucose. The method comprises a three-stage enzymatic reactor in which an aqueous solution of sucrose is first converted into a solution of fructose and .alpha.-D-glucose by passing it through a porous, packed column containing an inert media on which invertase is immobilized. This solution is then sent through a second packed column containing glucose isomerase and finally a third packed column containing mutarotase. Solution temperature and pH are adjusted to maximize glucose output.

  11. Converter target chemistry - A new challenge to radioanalytical chemistry.

    Science.gov (United States)

    Choudhury, Dibyasree; Lahiri, Susanta

    2018-03-10

    The 1-2 GeV proton induced spallation reaction on the high Z materials like Hg, or lead bismuth eutectic (LBE), popularly known as converter targets, will produce strong flux of fast neutrons which would further react with fissile materials to produce intense radioactive ion beam (RIB). LBE offers suitability for use as converters over Hg but it suffers from the demerit of radiotoxic polonium production. These targets may be viewed as a store house of clinically important and other exotic radionuclides. For application of those radionuclides, radiochemical separation from bulk target material is of utmost importance. Copyright © 2018 Elsevier Ltd. All rights reserved.

  12. Wave to wire power maximisation from a wave energy converter

    OpenAIRE

    O'Sullivan, Adrian C. M.; Lightbody, Gordon

    2015-01-01

    In this paper a back-to-back voltage source converter controlled linear permanent magnet generator (LPMG) is utilised as the power take off (PTO) for a point absorber wave energy converter system (WEC). It is shown that reactive control which seems promising when an ideal PTO is assumed, is actually infeasible with a real PTO as the electrical losses of the LPMG are excessive when the wave frequency is lower than the natural frequency. A Zero Order Hold (ZOH) and First Order Hold (FOH) Model ...

  13. Structural-functional development policies for converted villages to ...

    African Journals Online (AJOL)

    After scoring each item and placing in a SWOT matrix it could be possible to propose special policies and plans for each settlements. The method can be easily applied in rural centers and small cities to help local authorities to make proper developmental decisions. Keywords: Converted villages to city centers, urban ...

  14. Development of fastbus-compatible modules for recording of analog data from multichannel coordinate detectors

    International Nuclear Information System (INIS)

    Weiss, M.; Korolev, V.S.; parfenov, A.N.; Pilyar, A.V.; Hmelewski, E.

    1989-01-01

    The authors describe a system of FASTBUS modules developed at the High-Energy Laboratory of the Joint Institute for Nuclear Research for experiments in high-energy physics and relativistic physics. The system of modules contains a 16-channel 8-bit analog-digital converter (F6581), an eight-channel 8-bit analog-digital converter with memory (F6582), a 16-channel flight-time converter (F6580), a buffer memory with a capacity of 128K bytes (F6583), and a FASTBUS status display (F6584)

  15. The APA Style Converter: a Web-based interface for converting articles to APA style for publication.

    Science.gov (United States)

    Li, Ping; Cunningham, Krystal

    2005-05-01

    The APA Style Converter is a Web-based tool with which authors may prepare their articles in APA style according to the APA Publication Manual (5th ed.). The Converter provides a user-friendly interface that allows authors to copy and paste text and upload figures through the Web, and it automatically converts all texts, references, and figures to a structured article in APA style. The output is saved in PDF or RTF format, ready for either electronic submission or hardcopy printing.

  16. Method and apparatus for performing digital intravenous subtraction angiography

    International Nuclear Information System (INIS)

    Stein, J.A.

    1986-01-01

    This invention relates to digital intravenous subtraction angiography (DISA), and more particularly concerns novel apparatus and techniques for providing high resolution angiograms with equipment that coacts with existing standard medical X-ray equipment. A typical medical X-ray generator provides low mA, continuous X-ray exposures illuminating a standard image intensifier producing an image scanned by a conventional television camera to produce a video signal. An analog-to-digital converter digitizes the signal, and adding means adds the digital frame signals together in real time to provide an intermediate digital signal representing the addition of 5 to 20 frames. Digital storage means store the intermediate image signals. Preferably there are two system memories with means for summing a subsequent intermediate image in the second memory while a previously-formed intermediate image is being transferred to disk storage

  17. SCM Handbooks for dc-to-dc Converters

    Science.gov (United States)

    Lee, F.; Mohmoud, M.; Yu, Y.

    1984-01-01

    Two documents aid in design of control modules for dc-to-dc converters. Features of SCM include: Adaptive stability, power component stress limiting, implementation of various control laws, unified design approach. Analysis and quidelines contained in handbooks enable engineer to design SCM circuit and confidently predict resulting overall performance.

  18. Rectenna that converts infrared radiation to electrical energy

    Energy Technology Data Exchange (ETDEWEB)

    Davids, Paul; Peters, David W.

    2016-09-06

    Technologies pertaining to converting infrared (IR) radiation to DC energy are described herein. In a general embodiment, a rectenna comprises a conductive layer. A thin insulator layer is formed on the conductive layer, and a nanoantenna is formed on the thin insulator layer. The thin insulator layer acts as a tunnel junction of a tunnel diode.

  19. Comparisons between digital gamma-ray spectrometer (DSPec) and standard nuclear instrumentation methods (NIM) systems

    International Nuclear Information System (INIS)

    Vo, D.T.; Russo, P.A.; Sampson, T.E.

    1998-03-01

    Safeguards isotopic measurements require the best spectrometer systems with excellent resolution, stability and throughput. Up until about a year ago, gamma ray spectroscopy has always been done using the analog amplifier, which processes the pulses from the preamplifier to remove the noise, reject the pile up signals, and shape the signals into some desirable form before sending them to the analog to digital converter (ADC) to be digitized. In late 1996, EG and G Ortec introduced a digital gamma ray spectrometer (DSPec) which uses digital technology to analyze the preamplifiers' pulses from all types of germanium and silicon detectors. Considering its performance, digital based spectroscopy may become the way of future gamma ray spectroscopy

  20. Characterization of transimpedance amplifier as optical to electrical converter on designing optical instrumentation

    Science.gov (United States)

    Hanto, D.; Ula, R. K.

    2017-05-01

    Optical to electrical converter is the main components for designing of the optical instrumentations. In addition, this component is also used as signal conditioning. This component usually consists of a photo detector and amplifier. In this paper, characteristics of commercial amplifiers from Thorlabs PDA50B-EC has been observed. The experiment was conducted by diode laser with power of -5 dBm and wavelength 1310 nm; the optical attenuator to vary optical power from 0 to 60 dB, optical to electrical converter from Thorlabs Amplifier PDA50B-EC; multimode optical fiber to guide the laser; and digital voltmeter to measure the output of converter. The results of the characterization indicate that each channel amplification has a non-linear correlation between optical and electrical parameter; optical conversion measurement range of 20-23 dB to full scale; and different measurement coverage area. If this converter will be used as a part component of optical instrumentation so it should be adjusted suitably with the optical power source. Then, because of the correlation equation is not linear so calculation to determine the interpretation also should be considered in addition to the transfer function of the optical sensor.

  1. Digital Tourism on the Way to Digital Marketing Success

    OpenAIRE

    RATIU, Monica Paula; PURCAREA, Ioan Matei

    2015-01-01

    There is a real need of digital support of the tourist experience before, during and after the tourist activity, because digitization is steadily becoming the main pathway for consumer journeys. The digital revolution changed the way consumers shop for travel products and interact with brands. Tourism businesses need to utilize digital marketing techniques in their practices and to right track consumer activity across channels and devices. Getting vital information from customers via social m...

  2. Using analogs to generate production forecasts in Faja

    Energy Technology Data Exchange (ETDEWEB)

    Garcia Lugo, Rolando A. [Repsol (Canada)

    2011-07-01

    In the Carabobol Block, extra heavy oil will be produced by cold production from Miocene Morical Member sands. Many parameters such as pressure, temperature, solution gas oil ratio and viscosity variation significantly impact well productivity; unfortunately little information is available on the Carabobol Block. The aim of this paper is to provide a new methodology for using analog data to develop fluid properties correlations and a future production profile. Data from the analog neighbour field in the Orinoco oil belt was used. A methodology using scatter data was successfully applied for the Carabobol Block and fluid composition, a complete PVT and an analytical forecast were found and confirmed with actual laboratory data and a gross numerical model. This study showed that analog data can be used as a first approach to assess initial reservoir conditions and fluid properties and to generate production forecasts.

  3. Teamwork in high-risk environments analogous to space

    Science.gov (United States)

    Kanki, Barbara G.

    1990-01-01

    Mountaineering expeditions combine a number of factors which make them potentially good analogs to the planetary exploration facet of long-duration space missions. A study of mountain climbing teams was conducted in order to evaluate the usefulness of the environment as a space analog and to specifically identify the factors and issues surrounding teamwork and 'successful' team performance in two mountaineering environments. This paper focuses on social/organizational factors, including team size and structure, leadership styles and authority structure which were found in the sample of 22 climb teams (122 individuals). The second major issue discussed is the construction of a valid performance measure in this high-risk environment.

  4. Application of Digital Radiography to Weld Inspection for the Space Shuttle External Fuel Tank

    Science.gov (United States)

    Ussery, Warren

    2009-01-01

    This slide presentation reviews NASA's use of digital radiography to inspect the welds of the external tanks used to hold the cryogenic fuels for the Space Shuttle Main Engines. NASA has had a goal of replacing a significant portion of film used to inspect the welds, with digital radiography. The presentation reviews the objectives for converting to a digital system from film, the characteristics of the digital system, the Probability of detection study, the qualification and implementation of the system.

  5. From Cards To Digital Games

    DEFF Research Database (Denmark)

    Valente, Andrea; Marchetti, Emanuela

    2017-01-01

    This study is based on an iterative, participatory design investigation that we are conducting in order to create digital games that could be flexibly re-designed by players, without requiring programming knowledge. In particular we focus on digital game development, both design and implementation......, for primary school pupils and their teachers. We propose a scenario where digital game development is mediated by tinkering with paper prototypes similar to board games. We address the problems of making sense and expressing rules of a digital game without programming. Analysis of our latest participatory...... workshop offers evidence that a board game can work as a tangible model of the computation happening in a digital game. Children understand the practice of designing games mainly as manipulation of features and behaviors of the visual elements of a game. We attempt at looking beyond visual programming...

  6. Do Convertible Bond Issuers Cater to Investor Demand?

    NARCIS (Netherlands)

    de Jong, Abe; Duca, Eric; Dutordoir, Marie

    2013-01-01

    We examine the impact of fluctuations in investor demand for convertible securities on convertible bond issue volumes, pricing, and design. We find evidence of a positive impact of investor demand proxies on convertible bond issue volumes. We also document significantly lower convertible bond

  7. A digital receiver with fast frequency- and gain-switching capabilities for MRI systems.

    Science.gov (United States)

    Ruipeng, Ning; Yidong, Dai; Guang, Yang; Gengying, Li

    2009-12-01

    In this article, two issues pertaining to MRI digital receivers are addressed. One is the maintenance of phase coherence between the transmitter and the receiver-an effective solution is proposed, in which the receiver frequency is switched synchronously with the transmitter frequency. The other is the dynamic range of the receiver-gain-switching technique is utilized to improve the dynamic range. To meet the hardware requirements of these solutions, a digital receiver with fast frequency- and gain-switching capabilities was implemented. The primary components of the proposed digital receiver are a variable gain amplifier, a high-speed analog-to-digital converter and a single-chip digital receiver core. The radio-frequency magnetic resonance signal is directly sampled by the analog-to-digital converter and processed in the digital receiver core. By pre-storing the receiver waveform in the on-board SDRAM, the frequency and gain of the receiver may be switched very quickly. The performance of the proposed digital receiver is verified by embedding it in an imaging spectrometer. It is then demonstrated by conducting experiments on a home-built 0.3-T magnetic resonance imaging system. The results show that the phase coherence between the transmitter and the receiver and the dynamic range of the receiver are greatly improved. Consequently, the proposed digital receiver may be useful for obtaining multiple-slice two-dimensional magnetic resonance images with very high resolution.

  8. Large Signal Model of a Four-quadrant AC to DC Converter for Accelerator Magnets

    CERN Document Server

    De la Calle, R; Rinaldi, L; Völker, F V

    2001-01-01

    This paper presents the large signal model of a four-quadrant AC to DC converter, which is expected to be used in the area of particle accelerators. The system’s first stage is composed of a three-phase boost PWM (Pulse Width Modulated) rectifier with DSP (Digital Signal Processing) based power factor correction (PFC) and output voltage regulation. The second stage is a full-bridge PWM inverter that allows fast four-quadrant operation. The structure is fully reversible, and an additional resistance (brake chopper) is not needed to dissipate the energy when the beam deflection magnet acts as generator.

  9. DESDynI Quad First Stage Processor - A Four Channel Digitizer and Digital Beam Forming Processor

    Science.gov (United States)

    Chuang, Chung-Lun; Shaffer, Scott; Smythe, Robert; Niamsuwan, Noppasin; Li, Samuel; Liao, Eric; Lim, Chester; Morfopolous, Arin; Veilleux, Louise

    2013-01-01

    The proposed Deformation, Eco-Systems, and Dynamics of Ice Radar (DESDynI-R) L-band SAR instrument employs multiple digital channels to optimize resolution while keeping a large swath on a single pass. High-speed digitization with very fine synchronization and digital beam forming are necessary in order to facilitate this new technique. The Quad First Stage Processor (qFSP) was developed to achieve both the processing performance as well as the digitizing fidelity in order to accomplish this sweeping SAR technique. The qFSP utilizes high precision and high-speed analog to digital converters (ADCs), each with a finely adjustable clock distribution network to digitize the channels at the fidelity necessary to allow for digital beam forming. The Xilinx produced FX130T Virtex 5 part handles the processing to digitally calibrate each channel as well as filter and beam form the receive signals. Demonstrating the digital processing required for digital beam forming and digital calibration is instrumental to the viability of the proposed DESDynI instrument. The qFSP development brings this implementation to Technology Readiness Level (TRL) 6. This paper will detail the design and development of the prototype qFSP as well as the preliminary results from hardware tests.

  10. The pooltable analogy to axion physics

    International Nuclear Information System (INIS)

    Sikivie, P.

    1996-01-01

    An imaginary character named TSP finds himself in a playroom whose floor is tilted to one side. However, the pooltable in the playroom is horizontal. TSP wonders how this can be. In doing so, he embarks upon an intellectual journey which parallels that which has been travelled during the past two decades by physicists interested in the Strong CP Problem and axion physics

  11. The pooltable analogy to axion physics

    Energy Technology Data Exchange (ETDEWEB)

    Sikivie, P.

    1996-01-01

    An imaginary character named TSP finds himself in a playroom whose floor is tilted to one side. However, the pooltable in the playroom is horizontal. TSP wonders how this can be. In doing so, he embarks upon an intellectual journey which parallels that which has been travelled during the past two decades by physicists interested in the Strong CP Problem and axion physics.

  12. Analogies Between Digital Radio and Chemical Orthogonality as a Method for Enhanced Analysis of Molecular Recognition Events

    Directory of Open Access Journals (Sweden)

    Sang-Hun Lee

    2008-02-01

    Full Text Available Acoustic wave biosensors are a real-time, label-free biosensor technology, which have been exploited for the detection of proteins and cells. One of the conventional biosensor approaches involves the immobilization of a monolayer of antibodies onto the surface of the acoustic wave device for the detection of a specific analyte. The method described within includes at least two immobilizations of two different antibodies onto the surfaces of two separate acoustic wave devices for the detection of several analogous analytes. The chemical specificity of the molecular recognition event is achieved by virtue of the extremely high (nM to pM binding affinity between the antibody and its antigen. In a standard ELISA (Enzyme-Linked ImmunoSorbent Assay test, there are multiple steps and the end result is a measure of what is bound so tightly that it does not wash away easily. The fact that this “gold standard” is very much not real time, masks the dance that is the molecular recognition event. X-Ray Crystallographer, Ian Wilson, demonstrated more than a decade ago that antibodies undergo conformational change during a binding event[1, 2]. Further, it is known in the arena of immunochemistry that some antibodies exhibit significant cross-reactivity and this is widely termed antibody promiscuity. A third piece of the puzzle that we will exploit in our system of acoustic wave biosensors is the notion of chemical orthogonality. These three biochemical constructs, the dance, antibody promiscuity and chemical orthogonality will be combined in this paper with the notions of Int. J. Mol. Sci. 2008, 9 155 in-phase (I and quadrature (Q signals from digital radio to manifest an approach to molecular recognition that allows a level of discrimination and analysis unobtainable without the aggregate. As an example we present experimental data on the detection of TNT, RDX, C4, ammonium nitrate and musk oil from a system of antibody-coated acoustic

  13. An electrical analogy to Mie scattering.

    Science.gov (United States)

    Caridad, José M; Connaughton, Stephen; Ott, Christian; Weber, Heiko B; Krstić, Vojislav

    2016-09-27

    Mie scattering is an optical phenomenon that appears when electromagnetic waves, in particular light, are elastically scattered at a spherical or cylindrical object. A transfer of this phenomenon onto electron states in ballistic graphene has been proposed theoretically, assuming a well-defined incident wave scattered by a perfectly cylindrical nanometer scaled potential, but experimental fingerprints are lacking. We present an experimental demonstration of an electrical analogue to Mie scattering by using graphene as a conductor, and circular potentials arranged in a square two-dimensional array. The tabletop experiment is carried out under seemingly unfavourable conditions of diffusive transport at room-temperature. Nonetheless, when a canted arrangement of the array with respect to the incident current is chosen, cascaded Mie scattering results robustly in a transverse voltage. Its response on electrostatic gating and variation of potentials convincingly underscores Mie scattering as underlying mechanism. The findings presented here encourage the design of functional electronic metamaterials.

  14. Catalysts and methods for converting carbonaceous materials to fuels

    Energy Technology Data Exchange (ETDEWEB)

    Hensley, Jesse; Ruddy, Daniel A.; Schaidle, Joshua A.; Behl, Mayank

    2017-10-24

    This disclosure relates to catalysts and processes designed to convert DME and/or methanol and hydrogen (H.sub.2) to desirable liquid fuels. These catalysts produce the fuels efficiently and with a high selectivity and yield, and reduce the formation of aromatic hydrocarbons by incorporating H.sub.2 into the products. This disclosure also describes process methods to further upgrade these fuels to higher molecular weight liquid fuel mixtures, which have physical properties comparable with current commercially used liquid fuels.

  15. Digital Earth Portals to DLESE

    Science.gov (United States)

    Raskin, R.

    2001-05-01

    Digital Earth offers the promise to push the envelope of accessibility and usability of georeferenced digital data and reach out to non-traditional users. To realize this promise within the context of an educational digital library, the library can take advantage of existing Digital Earth components: viewers, catalogs, and data products - all of which conform to emerging open standards. Viewers vary in level of sophistication from standard web browsers to immersive or 3-D visualization tools. Datasets are currently the limiting ingredient in the mix, as providers must make data available using the open standards. However, the Earth Science Information Partnership (ESIP) Federation has developed a Digital Earth Cluster to insure that its members provide a source of compliant data products within a short time frame. A Digital Earth portal integrates all of the above components and provides the look and feel appropriate to the target educational level and classroom interests. DLESE is currently developing such an early prototype using existing components that can be used as a model for future development. A live demonstration will show the use of a Digital Earth viewer adapted for use with DLESE.

  16. Catalysts and methods for converting carbonaceous materials to fuels

    Science.gov (United States)

    Hensley, Jesse; Ruddy, Daniel A.; Schaidle, Joshua A.; Behl, Mayank

    2017-07-25

    Catalysts and processes designed to convert DME and/or methanol and hydrogen (H.sub.2) to desirable liquid fuels are described. These catalysts produce the fuels efficiently and with a high selectivity and yield, and reduce the formation of aromatic hydrocarbons by incorporating H.sub.2 into the products. Also described are process methods to further upgrade these fuels to higher molecular weight liquid fuel mixtures, which have physical properties comparable with current commercially used liquid fuels.

  17. Catalysts and methods for converting carbonaceous materials to fuels

    Energy Technology Data Exchange (ETDEWEB)

    Hensley, Jesse; Ruddy, Daniel A.; Schaidle, Joshua A.; Behl, Mayank

    2017-10-31

    Catalysts and processes designed to convert DME and/or methanol and hydrogen (H.sub.2) to desirable liquid fuels are described. These catalysts produce the fuels efficiently and with a high selectivity and yield, and reduce the formation of aromatic hydrocarbons by incorporating H.sub.2 into the products. Also described are process methods to further upgrade these fuels to higher molecular weight liquid fuel mixtures, which have physical properties comparable with current commercially used liquid fuels.

  18. Proposal for recording bonds convertible to raw materials

    Directory of Open Access Journals (Sweden)

    Ranosz Robert

    2016-01-01

    Full Text Available this article is devoted to a proposal for recording bonds convertible to raw materials. In view of the fact that the proposed method of recording is a conceptual model, the author of the publication intends to draw further considerations in that direction. The article consists of four parts. The introduction hereto outlines the objectives of this study. The second part of the publication presents the methodology, on the basis of which (according to the author it shall be possible to record the bonds convertible to raw materials. The third part of the article presents a hypothetical issue of the said debt instrument with an option on the part of the issuer. The last part of the work presents the conclusions of the study. The article ends with a bibliography, based on which this article has been written.

  19. Current integrator using the voltage to frequency converter

    International Nuclear Information System (INIS)

    Ukai, K.; Gomi, K.

    1975-01-01

    A current integrator using the Voltage to Frequency Converter has been constructed to measure the beam intensity of the 1.3 GeV Electron Synchrotron at the INS. This integrator ranges the current 10 -7 to 10 -11 amperes and has been calibrated by the extracted electron beam and constant current sources. The accuracy of this integrator agrees with the previous integrator within 1%. (auth.)

  20. Community Decadal Panel for Terrestrial Analogs to Mars

    Science.gov (United States)

    Barlow, N. G.; Farr, T.; Baker, V. R.; Bridges, N.; Carsey, F.; Duxbury, N.; Gilmore, M. S.; Green, J. R.; Grin, E.; Hansen, V.; Keszthelyi, L.; Lanagan, P.; Lentz, R.; Marinangeli, L.; Morris, P. A.; Ori, G. G.; Paillou, P.; Robinson, C.; Thomson, B.

    2001-11-01

    It is well recognized that interpretations of Mars must begin with the Earth as a reference. The most successful comparisons have focused on understanding geologic processes on the Earth well enough to extrapolate to Mars' environment. Several facets of terrestrial analog studies have been pursued and are continuing. These studies include field workshops, characterization of terrestrial analog sites for Mars, instrument tests, laboratory measurements (including analysis of martian meteorites), and computer and laboratory modeling. The combination of all these activities allows scientists to constrain the processes operating in specific terrestrial environments and extrapolate how similar processes could affect Mars. The Terrestrial Analogs for Mars Community Panel is considering the following two key questions: (1) How do terrestrial analog studies tie in to the MEPAG science questions about life, past climate, and geologic evolution of Mars, and (2) How can future instrumentation be used to address these questions. The panel is considering the issues of data collection, value of field workshops, data archiving, laboratory measurements and modeling, human exploration issues, association with other areas of solar system exploration, and education and public outreach activities.