WorldWideScience

Sample records for advanced stack hardware

  1. Hardware Evaluation of the Horizontal Exercise Fixture with Weight Stack

    Science.gov (United States)

    Newby, Nate; Leach, Mark; Fincke, Renita; Sharp, Carwyn

    2009-01-01

    HEF with weight stack seems to be a very sturdy and reliable exercise device that should function well in a bed rest training setting. A few improvements should be made to both the hardware and software to improve usage efficiency, but largely, this evaluation has demonstrated HEF's robustness. The hardware offers loading to muscles, bones, and joints, potentially sufficient to mitigate the loss of muscle mass and bone mineral density during long-duration bed rest campaigns. With some minor modifications, the HEF with weight stack equipment provides the best currently available means of performing squat, heel raise, prone row, bench press, and hip flexion/extension exercise in a supine orientation.

  2. Advanced hardware design for error correcting codes

    CERN Document Server

    Coussy, Philippe

    2015-01-01

    This book provides thorough coverage of error correcting techniques. It includes essential basic concepts and the latest advances on key topics in design, implementation, and optimization of hardware/software systems for error correction. The book’s chapters are written by internationally recognized experts in this field. Topics include evolution of error correction techniques, industrial user needs, architectures, and design approaches for the most advanced error correcting codes (Polar Codes, Non-Binary LDPC, Product Codes, etc). This book provides access to recent results, and is suitable for graduate students and researchers of mathematics, computer science, and engineering. • Examines how to optimize the architecture of hardware design for error correcting codes; • Presents error correction codes from theory to optimized architecture for the current and the next generation standards; • Provides coverage of industrial user needs advanced error correcting techniques.

  3. MRI - From basic knowledge to advanced strategies: Hardware

    International Nuclear Information System (INIS)

    Carpenter, T.A.; Williams, E.J.

    1999-01-01

    There have been remarkable advances in the hardware used for nuclear magnetic resonance imaging scanners. These advances have enabled an extraordinary range of sophisticated magnetic resonance MR sequences to be performed routinely. This paper focuses on the following particular aspects: (a) Magnet system. Advances in magnet technology have allowed superconducting magnets which are low maintenance and have excellent homogeneity and very small stray field footprints. (b) Gradient system. Optimisation of gradient design has allowed gradient coils which provide excellent field for spatial encoding, have reduced diameter and have technology to minimise the effects of eddy currents. These coils can now routinely provide the strength and switching rate required by modern imaging methods. (c) Radio-frequency (RF) system. The advances in digital electronics can now provide RF electronics which have low noise characteristics, high accuracy and improved stability, which are all essential to the formation of excellent images. The use of surface coils has increased with the availability of phased-array systems, which are ideal for spinal work. (d) Computer system. The largest advance in technology has been in the supporting computer hardware which is now affordable, reliable and with performance to match the processing requirements demanded by present imaging sequences. (orig.)

  4. ORELA data acquisition system hardware. Vol. 6. Eight-stage stacking buffer memory (Q-5066)

    International Nuclear Information System (INIS)

    Wintenberg, R.E.; Reynolds, J.W.

    1977-01-01

    A Stacking Buffer Memory for de-randomizing data on high data rate experiments at ORELA is documented by a description of operation, mechanical details of design, and a detailed theory of operation illustrated through six examples of operation

  5. Advances in neuromorphic hardware exploiting emerging nanoscale devices

    CERN Document Server

    2017-01-01

    This book covers all major aspects of cutting-edge research in the field of neuromorphic hardware engineering involving emerging nanoscale devices. Special emphasis is given to leading works in hybrid low-power CMOS-Nanodevice design. The book offers readers a bidirectional (top-down and bottom-up) perspective on designing efficient bio-inspired hardware. At the nanodevice level, it focuses on various flavors of emerging resistive memory (RRAM) technology. At the algorithm level, it addresses optimized implementations of supervised and stochastic learning paradigms such as: spike-time-dependent plasticity (STDP), long-term potentiation (LTP), long-term depression (LTD), extreme learning machines (ELM) and early adoptions of restricted Boltzmann machines (RBM) to name a few. The contributions discuss system-level power/energy/parasitic trade-offs, and complex real-world applications. The book is suited for both advanced researchers and students interested in the field.

  6. Advances in flexible optrode hardware for use in cybernetic insects

    Science.gov (United States)

    Register, Joseph; Callahan, Dennis M.; Segura, Carlos; LeBlanc, John; Lissandrello, Charles; Kumar, Parshant; Salthouse, Christopher; Wheeler, Jesse

    2017-08-01

    Optogenetic manipulation is widely used to selectively excite and silence neurons in laboratory experiments. Recent efforts to miniaturize the components of optogenetic systems have enabled experiments on freely moving animals, but further miniaturization is required for freely flying insects. In particular, miniaturization of high channel-count optical waveguides are needed for high-resolution interfaces. Thin flexible waveguide arrays are needed to bend light around tight turns to access small anatomical targets. We present the design of lightweight miniaturized optogentic hardware and supporting electronics for the untethered steering of dragonfly flight. The system is designed to enable autonomous flight and includes processing, guidance sensors, solar power, and light stimulators. The system will weigh less than 200mg and be worn by the dragonfly as a backpack. The flexible implant has been designed to provide stimuli around nerves through micron scale apertures of adjacent neural tissue without the use of heavy hardware. We address the challenges of lightweight optogenetics and the development of high contrast polymer waveguides for this purpose.

  7. Development of advanced driver assistance systems with vehicle hardware-in-the-loop simulations

    NARCIS (Netherlands)

    Gietelink, O.J.; Ploeg, J.; Schutter, B.de; Verhaegen, M.

    2006-01-01

    This paper presents a new method for the design and validation of advanced driver assistance systems (ADASs). With vehicle hardware-in-the-loop (VEHIL) simulations, the development process, and more specifically the validation phase, of intelligent vehicles is carried out safer, cheaper, and is more

  8. Test Hardware Design for Flight-Like Operation of Advanced Stirling Convertors

    Science.gov (United States)

    Oriti, Salvatore M.

    2012-01-01

    NASA Glenn Research Center (GRC) has been supporting development of the Advanced Stirling Radioisotope Generator (ASRG) since 2006. A key element of the ASRG project is providing life, reliability, and performance testing of the Advanced Stirling Convertor (ASC). For this purpose, the Thermal Energy Conversion branch at GRC has been conducting extended operation of a multitude of free-piston Stirling convertors. The goal of this effort is to generate long-term performance data (tens of thousands of hours) simultaneously on multiple units to build a life and reliability database. The test hardware for operation of these convertors was designed to permit in-air investigative testing, such as performance mapping over a range of environmental conditions. With this, there was no requirement to accurately emulate the flight hardware. For the upcoming ASC-E3 units, the decision has been made to assemble the convertors into a flight-like configuration. This means the convertors will be arranged in the dual-opposed configuration in a housing that represents the fit, form, and thermal function of the ASRG. The goal of this effort is to enable system level tests that could not be performed with the traditional test hardware at GRC. This offers the opportunity to perform these system-level tests much earlier in the ASRG flight development, as they would normally not be performed until fabrication of the qualification unit. This paper discusses the requirements, process, and results of this flight-like hardware design activity.

  9. Test Hardware Design for Flightlike Operation of Advanced Stirling Convertors (ASC-E3)

    Science.gov (United States)

    Oriti, Salvatore M.

    2012-01-01

    NASA Glenn Research Center (GRC) has been supporting development of the Advanced Stirling Radioisotope Generator (ASRG) since 2006. A key element of the ASRG project is providing life, reliability, and performance testing of the Advanced Stirling Convertor (ASC). For this purpose, the Thermal Energy Conversion branch at GRC has been conducting extended operation of a multitude of free-piston Stirling convertors. The goal of this effort is to generate long-term performance data (tens of thousands of hours) simultaneously on multiple units to build a life and reliability database. The test hardware for operation of these convertors was designed to permit in-air investigative testing, such as performance mapping over a range of environmental conditions. With this, there was no requirement to accurately emulate the flight hardware. For the upcoming ASC-E3 units, the decision has been made to assemble the convertors into a flight-like configuration. This means the convertors will be arranged in the dual-opposed configuration in a housing that represents the fit, form, and thermal function of the ASRG. The goal of this effort is to enable system level tests that could not be performed with the traditional test hardware at GRC. This offers the opportunity to perform these system-level tests much earlier in the ASRG flight development, as they would normally not be performed until fabrication of the qualification unit. This paper discusses the requirements, process, and results of this flight-like hardware design activity.

  10. Fiber optic gyro inertial measurement unit for fly-by-light advanced systems hardware

    Science.gov (United States)

    Scholten, Kevin C.

    1994-11-01

    Smiths Industries (SI) is preparing a Fiber Optic Gyroscope (FOG) Inertial Measurement Unit (IMU) for incorporation into the Advanced Research Projects Agency Technology Reinvestment Project Fly-by-Light Advanced Systems Hardware (FLASH) laboratory demonstration. The IMU provides inertial data to the flight control system through the FLASH optical data bus and consists of three FOGs, three quasi-solid state accelerometers, sensor control electronics, a digital signal processor, and the optical data bus interface. Reliable, low cost solid state sensors are used to satisfy the performance requirements of the system. Specifically, the FOGs use state-of-the-art optical technology to measure aircraft rotations. FOGs have no moving parts and are therefore more reliable and durable than spinning wheel gyroscopes. Many FOG designs are based on a multitude of individual optical components and sensing coils fabricated from expensive polarization preserving fiber. Smiths Industries has developed a FOG design which uses low cost, commercially available single mode fiber in the rate sensing coils and makes maximum use of integrated optics to reduce cost and complexity. This sensor has demonstrated excellent tactical grade performance in a wide range of strenuous test environments. The SI FOG IMU is an important contributor to the performance, reliability, cost, and capability advantages of the FLASH system.

  11. Investigation of Ruthenium Dissolution in Advanced Membrane Electrode Assemblies for Direct Methanol Based Fuel Cells Stacks

    Science.gov (United States)

    Valdez, T. I.; Firdosy, S.; Koel, B. E.; Narayanan, S. R.

    2005-01-01

    This viewgraph presentation gives a detailed review of the Direct Methanol Based Fuel Cell (DMFC) stack and investigates the Ruthenium that was found at the exit of the stack. The topics include: 1) Motivation; 2) Pathways for Cell Degradation; 3) Cell Duration Testing; 4) Duration Testing, MEA Analysis; and 5) Stack Degradation Analysis.

  12. System-Level Testing of the Advanced Stirling Radioisotope Generator Engineering Hardware

    Science.gov (United States)

    Chan, Jack; Wiser, Jack; Brown, Greg; Florin, Dominic; Oriti, Salvatore M.

    2014-01-01

    To support future NASA deep space missions, a radioisotope power system utilizing Stirling power conversion technology was under development. This development effort was performed under the joint sponsorship of the Department of Energy and NASA, until its termination at the end of 2013 due to budget constraints. The higher conversion efficiency of the Stirling cycle compared with that of the Radioisotope Thermoelectric Generators (RTGs) used in previous missions (Viking, Pioneer, Voyager, Galileo, Ulysses, Cassini, Pluto New Horizons and Mars Science Laboratory) offers the advantage of a four-fold reduction in Pu-238 fuel, thereby extending its limited domestic supply. As part of closeout activities, system-level testing of flight-like Advanced Stirling Convertors (ASCs) with a flight-like ASC Controller Unit (ACU) was performed in February 2014. This hardware is the most representative of the flight design tested to date. The test fully demonstrates the following ACU and system functionality: system startup; ASC control and operation at nominal and worst-case operating conditions; power rectification; DC output power management throughout nominal and out-of-range host voltage levels; ACU fault management, and system command / telemetry via MIL-STD 1553 bus. This testing shows the viability of such a system for future deep space missions and bolsters confidence in the maturity of the flight design.

  13. Computer Hardware, Advanced Mathematics and Model Physics pilot project final report

    International Nuclear Information System (INIS)

    1992-05-01

    The Computer Hardware, Advanced Mathematics and Model Physics (CHAMMP) Program was launched in January, 1990. A principal objective of the program has been to utilize the emerging capabilities of massively parallel scientific computers in the challenge of regional scale predictions of decade-to-century climate change. CHAMMP has already demonstrated the feasibility of achieving a 10,000 fold increase in computational throughput for climate modeling in this decade. What we have also recognized, however, is the need for new algorithms and computer software to capitalize on the radically new computing architectures. This report describes the pilot CHAMMP projects at the DOE National Laboratories and the National Center for Atmospheric Research (NCAR). The pilot projects were selected to identify the principal challenges to CHAMMP and to entrain new scientific computing expertise. The success of some of these projects has aided in the definition of the CHAMMP scientific plan. Many of the papers in this report have been or will be submitted for publication in the open literature. Readers are urged to consult with the authors directly for questions or comments about their papers

  14. Reconfiguration of NASA GRC's Vacuum Facility 6 for Testing of Advanced Electric Propulsion System (AEPS) Hardware

    Science.gov (United States)

    Peterson, Peter Y.; Kamhawi, Hani; Huang, Wensheng; Yim, John T.; Haag, Thomas W.; Mackey, Jonathan A.; McVetta, Michael S.; Sorrelle, Luke T.; Tomsik, Thomas M.; Gilligan, Ryan P.; hide

    2018-01-01

    The NASA Hall Effect Rocket with Magnetic Shielding (HERMeS) 12.5 kW Hall thruster has been the subject of extensive technology maturation in preparation for development into a flight propulsion system. The HERMeS thruster is being developed and tested at NASA GRC and NASA JPL through support of the Space Technology Mission Directorate (STMD) and is intended to be used as the electric propulsion system on the Power and Propulsion Element (PPE) of the recently announced Deep Space Gateway (DSG). The Advanced Electric Propulsion System (AEPS) contract was awarded to Aerojet-Rocketdyne to develop the HERMeS system into a flight system for use by NASA. To address the hardware test needs of the AEPS project, NASA GRC launched an effort to reconfigure Vacuum Facility 6 (VF-6) for high-power electric propulsion testing including upgrades and reconfigurations necessary to conduct performance, plasma plume, and system level integration testing. Results of the verification and validation testing with HERMeS Technology Demonstration Unit (TDU)-1 and TDU-3 Hall thrusters are also included.

  15. Advanced Research and Education in Electrical Drives by Using Digital Real-Time Hardware-in-the-Loop Simulation

    DEFF Research Database (Denmark)

    Bojoi, R.; Profumo, F.; Griva, G.

    2002-01-01

    The authors present in this paper a digital real-time hardware-in-the-loop simulation of a three-phase induction motor drive. The main real-time simulation tool is the dSPACE DS1103 PPC Controller Board which simulates the power and signal conditioning parts. The control algorithm of the virtual...... drive has been implemented on the Evaluation Board of TMS320F240 DSP. The experimental results validate this solution as a powerful tool to be used in research and advanced education. Thus, the students can put in practic the theory without spending too much time with details concerning the hardware...

  16. Testing and Evaluation of an Advanced High Performance Planar SOFC Stack

    National Research Council Canada - National Science Library

    Elangovan, S

    1999-01-01

    .... SOFCo has conducted several programs which synergistically address this objective: an internally funded program focusing on stack development and system integration for pipeline natural gas (PNG...

  17. Validating gravitational-wave detections: The Advanced LIGO hardware injection system

    Science.gov (United States)

    Biwer, C.; Barker, D.; Batch, J. C.; Betzwieser, J.; Fisher, R. P.; Goetz, E.; Kandhasamy, S.; Karki, S.; Kissel, J. S.; Lundgren, A. P.; Macleod, D. M.; Mullavey, A.; Riles, K.; Rollins, J. G.; Thorne, K. A.; Thrane, E.; Abbott, T. D.; Allen, B.; Brown, D. A.; Charlton, P.; Crowder, S. G.; Fritschel, P.; Kanner, J. B.; Landry, M.; Lazzaro, C.; Millhouse, M.; Pitkin, M.; Savage, R. L.; Shawhan, P.; Shoemaker, D. H.; Smith, J. R.; Sun, L.; Veitch, J.; Vitale, S.; Weinstein, A. J.; Cornish, N.; Essick, R. C.; Fays, M.; Katsavounidis, E.; Lange, J.; Littenberg, T. B.; Lynch, R.; Meyers, P. M.; Pannarale, F.; Prix, R.; O'Shaughnessy, R.; Sigg, D.

    2017-03-01

    Hardware injections are simulated gravitational-wave signals added to the Laser Interferometer Gravitational-wave Observatory (LIGO). The detectors' test masses are physically displaced by an actuator in order to simulate the effects of a gravitational wave. The simulated signal initiates a control-system response which mimics that of a true gravitational wave. This provides an end-to-end test of LIGO's ability to observe gravitational waves. The gravitational-wave analyses used to detect and characterize signals are exercised with hardware injections. By looking for discrepancies between the injected and recovered signals, we are able to characterize the performance of analyses and the coupling of instrumental subsystems to the detectors' output channels. This paper describes the hardware injection system and the recovery of injected signals representing binary black hole mergers, a stochastic gravitational wave background, spinning neutron stars, and sine-Gaussians.

  18. Survey of hardware supported by the Control System at the Advanced Photon Source

    International Nuclear Information System (INIS)

    Coulter, K.J.; Nawrocki, G.J.

    1993-01-01

    The Experimental Physics and Industrial control System (EPICS) has been under development at Los Alamos and Argonne National Laboratories for over six years. A wide variety of instrumentation is now supported. This presentation will give an overview of the types of hardware and subsystems which are currently supported and will discuss future plans for addressing additional hardware requirements at the APS. Supported systems to be discussed include: motion control, vacuum pump control and system monitoring, standard laboratory instrumentation (ADCs, DVMs, pulse generators, etc.), image processing, discrete binary and analog I/O, and standard temperature, pressure and flow monitoring

  19. Investigation of Ruthenium Dissolution in Advanced Membrane Electrode Assemblies for Direct Methanol Based Fuel Cell Stacks

    Science.gov (United States)

    Valdez, Thomas I.; Firdosy, S.; Koel, B. E.; Narayanan, S. R.

    2005-01-01

    Dissolution of ruthenium was observed in the 80-cell stack. Duration testing was performed in single cell MEAs to determine the pathway of cell degradation. EDAX analysis on each of the single cell MEAs has shown that the Johnson Matthey commercial catalyst is stable in DMFC operation for 250 hours, no ruthenium dissolution was observed. Changes in the hydrophobicity of the cathode backing papers was minimum. Electrode polarization analysis revealed that the MEA performance loss is attributed to changes in the cathode catalyst layer. Ruthenium migration does not seem to occur during cell operation but can occur when methanol is absent from the anode compartment, the cathode compartment has access to air, and the cells in the stack are electrically connected to a load (Shunt Currents). The open-to-air cathode stack design allowed for: a) The MEAs to have continual access to oxygen; and b) The stack to sustain shunt currents. Ruthenium dissolution in a DMFC stack can be prevented by: a) Developing an internally manifolded stacks that seal reactant compartments when not in operation; b) Bringing the cell voltages to zero quickly when not in operation; and c) Limiting the total number of cells to 25 in an effort to limit shunt currents.

  20. Asynchronous Advanced Encryption Standard Hardware with Random Noise Injection for Improved Side-Channel Attack Resistance

    Directory of Open Access Journals (Sweden)

    Siva Kotipalli

    2014-01-01

    (SCA resistance. These designs are based on a delay-insensitive (DI logic paradigm known as null convention logic (NCL, which supports useful properties for resisting SCAs including dual-rail encoding, clock-free operation, and monotonic transitions. Potential benefits include reduced and more uniform switching activities and reduced signal-to-noise (SNR ratio. A novel method to further augment NCL AES hardware with random voltage scaling technique is also presented for additional security. Thereby, the proposed components leak significantly less side-channel information than conventional clocked approaches. To quantitatively verify such improvements, functional verification and WASSO (weighted average simultaneous switching output analysis have been carried out on both conventional synchronous approach and the proposed NCL based approach using Mentor Graphics ModelSim and Xilinx simulation tools. Hardware implementation has been carried out on both designs exploiting a specified side-channel attack standard evaluation FPGA board, called SASEBO-GII, and the corresponding power waveforms for both designs have been collected. Along with the results of software simulations, we have analyzed the collected waveforms to validate the claims related to benefits of the proposed cryptohardware design approach.

  1. Advanced Photovoltaic Inverter Functionality using 500 kW Power Hardware-in-Loop Complete System Laboratory Testing: Preprint

    Energy Technology Data Exchange (ETDEWEB)

    Mather, B. A.; Kromer, M. A.; Casey, L.

    2013-01-01

    With the increasing penetration of distribution connected photovoltaic (PV) systems, more and more PV developers and utilities are interested in easing future PV interconnection concerns by mitigating some of the impacts of PV integration using advanced PV inverter controls and functions. This paper describes the testing of a 500 kW PV inverter using Power Hardware-in-Loop (PHIL) testing techniques. The test setup is described and the results from testing the inverter in advanced functionality modes, not commonly used in currently interconnected PV systems, are presented. PV inverter operation under PHIL evaluation that emulated both the DC PV array connection and the AC distribution level grid connection are shown for constant power factor (PF) and constant reactive power (VAr) control modes. The evaluation of these modes was completed under varying degrees of modeled PV variability.

  2. TU-F-18C-07: Hardware Advances for MTF Improvement in Dedicated Breast CT

    Energy Technology Data Exchange (ETDEWEB)

    Gazi, P; Burkett, G; Yang, K; Boone, J [UC Davis Medical Center, Sacramento, CA (United States)

    2014-06-15

    Purpose: In this study, we have designed and implemented a prototype dedicated breast CT system (bCT) to improve the spatial resolution characteristics, in order to improve detection of micro-calcifications. Methods: A 10.8 kW water-cooled, tungsten anode x-ray tube, running up to 240 mA at 60 kV, coupled with an x-ray generator specifically designed for this application, and 0.3 mm of added copper filter was used to generate x-ray pulses. A CsI CMOS flat panel detector with a pixel pitch of 0.075 mm in native binning mode was used. The system geometry was designed in a way to achieve an FOV on par with similar bCT prototypes, resulting in a magnification factor of 1.39. A 0.013 mm tungsten wire was used to generate point spread functions. Multiple scans were performed with different numbers of projections, different reconstruction kernel sizes and different reconstruction filters to study the effects of each parameter on MTF. The resulting MTFs were then evaluated quantitatively using the generated PFSs. Duplicate scans with the same parameters were performed on two other dedicated breast CT systems to compare the performance of the new prototype. Results: The results of the MTF experiments demonstrate a significant improvement in the spatial resolution characteristics. In the new prototype, using the pulsed x-ray source results in a restoration of the azimuthal MTF degradation, due to motion blurring previously seen in other bCT systems. Moreover, employing the higher resolution x-ray detector considerably improves the MTF. The MTF at 10% of the new system is at 3.5 1/mm, a factor of 4.36 greater than an earlier bCT scanner. Conclusion: The MTF analysis of the new prototype bCT shows that using the new hardware and control results in a significant improvement in visualization of finer detail. This suggests that the visualization of micro-calcifications will be significantly improved.

  3. Advanced Photovoltaic Inverter Control Development and Validation in a Controller-Hardware-in-the-Loop Test Bed

    Energy Technology Data Exchange (ETDEWEB)

    Prabakar, Kumaraguru [National Renewable Energy Laboratory (NREL), Golden, CO (United States); Shirazi, Mariko [National Renewable Energy Laboratory (NREL), Golden, CO (United States); Singh, Akanksha [National Renewable Energy Laboratory (NREL), Golden, CO (United States); Chakraborty, Sudipta [National Renewable Energy Laboratory (NREL), Golden, CO (United States)

    2017-11-07

    Penetration levels of solar photovoltaic (PV) generation on the electric grid have increased in recent years. In the past, most PV installations have not included grid-support functionalities. But today, standards such as the upcoming revisions to IEEE 1547 recommend grid support and anti-islanding functions-including volt-var, frequency-watt, volt-watt, frequency/voltage ride-through, and other inverter functions. These functions allow for the standardized interconnection of distributed energy resources into the grid. This paper develops and tests low-level inverter current control and high-level grid support functions. The controller was developed to integrate advanced inverter functions in a systematic approach, thus avoiding conflict among the different control objectives. The algorithms were then programmed on an off-the-shelf, embedded controller with a dual-core computer processing unit and field-programmable gate array (FPGA). This programmed controller was tested using a controller-hardware-in-the-loop (CHIL) test bed setup using an FPGA-based real-time simulator. The CHIL was run at a time step of 500 ns to accommodate the 20-kHz switching frequency of the developed controller. The details of the advanced control function and CHIL test bed provided here will aide future researchers when designing, implementing, and testing advanced functions of PV inverters.

  4. Parabolic Flight Investigation for Advanced Exercise Concept Hardware Hybrid Ultimate Lifting Kit (HULK)

    Science.gov (United States)

    Weaver, A. S.; Funk, J. H.; Funk, N. W.; Sheehan, C. C.; Humphreys, B. T.; Perusek, G. P.

    2015-01-01

    Long-duration space flight poses many hazards to the health of the crew. Among those hazards is the physiological deconditioning of the musculoskeletal and cardiovascular systems due to prolonged exposure to microgravity. To combat this erosion of physical condition space flight may take on the crew, the Human Research Program (HRP) is charged with developing Advanced Exercise Concepts to maintain astronaut health and fitness during long-term missions, while keeping device mass, power, and volume to a minimum. The goal of this effort is to preserve the physical capability of the crew to perform mission critical tasks in transit and during planetary surface operations. The HULK is a pneumatic-based exercise system, which provides both resistive and aerobic modes to protect against human deconditioning in microgravity. Its design targeted the International Space Station (ISS) Advanced Resistive Exercise Device (ARED) high level performance characteristics and provides up to 600 foot pounds resitive loading with the capability to allow for eccentric to concentric (E:C) ratios of higher than 1:1 through a DC motor assist component. The device's rowing mode allows for high cadence aerobic activity. The HULK parabolic flight campaign, conducted through the NASA Flight Opportunities Program at Ellington Field, resulted in the creation of device specific data sets including low fidelity motion capture, accelerometry and both inline and ground reaction forces. These data provide a critical link in understanding how to vibration isolate the device in both ISS and space transit applications. Secondarily, the study of human exercise and associated body kinematics in microgravity allows for more complete understanding of human to machine interface designs to allow for maximum functionality of the device in microgravity.

  5. Hardware for dynamic quantum computing.

    Science.gov (United States)

    Ryan, Colm A; Johnson, Blake R; Ristè, Diego; Donovan, Brian; Ohki, Thomas A

    2017-10-01

    We describe the hardware, gateware, and software developed at Raytheon BBN Technologies for dynamic quantum information processing experiments on superconducting qubits. In dynamic experiments, real-time qubit state information is fed back or fed forward within a fraction of the qubits' coherence time to dynamically change the implemented sequence. The hardware presented here covers both control and readout of superconducting qubits. For readout, we created a custom signal processing gateware and software stack on commercial hardware to convert pulses in a heterodyne receiver into qubit state assignments with minimal latency, alongside data taking capability. For control, we developed custom hardware with gateware and software for pulse sequencing and steering information distribution that is capable of arbitrary control flow in a fraction of superconducting qubit coherence times. Both readout and control platforms make extensive use of field programmable gate arrays to enable tailored qubit control systems in a reconfigurable fabric suitable for iterative development.

  6. Algebraic stacks

    Indian Academy of Sciences (India)

    generally, any fiber product) is not uniquely defined: it is only defined up to unique isomorphism. ..... Fiber product. Given two morphisms f1 : F1 ! G, f2 : F2 ! G, we define a new stack. F1 آG F2 (with projections to F1 and F2) as follows. The objects are triples ًX1; X2; ق ..... In fact, any Artin stack F can be defined in this fashion.

  7. Hardware malware

    CERN Document Server

    Krieg, Christian

    2013-01-01

    In our digital world, integrated circuits are present in nearly every moment of our daily life. Even when using the coffee machine in the morning, or driving our car to work, we interact with integrated circuits. The increasing spread of information technology in virtually all areas of life in the industrialized world offers a broad range of attack vectors. So far, mainly software-based attacks have been considered and investigated, while hardware-based attacks have attracted comparatively little interest. The design and production process of integrated circuits is mostly decentralized due to

  8. Qualification issues associated with the use of advanced instrumentation and control systems hardware in nuclear power plants

    International Nuclear Information System (INIS)

    Korsah, K.; Antonescu, C.

    1993-01-01

    The instrumentation and control (I ampersand C) systems in advanced reactors will make extensive use of digital controls, microprocessors, multiplexing, and Tiber-optic transmission. Elements of these advances in I ampersand C have been implemented on some current operating plants. However, the widespread use of the above technologies, as well as the use of artificial intelligence with minimum reliance on human operator control of reactors, highlights the need to develop standards for qualifying I ampersand C used in the next generation of nuclear power plants. As a first step in this direction, the protection system I ampersand C for present-day plants was compared to that proposed for advanced light water reactors (ALWRs). An evaluation template was developed by assembling a configuration of a safety channel instrument string for a generic ALWR, then comparing the impact of environmental stressors on that string to their effect on an equivalent instrument string from an existing light water reactor. The template was then used to address reliability issues for microprocessor-based protection systems. Standards (or lack thereof) for the qualification of microprocessor-based safety I ampersand C systems were also identified. This approach addresses in part issues raised in Nuclear Regulatory Commission policy document SECY-91-292. which recognizes that advanced I ampersand C systems for the nuclear industry are ''being developed without consensus standards, as the technology available for design is ahead of the technology that is well understood through experience and supported by application standards.''

  9. Laser-plasma acceleration with multi-color pulse stacks: Designer electron beams for advanced radiation sources

    Science.gov (United States)

    Kalmykov, Serge; Shadwick, Bradley; Ghebregziabher, Isaac; Davoine, Xavier

    2015-11-01

    Photon engineering offers new avenues to coherently control electron beam phase space on a femtosecond time scale. It enables generation of high-quality beams at a kHz-scale repetition rate. Reducing the peak pulse power (and thus the average laser power) is the key to effectively exercise such control. A stepwise negative chirp, synthesized by incoherently stacking collinear sub-Joule pulses from conventional CPA, affords a micron-scale bandwidth. It is sufficient to prevent rapid compression of the pulse into an optical shock, while delaying electron dephasing. This extends electron energy far beyond the limits suggested by accepted scalings (beyond 1 GeV in a 3 mm plasma), without compromising beam quality. In addition, acceleration with a stacked pulse in a channel favorably modifies electron beam on a femtosecond time scale, controllably producing synchronized sequences of 100 kA-scale, quasi-monoenergetic bunches. These comb-like, designer GeV electron beams are ideal drivers of polychromatic, tunable inverse Thomson γ-ray sources. The work of SYK and BAS is supported by the US DOE Grant DE-SC0008382 and NSF Grant PHY-1104683. Inverse Thomson scattering simulations were completed utilizing the Holland Computing Center of the University of Nebraska.

  10. Algebraic stacks

    Indian Academy of Sciences (India)

    truct the 'moduli stack', that captures all the information that we would like in a fine moduli space. ..... the fine moduli space), it has the property that for any family W of vector bundles (i.e. W is a vector bundle over B ...... the etale topology is finer: V is a 'small enough open subset' because the square root can be defined on it.

  11. The Direct FuelCell™ stack engineering

    Science.gov (United States)

    Doyon, J.; Farooque, M.; Maru, H.

    FuelCell Energy (FCE) has developed power plants in the size range of 300 kW to 3 MW for distributed power generation. Field-testing of the sub-megawatt plants is underway. The FCE power plants are based on its Direct FuelCell™ (DFC) technology. This is so named because of its ability to generate electricity directly from a hydrocarbon fuel, such as natural gas, by reforming it inside the fuel cell stack itself. All FCE products use identical 8000 cm 2 cell design, approximately 350-400 cells per stack, external gas manifolds, and similar stack compression systems. The difference lies in the packaging of the stacks inside the stack module. The sub-megawatt system stack module contains a single horizontal stack whereas the MW-class stack module houses four identical vertical stacks. The commonality of the design, internal reforming features, and atmospheric operation simplify the system design, reduce cost, improve efficiency, increase reliability and maintainability. The product building-block stack design has been advanced through three full-size stack operations at company's headquarters in Danbury, CT. The initial proof-of-concept of the full-size stack design was verified in 1999, followed by a 1.5 year of endurance verification in 2000-2001, and currently a value-engineered stack version is in operation. This paper discusses the design features, important engineering solutions implemented, and test results of FCE's full-size DFC stacks.

  12. Time-predictable Stack Caching

    DEFF Research Database (Denmark)

    Abbaspourseyedi, Sahar

    completely. Thus, in systems with hard deadlines the worst-case execution time (WCET) of the real-time software running on them needs to be bounded. Modern architectures use features such as pipelining and caches for improving the average performance. These features, however, make the WCET analysis more...... addresses, provides an opportunity to predict and tighten the WCET of accesses to data in caches. In this thesis, we introduce the time-predictable stack cache design and implementation within a time-predictable processor. We introduce several optimizations to our design for tightening the WCET while...... keeping the timepredictability of the design intact. Moreover, we provide a solution for reducing the cost of context switching in a system using the stack cache. In design of these caches, we use custom hardware and compiler support for delivering time-predictable stack data accesses. Furthermore...

  13. Field Quality from Tolerance Stack-up In R&D Quadrupoles for the Advanced Photon Source Upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Liu, J.; Jaski, M.; Dejus, R.; Doose, C.; Donnelly, A.; Downey, J.; Borland, M.; Jain, Animesh

    2016-10-01

    The Advanced Photon Source (APS) at Argonne National Laboratory (ANL) is considering upgrading the current double-bend, 7-GeV, 3rd generation storage ring to a 6-GeV, 4th generation storage ring with a Multibend Achromat (MBA) lattice. In this study, a novel method is proposed to determine fabrication and assembly tolerances through a combination of magnetic and mechanical tolerance analyses. Mechanical tolerance stackup analyses using Teamcenter Variation Analysis are carried out to determine the part and assembly level fabrication tolerances. Finite element analyses using OPERA are conducted to estimate the effect of fabrication and assembly errors on the magnetic field of a quadrupole magnet and to determine the allowable tolerances to achieve the desired magnetic performance. Finally, results of measurements in R&D quadrupole prototypes are compared with the analysis results.

  14. Sensing with Advanced Computing Technology: Fin Field-Effect Transistors with High-k Gate Stack on Bulk Silicon.

    Science.gov (United States)

    Rigante, Sara; Scarbolo, Paolo; Wipf, Mathias; Stoop, Ralph L; Bedner, Kristine; Buitrago, Elizabeth; Bazigos, Antonios; Bouvet, Didier; Calame, Michel; Schönenberger, Christian; Ionescu, Adrian M

    2015-05-26

    Field-effect transistors (FETs) form an established technology for sensing applications. However, recent advancements and use of high-performance multigate metal-oxide semiconductor FETs (double-gate, FinFET, trigate, gate-all-around) in computing technology, instead of bulk MOSFETs, raise new opportunities and questions about the most suitable device architectures for sensing integrated circuits. In this work, we propose pH and ion sensors exploiting FinFETs fabricated on bulk silicon by a fully CMOS compatible approach, as an alternative to the widely investigated silicon nanowires on silicon-on-insulator substrates. We also provide an analytical insight of the concept of sensitivity for the electronic integration of sensors. N-channel fully depleted FinFETs with critical dimensions on the order of 20 nm and HfO2 as a high-k gate insulator have been developed and characterized, showing excellent electrical properties, subthreshold swing, SS ∼ 70 mV/dec, and on-to-off current ratio, Ion/Ioff ∼ 10(6), at room temperature. The same FinFET architecture is validated as a highly sensitive, stable, and reproducible pH sensor. An intrinsic sensitivity close to the Nernst limit, S = 57 mV/pH, is achieved. The pH response in terms of output current reaches Sout = 60%. Long-term measurements have been performed over 4.5 days with a resulting drift in time δVth/δt = 0.10 mV/h. Finally, we show the capability to reproduce experimental data with an extended three-dimensional commercial finite element analysis simulator, in both dry and wet environments, which is useful for future advanced sensor design and optimization.

  15. The Impact of 3D Stacking and Technology Scaling on the Power and Area of Stereo Matching Processors

    Directory of Open Access Journals (Sweden)

    Seung-Ho Ok

    2017-02-01

    Full Text Available Recently, stereo matching processors have been adopted in real-time embedded systems such as intelligent robots and autonomous vehicles, which require minimal hardware resources and low power consumption. Meanwhile, thanks to the through-silicon via (TSV, three-dimensional (3D stacking technology has emerged as a practical solution to achieving the desired requirements of a high-performance circuit. In this paper, we present the benefits of 3D stacking and process technology scaling on stereo matching processors. We implemented 2-tier 3D-stacked stereo matching processors with GlobalFoundries 130-nm and Nangate 45-nm process design kits and compare them with their two-dimensional (2D counterparts to identify comprehensive design benefits. In addition, we examine the findings from various analyses to identify the power benefits of 3D-stacked integrated circuit (IC and device technology advancements. From experiments, we observe that the proposed 3D-stacked ICs, compared to their 2D IC counterparts, obtain 43% area, 13% power, and 14% wire length reductions. In addition, we present a logic partitioning method suitable for a pipeline-based hardware architecture that minimizes the use of TSVs.

  16. The Impact of 3D Stacking and Technology Scaling on the Power and Area of Stereo Matching Processors.

    Science.gov (United States)

    Ok, Seung-Ho; Lee, Yong-Hwan; Shim, Jae Hoon; Lim, Sung Kyu; Moon, Byungin

    2017-02-22

    Recently, stereo matching processors have been adopted in real-time embedded systems such as intelligent robots and autonomous vehicles, which require minimal hardware resources and low power consumption. Meanwhile, thanks to the through-silicon via (TSV), three-dimensional (3D) stacking technology has emerged as a practical solution to achieving the desired requirements of a high-performance circuit. In this paper, we present the benefits of 3D stacking and process technology scaling on stereo matching processors. We implemented 2-tier 3D-stacked stereo matching processors with GlobalFoundries 130-nm and Nangate 45-nm process design kits and compare them with their two-dimensional (2D) counterparts to identify comprehensive design benefits. In addition, we examine the findings from various analyses to identify the power benefits of 3D-stacked integrated circuit (IC) and device technology advancements. From experiments, we observe that the proposed 3D-stacked ICs, compared to their 2D IC counterparts, obtain 43% area, 13% power, and 14% wire length reductions. In addition, we present a logic partitioning method suitable for a pipeline-based hardware architecture that minimizes the use of TSVs.

  17. Introduction to Hardware Security

    OpenAIRE

    Yier Jin

    2015-01-01

    Hardware security has become a hot topic recently with more and more researchers from related research domains joining this area. However, the understanding of hardware security is often mixed with cybersecurity and cryptography, especially cryptographic hardware. For the same reason, the research scope of hardware security has never been clearly defined. To help researchers who have recently joined in this area better understand the challenges and tasks within the hardware security domain an...

  18. Introduction to Hardware Security

    Directory of Open Access Journals (Sweden)

    Yier Jin

    2015-10-01

    Full Text Available Hardware security has become a hot topic recently with more and more researchers from related research domains joining this area. However, the understanding of hardware security is often mixed with cybersecurity and cryptography, especially cryptographic hardware. For the same reason, the research scope of hardware security has never been clearly defined. To help researchers who have recently joined in this area better understand the challenges and tasks within the hardware security domain and to help both academia and industry investigate countermeasures and solutions to solve hardware security problems, we will introduce the key concepts of hardware security as well as its relations to related research topics in this survey paper. Emerging hardware security topics will also be clearly depicted through which the future trend will be elaborated, making this survey paper a good reference for the continuing research efforts in this area.

  19. The Methods of Design and Implementation of Stack Filters for Image Processing

    Directory of Open Access Journals (Sweden)

    S. Marchevsky

    1995-04-01

    Full Text Available This paper deals with a large class of nonlinear digital filters, the stack filters, which contain all combinations and compositions of rank order operators within a finite window. Attention is given to design and effective hardware implementation of an optimal stack filter for image processing. Presented simulation results confirm robustness of stack filters in the image restoration corrupted by impulsive noise.

  20. Proceedings of the Twenty-First Water Reactor Safety Information Meeting: Volume 1, Plenary session; Advanced reactor research; advanced control system technology; advanced instrumentation and control hardware; human factors research; probabilistic risk assessment topics; thermal hydraulics; thermal hydraulic research for advanced passive LWRs

    Energy Technology Data Exchange (ETDEWEB)

    Monteleone, S. [Brookhaven National Lab., Upton, NY (United States)] [comp.

    1994-04-01

    This three-volume report contains 90 papers out of the 102 that were presented at the Twenty-First Water Reactor Safety Information Meeting held at the Bethesda Marriott Hotel, Bethesda, Maryland, during the week of October 25--27, 1993. The papers are printed in the order of their presentation in each session and describe progress and results of programs in nuclear safety research conducted in this country and abroad. Foreign participation in the meeting included papers presented by researchers from France, Germany, Japan, Russia, Switzerland, Taiwan, and United Kingdom. The titles of the papers and the names of the authors have been updated and may differ from those that appeared in the final program of the meeting. Individual papers have been cataloged separately. This document, Volume 1 covers the following topics: Advanced Reactor Research; Advanced Instrumentation and Control Hardware; Advanced Control System Technology; Human Factors Research; Probabilistic Risk Assessment Topics; Thermal Hydraulics; and Thermal Hydraulic Research for Advanced Passive Light Water Reactors.

  1. Proceedings of the Twenty-First Water Reactor Safety Information Meeting: Volume 1, Plenary session; Advanced reactor research; advanced control system technology; advanced instrumentation and control hardware; human factors research; probabilistic risk assessment topics; thermal hydraulics; thermal hydraulic research for advanced passive LWRs

    International Nuclear Information System (INIS)

    Monteleone, S.

    1994-04-01

    This three-volume report contains 90 papers out of the 102 that were presented at the Twenty-First Water Reactor Safety Information Meeting held at the Bethesda Marriott Hotel, Bethesda, Maryland, during the week of October 25--27, 1993. The papers are printed in the order of their presentation in each session and describe progress and results of programs in nuclear safety research conducted in this country and abroad. Foreign participation in the meeting included papers presented by researchers from France, Germany, Japan, Russia, Switzerland, Taiwan, and United Kingdom. The titles of the papers and the names of the authors have been updated and may differ from those that appeared in the final program of the meeting. Individual papers have been cataloged separately. This document, Volume 1 covers the following topics: Advanced Reactor Research; Advanced Instrumentation and Control Hardware; Advanced Control System Technology; Human Factors Research; Probabilistic Risk Assessment Topics; Thermal Hydraulics; and Thermal Hydraulic Research for Advanced Passive Light Water Reactors

  2. Investigation of a Superscalar Operand Stack Using FO4 and ASIC Wire-Delay Metrics

    Directory of Open Access Journals (Sweden)

    Christopher Bailey

    2014-01-01

    Full Text Available Complexity in processor microarchitecture and the related issues of power density, hot spots and wire delay, are seen to be a major concern for design migration into low nanometer technologies of the future. This paper evaluates the hardware cost of an alternative to register-file organization, the superscalar stack issue array (SSIA. We believe this is the first such reported study using discrete stack elements. Several possible implementations are evaluated, using a 90 nm standard cell library as a reference model, yielding delay data and FO4 metrics. The evaluation, including reference to ASIC layout, RC extraction, and timing simulation, suggests a 4-wide issue rate of at least four Giga-ops/sec at 90 nm and opportunities for twofold future improvement by using more advanced design approaches.

  3. Twenty-third water reactor safety information meeting: Volume 2, Human factors research; Advanced I and C hardware and software; Severe accident research; Probabilistic risk assessment topics; Individual plant examination: Proceedings

    Energy Technology Data Exchange (ETDEWEB)

    Monteleone, S. [comp.] [Brookhaven National Lab., Upton, NY (United States)

    1996-03-01

    This three-volume report contains papers presented at the Twenty- Third Water Reactor Safety Information Meeting held at the Bethesda Marriott Hotel, Bethesda, Maryland, October 23-25, 1995. The papers are printed in the order of their presentation in each session and describe progress and results of programs in nuclear safety research conducted in this country and abroad. Foreign participation in the meeting included papers presented by researchers from France, Italy, Japan, Norway, Russia, Sweden, and Switzerland. This document, Volume 2, present topics in human factors research, advanced instrumentation and control hardware and software, severe accident research, probabilistic risk assessment, and individual plant examination. Individual papers have been cataloged separately.

  4. A Time-predictable Stack Cache

    DEFF Research Database (Denmark)

    Abbaspour, Sahar; Brandner, Florian; Schoeberl, Martin

    2013-01-01

    Real-time systems need time-predictable architectures to support static worst-case execution time (WCET) analysis. One architectural feature, the data cache, is hard to analyze when different data areas (e.g., heap allocated and stack allocated data) share the same cache. This sharing leads to le...... of a cache for stack allocated data. Our port of the LLVM C++ compiler supports the management of the stack cache. The combination of stack cache instructions and the hardware implementation of the stack cache is a further step towards timepredictable architectures.......Real-time systems need time-predictable architectures to support static worst-case execution time (WCET) analysis. One architectural feature, the data cache, is hard to analyze when different data areas (e.g., heap allocated and stack allocated data) share the same cache. This sharing leads to less...... precise results of the cache analysis part of the WCET analysis. Splitting the data cache for different data areas enables composable data cache analysis. The WCET analysis tool can analyze the accesses to these different data areas independently. In this paper we present the design and implementation...

  5. Advanced Platform for Development and Evaluation of Grid Interconnection Systems Using Hardware-in-the-Loop: Part III - Grid Interconnection System Evaluator

    Energy Technology Data Exchange (ETDEWEB)

    Lundstrom, B.; Shirazi, M.; Coddington, M.; Kroposki, B.

    2013-01-01

    This paper describes a Grid Interconnection System Evaluator (GISE) that leverages hardware-in-the-loop (HIL) simulation techniques to rapidly evaluate the grid interconnection standard conformance of an ICS according to the procedures in IEEE Std 1547.1. The architecture and test sequencing of this evaluation tool, along with a set of representative ICS test results from three different photovoltaic (PV) inverters, are presented. The GISE adds to the National Renewable Energy Laboratory's (NREL) evaluation platform that now allows for rapid development of ICS control algorithms using controller HIL (CHIL) techniques, the ability to test the dc input characteristics of PV-based ICSs through the use of a PV simulator capable of simulating real-world dynamics using power HIL (PHIL), and evaluation of ICS grid interconnection conformance.

  6. Advanced Platform for Development and Evaluation of Grid Interconnection Systems Using Hardware-in-the-Loop: Part III -- Grid Interconnection System Evaluator: Preprint

    Energy Technology Data Exchange (ETDEWEB)

    Lundstrom, B.; Shirazi, M.; Coddington, M.; Kroposki, B.

    2013-01-01

    This paper, presented at the IEEE Green Technologies Conference 2013, describes a Grid Interconnection System Evaluator (GISE) that leverages hardware-in-the-loop (HIL) simulation techniques to rapidly evaluate the grid interconnection standard conformance of an ICS according to the procedures in IEEE Std 1547.1 (TM). The architecture and test sequencing of this evaluation tool, along with a set of representative ICS test results from three different photovoltaic (PV) inverters, are presented. The GISE adds to the National Renewable Energy Laboratory's (NREL) evaluation platform that now allows for rapid development of ICS control algorithms using controller HIL (CHIL) techniques, the ability to test the dc input characteristics of PV-based ICSs through the use of a PV simulator capable of simulating real-world dynamics using power HIL (PHIL), and evaluation of ICS grid interconnection conformance.

  7. LWH and ACH Helmet Hardware Study

    Science.gov (United States)

    2015-11-30

    Naval Research Laboratory Washington, DC 20375-5320 NRL/MR/6355--15-9642 LWH & ACH Helmet Hardware Study November 30, 2015 Ronald l. Holtz PeteR...19b. TELEPHONE NUMBER (include area code) b. ABSTRACT c. THIS PAGE 18. NUMBER OF PAGES 17. LIMITATION OF ABSTRACT LWH & ACH Helmet Hardware Study...screws and nuts used with the Light Weight Helmet (LWH) and Advanced Combat Helmet ( ACH ). The testing included basic dimensional measurements, Rockwell

  8. Deploying OpenStack

    CERN Document Server

    Pepple, Ken

    2011-01-01

    OpenStack was created with the audacious goal of being the ubiquitous software choice for building public and private cloud infrastructures. In just over a year, it's become the most talked-about project in open source. This concise book introduces OpenStack's general design and primary software components in detail, and shows you how to start using it to build cloud infrastructures. If you're a developer, technologist, or system administrator familiar with cloud offerings such as Rackspace Cloud or Amazon Web Services, Deploying OpenStack shows you how to obtain and deploy OpenStack softwar

  9. Hardware protection through obfuscation

    CERN Document Server

    Bhunia, Swarup; Tehranipoor, Mark

    2017-01-01

    This book introduces readers to various threats faced during design and fabrication by today’s integrated circuits (ICs) and systems. The authors discuss key issues, including illegal manufacturing of ICs or “IC Overproduction,” insertion of malicious circuits, referred as “Hardware Trojans”, which cause in-field chip/system malfunction, and reverse engineering and piracy of hardware intellectual property (IP). The authors provide a timely discussion of these threats, along with techniques for IC protection based on hardware obfuscation, which makes reverse-engineering an IC design infeasible for adversaries and untrusted parties with any reasonable amount of resources. This exhaustive study includes a review of the hardware obfuscation methods developed at each level of abstraction (RTL, gate, and layout) for conventional IC manufacturing, new forms of obfuscation for emerging integration strategies (split manufacturing, 2.5D ICs, and 3D ICs), and on-chip infrastructure needed for secure exchange o...

  10. Open Hardware at CERN

    CERN Multimedia

    CERN Knowledge Transfer Group

    2015-01-01

    CERN is actively making its knowledge and technology available for the benefit of society and does so through a variety of different mechanisms. Open hardware has in recent years established itself as a very effective way for CERN to make electronics designs and in particular printed circuit board layouts, accessible to anyone, while also facilitating collaboration and design re-use. It is creating an impact on many levels, from companies producing and selling products based on hardware designed at CERN, to new projects being released under the CERN Open Hardware Licence. Today the open hardware community includes large research institutes, universities, individual enthusiasts and companies. Many of the companies are actively involved in the entire process from design to production, delivering services and consultancy and even making their own products available under open licences.

  11. OpenStack essentials

    CERN Document Server

    Radez, Dan

    2015-01-01

    If you need to get started with OpenStack or want to learn more, then this book is your perfect companion. If you're comfortable with the Linux command line, you'll gain confidence in using OpenStack.

  12. Mastering OpenStack

    CERN Document Server

    Khedher, Omar

    2015-01-01

    This book is intended for system administrators, cloud engineers, and system architects who want to deploy a cloud based on OpenStack in a mid- to large-sized IT infrastructure. If you have a fundamental understanding of cloud computing and OpenStack and want to expand your knowledge, then this book is an excellent checkpoint to move forward.

  13. NASA HUNCH Hardware

    Science.gov (United States)

    Hall, Nancy R.; Wagner, James; Phelps, Amanda

    2014-01-01

    What is NASA HUNCH? High School Students United with NASA to Create Hardware-HUNCH is an instructional partnership between NASA and educational institutions. This partnership benefits both NASA and students. NASA receives cost-effective hardware and soft goods, while students receive real-world hands-on experiences. The 2014-2015 was the 12th year of the HUNCH Program. NASA Glenn Research Center joined the program that already included the NASA Johnson Space Flight Center, Marshall Space Flight Center, Langley Research Center and Goddard Space Flight Center. The program included 76 schools in 24 states and NASA Glenn worked with the following five schools in the HUNCH Build to Print Hardware Program: Medina Career Center, Medina, OH; Cattaraugus Allegheny-BOCES, Olean, NY; Orleans Niagara-BOCES, Medina, NY; Apollo Career Center, Lima, OH; Romeo Engineering and Tech Center, Washington, MI. The schools built various parts of an International Space Station (ISS) middeck stowage locker and learned about manufacturing process and how best to build these components to NASA specifications. For the 2015-2016 school year the schools will be part of a larger group of schools building flight hardware consisting of 20 ISS middeck stowage lockers for the ISS Program. The HUNCH Program consists of: Build to Print Hardware; Build to Print Soft Goods; Design and Prototyping; Culinary Challenge; Implementation: Web Page and Video Production.

  14. Computer hardware fault administration

    Science.gov (United States)

    Archer, Charles J.; Megerian, Mark G.; Ratterman, Joseph D.; Smith, Brian E.

    2010-09-14

    Computer hardware fault administration carried out in a parallel computer, where the parallel computer includes a plurality of compute nodes. The compute nodes are coupled for data communications by at least two independent data communications networks, where each data communications network includes data communications links connected to the compute nodes. Typical embodiments carry out hardware fault administration by identifying a location of a defective link in the first data communications network of the parallel computer and routing communications data around the defective link through the second data communications network of the parallel computer.

  15. EmuStack: An OpenStack-Based DTN Network Emulation Platform (Extended Version

    Directory of Open Access Journals (Sweden)

    Haifeng Li

    2016-01-01

    Full Text Available With the advancement of computing and network virtualization technology, the networking research community shows great interest in network emulation. Compared with network simulation, network emulation can provide more relevant and comprehensive details. In this paper, EmuStack, a large-scale real-time emulation platform for Delay Tolerant Network (DTN, is proposed. EmuStack aims at empowering network emulation to become as simple as network simulation. Based on OpenStack, distributed synchronous emulation modules are developed to enable EmuStack to implement synchronous and dynamic, precise, and real-time network emulation. Meanwhile, the lightweight approach of using Docker container technology and network namespaces allows EmuStack to support a (up to hundreds of nodes large-scale topology with only several physical nodes. In addition, EmuStack integrates the Linux Traffic Control (TC tools with OpenStack for managing and emulating the virtual link characteristics which include variable bandwidth, delay, loss, jitter, reordering, and duplication. Finally, experiences with our initial implementation suggest the ability to run and debug experimental network protocol in real time. EmuStack environment would bring qualitative change in network research works.

  16. The LASS hardware processor

    International Nuclear Information System (INIS)

    Kunz, P.F.

    1976-01-01

    The problems of data analysis with hardware processors are reviewed and a description is given of a programmable processor. This processor, the 168/E, has been designed for use in the LASS multi-processor system; it has an execution speed comparable to the IBM 370/168 and uses the subset of IBM 370 instructions appropriate to the LASS analysis task. (Auth.)

  17. CERN Neutrino Platform Hardware

    CERN Document Server

    Nelson, Kevin

    2017-01-01

    My summer research was broadly in CERN's neutrino platform hardware efforts. This project had two main components: detector assembly and data analysis work for ICARUS. Specifically, I worked on assembly for the ProtoDUNE project and monitored the safety of ICARUS as it was transported to Fermilab by analyzing the accelerometer data from its move.

  18. Fuel Cell Stack Testing and Durability in Support of Ion Tiger UAV

    Science.gov (United States)

    2010-06-02

    This report covers efforts by the Hawaii Natural Energy Institute (HNEI) of the University of Hawaii under the ONR-funded Ion Tiger UAV award that included testing of Ion Tiger fuel cell stacks in HNEI’s Hawaii Fuel Cell Test Facility located in Honolulu, Hawaii. Work was focused on steady-state stack characteristics of Protonex fuel cell stacks under various operating conditions. In addition, Hardware-in-the-Loop testing was performed to characterize dynamic

  19. Radiation-Tolerant Intelligent Memory Stack - RTIMS

    Science.gov (United States)

    Ng, Tak-kwong; Herath, Jeffrey A.

    2011-01-01

    This innovation provides reconfigurable circuitry and 2-Gb of error-corrected or 1-Gb of triple-redundant digital memory in a small package. RTIMS uses circuit stacking of heterogeneous components and radiation shielding technologies. A reprogrammable field-programmable gate array (FPGA), six synchronous dynamic random access memories, linear regulator, and the radiation mitigation circuits are stacked into a module of 42.7 42.7 13 mm. Triple module redundancy, current limiting, configuration scrubbing, and single- event function interrupt detection are employed to mitigate radiation effects. The novel self-scrubbing and single event functional interrupt (SEFI) detection allows a relatively soft FPGA to become radiation tolerant without external scrubbing and monitoring hardware

  20. Sterilization of space hardware.

    Science.gov (United States)

    Pflug, I. J.

    1971-01-01

    Discussion of various techniques of sterilization of space flight hardware using either destructive heating or the action of chemicals. Factors considered in the dry-heat destruction of microorganisms include the effects of microbial water content, temperature, the physicochemical properties of the microorganism and adjacent support, and nature of the surrounding gas atmosphere. Dry-heat destruction rates of microorganisms on the surface, between mated surface areas, or buried in the solid material of space vehicle hardware are reviewed, along with alternative dry-heat sterilization cycles, thermodynamic considerations, and considerations of final sterilization-process design. Discussed sterilization chemicals include ethylene oxide, formaldehyde, methyl bromide, dimethyl sulfoxide, peracetic acid, and beta-propiolactone.

  1. Hardware characteristic and application

    International Nuclear Information System (INIS)

    Gu, Dong Hyeon

    1990-03-01

    The contents of this book are system board on memory, performance, system timer system click and specification, coprocessor such as programing interface and hardware interface, power supply on input and output, protection for DC output, Power Good signal, explanation on 84 keyboard and 101/102 keyboard,BIOS system, 80286 instruction set and 80287 coprocessor, characters, keystrokes and colors, communication and compatibility of IBM personal computer on application direction, multitasking and code for distinction of system.

  2. Quantum neuromorphic hardware for quantum artificial intelligence

    Science.gov (United States)

    Prati, Enrico

    2017-08-01

    The development of machine learning methods based on deep learning boosted the field of artificial intelligence towards unprecedented achievements and application in several fields. Such prominent results were made in parallel with the first successful demonstrations of fault tolerant hardware for quantum information processing. To which extent deep learning can take advantage of the existence of a hardware based on qubits behaving as a universal quantum computer is an open question under investigation. Here I review the convergence between the two fields towards implementation of advanced quantum algorithms, including quantum deep learning.

  3. Stack filter classifiers

    Energy Technology Data Exchange (ETDEWEB)

    Porter, Reid B [Los Alamos National Laboratory; Hush, Don [Los Alamos National Laboratory

    2009-01-01

    Just as linear models generalize the sample mean and weighted average, weighted order statistic models generalize the sample median and weighted median. This analogy can be continued informally to generalized additive modeels in the case of the mean, and Stack Filters in the case of the median. Both of these model classes have been extensively studied for signal and image processing but it is surprising to find that for pattern classification, their treatment has been significantly one sided. Generalized additive models are now a major tool in pattern classification and many different learning algorithms have been developed to fit model parameters to finite data. However Stack Filters remain largely confined to signal and image processing and learning algorithms for classification are yet to be seen. This paper is a step towards Stack Filter Classifiers and it shows that the approach is interesting from both a theoretical and a practical perspective.

  4. Carbonate fuel cell endurance: Hardware corrosion and electrolyte management status

    Energy Technology Data Exchange (ETDEWEB)

    Yuh, C.; Johnsen, R.; Farooque, M.; Maru, H.

    1993-01-01

    Endurance tests of carbonate fuel cell stacks (up to 10,000 hours) have shown that hardware corrosion and electrolyte losses can be reasonably controlled by proper material selection and cell design. Corrosion of stainless steel current collector hardware, nickel clad bipolar plate and aluminized wet seal show rates within acceptable limits. Electrolyte loss rate to current collector surface has been minimized by reducing exposed current collector surface area. Electrolyte evaporation loss appears tolerable. Electrolyte redistribution has been restrained by proper design of manifold seals.

  5. Carbonate fuel cell endurance: Hardware corrosion and electrolyte management status

    Energy Technology Data Exchange (ETDEWEB)

    Yuh, C.; Johnsen, R.; Farooque, M.; Maru, H.

    1993-05-01

    Endurance tests of carbonate fuel cell stacks (up to 10,000 hours) have shown that hardware corrosion and electrolyte losses can be reasonably controlled by proper material selection and cell design. Corrosion of stainless steel current collector hardware, nickel clad bipolar plate and aluminized wet seal show rates within acceptable limits. Electrolyte loss rate to current collector surface has been minimized by reducing exposed current collector surface area. Electrolyte evaporation loss appears tolerable. Electrolyte redistribution has been restrained by proper design of manifold seals.

  6. On Stack Reconstruction Problem

    Directory of Open Access Journals (Sweden)

    V. D. Аkeliev

    2009-01-01

    Full Text Available The paper describes analytical investigations that study relation of fuel combustion regimes with concentration values of sulphur anhydride in flue gases and acid dew point. Coefficients of convective heat transfer at internal and external surfaces of stacks have been determined in the paper. The paper reveals the possibility to reconstruct stacks while using gas discharging channel made of composite material on the basis of glass-reinforced plastic which permits to reduce thermo-stressed actions on reinforced concrete and increase volume of released gases due to practically two-fold reduction of gas-dynamic pressure losses along the pipe length.

  7. Laser pulse stacking method

    Science.gov (United States)

    Moses, E.I.

    1992-12-01

    A laser pulse stacking method is disclosed. A problem with the prior art has been the generation of a series of laser beam pulses where the outer and inner regions of the beams are generated so as to form radially non-synchronous pulses. Such pulses thus have a non-uniform cross-sectional area with respect to the outer and inner edges of the pulses. The present invention provides a solution by combining the temporally non-uniform pulses in a stacking effect to thus provide a more uniform temporal synchronism over the beam diameter. 2 figs.

  8. NCERA-101 STATION REPORT - KENNEDY SPACE CENTER: Large Plant Growth Hardware for the International Space Station

    Science.gov (United States)

    Massa, Gioia D.

    2013-01-01

    This is the station report for the national controlled environments meeting. Topics to be discussed will include the Veggie and Advanced Plant Habitat ISS hardware. The goal is to introduce this hardware to a potential user community.

  9. Progress of MCFC stack technology at Toshiba

    Energy Technology Data Exchange (ETDEWEB)

    Hori, M.; Hayashi, T.; Shimizu, Y. [Toshiba Corp., Tokyo (Japan)

    1996-12-31

    Toshiba is working on the development of MCFC stack technology; improvement of cell characteristics, and establishment of separator technology. For the cell technology, Toshiba has concentrated on both the restraints of NiO cathode dissolution and electrolyte loss from cells, which are the critical issues to extend cell life in MCFC, and great progress has been made. On the other hand, recognizing that the separator is one of key elements in accomplishing reliable and cost-competitive MCFC stacks, Toshiba has been accelerating the technology establishment and verification of an advanced type separator. A sub-scale stack with such a separator was provided for an electric generating test, and has been operated for more than 10,000 hours. This paper presents several topics obtained through the technical activities in the MCFC field at Toshiba.

  10. po_stack_movie

    DEFF Research Database (Denmark)

    2009-01-01

    po_stack® er et reolsystem, hvis enkle elementer giver stor flexibilitet, variation og skulpturel virkning. Elementerne stables og forskydes frit, så reolens rum kan vendes til begge sider, være åbne eller lukkede og farvekombineres ubegrænset. Reolen kan let ombygges, udvides eller opdeles, når ...

  11. Learning SaltStack

    CERN Document Server

    Myers, Colton

    2015-01-01

    If you are a system administrator who manages multiple servers, then you know how difficult it is to keep your infrastructure in line. If you've been searching for an easier way, this book is for you. No prior experience with SaltStack is required.

  12. Toward Composable Hardware Agnostic Communications Blocks Lessons Learned

    Science.gov (United States)

    2016-11-01

    processing through a common thread- ing, scheduling, IPC, and memory management approach • Hardware-specific optimization abstraction • Flow -based block...composition - Each block may receive multiple inputs and generate multiple outputs to different blocks enabling flow -based usage Presentation Name - 5...with a high level block complexity analysis. Assumptions such as infinite memory/all access in L1 cache , hand assembly (no function call overhead/stack

  13. COMPUTER HARDWARE MARKING

    CERN Multimedia

    Groupe de protection des biens

    2000-01-01

    As part of the campaign to protect CERN property and for insurance reasons, all computer hardware belonging to the Organization must be marked with the words 'PROPRIETE CERN'.IT Division has recently introduced a new marking system that is both economical and easy to use. From now on all desktop hardware (PCs, Macintoshes, printers) issued by IT Division with a value equal to or exceeding 500 CHF will be marked using this new system.For equipment that is already installed but not yet marked, including UNIX workstations and X terminals, IT Division's Desktop Support Service offers the following services free of charge:Equipment-marking wherever the Service is called out to perform other work (please submit all work requests to the IT Helpdesk on 78888 or helpdesk@cern.ch; for unavoidable operational reasons, the Desktop Support Service will only respond to marking requests when these coincide with requests for other work such as repairs, system upgrades, etc.);Training of personnel designated by Division Leade...

  14. Open hardware for open science

    CERN Document Server

    CERN Bulletin

    2011-01-01

    Inspired by the open source software movement, the Open Hardware Repository was created to enable hardware developers to share the results of their R&D activities. The recently published CERN Open Hardware Licence offers the legal framework to support this knowledge and technology exchange.   Two years ago, a group of electronics designers led by Javier Serrano, a CERN engineer, working in experimental physics laboratories created the Open Hardware Repository (OHR). This project was initiated in order to facilitate the exchange of hardware designs across the community in line with the ideals of “open science”. The main objectives include avoiding duplication of effort by sharing results across different teams that might be working on the same need. “For hardware developers, the advantages of open hardware are numerous. For example, it is a great learning tool for technologies some developers would not otherwise master, and it avoids unnecessary work if someone ha...

  15. Foundations of hardware IP protection

    CERN Document Server

    Torres, Lionel

    2017-01-01

    This book provides a comprehensive and up-to-date guide to the design of security-hardened, hardware intellectual property (IP). Readers will learn how IP can be threatened, as well as protected, by using means such as hardware obfuscation/camouflaging, watermarking, fingerprinting (PUF), functional locking, remote activation, hidden transmission of data, hardware Trojan detection, protection against hardware Trojan, use of secure element, ultra-lightweight cryptography, and digital rights management. This book serves as a single-source reference to design space exploration of hardware security and IP protection. · Provides readers with a comprehensive overview of hardware intellectual property (IP) security, describing threat models and presenting means of protection, from integrated circuit layout to digital rights management of IP; · Enables readers to transpose techniques fundamental to digital rights management (DRM) to the realm of hardware IP security; · Introduce designers to the concept of salutar...

  16. Energy Expenditure of Sport Stacking

    Science.gov (United States)

    Murray, Steven R.; Udermann, Brian E.; Reineke, David M.; Battista, Rebecca A.

    2009-01-01

    Sport stacking is an activity taught in many physical education programs. The activity, although very popular, has been studied minimally, and the energy expenditure for sport stacking is unknown. Therefore, the purposes of this study were to determine the energy expenditure of sport stacking in elementary school children and to compare that value…

  17. OpenStack cloud security

    CERN Document Server

    Locati, Fabio Alessandro

    2015-01-01

    If you are an OpenStack administrator or developer, or wish to build solutions to protect your OpenStack environment, then this book is for you. Experience of Linux administration and familiarity with different OpenStack components is assumed.

  18. Hardware Middleware for Person Tracking on Embedded Distributed Smart Cameras

    Directory of Open Access Journals (Sweden)

    Ali Akbar Zarezadeh

    2012-01-01

    Full Text Available Tracking individuals is a prominent application in such domains like surveillance or smart environments. This paper provides a development of a multiple camera setup with jointed view that observes moving persons in a site. It focuses on a geometry-based approach to establish correspondence among different views. The expensive computational parts of the tracker are hardware accelerated via a novel system-on-chip (SoC design. In conjunction with this vision application, a hardware object request broker (ORB middleware is presented as the underlying communication system. The hardware ORB provides a hardware/software architecture to achieve real-time intercommunication among multiple smart cameras. Via a probing mechanism, a performance analysis is performed to measure network latencies, that is, time traversing the TCP/IP stack, in both software and hardware ORB approaches on the same smart camera platform. The empirical results show that using the proposed hardware ORB as client and server in separate smart camera nodes will considerably reduce the network latency up to 100 times compared to the software ORB.

  19. A novel configuration for direct internal reforming stacks

    Science.gov (United States)

    Fellows, Richard

    This paper presents a stack concept that can be applied to both molten carbonate fuel cell (MCFC) and solid oxide fuel cell (SOFC) internal reforming stacks. It employs anode recycle and allows the design of very simple system configurations, while giving enhanced efficiencies and high specific power densities. The recycle of anode exit gas to the anode inlet has previously been proposed as a means of preventing carbon deposition in direct internal reforming (DIR) stacks. When applied to a normal stack this reduces the Nernst voltages because the recycle stream is relatively depleted in hydrogen. In the concept proposed here, known as the `Smarter' stack, there are two anode exit streams, one of which is depleted, while the other is relatively undepleted. The depleted stream passes directly to the burner, and the undepleted stream is recycled to the stack inlet. By this means high Nernst voltages are achieved in the stack. The concept has been simulated and assessed for parallel-flow and cross-flow MCFC and SOFC stacks and graphs are presented showing temperature distributions. The `Smarter' stacks employ a high recycle rate resulting in a reduced natural gas concentration at the stack inlet, and this reduces or eliminates the unfavourable temperature dip. Catalyst grading can further improve the temperature distribution. The concept allows simple system configurations in which the need for fuel pre-heat is eliminated. Efficiencies are up to 10 percentage points higher than for conventional stacks with the same cell area and maximum stack temperature. The concept presented here was devised in a project part-funded by the EU, and has been adopted by the European Advanced DIR-MCFC development programme led by BCN.

  20. DAQ Hardware and software development for the ATLAS Pixel Detector

    CERN Document Server

    Stramaglia, Maria Elena; The ATLAS collaboration

    2015-01-01

    In 2014, the Pixel Detector of the ATLAS experiment was extended by about 12 million pixels with the installation of the Insertable B-Layer (IBL). Data-taking and tuning procedures have been implemented by employing newly designed read-out hardware, which supports the full detector bandwidth even for calibration. The hardware is supported by an embedded software stack running on the read-out boards. The same boards will be used to upgrade the read-out bandwidth for the two outermost layers of the ATLAS Pixel Barrel (54 million pixels). We present the IBL read-out hardware and the supporting software architecture used to calibrate and operate the 4-layer ATLAS Pixel detector. We discuss the technical implementations and status for data taking, validation of the DAQ system in recent cosmic ray data taking, in-situ calibrations, and results from additional tests in preparation for Run 2 at the LHC.

  1. Stack monitor for the Proof-of-Breeding Project

    International Nuclear Information System (INIS)

    Fergus, R.W.

    1985-01-01

    This stack monitor system is a coordinated arrangement of hardware and software to monitor four hot cells (8 stacks) during the fuel dissection for the Proof-of-Breeding Project. The cell monitors, which are located in fan lofts, contain a microprocessor, radiation detectors, air flow sensors, and air flow control equipment. Design criteria included maximizing microprocessor control while minimizing the hardware complexity. The monitors have been programmed to produce concentration and total activity release data based on several detector measurements and flow rates. Although each monitor can function independently, a microcomputer can also be used to control each cell monitor including reprogramming if necessary. All programming is software, as opposed to firmware, with machine language for compactness in the cell monitors and Basic language for adaptability in the microcomputer controller

  2. Hardware Support for Embedded Java

    DEFF Research Database (Denmark)

    Schoeberl, Martin

    2012-01-01

    The general Java runtime environment is resource hungry and unfriendly for real-time systems. To reduce the resource consumption of Java in embedded systems, direct hardware support of the language is a valuable option. Furthermore, an implementation of the Java virtual machine in hardware enables...... worst-case execution time analysis of Java programs. This chapter gives an overview of current approaches to hardware support for embedded and real-time Java....

  3. Stack Caching Using Split Data Caches

    DEFF Research Database (Denmark)

    Nielsen, Carsten; Schoeberl, Martin

    2015-01-01

    In most embedded and general purpose architectures, stack data and non-stack data is cached together, meaning that writing to or loading from the stack may expel non-stack data from the data cache. Manipulation of the stack has a different memory access pattern than that of non-stack data, showing...... higher temporal and spatial locality. We propose caching stack and non-stack data separately and develop four different stack caches that allow this separation without requiring compiler support. These are the simple, window, and prefilling with and without tag stack caches. The performance of the stack...

  4. Open Source Hardware for DIY Environmental Sensing

    Science.gov (United States)

    Aufdenkampe, A. K.; Hicks, S. D.; Damiano, S. G.; Montgomery, D. S.

    2014-12-01

    The Arduino open source electronics platform has been very popular within the DIY (Do It Yourself) community for several years, and it is now providing environmental science researchers with an inexpensive alternative to commercial data logging and transmission hardware. Here we present the designs for our latest series of custom Arduino-based dataloggers, which include wireless communication options like self-meshing radio networks and cellular phone modules. The main Arduino board uses a custom interface board to connect to various research-grade sensors to take readings of turbidity, dissolved oxygen, water depth and conductivity, soil moisture, solar radiation, and other parameters. Sensors with SDI-12 communications can be directly interfaced to the logger using our open Arduino-SDI-12 software library (https://github.com/StroudCenter/Arduino-SDI-12). Different deployment options are shown, like rugged enclosures to house the loggers and rigs for mounting the sensors in both fresh water and marine environments. After the data has been collected and transmitted by the logger, the data is received by a mySQL-PHP stack running on a web server that can be accessed from anywhere in the world. Once there, the data can be visualized on web pages or served though REST requests and Water One Flow (WOF) services. Since one of the main benefits of using open source hardware is the easy collaboration between users, we are introducing a new web platform for discussion and sharing of ideas and plans for hardware and software designs used with DIY environmental sensors and data loggers.

  5. Hardware assisted hypervisor introspection.

    Science.gov (United States)

    Shi, Jiangyong; Yang, Yuexiang; Tang, Chuan

    2016-01-01

    In this paper, we introduce hypervisor introspection, an out-of-box way to monitor the execution of hypervisors. Similar to virtual machine introspection which has been proposed to protect virtual machines in an out-of-box way over the past decade, hypervisor introspection can be used to protect hypervisors which are the basis of cloud security. Virtual machine introspection tools are usually deployed either in hypervisor or in privileged virtual machines, which might also be compromised. By utilizing hardware support including nested virtualization, EPT protection and #BP, we are able to monitor all hypercalls belongs to the virtual machines of one hypervisor, include that of privileged virtual machine and even when the hypervisor is compromised. What's more, hypercall injection method is used to simulate hypercall-based attacks and evaluate the performance of our method. Experiment results show that our method can effectively detect hypercall-based attacks with some performance cost. Lastly, we discuss our furture approaches of reducing the performance cost and preventing the compromised hypervisor from detecting the existence of our introspector, in addition with some new scenarios to apply our hypervisor introspection system.

  6. LHCb: Hardware Data Injector

    CERN Multimedia

    Delord, V; Neufeld, N

    2009-01-01

    The LHCb High Level Trigger and Data Acquisition system selects about 2 kHz of events out of the 1 MHz of events, which have been selected previously by the first-level hardware trigger. The selected events are consolidated into files and then sent to permanent storage for subsequent analysis on the Grid. The goal of the upgrade of the LHCb readout is to lift the limitation to 1 MHz. This means speeding up the DAQ to 40 MHz. Such a DAQ system will certainly employ 10 Gigabit or technologies and might also need new networking protocols: a customized TCP or proprietary solutions. A test module is being presented, which integrates in the existing LHCb infrastructure. It is a 10-Gigabit traffic generator, flexible enough to generate LHCb's raw data packets using dummy data or simulated data. These data are seen as real data coming from sub-detectors by the DAQ. The implementation is based on an FPGA using 10 Gigabit Ethernet interface. This module is integrated in the experiment control system. The architecture, ...

  7. Hardware for soft computing and soft computing for hardware

    CERN Document Server

    Nedjah, Nadia

    2014-01-01

    Single and Multi-Objective Evolutionary Computation (MOEA),  Genetic Algorithms (GAs), Artificial Neural Networks (ANNs), Fuzzy Controllers (FCs), Particle Swarm Optimization (PSO) and Ant colony Optimization (ACO) are becoming omnipresent in almost every intelligent system design. Unfortunately, the application of the majority of these techniques is complex and so requires a huge computational effort to yield useful and practical results. Therefore, dedicated hardware for evolutionary, neural and fuzzy computation is a key issue for designers. With the spread of reconfigurable hardware such as FPGAs, digital as well as analog hardware implementations of such computation become cost-effective. The idea behind this book is to offer a variety of hardware designs for soft computing techniques that can be embedded in any final product. Also, to introduce the successful application of soft computing technique to solve many hard problem encountered during the design of embedded hardware designs. Reconfigurable em...

  8. Consolidity: Stack-based systems change pathway theory elaborated

    Directory of Open Access Journals (Sweden)

    Hassen Taher Dorrah

    2014-06-01

    , programming and hardware representations of each stack layering type to serve in reducing tremendously any repetitive research efforts in future handling of similar or analogous problems of real life systems. Finally, a new global inter-related stack-based configuration in multi-stacking networks is proposed incorporating conceptually the mutual stack-based changes balancing process through assumed ideal case of lossless bi-directional transfer piping systems.

  9. Secure coupling of hardware components

    NARCIS (Netherlands)

    Hoepman, J.H.; Joosten, H.J.M.; Knobbe, J.W.

    2011-01-01

    A method and a system for securing communication between at least a first and a second hardware components of a mobile device is described. The method includes establishing a first shared secret between the first and the second hardware components during an initialization of the mobile device and,

  10. Passive stack ventilation

    Energy Technology Data Exchange (ETDEWEB)

    Palmer, J.; Parkins, L.; Shaw, P.; Watkins, R. [Databuild, Birmingham (United Kingdom)

    1994-12-31

    The adequate ventilation of houses is essential for both the occupants and the building fabric. As air-tightness standards increase, background infiltration levels decrease and extra ventilation has to be designed into the building. Passive stack ventilation has many advantages - particularly when employed in low cost housing schemes -but it is essential that it performs satisfactorily. This paper give the results from monitoring two passive stack ventilation schemes. One scheme was a retrofit into refurbished local authority houses in which a package of energy efficiency measures had been taken and condensation had been a problem. The other series of tests were conducted on a new installation in a Housing Association development. Nine houses were monitored each of which had at least two passive vents. The results show air flow rates by the passive ducts equivalent to approximately 1 room air change per hour. The air flow in the ducts was influenced by both, internal to external temperature difference and wind speed and direction. (author)

  11. Asymmetric Flexible Supercapacitor Stack

    Directory of Open Access Journals (Sweden)

    Leela Mohana Reddy A

    2008-01-01

    Full Text Available AbstractElectrical double layer supercapacitor is very significant in the field of electrical energy storage which can be the solution for the current revolution in the electronic devices like mobile phones, camera flashes which needs flexible and miniaturized energy storage device with all non-aqueous components. The multiwalled carbon nanotubes (MWNTs have been synthesized by catalytic chemical vapor deposition technique over hydrogen decrepitated Mischmetal (Mm based AB3alloy hydride. The polymer dispersed MWNTs have been obtained by insitu polymerization and the metal oxide/MWNTs were synthesized by sol-gel method. Morphological characterizations of polymer dispersed MWNTs have been carried out using scanning electron microscopy (SEM, transmission electron microscopy (TEM and HRTEM. An assymetric double supercapacitor stack has been fabricated using polymer/MWNTs and metal oxide/MWNTs coated over flexible carbon fabric as electrodes and nafion®membrane as a solid electrolyte. Electrochemical performance of the supercapacitor stack has been investigated using cyclic voltammetry, galvanostatic charge-discharge, and electrochemical impedance spectroscopy.

  12. Flight Avionics Hardware Roadmap

    Science.gov (United States)

    Hodson, Robert; McCabe, Mary; Paulick, Paul; Ruffner, Tim; Some, Rafi; Chen, Yuan; Vitalpur, Sharada; Hughes, Mark; Ling, Kuok; Redifer, Matt; hide

    2013-01-01

    As part of NASA's Avionics Steering Committee's stated goal to advance the avionics discipline ahead of program and project needs, the committee initiated a multi-Center technology roadmapping activity to create a comprehensive avionics roadmap. The roadmap is intended to strategically guide avionics technology development to effectively meet future NASA missions needs. The scope of the roadmap aligns with the twelve avionics elements defined in the ASC charter, but is subdivided into the following five areas: Foundational Technology (including devices and components), Command and Data Handling, Spaceflight Instrumentation, Communication and Tracking, and Human Interfaces.

  13. Instant BlueStacks

    CERN Document Server

    Judge, Gary

    2013-01-01

    Get to grips with a new technology, understand what it is and what it can do for you, and then get to work with the most important features and tasks. A fast-paced, example-based approach guide for learning BlueStacks.This book is for anyone with a Mac or PC who wants to run Android apps on their computer. Whether you want to play games that are freely available for Android but not your computer, or you want to try apps before you install them on a physical device or use it as a development tool, this book will show you how. No previous experience is needed as this is written in plain English

  14. ATLAS software stack on ARM64

    CERN Document Server

    Smith, Joshua Wyatt; The ATLAS collaboration

    2016-01-01

    The ATLAS experiment explores new hardware and software platforms that, in the future, may be more suited to its data intensive workloads. One such alternative hardware platform is the ARM architecture, which is designed to be extremely power efficient and is found in most smartphones and tablets. CERN openlab recently installed a small cluster of ARM 64-bit evaluation prototype servers. Each server is based on a single-socket ARM 64-bit system on a chip, with 32 Cortex-A57 cores. In total, each server has 128 GB RAM connected with four fast memory channels. This paper reports on the port of the ATLAS software stack onto these new prototype ARM64 servers. This included building the "external" packages that the ATLAS software relies on. Patches were needed to introduce this new architecture into the build as well as patches that correct for platform specific code that caused failures on non-x86 architectures. These patches were applied such that porting to further platforms will need no or only very little adj...

  15. Assessing Elementary Algebra with STACK

    Science.gov (United States)

    Sangwin, Christopher J.

    2007-01-01

    This paper concerns computer aided assessment (CAA) of mathematics in which a computer algebra system (CAS) is used to help assess students' responses to elementary algebra questions. Using a methodology of documentary analysis, we examine what is taught in elementary algebra. The STACK CAA system, http://www.stack.bham.ac.uk/, which uses the CAS…

  16. HPC Software Stack Testing Framework

    Energy Technology Data Exchange (ETDEWEB)

    2017-07-27

    The HPC Software stack testing framework (hpcswtest) is used in the INL Scientific Computing Department to test the basic sanity and integrity of the HPC Software stack (Compilers, MPI, Numerical libraries and Applications) and to quickly discover hard failures, and as a by-product it will indirectly check the HPC infrastructure (network, PBS and licensing servers).

  17. NDAS Hardware Translation Layer Development

    Science.gov (United States)

    Nazaretian, Ryan N.; Holladay, Wendy T.

    2011-01-01

    The NASA Data Acquisition System (NDAS) project is aimed to replace all DAS software for NASA s Rocket Testing Facilities. There must be a software-hardware translation layer so the software can properly talk to the hardware. Since the hardware from each test stand varies, drivers for each stand have to be made. These drivers will act more like plugins for the software. If the software is being used in E3, then the software should point to the E3 driver package. If the software is being used at B2, then the software should point to the B2 driver package. The driver packages should also be filled with hardware drivers that are universal to the DAS system. For example, since A1, A2, and B2 all use the Preston 8300AU signal conditioners, then the driver for those three stands should be the same and updated collectively.

  18. Advanced Simulation Center

    Data.gov (United States)

    Federal Laboratory Consortium — The Advanced Simulation Center consists of 10 individual facilities which provide missile and submunition hardware-in-the-loop simulation capabilities. The following...

  19. Environmental assessment of phosphogypsum stacks

    International Nuclear Information System (INIS)

    Odat, M.; Al-Attar, L.; Raja, G.; Abdul Ghany, B.

    2008-03-01

    Phosphogypsum is one of the most important by-products of phosphate fertilizer industry. It is kept in large stacks to the west of Homs city. Storing Phosphogypsum as open stacks exposed to various environmental effects, wind and rain, may cause pollution of the surrounding ecosystem (soil, plant, water and air). This study was carried out in order to assess the environmental impact of Phosphogypsum stacks on the surrounding ecosystem. The obtained results show that Phosphogypsum stacks did not increase the concentration of radionuclides, i.e. Radon-222 and Radium-226, the external exposed dose of gamma rays, as well as the concentration of heavy metals in the components of the ecosystem, soil, plant, water and air, as their concentrations did not exceed the permissible limits. However, the concentration of fluorine in the upper layer of soil, located to the east of the Phosphogypsum stacks, increased sufficiently, especially in the dry period of the year. Also, the concentration of fluoride in plants growing up near-by the Phosphogypsum stacks was too high, exceeded the permissible levels. This was reflected in poising plants and animals, feeding on the plants. Consequently, increasing the concentration of fluoride in soil and plants is the main impact of Phosphogypsum stacks on the surrounding ecosystem. Minimising this effect could be achieved by establishing a 50 meter wide protection zone surrounding the Phosphogypsum stacks, which has to be planted with non palatable trees, such as pine and cypress, forming wind barriers. Increasing the concentrations of heavy metals and fluoride in infiltrated water around the stacks was high; hence cautions must be taken to prevent its usage in any application or disposal in adjacent rivers and leaks.(author)

  20. Simulation Of Networking Protocols On Software Emulated Network Stack

    Directory of Open Access Journals (Sweden)

    Hrushikesh Nimkar

    2015-08-01

    Full Text Available With the increasing number and complexity of network based applications the need to easy configuration development and integration of network applications has taken a high precedence. Trivial activities such as configuration can be carried out efficiently if network services are software based rather than hardware based. Project aims at enabling the network engineers to easily include network functionalities into hisher configuration and define hisher own network stack without using the kernel network stack. Having thought of this we have implemented two functionalities UPNP and MDNS. The multicast Domain Name System MDNS resolves host names to IP addresses within small ad-hoc networks and without having need of special DNS server and its configuration. MDNS application provides every host with functionality to register itself to the router make a multicast DNS request and its resolution. To make adding network devices and networked programs to a network as easy as it is to plug in a piece of hardware into a PC we make use of UPnP. The devices and programs find out about the network setup and other networked devices and programs through discovery and advertisements of services and configure themselves accordingly. UPNP application provides every host with functionality of discovering services of other hosts and serving requests on demand. To implement these applications we have used snabbswitch framework which an open source virtualized ethernet networking stack.

  1. PieceStack: Toward Better Understanding of Stacked Graphs.

    Science.gov (United States)

    Wu, Tongshuang; Wu, Yingcai; Shi, Conglei; Qu, Huamin; Cui, Weiwei

    2016-02-24

    Stacked graphs have been widely adopted in various fields, because they are capable of hierarchically visualizing a set of temporal sequences as well as their aggregation. However, because of visual illusion issues, connections between overly-detailed individual layers and overly-generalized aggregation are intercepted. Consequently, information in this area has yet to be fully excavated. Thus, we present PieceStack in this paper, to reveal the relevance of stacked graphs in understanding intrinsic details of their displayed shapes. This new visual analytic design interprets the ways through which aggregations are generated with individual layers by interactively splitting and re-constructing the stacked graphs. A clustering algorithm is designed to partition stacked graphs into sub-aggregated pieces based on trend similarities of layers. We then visualize the pieces with augmented encoding to help analysts decompose and explore the graphs with respect to their interests. Case studies and a user study are conducted to demonstrate the usefulness of our technique in understanding the formation of stacked graphs.

  2. Advanced on-site power plant development technology program

    Energy Technology Data Exchange (ETDEWEB)

    None

    1989-09-01

    The subject contract was initiated in August 1982 and the technical effort concluded in April 1989. The purpose of the technical effort was to establish a technology base for 200-kW on-site fuel cell power plants. It was conducted in two phases: (1) Component evaluation; and (2) Full-scale system verification. This contract was supplemented by a Gas Research Institute (GRI) contract which was conducted in the 1981--1986 time period. This GRI contract concentrated on 200-kW scale component design, thermal management/water treatment system analysis and redesign and advanced DC/AC inverter development. The component evaluation phase generally included subscale component tests, scale-up to full-size 200-kW hardware and full-size hardware tests of the cell stack (in Tasks 1 and 2), the power conditioner (in Task 3), the heat exchangers and ancillary components (in Task 4), and the fuel processor (in Task 5). The full-size cell stack, fuel processor, heat exchangers, and ancillary components from the component development tasks were integrated into a dc system called the Verification Test Article (VTA). The VTA which was fabricated and tested under Task 7 allowed for system integration issues associated with the cell stack, fuel processor, thermal management, and water treatment subsystems to be explored under conditions similar to an actual fuel cell power plant. Key accomplishments of this contract are described. 193 figs., 37 tabs.

  3. Raspberry Pi hardware projects 1

    CERN Document Server

    Robinson, Andrew

    2013-01-01

    Learn how to take full advantage of all of Raspberry Pi's amazing features and functions-and have a blast doing it! Congratulations on becoming a proud owner of a Raspberry Pi, the credit-card-sized computer! If you're ready to dive in and start finding out what this amazing little gizmo is really capable of, this ebook is for you. Taken from the forthcoming Raspberry Pi Projects, Raspberry Pi Hardware Projects 1 contains three cool hardware projects that let you have fun with the Raspberry Pi while developing your Raspberry Pi skills. The authors - PiFace inventor, Andrew Robinson and Rasp

  4. A mathematical model of an automatic assembler to stack fuel pellets

    International Nuclear Information System (INIS)

    Jarvis, R.G.; Joynes, R.; Bretzlaff, C.I.

    1980-11-01

    Fuel elements for CANDU reactors are assembled from stacks of cylindrical UO 2 pellets, with close tolerances on lengths and diameters. Present stacking techniques involve extensive manual operations and they can be speeded up and reduced in cost by an automated device. If gamma-active fuel is handled such a device is essential. An automatic fuel pellet assembly process was modelled mathematically. The model indicated a suitable sequence of pellet manipulations to arrive at a stack length that was always within tolerance. This sequence was used as the inital input for the design of mechanical hardware. The mechanical design and the refinement of the mathematical model proceeded simultaneously. Mechanical constraints were allowed for in the model, and its optimized sequence of operations was incorporated in a microcomputer program to control the mechanical hardware. (auth)

  5. Commodity hardware and software summary

    International Nuclear Information System (INIS)

    Wolbers, S.

    1997-04-01

    A review is given of the talks and papers presented in the Commodity Hardware and Software Session at the CHEP97 conference. An examination of the trends leading to the consideration of PC's for HEP is given, and a status of the work that is being done at various HEP labs and Universities is given

  6. Foundations of digital signal processing theory, algorithms and hardware design

    CERN Document Server

    Gaydecki, Patrick

    2005-01-01

    An excellent introductory text, this book covers the basic theoretical, algorithmic and real-time aspects of digital signal processing (DSP). Detailed information is provided on off-line, real-time and DSP programming and the reader is effortlessly guided through advanced topics such as DSP hardware design, FIR and IIR filter design and difference equation manipulation.

  7. Hardware Descriptive Languages: An Efficient Approach to Device ...

    African Journals Online (AJOL)

    Contemporarily, owing to astronomical advancements in the very large scale integration (VLSI) market segments, hardware engineers are now focusing on how to develop their new digital system designs in programmable languages like very high speed integrated circuit hardwaredescription language (VHDL) and Verilog ...

  8. Hardware system for man-machine interface

    International Nuclear Information System (INIS)

    Niki, Kiyoshi; Tai, Ichirou; Hiromoto, Hiroshi; Inubushi, Hiroyuki; Makino, Teruyuki.

    1988-01-01

    Keeping pace with the recent advance of electronic technology, the adoption of the system that can present more information efficiently and in orderly form to operators has been promoted rapidly, in place of the man-machine interface for power stations, which comprises conventional indicators, switches and annunciators. By the introduction of new hardware and software, the form of the central control rooms of power stations and the sharing of roles between man and machine there have been reexamined. In this report, the way the man-machine interface in power stations should be and the requirement for the role of operators are summarized, and based on them, the role of man-machine equipment is considered, thereafter, the features and functions of new typical man-machine equipments that are used for power stations at present or can be applied are described. Finally, the example of how these equipments are applied to power plants as the actual system is shown. The role of man-machine system in power stations, recent operation monitoring and control, the sharing of roles between hardware and operators, the role of machines, the recent typical hard ware of man-machine interface, and the examples of the latest application are reported. (K.I.)

  9. Glassy carbon based supercapacitor stacks

    Energy Technology Data Exchange (ETDEWEB)

    Baertsch, M.; Braun, A.; Koetz, R.; Haas, O. [Paul Scherrer Inst. (PSI), Villigen (Switzerland)

    1997-06-01

    Considerable effort is being made to develop electrochemical double layer capacitors (EDLC) that store relatively large quantities of electrical energy and possess at the same time a high power density. Our previous work has shown that glassy carbon is suitable as a material for capacitor electrodes concerning low resistance and high capacity requirements. We present the development of bipolar electrochemical glassy carbon capacitor stacks of up to 3 V. Bipolar stacks are an efficient way to meet the high voltage and high power density requirements for traction applications. Impedance and cyclic voltammogram measurements are reported here and show the frequency response of a 1, 2, and 3 V stack. (author) 3 figs., 1 ref..

  10. The principles of computer hardware

    CERN Document Server

    Clements, Alan

    2000-01-01

    Principles of Computer Hardware, now in its third edition, provides a first course in computer architecture or computer organization for undergraduates. The book covers the core topics of such a course, including Boolean algebra and logic design; number bases and binary arithmetic; the CPU; assembly language; memory systems; and input/output methods and devices. It then goes on to cover the related topics of computer peripherals such as printers; the hardware aspects of the operating system; and data communications, and hence provides a broader overview of the subject. Its readable, tutorial-based approach makes it an accessible introduction to the subject. The book has extensive in-depth coverage of two microprocessors, one of which (the 68000) is widely used in education. All chapters in the new edition have been updated. Major updates include: powerful software simulations of digital systems to accompany the chapters on digital design; a tutorial-based introduction to assembly language, including many exam...

  11. BIOLOGICALLY INSPIRED HARDWARE CELL ARCHITECTURE

    DEFF Research Database (Denmark)

    2010-01-01

    Disclosed is a system comprising: - a reconfigurable hardware platform; - a plurality of hardware units defined as cells adapted to be programmed to provide self-organization and self-maintenance of the system by means of implementing a program expressed in a programming language defined as DNA...... language, where each cell is adapted to communicate with one or more other cells in the system, and where the system further comprises a converter program adapted to convert keywords from the DNA language to a binary DNA code; where the self-organisation comprises that the DNA code is transmitted to one...... or more of the cells, and each of the one or more cells is adapted to determine its function in the system; where if a fault occurs in a first cell and the first cell ceases to perform its function, self-maintenance is performed by that the system transmits information to the cells that the first cell has...

  12. Methodology for Assessing Reusability of Spaceflight Hardware

    Science.gov (United States)

    Childress-Thompson, Rhonda; Thomas, L. Dale; Farrington, Phillip

    2017-01-01

    In 2011 the Space Shuttle, the only Reusable Launch Vehicle (RLV) in the world, returned to earth for the final time. Upon retirement of the Space Shuttle, the United States (U.S.) no longer possessed a reusable vehicle or the capability to send American astronauts to space. With the National Aeronautics and Space Administration (NASA) out of the RLV business and now only pursuing Expendable Launch Vehicles (ELV), not only did companies within the U.S. start to actively pursue the development of either RLVs or reusable components, but entities around the world began to venture into the reusable market. For example, SpaceX and Blue Origin are developing reusable vehicles and engines. The Indian Space Research Organization is developing a reusable space plane and Airbus is exploring the possibility of reusing its first stage engines and avionics housed in the flyback propulsion unit referred to as the Advanced Expendable Launcher with Innovative engine Economy (Adeline). Even United Launch Alliance (ULA) has announced plans for eventually replacing the Atlas and Delta expendable rockets with a family of RLVs called Vulcan. Reuse can be categorized as either fully reusable, the situation in which the entire vehicle is recovered, or partially reusable such as the National Space Transportation System (NSTS) where only the Space Shuttle, Space Shuttle Main Engines (SSME), and Solid Rocket Boosters (SRB) are reused. With this influx of renewed interest in reusability for space applications, it is imperative that a systematic approach be developed for assessing the reusability of spaceflight hardware. The partially reusable NSTS offered many opportunities to glean lessons learned; however, when it came to efficient operability for reuse the Space Shuttle and its associated hardware fell short primarily because of its two to four-month turnaround time. Although there have been several attempts at designing RLVs in the past with the X-33, Venture Star and Delta Clipper

  13. Multiple Segmentation of Image Stacks

    DEFF Research Database (Denmark)

    Smets, Jonathan; Jaeger, Manfred

    2014-01-01

    We propose a method for the simultaneous construction of multiple image segmentations by combining a recently proposed “convolution of mixtures of Gaussians” model with a multi-layer hidden Markov random field structure. The resulting method constructs for a single image several, alternative...... segmentations that capture different structural elements of the image. We also apply the method to collections of images with identical pixel dimensions, which we call image stacks. Here it turns out that the method is able to both identify groups of similar images in the stack, and to provide segmentations...

  14. Simulating Small-Scale Object Stacking Using Stack Stability

    DEFF Research Database (Denmark)

    Kronborg Thomsen, Kasper; Kraus, Martin

    2015-01-01

    This paper presents an extension system to a closed-source, real-time physics engine for improving structured stacking behavior with small-scale objects such as wooden toy bricks. The proposed system was implemented and evaluated. The tests showed that the system is able to simulate several common...

  15. Hunting for hardware changes in data centres

    Science.gov (United States)

    Coelho dos Santos, M.; Steers, I.; Szebenyi, I.; Xafi, A.; Barring, O.; Bonfillou, E.

    2012-12-01

    With many servers and server parts the environment of warehouse sized data centres is increasingly complex. Server life-cycle management and hardware failures are responsible for frequent changes that need to be managed. To manage these changes better a project codenamed “hardware hound” focusing on hardware failure trending and hardware inventory has been started at CERN. By creating and using a hardware oriented data set - the inventory - with detailed information on servers and their parts as well as tracking changes to this inventory, the project aims at, for example, being able to discover trends in hardware failure rates.

  16. Hunting for hardware changes in data centres

    International Nuclear Information System (INIS)

    Coelho dos Santos, M; Steers, I; Szebenyi, I; Xafi, A; Barring, O; Bonfillou, E

    2012-01-01

    With many servers and server parts the environment of warehouse sized data centres is increasingly complex. Server life-cycle management and hardware failures are responsible for frequent changes that need to be managed. To manage these changes better a project codenamed “hardware hound” focusing on hardware failure trending and hardware inventory has been started at CERN. By creating and using a hardware oriented data set - the inventory - with detailed information on servers and their parts as well as tracking changes to this inventory, the project aims at, for example, being able to discover trends in hardware failure rates.

  17. Compressive Sensing Image Sensors-Hardware Implementation

    Directory of Open Access Journals (Sweden)

    Shahram Shirani

    2013-04-01

    Full Text Available The compressive sensing (CS paradigm uses simultaneous sensing and compression to provide an efficient image acquisition technique. The main advantages of the CS method include high resolution imaging using low resolution sensor arrays and faster image acquisition. Since the imaging philosophy in CS imagers is different from conventional imaging systems, new physical structures have been developed for cameras that use the CS technique. In this paper, a review of different hardware implementations of CS encoding in optical and electrical domains is presented. Considering the recent advances in CMOS (complementary metal–oxide–semiconductor technologies and the feasibility of performing on-chip signal processing, important practical issues in the implementation of CS in CMOS sensors are emphasized. In addition, the CS coding for video capture is discussed.

  18. Pressurized electrolysis stack with thermal expansion capability

    Science.gov (United States)

    Bourgeois, Richard Scott

    2015-07-14

    The present techniques provide systems and methods for mounting an electrolyzer stack in an outer shell so as to allow for differential thermal expansion of the electrolyzer stack and shell. Generally, an electrolyzer stack may be formed from a material with a high coefficient of thermal expansion, while the shell may be formed from a material having a lower coefficient of thermal expansion. The differences between the coefficients of thermal expansion may lead to damage to the electrolyzer stack as the shell may restrain the thermal expansion of the electrolyzer stack. To allow for the differences in thermal expansion, the electrolyzer stack may be mounted within the shell leaving a space between the electrolyzer stack and shell. The space between the electrolyzer stack and the shell may be filled with a non-conductive fluid to further equalize pressure inside and outside of the electrolyzer stack.

  19. Electrically Conductive and Protective Coating for Planar SOFC Stacks

    Energy Technology Data Exchange (ETDEWEB)

    Choi, Jung-Pyung; Stevenson, Jeffry W.

    2017-12-04

    Ferritic stainless steels are preferred interconnect materials for intermediate temperature SOFCs because of their resistance to oxidation, high formability and low cost. However, their protective oxide layer produces Cr-containing volatile species at SOFC operating temperatures and conditions, which can cause cathode poisoning. Electrically conducting spinel coatings have been developed to prevent cathode poisoning and to maintain an electrically conductive pathway through SOFC stacks. However, this coating is not compatible with the formation of stable, hermetic seals between the interconnect frame component and the ceramic cell. Thus, a new aluminizing process has been developed by PNNL to enable durable sealing, prevent Cr evaporation, and maintain electrical insulation between stack repeat units. Hence, two different types of coating need to have stable operation of SOFC stacks. This paper will focus on the electrically conductive coating process. Moreover, an advanced coating process, compatible with a non-electrically conductive coating will be

  20. Stack semantics of type theory

    DEFF Research Database (Denmark)

    Coquand, Thierry; Mannaa, Bassel; Ruch, Fabian

    2017-01-01

    We give a model of dependent type theory with one univalent universe and propositional truncation interpreting a type as a stack, generalizing the groupoid model of type theory. As an application, we show that countable choice cannot be proved in dependent type theory with one univalent universe...

  1. Multilayer Piezoelectric Stack Actuator Characterization

    Science.gov (United States)

    Sherrit, Stewart; Jones, Christopher M.; Aldrich, Jack B.; Blodget, Chad; Bao, Xioaqi; Badescu, Mircea; Bar-Cohen, Yoseph

    2008-01-01

    Future NASA missions are increasingly seeking to use actuators for precision positioning to accuracies of the order of fractions of a nanometer. For this purpose, multilayer piezoelectric stacks are being considered as actuators for driving these precision mechanisms. In this study, sets of commercial PZT stacks were tested in various AC and DC conditions at both nominal and extreme temperatures and voltages. AC signal testing included impedance, capacitance and dielectric loss factor of each actuator as a function of the small-signal driving sinusoidal frequency, and the ambient temperature. DC signal testing includes leakage current and displacement as a function of the applied DC voltage. The applied DC voltage was increased to over eight times the manufacturers' specifications to investigate the correlation between leakage current and breakdown voltage. Resonance characterization as a function of temperature was done over a temperature range of -180C to +200C which generally exceeded the manufacturers' specifications. In order to study the lifetime performance of these stacks, five actuators from one manufacturer were driven by a 60volt, 2 kHz sine-wave for ten billion cycles. The tests were performed using a Lab-View controlled automated data acquisition system that monitored the waveform of the stack electrical current and voltage. The measurements included the displacement, impedance, capacitance and leakage current and the analysis of the experimental results will be presented.

  2. Open stack thermal battery tests

    Energy Technology Data Exchange (ETDEWEB)

    Long, Kevin N. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Roberts, Christine C. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Grillet, Anne M. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Headley, Alexander J. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Fenton, Kyle [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Wong, Dennis [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Ingersoll, David [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2017-04-17

    We present selected results from a series of Open Stack thermal battery tests performed in FY14 and FY15 and discuss our findings. These tests were meant to provide validation data for the comprehensive thermal battery simulation tools currently under development in Sierra/Aria under known conditions compared with as-manufactured batteries. We are able to satisfy this original objective in the present study for some test conditions. Measurements from each test include: nominal stack pressure (axial stress) vs. time in the cold state and during battery ignition, battery voltage vs. time against a prescribed current draw with periodic pulses, and images transverse to the battery axis from which cell displacements are computed. Six battery configurations were evaluated: 3, 5, and 10 cell stacks sandwiched between 4 layers of the materials used for axial thermal insulation, either Fiberfrax Board or MinK. In addition to the results from 3, 5, and 10 cell stacks with either in-line Fiberfrax Board or MinK insulation, a series of cell-free “control” tests were performed that show the inherent settling and stress relaxation based on the interaction between the insulation and heat pellets alone.

  3. Adding large EM stack support

    KAUST Repository

    Holst, Glendon

    2016-12-01

    Serial section electron microscopy (SSEM) image stacks generated using high throughput microscopy techniques are an integral tool for investigating brain connectivity and cell morphology. FIB or 3View scanning electron microscopes easily generate gigabytes of data. In order to produce analyzable 3D dataset from the imaged volumes, efficient and reliable image segmentation is crucial. Classical manual approaches to segmentation are time consuming and labour intensive. Semiautomatic seeded watershed segmentation algorithms, such as those implemented by ilastik image processing software, are a very powerful alternative, substantially speeding up segmentation times. We have used ilastik effectively for small EM stacks – on a laptop, no less; however, ilastik was unable to carve the large EM stacks we needed to segment because its memory requirements grew too large – even for the biggest workstations we had available. For this reason, we refactored the carving module of ilastik to scale it up to large EM stacks on large workstations, and tested its efficiency. We modified the carving module, building on existing blockwise processing functionality to process data in manageable chunks that can fit within RAM (main memory). We review this refactoring work, highlighting the software architecture, design choices, modifications, and issues encountered.

  4. Hardware and software maintenance strategies for upgrading vintage computers

    International Nuclear Information System (INIS)

    Wang, B.C.; Buijs, W.J.; Banting, R.D.

    1992-01-01

    The paper focuses on the maintenance of the computer hardware and software for digital control computers (DCC). Specific design and problems related to various maintenance strategies are reviewed. A foundation was required for a reliable computer maintenance and upgrading program to provide operation of the DCC with high availability and reliability for 40 years. This involved a carefully planned and executed maintenance and upgrading program, involving complementary hardware and software strategies. The computer system was designed on a modular basis, with large sections easily replaceable, to facilitate maintenance and improve availability of the system. Advances in computer hardware have made it possible to replace DCC peripheral devices with reliable, inexpensive, and widely available components from PC-based systems (PC = personal computer). By providing a high speed link from the DCC to a PC, it is now possible to use many commercial software packages to process data from the plant. 1 fig

  5. Design and analysis of the PBFA-Z vacuum insulator stack

    International Nuclear Information System (INIS)

    Shoup, R.W.; Long, F.; Martin, T.H.; Stygar, W.A.; Spielman, R.B.; Struve, K.W.; Mostrom, M.; Corcoran, P.; Smith, I.

    1996-01-01

    Sandia is developing PBFA-Z, a 20-MA driver for z-pinch experiments by replacing the water lines, insulator stack, and MITLs on PBFA II with new hardware. The design of the vacuum insulator stack was dictated by the drive voltage, the electric field stress and grading requirements, the water line and MITL interface requirements, and the machine operations and maintenance requirements. The insulator stack will consist of four separate modules, each of a different design because of different voltage drive and hardware interface requirements. The shape of the components in each module, i.e., grading rings, insulator rings, flux excluders, anode and cathode conductors, and the design of the water line and MITL interfaces, were optimized by using the electrostatic analysis codes, ELECTRO and JASON. The time-dependent performance of the insulator stack was evaluated using IVORY, a 2-D PIC code. The insulator stack design and present the results of the ELECTRO and IVORY analyses are described. (author). 2 tabs., 9 figs., 3 refs

  6. Threats and Challenges in Reconfigurable Hardware Security

    OpenAIRE

    Kastner, Ryan; Huffmire, Ted

    2008-01-01

    Computing systems designed using reconfigurable hardware are now used in many sensitive applications, where security is of utmost importance. Unfortunately, a strong notion of security is not currently present in FPGA hardware and software design flows. In the following, we discuss the security implications of using reconfigurable hardware in sensitive applications, and outline problems, attacks, solutions and topics for future research.

  7. GOSH! A roadmap for open-source science hardware

    CERN Document Server

    Stefania Pandolfi

    2016-01-01

    The goal of the Gathering for Open Science Hardware (GOSH! 2016), held from 2 to 5 March 2016 at IdeaSquare, was to lay the foundations of the open-source hardware for science movement.   The participants in the GOSH! 2016 meeting gathered in IdeaSquare. (Image: GOSH Community) “Despite advances in technology, many scientific innovations are held back because of a lack of affordable and customisable hardware,” says François Grey, a professor at the University of Geneva and coordinator of Citizen Cyberlab – a partnership between CERN, the UN Institute for Training and Research and the University of Geneva – which co-organised the GOSH! 2016 workshop. “This scarcity of accessible science hardware is particularly obstructive for citizen science groups and humanitarian organisations that don’t have the same economic means as a well-funded institution.” Instead, open sourcing science hardware co...

  8. Hardware complications in scoliosis surgery

    Energy Technology Data Exchange (ETDEWEB)

    Bagchi, Kaushik; Mohaideen, Ahamed [Department of Orthopaedic Surgery and Musculoskeletal Services, Maimonides Medical Center, Brooklyn, NY (United States); Thomson, Jeffrey D. [Connecticut Children' s Medical Center, Department of Orthopaedics, Hartford, CT (United States); Foley, Christopher L. [Department of Radiology, Connecticut Children' s Medical Center, Hartford, Connecticut (United States)

    2002-07-01

    Background: Scoliosis surgery has undergone a dramatic evolution over the past 20 years with the advent of new surgical techniques and sophisticated instrumentation. Surgeons have realized scoliosis is a complex multiplanar deformity that requires thorough knowledge of spinal anatomy and pathophysiology in order to manage patients afflicted by it. Nonoperative modalities such as bracing and casting still play roles in the treatment of scoliosis; however, it is the operative treatment that has revolutionized the treatment of this deformity that affects millions worldwide. As part of the evolution of scoliosis surgery, newer implants have resulted in improved outcomes with respect to deformity correction, reliability of fixation, and paucity of complications. Each technique and implant has its own set of unique complications, and the surgeon must appreciate these when planning surgery. Materials and methods: Various surgical techniques and types of instrumentation typically used in scoliosis surgery are briefly discussed. Though scoliosis surgery is associated with a wide variety of complications, only those that directly involve the hardware are discussed. The current literature is reviewed and several illustrative cases of patients treated for scoliosis at the Connecticut Children's Medical Center and the Newington Children's Hospital in Connecticut are briefly presented. Conclusion: Spine surgeons and radiologists should be familiar with the different types of instrumentation in the treatment of scoliosis. Furthermore, they should recognize the clinical and roentgenographic signs of hardware failure as part of prompt and effective treatment of such complications. (orig.)

  9. Travel Software using GPU Hardware

    CERN Document Server

    Szalwinski, Chris M; Dimov, Veliko Atanasov; CERN. Geneva. ATS Department

    2015-01-01

    Travel is the main multi-particle tracking code being used at CERN for the beam dynamics calculations through hadron and ion linear accelerators. It uses two routines for the calculation of space charge forces, namely, rings of charges and point-to-point. This report presents the studies to improve the performance of Travel using GPU hardware. The studies showed that the performance of Travel with the point-to-point simulations of space-charge effects can be speeded up at least 72 times using current GPU hardware. Simple recompilation of the source code using an Intel compiler can improve performance at least 4 times without GPU support. The limited memory of the GPU is the bottleneck. Two algorithms were investigated on this point: repeated computation and tiling. The repeating computation algorithm is simpler and is the currently recommended solution. The tiling algorithm was more complicated and degraded performance. Both build and test instructions for the parallelized version of the software are inclu...

  10. Development and durability of SOFC stacks

    Energy Technology Data Exchange (ETDEWEB)

    Beeaff, D.; Dinesen, A.R.; Mikkelsen, Lars; Nielsen, Karsten A.; Solvang, M.; Hendriksen, Peter V.

    2004-12-01

    The present project is a part of the Danish SOFC programme, which has the overall aim of establishing a Danish production of SOFC - cells, stacks and systems for economical and environmentally friendly power production. The aim of the present project was to develop and demonstrate (on a small scale, few cells, few thousand hours) a durable, thermally cyclable stack with high performance at 750 deg. C. Good progress towards this target has been made and demonstrated at the level of stack-elements (one cell between two interconnects) or small stacks (3 5 cells). Three different stacks or stack-elements have been operated for periods exceeding 3000 hr. The work has covered development of stack-components (seals, interconnects, coatings, contact layers), establishment of procedures for stack assembly and initiation, and detailed electrical characterisation with the aims of identifying performance limiting factors as well as long term durability. Further, post test investigations have been carried out to identify possible degradation mechanisms. (BA)

  11. Automatic Optimization of Hardware Accelerators for Image Processing

    OpenAIRE

    Reiche, Oliver; Häublein, Konrad; Reichenbach, Marc; Hannig, Frank; Teich, Jürgen; Fey, Dietmar

    2015-01-01

    In the domain of image processing, often real-time constraints are required. In particular, in safety-critical applications, such as X-ray computed tomography in medical imaging or advanced driver assistance systems in the automotive domain, timing is of utmost importance. A common approach to maintain real-time capabilities of compute-intensive applications is to offload those computations to dedicated accelerator hardware, such as Field Programmable Gate Arrays (FPGAs). Programming such arc...

  12. Lightweight Stacks of Direct Methanol Fuel Cells

    Science.gov (United States)

    Narayanan, Sekharipuram; Valdez, Thomas

    2004-01-01

    An improved design concept for direct methanol fuel cells makes it possible to construct fuel-cell stacks that can weigh as little as one-third as much as do conventional bipolar fuel-cell stacks of equal power. The structural-support components of the improved cells and stacks can be made of relatively inexpensive plastics. Moreover, in comparison with conventional bipolar fuel-cell stacks, the improved fuel-cell stacks can be assembled, disassembled, and diagnosed for malfunctions more easily. These improvements are expected to bring portable direct methanol fuel cells and stacks closer to commercialization. In a conventional bipolar fuel-cell stack, the cells are interspersed with bipolar plates (also called biplates), which are structural components that serve to interconnect the cells and distribute the reactants (methanol and air). The cells and biplates are sandwiched between metal end plates. Usually, the stack is held together under pressure by tie rods that clamp the end plates. The bipolar stack configuration offers the advantage of very low internal electrical resistance. However, when the power output of a stack is only a few watts, the very low internal resistance of a bipolar stack is not absolutely necessary for keeping the internal power loss acceptably low.

  13. Solid Oxide Fuel Cell Stack Diagnostics

    DEFF Research Database (Denmark)

    Mosbæk, Rasmus Rode; Barfod, Rasmus Gottrup

    . An operating stack is subject to compositional gradients in the gaseous reactant streams, and temperature gradients across each cell and across the stack, which complicates detailed analysis. Several experimental stacks from Topsoe Fuel Cell A/S were characterized using Electrochemical Impedance Spectroscopy...... (EIS). The stack measurement geometry was optimized for EIS by careful selection of the placement of current feeds and voltage probes in order to minimize measurement errors. It was demonstrated that with the improved placement of current feeds and voltage probes it is possible to separate the loss...... in the hydrogen fuel gas supplied to the stack. EIS was used to examine the long-term behavior and monitor the evolution of the impedance of each of the repeating units and the whole stack. The observed impedance was analyzed in detail for one of the repeating units and the whole stack and the losses reported...

  14. Optimized electrode configuration for current-in-plane characterization of magnetic tunnel junction stacks

    DEFF Research Database (Denmark)

    Cagliani, Alberto; Kjær, Daniel; Østerberg, Frederik Westergaard

    2017-01-01

    The current-in-plane tunneling technique (CIPT) has been a crucial tool in the development of magnetic tunnel junction stacks suitable for magnetic random access memories (MRAM) for more than a decade. The MRAM development has now reached the maturity to make the transition from the R&D phase to ...... of electrodes on a multi-electrode probe to reach up to 36% improvement on the repeatability for the resistance area product and the tunneling magnetoresistance measurement, without any hardware modification....

  15. Actuators Using Piezoelectric Stacks and Displacement Enhancers

    Science.gov (United States)

    Bar-Cohen, Yoseph; Sherrit, Stewart; Bao, Xiaoqi; Badescu, Mircea; Lee, Hyeong Jae; Walkenmeyer, Phillip; Lih, Shyh-Shiuh

    2015-01-01

    Actuators are used to drive all active mechanisms including machines, robots, and manipulators to name a few. The actuators are responsible for moving, manipulating, displacing, pushing and executing any action that is needed by the mechanism. There are many types and principles of actuation that are responsible for these movements ranging from electromagnetic, electroactive, thermo-mechanic, piezoelectric, electrostrictive etc. Actuators are readily available from commercial producers but there is a great need for reducing their size, increasing their efficiency and reducing their weight. Studies at JPL’s Non Destructive Evaluation and Advanced Actuators (NDEAA) Laboratory have been focused on the use of piezoelectric stacks and novel designs taking advantage of piezoelectric’s potential to provide high torque/force density actuation and high electromechanical conversion efficiency. The actuators/motors that have been developed and reviewed in this paper are operated by various horn configurations as well as the use of pre-stress flexures that make them thermally stable and increases their coupling efficiency. The use of monolithic designs that pre-stress the piezoelectric stack eliminates the use of compression stress bolt. These designs enable the embedding of developed solid-state motors/actuators in any structure with the only macroscopically moving parts are the rotor or the linear translator. Finite element modeling and design tools were used to determine the requirements and operation parameters and the results were used to simulate, design and fabricate novel actuators/motors. The developed actuators and performance will be described and discussed in this paper.

  16. Black Hole Spectroscopy with Coherent Mode Stacking.

    Science.gov (United States)

    Yang, Huan; Yagi, Kent; Blackman, Jonathan; Lehner, Luis; Paschalidis, Vasileios; Pretorius, Frans; Yunes, Nicolás

    2017-04-21

    The measurement of multiple ringdown modes in gravitational waves from binary black hole mergers will allow for testing the fundamental properties of black holes in general relativity and to constrain modified theories of gravity. To enhance the ability of Advanced LIGO/Virgo to perform such tasks, we propose a coherent mode stacking method to search for a chosen target mode within a collection of multiple merger events. We first rescale each signal so that the target mode in each of them has the same frequency and then sum the waveforms constructively. A crucial element to realize this coherent superposition is to make use of a priori information extracted from the inspiral-merger phase of each event. To illustrate the method, we perform a study with simulated events targeting the ℓ=m=3 ringdown mode of the remnant black holes. We show that this method can significantly boost the signal-to-noise ratio of the collective target mode compared to that of the single loudest event. Using current estimates of merger rates, we show that it is likely that advanced-era detectors can measure this collective ringdown mode with one year of coincident data gathered at design sensitivity.

  17. Open-source hardware for medical devices.

    Science.gov (United States)

    Niezen, Gerrit; Eslambolchilar, Parisa; Thimbleby, Harold

    2016-04-01

    Open-source hardware is hardware whose design is made publicly available so anyone can study, modify, distribute, make and sell the design or the hardware based on that design. Some open-source hardware projects can potentially be used as active medical devices. The open-source approach offers a unique combination of advantages, including reducing costs and faster innovation. This article compares 10 of open-source healthcare projects in terms of how easy it is to obtain the required components and build the device.

  18. Hardware Resource Allocation for Hardware/Software Partitioning in the LYCOS System

    DEFF Research Database (Denmark)

    Grode, Jesper Nicolai Riis; Knudsen, Peter Voigt; Madsen, Jan

    1998-01-01

    as a designer's/design tool's aid to generate good hardware allocations for use in hardware/software partitioning. The algorithm has been implemented in a tool under the LYCOS system. The results show that the allocations produced by the algorithm come close to the best allocations obtained by exhaustive search.......This paper presents a novel hardware resource allocation technique for hardware/software partitioning. It allocates hardware resources to the hardware data-path using information such as data-dependencies between operations in the application, and profiling information. The algorithm is useful...

  19. Hardware Resource Allocation for Hardware/Software Partitioning in the LYCOS System

    DEFF Research Database (Denmark)

    Grode, Jesper Nicolai Riis; Madsen, Jan; Knudsen, Peter Voigt

    1998-01-01

    as a designer's/design tool's aid to generate good hardware allocations for use in hardware/software partitioning. The algorithm has been implemented in a tool under the LYCOS system. The results show that the allocations produced by the algorithm come close to the best allocations obtained by exhaustive search......This paper presents a novel hardware resource allocation technique for hardware/software partitioning. It allocates hardware resources to the hardware data-path using information such as data-dependencies between operations in the application, and profiling information. The algorithm is useful...

  20. On-Chip Reconfigurable Hardware Accelerators for Popcount Computations

    Directory of Open Access Journals (Sweden)

    Valery Sklyarov

    2016-01-01

    Full Text Available Popcount computations are widely used in such areas as combinatorial search, data processing, statistical analysis, and bio- and chemical informatics. In many practical problems the size of initial data is very large and increase in throughput is important. The paper suggests two types of hardware accelerators that are (1 designed in FPGAs and (2 implemented in Zynq-7000 all programmable systems-on-chip with partitioning of algorithms that use popcounts between software of ARM Cortex-A9 processing system and advanced programmable logic. A three-level system architecture that includes a general-purpose computer, the problem-specific ARM, and reconfigurable hardware is then proposed. The results of experiments and comparisons with existing benchmarks demonstrate that although throughput of popcount computations is increased in FPGA-based designs interacting with general-purpose computers, communication overheads (in experiments with PCI express are significant and actual advantages can be gained if not only popcount but also other types of relevant computations are implemented in hardware. The comparison of software/hardware designs for Zynq-7000 all programmable systems-on-chip with pure software implementations in the same Zynq-7000 devices demonstrates increase in performance by a factor ranging from 5 to 19 (taking into account all the involved communication overheads between the programmable logic and the processing systems.

  1. Nanorobot Hardware Architecture for Medical Defense

    Directory of Open Access Journals (Sweden)

    Luiz C. Kretly

    2008-05-01

    Full Text Available This work presents a new approach with details on the integrated platform and hardware architecture for nanorobots application in epidemic control, which should enable real time in vivo prognosis of biohazard infection. The recent developments in the field of nanoelectronics, with transducers progressively shrinking down to smaller sizes through nanotechnology and carbon nanotubes, are expected to result in innovative biomedical instrumentation possibilities, with new therapies and efficient diagnosis methodologies. The use of integrated systems, smart biosensors, and programmable nanodevices are advancing nanoelectronics, enabling the progressive research and development of molecular machines. It should provide high precision pervasive biomedical monitoring with real time data transmission. The use of nanobioelectronics as embedded systems is the natural pathway towards manufacturing methodology to achieve nanorobot applications out of laboratories sooner as possible. To demonstrate the practical application of medical nanorobotics, a 3D simulation based on clinical data addresses how to integrate communication with nanorobots using RFID, mobile phones, and satellites, applied to long distance ubiquitous surveillance and health monitoring for troops in conflict zones. Therefore, the current model can also be used to prevent and save a population against the case of some targeted epidemic disease.

  2. Vertically stacked nanocellulose tactile sensor.

    Science.gov (United States)

    Jung, Minhyun; Kim, Kyungkwan; Kim, Bumjin; Lee, Kwang-Jae; Kang, Jae-Wook; Jeon, Sanghun

    2017-11-16

    Paper-based electronic devices are attracting considerable attention, because the paper platform has unique attributes such as flexibility and eco-friendliness. Here we report on what is claimed to be the firstly fully integrated vertically-stacked nanocellulose-based tactile sensor, which is capable of simultaneously sensing temperature and pressure. The pressure and temperature sensors are operated using different principles and are stacked vertically, thereby minimizing the interference effect. For the pressure sensor, which utilizes the piezoresistance principle under pressure, the conducting electrode was inkjet printed on the TEMPO-oxidized-nanocellulose patterned with micro-sized pyramids, and the counter electrode was placed on the nanocellulose film. The pressure sensor has a high sensitivity over a wide range (500 Pa-3 kPa) and a high durability of 10 4 loading/unloading cycles. The temperature sensor combines various materials such as poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonate) (PEDOT:PSS), silver nanoparticles (AgNPs) and carbon nanotubes (CNTs) to form a thermocouple on the upper nanocellulose layer. The thermoelectric-based temperature sensors generate a thermoelectric voltage output of 1.7 mV for a temperature difference of 125 K. Our 5 × 5 tactile sensor arrays show a fast response, negligible interference, and durable sensing performance.

  3. Solid Oxide Cell and Stack Testing, Safety and Quality Assurance (SOCTESQA)

    DEFF Research Database (Denmark)

    Auer, C.; Lang, M.; Couturier, K.

    2015-01-01

    The market penetration of fuel and electrolysis cell energy systems in Europe requires the development of reliable assessment, testing and prediction of performance and durability of solid oxide cells and stacks (SOC). To advance in this field the EU-project “SOCTESQA” was launched in May 2014....... Partners from different countries in Europe and one external party from Singapore are working together to develop uniform and industry wide test procedures and protocols for SOC cell/stack assembly. In this project new application fields which are based on the operation of the SOC cell/stack assembly...

  4. Generalized data stacking programming model with applications

    Directory of Open Access Journals (Sweden)

    Hala Samir Elhadidy

    2016-09-01

    Full Text Available Recent researches have shown that, everywhere in various sciences the systems are following stacked-based stored change behavior when subjected to events or varying environments “on and above” their normal situations. This paper presents a generalized data stack programming (GDSP model which is developed to describe the system changes under varying environment. These changes which are captured with different ways such as sensor reading are stored in matrices. Extraction algorithm and identification technique are proposed to extract the different layers between images and identify the stack class the object follows; respectively. The general multi-stacking network is presented including the interaction between various stack-based layering of some applications. The experiments prove that the concept of stack matrix gives average accuracy of 99.45%.

  5. Flexural characteristics of a stack leg

    International Nuclear Information System (INIS)

    Cook, J.

    1979-06-01

    A 30 MV tandem Van de Graaff accelerator is at present under construction at Daresbury Laboratory. The insulating stack of the machine is of modular construction, each module being 860 mm in length. Each live section stack module contains 8 insulating legs mounted between bulkhead rings. The design, fabrication (from glass discs bonded to stainless steel discs using an epoxy film adhesive) and testing of the stack legs is described. (U.K.)

  6. Hydrogen Embrittlement And Stacking-Fault Energies

    Science.gov (United States)

    Parr, R. A.; Johnson, M. H.; Davis, J. H.; Oh, T. K.

    1988-01-01

    Embrittlement in Ni/Cu alloys appears related to stacking-fault porbabilities. Report describes attempt to show a correlation between stacking-fault energy of different Ni/Cu alloys and susceptibility to hydrogen embrittlement. Correlation could lead to more fundamental understanding and method of predicting susceptibility of given Ni/Cu alloy form stacking-fault energies calculated from X-ray diffraction measurements.

  7. Air-Cooled Stack Freeze Tolerance Freeze Failure Modes and Freeze Tolerance Strategies for GenDriveTM Material Handling Application Systems and Stacks Final Scientific Report

    Energy Technology Data Exchange (ETDEWEB)

    Hancock, David, W.

    2012-02-14

    Air-cooled stack technology offers the potential for a simpler system architecture (versus liquid-cooled) for applications below 4 kilowatts. The combined cooling and cathode air allows for a reduction in part count and hence a lower cost solution. However, efficient heat rejection challenges escalate as power and ambient temperature increase. For applications in ambient temperatures below freezing, the air-cooled approach has additional challenges associated with not overcooling the fuel cell stack. The focus of this project was freeze tolerance while maintaining all other stack and system requirements. Through this project, Plug Power advanced the state of the art in technology for air-cooled PEM fuel cell stacks and related GenDrive material handling application fuel cell systems. This was accomplished through a collaborative work plan to improve freeze tolerance and mitigate freeze-thaw effect failure modes within innovative material handling equipment fuel cell systems designed for use in freezer forklift applications. Freeze tolerance remains an area where additional research and understanding can help fuel cells to become commercially viable. This project evaluated both stack level and system level solutions to improve fuel cell stack freeze tolerance. At this time, the most cost effective solutions are at the system level. The freeze mitigation strategies developed over the course of this project could be used to drive fuel cell commercialization. The fuel cell system studied in this project was Plug Power's commercially available GenDrive platform providing battery replacement for equipment in the material handling industry. The fuel cell stacks were Ballard's commercially available FCvelocity 9SSL (9SSL) liquid-cooled PEM fuel cell stack and FCvelocity 1020ACS (Mk1020) air-cooled PEM fuel cell stack.

  8. Comparative Modal Analysis of Sieve Hardware Designs

    Science.gov (United States)

    Thompson, Nathaniel

    2012-01-01

    The CMTB Thwacker hardware operates as a testbed analogue for the Flight Thwacker and Sieve components of CHIMRA, a device on the Curiosity Rover. The sieve separates particles with a diameter smaller than 150 microns for delivery to onboard science instruments. The sieving behavior of the testbed hardware should be similar to the Flight hardware for the results to be meaningful. The elastodynamic behavior of both sieves was studied analytically using the Rayleigh Ritz method in conjunction with classical plate theory. Finite element models were used to determine the mode shapes of both designs, and comparisons between the natural frequencies and mode shapes were made. The analysis predicts that the performance of the CMTB Thwacker will closely resemble the performance of the Flight Thwacker within the expected steady state operating regime. Excitations of the testbed hardware that will mimic the flight hardware were recommended, as were those that will improve the efficiency of the sieving process.

  9. Stacks of SPS Dipole Magnets

    CERN Multimedia

    1974-01-01

    Stacks of SPS Dipole Magnets ready for installation in the tunnel. The SPS uses a separated function lattice with dipoles for bending and quadrupoles for focusing. The 6.2 m long normal conducting dipoles are of H-type with coils that are bent-up at the ends. There are two types, B1 (total of 360) and B2 (384). Both are for a maximum field of 1.8 Tesla and have the same outer dimensions (450x800 mm2 vxh) but with different gaps (B1: 39x129 mm2, B2: 52x92 mm2) tailored to the beam size. The yoke, made of 1.5 mm thick laminations, consists of an upper and a lower half joined together in the median plane once the coils have been inserted.

  10. California dreaming?[PEM stacks

    Energy Technology Data Exchange (ETDEWEB)

    Crosse, J.

    2002-06-01

    Hyundai's Santa Fe FCEV will be on sale by the end of 2002. Hyundai uses PEM stacks that are manufactured by International Fuel Cells (IFC), a division of United Technologies. Santa Fe is equipped with a 65 kW electric powertrain of Enova systems and Shell's new gasoline reformer called Hydrogen Source. Eugene Jang, Senior Engineer - Fuel Cell and Materials at Hyundai stated that the compressor related losses on IFC system are below 3%. The maximum speed offered by the vehicle is estimated as 123km/hr while the petrol equivalent fuel consumption is quoted between 5.6L/100 km and 4.8L/100 km. Santa Fe is a compact vehicle offering better steering response and a pleasant drive. (author)

  11. Management of a CFD organization in support of space hardware development

    Science.gov (United States)

    Schutzenhofer, L. A.; Mcconnaughey, P. K.; Mcconnaughey, H. V.; Wang, T. S.

    1991-01-01

    The management strategy of NASA-Marshall's CFD branch in support of space hardware development and code validation implements various elements of total quality management. The strategy encompasses (1) a teaming strategy which focuses on the most pertinent problem, (2) quick-turnaround analysis, (3) the evaluation of retrofittable design options through sensitivity analysis, and (4) coordination between the chief engineer and the hardware contractors. Advanced-technology concepts are being addressed via the definition of technology-development projects whose products are transferable to hardware programs and the integration of research activities with industry, government agencies, and universities, on the basis of the 'consortium' concept.

  12. Stacking technology for a space constrained microsystem

    DEFF Research Database (Denmark)

    Heschel, Matthias; Kuhmann, Jochen Friedrich; Bouwstra, Siebe

    1998-01-01

    In this paper we present a stacking technology for an integrated packaging of an intelligent transducer which is formed by a micromachined silicon transducer and an integrated circuit chip. Transducer and circuitry are stacked on top of each other with an intermediate chip in between. The bonding...

  13. Vector Fields and Flows on Differentiable Stacks

    DEFF Research Database (Denmark)

    A. Hepworth, Richard

    2009-01-01

    This paper introduces the notions of vector field and flow on a general differentiable stack. Our main theorem states that the flow of a vector field on a compact proper differentiable stack exists and is unique up to a uniquely determined 2-cell. This extends the usual result on the existence...... of vector fields....

  14. 40 CFR 61.44 - Stack sampling.

    Science.gov (United States)

    2010-07-01

    ... 40 Protection of Environment 8 2010-07-01 2010-07-01 false Stack sampling. 61.44 Section 61.44 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED) NATIONAL... Firing § 61.44 Stack sampling. (a) Sources subject to § 61.42(b) shall be continuously sampled, during...

  15. Learning OpenStack networking (Neutron)

    CERN Document Server

    Denton, James

    2014-01-01

    If you are an OpenStack-based cloud operator with experience in OpenStack Compute and nova-network but are new to Neutron networking, then this book is for you. Some networking experience is recommended, and a physical network infrastructure is required to provide connectivity to instances and other network resources configured in the book.

  16. Project W-420 stack monitoring system upgrades

    International Nuclear Information System (INIS)

    CARPENTER, K.E.

    1999-01-01

    This project will execute the design, procurement, construction, startup, and turnover activities for upgrades to the stack monitoring system on selected Tank Waste Remediation System (TWRS) ventilation systems. In this plan, the technical, schedule, and cost baselines are identified, and the roles and responsibilities of project participants are defined for managing the Stack Monitoring System Upgrades, Project W-420

  17. On the "stacking fault" in copper

    NARCIS (Netherlands)

    Fransens, J.R.; Pleiter, F

    2003-01-01

    The results of a perturbed gamma-gamma angular correlations experiment on In-111 implanted into a properly cut single crystal of copper show that the defect known in the literature as "stacking fault" is not a planar faulted loop but a stacking fault tetrahedron with a size of 10-50 Angstrom.

  18. Status of MCFC stack technology at IHI

    Energy Technology Data Exchange (ETDEWEB)

    Hosaka, M.; Morita, T.; Matsuyama, T.; Otsubo, M. [Ishikawajima-Harima Heavy Industries Co., Ltd., Tokyo (Japan)

    1996-12-31

    The molten carbonate fuel cell (MCFC) is a promising option for highly efficient power generation possible to enlarge. IHI has been studying parallel flow MCFC stacks with internal manifolds that have a large electrode area of 1m{sup 2}. IHI will make two 250 kW stacks for MW plant, and has begun to make cell components for the plant. To improve the stability of stack, soft corrugated plate used in the separator has been developed, and a way of gathering current from stacks has been studied. The DC output potential of the plant being very high, the design of electric insulation will be very important. A 20 kW short stack test was conducted in 1995 FY to certificate some of the improvements and components of the MW plant. These activities are presented below.

  19. Hardware-in-the-Loop Testing

    Data.gov (United States)

    Federal Laboratory Consortium — RTC has a suite of Hardware-in-the Loop facilities that include three operational facilities that provide performance assessment and production acceptance testing of...

  20. The impact of stack geometry and mean pressure on cold end temperature of stack in thermoacoustic refrigeration systems

    Science.gov (United States)

    Wantha, Channarong

    2018-02-01

    This paper reports on the experimental and simulation studies of the influence of stack geometries and different mean pressures on the cold end temperature of the stack in the thermoacoustic refrigeration system. The stack geometry was tested, including spiral stack, circular pore stack and pin array stack. The results of this study show that the mean pressure of the gas in the system has a significant impact on the cold end temperature of the stack. The mean pressure of the gas in the system corresponds to thermal penetration depth, which results in a better cold end temperature of the stack. The results also show that the cold end temperature of the pin array stack decreases more than that of the spiral stack and circular pore stack geometry by approximately 63% and 70%, respectively. In addition, the thermal area and viscous area of the stack are analyzed to explain the results of such temperatures of thermoacoustic stacks.

  1. Cooperative communications hardware, channel and PHY

    CERN Document Server

    Dohler, Mischa

    2010-01-01

    Facilitating Cooperation for Wireless Systems Cooperative Communications: Hardware, Channel & PHY focuses on issues pertaining to the PHY layer of wireless communication networks, offering a rigorous taxonomy of this dispersed field, along with a range of application scenarios for cooperative and distributed schemes, demonstrating how these techniques can be employed. The authors discuss hardware, complexity and power consumption issues, which are vital for understanding what can be realized at the PHY layer, showing how wireless channel models differ from more traditional

  2. Designing Secure Systems on Reconfigurable Hardware

    OpenAIRE

    Huffmire, Ted; Brotherton, Brett; Callegari, Nick; Valamehr, Jonathan; White, Jeff; Kastner, Ryan; Sherwood, Ted

    2008-01-01

    The extremely high cost of custom ASIC fabrication makes FPGAs an attractive alternative for deployment of custom hardware. Embedded systems based on reconfigurable hardware integrate many functions onto a single device. Since embedded designers often have no choice but to use soft IP cores obtained from third parties, the cores operate at different trust levels, resulting in mixed trust designs. The goal of this project is to evaluate recently proposed security primitives for reconfigurab...

  3. IDD Archival Hardware Architecture and Workflow

    Energy Technology Data Exchange (ETDEWEB)

    Mendonsa, D; Nekoogar, F; Martz, H

    2008-10-09

    This document describes the functionality of every component in the DHS/IDD archival and storage hardware system shown in Fig. 1. The document describes steps by step process of image data being received at LLNL then being processed and made available to authorized personnel and collaborators. Throughout this document references will be made to one of two figures, Fig. 1 describing the elements of the architecture and the Fig. 2 describing the workflow and how the project utilizes the available hardware.

  4. Electrochemical Characterization and Degradation Analysis of Large SOFC Stacks by Impedance Spectroscopy

    DEFF Research Database (Denmark)

    Mosbæk, Rasmus Rode; Hjelm, Johan; Barfod, R.

    2013-01-01

    As solid oxide fuel cell (SOFC) technology is moving closer to a commercial break through, lifetime limiting factors, and methods to measure the “state-of-health” of operating cells and stacks are becoming of increasing interest. This requires application of advanced methods for detailed electroc......As solid oxide fuel cell (SOFC) technology is moving closer to a commercial break through, lifetime limiting factors, and methods to measure the “state-of-health” of operating cells and stacks are becoming of increasing interest. This requires application of advanced methods for detailed...... electrochemical characterization during operation. An experimental stack with low ohmic resistance from Topsoe Fuel Cell A/S was characterized in detail using electrochemical impedance spectroscopy (EIS). An investigation of the optimal geometrical placement of the current feeds and voltage probes was carried out...... in order to minimize measurement errors caused by stray impedances. Three different stack geometries were investigated by impedance spectroscopy and the stack geometry with the minimum effect of stray impedances was selected. A 13-cell experimental SOFC stack was tested during 2,500 h of operation...

  5. Density of oxidation-induced stacking faults in damaged silicon

    NARCIS (Netherlands)

    Kuper, F.G.; Hosson, J.Th.M. De; Verwey, J.F.

    1986-01-01

    A model for the relation between density and length of oxidation-induced stacking faults on damaged silicon surfaces is proposed, based on interactions of stacking faults with dislocations and neighboring stacking faults. The model agrees with experiments.

  6. Tunable electro-optic filter stack

    Energy Technology Data Exchange (ETDEWEB)

    Fontecchio, Adam K.; Shriyan, Sameet K.; Bellingham, Alyssa

    2017-09-05

    A holographic polymer dispersed liquid crystal (HPDLC) tunable filter exhibits switching times of no more than 20 microseconds. The HPDLC tunable filter can be utilized in a variety of applications. An HPDLC tunable filter stack can be utilized in a hyperspectral imaging system capable of spectrally multiplexing hyperspectral imaging data acquired while the hyperspectral imaging system is airborne. HPDLC tunable filter stacks can be utilized in high speed switchable optical shielding systems, for example as a coating for a visor or an aircraft canopy. These HPDLC tunable filter stacks can be fabricated using a spin coating apparatus and associated fabrication methods.

  7. Dynamical stability of slip-stacking particles

    Energy Technology Data Exchange (ETDEWEB)

    Eldred, Jeffrey; Zwaska, Robert

    2014-09-01

    We study the stability of particles in slip-stacking configuration, used to nearly double proton beam intensity at Fermilab. We introduce universal area factors to calculate the available phase space area for any set of beam parameters without individual simulation. We find perturbative solutions for stable particle trajectories. We establish Booster beam quality requirements to achieve 97% slip-stacking efficiency. We show that slip-stacking dynamics directly correspond to the driven pendulum and to the system of two standing-wave traps moving with respect to each other.

  8. Flight Hardware Virtualization for On-Board Science Data Processing

    Data.gov (United States)

    National Aeronautics and Space Administration — Utilize Hardware Virtualization technology to benefit on-board science data processing by investigating new real time embedded Hardware Virtualization solutions and...

  9. Wearable solar cells by stacking textile electrodes.

    Science.gov (United States)

    Pan, Shaowu; Yang, Zhibin; Chen, Peining; Deng, Jue; Li, Houpu; Peng, Huisheng

    2014-06-10

    A new and general method to produce flexible, wearable dye-sensitized solar cell (DSC) textiles by the stacking of two textile electrodes has been developed. A metal-textile electrode that was made from micrometer-sized metal wires was used as a working electrode, while the textile counter electrode was woven from highly aligned carbon nanotube fibers with high mechanical strengths and electrical conductivities. The resulting DSC textile exhibited a high energy conversion efficiency that was well maintained under bending. Compared with the woven DSC textiles that are based on wire-shaped devices, this stacked DSC textile unexpectedly exhibited a unique deformation from a rectangle to a parallelogram, which is highly desired in portable electronics. This lightweight and wearable stacked DSC textile is superior to conventional planar DSCs because the energy conversion efficiency of the stacked DSC textile was independent of the angle of incident light. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  10. STACKING FAULT ENERGY IN HIGH MANGANESE ALLOYS

    Directory of Open Access Journals (Sweden)

    Eva Mazancová

    2009-04-01

    Full Text Available Stacking fault energy of high manganese alloys (marked as TWIP and TRIPLEX is an important parameter determining deformation mechanism type realized in above mentioned alloys. Stacking fault energy level can be asserted with a gliding of partial and/or full dislocations, b gliding mechanism and twinning deformation process in connection with increasing of fracture deformation level (deformation elongation and with increasing of simultaneously realized work hardening proces., c gliding mechanism and deformation induced e-martensite formation. In contribution calculated stacking fault energies are presented for various chemical compositions of high manganese alloys. Stacking fault energy dependences on manganese, carbon, iron and alluminium contents are presented. Results are confronted with some accessible papers.The aim of work is to deepen knowledge of presented data. The TWIP and TRIPLEX alloys can be held for promissing new automotive materials.

  11. Stack-Based Typed Assembly Language

    National Research Council Canada - National Science Library

    Morrisett, Greg

    1998-01-01

    .... This paper also formalizes the typing connection between CPS based compilation and stack based compilation and illustrates how STAL can formally model calling conventions by specifying them as formal translations of source function types to STAL types.

  12. Characterization of Piezoelectric Stacks for Space Applications

    Science.gov (United States)

    Sherrit, Stewart; Jones, Christopher; Aldrich, Jack; Blodget, Chad; Bao, Xiaoqi; Badescu, Mircea; Bar-Cohen, Yoseph

    2008-01-01

    Future NASA missions are increasingly seeking to actuate mechanisms to precision levels in the nanometer range and below. Co-fired multilayer piezoelectric stacks offer the required actuation precision that is needed for such mechanisms. To obtain performance statistics and determine reliability for extended use, sets of commercial PZT stacks were tested in various AC and DC conditions at both nominal and high temperatures and voltages. In order to study the lifetime performance of these stacks, five actuators were driven sinusoidally for up to ten billion cycles. An automated data acquisition system was developed and implemented to monitor each stack's electrical current and voltage waveforms over the life of the test. As part of the monitoring tests, the displacement, impedance, capacitance and leakage current were measured to assess the operation degradation. This paper presents some of the results of this effort.

  13. The stack on software and sovereignty

    CERN Document Server

    Bratton, Benjamin H

    2016-01-01

    A comprehensive political and design theory of planetary-scale computation proposing that The Stack -- an accidental megastructure -- is both a technological apparatus and a model for a new geopolitical architecture.

  14. Stacking for Cosmic Magnetism with SKA Surveys

    OpenAIRE

    Stil, J. M.; Keller, B. W.

    2015-01-01

    Stacking polarized radio emission in SKA surveys provides statistical information on large samples that is not accessible otherwise due to limitations in sensitivity, source statistics in small fields, and averaging over frequency (including Faraday synthesis). Polarization is a special case because one obvious source of stacking targets is the Stokes I source catalog, possibly in combination with external catalogs, for example an SKA HI survey or a non-radio survey. We point out the signific...

  15. Environmental Modeling Framework using Stacked Gaussian Processes

    OpenAIRE

    Abdelfatah, Kareem; Bao, Junshu; Terejanu, Gabriel

    2016-01-01

    A network of independently trained Gaussian processes (StackedGP) is introduced to obtain predictions of quantities of interest with quantified uncertainties. The main applications of the StackedGP framework are to integrate different datasets through model composition, enhance predictions of quantities of interest through a cascade of intermediate predictions, and to propagate uncertainties through emulated dynamical systems driven by uncertain forcing variables. By using analytical first an...

  16. Generalized data stacking programming model with applications

    OpenAIRE

    Hala Samir Elhadidy; Rawya Yehia Rizk; Hassen Taher Dorrah

    2016-01-01

    Recent researches have shown that, everywhere in various sciences the systems are following stacked-based stored change behavior when subjected to events or varying environments “on and above” their normal situations. This paper presents a generalized data stack programming (GDSP) model which is developed to describe the system changes under varying environment. These changes which are captured with different ways such as sensor reading are stored in matrices. Extraction algorithm and identif...

  17. Representations of stack triangulations in the plane

    OpenAIRE

    Selig, Thomas

    2013-01-01

    Stack triangulations appear as natural objects when defining an increasing family of triangulations by successive additions of vertices. We consider two different probability distributions for such objects. We represent, or "draw" these random stack triangulations in the plane $\\R^2$ and study the asymptotic properties of these drawings, viewed as random compact metric spaces. We also look at the occupation measure of the vertices, and show that for these two distributions it converges to som...

  18. Detailed Electrochemical Characterisation of Large SOFC Stacks

    DEFF Research Database (Denmark)

    Mosbæk, Rasmus Rode; Hjelm, Johan; Barfod, R.

    2012-01-01

    As solid oxide fuel cell (SOFC) technology is moving closer to a commercial break through, lifetime limiting factors, determination of the limits of safe operation and methods to measure the “state-of-health” of operating cells and stacks are becoming of increasing interest. This requires applica...... out at a range of ac perturbation amplitudes in order to investigate linearity of the response and the signal-to-noise ratio. Separation of the measured impedance into series and polarisation resistances was possible....... to analyse in detail. Today one is forced to use mathematical modelling to extract information about existing gradients and cell resistances in operating stacks, as mature techniques for local probing are not available. This type of spatially resolved information is essential for model refinement...... and validation, and helps to further the technological stack development. Further, more detailed information obtained from operating stacks is essential for developing appropriate process monitoring and control protocols for stack and system developers. An experimental stack with low ohmic resistance from Topsoe...

  19. A Hardware Abstraction Layer in Java

    DEFF Research Database (Denmark)

    Schoeberl, Martin; Korsholm, Stephan; Kalibera, Tomas

    2011-01-01

    Embedded systems use specialized hardware devices to interact with their environment, and since they have to be dependable, it is attractive to use a modern, type-safe programming language like Java to develop programs for them. Standard Java, as a platform-independent language, delegates access...... to devices, direct memory access, and interrupt handling to some underlying operating system or kernel, but in the embedded systems domain resources are scarce and a Java Virtual Machine (JVM) without an underlying middleware is an attractive architecture. The contribution of this article is a proposal...... for Java packages with hardware objects and interrupt handlers that interface to such a JVM. We provide implementations of the proposal directly in hardware, as extensions of standard interpreters, and finally with an operating system middleware. The latter solution is mainly seen as a migration path...

  20. MFTF supervisory control and diagnostics system hardware

    International Nuclear Information System (INIS)

    Butner, D.N.

    1979-01-01

    The Supervisory Control and Diagnostics System (SCDS) for the Mirror Fusion Test Facility (MFTF) is a multiprocessor minicomputer system designed so that for most single-point failures, the hardware may be quickly reconfigured to provide continued operation of the experiment. The system is made up of nine Perkin-Elmer computers - a mixture of 8/32's and 7/32's. Each computer has ports on a shared memory system consisting of two independent shared memory modules. Each processor can signal other processors through hardware external to the shared memory. The system communicates with the Local Control and Instrumentation System, which consists of approximately 65 microprocessors. Each of the six system processors has facilities for communicating with a group of microprocessors; the groups consist of from four to 24 microprocessors. There are hardware switches so that if an SCDS processor communicating with a group of microprocessors fails, another SCDS processor takes over the communication

  1. Hardware Accelerators for Elliptic Curve Cryptography

    Directory of Open Access Journals (Sweden)

    C. Puttmann

    2008-05-01

    Full Text Available In this paper we explore different hardware accelerators for cryptography based on elliptic curves. Furthermore, we present a hierarchical multiprocessor system-on-chip (MPSoC platform that can be used for fast integration and evaluation of novel hardware accelerators. In respect of two application scenarios the hardware accelerators are coupled at different hierarchy levels of the MPSoC platform. The whole system is implemented in a state of the art 65 nm standard cell technology. Moreover, an FPGA-based rapid prototyping system for fast system verification is presented. Finally, a metric to analyze the resource efficiency by means of chip area, execution time and energy consumption is introduced.

  2. Hardware Acceleration of Adaptive Neural Algorithms.

    Energy Technology Data Exchange (ETDEWEB)

    James, Conrad D. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2017-11-01

    As tradit ional numerical computing has faced challenges, researchers have turned towards alternative computing approaches to reduce power - per - computation metrics and improve algorithm performance. Here, we describe an approach towards non - conventional computing that strengthens the connection between machine learning and neuroscience concepts. The Hardware Acceleration of Adaptive Neural Algorithms (HAANA) project ha s develop ed neural machine learning algorithms and hardware for applications in image processing and cybersecurity. While machine learning methods are effective at extracting relevant features from many types of data, the effectiveness of these algorithms degrades when subjected to real - world conditions. Our team has generated novel neural - inspired approa ches to improve the resiliency and adaptability of machine learning algorithms. In addition, we have also designed and fabricated hardware architectures and microelectronic devices specifically tuned towards the training and inference operations of neural - inspired algorithms. Finally, our multi - scale simulation framework allows us to assess the impact of microelectronic device properties on algorithm performance.

  3. An evaluation of parallel optimization for OpenSolaris Network Stack

    Energy Technology Data Exchange (ETDEWEB)

    Zou, Hongbo; Wu, Wenji; /Fermilab; Sun, Xian-He; /IIT, Chicago; DeMar, Phil; Crawford, Matt; /Fermilab

    2010-10-01

    Computing is now shifting towards multiprocessing. The fundamental goal of multiprocessing is improved performance through the introduction of additional hardware threads or cores (referred to as 'cores' for simplicity). Modern network stacks can exploit parallel cores to allow either message-based parallelism or connection-based parallelism as a means to enhance performance. OpenSolaris has redesigned and parallelized to better utilize additional cores. Three special technologies, named Softring Set, Soft ring and Squeue are introduced in OpenSolaris for stack parallelization. In this paper, we study the OpenSolaris packet receiving process and its core parallelism optimization techniques. Experiment results show that these techniques allow OpenSolaris to achieve better network I/O performance in multiprocessing environments; however, network stack parallelization has also brought extra overheads for system. An effective and efficient network I/O optimization in multiprocessing environments is required to cross all levers of the network stack from network interface to application.

  4. Development of an automatic subsea blowout preventer stack control system using PLC based SCADA.

    Science.gov (United States)

    Cai, Baoping; Liu, Yonghong; Liu, Zengkai; Wang, Fei; Tian, Xiaojie; Zhang, Yanzhen

    2012-01-01

    An extremely reliable remote control system for subsea blowout preventer stack is developed based on the off-the-shelf triple modular redundancy system. To meet a high reliability requirement, various redundancy techniques such as controller redundancy, bus redundancy and network redundancy are used to design the system hardware architecture. The control logic, human-machine interface graphical design and redundant databases are developed by using the off-the-shelf software. A series of experiments were performed in laboratory to test the subsea blowout preventer stack control system. The results showed that the tested subsea blowout preventer functions could be executed successfully. For the faults of programmable logic controllers, discrete input groups and analog input groups, the control system could give correct alarms in the human-machine interface. Copyright © 2011 ISA. Published by Elsevier Ltd. All rights reserved.

  5. Creating a Rackspace and NASA Nebula compatible cloud using the OpenStack project (Invited)

    Science.gov (United States)

    Clark, R.

    2010-12-01

    NASA and Rackspace have both provided technology to the OpenStack that allows anyone to create a private Infrastructure as a Service (IaaS) cloud using open source software and commodity hardware. OpenStack is designed and developed completely in the open and with an open governance process. NASA donated Nova, which powers the compute portion of NASA Nebula Cloud Computing Platform, and Rackspace donated Swift, which powers Rackspace Cloud Files. The project is now in continuous development by NASA, Rackspace, and hundreds of other participants. When you create a private cloud using Openstack, you will have the ability to easily interact with your private cloud, a government cloud, and an ecosystem of public cloud providers, using the same API.

  6. Human Centered Hardware Modeling and Collaboration

    Science.gov (United States)

    Stambolian Damon; Lawrence, Brad; Stelges, Katrine; Henderson, Gena

    2013-01-01

    In order to collaborate engineering designs among NASA Centers and customers, to in clude hardware and human activities from multiple remote locations, live human-centered modeling and collaboration across several sites has been successfully facilitated by Kennedy Space Center. The focus of this paper includes innovative a pproaches to engineering design analyses and training, along with research being conducted to apply new technologies for tracking, immersing, and evaluating humans as well as rocket, vehic le, component, or faci lity hardware utilizing high resolution cameras, motion tracking, ergonomic analysis, biomedical monitoring, wor k instruction integration, head-mounted displays, and other innovative human-system integration modeling, simulation, and collaboration applications.

  7. Hardware Accelerated Sequence Alignment with Traceback

    Directory of Open Access Journals (Sweden)

    Scott Lloyd

    2009-01-01

    in a timely manner. Known methods to accelerate alignment on reconfigurable hardware only address sequence comparison, limit the sequence length, or exhibit memory and I/O bottlenecks. A space-efficient, global sequence alignment algorithm and architecture is presented that accelerates the forward scan and traceback in hardware without memory and I/O limitations. With 256 processing elements in FPGA technology, a performance gain over 300 times that of a desktop computer is demonstrated on sequence lengths of 16000. For greater performance, the architecture is scalable to more processing elements.

  8. From Multi to Single Stack Automata

    Science.gov (United States)

    Atig, Mohamed Faouzi

    We investigate the issue of reducing the verification problem of multi-stack machines to the one for single-stack machines. For instance, elegant (and practically efficient) algorithms for bounded-context switch analysis of multi-pushdown systems have been recently defined based on reductions to the reachability problem of (single-stack) pushdown systems [10,18]. In this paper, we extend this view to both bounded-phase visibly pushdown automata (BVMPA) [16] and ordered multi-pushdown automata (OMPA) [1] by showing that each of their emptiness problem can be reduced to the one for a class of single-stack machines. For these reductions, we introduce effective generalized pushdown automata (EGPA) where operations on stacks are (1) pop the top symbol of the stack, and (2) push a word in some (effectively) given set of words L over the stack alphabet, assuming that L is in some class of languages for which checking whether L intersects regular languages is decidable. We show that the automata-based saturation procedure for computing the set of predecessors in standard pushdown automata can be extended to prove that for EGPA too the set of all predecessors of a regular set of configurations is an effectively constructible regular set. Our reductions from OMPA and BVMPA to EGPA, together with the reachability analysis procedure for EGPA, allow to provide conceptually simple algorithms for checking the emptiness problem for each of these models, and to significantly simplify the proofs for their 2ETIME upper bounds (matching their lower-bounds).

  9. Start-Stop Test Procedures on the PEMFC Stack Level

    DEFF Research Database (Denmark)

    Mitzel, Jens; Nygaard, Frederik; Veltzé, Sune

    The test is addressed to investigate the influence on stack durability of a long stop followed by a restart of a stack. Long stop should be defined as a stop in which the anodic compartment is fully filled by air due to stack leakages. In systems, leakage level of the stack is low and time to fil...

  10. A Self-Provisioning Mechanism in OpenStack for IoT Devices.

    Science.gov (United States)

    Solano, Antonio; Dormido, Raquel; Duro, Natividad; Sánchez, Juan Miguel

    2016-08-17

    The aim of this paper is to introduce a plug-and-play mechanism for an Internet of Things (IoT) device to instantiate a Software as a Service (SaaS) application in a private cloud, built up with OpenStack. The SaaS application is the digital avatar of a physical object connected to Internet. As a proof of concept, a Vending Machine is retrofitted and connected to Internet with and Arduino Open Hardware device. Once the self-configuration mechanism is completed, it is possible to order a product from a mobile communication device.

  11. A Self-Provisioning Mechanism in OpenStack for IoT Devices

    Directory of Open Access Journals (Sweden)

    Antonio Solano

    2016-08-01

    Full Text Available The aim of this paper is to introduce a plug-and-play mechanism for an Internet of Things (IoT device to instantiate a Software as a Service (SaaS application in a private cloud, built up with OpenStack. The SaaS application is the digital avatar of a physical object connected to Internet. As a proof of concept, a Vending Machine is retrofitted and connected to Internet with and Arduino Open Hardware device. Once the self-configuration mechanism is completed, it is possible to order a product from a mobile communication device.

  12. Monitoring and Hardware Management for Critical Fusion Plasma Instrumentation

    Directory of Open Access Journals (Sweden)

    Carvalho Paulo F.

    2018-01-01

    Full Text Available Controlled nuclear fusion aims to obtain energy by particles collision confined inside a nuclear reactor (Tokamak. These ionized particles, heavier isotopes of hydrogen, are the main elements inside of plasma that is kept at high temperatures (millions of Celsius degrees. Due to high temperatures and magnetic confinement, plasma is exposed to several sources of instabilities which require a set of procedures by the control and data acquisition systems throughout fusion experiments processes. Control and data acquisition systems often used in nuclear fusion experiments are based on the Advanced Telecommunication Computer Architecture (AdvancedTCA® standard introduced by the Peripheral Component Interconnect Industrial Manufacturers Group (PICMG®, to meet the demands of telecommunications that require large amount of data (TB transportation at high transfer rates (Gb/s, to ensure high availability including features such as reliability, serviceability and redundancy. For efficient plasma control, systems are required to collect large amounts of data, process it, store for later analysis, make critical decisions in real time and provide status reports either from the experience itself or the electronic instrumentation involved. Moreover, systems should also ensure the correct handling of detected anomalies and identified faults, notify the system operator of occurred events, decisions taken to acknowledge and implemented changes. Therefore, for everything to work in compliance with specifications it is required that the instrumentation includes hardware management and monitoring mechanisms for both hardware and software. These mechanisms should check the system status by reading sensors, manage events, update inventory databases with hardware system components in use and maintenance, store collected information, update firmware and installed software modules, configure and handle alarms to detect possible system failures and prevent emergency

  13. Monitoring and Hardware Management for Critical Fusion Plasma Instrumentation

    Science.gov (United States)

    Carvalho, Paulo F.; Santos, Bruno; Correia, Miguel; Combo, Álvaro M.; Rodrigues, AntÓnio P.; Pereira, Rita C.; Fernandes, Ana; Cruz, Nuno; Sousa, Jorge; Carvalho, Bernardo B.; Batista, AntÓnio J. N.; Correia, Carlos M. B. A.; Gonçalves, Bruno

    2018-01-01

    Controlled nuclear fusion aims to obtain energy by particles collision confined inside a nuclear reactor (Tokamak). These ionized particles, heavier isotopes of hydrogen, are the main elements inside of plasma that is kept at high temperatures (millions of Celsius degrees). Due to high temperatures and magnetic confinement, plasma is exposed to several sources of instabilities which require a set of procedures by the control and data acquisition systems throughout fusion experiments processes. Control and data acquisition systems often used in nuclear fusion experiments are based on the Advanced Telecommunication Computer Architecture (AdvancedTCA®) standard introduced by the Peripheral Component Interconnect Industrial Manufacturers Group (PICMG®), to meet the demands of telecommunications that require large amount of data (TB) transportation at high transfer rates (Gb/s), to ensure high availability including features such as reliability, serviceability and redundancy. For efficient plasma control, systems are required to collect large amounts of data, process it, store for later analysis, make critical decisions in real time and provide status reports either from the experience itself or the electronic instrumentation involved. Moreover, systems should also ensure the correct handling of detected anomalies and identified faults, notify the system operator of occurred events, decisions taken to acknowledge and implemented changes. Therefore, for everything to work in compliance with specifications it is required that the instrumentation includes hardware management and monitoring mechanisms for both hardware and software. These mechanisms should check the system status by reading sensors, manage events, update inventory databases with hardware system components in use and maintenance, store collected information, update firmware and installed software modules, configure and handle alarms to detect possible system failures and prevent emergency scenarios

  14. A polymer electrolyte fuel cell stack for stationary power generation from hydrogen fuel

    Energy Technology Data Exchange (ETDEWEB)

    Gottesfeld, S. [Los Alamos National Lab., NM (United States)

    1995-09-01

    The fuel cell is the most efficient device for the conversion of hydrogen fuel to electric power. As such, the fuel cell represents a key element in efforts to demonstrate and implement hydrogen fuel utilization for electric power generation. The low temperature, polymer electrolyte membrane fuel cell (PEMFC) has recently been identified as an attractive option for stationary power generation, based on the relatively simple and benign materials employed, the zero-emission character of the device, and the expected high power density, high reliability and low cost. However, a PEMFC stack fueled by hydrogen with the combined properties of low cost, high performance and high reliability has not yet been demonstrated. Demonstration of such a stack will remove a significant barrier to implementation of this advanced technology for electric power generation from hydrogen. Work done in the past at LANL on the development of components and materials, particularly on advanced membrane/electrode assemblies (MEAs), has contributed significantly to the capability to demonstrate in the foreseeable future a PEMFC stack with the combined characteristics described above. A joint effort between LANL and an industrial stack manufacturer will result in the demonstration of such a fuel cell stack for stationary power generation. The stack could operate on hydrogen fuel derived from either natural gas or from renewable sources. The technical plan includes collaboration with a stack manufacturer (CRADA). It stresses the special requirements from a PEMFC in stationary power generation, particularly maximization of the energy conversion efficiency, extension of useful life to the 10 hours time scale and tolerance to impurities from the reforming of natural gas.

  15. Computer hardware for radiologists: Part I

    International Nuclear Information System (INIS)

    Indrajit, IK; Alam, A

    2010-01-01

    Computers are an integral part of modern radiology practice. They are used in different radiology modalities to acquire, process, and postprocess imaging data. They have had a dramatic influence on contemporary radiology practice. Their impact has extended further with the emergence of Digital Imaging and Communications in Medicine (DICOM), Picture Archiving and Communication System (PACS), Radiology information system (RIS) technology, and Teleradiology. A basic overview of computer hardware relevant to radiology practice is presented here. The key hardware components in a computer are the motherboard, central processor unit (CPU), the chipset, the random access memory (RAM), the memory modules, bus, storage drives, and ports. The personnel computer (PC) has a rectangular case that contains important components called hardware, many of which are integrated circuits (ICs). The fiberglass motherboard is the main printed circuit board and has a variety of important hardware mounted on it, which are connected by electrical pathways called “buses”. The CPU is the largest IC on the motherboard and contains millions of transistors. Its principal function is to execute “programs”. A Pentium ® 4 CPU has transistors that execute a billion instructions per second. The chipset is completely different from the CPU in design and function; it controls data and interaction of buses between the motherboard and the CPU. Memory (RAM) is fundamentally semiconductor chips storing data and instructions for access by a CPU. RAM is classified by storage capacity, access speed, data rate, and configuration

  16. Computer hardware for radiologists: Part I

    Directory of Open Access Journals (Sweden)

    Indrajit I

    2010-01-01

    Full Text Available Computers are an integral part of modern radiology practice. They are used in different radiology modalities to acquire, process, and postprocess imaging data. They have had a dramatic influence on contemporary radiology practice. Their impact has extended further with the emergence of Digital Imaging and Communications in Medicine (DICOM, Picture Archiving and Communication System (PACS, Radiology information system (RIS technology, and Teleradiology. A basic overview of computer hardware relevant to radiology practice is presented here. The key hardware components in a computer are the motherboard, central processor unit (CPU, the chipset, the random access memory (RAM, the memory modules, bus, storage drives, and ports. The personnel computer (PC has a rectangular case that contains important components called hardware, many of which are integrated circuits (ICs. The fiberglass motherboard is the main printed circuit board and has a variety of important hardware mounted on it, which are connected by electrical pathways called "buses". The CPU is the largest IC on the motherboard and contains millions of transistors. Its principal function is to execute "programs". A Pentium® 4 CPU has transistors that execute a billion instructions per second. The chipset is completely different from the CPU in design and function; it controls data and interaction of buses between the motherboard and the CPU. Memory (RAM is fundamentally semiconductor chips storing data and instructions for access by a CPU. RAM is classified by storage capacity, access speed, data rate, and configuration.

  17. Environmental Control System Software & Hardware Development

    Science.gov (United States)

    Vargas, Daniel Eduardo

    2017-01-01

    ECS hardware: (1) Provides controlled purge to SLS Rocket and Orion spacecraft. (2) Provide mission-focused engineering products and services. ECS software: (1) NASA requires Compact Unique Identifiers (CUIs); fixed-length identifier used to identify information items. (2) CUI structure; composed of nine semantic fields that aid the user in recognizing its purpose.

  18. Femoral neck fracture following hardware removal.

    Science.gov (United States)

    Shaer, James A; Hileman, Barbara M; Newcomer, Jill E; Hanes, Marina C

    2012-01-16

    It is uncommon for femoral neck fractures to occur after proximal femoral hardware removal because age, osteoporosis, and technical error are often noted as the causes for this type of fracture. However, excessive alcohol consumption and failure to comply with protected weight bearing for 6 weeks increases the risk of femoral neck fractures.This article describes a case of a 57-year-old man with a high-energy ipsilateral inter-trochanteric hip fracture, comminuted distal third femoral shaft fracture, and displaced lateral tibial plateau fracture. Cephalomedullary fixation was used to fix the ipsilateral femur fractures after medical stabilization and evaluation of the patient. The patient healed clinically and radiographically at 6 months. Despite conservative treatment for painful proximal hardware, elective hip screw removal was performed 22.5 months after injury. Seven weeks later, he sustained a nontraumatic femoral neck fracture.In this case, it is unlikely that the femoral neck fracture occurred as a result of hardware removal. We assumed that, in addition to the patient's alcohol abuse and tobacco use, stress fractures may have attributed to the femoral neck fracture. We recommend using a shorter hip screw to minimize hardware prominence or possibly off-label use of an injectable bone filler, such as calcium phosphate cement. Copyright 2012, SLACK Incorporated.

  19. QCE : A Simulator for Quantum Computer Hardware

    NARCIS (Netherlands)

    Michielsen, Kristel; Raedt, Hans De

    2003-01-01

    The Quantum Computer Emulator (QCE) described in this paper consists of a simulator of a generic, general purpose quantum computer and a graphical user interface. The latter is used to control the simulator, to define the hardware of the quantum computer and to debug and execute quantum algorithms.

  20. The fast Amsterdam multiprocessor (FAMP) system hardware

    International Nuclear Information System (INIS)

    Hertzberger, L.O.; Kieft, G.; Kisielewski, B.; Wiggers, L.W.; Engster, C.; Koningsveld, L. van

    1981-01-01

    The architecture of a multiprocessor system is described that will be used for on-line filter and second stage trigger applications. The system is based on the MC 68000 microprocessor from Motorola. Emphasis is paid to hardware aspects, in particular the modularity, processor communication and interfacing, whereas the system software and the applications will be described in separate articles. (orig.)

  1. Microprocessor Design Using Hardware Description Language

    Science.gov (United States)

    Mita, Rosario; Palumbo, Gaetano

    2008-01-01

    The following paper has been conceived to deal with the contents of some lectures aimed at enhancing courses on digital electronic, microelectronic or VLSI systems. Those lectures show how to use a hardware description language (HDL), such as the VHDL, to specify, design and verify a custom microprocessor. The general goal of this work is to teach…

  2. CAMAC high energy physics electronics hardware

    International Nuclear Information System (INIS)

    Kolpakov, I.F.

    1977-01-01

    CAMAC hardware for high energy physics large spectrometers and control systems is reviewed as is the development of CAMAC modules at the High Energy Laboratory, JINR (Dubna). The total number of crates used at the Laboratory is 179. The number of CAMAC modules of 120 different types exceeds 1700. The principles of organization and the structure of developed CAMAC systems are described. (author)

  3. Enabling Open Hardware through FOSS tools

    CERN Multimedia

    CERN. Geneva

    2016-01-01

    Software developers often take open file formats and tools for granted. When you publish code on github, you do not ask yourself if somebody will be able to open it and modify it. We need the same freedom in the open hardware world, to make it truly accessible for everyone.

  4. Hardware Acceleration of Sparse Cognitive Algorithms

    Science.gov (United States)

    2016-05-01

    is clear that these emerging algorithms that can support unsupervised , or lightly supervised learning , as well as incremental learning , map poorly...distribution unlimited. 8.0 CONCLUDING REMARKS These emerging algorithms that can support unsupervised , or lightly supervised learning , as well as...15. SUBJECT TERMS Cortical Algorithms; Machine Learning ; Hardware; VLSI; ASIC 16. SECURITY CLASSIFICATION OF: 17. LIMITATION OF ABSTRACT: SAR

  5. Levitation characteristics of HTS tape stacks

    Energy Technology Data Exchange (ETDEWEB)

    Pokrovskiy, S. V.; Ermolaev, Y. S.; Rudnev, I. A. [National Research Nuclear University MEPhI (Moscow Engineering Physics Institute), Moscow (Russian Federation)

    2015-03-15

    Due to the considerable development of the technology of second generation high-temperature superconductors and a significant improvement in their mechanical and transport properties in the last few years it is possible to use HTS tapes in the magnetic levitation systems. The advantages of tapes on a metal substrate as compared with bulk YBCO material primarily in the strength, and the possibility of optimizing the convenience of manufacturing elements of levitation systems. In the present report presents the results of the magnetic levitation force measurements between the stack of HTS tapes containing of tapes and NdFeB permanent magnet in the FC and ZFC regimes. It was found a non- linear dependence of the levitation force from the height of the array of stack in both modes: linear growth at small thickness gives way to flattening and constant at large number of tapes in the stack. Established that the levitation force of stacks comparable to that of bulk samples. The numerical calculations using finite element method showed that without the screening of the applied field the levitation force of the bulk superconductor and the layered superconductor stack with a critical current of tapes increased by the filling factor is exactly the same, and taking into account the screening force slightly different.

  6. Forced Air-Breathing PEMFC Stacks

    Directory of Open Access Journals (Sweden)

    K. S. Dhathathreyan

    2012-01-01

    Full Text Available Air-breathing fuel cells have a great potential as power sources for various electronic devices. They differ from conventional fuel cells in which the cells take up oxygen from ambient air by active or passive methods. The air flow occurs through the channels due to concentration and temperature gradient between the cell and the ambient conditions. However developing a stack is very difficult as the individual cell performance may not be uniform. In order to make such a system more realistic, an open-cathode forced air-breathing stacks were developed by making appropriate channel dimensions for the air flow for uniform performance in a stack. At CFCT-ARCI (Centre for Fuel Cell Technology-ARC International we have developed forced air-breathing fuel cell stacks with varying capacity ranging from 50 watts to 1500 watts. The performance of the stack was analysed based on the air flow, humidity, stability, and so forth, The major advantage of the system is the reduced number of bipolar plates and thereby reduction in volume and weight. However, the thermal management is a challenge due to the non-availability of sufficient air flow to remove the heat from the system during continuous operation. These results will be discussed in this paper.

  7. Contemporary sample stacking in analytical electrophoresis.

    Science.gov (United States)

    Malá, Zdena; Šlampová, Andrea; Křivánková, Ludmila; Gebauer, Petr; Boček, Petr

    2015-01-01

    This contribution is a methodological review of the publications about the topic from the last 2 years. Therefore, it is primarily organized according to the methods and procedures used in surveyed papers and the origin and type of sample and specification of analytes form the secondary structure. The introductory part about navigation in the architecture of stacking brings a brief characterization of the various stacking methods, with the description of mutual links to each other and important differences among them. The main body of the article brings a survey of publications organized according to main principles of stacking and then according to the origin and type of the sample. Provided that the paper cited gave explicitly the relevant data, information about the BGE(s) used, procedure, detector employed, and reached LOD and/or concentration effect is given. The papers where the procedure used is a combination of diverse fragments and parts of various stacking techniques are mentioned in a special section on combined techniques. The concluding remarks in the final part of the review evaluate present state of art and the trends of sample stacking in CE. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  8. Enhanced dynamical stability with harmonic slip stacking

    Directory of Open Access Journals (Sweden)

    Jeffrey Eldred

    2016-10-01

    Full Text Available We develop a configuration of radio-frequency (rf cavities to dramatically improve the performance of slip stacking. Slip stacking is an accumulation technique used at Fermilab to nearly double proton intensity by maintaining two beams of different momenta in the same storage ring. The two particle beams are longitudinally focused in the Recycler by two 53 MHz 100 kV rf cavities with a small frequency difference between them. We propose an additional 106 MHz 20 kV rf cavity with a frequency at the double the average of the upper and lower main rf frequencies. We show the harmonic rf cavity cancels out the resonances generated between the two main rf cavities and we derive the relationship between the harmonic rf voltage and the main rf voltage. We find the area factors that can be used to calculate the available phase space area for any set of beam parameters without individual simulation. We establish Booster beam quality requirements to achieve 99% slip stacking efficiency. We measure the longitudinal distribution of the Booster beam and use it to generate a realistic beam model for slip stacking simulation. We demonstrate that the harmonic rf cavity can not only reduce particle loss during slip stacking, but also reduce the final longitudinal emittance.

  9. Development of a driver information and warning system with vehicle hardware-in-the-loop simulations

    NARCIS (Netherlands)

    Gietelink, O.J.; Ploeg, J.; Schutter, B. de; Verhaegen, M.

    2009-01-01

    This paper presents a new method for the design and validation of advanced driver assistance systems (ADASs). With vehicle hardware-in-the-loop (VeHIL) simulations the development process, and more specifically the validation phase, of intelligent vehicles is carried out safer, cheaper, and more

  10. A Cost-Effective Approach to Hardware-in-the-Loop Simulation

    DEFF Research Database (Denmark)

    Pedersen, Mikkel Melters; Hansen, M. R.; Ballebye, M.

    2012-01-01

    This paper presents an approach for developing cost effective hardware-in-the- loop (HIL) simulation platforms for the use in controller software test and development. The approach is aimed at the many smaller manufacturers of e.g. mobile hydraulic machinery, which often do not have very advanced...

  11. Using Normal Bases for Compact Hardware Implementations of the AES S-Box

    NARCIS (Netherlands)

    Nikova, Svetla; Rijmen, Vincent; Schläffer, Martin; Ostrovsky, Rafail; De Prisco, Roberto; Visconti, Ivan

    2008-01-01

    The substitution box (S-box) of the Advanced Encryption Standard (AES) is based on the multiplicative inversion $\\inverse(x) = x^{-1}$ in GF(256) and followed by an affine transformation in GF(2). The S-box is the most expansive building block of any hardware implementation of the AES, and the

  12. Test Program for Stirling Radioisotope Generator Hardware at NASA Glenn Research Center

    Science.gov (United States)

    Lewandowski, Edward J.; Bolotin, Gary S.; Oriti, Salvatore M.

    2015-01-01

    Stirling-based energy conversion technology has demonstrated the potential of high efficiency and low mass power systems for future space missions. This capability is beneficial, if not essential, to making certain deep space missions possible. Significant progress was made developing the Advanced Stirling Radioisotope Generator (ASRG), a 140-W radioisotope power system. A variety of flight-like hardware, including Stirling convertors, controllers, and housings, was designed and built under the ASRG flight development project. To support future Stirling-based power system development NASA has proposals that, if funded, will allow this hardware to go on test at the NASA Glenn Research Center. While future flight hardware may not be identical to the hardware developed under the ASRG flight development project, many components will likely be similar, and system architectures may have heritage to ASRG. Thus, the importance of testing the ASRG hardware to the development of future Stirling-based power systems cannot be understated. This proposed testing will include performance testing, extended operation to establish an extensive reliability database, and characterization testing to quantify subsystem and system performance and better understand system interfaces. This paper details this proposed test program for Stirling radioisotope generator hardware at NASA Glenn. It explains the rationale behind the proposed tests and how these tests will meet the stated objectives.

  13. Design Handbook for a Stack Foundation

    OpenAIRE

    Tuominen, Vilma

    2011-01-01

    This thesis was made for Citec Engineering Oy Ab as a handbook and as a design tool for concrete structure designers. Handbook is about the Wärtsilä Power Plant stack structure, which is a base for about 40 meters high stack pipe. The purpose is to make a calculation base to support the design work, which helps the designer to check the right dimensions of the structure. Thesis is about to be for the concrete designers and also other designers and authorities. As an example I have used an...

  14. Simple model of stacking-fault energies

    DEFF Research Database (Denmark)

    Stokbro, Kurt; Jacobsen, Lærke Wedel

    1993-01-01

    A simple model for the energetics of stacking faults in fcc metals is constructed. The model contains third-nearest-neighbor pairwise interactions and a term involving the fourth moment of the electronic density of states. The model is in excellent agreement with recently published local-density ......A simple model for the energetics of stacking faults in fcc metals is constructed. The model contains third-nearest-neighbor pairwise interactions and a term involving the fourth moment of the electronic density of states. The model is in excellent agreement with recently published local...

  15. Particle Transport Simulation on Heterogeneous Hardware

    CERN Multimedia

    CERN. Geneva

    2014-01-01

    CPUs and GPGPUs. About the speaker Vladimir Koylazov is CTO and founder of Chaos Software and one of the original developers of the V-Ray raytracing software. Passionate about 3D graphics and programming, Vlado is the driving force behind Chaos Group's software solutions. He participated in the implementation of algorithms for accurate light simulations and support for different hardware platforms, including CPU and GPGPU, as well as distributed calculat...

  16. Hardware-Independent Proofs of Numerical Programs

    Science.gov (United States)

    Boldo, Sylvie; Nguyen, Thi Minh Tuyen

    2010-01-01

    On recent architectures, a numerical program may give different answers depending on the execution hardware and the compilation. Our goal is to formally prove properties about numerical programs that are true for multiple architectures and compilers. We propose an approach that states the rounding error of each floating-point computation whatever the environment. This approach is implemented in the Frama-C platform for static analysis of C code. Small case studies using this approach are entirely and automatically proved

  17. Reconfigurable Hardware Adapts to Changing Mission Demands

    Science.gov (United States)

    2003-01-01

    A new class of computing architectures and processing systems, which use reconfigurable hardware, is creating a revolutionary approach to implementing future spacecraft systems. With the increasing complexity of electronic components, engineers must design next-generation spacecraft systems with new technologies in both hardware and software. Derivation Systems, Inc., of Carlsbad, California, has been working through NASA s Small Business Innovation Research (SBIR) program to develop key technologies in reconfigurable computing and Intellectual Property (IP) soft cores. Founded in 1993, Derivation Systems has received several SBIR contracts from NASA s Langley Research Center and the U.S. Department of Defense Air Force Research Laboratories in support of its mission to develop hardware and software for high-assurance systems. Through these contracts, Derivation Systems began developing leading-edge technology in formal verification, embedded Java, and reconfigurable computing for its PF3100, Derivational Reasoning System (DRS ), FormalCORE IP, FormalCORE PCI/32, FormalCORE DES, and LavaCORE Configurable Java Processor, which are designed for greater flexibility and security on all space missions.

  18. Trends in computer hardware and software.

    Science.gov (United States)

    Frankenfeld, F M

    1993-04-01

    Previously identified and current trends in the development of computer systems and in the use of computers for health care applications are reviewed. Trends identified in a 1982 article were increasing miniaturization and archival ability, increasing software costs, increasing software independence, user empowerment through new software technologies, shorter computer-system life cycles, and more rapid development and support of pharmaceutical services. Most of these trends continue today. Current trends in hardware and software include the increasing use of reduced instruction-set computing, migration to the UNIX operating system, the development of large software libraries, microprocessor-based smart terminals that allow remote validation of data, speech synthesis and recognition, application generators, fourth-generation languages, computer-aided software engineering, object-oriented technologies, and artificial intelligence. Current trends specific to pharmacy and hospitals are the withdrawal of vendors of hospital information systems from the pharmacy market, improved linkage of information systems within hospitals, and increased regulation by government. The computer industry and its products continue to undergo dynamic change. Software development continues to lag behind hardware, and its high cost is offsetting the savings provided by hardware.

  19. A Hardware Lab Anywhere At Any Time

    Directory of Open Access Journals (Sweden)

    Tobias Schubert

    2004-12-01

    Full Text Available Scientific technical courses are an important component in any student's education. These courses are usually characterised by the fact that the students execute experiments in special laboratories. This leads to extremely high costs and a reduction in the maximum number of possible participants. From this traditional point of view, it doesn't seem possible to realise the concepts of a Virtual University in the context of sophisticated technical courses since the students must be "on the spot". In this paper we introduce the so-called Mobile Hardware Lab which makes student participation possible at any time and from any place. This lab nevertheless transfers a feeling of being present in a laboratory. This is accomplished with a special Learning Management System in combination with hardware components which correspond to a fully equipped laboratory workstation that are lent out to the students for the duration of the lab. The experiments are performed and solved at home, then handed in electronically. Judging and marking are also both performed electronically. Since 2003 the Mobile Hardware Lab is now offered in a completely web based form.

  20. Industrial hardware and software verification with ACL2.

    Science.gov (United States)

    Hunt, Warren A; Kaufmann, Matt; Moore, J Strother; Slobodova, Anna

    2017-10-13

    The ACL2 theorem prover has seen sustained industrial use since the mid-1990s. Companies that have used ACL2 regularly include AMD, Centaur Technology, IBM, Intel, Kestrel Institute, Motorola/Freescale, Oracle and Rockwell Collins. This paper introduces ACL2 and focuses on how and why ACL2 is used in industry. ACL2 is well-suited to its industrial application to numerous software and hardware systems, because it is an integrated programming/proof environment supporting a subset of the ANSI standard Common Lisp programming language. As a programming language ACL2 permits the coding of efficient and robust programs; as a prover ACL2 can be fully automatic but provides many features permitting domain-specific human-supplied guidance at various levels of abstraction. ACL2 specifications and models often serve as efficient execution engines for the modelled artefacts while permitting formal analysis and proof of properties. Crucially, ACL2 also provides support for the development and verification of other formal analysis tools. However, ACL2 did not find its way into industrial use merely because of its technical features. The core ACL2 user/development community has a shared vision of making mechanized verification routine when appropriate and has been committed to this vision for the quarter century since the Computational Logic, Inc., Verified Stack. The community has focused on demonstrating the viability of the tool by taking on industrial projects (often at the expense of not being able to publish much).This article is part of the themed issue 'Verified trustworthy software systems'. © 2017 The Author(s).

  1. The Application of Hardware in the Loop Testing for Distributed Engine Control

    Science.gov (United States)

    Thomas, George L.; Culley, Dennis E.; Brand, Alex

    2016-01-01

    The essence of a distributed control system is the modular partitioning of control function across a hardware implementation. This type of control architecture requires embedding electronics in a multitude of control element nodes for the execution of those functions, and their integration as a unified system. As the field of distributed aeropropulsion control moves toward reality, questions about building and validating these systems remain. This paper focuses on the development of hardware-in-the-loop (HIL) test techniques for distributed aero engine control, and the application of HIL testing as it pertains to potential advanced engine control applications that may now be possible due to the intelligent capability embedded in the nodes.

  2. How open hardware drives digital fabrication tools such as the 3D printer

    Directory of Open Access Journals (Sweden)

    Johan Söderberg

    2013-06-01

    Full Text Available A case study of hobbyists developing a desktop 3D printer, indicative of a broader movement around open hardware development, is used to advance a theoretical apparatus drawing on social movement research. This is proposed as an alternative to how innovation by users is typically studied in innovation studies literature, namely, as discrete, isolated cases. Open hardware development projects make up a larger ecology, held together by common ideas, a shared communication infrastructure, conferences and licenses, among other things, and it therefore makes sense to look at them as part of a single movement.

  3. CT and MRI techniques for imaging around orthopedic hardware

    International Nuclear Information System (INIS)

    Do, Thuy Duong; Skornitzke, Stephan; Weber, Marc-Andre; Sutter, Reto

    2018-01-01

    Orthopedic hardware impairs image quality in cross-sectional imaging. With an increasing number of orthopedic implants in an aging population, the need to mitigate metal artifacts in computed tomography and magnetic resonance imaging is becoming increasingly relevant. This review provides an overview of the major artifacts in CT and MRI and state-of-the-art solutions to improve image quality. All steps of image acquisition from device selection, scan preparations and parameters to image post-processing influence the magnitude of metal artifacts. Technological advances like dual-energy CT with the possibility of virtual monochromatic imaging (VMI) and new materials offer opportunities to further reduce artifacts in CT and MRI. Dedicated metal artifact reduction sequences contain algorithms to reduce artifacts and improve imaging of surrounding tissue and are essential tools in orthopedic imaging to detect postoperative complications in early stages.

  4. Programming languages and compiler design for realistic quantum hardware

    Science.gov (United States)

    Chong, Frederic T.; Franklin, Diana; Martonosi, Margaret

    2017-09-01

    Quantum computing sits at an important inflection point. For years, high-level algorithms for quantum computers have shown considerable promise, and recent advances in quantum device fabrication offer hope of utility. A gap still exists, however, between the hardware size and reliability requirements of quantum computing algorithms and the physical machines foreseen within the next ten years. To bridge this gap, quantum computers require appropriate software to translate and optimize applications (toolflows) and abstraction layers. Given the stringent resource constraints in quantum computing, information passed between layers of software and implementations will differ markedly from in classical computing. Quantum toolflows must expose more physical details between layers, so the challenge is to find abstractions that expose key details while hiding enough complexity.

  5. Programming languages and compiler design for realistic quantum hardware.

    Science.gov (United States)

    Chong, Frederic T; Franklin, Diana; Martonosi, Margaret

    2017-09-13

    Quantum computing sits at an important inflection point. For years, high-level algorithms for quantum computers have shown considerable promise, and recent advances in quantum device fabrication offer hope of utility. A gap still exists, however, between the hardware size and reliability requirements of quantum computing algorithms and the physical machines foreseen within the next ten years. To bridge this gap, quantum computers require appropriate software to translate and optimize applications (toolflows) and abstraction layers. Given the stringent resource constraints in quantum computing, information passed between layers of software and implementations will differ markedly from in classical computing. Quantum toolflows must expose more physical details between layers, so the challenge is to find abstractions that expose key details while hiding enough complexity.

  6. Contemporary sample stacking in analytical electrophoresis

    Czech Academy of Sciences Publication Activity Database

    Šlampová, Andrea; Malá, Zdeňka; Pantůčková, Pavla; Gebauer, Petr; Boček, Petr

    2013-01-01

    Roč. 34, č. 1 (2013), s. 3-18 ISSN 0173-0835 R&D Projects: GA ČR GAP206/10/1219 Institutional support: RVO:68081715 Keywords : biological samples * stacking * trace analysis * zone electrophoresis Subject RIV: CB - Analytical Chemistry, Separation Impact factor: 3.161, year: 2013

  7. SRS reactor stack plume marking tests

    International Nuclear Information System (INIS)

    Petry, S.F.

    1992-03-01

    Tests performed in 105-K in 1987 and 1988 demonstrated that the stack plume can successfully be made visible (i.e., marked) by introducing smoke into the stack breech. The ultimate objective of these tests is to provide a means during an emergency evacuation so that an evacuee can readily identify the stack plume and evacuate in the opposite direction, thus minimizing the potential of severe radiation exposure. The EPA has also requested DOE to arrange for more tests to settle a technical question involving the correct calculation of stack downwash. New test canisters were received in 1988 designed to produce more smoke per unit time; however, these canisters have not been evaluated, because normal ventilation conditions have not been reestablished in K Area. Meanwhile, both the authorization and procedure to conduct the tests have expired. The tests can be performed during normal reactor operation. It is recommended that appropriate authorization and procedure approval be obtained to resume testing after K Area restart

  8. Testing of Electrodes, Cells and Short Stacks

    DEFF Research Database (Denmark)

    Hauch, Anne; Mogensen, Mogens Bjerg

    2017-01-01

    The present contribution describes the electrochemical testing and characterization of electrodes, cells, and short stacks. To achieve the maximum insight and results from testing of electrodes and cells, it is obviously necessary to have a good understanding of the fundamental principles...

  9. Stack Gas Scrubber Makes the Grade

    Science.gov (United States)

    Chemical and Engineering News, 1975

    1975-01-01

    Describes a year long test of successful sulfur dioxide removal from stack gas with a calcium oxide slurry. Sludge disposal problems are discussed. Cost is estimated at 0.6 mill per kwh not including sludge removal. A flow diagram and equations are included. (GH)

  10. OpenStack Object Storage (Swift) essentials

    CERN Document Server

    Kapadia, Amar; Varma, Sreedhar

    2015-01-01

    If you are an IT administrator and you want to enter the world of cloud storage using OpenStack Swift, then this book is ideal for you. Basic knowledge of Linux and server technology is beneficial to get the most out of the book.

  11. Stacked spheres and lower bound theorem

    Indian Academy of Sciences (India)

    BASUDEB DATTA

    2011-11-20

    Nov 20, 2011 ... Preliminaries. Lower bound theorem. On going work. Definitions. An n-simplex is a convex hull of n + 1 affinely independent points. (called vertices) in some Euclidean space R. N . Stacked spheres and lower bound theorem. Basudeb Datta. Indian Institute of Science. 2 / 27 ...

  12. Contemporary sample stacking in analytical electrophoresis

    Czech Academy of Sciences Publication Activity Database

    Malá, Zdeňka; Šlampová, Andrea; Křivánková, Ludmila; Gebauer, Petr; Boček, Petr

    2015-01-01

    Roč. 36, č. 1 (2015), s. 15-35 ISSN 0173-0835 R&D Projects: GA ČR(CZ) GA13-05762S Institutional support: RVO:68081715 Keywords : biological samples * stacking * trace analysis * zone electrophoresis Subject RIV: CB - Analytical Chemistry, Separation Impact factor: 2.482, year: 2015

  13. The data type variety of stack algebras

    NARCIS (Netherlands)

    Bergstra, J.A.; Tucker, J.V.

    1995-01-01

    We define and study the class of all stack algebras as the class of all minimal algebras in a variety defined by an infinite recursively enumerable set of equations. Among a number of results, we show that the initial model of the variety is computable, that its equational theory is decidable,

  14. Photoswitchable Intramolecular H-Stacking of Perylenebisimide

    NARCIS (Netherlands)

    Wang, Jiaobing; Kulago, Artem; Browne, Wesley R.; Feringa, Ben L.

    2010-01-01

    Dynamic control over the formation of H- or J-type aggregates of chromophores is of fundamental importance for developing responsive organic optoelectronic materials. In this study, the first example of photoswitching between a nonstacked and an intramolecularly H-stacked arrangement of

  15. 40 CFR 61.53 - Stack sampling.

    Science.gov (United States)

    2010-07-01

    ... 40 Protection of Environment 8 2010-07-01 2010-07-01 false Stack sampling. 61.53 Section 61.53 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED) NATIONAL... sampling. (a) Mercury ore processing facility. (1) Unless a waiver of emission testing is obtained under...

  16. 40 CFR 61.33 - Stack sampling.

    Science.gov (United States)

    2010-07-01

    ... 40 Protection of Environment 8 2010-07-01 2010-07-01 false Stack sampling. 61.33 Section 61.33 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED) NATIONAL... sampling. (a) Unless a waiver of emission testing is obtained under § 61.13, each owner or operator...

  17. OpenStack cloud computing cookbook

    CERN Document Server

    Jackson, Kevin

    2013-01-01

    A Cookbook full of practical and applicable recipes that will enable you to use the full capabilities of OpenStack like never before.This book is aimed at system administrators and technical architects moving from a virtualized environment to cloud environments with familiarity of cloud computing platforms. Knowledge of virtualization and managing linux environments is expected.

  18. Pre-Hardware Optimization of Spacecraft Image Processing Software Algorithms and Hardware Implementation

    Science.gov (United States)

    Kizhner, Semion; Flatley, Thomas P.; Hestnes, Phyllis; Jentoft-Nilsen, Marit; Petrick, David J.; Day, John H. (Technical Monitor)

    2001-01-01

    Spacecraft telemetry rates have steadily increased over the last decade presenting a problem for real-time processing by ground facilities. This paper proposes a solution to a related problem for the Geostationary Operational Environmental Spacecraft (GOES-8) image processing application. Although large super-computer facilities are the obvious heritage solution, they are very costly, making it imperative to seek a feasible alternative engineering solution at a fraction of the cost. The solution is based on a Personal Computer (PC) platform and synergy of optimized software algorithms and re-configurable computing hardware technologies, such as Field Programmable Gate Arrays (FPGA) and Digital Signal Processing (DSP). It has been shown in [1] and [2] that this configuration can provide superior inexpensive performance for a chosen application on the ground station or on-board a spacecraft. However, since this technology is still maturing, intensive pre-hardware steps are necessary to achieve the benefits of hardware implementation. This paper describes these steps for the GOES-8 application, a software project developed using Interactive Data Language (IDL) (Trademark of Research Systems, Inc.) on a Workstation/UNIX platform. The solution involves converting the application to a PC/Windows/RC platform, selected mainly by the availability of low cost, adaptable high-speed RC hardware. In order for the hybrid system to run, the IDL software was modified to account for platform differences. It was interesting to examine the gains and losses in performance on the new platform, as well as unexpected observations before implementing hardware. After substantial pre-hardware optimization steps, the necessity of hardware implementation for bottleneck code in the PC environment became evident and solvable beginning with the methodology described in [1], [2], and implementing a novel methodology for this specific application [6]. The PC-RC interface bandwidth problem for the

  19. Hardware implementation of a GFSR pseudo-random number generator

    Science.gov (United States)

    Aiello, G. R.; Budinich, M.; Milotti, E.

    1989-12-01

    We describe the hardware implementation of a pseudo-random number generator of the "Generalized Feedback Shift Register" (GFSR) type. After brief theoretical considerations we describe two versions of the hardware, the tests done and the performances achieved.

  20. Optimized electrode configuration for current-in-plane characterization of magnetic tunnel junction stacks

    Science.gov (United States)

    Cagliani, A.; Kjær, D.; Østerberg, F. W.; Hansen, O.; Nielsen, P. F.; Petersen, D. H.

    2017-02-01

    The current-in-plane tunneling technique (CIPT) has been a crucial tool in the development of magnetic tunnel junction stacks suitable for magnetic random access memories (MRAM) for more than a decade. The MRAM development has now reached the maturity to make the transition from the R&D phase to the pilot production phase. This will require an improvement in the repeatability of the CIPT metrology technique. Here, we present an analytical model that can be used to simulate numerically the repeatability of a CIPT measurement for an arbitrary MTJ stack prior to any CIPT measurement. The model describes mathematically the main sources of error arising when a micro multi-electrode probe is used to perform a CIPT measurement. The numerically simulated repeatability values obtained on four different MTJ stacks are verified by experimental data and the model is used to optimize the choice of electrodes on a multi-electrode probe to reach up to 36% improvement on the repeatability for the resistance area product and the tunneling magnetoresistance measurement, without any hardware modification.

  1. Energy Efficient Clustering Based Network Protocol Stack for 3D Airborne Monitoring System

    Directory of Open Access Journals (Sweden)

    Abhishek Joshi

    2017-01-01

    Full Text Available Wireless Sensor Network consists of large number of nodes densely deployed in ad hoc manner. Usually, most of the application areas of WSNs require two-dimensional (2D topology. Various emerging application areas such as airborne networks and underwater wireless sensor networks are usually deployed using three-dimensional (3D network topology. In this paper, a static 3D cluster-based network topology has been proposed for airborne networks. A network protocol stack consisting of various protocols such as TDMA MAC and dynamic routing along with services such as time synchronization, Cluster Head rotation, and power level management has been proposed for this airborne network. The proposed protocol stack has been implemented on the hardware platform consisting of number of TelosB nodes. This 3D airborne network architecture can be used to measure Air Quality Index (AQI in an area. Various parameters of network such as energy consumption, Cluster Head rotation, time synchronization, and Packet Delivery Ratio (PDR have been analyzed. Detailed description of the implementation of the protocol stack along with results of implementation has been provided in this paper.

  2. The Impact of Flight Hardware Scavenging on Space Logistics

    Science.gov (United States)

    Oeftering, Richard C.

    2011-01-01

    For a given fixed launch vehicle capacity the logistics payload delivered to the moon may be only roughly 20 percent of the payload delivered to the International Space Station (ISS). This is compounded by the much lower flight frequency to the moon and thus low availability of spares for maintenance. This implies that lunar hardware is much more scarce and more costly per kilogram than ISS and thus there is much more incentive to preserve hardware. The Constellation Lunar Surface System (LSS) program is considering ways of utilizing hardware scavenged from vehicles including the Altair lunar lander. In general, the hardware will have only had a matter of hours of operation yet there may be years of operational life remaining. By scavenging this hardware the program, in effect, is treating vehicle hardware as part of the payload. Flight hardware may provide logistics spares for system maintenance and reduce the overall logistics footprint. This hardware has a wide array of potential applications including expanding the power infrastructure, and exploiting in-situ resources. Scavenging can also be seen as a way of recovering the value of, literally, billions of dollars worth of hardware that would normally be discarded. Scavenging flight hardware adds operational complexity and steps must be taken to augment the crew s capability with robotics, capabilities embedded in flight hardware itself, and external processes. New embedded technologies are needed to make hardware more serviceable and scavengable. Process technologies are needed to extract hardware, evaluate hardware, reconfigure or repair hardware, and reintegrate it into new applications. This paper also illustrates how scavenging can be used to drive down the cost of the overall program by exploiting the intrinsic value of otherwise discarded flight hardware.

  3. RPLsh: An Interactive Shell for Stack-based Numerical Computation

    Science.gov (United States)

    Rauch, Kevin P.

    RPL shell or RPLsh, is an interactive numerical shell designed to combine the convenience of a hand-held calculator with the computational power and advanced numerical functionality of a workstation. The user interface is modelled after stack-based scientific calculators such as those made by Hewlett-Packard RPL is the name of the Forth-like programming language used in the HP 48 series), but includes many features not found in hand-held devices, such as a multi-threaded kernel with job control, integrated extended precision arithmetic, a large library of special functions, and a dynamic, resizable window display. As a native C/C++ application, it is over 1000 times faster than HP 48 emulators (e.g. Emu48 ) in simple benchmarks; for extended precision numerical analysis, its performance can exceed that of Mathematica by similar amounts. Current development focuses on interactive user functionality, with comprehensive programming and debugging support to follow.

  4. Edge blurring in stacked x-ray film screen combinations

    International Nuclear Information System (INIS)

    Lyle, J.W.

    1984-01-01

    The Advanced Experiments Group of B-Division, LLNL, has been seeking to improve the sensitivity and spatial resolution of stacked film screens for bremsstrahlung flash radiography of imploding, dense metal shells. In the work reported here, we experimentally measured the spreading of the x-ray shadow of the edge of a uranium block in two film-and-screen combinations. We also used the SANDYL code, which models photon and electron scattering, to calculate the theoretical edge spreading in an array of films and screens. Experimentally, the uranium edge was spread to a width of 1.7 mm in the combination 0.15-mm-Ta/NDT9-XAR5, and 1.5 mm in the combination 0.25-mm-Ta/NDT6-XAR5. The theoretical calculation agreed with these results

  5. Preloading Piezoelectric Stack Actuator in High-speed Nanopositioning Systems

    Directory of Open Access Journals (Sweden)

    Yuen Yong

    2016-10-01

    Full Text Available Recent development in high-speed nanotechnology applications such as scanning probe microscopy and nanofabrication has increased interest on the advancement of high-bandwidth flexure-guided nanopositioning systems. These systems are capable of providing motions with sub-nanometer resolution over a positioning bandwidth of a few kilohertz or more. High-speed nanopositioning devices are commonly driven by compact and stiff piezoelectric stack actuators. However, these actuators are highly sensitive to tensile and lateral forces. During high-speed operations, excessive inertia force due to the effective mass of nanopositioning system could potentially damage the actuator. To protect the piezoelectric actuator, preload is often applied to compensate for these inertial forces. This article surveys key challenges in existing preload techniques in the context of high-speed nanopositioning designs, and explores how these challenges can be overcome.

  6. Computer hardware for radiologists: Part 2

    International Nuclear Information System (INIS)

    Indrajit, IK; Alam, A

    2010-01-01

    Computers are an integral part of modern radiology equipment. In the first half of this two-part article, we dwelt upon some fundamental concepts regarding computer hardware, covering components like motherboard, central processing unit (CPU), chipset, random access memory (RAM), and memory modules. In this article, we describe the remaining computer hardware components that are of relevance to radiology. “Storage drive” is a term describing a “memory” hardware used to store data for later retrieval. Commonly used storage drives are hard drives, floppy drives, optical drives, flash drives, and network drives. The capacity of a hard drive is dependent on many factors, including the number of disk sides, number of tracks per side, number of sectors on each track, and the amount of data that can be stored in each sector. “Drive interfaces” connect hard drives and optical drives to a computer. The connections of such drives require both a power cable and a data cable. The four most popular “input/output devices” used commonly with computers are the printer, monitor, mouse, and keyboard. The “bus” is a built-in electronic signal pathway in the motherboard to permit efficient and uninterrupted data transfer. A motherboard can have several buses, including the system bus, the PCI express bus, the PCI bus, the AGP bus, and the (outdated) ISA bus. “Ports” are the location at which external devices are connected to a computer motherboard. All commonly used peripheral devices, such as printers, scanners, and portable drives, need ports. A working knowledge of computers is necessary for the radiologist if the workflow is to realize its full potential and, besides, this knowledge will prepare the radiologist for the coming innovations in the ‘ever increasing’ digital future

  7. Computer hardware for radiologists: Part 2

    Directory of Open Access Journals (Sweden)

    Indrajit I

    2010-01-01

    Full Text Available Computers are an integral part of modern radiology equipment. In the first half of this two-part article, we dwelt upon some fundamental concepts regarding computer hardware, covering components like motherboard, central processing unit (CPU, chipset, random access memory (RAM, and memory modules. In this article, we describe the remaining computer hardware components that are of relevance to radiology. "Storage drive" is a term describing a "memory" hardware used to store data for later retrieval. Commonly used storage drives are hard drives, floppy drives, optical drives, flash drives, and network drives. The capacity of a hard drive is dependent on many factors, including the number of disk sides, number of tracks per side, number of sectors on each track, and the amount of data that can be stored in each sector. "Drive interfaces" connect hard drives and optical drives to a computer. The connections of such drives require both a power cable and a data cable. The four most popular "input/output devices" used commonly with computers are the printer, monitor, mouse, and keyboard. The "bus" is a built-in electronic signal pathway in the motherboard to permit efficient and uninterrupted data transfer. A motherboard can have several buses, including the system bus, the PCI express bus, the PCI bus, the AGP bus, and the (outdated ISA bus. "Ports" are the location at which external devices are connected to a computer motherboard. All commonly used peripheral devices, such as printers, scanners, and portable drives, need ports. A working knowledge of computers is necessary for the radiologist if the workflow is to realize its full potential and, besides, this knowledge will prepare the radiologist for the coming innovations in the ′ever increasing′ digital future.

  8. Project W-420 Stack Monitoring system upgrades conceptual design report

    Energy Technology Data Exchange (ETDEWEB)

    TUCK, J.A.

    1998-11-06

    This document describes the scope, justification, conceptual design, and performance of Project W-420 stack monitoring system upgrades on six NESHAP-designated, Hanford Tank Farms ventilation exhaust stacks.

  9. Heuristic Solution Approaches to the Double TSP with Multiple Stacks

    DEFF Research Database (Denmark)

    Petersen, Hanne Løhmann

    This paper introduces the Double Travelling Salesman Problem with Multiple Stacks and presents a three different metaheuristic approaches to its solution. The Double Travelling Salesman Problem with Multiple Stacks is concerned with finding the shortest route performing pickups and deliveries...

  10. Heuristic Solution Approaches to the Double TSP with Multiple Stacks

    DEFF Research Database (Denmark)

    Petersen, Hanne Løhmann

    2006-01-01

    This paper introduces the Double Travelling Salesman Problem with Multiple Stacks and presents a three different metaheuristic approaches to its solution. The Double Travelling Salesman Problem with Multiple Stacks is concerned with finding the shortest route performing pickups and deliveries...

  11. Open Hardware for CERN's accelerator control systems

    International Nuclear Information System (INIS)

    Bij, E van der; Serrano, J; Wlostowski, T; Cattin, M; Gousiou, E; Sanchez, P Alvarez; Boccardi, A; Voumard, N; Penacoba, G

    2012-01-01

    The accelerator control systems at CERN will be upgraded and many electronics modules such as analog and digital I/O, level converters and repeaters, serial links and timing modules are being redesigned. The new developments are based on the FPGA Mezzanine Card, PCI Express and VME64x standards while the Wishbone specification is used as a system on a chip bus. To attract partners, the projects are developed in an 'Open' fashion. Within this Open Hardware project new ways of working with industry are being evaluated and it has been proven that industry can be involved at all stages, from design to production and support.

  12. Management of cladding hulls and fuel hardware

    International Nuclear Information System (INIS)

    1985-01-01

    The reprocessing of spent fuel from power reactors based on chop-leach technology produces a solid waste product of cladding hulls and other metallic residues. This report describes the current situation in the management of fuel cladding hulls and hardware. Information is presented on the material composition of such waste together with the heating effects due to neutron-induced activation products and fuel contamination. As no country has established a final disposal route and the corresponding repository, this report also discusses possible disposal routes and various disposal options under consideration at present

  13. Hardware trigger processor for the MDT system

    CERN Document Server

    AUTHOR|(SzGeCERN)757787; The ATLAS collaboration; Hazen, Eric; Butler, John; Black, Kevin; Gastler, Daniel Edward; Ntekas, Konstantinos; Taffard, Anyes; Martinez Outschoorn, Verena; Ishino, Masaya; Okumura, Yasuyuki

    2017-01-01

    We are developing a low-latency hardware trigger processor for the Monitored Drift Tube system in the Muon spectrometer. The processor will fit candidate Muon tracks in the drift tubes in real time, improving significantly the momentum resolution provided by the dedicated trigger chambers. We present a novel pure-FPGA implementation of a Legendre transform segment finder, an associative-memory alternative implementation, an ARM (Zynq) processor-based track fitter, and compact ATCA carrier board architecture. The ATCA architecture is designed to allow a modular, staged approach to deployment of the system and exploration of alternative technologies.

  14. Development of Hardware Dual Modality Tomography System

    Directory of Open Access Journals (Sweden)

    R. M. Zain

    2009-06-01

    Full Text Available The paper describes the hardware development and performance of the Dual Modality Tomography (DMT system. DMT consists of optical and capacitance sensors. The optical sensors consist of 16 LEDs and 16 photodiodes. The Electrical Capacitance Tomography (ECT electrode design use eight electrode plates as the detecting sensor. The digital timing and the control unit have been developing in order to control the light projection of optical emitters, switching the capacitance electrodes and to synchronize the operation of data acquisition. As a result, the developed system is able to provide a maximum 529 set data per second received from the signal conditioning circuit to the computer.

  15. Hardware-efficient autonomous quantum memory protection.

    Science.gov (United States)

    Leghtas, Zaki; Kirchmair, Gerhard; Vlastakis, Brian; Schoelkopf, Robert J; Devoret, Michel H; Mirrahimi, Mazyar

    2013-09-20

    We propose to encode a quantum bit of information in a superposition of coherent states of an oscillator, with four different phases. Our encoding in a single cavity mode, together with a protection protocol, significantly reduces the error rate due to photon loss. This protection is ensured by an efficient quantum error correction scheme employing the nonlinearity provided by a single physical qubit coupled to the cavity. We describe in detail how to implement these operations in a circuit quantum electrodynamics system. This proposal directly addresses the task of building a hardware-efficient quantum memory and can lead to important shortcuts in quantum computing architectures.

  16. Reconfigurable Hardware for Compressing Hyperspectral Image Data

    Science.gov (United States)

    Aranki, Nazeeh; Namkung, Jeffrey; Villapando, Carlos; Kiely, Aaron; Klimesh, Matthew; Xie, Hua

    2010-01-01

    High-speed, low-power, reconfigurable electronic hardware has been developed to implement ICER-3D, an algorithm for compressing hyperspectral-image data. The algorithm and parts thereof have been the topics of several NASA Tech Briefs articles, including Context Modeler for Wavelet Compression of Hyperspectral Images (NPO-43239) and ICER-3D Hyperspectral Image Compression Software (NPO-43238), which appear elsewhere in this issue of NASA Tech Briefs. As described in more detail in those articles, the algorithm includes three main subalgorithms: one for computing wavelet transforms, one for context modeling, and one for entropy encoding. For the purpose of designing the hardware, these subalgorithms are treated as modules to be implemented efficiently in field-programmable gate arrays (FPGAs). The design takes advantage of industry- standard, commercially available FPGAs. The implementation targets the Xilinx Virtex II pro architecture, which has embedded PowerPC processor cores with flexible on-chip bus architecture. It incorporates an efficient parallel and pipelined architecture to compress the three-dimensional image data. The design provides for internal buffering to minimize intensive input/output operations while making efficient use of offchip memory. The design is scalable in that the subalgorithms are implemented as independent hardware modules that can be combined in parallel to increase throughput. The on-chip processor manages the overall operation of the compression system, including execution of the top-level control functions as well as scheduling, initiating, and monitoring processes. The design prototype has been demonstrated to be capable of compressing hyperspectral data at a rate of 4.5 megasamples per second at a conservative clock frequency of 50 MHz, with a potential for substantially greater throughput at a higher clock frequency. The power consumption of the prototype is less than 6.5 W. The reconfigurability (by means of reprogramming) of

  17. Dynamically-Loaded Hardware Libraries (HLL) Technology for Audio Applications

    DEFF Research Database (Denmark)

    Esposito, A.; Lomuscio, A.; Nunzio, L. Di

    2016-01-01

    In this work, we apply hardware acceleration to embedded systems running audio applications. We present a new framework, Dynamically-Loaded Hardware Libraries or HLL, to dynamically load hardware libraries on reconfigurable platforms (FPGAs). Provided a library of application-specific processors,...

  18. Visual basic application in computer hardware control and data ...

    African Journals Online (AJOL)

    ... hardware device control and data acquisition is experimented using Visual Basic and the Speech Application Programming Interface (SAPI) Software Development Kit. To control hardware using Visual Basic, all hardware requests were designed to go through Windows via the printer parallel ports which is accessed and ...

  19. PACE: A dynamic programming algorithm for hardware/software partitioning

    DEFF Research Database (Denmark)

    Knudsen, Peter Voigt; Madsen, Jan

    1996-01-01

    with a hardware area constraint and the problem of minimizing hardware area with a system execution time constraint. The target architecture consists of a single microprocessor and a single hardware chip (ASIC, FPGA, etc.) which are connected by a communication channel. The algorithm incorporates a realistic...

  20. Static Scheduling of Periodic Hardware Tasks with Precedence and Deadline Constraints on Reconfigurable Hardware Devices

    Directory of Open Access Journals (Sweden)

    Ikbel Belaid

    2011-01-01

    Full Text Available Task graph scheduling for reconfigurable hardware devices can be defined as finding a schedule for a set of periodic tasks with precedence, dependence, and deadline constraints as well as their optimal allocations on the available heterogeneous hardware resources. This paper proposes a new methodology comprising three main stages. Using these three main stages, dynamic partial reconfiguration and mixed integer programming, pipelined scheduling and efficient placement are achieved and enable parallel computing of the task graph on the reconfigurable devices by optimizing placement/scheduling quality. Experiments on an application of heterogeneous hardware tasks demonstrate an improvement of resource utilization of 12.45% of the available reconfigurable resources corresponding to a resource gain of 17.3% compared to a static design. The configuration overhead is reduced to 2% of the total running time. Due to pipelined scheduling, the task graph spanning is minimized by 4% compared to sequential execution of the graph.

  1. DEVS Models of Palletized Ground Stacking in Storeyed Grain Warehouse

    Directory of Open Access Journals (Sweden)

    Hou Shu-Yi

    2016-01-01

    Full Text Available Processed grain stored in storeyed warehouse is generally stacked on the ground without pallets. However, in order to improve the storing way, we developed a new stacking method, palletized ground stacking. Simulation should be used to present this new storing way. DEVS provides a formalized way to describe the system model. In this paper, DEVS models of palletized ground stacking in storeyed grain warehouse are given and a simulation model is developed by AutoMod.

  2. Internet-based hardware/software co-design framework for embedded 3D graphics applications

    Directory of Open Access Journals (Sweden)

    Wong Weng-Fai

    2011-01-01

    Full Text Available Abstract Advances in technology are making it possible to run three-dimensional (3D graphics applications on embedded and handheld devices. In this article, we propose a hardware/software co-design environment for 3D graphics application development that includes the 3D graphics software, OpenGL ES application programming interface (API, device driver, and 3D graphics hardware simulators. We developed a 3D graphics system-on-a-chip (SoC accelerator using transaction-level modeling (TLM. This gives software designers early access to the hardware even before it is ready. On the other hand, hardware designers also stand to gain from the more complex test benches made available in the software for verification. A unique aspect of our framework is that it allows hardware and software designers from geographically dispersed areas to cooperate and work on the same framework. Designs can be entered and executed from anywhere in the world without full access to the entire framework, which may include proprietary components. This results in controlled and secure transparency and reproducibility, granting leveled access to users of various roles.

  3. Sport stacking motor intervention programme for children with ...

    African Journals Online (AJOL)

    The purpose of this study was to explore sport stacking as an alternative intervention approach with typically developing children and in addition to improve DCD. Sport stacking consists of participants stacking and unstacking 12 specially designed plastic cups in predetermined sequences in as little time as possible.

  4. Notes on G-theory of Deligne-Mumford stacks

    OpenAIRE

    Toen, B.

    1999-01-01

    Based on the methods used by the author to prove the Riemann-Roch formula for algebraic stacks, this paper contains a description of the rationnal G-theory of Deligne-Mumford stacks over general bases. We will use these results to study equivariant K-theory, and also to define new filtrations on K-theory of algebraic stacks.

  5. Learning algorithms for stack filter classifiers

    Energy Technology Data Exchange (ETDEWEB)

    Porter, Reid B [Los Alamos National Laboratory; Hush, Don [Los Alamos National Laboratory; Zimmer, Beate G [TEXAS A& M

    2009-01-01

    Stack Filters define a large class of increasing filter that is used widely in image and signal processing. The motivations for using an increasing filter instead of an unconstrained filter have been described as: (1) fast and efficient implementation, (2) the relationship to mathematical morphology and (3) more precise estimation with finite sample data. This last motivation is related to methods developed in machine learning and the relationship was explored in an earlier paper. In this paper we investigate this relationship by applying Stack Filters directly to classification problems. This provides a new perspective on how monotonicity constraints can help control estimation and approximation errors, and also suggests several new learning algorithms for Boolean function classifiers when they are applied to real-valued inputs.

  6. Industrial stacks design; Diseno de chimeneas industriales

    Energy Technology Data Exchange (ETDEWEB)

    Cacheux, Luis [Instituto de Investigaciones Electricas, Cuernavaca (Mexico)

    1986-12-31

    The Instituto de Investigaciones Electricas (IIE) though its Civil Works Department, develops, under contract with CFE`s Gerencia de Proyectos Termoelectricos (Management of Fossil Power Plant Projects), a series of methods for the design of stacks, which pretends to solve the a present day problem: the stack design of the fossil power plants that will go into operation during the next coming years in the country. [Espanol] El Instituto de Investigaciones Electricas (IIE), a traves del Departamento de Ingenieria Civil, desarrolla, bajo contrato con la Gerencia de Proyectos Termoelectricos, de la Comision Federal de Electricidad (CFE), un conjunto de metodos para el diseno de chimeneas, con el que se pretende resolver un problema inmediato: el diseno de las chimeneas de las centrales termoelectricas que entraran en operacion durante los proximos anos, en el pais.

  7. Annular feed air breathing fuel cell stack

    Science.gov (United States)

    Wilson, Mahlon S.

    1996-01-01

    A stack of polymer electrolyte fuel cells is formed from a plurality of unit cells where each unit cell includes fuel cell components defining a periphery and distributed along a common axis, where the fuel cell components include a polymer electrolyte membrane, an anode and a cathode contacting opposite sides of the membrane, and fuel and oxygen flow fields contacting the anode and the cathode, respectively, wherein the components define an annular region therethrough along the axis. A fuel distribution manifold within the annular region is connected to deliver fuel to the fuel flow field in each of the unit cells. In a particular embodiment, a single bolt through the annular region clamps the unit cells together. In another embodiment, separator plates between individual unit cells have an extended radial dimension to function as cooling fins for maintaining the operating temperature of the fuel cell stack.

  8. System for inspection of stacked cargo containers

    Science.gov (United States)

    Derenzo, Stephen [Pinole, CA

    2011-08-16

    The present invention relates to a system for inspection of stacked cargo containers. One embodiment of the invention generally comprises a plurality of stacked cargo containers arranged in rows or tiers, each container having a top, a bottom a first side, a second side, a front end, and a back end; a plurality of spacers arranged in rows or tiers; one or more mobile inspection devices for inspecting the cargo containers, wherein the one or more inspection devices are removeably disposed within the spacers, the inspection means configured to move through the spacers to detect radiation within the containers. The invented system can also be configured to inspect the cargo containers for a variety of other potentially hazardous materials including but not limited to explosive and chemical threats.

  9. Multistage Force Amplification of Piezoelectric Stacks

    Science.gov (United States)

    Xu, Tian-Bing (Inventor); Siochi, Emilie J. (Inventor); Zuo, Lei (Inventor); Jiang, Xiaoning (Inventor); Kang, Jin Ho (Inventor)

    2015-01-01

    Embodiments of the disclosure include an apparatus and methods for using a piezoelectric device, that includes an outer flextensional casing, a first cell and a last cell serially coupled to each other and coupled to the outer flextensional casing such that each cell having a flextensional cell structure and each cell receives an input force and provides an output force that is amplified based on the input force. The apparatus further includes a piezoelectric stack coupled to each cell such that the piezoelectric stack of each cell provides piezoelectric energy based on the output force for each cell. Further, the last cell receives an input force that is the output force from the first cell and the last cell provides an output apparatus force In addition, the piezoelectric energy harvested is based on the output apparatus force. Moreover, the apparatus provides displacement based on the output apparatus force.

  10. Absorption spectra of AA-stacked graphite

    International Nuclear Information System (INIS)

    Chiu, C W; Lee, S H; Chen, S C; Lin, M F; Shyu, F L

    2010-01-01

    AA-stacked graphite shows strong anisotropy in geometric structures and velocity matrix elements. However, the absorption spectra are isotropic for the polarization vector on the graphene plane. The spectra exhibit one prominent plateau at middle energy and one shoulder structure at lower energy. These structures directly reflect the unique geometric and band structures and provide sufficient information for experimental fitting of the intralayer and interlayer atomic interactions. On the other hand, monolayer graphene shows a sharp absorption peak but no shoulder structure; AA-stacked bilayer graphene has two absorption peaks at middle energy and abruptly vanishes at lower energy. Furthermore, the isotropic features are expected to exist in other graphene-related systems. The calculated results and the predicted atomic interactions could be verified by optical measurements.

  11. Development of on-site PAFC stacks

    Energy Technology Data Exchange (ETDEWEB)

    Hotta, K.; Matsumoto, Y. [Kansai Electric Power Co., Amagasaki (Japan); Horiuchi, H.; Ohtani, T. [Mitsubishi Electric Corp., Kobe (Japan)

    1996-12-31

    PAFC (Phosphoric Acid Fuel Cell) has been researched for commercial use and demonstration plants have been installed in various sites. However, PAFC don`t have a enough stability yet, so more research and development must be required in the future. Especially, cell stack needs a proper state of three phases (liquid, gas and solid) interface. It is very difficult technology to keep this condition for a long time. In the small size cell with the electrode area of 100 cm{sup 2}, gas flow and temperature distributions show uniformity. But in the large size cell with the electrode area of 4000 cm{sup 2}, the temperature distributions show non-uniformity. These distributions would cause to be shorten the cell life. Because these distributions make hot-spot and gas poverty in limited parts. So we inserted thermocouples in short-stack for measuring three-dimensional temperature distributions and observed effects of current density and gas utilization on temperature.

  12. ARM assembly language with hardware experiments

    CERN Document Server

    Elahi, Ata

    2015-01-01

    This book provides a hands-on approach to learning ARM assembly language with the use of a TI microcontroller. The book starts with an introduction to computer architecture and then discusses number systems and digital logic. The text covers ARM Assembly Language, ARM Cortex Architecture and its components, and Hardware Experiments using TILM3S1968. Written for those interested in learning embedded programming using an ARM Microcontroller. ·         Introduces number systems and signal transmission methods   ·         Reviews logic gates, registers, multiplexers, decoders and memory   ·         Provides an overview and examples of ARM instruction set   ·         Uses using Keil development tools for writing and debugging ARM assembly language Programs   ·         Hardware experiments using a Mbed NXP LPC1768 microcontroller; including General Purpose Input/Output (GPIO) configuration, real time clock configuration, binary input to 7-segment display, creating ...

  13. ISS Logistics Hardware Disposition and Metrics Validation

    Science.gov (United States)

    Rogers, Toneka R.

    2010-01-01

    I was assigned to the Logistics Division of the International Space Station (ISS)/Spacecraft Processing Directorate. The Division consists of eight NASA engineers and specialists that oversee the logistics portion of the Checkout, Assembly, and Payload Processing Services (CAPPS) contract. Boeing, their sub-contractors and the Boeing Prime contract out of Johnson Space Center, provide the Integrated Logistics Support for the ISS activities at Kennedy Space Center. Essentially they ensure that spares are available to support flight hardware processing and the associated ground support equipment (GSE). Boeing maintains a Depot for electrical, mechanical and structural modifications and/or repair capability as required. My assigned task was to learn project management techniques utilized by NASA and its' contractors to provide an efficient and effective logistics support infrastructure to the ISS program. Within the Space Station Processing Facility (SSPF) I was exposed to Logistics support components, such as, the NASA Spacecraft Services Depot (NSSD) capabilities, Mission Processing tools, techniques and Warehouse support issues, required for integrating Space Station elements at the Kennedy Space Center. I also supported the identification of near-term ISS Hardware and Ground Support Equipment (GSE) candidates for excessing/disposition prior to October 2010; and the validation of several Logistics Metrics used by the contractor to measure logistics support effectiveness.

  14. Introduction to Hardware Security and Trust

    CERN Document Server

    Wang, Cliff

    2012-01-01

    The emergence of a globalized, horizontal semiconductor business model raises a set of concerns involving the security and trust of the information systems on which modern society is increasingly reliant for mission-critical functionality. Hardware-oriented security and trust issues span a broad range including threats related to the malicious insertion of Trojan circuits designed, e.g.,to act as a ‘kill switch’ to disable a chip, to integrated circuit (IC) piracy,and to attacks designed to extract encryption keys and IP from a chip. This book provides the foundations for understanding hardware security and trust, which have become major concerns for national security over the past decade.  Coverage includes security and trust issues in all types of electronic devices and systems such as ASICs, COTS, FPGAs, microprocessors/DSPs, and embedded systems.  This serves as an invaluable reference to the state-of-the-art research that is of critical significance to the security of,and trust in, modern society�...

  15. Fast image processing on parallel hardware

    International Nuclear Information System (INIS)

    Bittner, U.

    1988-01-01

    Current digital imaging modalities in the medical field incorporate parallel hardware which is heavily used in the stage of image formation like the CT/MR image reconstruction or in the DSA real time subtraction. In order to image post-processing as efficient as image acquisition, new software approaches have to be found which take full advantage of the parallel hardware architecture. This paper describes the implementation of two-dimensional median filter which can serve as an example for the development of such an algorithm. The algorithm is analyzed by viewing it as a complete parallel sort of the k pixel values in the chosen window which leads to a generalization to rank order operators and other closely related filters reported in literature. A section about the theoretical base of the algorithm gives hints for how to characterize operations suitable for implementations on pipeline processors and the way to find the appropriate algorithms. Finally some results that computation time and usefulness of medial filtering in radiographic imaging are given

  16. CAM and stack air sampler design guide

    International Nuclear Information System (INIS)

    Phillips, T.D.

    1994-01-01

    About 128 air samplers and CAMs presently in service to detect and document potential radioactive release from 'H' and 'F' area tank farm ventilation stacks are scheduled for replacement and/or upgrade by Projects S-5764, S-2081, S-3603, and S-4516. The seven CAMs scheduled to be upgraded by Project S-4516 during 1995 are expected to provide valuable experience for the three remaining projects. The attached document provides design guidance for the standardized High Level Waste air sampling system

  17. Contemporary sample stacking in analytical electrophoresis

    Czech Academy of Sciences Publication Activity Database

    Malá, Zdeňka; Gebauer, Petr; Boček, Petr

    2011-01-01

    Roč. 32, č. 1 (2011), s. 116-126 ISSN 0173-0835 R&D Projects: GA ČR GA203/08/1536; GA ČR GAP206/10/1219; GA AV ČR IAA400310703 Institutional research plan: CEZ:AV0Z40310501 Keywords : biological samples * stacking * trace analysis * zone electrophoresis Subject RIV: CB - Analytical Chemistry, Separation Impact factor: 3.303, year: 2011

  18. Stacked Switched Capacitor Energy Buffer Architecture

    OpenAIRE

    Chen, Minjie; Perreault, David J.; Afridi, Khurram

    2012-01-01

    Electrolytic capacitors are often used for energy buffering applications, including buffering between single-phase ac and dc. While these capacitors have high energy density compared to film and ceramic capacitors, their life is limited. This paper presents a stacked switched capacitor (SSC) energy buffer architecture and some of its topological embodiments, which when used with longer life film capacitors overcome this limitation while achieving effective energy densities comparable to elect...

  19. When is stacking confusing? The impact of confusion on stacking in deep H I galaxy surveys

    Science.gov (United States)

    Jones, Michael G.; Haynes, Martha P.; Giovanelli, Riccardo; Papastergis, Emmanouil

    2016-01-01

    We present an analytic model to predict the H I mass contributed by confused sources to a stacked spectrum in a generic H I survey. Based on the ALFALFA (Arecibo Legacy Fast ALFA) correlation function, this model is in agreement with the estimates of confusion present in stacked Parkes telescope data, and was used to predict how confusion will limit stacking in the deepest Square Kilometre Array precursor H I surveys. Stacking with LADUMA (Looking At the Distant Universe with MeerKAT) and DINGO UDEEP (Deep Investigation of Neutral Gas Origins - Ultra Deep) data will only be mildly impacted by confusion if their target synthesized beam size of 10 arcsec can be achieved. Any beam size significantly above this will result in stacks that contain a mass in confused sources that is comparable to (or greater than) that which is detectable via stacking, at all redshifts. CHILES (COSMOS H I Large Extragalactic Survey) 5 arcsec resolution is more than adequate to prevent confusion influencing stacking of its data, throughout its bandpass range. FAST (Five hundred metre Aperture Spherical Telescope) will be the most impeded by confusion, with H I surveys likely becoming heavily confused much beyond z = 0.1. The largest uncertainties in our model are the redshift evolution of the H I density of the Universe and the H I correlation function. However, we argue that the two idealized cases we adopt should bracket the true evolution, and the qualitative conclusions are unchanged regardless of the model choice. The profile shape of the signal due to confusion (in the absence of any detection) was also modelled, revealing that it can take the form of a double Gaussian with a narrow and wide component.

  20. Thyristor stack for pulsed inductive plasma generation.

    Science.gov (United States)

    Teske, C; Jacoby, J; Schweizer, W; Wiechula, J

    2009-03-01

    A thyristor stack for pulsed inductive plasma generation has been developed and tested. The stack design includes a free wheeling diode assembly for current reversal. Triggering of the device is achieved by a high side biased, self supplied gate driver unit using gating energy derived from a local snubber network. The structure guarantees a hard firing gate pulse for the required high dI/dt application. A single fiber optic command is needed to achieve a simultaneous turn on of the thyristors. The stack assembly is used for switching a series resonant circuit with a ringing frequency of 30 kHz. In the prototype pulsed power system described here an inductive discharge has been generated with a pulse duration of 120 micros and a pulse energy of 50 J. A maximum power transfer efficiency of 84% and a peak power of 480 kW inside the discharge were achieved. System tests were performed with a purely inductive load and an inductively generated plasma acting as a load through transformer action at a voltage level of 4.1 kV, a peak current of 5 kA, and a current switching rate of 1 kA/micros.

  1. Electrochemical Detection in Stacked Paper Networks.

    Science.gov (United States)

    Liu, Xiyuan; Lillehoj, Peter B

    2015-08-01

    Paper-based electrochemical biosensors are a promising technology that enables rapid, quantitative measurements on an inexpensive platform. However, the control of liquids in paper networks is generally limited to a single sample delivery step. Here, we propose a simple method to automate the loading and delivery of liquid samples to sensing electrodes on paper networks by stacking multiple layers of paper. Using these stacked paper devices (SPDs), we demonstrate a unique strategy to fully immerse planar electrodes by aqueous liquids via capillary flow. Amperometric measurements of xanthine oxidase revealed that electrochemical sensors on four-layer SPDs generated detection signals up to 75% higher compared with those on single-layer paper devices. Furthermore, measurements could be performed with minimal user involvement and completed within 30 min. Due to its simplicity, enhanced automation, and capability for quantitative measurements, stacked paper electrochemical biosensors can be useful tools for point-of-care testing in resource-limited settings. © 2015 Society for Laboratory Automation and Screening.

  2. Hardware development process for Human Research facility applications

    Science.gov (United States)

    Bauer, Liz

    2000-01-01

    The simple goal of the Human Research Facility (HRF) is to conduct human research experiments on the International Space Station (ISS) astronauts during long-duration missions. This is accomplished by providing integration and operation of the necessary hardware and software capabilities. A typical hardware development flow consists of five stages: functional inputs and requirements definition, market research, design life cycle through hardware delivery, crew training, and mission support. The purpose of this presentation is to guide the audience through the early hardware development process: requirement definition through selecting a development path. Specific HRF equipment is used to illustrate the hardware development paths. .

  3. Advanced Plant Habitat (APH)

    Science.gov (United States)

    Richards, Stephanie E. (Compiler); Levine, Howard G.; Reed, David W.

    2016-01-01

    The Advanced Plant Habitat (APH) hardware will be a large growth volume plant habitat, capable of hosting multigenerational studies, in which environmental variables (e.g., temperature, relative humidity, carbon dioxide level light intensity and spectral quality) can be tracked and controlled in support of whole plant physiological testing and Bio-regenerative Life Support System investigations.

  4. Guanine base stacking in G-quadruplex nucleic acids

    Science.gov (United States)

    Lech, Christopher Jacques; Heddi, Brahim; Phan, Anh Tuân

    2013-01-01

    G-quadruplexes constitute a class of nucleic acid structures defined by stacked guanine tetrads (or G-tetrads) with guanine bases from neighboring tetrads stacking with one another within the G-tetrad core. Individual G-quadruplexes can also stack with one another at their G-tetrad interface leading to higher-order structures as observed in telomeric repeat-containing DNA and RNA. In this study, we investigate how guanine base stacking influences the stability of G-quadruplexes and their stacked higher-order structures. A structural survey of the Protein Data Bank is conducted to characterize experimentally observed guanine base stacking geometries within the core of G-quadruplexes and at the interface between stacked G-quadruplex structures. We couple this survey with a systematic computational examination of stacked G-tetrad energy landscapes using quantum mechanical computations. Energy calculations of stacked G-tetrads reveal large energy differences of up to 12 kcal/mol between experimentally observed geometries at the interface of stacked G-quadruplexes. Energy landscapes are also computed using an AMBER molecular mechanics description of stacking energy and are shown to agree quite well with quantum mechanical calculated landscapes. Molecular dynamics simulations provide a structural explanation for the experimentally observed preference of parallel G-quadruplexes to stack in a 5′–5′ manner based on different accessible tetrad stacking modes at the stacking interfaces of 5′–5′ and 3′–3′ stacked G-quadruplexes. PMID:23268444

  5. Accelerating epistasis analysis in human genetics with consumer graphics hardware

    Directory of Open Access Journals (Sweden)

    Cancare Fabio

    2009-07-01

    Full Text Available Abstract Background Human geneticists are now capable of measuring more than one million DNA sequence variations from across the human genome. The new challenge is to develop computationally feasible methods capable of analyzing these data for associations with common human disease, particularly in the context of epistasis. Epistasis describes the situation where multiple genes interact in a complex non-linear manner to determine an individual's disease risk and is thought to be ubiquitous for common diseases. Multifactor Dimensionality Reduction (MDR is an algorithm capable of detecting epistasis. An exhaustive analysis with MDR is often computationally expensive, particularly for high order interactions. This challenge has previously been met with parallel computation and expensive hardware. The option we examine here exploits commodity hardware designed for computer graphics. In modern computers Graphics Processing Units (GPUs have more memory bandwidth and computational capability than Central Processing Units (CPUs and are well suited to this problem. Advances in the video game industry have led to an economy of scale creating a situation where these powerful components are readily available at very low cost. Here we implement and evaluate the performance of the MDR algorithm on GPUs. Of primary interest are the time required for an epistasis analysis and the price to performance ratio of available solutions. Findings We found that using MDR on GPUs consistently increased performance per machine over both a feature rich Java software package and a C++ cluster implementation. The performance of a GPU workstation running a GPU implementation reduces computation time by a factor of 160 compared to an 8-core workstation running the Java implementation on CPUs. This GPU workstation performs similarly to 150 cores running an optimized C++ implementation on a Beowulf cluster. Furthermore this GPU system provides extremely cost effective

  6. Accelerating epistasis analysis in human genetics with consumer graphics hardware.

    Science.gov (United States)

    Sinnott-Armstrong, Nicholas A; Greene, Casey S; Cancare, Fabio; Moore, Jason H

    2009-07-24

    Human geneticists are now capable of measuring more than one million DNA sequence variations from across the human genome. The new challenge is to develop computationally feasible methods capable of analyzing these data for associations with common human disease, particularly in the context of epistasis. Epistasis describes the situation where multiple genes interact in a complex non-linear manner to determine an individual's disease risk and is thought to be ubiquitous for common diseases. Multifactor Dimensionality Reduction (MDR) is an algorithm capable of detecting epistasis. An exhaustive analysis with MDR is often computationally expensive, particularly for high order interactions. This challenge has previously been met with parallel computation and expensive hardware. The option we examine here exploits commodity hardware designed for computer graphics. In modern computers Graphics Processing Units (GPUs) have more memory bandwidth and computational capability than Central Processing Units (CPUs) and are well suited to this problem. Advances in the video game industry have led to an economy of scale creating a situation where these powerful components are readily available at very low cost. Here we implement and evaluate the performance of the MDR algorithm on GPUs. Of primary interest are the time required for an epistasis analysis and the price to performance ratio of available solutions. We found that using MDR on GPUs consistently increased performance per machine over both a feature rich Java software package and a C++ cluster implementation. The performance of a GPU workstation running a GPU implementation reduces computation time by a factor of 160 compared to an 8-core workstation running the Java implementation on CPUs. This GPU workstation performs similarly to 150 cores running an optimized C++ implementation on a Beowulf cluster. Furthermore this GPU system provides extremely cost effective performance while leaving the CPU available for other

  7. Handbook of hardware/software codesign

    CERN Document Server

    Teich, Jürgen

    2017-01-01

    This handbook presents fundamental knowledge on the hardware/software (HW/SW) codesign methodology. Contributing expert authors look at key techniques in the design flow as well as selected codesign tools and design environments, building on basic knowledge to consider the latest techniques. The book enables readers to gain real benefits from the HW/SW codesign methodology through explanations and case studies which demonstrate its usefulness. Readers are invited to follow the progress of design techniques through this work, which assists readers in following current research directions and learning about state-of-the-art techniques. Students and researchers will appreciate the wide spectrum of subjects that belong to the design methodology from this handbook. .

  8. Algorithms for Hardware-Based Pattern Recognition

    Directory of Open Access Journals (Sweden)

    Müller Dietmar

    2004-01-01

    Full Text Available Nonlinear spatial transforms and fuzzy pattern classification with unimodal potential functions are established in signal processing. They have proved to be excellent tools in feature extraction and classification. In this paper, we will present a hardware-accelerated image processing and classification system which is implemented on one field-programmable gate array (FPGA. Nonlinear discrete circular transforms generate a feature vector. The features are analyzed by a fuzzy classifier. This principle can be used for feature extraction, pattern recognition, and classification tasks. Implementation in radix-2 structures is possible, allowing fast calculations with a computational complexity of up to . Furthermore, the pattern separability properties of these transforms are better than those achieved with the well-known method based on the power spectrum of the Fourier Transform, or on several other transforms. Using different signal flow structures, the transforms can be adapted to different image and signal processing applications.

  9. Communication Estimation for Hardware/Software Codesign

    DEFF Research Database (Denmark)

    Knudsen, Peter Voigt; Madsen, Jan

    1998-01-01

    to be general enough to be able to capture the characteristics of a wide range of communication protocols and yet to be sufficiently detailed as to allow the designer or design tool to efficiently explore tradeoffs between throughput, bus widths, burst/non-burst transfers and data packing strategies. Thus......This paper presents a general high level estimation model of communication throughput for the implementation of a given communication protocol. The model, which is part of a larger model that includes component price, software driver object code size and hardware driver area, is intended...... it provides a basis for decision making with respect to communication protocols/components and communication driver design in the initial design space exploration phase of a co-synthesis process where a large number of possibilities must be examined and where fast estimators are therefore necessary. The fill...

  10. SAMBA: hardware accelerator for biological sequence comparison.

    Science.gov (United States)

    Guerdoux-Jamet, P; Lavenier, D

    1997-12-01

    SAMBA (Systolic Accelerator for Molecular Biological Applications) is a 128 processor hardware accelerator for speeding up the sequence comparison process. The short-term objective is to provide a low-cost board to boost PC or workstation performance on this class of applications. This paper places SAMBA amongst other existing systems and highlights the original features. Real performance obtained from the prototype is demonstrated. For example, a sequence of 300 amino acids is scanned against SWISS-PROT-34 (21 210 389 residues) in 30 s using the Smith and Waterman algorithm. More time-consuming applications, like the bank-to-bank comparison, are computed in a few hours instead of days on standard workstations. Technology allows the prototype to fit onto a single PCI board for plugging into any PC or workstation. SAMBA can be tested on the WEB server at URL http://www.irisa.fr/SAMBA/.

  11. Theorem Proving in Intel Hardware Design

    Science.gov (United States)

    O'Leary, John

    2009-01-01

    For the past decade, a framework combining model checking (symbolic trajectory evaluation) and higher-order logic theorem proving has been in production use at Intel. Our tools and methodology have been used to formally verify execution cluster functionality (including floating-point operations) for a number of Intel products, including the Pentium(Registered TradeMark)4 and Core(TradeMark)i7 processors. Hardware verification in 2009 is much more challenging than it was in 1999 - today s CPU chip designs contain many processor cores and significant firmware content. This talk will attempt to distill the lessons learned over the past ten years, discuss how they apply to today s problems, outline some future directions.

  12. Battery Management System Hardware Concepts: An Overview

    Directory of Open Access Journals (Sweden)

    Markus Lelie

    2018-03-01

    Full Text Available This paper focuses on the hardware aspects of battery management systems (BMS for electric vehicle and stationary applications. The purpose is giving an overview on existing concepts in state-of-the-art systems and enabling the reader to estimate what has to be considered when designing a BMS for a given application. After a short analysis of general requirements, several possible topologies for battery packs and their consequences for the BMS’ complexity are examined. Four battery packs that were taken from commercially available electric vehicles are shown as examples. Later, implementation aspects regarding measurement of needed physical variables (voltage, current, temperature, etc. are discussed, as well as balancing issues and strategies. Finally, safety considerations and reliability aspects are investigated.

  13. EPICS: Allen-Bradley hardware reference manual

    International Nuclear Information System (INIS)

    Nawrocki, G.

    1993-01-01

    This manual covers the following hardware: Allen-Bradley 6008 -- SV VMEbus I/O scanner; Allen-Bradley universal I/O chassis 1771-A1B, -A2B, -A3B, and -A4B; Allen-Bradley power supply module 1771-P4S; Allen-Bradley 1771-ASB remote I/O adapter module; Allen-Bradley 1771-IFE analog input module; Allen-Bradley 1771-OFE analog output module; Allen-Bradley 1771-IG(D) TTL input module; Allen-Bradley 1771-OG(d) TTL output; Allen-Bradley 1771-IQ DC selectable input module; Allen-Bradley 1771-OW contact output module; Allen-Bradley 1771-IBD DC (10--30V) input module; Allen-Bradley 1771-OBD DC (10--60V) output module; Allen-Bradley 1771-IXE thermocouple/millivolt input module; and the Allen-Bradley 2705 RediPANEL push button module

  14. The double Chooz hardware trigger system

    Energy Technology Data Exchange (ETDEWEB)

    Cucoanes, Andi; Beissel, Franz; Reinhold, Bernd; Roth, Stefan; Stahl, Achim; Wiebusch, Christopher [RWTH Aachen (Germany)

    2008-07-01

    The double Chooz neutrino experiment aims to improve the present knowledge on {theta}{sub 13} mixing angle using two similar detectors placed at {proportional_to}280 m and respectively 1 km from the Chooz power plant reactor cores. The detectors measure the disappearance of reactor antineutrinos. The hardware trigger has to be very efficient for antineutrinos as well as for various types of background events. The triggering condition is based on discriminated PMT sum signals and the multiplicity of groups of PMTs. The talk gives an outlook to the double Chooz experiment and explains the requirements of the trigger system. The resulting concept and its performance is shown as well as first results from a prototype system.

  15. Fast Gridding on Commodity Graphics Hardware

    DEFF Research Database (Denmark)

    Sørensen, Thomas Sangild; Schaeffter, Tobias; Noe, Karsten Østergaard

    2007-01-01

    is the far most time consuming of the three steps (Table 1). Modern graphics cards (GPUs) can be utilised as a fast parallel processor provided that algorithms are reformulated in a parallel solution. The purpose of this work is to test the hypothesis, that a non-cartesian reconstruction can be efficiently......The most commonly used algorithm for non-cartesian MRI reconstruction is the gridding algorithm [1]. It consists of three steps:                    1) convolution with a gridding kernel and resampling on a cartesian grid, 2) inverse FFT, and 3) deapodization. On the CPU the convolution step...... implemented on graphics hardware giving a significant speedup compared to CPU based alternatives. We present a novel GPU implementation of the convolution step that overcomes the problems of memory bandwidth that has limited the speed of previous GPU gridding algorithms [2]....

  16. Locating hardware faults in a parallel computer

    Science.gov (United States)

    Archer, Charles J.; Megerian, Mark G.; Ratterman, Joseph D.; Smith, Brian E.

    2010-04-13

    Locating hardware faults in a parallel computer, including defining within a tree network of the parallel computer two or more sets of non-overlapping test levels of compute nodes of the network that together include all the data communications links of the network, each non-overlapping test level comprising two or more adjacent tiers of the tree; defining test cells within each non-overlapping test level, each test cell comprising a subtree of the tree including a subtree root compute node and all descendant compute nodes of the subtree root compute node within a non-overlapping test level; performing, separately on each set of non-overlapping test levels, an uplink test on all test cells in a set of non-overlapping test levels; and performing, separately from the uplink tests and separately on each set of non-overlapping test levels, a downlink test on all test cells in a set of non-overlapping test levels.

  17. MODEL OF SYNTHESIS OF A HARDWARE AND SOFTWARE SYSTEM DESIGNATED FOR AN INTELLIGENT OFFICE BUILDING

    Directory of Open Access Journals (Sweden)

    Ogirenko Andrey Grigor'evich

    2012-10-01

    Full Text Available The problem of synthesis of technology-intensive constituents of an intelligent office system, implemented in advanced office buildings, is the subject matter of this article. On the basis of the proposed classification and the analysis performed by the author, the general structure of the multilevel distributed system, that has radial treelike lines of communications, is developed. The structure of the intelligent office system designated for advanced real estate facilities represents an integration of two structures, including the functional constituent and the hardware constituent. The model of optimization of the hardware constituent is proposed by the author. The article also contains an overview of the model implementation within the framework of a set of intelligent buildings in the centre of Moscow.

  18. Hardware/Software Data Acquisition System for Real Time Cell Temperature Monitoring in Air-Cooled Polymer Electrolyte Fuel Cells

    Directory of Open Access Journals (Sweden)

    Francisca Segura

    2017-07-01

    Full Text Available This work presents a hardware/software data acquisition system developed for monitoring the temperature in real time of the cells in Air-Cooled Polymer Electrolyte Fuel Cells (AC-PEFC. These fuel cells are of great interest because they can carry out, in a single operation, the processes of oxidation and refrigeration. This allows reduction of weight, volume, cost and complexity of the control system in the AC-PEFC. In this type of PEFC (and in general in any PEFC, the reliable monitoring of temperature along the entire surface of the stack is fundamental, since a suitable temperature and a regular distribution thereof, are key for a better performance of the stack and a longer lifetime under the best operating conditions. The developed data acquisition (DAQ system can perform non-intrusive temperature measurements of each individual cell of an AC-PEFC stack of any power (from watts to kilowatts. The stack power is related to the temperature gradient; i.e., a higher power corresponds to a higher stack surface, and consequently higher temperature difference between the coldest and the hottest point. The developed DAQ system has been implemented with the low-cost open-source platform Arduino, and it is completed with a modular virtual instrument that has been developed using NI LabVIEW. Temperature vs time evolution of all the cells of an AC-PEFC both together and individually can be registered and supervised. The paper explains comprehensively the developed DAQ system together with experimental results that demonstrate the suitability of the system.

  19. Hardware/Software Data Acquisition System for Real Time Cell Temperature Monitoring in Air-Cooled Polymer Electrolyte Fuel Cells.

    Science.gov (United States)

    Segura, Francisca; Bartolucci, Veronica; Andújar, José Manuel

    2017-07-09

    This work presents a hardware/software data acquisition system developed for monitoring the temperature in real time of the cells in Air-Cooled Polymer Electrolyte Fuel Cells (AC-PEFC). These fuel cells are of great interest because they can carry out, in a single operation, the processes of oxidation and refrigeration. This allows reduction of weight, volume, cost and complexity of the control system in the AC-PEFC. In this type of PEFC (and in general in any PEFC), the reliable monitoring of temperature along the entire surface of the stack is fundamental, since a suitable temperature and a regular distribution thereof, are key for a better performance of the stack and a longer lifetime under the best operating conditions. The developed data acquisition (DAQ) system can perform non-intrusive temperature measurements of each individual cell of an AC-PEFC stack of any power (from watts to kilowatts). The stack power is related to the temperature gradient; i.e., a higher power corresponds to a higher stack surface, and consequently higher temperature difference between the coldest and the hottest point. The developed DAQ system has been implemented with the low-cost open-source platform Arduino, and it is completed with a modular virtual instrument that has been developed using NI LabVIEW. Temperature vs time evolution of all the cells of an AC-PEFC both together and individually can be registered and supervised. The paper explains comprehensively the developed DAQ system together with experimental results that demonstrate the suitability of the system.

  20. Improved Direct Methanol Fuel Cell Stack

    Science.gov (United States)

    Wilson, Mahlon S.; Ramsey, John C.

    2005-03-08

    A stack of direct methanol fuel cells exhibiting a circular footprint. A cathode and anode manifold, tie-bolt penetrations and tie-bolts are located within the circular footprint. Each fuel cell uses two graphite-based plates. One plate includes a cathode active area that is defined by serpentine channels connecting the inlet and outlet cathode manifold. The other plate includes an anode active area defined by serpentine channels connecting the inlet and outlet of the anode manifold, where the serpentine channels of the anode are orthogonal to the serpentine channels of the cathode. Located between the two plates is the fuel cell active region.

  1. NSF tandem stack support structure deflection characteristics

    International Nuclear Information System (INIS)

    Cook, J.

    1979-12-01

    Results are reported of load tests carried out on the glass legs of the insulating stack of the 30 MV tandem Van de Graaff accelerator now under construction at Daresbury Laboratory. The tests to investigate the vulnerability of the legs when subjected to tensile stresses were designed to; establish the angle of rotation of the pads from which the stresses in the glass legs may be calculated, proof-test the structure and at the same time reveal any asymmetry in pad rotations or deflections, and to confirm the validity of the computer design analysis. (UK)

  2. Compliant Glass Seals for SOFC Stacks

    Energy Technology Data Exchange (ETDEWEB)

    Chou, Yeong -Shyung [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Choi, Jung-Pyung [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Xu, Wei [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Stephens, Elizabeth V. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Koeppel, Brian J. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Stevenson, Jeffry W. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Lara-Curzio, Edgar [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)

    2014-04-30

    This report summarizes results from experimental and modeling studies performed by participants in the Solid-State Energy Conversion Alliance (SECA) Core Technology Program, which indicate that compliant glass-based seals offer a number of potential advantages over conventional seals based on de-vitrifying glasses, including reduced stresses during stack operation and thermal cycling, and the ability to heal micro-damage induced during thermal cycling. The properties and composition of glasses developed and/or investigated in these studies are reported, along with results from long-term (up to 5,800h) evaluations of seals based on a compliant glass containing ceramic particles or ceramic fibers.

  3. Effects of combustible stacking in large compartments

    DEFF Research Database (Denmark)

    Gentili, Filippo; Giuliani, Luisa; Bontempi, Franco

    2013-01-01

    This paper focuses on the modelling of fire in case of various distributions of combustible materials in a large compartment. Large compartments often represent a challenge for structural fire safety, because of lack of prescriptive rules to follow and difficulties of taking into account the effect...... to different stacking configurations of the pallets with the avail of a CFD code. The results in term of temperatures of the hot gasses and of the steel elements composing the structural system are compared with simplified analytical model of localized and post-flashover fires, with the aim of highlighting...

  4. Displacive phase transformations and generalized stacking faults

    Czech Academy of Sciences Publication Activity Database

    Paidar, Václav; Ostapovets, Andriy; Duparc, O. H.; Khalfallah, O.

    2012-01-01

    Roč. 122, č. 3 (2012), s. 490-492 ISSN 0587-4246. [International Symposium on Physics of Materials, ISPMA /12./. Praha, 04.09.2011-08.09.2011] R&D Projects: GA AV ČR IAA100100920 Institutional research plan: CEZ:AV0Z10100520 Keywords : ab-initio calculations * close-packed structures * generalized stacking faults * homogeneous deformation * lattice deformation * many-body potentials Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 0.531, year: 2012

  5. Sampled-time control of a microbial fuel cell stack

    Science.gov (United States)

    Boghani, Hitesh C.; Dinsdale, Richard M.; Guwy, Alan J.; Premier, Giuliano C.

    2017-07-01

    Research into microbial fuel cells (MFCs) has reached the point where cubic metre-scale systems and stacks are being built and tested. Apart from performance enhancement through catalysis, materials and design, an important research area for industrial applicability is stack control, which can enhance MFCs stack power output. An MFC stack is controlled using a sampled-time digital control strategy, which has the advantage of intermittent operation with consequent power saving, and when used in a hybrid series stack connectivity, can avoid voltage reversals. A MFC stack comprising four tubular MFCs was operated hydraulically in series. Each MFC was connected to an independent controller and the stack was connected electrically in series, creating a hybrid-series connectivity. The voltage of each MFC in the stack was controlled such that the overall series stack voltage generated was the algebraic sum (1.26 V) of the individual MFC voltages (0.32, 0.32, 0.32 and 0.3). The controllers were able to control the individual voltages to the point where 2.52 mA was drawn from the stack at a load of 499.9 Ω (delivering 3.18 mW). The controllers were able to reject the disturbances and perturbations caused by electrical loading, temperature and substrate concentration.

  6. Hardware descriptions of the I and C systems for NPP

    International Nuclear Information System (INIS)

    Lee, Cheol Kwon; Oh, In Suk; Park, Joo Hyun; Kim, Dong Hoon; Han, Jae Bok; Shin, Jae Whal; Kim, Young Bak

    2003-09-01

    The hardware specifications for I and C Systems of SNPP(Standard Nuclear Power Plant) are reviewed in order to acquire the hardware requirement and specification of KNICS (Korea Nuclear Instrumentation and Control System). In the study, we investigated hardware requirements, hardware configuration, hardware specifications, man-machine hardware requirements, interface requirements with the other system, and data communication requirements that are applicable to SNP. We reviewed those things of control systems, protection systems, monitoring systems, information systems, and process instrumentation systems. Through the study, we described the requirements and specifications of digital systems focusing on a microprocessor and a communication interface, and repeated it for analog systems focusing on the manufacturing companies. It is expected that the experience acquired from this research will provide vital input for the development of the KNICS

  7. FocusStack and StimServer: A new open source MATLAB toolchain for visual stimulation and analysis of two-photon calcium neuronal imaging data

    Directory of Open Access Journals (Sweden)

    Dylan Richard Muir

    2015-01-01

    Full Text Available Two-photon calcium imaging of neuronal responses is an increasingly accessible technology for probing population responses in cortex at single cell resolution, and with reasonable and improving temporal resolution. However, analysis of two-photon data is usually performed using ad-hoc solutions. To date, no publicly available software exists for straightforward analysis of stimulus-triggered two-photon imaging experiments. In addition, the increasing data rates of two-photon acquisition systems imply increasing cost of computing hardware required for in-memory analysis. Here we present a Matlab toolbox, FocusStack, for simple and efficient analysis of two-photon calcium imaging stacks on consumer-level hardware, with minimal memory footprint. We also present a Matlab toolbox, StimServer, for generation and sequencing of visual stimuli, designed to be triggered over a network link from a two-photon acquisition system. FocusStack is compatible out of the box with several existing two-photon acquisition systems, and is simple to adapt to arbitrary binary file formats. Analysis tools such as stack alignment for movement correction, automated cell detection and peri-stimulus time histograms are already provided, and further tools can be easily incorporated. Both packages are available as publicly-accessible source-code repositories.

  8. FocusStack and StimServer: a new open source MATLAB toolchain for visual stimulation and analysis of two-photon calcium neuronal imaging data.

    Science.gov (United States)

    Muir, Dylan R; Kampa, Björn M

    2014-01-01

    Two-photon calcium imaging of neuronal responses is an increasingly accessible technology for probing population responses in cortex at single cell resolution, and with reasonable and improving temporal resolution. However, analysis of two-photon data is usually performed using ad-hoc solutions. To date, no publicly available software exists for straightforward analysis of stimulus-triggered two-photon imaging experiments. In addition, the increasing data rates of two-photon acquisition systems imply increasing cost of computing hardware required for in-memory analysis. Here we present a Matlab toolbox, FocusStack, for simple and efficient analysis of two-photon calcium imaging stacks on consumer-level hardware, with minimal memory footprint. We also present a Matlab toolbox, StimServer, for generation and sequencing of visual stimuli, designed to be triggered over a network link from a two-photon acquisition system. FocusStack is compatible out of the box with several existing two-photon acquisition systems, and is simple to adapt to arbitrary binary file formats. Analysis tools such as stack alignment for movement correction, automated cell detection and peri-stimulus time histograms are already provided, and further tools can be easily incorporated. Both packages are available as publicly-accessible source-code repositories.

  9. The use of low cost compact cameras with focus stacking functionality in entomological digitization projects

    Directory of Open Access Journals (Sweden)

    Jan Mertens

    2017-10-01

    Full Text Available Digitization of specimen collections has become a key priority of many natural history museums. The camera systems built for this purpose are expensive, providing a barrier in institutes with limited funding, and therefore hampering progress. An assessment is made on whether a low cost compact camera with image stacking functionality can help expedite the digitization process in large museums or provide smaller institutes and amateur entomologists with the means to digitize their collections. Images of a professional setup were compared with the Olympus Stylus TG-4 Tough, a low-cost compact camera with internal focus stacking functions. Parameters considered include image quality, digitization speed, price, and ease-of-use. The compact camera’s image quality, although inferior to the professional setup, is exceptional considering its fourfold lower price point. Producing the image slices in the compact camera is a matter of seconds and when optimal image quality is less of a priority, the internal stacking function omits the need for dedicated stacking software altogether, further decreasing the cost and speeding up the process. In general, it is found that, aware of its limitations, this compact camera is capable of digitizing entomological collections with sufficient quality. As technology advances, more institutes and amateur entomologists will be able to easily and affordably catalogue their specimens.

  10. Analog Exercise Hardware to Implement a High Intensity Exercise Program During Bed Rest

    Science.gov (United States)

    Loerch, Linda; Newby, Nate; Ploutz-Snyder, Lori

    2012-01-01

    used for leg press and heel raise exercises. Minor modifications were made to the device including adding 200 lbs to the weight stack, raising the frame by 12 inches, making the footplate adjustable, and providing removable handles. Conclusion: A combination of novel and commercial exercise hardware are used to mimic the exercise hardware capabilities aboard the ISS, allowing scientific investigation of new countermeasure protocols in a space flight analog prior to flight validation

  11. Swarm behavioral sorting based on robotic hardware variation

    OpenAIRE

    Shang, Beining; Crowder, Richard; Zauner, Klaus-Peter

    2014-01-01

    Swarm robotic systems can offer advantages of robustness, flexibility and scalability, just like social insects. One of the issues that researchers are facing is the hardware variation when implementing real robotic swarms. Identical software cannot guarantee identical behaviors among all robots due to hardware differences between swarm members. We propose a novel approach for sorting swarm robots according to their hardware differences. This method is based on the large number of interaction...

  12. Why Open Source Hardware matters and why you should care

    OpenAIRE

    Gürkaynak, Frank K.

    2017-01-01

    Open source hardware is currently where open source software was about 30 years ago. The idea is well received by enthusiasts, there is interest and the open source hardware has gained visible momentum recently, with several well-known universities including UC Berkeley, Cambridge and ETH Zürich actively working on large projects involving open source hardware, attracting the attention of companies big and small. But it is still not quite there yet. In this talk, based on my experience on the...

  13. Hardware/Software Co-design using Primitive Interface

    OpenAIRE

    Navin Chourasia; Puran Gaur

    2011-01-01

    Most engineering designs can be viewed as systems, i.e., as collections of several components whose combined operation provides useful services. Components can be heterogeneous in nature and their interaction may be regulated by some simple or complex means. Interface between Hardware & Software plays a very important role in co-design of the embedded system. Hardware/software co-design means meeting system-level objectives by exploiting the synergism of hardware and software through their co...

  14. AC impedance diagnosis of a 500 W PEM fuel cell stack . Part I: Stack impedance

    Science.gov (United States)

    Yuan, Xiaozi; Sun, Jian Colin; Blanco, Mauricio; Wang, Haijiang; Zhang, Jiujun; Wilkinson, David P.

    Diagnosis of stack performance is of importance to proton exchange membrane (PEM) fuel cell research. This paper presents the diagnostic testing results of a 500 W Ballard Mark V PEM fuel cell stack with an active area of 280 cm 2 by electrochemical impedance spectroscopy (EIS). The EIS was measured using a combination of a FuelCon test station, a TDI loadbank, and a Solartron 1260 Impedance/Gain-Phase Analyzer operating in the galvanostatic mode. The method described in this work can obtain the impedance spectra of fuel cells with a larger geometric surface area and power, which are normally difficult to measure due to the limitations on commercial load banks operating at high currents. By using this method, the effects of temperature, flow rate, and humidity on the stack impedance spectra were examined. The results of the electrochemical impedance analysis show that with increasing temperature, the charge transfer resistance decreases due to the slow oxygen reduction reaction (ORR) process at low temperature. If the stack is operated at a fixed air flow rate, a low frequency arc appears and grows with increasing current due to the shortage of air. The anode humidification cut-off does not affect the spectra compared to the cut-off for cathode humidification.

  15. Stray field interaction of stacked amorphous tapes

    International Nuclear Information System (INIS)

    Guenther, Wulf; Flohrer, Sybille

    2008-01-01

    In this study, magnetic cores made of amorphous rectangular tape layers are investigated. The quality factor Q of the tape material decreases rapidly, however, when stacking at least two tape layers. The hysteresis loop becomes non-linear, and the coercivity increases. These effects are principally independent of the frequency and occur whether tape layers are insulated or not. The Kerr-microscopy was used to monitor local hysteresis loops by varying the distance of two tape layers. The magnetization direction of each magnetic domain is influenced by the anisotropy axis, the external magnetic field and the stray field of magnetic domains of the neighboring tape layers. We found that crossed easy axes (as the extreme case for inclined axes) of congruent domains retain the remagnetization and induce a plateau of the local loop. Summarizing local loops leads to the observed increase of coercivity and non-linearity of the inductively measured loop. A high Q-factor can be preserved if the easy axes of stacked tape layers are identical within the interaction range in the order of mm

  16. Annular feed air breathing fuel cell stack

    Science.gov (United States)

    Wilson, Mahlon S.; Neutzler, Jay K.

    1997-01-01

    A stack of polymer electrolyte fuel cells is formed from a plurality of unit cells where each unit cell includes fuel cell components defining a periphery and distributed along a common axis, where the fuel cell components include a polymer electrolyte membrane, an anode and a cathode contacting opposite sides of the membrane, and fuel and oxygen flow fields contacting the anode and the cathode, respectively, wherein the components define an annular region therethrough along the axis. A fuel distribution manifold within the annular region is connected to deliver fuel to the fuel flow field in each of the unit cells. The fuel distribution manifold is formed from a hydrophilic-like material to redistribute water produced by fuel and oxygen reacting at the cathode. In a particular embodiment, a single bolt through the annular region clamps the unit cells together. In another embodiment, separator plates between individual unit cells have an extended radial dimension to function as cooling fins for maintaining the operating temperature of the fuel cell stack.

  17. Stacking Analysis of Binary Systems with HAWC

    Science.gov (United States)

    Brisbois, Chad; HAWC Collaboration

    2017-01-01

    Detecting binary systems at TeV energies is an important problem because only a handful of such systems are currently known. The nature of such systems is typically thought to be composed of a compact object and a massive star. The TeV emission from these systems does not obviously correspond to emission in GeV or X-ray, where many binary systems have previously been found. This study focuses on a stacking method to detect TeV emission from LS 5039, a known TeV binary, to test its efficacy in HAWC data. Stacking is a widely employed method for increasing signal to noise ratio in optical astronomy, but has never been attempted previously with HAWC. HAWC is an ideal instrument to search for TeV binaries, because of its wide field of view and high uptime. Applying this method to the entire sky may allow HAWC to detect binary sources of very short or very long periods not sensitive to current analyses. NSF, DOE, Los Alamos, Michigan Tech, CONACyt, UNAM, BUAP.

  18. High performance zinc air fuel cell stack

    Science.gov (United States)

    Pei, Pucheng; Ma, Ze; Wang, Keliang; Wang, Xizhong; Song, Mancun; Xu, Huachi

    2014-03-01

    A zinc air fuel cell (ZAFC) stack with inexpensive manganese dioxide (MnO2) as the catalyst is designed, in which the circulation flowing potassium hydroxide (KOH) electrolyte carries the reaction product away and acts as a coolant. Experiments are carried out to investigate the characteristics of polarization, constant current discharge and dynamic response, as well as the factors affecting the performance and uniformity of individual cells in the stack. The results reveal that the peak power density can be as high as 435 mW cm-2 according to the area of the air cathode sheet, and the influence factors on cell performance and uniformity are cell locations, filled state of zinc pellets, contact resistance, flow rates of electrolyte and air. It is also shown that the time needed for voltages to reach steady state and that for current step-up or current step-down are both in milliseconds, indicating the ZAFC can be excellently applied to vehicles with rapid dynamic response demands.

  19. Generalized stacking fault energies of alloys.

    Science.gov (United States)

    Li, Wei; Lu, Song; Hu, Qing-Miao; Kwon, Se Kyun; Johansson, Börje; Vitos, Levente

    2014-07-02

    The generalized stacking fault energy (γ surface) provides fundamental physics for understanding the plastic deformation mechanisms. Using the ab initio exact muffin-tin orbitals method in combination with the coherent potential approximation, we calculate the γ surface for the disordered Cu-Al, Cu-Zn, Cu-Ga, Cu-Ni, Pd-Ag and Pd-Au alloys. Studying the effect of segregation of the solute to the stacking fault planes shows that only the local chemical composition affects the γ surface. The calculated alloying trends are discussed using the electronic band structure of the base and distorted alloys.Based on our γ surface results, we demonstrate that the previous revealed 'universal scaling law' between the intrinsic energy barriers (IEBs) is well obeyed in random solid solutions. This greatly simplifies the calculations of the twinning measure parameters or the critical twinning stress. Adopting two twinnability measure parameters derived from the IEBs, we find that in binary Cu alloys, Al, Zn and Ga increase the twinnability, while Ni decreases it. Aluminum and gallium yield similar effects on the twinnability.

  20. Computerized plutonium laboratory-stack monitoring system

    International Nuclear Information System (INIS)

    Stafford, R.G.; DeVore, R.K.

    1977-01-01

    The Los Alamos Scientific Laboratory has recently designed and constructed a Plutonium Research and Development Facility to meet design criteria imposed by the United States Energy Research and Development Administration. A primary objective of the design criteria is to assure environmental protection and to reliably monitor plutonium effluent via the ventilation exhaust systems. A state-of-the-art facility exhaust air monitoring system is described which establishes near ideal conditions for evaluating plutonium activity in the stack effluent. Total and static pressure sensing manifolds are incorporated to measure average velocity and integrated total discharge air volume. These data are logged at a computer which receives instrument data through a multiplex scanning system. A multipoint isokinetic sampling assembly with associated instrumentation is described. Continuous air monitors have been designed to sample from the isokinetic sampling assembly and transmit both instantaneous and integrated stack effluent concentration data to the computer and various cathode ray tube displays. The continuous air monitors also serve as room air monitors in the plutonium facility with the primary objective of timely evacuation of personnel if an above tolerance airborne plutonium concentration is detected. Several continuous air monitors are incorporated in the ventilation system to assist in identification of release problem areas

  1. Reliable software for unreliable hardware a cross layer perspective

    CERN Document Server

    Rehman, Semeen; Henkel, Jörg

    2016-01-01

    This book describes novel software concepts to increase reliability under user-defined constraints. The authors’ approach bridges, for the first time, the reliability gap between hardware and software. Readers will learn how to achieve increased soft error resilience on unreliable hardware, while exploiting the inherent error masking characteristics and error (stemming from soft errors, aging, and process variations) mitigations potential at different software layers. · Provides a comprehensive overview of reliability modeling and optimization techniques at different hardware and software levels; · Describes novel optimization techniques for software cross-layer reliability, targeting unreliable hardware.

  2. Live HDR video streaming on commodity hardware

    Science.gov (United States)

    McNamee, Joshua; Hatchett, Jonathan; Debattista, Kurt; Chalmers, Alan

    2015-09-01

    High Dynamic Range (HDR) video provides a step change in viewing experience, for example the ability to clearly see the soccer ball when it is kicked from the shadow of the stadium into sunshine. To achieve the full potential of HDR video, so-called true HDR, it is crucial that all the dynamic range that was captured is delivered to the display device and tone mapping is confined only to the display. Furthermore, to ensure widespread uptake of HDR imaging, it should be low cost and available on commodity hardware. This paper describes an end-to-end HDR pipeline for capturing, encoding and streaming high-definition HDR video in real-time using off-the-shelf components. All the lighting that is captured by HDR-enabled consumer cameras is delivered via the pipeline to any display, including HDR displays and even mobile devices with minimum latency. The system thus provides an integrated HDR video pipeline that includes everything from capture to post-production, archival and storage, compression, transmission, and display.

  3. 8-Channel Broadband Laser Ranging Hardware Development

    Science.gov (United States)

    Bennett, Corey; La Lone, Brandon; Younk, Patrick; Daykin, Ed; Rhodes, Michelle; Perry, Daniel; Tran, Vu; Miller, Edward

    2017-06-01

    Broadband Laser Ranging (BLR) is a new diagnostic being developed to precisely measure the position vs. time of surfaces, shock break out, particle clouds, jets, and debris moving at kilometers per second speeds. The instrument uses interferometry to encode distance into a modulation in the spectrum of pulses from a mode-locked fiber laser and uses a dispersive Fourier transformation to map the spectral modulation into time. Range information is thereby recorded on a fast oscilloscope at the repetition rate of the laser, approximately every 50 ns. Current R&D is focused on developing a compact 8-channel system utilizing one laser and one high-speed oscilloscope. This talk will emphasize the hardware being developed for applications at the Contained Firing Facility at LLNL, but has a common architecture being developed in collaboration with NSTec and LANL for applications at multiple other facilities. Prepared by LLNL under Contract DE-AC52-07NA27344, by LANL under Contract DE-AC52-06NA25396, and by NSTec Contract DE-AC52-06NA25946.

  4. Hardware image assessment for wireless endoscopy capsules.

    Science.gov (United States)

    Khorsandi, M A; Karimi, N; Samavi, S; Hajabdollahi, M; Soroushmehr, S M R; Ward, K; Najarian, K

    2016-08-01

    Wireless capsule endoscopy is a new technology in the realm of telemedicine that has many advantages over the traditional endoscopy systems. Transmitted images should help diagnosis of diseases of the gastrointestinal tract. Two important technical challenges for the manufacturers of these capsules are power consumption and size of the circuitry. Also, the system must be fast enough for real-time processing of image or video data. To solve this problem, many hardware designs have been proposed for implementation of the image processing unit. In this paper we propose an architecture that could be used for the assessment of endoscopy images. The assessment allows avoidance of transmission of medically useless images. Hence, volume of data is reduced for more efficient transmission of images by the endoscopy capsule. This is done by color space conversion and moment calculation of images captured by the capsule. The inputs of the proposed architecture are RGB image frames and the outputs are images with converted colors and calculated image moments. Experimental results indicate that the proposed architecture has low complexity and is appropriate for a real-time application.

  5. A Hardware Track Finder for ATLAS Trigger

    CERN Document Server

    Volpi, G; The ATLAS collaboration; Andreazza, A; Citterio, M; Favareto, A; Liberali, V; Meroni, C; Riva, M; Sabatini, F; Stabile, A; Annovi, A; Beretta, M; Castegnaro, A; Bevacqua, V; Crescioli, F; Francesco, C; Dell'Orso, M; Giannetti, P; Magalotti, D; Piendibene, M; Roda, C; Sacco, I; Tripiccione, R; Fabbri, L; Franchini, M; Giorgi, F; Giannuzzi, F; Lasagni, F; Sbarra, C; Valentinetti, S; Villa, M; Zoccoli, A; Lanza, A; Negri, A; Vercesi, V; Bogdan, M; Boveia, A; Canelli, F; Cheng, Y; Dunford, M; Li, H L; Kapliy, A; Kim, Y K; Melachrinos, C; Shochet, M; Tang, F; Tang, J; Tuggle, J; Tompkins, L; Webster, J; Atkinson, M; Cavaliere, V; Chang, P; Kasten, M; McCarn, A; Neubauer, M; Hoff, J; Liu, T; Okumura, Y; Olsen, J; Penning, B; Todri, A; Wu, J; Drake, G; Proudfoot, J; Zhang, J; Blair, R; Anderson, J; Auerbach, B; Blazey, G; Kimura, N; Yorita, K; Sakurai, Y; Mitani, T; Iizawa, T

    2012-01-01

    The existing three level ATLAS trigger system is deployed to reduce the event rate from the bunch crossing rate of 40 MHz to ~400 Hz for permanent storage at the LHC design luminosity of 10^34 cm^-2 s^-1. When the LHC reaches beyond the design luminosity, the load on the Level-2 trigger system will significantly increase due to both the need for more sophisticated algorithms to suppress background and the larger event sizes. The Fast TracKer (FTK) is a custom electronics system that will operate at the full Level-1 accepted rate of 100 KHz and provide high quality tracks at the beginning of processing in the Level-2 trigger, by performing track reconstruction in hardware with massive parallelism of associative memories and FPGAs. The performance in important physics areas including b-tagging, tau-tagging and lepton isolation will be demonstrated with the ATLAS MC simulation at different LHC luminosities. The system design will be overviewed. The latest R&D progress of individual components...

  6. Magnetic qubits as hardware for quantum computers

    International Nuclear Information System (INIS)

    Tejada, J.; Chudnovsky, E.; Barco, E. del

    2000-01-01

    We propose two potential realisations for quantum bits based on nanometre scale magnetic particles of large spin S and high anisotropy molecular clusters. In case (1) the bit-value basis states vertical bar-0> and vertical bar-1> are the ground and first excited spin states S z = S and S-1, separated by an energy gap given by the ferromagnetic resonance (FMR) frequency. In case (2), when there is significant tunnelling through the anisotropy barrier, the qubit states correspond to the symmetric, vertical bar-0>, and antisymmetric, vertical bar-1>, combinations of the two-fold degenerate ground state S z = ± S. In each case the temperature of operation must be low compared to the energy gap, Δ, between the states vertical bar-0> and vertical bar-1>. The gap Δ in case (2) can be controlled with an external magnetic field perpendicular to the easy axis of the molecular cluster. The states of different molecular clusters and magnetic particles may be entangled by connecting them by superconducting lines with Josephson switches, leading to the potential for quantum computing hardware. (author)

  7. Magnetic qubits as hardware for quantum computers

    Energy Technology Data Exchange (ETDEWEB)

    Tejada, J.; Chudnovsky, E.; Barco, E. del [and others

    2000-07-01

    We propose two potential realisations for quantum bits based on nanometre scale magnetic particles of large spin S and high anisotropy molecular clusters. In case (1) the bit-value basis states vertical bar-0> and vertical bar-1> are the ground and first excited spin states S{sub z} = S and S-1, separated by an energy gap given by the ferromagnetic resonance (FMR) frequency. In case (2), when there is significant tunnelling through the anisotropy barrier, the qubit states correspond to the symmetric, vertical bar-0>, and antisymmetric, vertical bar-1>, combinations of the two-fold degenerate ground state S{sub z} = {+-} S. In each case the temperature of operation must be low compared to the energy gap, {delta}, between the states vertical bar-0> and vertical bar-1>. The gap {delta} in case (2) can be controlled with an external magnetic field perpendicular to the easy axis of the molecular cluster. The states of different molecular clusters and magnetic particles may be entangled by connecting them by superconducting lines with Josephson switches, leading to the potential for quantum computing hardware. (author)

  8. Mechanics of Granular Materials labeled hardware

    Science.gov (United States)

    2000-01-01

    Mechanics of Granular Materials (MGM) flight hardware takes two twin double locker assemblies in the Space Shuttle middeck or the Spacehab module. Sand and soil grains have faces that can cause friction as they roll and slide against each other, or even cause sticking and form small voids between grains. This complex behavior can cause soil to behave like a liquid under certain conditions such as earthquakes or when powders are handled in industrial processes. MGM experiments aboard the Space Shuttle use the microgravity of space to simulate this behavior under conditions that carnot be achieved in laboratory tests on Earth. MGM is shedding light on the behavior of fine-grain materials under low effective stresses. Applications include earthquake engineering, granular flow technologies (such as powder feed systems for pharmaceuticals and fertilizers), and terrestrial and planetary geology. Nine MGM specimens have flown on two Space Shuttle flights. Another three are scheduled to fly on STS-107. The principal investigator is Stein Sture of the University of Colorado at Boulder. (Credit: NASA/MSFC).

  9. Open Hardware For CERN's Accelerator Control Systems

    CERN Document Server

    van der Bij, E; Ayass, M; Boccardi, A; Cattin, M; Gil Soriano, C; Gousiou, E; Iglesias Gonsálvez, S; Penacoba Fernandez, G; Serrano, J; Voumard, N; Wlostowski, T

    2011-01-01

    The accelerator control systems at CERN will be renovated and many electronics modules will be redesigned as the modules they will replace cannot be bought anymore or use obsolete components. The modules used in the control systems are diverse: analog and digital I/O, level converters and repeaters, serial links and timing modules. Overall around 120 modules are supported that are used in systems such as beam instrumentation, cryogenics and power converters. Only a small percentage of the currently used modules are commercially available, while most of them had been specifically designed at CERN. The new developments are based on VITA and PCI-SIG standards such as FMC (FPGA Mezzanine Card), PCI Express and VME64x using transition modules. As system-on-chip interconnect, the public domain Wishbone specification is used. For the renovation, it is considered imperative to have for each board access to the full hardware design and its firmware so that problems could quickly be resolved by CERN engineers or its ...

  10. A Framework for Assessing the Reusability of Hardware (Reusable Rocket Engines)

    Science.gov (United States)

    Childress-Thompson, Rhonda; Thomas, Dale; Farrington, Philip

    2016-01-01

    Within the past few years, there has been a renewed interest in reusability as it applies to space flight hardware. Commercial companies such as Space Exploration Technologies Corporation (SpaceX), Blue Origin, and United Launch Alliance (ULA) are pursuing reusable hardware. Even foreign companies are pursuing this option. The Indian Space Research Organization (ISRO) launched a reusable space plane technology demonstrator and Airbus Defense and Space is planning to recover the main engines and avionics from its Advanced Expendable Launcher with Innovative engine Economy [1] [2]. To date, the Space Shuttle remains as the only Reusable Launch (RLV) to have flown repeated missions and the Space Shutte Main Engine (SSME) is the only demonstrated reusable engine. Whether the hardware being considered for reuse is a launch vehicle (fully reusable), a first stage (partially reusable), or a booster engine (single component), the overall governing process is the same; it must be recovered and recertified for flight. Therefore, there is a need to identify the key factors in determining the reusability of flight hardware. This paper begins with defining reusability to set the context, addresses the significance of reuse, and discusses areas that limit successful implementation. Finally, this research identifies the factors that should be considered when incorporating reuse.

  11. Conceptual Design Approach to Implementing Hardware-based Security Controls in Data Communication Systems

    International Nuclear Information System (INIS)

    Ibrahim, Ahmad Salah; Jung, Jaecheon

    2016-01-01

    In the Korean Advanced Power Reactor (APR1400), safety control systems network is electrically isolated and physically separated from non-safety systems data network. Unidirectional gateways, include data diode fiber-optic cabling and computer-based servers, transmit the plant safety critical parameters to the main control room (MCR) for control and monitoring processes. The data transmission is only one-way from safety to non-safety. Reverse communication is blocked so that safety systems network is protected from potential cyberattacks or intrusions from non-safety side. Most of commercials off-the-shelf (COTS) security devices are software-based solutions that require operating systems and processors to perform its functions. Field Programmable Gate Arrays (FPGAs) offer digital hardware solutions to implement security controls such as data packet filtering and deep data packet inspection. This paper presents a conceptual design to implement hardware-based network security controls for maintaining the availability of gateway servers. A conceptual design of hardware-based network security controls was discussed in this paper. The proposed design is aiming at utilizing the hardware-based capabilities of FPGAs together with filtering and DPI functions of COTS software-based firewalls and intrusion detection and prevention systems (IDPS). The proposed design implemented a network security perimeter between the DCN-I zone and gateway servers zone. Security control functions are to protect the gateway servers from potential DoS attacks that could affect the data availability and integrity

  12. Conceptual Design Approach to Implementing Hardware-based Security Controls in Data Communication Systems

    Energy Technology Data Exchange (ETDEWEB)

    Ibrahim, Ahmad Salah; Jung, Jaecheon [KEPCO International Nuclear Graduate School, Ulsan (Korea, Republic of)

    2016-10-15

    In the Korean Advanced Power Reactor (APR1400), safety control systems network is electrically isolated and physically separated from non-safety systems data network. Unidirectional gateways, include data diode fiber-optic cabling and computer-based servers, transmit the plant safety critical parameters to the main control room (MCR) for control and monitoring processes. The data transmission is only one-way from safety to non-safety. Reverse communication is blocked so that safety systems network is protected from potential cyberattacks or intrusions from non-safety side. Most of commercials off-the-shelf (COTS) security devices are software-based solutions that require operating systems and processors to perform its functions. Field Programmable Gate Arrays (FPGAs) offer digital hardware solutions to implement security controls such as data packet filtering and deep data packet inspection. This paper presents a conceptual design to implement hardware-based network security controls for maintaining the availability of gateway servers. A conceptual design of hardware-based network security controls was discussed in this paper. The proposed design is aiming at utilizing the hardware-based capabilities of FPGAs together with filtering and DPI functions of COTS software-based firewalls and intrusion detection and prevention systems (IDPS). The proposed design implemented a network security perimeter between the DCN-I zone and gateway servers zone. Security control functions are to protect the gateway servers from potential DoS attacks that could affect the data availability and integrity.

  13. Pulseq: A rapid and hardware-independent pulse sequence prototyping framework.

    Science.gov (United States)

    Layton, Kelvin J; Kroboth, Stefan; Jia, Feng; Littin, Sebastian; Yu, Huijun; Leupold, Jochen; Nielsen, Jon-Fredrik; Stöcker, Tony; Zaitsev, Maxim

    2017-04-01

    Implementing new magnetic resonance experiments, or sequences, often involves extensive programming on vendor-specific platforms, which can be time consuming and costly. This situation is exacerbated when research sequences need to be implemented on several platforms simultaneously, for example, at different field strengths. This work presents an alternative programming environment that is hardware-independent, open-source, and promotes rapid sequence prototyping. A novel file format is described to efficiently store the hardware events and timing information required for an MR pulse sequence. Platform-dependent interpreter modules convert the file to appropriate instructions to run the sequence on MR hardware. Sequences can be designed in high-level languages, such as MATLAB, or with a graphical interface. Spin physics simulation tools are incorporated into the framework, allowing for comparison between real and virtual experiments. Minimal effort is required to implement relatively advanced sequences using the tools provided. Sequences are executed on three different MR platforms, demonstrating the flexibility of the approach. A high-level, flexible and hardware-independent approach to sequence programming is ideal for the rapid development of new sequences. The framework is currently not suitable for large patient studies or routine scanning although this would be possible with deeper integration into existing workflows. Magn Reson Med 77:1544-1552, 2017. © 2016 International Society for Magnetic Resonance in Medicine. © 2016 International Society for Magnetic Resonance in Medicine.

  14. Description of gasket failure in a 7 cell PEMFC stack

    Energy Technology Data Exchange (ETDEWEB)

    Husar, Attila; Serra, Maria [Institut de Robotica i Informatica Industrial, Parc Tecnologic de Barcelona, Edifici U, C. Llorens i Artigas, 4-6, 2a Planta, 08028 Barcelona (Spain); Kunusch, Cristian [Laboratorio de Electronica Industrial Control e Instrumentacion, Facultad de Ingenieria, UNLP (Argentina)

    2007-06-10

    This article presents the data and the description of a fuel cell stack that failed due to gasket degradation. The fuel cell under study is a 7 cell stack. The unexpected change in several variables such as temperature, pressure and voltage indicated the possible failure of the stack. The stack was monitored over a 6 h period in which data was collected and consequently analyzed to conclude that the fuel cell stack failed due to a crossover leak on the anode inlet port located on the cathode side gasket of cell 2. This stack failure analysis revealed a series of indicators that could be used by a super visional controller in order to initiate a shutdown procedure. (author)

  15. Layer-component-based communication stack framework for wireless residential control systems

    DEFF Research Database (Denmark)

    Torbensen, Rune; Hjorth, Theis

    2010-01-01

    This paper describes methods to lower the entry barrier for creating products that interoperate in the emerging heterogeneous residential control network domain. For designing reconfigurable, layer-component-based communication stacks, a flexible framework is proposed that supports several types ...... shown how the framework facilitates fast prototyping and makes developing secure wireless control systems less complex....... of nodes such as bridges, controllers, sensor/actuators - as well as secure communication between them. A special messaging system facilitates inter-component communication, and a Virtual Port Service protocol enables resource addressing. The end-devices in the heterogeneous network are made accessible...... on a common IP infrastructure, regardless of individual wireless technology. Legacy home automation devices are also supported. A prototype has been implemented on multiple resource-constrained hardware platforms, to demonstrate that the solution is both feasible for low-cost devices and portable. It has been...

  16. Layer-component-based communication stack framework for wireless residential control systems

    DEFF Research Database (Denmark)

    Torbensen, R.; Hjorth, Theis S.

    2011-01-01

    This paper describes methods to lower the entry barrier for creating products that interoperate in the emerging heterogeneous residential control network domain. For designing reconfigurable, layer-component-based communication stacks, a flexible framework is proposed that supports several types ...... shown how the framework facilitates fast prototyping and makes developing secure wireless control systems less complex....... of nodes such as bridges, controllers, sensor/actuators – as well as secure communication between them. A special messaging system facilitates inter-component communication, and a Virtual Port Service protocol enables resource addressing. The end-devices in the heterogeneous network are made accessible...... on a common IP infrastructure, regardless of individual wireless technology. Legacy home automation devices are also supported. A prototype has been implemented on multiple resource-constrained hardware platforms, to demonstrate that the solution is both feasible for low-cost devices and portable. It has been...

  17. A Fast hardware tracker for the ATLAS Trigger

    CERN Document Server

    Pandini, Carlo Enrico; The ATLAS collaboration

    2015-01-01

    The trigger system at the ATLAS experiment is designed to lower the event rate occurring from the nominal bunch crossing at 40 MHz to about 1 kHz for a designed LHC luminosity of 10$^{34}$ cm$^{-2}$ s$^{-1}$. To achieve high background rejection while maintaining good efficiency for interesting physics signals, sophisticated algorithms are needed which require extensive use of tracking information. The Fast TracKer (FTK) trigger system, part of the ATLAS trigger upgrade program, is a highly parallel hardware device designed to perform track-finding at 100 kHz and based on a mixture of advanced technologies. Modern, powerful Field Programmable Gate Arrays (FPGA) form an important part of the system architecture, and the combinatorial problem of pattern recognition is solved by ~8000 standard-cell ASICs named Associative Memories. The availability of the tracking and subsequent vertex information within a short latency ensures robust selections and allows improved trigger performance for the most difficult sign...

  18. A Fast hardware Tracker for the ATLAS Trigger system

    CERN Document Server

    Pandini, Carlo Enrico; The ATLAS collaboration

    2015-01-01

    The trigger system at the ATLAS experiment is designed to lower the event rate occurring from the nominal bunch crossing at 40 MHz to about 1 kHz for a designed LHC luminosity of 10$^{34}$ cm$^{-2}$ s$^{-1}$. After a very successful data taking run the LHC is expected to run starting in 2015 with much higher instantaneous luminosities and this will increase the load on the High Level Trigger system. More sophisticated algorithms will be needed to achieve higher background rejection while maintaining good efficiency for interesting physics signals, which requires a more extensive use of tracking information. The Fast Tracker (FTK) trigger system, part of the ATLAS trigger upgrade program, is a highly parallel hardware device designed to perform full-scan track-finding at the event rate of 100 kHz. FTK is a dedicated processor based on a mixture of advanced technologies. Modern, powerful, Field Programmable Gate Arrays form an important part of the system architecture, and the combinatorial problem of pattern r...

  19. The Hardware Topological Trigger of ATLAS: Commissioning and Operations

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00226165; The ATLAS collaboration

    2018-01-01

    The Level-1 trigger is the first rate-reducing step in the ATLAS trigger system with an output rate of 100 kHz and decision latency smaller than 2.5 μs. It consists of a calorimeter trigger, muon trigger and a central trigger processor. To improve the physics potential reach in ATLAS, during the LHC shutdown after Run 1, the Level-1 trigger system was upgraded at hardware, firmware and software level. In particular, a new electronics sub-system was introduced in the real-time data processing path: the Topological Processor System (L1Topo). It consists of a single AdvancedCTA shelf equipped with two Level-1 topological processor blades. For individual blades, real-time information from calorimeter and muon Level-1 trigger systems, is processed by four individual state-of-the-art FPGAs. It needs to deal with a large input bandwidth of up to 6 Tb/s, optical connectivity and low processing latency on the real-time data path. The L1Topo firmware apply measurements of angles between jets and/or leptons and several...

  20. Mechanical Design and Development of TES Bolometer Detector Arrays for the Advanced ACTPol Experiment

    Science.gov (United States)

    Ward, Jonathan T.; Austermann, Jason; Beall, James A.; Choi, Steve K.; Crowley, Kevin T.; Devlin, Mark J.; Duff, Shannon M.; Gallardo, Patricio M.; Henderson, Shawn W.; Ho, Shuay-Pwu Patty; hide

    2016-01-01

    The next generation Advanced ACTPol (AdvACT) experiment is currently underway and will consist of four Transition Edge Sensor (TES) bolometer arrays, with three operating together, totaling 5800 detectors on the sky. Building on experience gained with the ACTPol detector arrays, AdvACT will utilize various new technologies, including 150 mm detector wafers equipped with multichroic pixels, allowing for a more densely packed focal plane. Each set of detectors includes a feedhorn array of stacked silicon wafers which form a spline pro le leading to each pixel. This is then followed by a waveguide interface plate, detector wafer, back short cavity plate, and backshort cap. Each array is housed in a custom designed structure manufactured from high purity copper and then gold plated. In addition to the detector array assembly, the array package also encloses cryogenic readout electronics. We present the full mechanical design of the AdvACT high frequency (HF) detector array package along with a detailed look at the detector array stack assemblies. This experiment will also make use of extensive hardware and software previously developed for ACT, which will be modi ed to incorporate the new AdvACT instruments. Therefore, we discuss the integration of all AdvACT arrays with pre-existing ACTPol infrastructure.

  1. Quadratic forms and Clifford algebras on derived stacks

    OpenAIRE

    Vezzosi, Gabriele

    2013-01-01

    In this paper we present an approach to quadratic structures in derived algebraic geometry. We define derived n-shifted quadratic complexes, over derived affine stacks and over general derived stacks, and give several examples of those. We define the associated notion of derived Clifford algebra, in all these contexts, and compare it with its classical version, when they both apply. Finally, we prove three main existence results for derived shifted quadratic forms over derived stacks, define ...

  2. Use of impedance tagging to monitor fuel cell stack performance

    Science.gov (United States)

    Silva, Gregory

    Fuel cells are electrochemical device that are traditionally assembled in stacks to perform meaningful work. Monitoring the state of the stack is vitally important to ensure that it is operating efficiently and that constituent cells are not failing for one of a several common reasons including membrane dehydration, gas diffusion layer flooding, reactant starvation, and physical damage. Current state-of-the-art monitoring systems are costly and require at least one connection per cell on the stack, which introduces reliability concerns for stacks consisting of hundreds of cells. This thesis presents a novel approach for diagnosing problems in a fuel cell stack that attempts to reduce the cost and complexity of monitoring cells in a stack. The proposed solution modifies the electrochemical impedance spectroscopy (EIS) response of each cell in the stack by connecting an electrical tag in parallel with each cell. This approach allows the EIS response of the entire stack to identify and locate problems in the stack. Capacitors were chosen as tags because they do not interfere with normal stack operation and because they can generate distinct stack EIS responses. An experiment was performed in the Center for Automation Technologies an Systems (CATS) fuel cell laboratory at Rensselaer Polytechnic Institute (RPI) to perform EIS measurements on a single cell with and without capacitor tags to investigate the proposed solution. The EIS data collected from this experiment was used to create a fuel cell model to investigate the proposed solution under ideal conditions. This thesis found that, although the concept shows some promise in simulations, significant obstacles to implementing the proposed solution. Observed EIS response when the capacitor tags were connected did not match the expected EIS response. Constraints on the capacitor tags found by the model impose significant manufacturing challenges to the proposed solution. Further development of the proposed solution is

  3. Stacked Heterogeneous Neural Networks for Time Series Forecasting

    Directory of Open Access Journals (Sweden)

    Florin Leon

    2010-01-01

    Full Text Available A hybrid model for time series forecasting is proposed. It is a stacked neural network, containing one normal multilayer perceptron with bipolar sigmoid activation functions, and the other with an exponential activation function in the output layer. As shown by the case studies, the proposed stacked hybrid neural model performs well on a variety of benchmark time series. The combination of weights of the two stack components that leads to optimal performance is also studied.

  4. Status of Slip Stacking at Fermilab Main Injector

    CERN Document Server

    Seiya, Kiyomi; Chase, Brian; Dey, Joseph; Kourbanis, Ioanis; MacLachlan, James A; Meisner, Keith G; Pasquinelli, Ralph J; Reid, John; Rivetta, Claudio H; Steimel, Jim

    2005-01-01

    In order to increase proton intensity on anti proton production cycle of the Main Injector we are going to use the technique of 'slip stacking' and doing machine studies. In slip stacking, one bunch train is injected at slightly lower energy and second train is at slightly higher energy. Afterwards they are aligned longitudinally and captured with one rf bucket. This longitudinal stacking process is expected to double the bunch intensity. The required intensity for anti proton production is 8·1012

  5. A novel design for solid oxide fuel cell stacks

    Energy Technology Data Exchange (ETDEWEB)

    Al-Qattan, A.M.; Chmielewski, D.J.; Al-Hallaj, S.; Selman, J.R. [Illinois Inst. of Technology, Chicago, IL (United States). Dept. of Chemical and Environmental Engineering

    2004-01-01

    Conventional fuel cell stack designs suffer from severe spatial nonuniformity in both temperature and current density. Such variations are known to create damaging thermal stresses within the stack and thus, impact overall lifespan. In this work, we propose a novel stack design aimed at reducing spatial variations at the source. We propose a mechanism of distributed fuel feed in which the heat generation profile can be influenced directly. Simulation results are presented to illustrate the potential of the proposed scheme. (author)

  6. Development of the electric utility dispersed use PAFC stack

    Energy Technology Data Exchange (ETDEWEB)

    Horiuchi, Hiroshi; Kotani, Ikuo [Mitsubishi Electric Co., Kobe (Japan); Morotomi, Isamu [Kansai Electric Power Co., Hyogo (Japan)] [and others

    1996-12-31

    Kansai Electric Power Co. and Mitsubishi Electric Co. have been developing the electric utility dispersed use PAFC stack operated under the ambient pressure. The new cell design have been developed, so that the large scale cell (1 m{sup 2} size) was adopted for the stack. To confirm the performance and the stability of the 1 m{sup 2} scale cell design, the short stack study had been performed.

  7. Method for monitoring stack gases for uranium activity

    International Nuclear Information System (INIS)

    Beverly, C.R.; Ernstberger, H.G.

    1988-01-01

    A method for sampling stack gases emanating from the purge cascade of a gaseous diffusion cascade system utilized to enrich uranium for determining the presence and extent of uranium in the stack gases in the form of gaseous uranium hexafluoride, is described comprising the steps of removing a side stream of gases from the stack gases, contacting the side stream of the stack gases with a stream of air sufficiently saturated with moisture for reacting with and converting any gaseous uranium hexafluroide contracted thereby in the side stream of stack gases to particulate uranyl fluoride. Thereafter contacting the side stream of stack gases containing the particulate uranyl fluoride with moving filter means for continuously intercepting and conveying the intercepted particulate uranyl fluoride away from the side stream of stack gases, and continually scanning the moving filter means with radiation monitoring means for sensing the presence and extent of particulate uranyl fluoride on the moving filter means which is indicative of the extent of particulate uranyl fluoride in the side stream of stack gases which in turn is indicative of the presence and extent of uranium hexafluoride in the stack gases

  8. Design and development of an automated uranium pellet stacking system

    International Nuclear Information System (INIS)

    Reiss, B.S.; Nokleby, S.B.

    2010-01-01

    A novel design for an automated uranium pellet stacking system is presented. This system is designed as a drop-in solution to the current production line to enhance the fuel pellet stacking process. The three main goals of this system are to reduce worker exposure to radiation to as low as reasonable achievable (ALARA), improve product quality, and increase productivity. The proposed system will reduce the potential for human error. This single automated system will replace the two existing pellet stacking stations while increasing the total output, eliminating pellet stacking as a bottleneck in the fuel bundle assembly process. (author)

  9. Highly Efficient, Durable Regenerative Solid Oxide Stack, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Precision Combustion, Inc. (PCI) proposes to develop a highly efficient regenerative solid oxide stack design. Novel structural elements allow direct internal...

  10. FPGA BASED HARDWARE KEY FOR TEMPORAL ENCRYPTION

    Directory of Open Access Journals (Sweden)

    B. Lakshmi

    2010-09-01

    Full Text Available In this paper, a novel encryption scheme with time based key technique on an FPGA is presented. Time based key technique ensures right key to be entered at right time and hence, vulnerability of encryption through brute force attack is eliminated. Presently available encryption systems, suffer from Brute force attack and in such a case, the time taken for breaking a code depends on the system used for cryptanalysis. The proposed scheme provides an effective method in which the time is taken as the second dimension of the key so that the same system can defend against brute force attack more vigorously. In the proposed scheme, the key is rotated continuously and four bits are drawn from the key with their concatenated value representing the delay the system has to wait. This forms the time based key concept. Also the key based function selection from a pool of functions enhances the confusion and diffusion to defend against linear and differential attacks while the time factor inclusion makes the brute force attack nearly impossible. In the proposed scheme, the key scheduler is implemented on FPGA that generates the right key at right time intervals which is then connected to a NIOS – II processor (a virtual microcontroller which is brought out from Altera FPGA that communicates with the keys to the personal computer through JTAG (Joint Test Action Group communication and the computer is used to perform encryption (or decryption. In this case the FPGA serves as hardware key (dongle for data encryption (or decryption.

  11. Hardware packet pacing using a DMA in a parallel computer

    Science.gov (United States)

    Chen, Dong; Heidelberger, Phillip; Vranas, Pavlos

    2013-08-13

    Method and system for hardware packet pacing using a direct memory access controller in a parallel computer which, in one aspect, keeps track of a total number of bytes put on the network as a result of a remote get operation, using a hardware token counter.

  12. The role of the visual hardware system in rugby performance ...

    African Journals Online (AJOL)

    This study explores the importance of the 'hardware' factors of the visual system in the game of rugby. A group of professional and club rugby players were tested and the results compared. The results were also compared with the established norms for elite athletes. The findings indicate no significant difference in hardware ...

  13. Hardware and software for image acquisition in nuclear medicine

    International Nuclear Information System (INIS)

    Fideles, E.L.; Vilar, G.; Silva, H.S.

    1992-01-01

    A system for image acquisition and processing in nuclear medicine is presented, including the hardware and software referring to acquisition. The hardware is consisted of an analog-digital conversion card, developed in wire-wape. Its function is digitate the analogic signs provided by gamma camera. The acquisitions are made in list or frame mode. (C.G.C.)

  14. Hardware replacements and software tools for digital control computers

    International Nuclear Information System (INIS)

    Walker, R.A.P.; Wang, B-C.; Fung, J.

    1996-01-01

    Technological obsolescence is an on-going challenge for all computer use. By design, and to some extent good fortune, AECL has had a good track record with respect to the march of obsolescence in CANDU digital control computer technology. Recognizing obsolescence as a fact of life, AECL has undertaken a program of supporting the digital control technology of existing CANDU plants. Other AECL groups are developing complete replacement systems for the digital control computers, and more advanced systems for the digital control computers of the future CANDU reactors. This paper presents the results of the efforts of AECL's DCC service support group to replace obsolete digital control computer and related components and to provide friendlier software technology related to the maintenance and use of digital control computers in CANDU. These efforts are expected to extend the current lifespan of existing digital control computers through their mandated life. This group applied two simple rules; the product, whether new or replacement should have a generic basis, and the products should be applicable to both existing CANDU plants and to 'repeat' plant designs built using current design guidelines. While some exceptions do apply, the rules have been met. The generic requirement dictates that the product should not be dependent on any brand technology, and should back-fit to and interface with any such technology which remains in the control design. The application requirement dictates that the product should have universal use and be user friendly to the greatest extent possible. Furthermore, both requirements were designed to anticipate user involvement, modifications and alternate user defined applications. The replacements for hardware components such as paper tape reader/punch, moving arm disk, contact scanner and Ramtek are discussed. The development of these hardware replacements coincide with the development of a gateway system for selected CANDU digital control

  15. Life sciences flight hardware development for the International Space Station

    Science.gov (United States)

    Kern, V. D.; Bhattacharya, S.; Bowman, R. N.; Donovan, F. M.; Elland, C.; Fahlen, T. F.; Girten, B.; Kirven-Brooks, M.; Lagel, K.; Meeker, G. B.; Santos, O.

    During the construction phase of the International Space Station (ISS), early flight opportunities have been identified (including designated Utilization Flights, UF) on which early science experiments may be performed. The focus of NASA's and other agencies' biological studies on the early flight opportunities is cell and molecular biology; with UF-1 scheduled to fly in fall 2001, followed by flights 8A and UF-3. Specific hardware is being developed to verify design concepts, e.g., the Avian Development Facility for incubation of small eggs and the Biomass Production System for plant cultivation. Other hardware concepts will utilize those early research opportunities onboard the ISS, e.g., an Incubator for sample cultivation, the European Modular Cultivation System for research with small plant systems, an Insect Habitat for support of insect species. Following the first Utilization Flights, additional equipment will be transported to the ISS to expand research opportunities and capabilities, e.g., a Cell Culture Unit, the Advanced Animal Habitat for rodents, an Aquatic Facility to support small fish and aquatic specimens, a Plant Research Unit for plant cultivation, and a specialized Egg Incubator for developmental biology studies. Host systems (Figure 1A, B), e.g., a 2.5 m Centrifuge Rotor (g-levels from 0.01-g to 2-g) for direct comparisons between μg and selectable g levels, the Life Sciences Glove☐ for contained manipulations, and Habitat Holding Racks (Figure 1B) will provide electrical power, communication links, and cooling to the habitats. Habitats will provide food, water, light, air and waste management as well as humidity and temperature control for a variety of research organisms. Operators on Earth and the crew on the ISS will be able to send commands to the laboratory equipment to monitor and control the environmental and experimental parameters inside specific habitats. Common laboratory equipment such as microscopes, cryo freezers, radiation

  16. Manifold seal structure for fuel cell stack

    Science.gov (United States)

    Collins, William P.

    1988-01-01

    The seal between the sides of a fuel cell stack and the gas manifolds is improved by adding a mechanical interlock between the adhesive sealing strip and the abutting surface of the manifolds. The adhesive is a material which can flow to some extent when under compression, and the mechanical interlock is formed providing small openings in the portion of the manifold which abuts the adhesive strip. When the manifolds are pressed against the adhesive strips, the latter will flow into and through the manifold openings to form buttons or ribs which mechanically interlock with the manifolds. These buttons or ribs increase the bond between the manifolds and adhesive, which previously relied solely on the adhesive nature of the adhesive.

  17. Directive Stacked Patch Antenna for UWB Applications

    Directory of Open Access Journals (Sweden)

    Sharif I. Mitu Sheikh

    2013-01-01

    Full Text Available Directional ultrawideband (UWB antennas are popular in wireless signal-tracking and body-area networks. This paper presents a stacked microstrip antenna with an ultrawide impedance bandwidth of 114%, implemented by introducing defects on the radiating patches and the ground plane. The compact (20×34 mm antenna exhibits a directive radiation patterns for all frequencies of the 3–10.6 GHz band. The optimized reflection response and the radiation pattern are experimentally verified. The designed UWB antenna is used to maximize the received power of a software-defined radio (SDR platform. For an ultrawideband impulse radio system, this class of antennas is essential to improve the performance of the communication channels.

  18. ATLAS software stack on ARM64

    Science.gov (United States)

    Smith, Joshua Wyatt; Stewart, Graeme A.; Seuster, Rolf; Quadt, Arnulf; ATLAS Collaboration

    2017-10-01

    This paper reports on the port of the ATLAS software stack onto new prototype ARM64 servers. This included building the “external” packages that the ATLAS software relies on. Patches were needed to introduce this new architecture into the build as well as patches that correct for platform specific code that caused failures on non-x86 architectures. These patches were applied such that porting to further platforms will need no or only very little adjustments. A few additional modifications were needed to account for the different operating system, Ubuntu instead of Scientific Linux 6 / CentOS7. Selected results from the validation of the physics outputs on these ARM 64-bit servers will be shown. CPU, memory and IO intensive benchmarks using ATLAS specific environment and infrastructure have been performed, with a particular emphasis on the performance vs. energy consumption.

  19. ATLAS software stack on ARM64

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00529764; The ATLAS collaboration; Stewart, Graeme; Seuster, Rolf; Quadt, Arnulf

    2017-01-01

    This paper reports on the port of the ATLAS software stack onto new prototype ARM64 servers. This included building the “external” packages that the ATLAS software relies on. Patches were needed to introduce this new architecture into the build as well as patches that correct for platform specific code that caused failures on non-x86 architectures. These patches were applied such that porting to further platforms will need no or only very little adjustments. A few additional modifications were needed to account for the different operating system, Ubuntu instead of Scientific Linux 6 / CentOS7. Selected results from the validation of the physics outputs on these ARM 64-bit servers will be shown. CPU, memory and IO intensive benchmarks using ATLAS specific environment and infrastructure have been performed, with a particular emphasis on the performance vs. energy consumption.

  20. Stacked generalization: an introduction to super learning.

    Science.gov (United States)

    Naimi, Ashley I; Balzer, Laura B

    2018-04-10

    Stacked generalization is an ensemble method that allows researchers to combine several different prediction algorithms into one. Since its introduction in the early 1990s, the method has evolved several times into a host of methods among which is the "Super Learner". Super Learner uses V-fold cross-validation to build the optimal weighted combination of predictions from a library of candidate algorithms. Optimality is defined by a user-specified objective function, such as minimizing mean squared error or maximizing the area under the receiver operating characteristic curve. Although relatively simple in nature, use of Super Learner by epidemiologists has been hampered by limitations in understanding conceptual and technical details. We work step-by-step through two examples to illustrate concepts and address common concerns.

  1. A Practical Introduction to HardwareSoftware Codesign

    CERN Document Server

    Schaumont, Patrick R

    2013-01-01

    This textbook provides an introduction to embedded systems design, with emphasis on integration of custom hardware components with software. The key problem addressed in the book is the following: how can an embedded systems designer strike a balance between flexibility and efficiency? The book describes how combining hardware design with software design leads to a solution to this important computer engineering problem. The book covers four topics in hardware/software codesign: fundamentals, the design space of custom architectures, the hardware/software interface and application examples. The book comes with an associated design environment that helps the reader to perform experiments in hardware/software codesign. Each chapter also includes exercises and further reading suggestions. Improvements in this second edition include labs and examples using modern FPGA environments from Xilinx and Altera, which make the material applicable to a greater number of courses where these tools are already in use.  Mo...

  2. DeepStack: Expert-level artificial intelligence in heads-up no-limit poker.

    Science.gov (United States)

    Moravčík, Matej; Schmid, Martin; Burch, Neil; Lisý, Viliam; Morrill, Dustin; Bard, Nolan; Davis, Trevor; Waugh, Kevin; Johanson, Michael; Bowling, Michael

    2017-05-05

    Artificial intelligence has seen several breakthroughs in recent years, with games often serving as milestones. A common feature of these games is that players have perfect information. Poker, the quintessential game of imperfect information, is a long-standing challenge problem in artificial intelligence. We introduce DeepStack, an algorithm for imperfect-information settings. It combines recursive reasoning to handle information asymmetry, decomposition to focus computation on the relevant decision, and a form of intuition that is automatically learned from self-play using deep learning. In a study involving 44,000 hands of poker, DeepStack defeated, with statistical significance, professional poker players in heads-up no-limit Texas hold'em. The approach is theoretically sound and is shown to produce strategies that are more difficult to exploit than prior approaches. Copyright © 2017, American Association for the Advancement of Science.

  3. A Structured Hardware/Software Architecture for Embedded Sensor Nodes

    OpenAIRE

    Merrett, Geoff V; Weddell, Alex S.; Harris, Nick R; Al-Hashimi, Bashir M; White, Neil M

    2008-01-01

    Owing to the limited requirement for sensor processing in early networked sensor nodes, embedded software was generally built around the communication stack. Modern sensor nodes have evolved to contain significant on-board functionality in addition to communications, including sensor processing, energy management, actuation and locationing. The embedded software for this functionality, however, is often implemented in the application layer of the communications stack, resulting in an unstruct...

  4. Custom hemiarthroplasties for retention of existing hardware associated with osteogenesis imperfecta

    Directory of Open Access Journals (Sweden)

    Kevin Nishida, MS

    2017-06-01

    Full Text Available Osteogenesis imperfecta is a rare genetic disorder that presents with heterogeneous phenotypes ranging from brittle bones to impaired hearing. Because of the decreased bone mineral density frequently observed in this patient population, many patients experience recurring and long-term fractures, which often require orthopaedic management. With the advancement of nonsurgical and surgical management and increased longevity of patients with osteogenesis imperfecta, the incidence of osteoarthritis has risen, presenting new orthopaedic challenges. However, compromised bone integrity and size combined with frequent existing hardware render traditional surgical therapies for osteoarthritis technically challenging in this patient population. In this report, we present a case in which we retained a portion of the patient's existing hardware, while performing staged bilateral custom hemiarthroplasties in a patient with osteogenesis imperfecta.

  5. Hardware Development Process for Human Research Facility Applications

    Science.gov (United States)

    Bauer, Liz

    2000-01-01

    The simple goal of the Human Research Facility (HRF) is to conduct human research experiments on the International Space Station (ISS) astronauts during long-duration missions. This is accomplished by providing integration and operation of the necessary hardware and software capabilities. A typical hardware development flow consists of five stages: functional inputs and requirements definition, market research, design life cycle through hardware delivery, crew training, and mission support. The purpose of this presentation is to guide the audience through the early hardware development process: requirement definition through selecting a development path. Specific HRF equipment is used to illustrate the hardware development paths. The source of hardware requirements is the science community and HRF program. The HRF Science Working Group, consisting of SCientists from various medical disciplines, defined a basic set of equipment with functional requirements. This established the performance requirements of the hardware. HRF program requirements focus on making the hardware safe and operational in a space environment. This includes structural, thermal, human factors, and material requirements. Science and HRF program requirements are defined in a hardware requirements document which includes verification methods. Once the hardware is fabricated, requirements are verified by inspection, test, analysis, or demonstration. All data is compiled and reviewed to certify the hardware for flight. Obviously, the basis for all hardware development activities is requirement definition. Full and complete requirement definition is ideal prior to initiating the hardware development. However, this is generally not the case, but the hardware team typically has functional inputs as a guide. The first step is for engineers to conduct market research based on the functional inputs provided by scientists. CommerCially available products are evaluated against the science requirements as

  6. Simultaneous stack-gas scrubbing and waste water treatment

    Science.gov (United States)

    Poradek, J. C.; Collins, D. D.

    1980-01-01

    Simultaneous treatment of wastewater and S02-laden stack gas make both treatments more efficient and economical. According to results of preliminary tests, solution generated by stack gas scrubbing cycle reduces bacterial content of wastewater. Both processess benefit by sharing concentrations of iron.

  7. A Software Managed Stack Cache for Real-Time Systems

    DEFF Research Database (Denmark)

    Jordan, Alexander; Abbaspourseyedi, Sahar; Schoeberl, Martin

    2016-01-01

    In a real-time system, the use of a scratchpad memory can mitigate the difficulties related to analyzing data caches, whose behavior is inherently hard to predict. We propose to use a scratchpad memory for stack allocated data. While statically allocating stack frames for individual functions to ...

  8. Calculation of AC losses in large HTS stacks and coils

    DEFF Research Database (Denmark)

    Zermeno, Victor; Abrahamsen, Asger Bech; Mijatovic, Nenad

    2012-01-01

    In this work, we present a homogenization method to model a stack of HTS tapes under AC applied transport current or magnetic field. The idea is to find an anisotropic bulk equivalent for the stack of tapes, where the internal alternating structures of insulating, metallic, superconducting and su...

  9. Efficient Context Switching for the Stack Cache: Implementation and Analysis

    DEFF Research Database (Denmark)

    Abbaspourseyedi, Sahar; Brandner, Florian; Naji, Amine

    2015-01-01

    , the analysis of the stack cache was limited to individual tasks, ignoring aspects related to multitasking. A major drawback of the original stack cache design is that, due to its simplicity, it cannot hold the data of multiple tasks at the same time. Consequently, the entire cache content needs to be saved...

  10. A Power Hardware-in-the-Loop Platform with Remote Distribution Circuit Cosimulation

    Energy Technology Data Exchange (ETDEWEB)

    Palmintier, Bryan; Lundstrom, Blake; Chakraborty, Sudipta; Williams, Tess L.; Schneider, Kevin P.; Chassin, David P.

    2015-04-01

    This paper demonstrates the use of a novel cosimulation architecture that integrates hardware testing using Power Hardware-in-the-Loop (PHIL) with larger-scale electric grid models using off-the-shelf, non-PHIL software tools. This architecture enables utilities to study the impacts of emerging energy technologies on their system and manufacturers to explore the interactions of new devices with existing and emerging devices on the power system, both without the need to convert existing grid models to a new platform or to conduct in-field trials. The paper describes an implementation of this architecture for testing two residential-scale advanced solar inverters at separate points of common coupling. The same hardware setup is tested with two different distribution feeders (IEEE 123 and 8500 node test systems) modeled using GridLAB-D. In addition to simplifying testing with multiple feeders, the architecture demonstrates additional flexibility with hardware testing in one location linked via the Internet to software modeling in a remote location. In testing, inverter current, real and reactive power, and PCC voltage are well captured by the co-simulation platform. Testing of the inverter advanced control features is currently somewhat limited by the software model time step (1 sec) and tested communication latency (24 msec). Overshoot induced oscillations are observed with volt/VAR control delays of 0 and 1.5 sec, while 3.4 sec and 5.5 sec delays produced little or no oscillation. These limitations could be overcome using faster modeling and communication within the same co-simulation architecture.

  11. The behaviour of stacking fault energy upon interstitial alloying.

    Science.gov (United States)

    Lee, Jee-Yong; Koo, Yang Mo; Lu, Song; Vitos, Levente; Kwon, Se Kyun

    2017-09-11

    Stacking fault energy is one of key parameters for understanding the mechanical properties of face-centered cubic materials. It is well known that the plastic deformation mechanism is closely related to the size of stacking fault energy. Although alloying is a conventional method to modify the physical parameter, the underlying microscopic mechanisms are not yet clearly established. Here, we propose a simple model for determining the effect of interstitial alloying on the stacking fault energy. We derive a volumetric behaviour of stacking fault energy from the harmonic approximation to the energy-lattice curve and relate it to the contents of interstitials. The stacking fault energy is found to change linearly with the interstitial content in the usual low concentration domain. This is in good agreement with previously reported experimental and theoretical data.

  12. Dynamic Model of High Temperature PEM Fuel Cell Stack Temperature

    DEFF Research Database (Denmark)

    Andreasen, Søren Juhl; Kær, Søren Knudsen

    2007-01-01

    The present work involves the development of a model for predicting the dynamic temperature of a high temperature PEM (HTPEM) fuel cell stack. The model is developed to test different thermal control strategies before implementing them in the actual system. The test system consists of a prototype...... parts, where also the temperatures are measured. The heat balance of the system involves a fuel cell model to describe the heat added by the fuel cells when a current is drawn. Furthermore the model also predicts the temperatures, when heating the stack with external heating elements for start-up, heat...... the stack at a high stoichiometric air flow. This is possible because of the PBI fuel cell membranes used, and the very low pressure drop in the stack. The model consists of a discrete thermal model dividing the stack into three parts: inlet, middle and end and predicting the temperatures in these three...

  13. Direct methanol fuel cell stack based on MEMS technology

    Science.gov (United States)

    Zhang, Yufeng; Tang, Xiaochuan; Yuan, Zhenyu; Liu, Xiaowei

    2008-10-01

    This paper presents a design configuration of silicon-based micro direct methanol fuel cell (DMFC) stack in a planar array. The integrated series connection is oriented in a "flip-flop" configuration with electrical interconnections made by thin-film metal layers that coat the flow channels etched in the silicon substrate. The configuration features small connection space and low contact resistance. The MEMS fabrication process was utilized to fabricate the silicon plates of DMFC stack. This DMFC stack with an active area of 64mm x 11mm was characterized at room temperature and normal atmosphere. Experimental results show that the prototype stack is able to generate an open-circuit voltage of 2.7V and a maximum power density of 2.2mW/cm2, which demonstrate the feasibility of this new DMFC stack configuration.

  14. Deformation Induced Microtwins and Stacking Faults in Aluminum Single Crystal

    Science.gov (United States)

    Han, W. Z.; Cheng, G. M.; Li, S. X.; Wu, S. D.; Zhang, Z. F.

    2008-09-01

    Microtwins and stacking faults in plastically deformed aluminum single crystal were successfully observed by high-resolution transmission electron microscope. The occurrence of these microtwins and stacking faults is directly related to the specially designed crystallographic orientation, because they were not observed in pure aluminum single crystal or polycrystal before. Based on the new finding above, we propose a universal dislocation-based model to judge the preference or not for the nucleation of deformation twins and stacking faults in various face-centered-cubic metals in terms of the critical stress for dislocation glide or twinning by considering the intrinsic factors, such as stacking fault energy, crystallographic orientation, and grain size. The new finding of deformation induced microtwins and stacking faults in aluminum single crystal and the proposed model should be of interest to a broad community.

  15. Physical Sciences Laboratory 1 Rooftop Stack Mixing Study

    Energy Technology Data Exchange (ETDEWEB)

    Flaherty, Julia E. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Antonio, Ernest J. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States)

    2016-09-30

    To address concerns about worker exposures on the Physical Science Laboratory (PSL) rooftop, a tracer study was conducted to measure gaseous tracer concentrations downwind of six stacks on the southern half of the PSL building (PSL-1). These concerns were raised, in part, due to the non-standard configuration of the stacks on this building. Five of the six stacks were only about 8 feet tall, with one shorter stack that was essentially level with the roof deck. These stacks were reconfigured in August 2016, and these exhaust points on PSL-1 are now 18 feet tall. This report describes the objectives of the tracer tests performed on PSL-1, provides an overview of how the tests were executed, and presents results of the tests. The tests on the PSL rooftop were a follow-on project from a similar study performed on the LSL-II ventilation exhaust (Flaherty and Antonio, 2016).

  16. Targeting multiple heterogeneous hardware platforms with OpenCL

    Science.gov (United States)

    Fox, Paul A.; Kozacik, Stephen T.; Humphrey, John R.; Paolini, Aaron; Kuller, Aryeh; Kelmelis, Eric J.

    2014-06-01

    The OpenCL API allows for the abstract expression of parallel, heterogeneous computing, but hardware implementations have substantial implementation differences. The abstractions provided by the OpenCL API are often insufficiently high-level to conceal differences in hardware architecture. Additionally, implementations often do not take advantage of potential performance gains from certain features due to hardware limitations and other factors. These factors make it challenging to produce code that is portable in practice, resulting in much OpenCL code being duplicated for each hardware platform being targeted. This duplication of effort offsets the principal advantage of OpenCL: portability. The use of certain coding practices can mitigate this problem, allowing a common code base to be adapted to perform well across a wide range of hardware platforms. To this end, we explore some general practices for producing performant code that are effective across platforms. Additionally, we explore some ways of modularizing code to enable optional optimizations that take advantage of hardware-specific characteristics. The minimum requirement for portability implies avoiding the use of OpenCL features that are optional, not widely implemented, poorly implemented, or missing in major implementations. Exposing multiple levels of parallelism allows hardware to take advantage of the types of parallelism it supports, from the task level down to explicit vector operations. Static optimizations and branch elimination in device code help the platform compiler to effectively optimize programs. Modularization of some code is important to allow operations to be chosen for performance on target hardware. Optional subroutines exploiting explicit memory locality allow for different memory hierarchies to be exploited for maximum performance. The C preprocessor and JIT compilation using the OpenCL runtime can be used to enable some of these techniques, as well as to factor in hardware

  17. Hardware Implementation of a Bilateral Subtraction Filter

    Science.gov (United States)

    Huertas, Andres; Watson, Robert; Villalpando, Carlos; Goldberg, Steven

    2009-01-01

    A bilateral subtraction filter has been implemented as a hardware module in the form of a field-programmable gate array (FPGA). In general, a bilateral subtraction filter is a key subsystem of a high-quality stereoscopic machine vision system that utilizes images that are large and/or dense. Bilateral subtraction filters have been implemented in software on general-purpose computers, but the processing speeds attainable in this way even on computers containing the fastest processors are insufficient for real-time applications. The present FPGA bilateral subtraction filter is intended to accelerate processing to real-time speed and to be a prototype of a link in a stereoscopic-machine- vision processing chain, now under development, that would process large and/or dense images in real time and would be implemented in an FPGA. In terms that are necessarily oversimplified for the sake of brevity, a bilateral subtraction filter is a smoothing, edge-preserving filter for suppressing low-frequency noise. The filter operation amounts to replacing the value for each pixel with a weighted average of the values of that pixel and the neighboring pixels in a predefined neighborhood or window (e.g., a 9 9 window). The filter weights depend partly on pixel values and partly on the window size. The present FPGA implementation of a bilateral subtraction filter utilizes a 9 9 window. This implementation was designed to take advantage of the ability to do many of the component computations in parallel pipelines to enable processing of image data at the rate at which they are generated. The filter can be considered to be divided into the following parts (see figure): a) An image pixel pipeline with a 9 9- pixel window generator, b) An array of processing elements; c) An adder tree; d) A smoothing-and-delaying unit; and e) A subtraction unit. After each 9 9 window is created, the affected pixel data are fed to the processing elements. Each processing element is fed the pixel value for

  18. Reflector imaging by diffraction stacking with stacking velocity analysis; Jugo sokudo kaiseki wo tomonau sanran jugoho ni yoru hanshamen imaging

    Energy Technology Data Exchange (ETDEWEB)

    Matsushima, J.; Rokugawa, S.; Kato, Y. [The University of Tokyo, Tokyo (Japan). Faculty of Engineering; Yokota, T. [Japan National Oil Corp., Tokyo (Japan); Miyazaki, T. [Geological Survey of Japan, Tsukuba (Japan)

    1997-10-22

    Concerning seismic reflection survey for geometrical arrangement between pits, the scattering stacking method with stacking velocity analysis is compared with the CDP (common depth point horizontal stacking method). The advantages of the CDP supposedly include the following. Since it presumes an average velocity field, it can determine velocities having stacking effects. The method presumes stratification and, since such enables the division of huge quantities of observed data into smaller groups, more data can be calculated in a shorter time period. The method has disadvantages, attributable to its presuming an average velocity field, that accuracy in processing is lower when the velocity field contrast is higher, that accuracy in processing is low unless stratification is employed, and that velocities obtained from stacking velocity analysis are affected by dipped structures. Such shortcomings may be remedied in the scattering stacking method with stacking velocity analysis. Possibilities are that, as far as the horizontal reflection plane is concerned, it may yield stack records higher in S/N ratio than the CDP. Findings relative to dipped reflection planes will be introduced at the presentation. 6 refs., 12 figs.

  19. FPGA Acceleration by Dynamically-Loaded Hardware Libraries

    DEFF Research Database (Denmark)

    Lomuscio, Andrea; Nannarelli, Alberto; Re, Marco

    Hardware acceleration is a viable solution to obtain energy efficiency in data intensive computation. In this work, we present a hardware framework to dynamically load hardware libraries, HLL, on reconfigurable platforms (FPGAs). Provided a library of application-specific processors, we load on......-the-y the speciffic processor in the FPGA, and we transfer the execution from the CPU to the FPGA-based accelerator. Results show that significant speed-up and energy efficiency can be obtained by HLL acceleration on system-on-chips where reconfigurable fabric is placed next to the CPUs....

  20. Hardware support for collecting performance counters directly to memory

    Science.gov (United States)

    Gara, Alan; Salapura, Valentina; Wisniewski, Robert W.

    2012-09-25

    Hardware support for collecting performance counters directly to memory, in one aspect, may include a plurality of performance counters operable to collect one or more counts of one or more selected activities. A first storage element may be operable to store an address of a memory location. A second storage element may be operable to store a value indicating whether the hardware should begin copying. A state machine may be operable to detect the value in the second storage element and trigger hardware copying of data in selected one or more of the plurality of performance counters to the memory location whose address is stored in the first storage element.

  1. Hardware Realization of Chaos Based Symmetric Image Encryption

    KAUST Repository

    Barakat, Mohamed L.

    2012-06-01

    This thesis presents a novel work on hardware realization of symmetric image encryption utilizing chaos based continuous systems as pseudo random number generators. Digital implementation of chaotic systems results in serious degradations in the dynamics of the system. Such defects are illuminated through a new technique of generalized post proceeding with very low hardware cost. The thesis further discusses two encryption algorithms designed and implemented as a block cipher and a stream cipher. The security of both systems is thoroughly analyzed and the performance is compared with other reported systems showing a superior results. Both systems are realized on Xilinx Vetrix-4 FPGA with a hardware and throughput performance surpassing known encryption systems.

  2. Validation test of advanced technology for IPV nickel-hydrogen flight cells: Update

    Science.gov (United States)

    Smithrick, John J.; Hall, Stephen W.

    1992-01-01

    Individual pressure vessel (IPV) nickel-hydrogen technology was advanced at NASA Lewis and under Lewis contracts with the intention of improving cycle life and performance. One advancement was to use 26 percent potassium hydroxide (KOH) electrolyte to improve cycle life. Another advancement was to modify the state-of-the-art cell design to eliminate identified failure modes. The modified design is referred to as the advanced design. A breakthrough in the low-earth-orbit (LEO) cycle life of IPV nickel-hydrogen cells has been previously reported. The cycle life of boiler plate cells containing 26 percent KOH electrolyte was about 40,000 LEO cycles compared to 3,500 cycles for cells containing 31 percent KOH. The boiler plate test results are in the process of being validated using flight hardware and real time LEO testing at the Naval Weapons Support Center (NWSC), Crane, Indiana under a NASA Lewis Contract. An advanced 125 Ah IPV nickel-hydrogen cell was designed. The primary function of the advanced cell is to store and deliver energy for long-term, LEO spacecraft missions. The new features of this design are: (1) use of 26 percent rather than 31 percent KOH electrolyte; (2) use of a patented catalyzed wall wick; (3) use of serrated-edge separators to facilitate gaseous oxygen and hydrogen flow within the cell, while still maintaining physical contact with the wall wick for electrolyte management; and (4) use of a floating rather than a fixed stack (state-of-the-art) to accommodate nickel electrode expansion due to charge/discharge cycling. The significant improvements resulting from these innovations are: extended cycle life; enhanced thermal, electrolyte, and oxygen management; and accommodation of nickel electrode expansion. The advanced cell design is in the process of being validated using real time LEO cycle life testing of NWSC, Crane, Indiana. An update of validation test results confirming this technology is presented.

  3. Pre-Hardware Optimization of Spacecraft Image Processing Algorithms and Hardware Implementation

    Science.gov (United States)

    Kizhner, Semion; Petrick, David J.; Flatley, Thomas P.; Hestnes, Phyllis; Jentoft-Nilsen, Marit; Day, John H. (Technical Monitor)

    2002-01-01

    Spacecraft telemetry rates and telemetry product complexity have steadily increased over the last decade presenting a problem for real-time processing by ground facilities. This paper proposes a solution to a related problem for the Geostationary Operational Environmental Spacecraft (GOES-8) image data processing and color picture generation application. Although large super-computer facilities are the obvious heritage solution, they are very costly, making it imperative to seek a feasible alternative engineering solution at a fraction of the cost. The proposed solution is based on a Personal Computer (PC) platform and synergy of optimized software algorithms, and reconfigurable computing hardware (RC) technologies, such as Field Programmable Gate Arrays (FPGA) and Digital Signal Processors (DSP). It has been shown that this approach can provide superior inexpensive performance for a chosen application on the ground station or on-board a spacecraft.

  4. Stacking faults in austempered ductile iron

    Energy Technology Data Exchange (ETDEWEB)

    Hermida, J.D. [CNEA, San Martin (Argentina). Dept. de Materiales

    1996-06-01

    During last decade, Austempered Ductile Iron (ADI) has been successfully used as an acceptable replacement material for steel in many applications, due to the relatively high strength and reasonable ductility obtained. These properties are the result of the special microstructure exhibited by this material at the end of the upper bainite reaction: ferrite platelets surrounded by high carbon stabilized austenite. However, at the beginning of the austempering treatment, the existence of interdendritic low carbon austenite is revealed by its transformation to martensite when cooling the sample or during subsequent deformation. The completion of the upper bainite reaction is of decisive importance to mechanical properties because the remaining martensite reduces ductility. It was observed that the rate of the upper bainite reaction is governed by the carbon content difference between the low and high carbon austenites. The carbon content is obtained by the lattice parameter measurement, because there exists a known expression that relates both magnitudes. Several works have used X-ray diffraction to measure the lattice parameter and phase concentrations as a function of austempering time. In these works, the lattice parameters were obtained directly from the {l_brace}220{r_brace} and {l_brace}311{r_brace} peaks position. The purpose of this work is to show more precise lattice parameters measurement and, very closely related to this, the existence of stacking faults in austenite, even at times within the processing window.

  5. Long Duration Balloon Charge Controller Stack Integration

    Science.gov (United States)

    Clifford, Kyle

    NASA and the Columbia Scientific Balloon Facility are interested in updating the design of the charge controller on their long duration balloon (LDB) in order to enable the charge controllers to be directly interfaced via RS232 serial communication by a ground testing computers and the balloon's flight computer without the need to have an external electronics stack. The design involves creating a board that will interface with the existing boards in the charge controller in order to receive telemetry from and send commands to those boards, and interface with a computer through serial communication. The inputs to the board are digital status inputs indicating things like whether the photovoltaic panels are connected or disconnected; and analog inputs with information such as the battery voltage and temperature. The outputs of the board are 100ms duration command pulses that will switch relays that do things like connect the photovoltaic panels. The main component of this design is a PIC microcontroller which translates the outputs of the existing charge controller into serial data when interrogated by a ground testing or flight computer. Other components involved in the design are an AD7888 12-bit analog to digital converter, a MAX3232 serial transceiver, various other ICs, capacitors, resistors, and connectors.

  6. Lithiation-induced shuffling of atomic stacks

    KAUST Repository

    Nie, Anmin

    2014-09-10

    In rechargeable lithium-ion batteries, understanding the atomic-scale mechanism of Li-induced structural evolution occurring at the host electrode materials provides essential knowledge for design of new high performance electrodes. Here, we report a new crystalline-crystalline phase transition mechanism in single-crystal Zn-Sb intermetallic nanowires upon lithiation. Using in situ transmission electron microscopy, we observed that stacks of atomic planes in an intermediate hexagonal (h-)LiZnSb phase are "shuffled" to accommodate the geometrical confinement stress arising from lamellar nanodomains intercalated by lithium ions. Such atomic rearrangement arises from the anisotropic lithium diffusion and is accompanied by appearance of partial dislocations. This transient structure mediates further phase transition from h-LiZnSb to cubic (c-)Li2ZnSb, which is associated with a nearly "zero-strain" coherent interface viewed along the [001]h/[111]c directions. This study provides new mechanistic insights into complex electrochemically driven crystalline-crystalline phase transitions in lithium-ion battery electrodes and represents a noble example of atomic-level structural and interfacial rearrangements.

  7. Weyl magnons in noncoplanar stacked kagome antiferromagnets

    Science.gov (United States)

    Owerre, S. A.

    2018-03-01

    Weyl nodes have been experimentally realized in photonic, electronic, and phononic crystals. However, magnonic Weyl nodes are yet to be seen experimentally. In this paper, we propose Weyl magnon nodes in noncoplanar stacked frustrated kagome antiferromagnets, naturally available in various real materials. Most crucially, the Weyl nodes in the current system occur at the lowest excitation and possess a topological thermal Hall effect, therefore they are experimentally accessible at low temperatures due to the population effect of bosonic quasiparticles. In stark contrast to other magnetic systems, the current Weyl nodes do not rely on time-reversal symmetry breaking by the magnetic order. Rather, they result from explicit macroscopically broken time reversal symmetry by the scalar spin chirality of noncoplanar spin textures and can be generalized to chiral spin liquid states. Moreover, the scalar spin chirality gives a real space Berry curvature which is not available in previously studied magnetic Weyl systems. We show the existence of magnon arc surface states connecting projected Weyl magnon nodes on the surface Brillouin zone. We also uncover the first realization of triply-degenerate nodal magnon point in the noncollinear regime with zero scalar spin chirality.

  8. Performance comparison between ISCSI and other hardware and software solutions

    CERN Document Server

    Gug, M

    2003-01-01

    We report on our investigations on some technologies that can be used to build disk servers and networks of disk servers using commodity hardware and software solutions. It focuses on the performance that can be achieved by these systems and gives measured figures for different configurations. It is divided into two parts : iSCSI and other technologies and hardware and software RAID solutions. The first part studies different technologies that can be used by clients to access disk servers using a gigabit ethernet network. It covers block access technologies (iSCSI, hyperSCSI, ENBD). Experimental figures are given for different numbers of clients and servers. The second part compares a system based on 3ware hardware RAID controllers, a system using linux software RAID and IDE cards and a system mixing both hardware RAID and software RAID. Performance measurements for reading and writing are given for different RAID levels.

  9. Generation of Embedded Hardware/Software from SystemC

    Directory of Open Access Journals (Sweden)

    Dominique Houzet

    2006-08-01

    Full Text Available Designers increasingly rely on reusing intellectual property (IP and on raising the level of abstraction to respect system-on-chip (SoC market characteristics. However, most hardware and embedded software codes are recoded manually from system level. This recoding step often results in new coding errors that must be identified and debugged. Thus, shorter time-to-market requires automation of the system synthesis from high-level specifications. In this paper, we propose a design flow intended to reduce the SoC design cost. This design flow unifies hardware and software using a single high-level language. It integrates hardware/software (HW/SW generation tools and an automatic interface synthesis through a custom library of adapters. We have validated our interface synthesis approach on a hardware producer/consumer case study and on the design of a given software radiocommunication application.

  10. Generation of Embedded Hardware/Software from SystemC

    Directory of Open Access Journals (Sweden)

    Ouadjaout Salim

    2006-01-01

    Full Text Available Designers increasingly rely on reusing intellectual property (IP and on raising the level of abstraction to respect system-on-chip (SoC market characteristics. However, most hardware and embedded software codes are recoded manually from system level. This recoding step often results in new coding errors that must be identified and debugged. Thus, shorter time-to-market requires automation of the system synthesis from high-level specifications. In this paper, we propose a design flow intended to reduce the SoC design cost. This design flow unifies hardware and software using a single high-level language. It integrates hardware/software (HW/SW generation tools and an automatic interface synthesis through a custom library of adapters. We have validated our interface synthesis approach on a hardware producer/consumer case study and on the design of a given software radiocommunication application.

  11. Towards hardware-intrinsic security foundations and practice

    CERN Document Server

    Sadeghi, Ahmad-Reza; Tuyls, Pim

    2010-01-01

    Hardware-intrinsic security is a young field dealing with secure secret key storage. This book features contributions from researchers and practitioners with backgrounds in physics, mathematics, cryptography, coding theory and processor theory.

  12. International Space Station (ISS) Addition of Hardware - Computer Generated Art

    Science.gov (United States)

    1995-01-01

    This computer generated scene of the International Space Station (ISS) represents the first addition of hardware following the completion of Phase II. The 8-A Phase shows the addition of the S-9 truss.

  13. Preventive Safety Measures: A Guide to Security Hardware.

    Science.gov (United States)

    Gottwalt, T. J.

    2003-01-01

    Emphasizes the importance of an annual security review of a school facility's door hardware and provides a description of the different types of locking devices typically used on schools and where they are best applied. (EV)

  14. Hardware device to physical structure binding and authentication

    Science.gov (United States)

    Hamlet, Jason R.; Stein, David J.; Bauer, Todd M.

    2013-08-20

    Detection and deterrence of device tampering and subversion may be achieved by including a cryptographic fingerprint unit within a hardware device for authenticating a binding of the hardware device and a physical structure. The cryptographic fingerprint unit includes an internal physically unclonable function ("PUF") circuit disposed in or on the hardware device, which generate an internal PUF value. Binding logic is coupled to receive the internal PUF value, as well as an external PUF value associated with the physical structure, and generates a binding PUF value, which represents the binding of the hardware device and the physical structure. The cryptographic fingerprint unit also includes a cryptographic unit that uses the binding PUF value to allow a challenger to authenticate the binding.

  15. Aspects of system modelling in Hardware/Software partitioning

    DEFF Research Database (Denmark)

    Knudsen, Peter Voigt; Madsen, Jan

    1996-01-01

    This paper addresses fundamental aspects of system modelling and partitioning algorithms in the area of Hardware/Software Codesign. Three basic system models for partitioning are presented and the consequences of partitioning according to each of these are analyzed. The analysis shows the importa......This paper addresses fundamental aspects of system modelling and partitioning algorithms in the area of Hardware/Software Codesign. Three basic system models for partitioning are presented and the consequences of partitioning according to each of these are analyzed. The analysis shows...... the importance of making a clear distinction between the model used for partitioning and the model used for evaluation It also illustrates the importance of having a realistic hardware model such that hardware sharing can be taken into account. Finally, the importance of integrating scheduling and allocation...

  16. Hardware Implementation Of Line Clipping A lgorithm By Using FPGA

    Directory of Open Access Journals (Sweden)

    Amar Dawod

    2013-04-01

    Full Text Available The computer graphics system performance is increasing faster than any other computing application. Algorithms for line clipping against convex polygons and lines have been studied for a long time and many research papers have been published so far. In spite of the latest graphical hardware development and significant increase of performance the clipping is still a bottleneck of any graphical system. So its implementation in hardware is essential for real time applications. In this paper clipping operation is discussed and a hardware implementation of the line clipping algorithm is presented and finally formulated and tested using Field Programmable Gate Arrays (FPGA. The designed hardware unit consists of two parts : the first is positional code generator unit and the second is the clipping unit. Finally it is worth mentioning that the  designed unit is capable of clipping (232524 line segments per second.       

  17. Efficiency of Polymer Electrolyte Membrane Fuel Cell Stack

    Directory of Open Access Journals (Sweden)

    Hans Bosma

    2011-08-01

    Full Text Available This paper applies a feedforward control of optimal oxygen excess ratio that maximize net power (improve efficiency of a NedStack P8.0-64 PEM fuel cell stack (FCS system. Net powers profile as a function of oxygen excess ratio for some points of operation are analyzed by using FCS model. The relationships between stack current and the corresponding control input voltage that gives an optimal oxygen excess ratio are used to design a feedforward control scheme. The results of this scheme are compared to the results of a feedforward control using a constant oxygen excess ratio. Simulation results show that optimal oxygen excess ratio improves fuel cell performance compared to the results of constant oxygen excess ratio. The same procedures are performed experimentally for the FCS system. The behaviour of the net power of the fuel cell stack with respect to the variation of oxygen excess ratio is analyzed to obtain optimal values. Data of stack current and the corresponding voltage input to the compressor that gives optimal values of oxygen excess ratio are used to develop a feedforward control. Feedforward control based on constant and optimal oxygen excess ratio control, are implemented in the NedStack P8.0-64 PEM fuel cell stack system by using LabVIEW. Implementation results shows that optimal oxygen excess ratio control improves the fuel cell performance compared to the constant oxygen excess ratio control.

  18. Testing the LIGO inspiral analysis with hardware injections

    International Nuclear Information System (INIS)

    Brown, D A

    2004-01-01

    Injection of simulated binary inspiral signals into detector hardware provides an excellent test of the inspiral detection pipeline. By recovering the physical parameters of an injected signal, we test our understanding of both instrumental calibration and the data analysis pipeline. We describe an inspiral search code and results from hardware injection tests and demonstrate that injected signals can be recovered by the data analysis pipeline. The parameters of the recovered signals match those of the injected signals

  19. Fifty Years of Observing Hardware and Human Behavior

    Science.gov (United States)

    McMann, Joe

    2011-01-01

    During this half-day workshop, Joe McMann presented the lessons learned during his 50 years of experience in both industry and government, which included all U.S. manned space programs, from Mercury to the ISS. He shared his thoughts about hardware and people and what he has learned from first-hand experience. Included were such topics as design, testing, design changes, development, failures, crew expectations, hardware, requirements, and meetings.

  20. Hardware control system using modular software under RSX-11D

    International Nuclear Information System (INIS)

    Kittell, R.S.; Helland, J.A.

    1978-01-01

    A modular software system used to control extensive hardware is described. The development, operation, and experience with this software are discussed. Included are the methods employed to implement this system while taking advantage of the Real-Time features of RSX-11D. Comparisons are made between this system and an earlier nonmodular system. The controlled hardware includes magnet power supplies, stepping motors, DVM's, and multiplexors, and is interfaced through CAMAC. 4 figures

  1. Accelerator Technology: Injection and Extraction Related Hardware: Kickers and Septa

    CERN Document Server

    Barnes, M J; Mertens, V

    2013-01-01

    This document is part of Subvolume C 'Accelerators and Colliders' of Volume 21 'Elementary Particles' of Landolt-Börnstein - Group I 'Elementary Particles, Nuclei and Atoms'. It contains the the Section '8.7 Injection and Extraction Related Hardware: Kickers and Septa' of the Chapter '8 Accelerator Technology' with the content: 8.7 Injection and Extraction Related Hardware: Kickers and Septa 8.7.1 Fast Pulsed Systems (Kickers) 8.7.2 Electrostatic and Magnetic Septa

  2. Basics of spectroscopic instruments. Hardware of NMR spectrometer

    International Nuclear Information System (INIS)

    Sato, Hajime

    2009-01-01

    NMR is a powerful tool for structure analysis of small molecules, natural products, biological macromolecules, synthesized polymers, samples from material science and so on. Magnetic Resonance Imaging (MRI) is applicable to plants and animals Because most of NMR experiments can be done by an automation mode, one can forget hardware of NMR spectrometers. It would be good to understand features and performance of NMR spectrometers. Here I present hardware of a modern NMR spectrometer which is fully equipped with digital technology. (author)

  3. A Survey on Hardware Implementations of Visual Object Trackers

    OpenAIRE

    El-Shafie, Al-Hussein A.; Habib, S. E. D.

    2017-01-01

    Visual object tracking is an active topic in the computer vision domain with applications extending over numerous fields. The main sub-tasks required to build an object tracker (e.g. object detection, feature extraction and object tracking) are computation-intensive. In addition, real-time operation of the tracker is indispensable for almost all of its applications. Therefore, complete hardware or hardware/software co-design approaches are pursued for better tracker implementations. This pape...

  4. Validating and improving a zero-dimensional stack voltage model of the Vanadium Redox Flow Battery

    Science.gov (United States)

    König, S.; Suriyah, M. R.; Leibfried, T.

    2018-02-01

    Simple, computationally efficient battery models can contribute significantly to the development of flow batteries. However, validation studies for these models on an industrial-scale stack level are rarely published. We first extensively present a simple stack voltage model for the Vanadium Redox Flow Battery. For modeling the concentration overpotential, we derive mass transfer coefficients from experimental results presented in the 1990s. The calculated mass transfer coefficient of the positive half-cell is 63% larger than of the negative half-cell, which is not considered in models published to date. Further, we advance the concentration overpotential model by introducing an apparent electrochemically active electrode surface which differs from the geometric electrode area. We use the apparent surface as fitting parameter for adapting the model to experimental results of a flow battery manufacturer. For adapting the model, we propose a method for determining the agreement between model and reality quantitatively. To protect the manufacturer's intellectual property, we introduce a normalization method for presenting the results. For the studied stack, the apparent electrochemically active surface of the electrode is 41% larger than its geometrical area. Hence, the current density in the diffusion layer is 29% smaller than previously reported for a zero-dimensional model.

  5. Golden-ratio rotated stack-of-stars acquisition for improved volumetric MRI.

    Science.gov (United States)

    Zhou, Ziwu; Han, Fei; Yan, Lirong; Wang, Danny J J; Hu, Peng

    2017-12-01

    To develop and evaluate an improved stack-of-stars radial sampling strategy for reducing streaking artifacts. The conventional stack-of-stars sampling strategy collects the same radial angle for every partition (slice) encoding. In an undersampled acquisition, such an aligned acquisition generates coherent aliasing patterns and introduces strong streaking artifacts. We show that by rotating the radial spokes in a golden-angle manner along the partition-encoding direction, the aliasing pattern is modified, resulting in improved image quality for gridding and more advanced reconstruction methods. Computer simulations were performed and phantom as well as in vivo images for three different applications were acquired. Simulation, phantom, and in vivo experiments confirmed that the proposed method was able to generate images with less streaking artifact and sharper structures based on undersampled acquisitions in comparison with the conventional aligned approach at the same acceleration factors. By combining parallel imaging and compressed sensing in the reconstruction, streaking artifacts were mostly removed with improved delineation of fine structures using the proposed strategy. We present a simple method to reduce streaking artifacts and improve image quality in 3D stack-of-stars acquisitions by re-arranging the radial spoke angles in the 3D partition direction, which can be used for rapid volumetric imaging. Magn Reson Med 78:2290-2298, 2017. © 2017 International Society for Magnetic Resonance in Medicine. © 2017 International Society for Magnetic Resonance in Medicine.

  6. Compiling quantum circuits to realistic hardware architectures using temporal planners

    Science.gov (United States)

    Venturelli, Davide; Do, Minh; Rieffel, Eleanor; Frank, Jeremy

    2018-04-01

    To run quantum algorithms on emerging gate-model quantum hardware, quantum circuits must be compiled to take into account constraints on the hardware. For near-term hardware, with only limited means to mitigate decoherence, it is critical to minimize the duration of the circuit. We investigate the application of temporal planners to the problem of compiling quantum circuits to newly emerging quantum hardware. While our approach is general, we focus on compiling to superconducting hardware architectures with nearest neighbor constraints. Our initial experiments focus on compiling Quantum Alternating Operator Ansatz (QAOA) circuits whose high number of commuting gates allow great flexibility in the order in which the gates can be applied. That freedom makes it more challenging to find optimal compilations but also means there is a greater potential win from more optimized compilation than for less flexible circuits. We map this quantum circuit compilation problem to a temporal planning problem, and generated a test suite of compilation problems for QAOA circuits of various sizes to a realistic hardware architecture. We report compilation results from several state-of-the-art temporal planners on this test set. This early empirical evaluation demonstrates that temporal planning is a viable approach to quantum circuit compilation.

  7. Fundamentals of GPS Receivers A Hardware Approach

    CERN Document Server

    Doberstein, Dan

    2012-01-01

    While much of the current literature on GPS receivers is aimed at those intimately familiar with their workings, this volume summarizes the basic principles using as little mathematics as possible, and details the necessary specifications and circuits for constructing a GPS receiver that is accurate to within 300 meters. Dedicated sections deal with the features of the GPS signal and its data stream, the details of the receiver (using a hybrid design as exemplar), and more advanced receivers and topics including time and frequency measurements. Later segments discuss the Zarlink GPS receiver chip set, as well as providing a thorough examination of the TurboRogue receiver, one of the most accurate yet made. Guiding the reader through the concepts and circuitry, from the antenna to the solution of user position, the book’s deployment of a hybrid receiver as a basis for discussion allows for extrapolation of the core ideas to more complex, and more accurate designs. Digital methods are used, but any analogue c...

  8. Use of hardware accelerators for ATLAS computing

    CERN Document Server

    Bauce, Matteo; Dankel, Maik; Howard, Jacob; Kama, Sami

    2015-01-01

    Modern HEP experiments produce tremendous amounts of data. These data are processed by in-house built software frameworks which have lifetimes longer than the detector itself. Such frameworks were traditionally based on serial code and relied on advances in CPU technologies, mainly clock frequency, to cope with increasing data volumes. With the advent of many-core architectures and GPGPUs this paradigm has to shift to parallel processing and has to include the use of co-processors. However, since the design of most existing frameworks is based on the assumption of frequency scaling and predate co-processors, parallelisation and integration of co-processors are not an easy task. The ATLAS experiment is an example of such a big experiment with a big software framework called Athena. In this talk we will present the studies on parallelisation and co-processor (GPGPU) use in data preparation and tracking for trigger and offline reconstruction as well as their integration into a multiple process based Athena frame...

  9. Use of hardware accelerators for ATLAS computing

    CERN Document Server

    Dankel, Maik; The ATLAS collaboration; Howard, Jacob; Bauce, Matteo; Boing, Rene

    2015-01-01

    Modern HEP experiments produce tremendous amounts of data. This data is processed by in-house built software frameworks which have lifetimes longer than the detector it- self. Such frameworks were traditionally based on serial code and relied on advances in CPU technologies, mainly clock frequency, to cope with increasing data volumes. With the advent of many-core architectures and GPGPUs this paradigm has to shift to paral- lel processing and has to include the use of co-processors. However, since the design of most existing frameworks is based on the assumption of frequency scaling and predate co-processors, parallelisation and integration of co-processors are not an easy task. The ATLAS experiment is an example of such a big experiment with a big software frame- work called Athena. In this proceedings we will present the studies on parallelisation and co-processor (GPGPU) use in data preparation and tracking for trigger and offline recon- struction as well as their integration into a multiple process based...

  10. Loop Entropy Assists Tertiary Order: Loopy Stabilization of Stacking Motifs

    Directory of Open Access Journals (Sweden)

    Daniel P. Aalberts

    2011-11-01

    Full Text Available The free energy of an RNA fold is a combination of favorable base pairing and stacking interactions competing with entropic costs of forming loops. Here we show how loop entropy, surprisingly, can promote tertiary order. A general formula for the free energy of forming multibranch and other RNA loops is derived with a polymer-physics based theory. We also derive a formula for the free energy of coaxial stacking in the context of a loop. Simulations support the analytic formulas. The effects of stacking of unpaired bases are also studied with simulations.

  11. Mixed Mechanism of Lubrication by Lipid Bilayer Stacks.

    Science.gov (United States)

    Boţan, Alexandru; Joly, Laurent; Fillot, Nicolas; Loison, Claire

    2015-11-10

    Although the key role of lipid bilayer stacks in biological lubrication is generally accepted, the mechanisms underlying their extreme efficiency remain elusive. In this article, we report molecular dynamics simulations of lipid bilayer stacks undergoing load and shear. When the hydration level is reduced, the velocity accommodation mechanism changes from viscous shear in hydration water to interlayer sliding in the bilayers. This enables stacks of hydrated lipid bilayers to act as efficient boundary lubricants for various hydration conditions, structures, and mechanical loads. We also propose an estimation for the friction coefficient; thanks to the strong hydration forces between lipid bilayers, the high local viscosity is not in contradiction with low friction coefficients.

  12. On $k$-stellated and $k$-stacked spheres

    OpenAIRE

    Bagchi, Bhaskar; Datta, Basudeb

    2012-01-01

    We introduce the class $\\Sigma_k(d)$ of $k$-stellated (combinatorial) spheres of dimension $d$ ($0 \\leq k \\leq d + 1$) and compare and contrast it with the class ${\\cal S}_k(d)$ ($0 \\leq k \\leq d$) of $k$-stacked homology $d$-spheres. We have $\\Sigma_1(d) = {\\cal S}_1(d)$, and $\\Sigma_k(d) \\subseteq {\\cal S}_k(d)$ for $d \\geq 2k - 1$. However, for each $k \\geq 2$ there are $k$-stacked spheres which are not $k$-stellated. The existence of $k$-stellated spheres which are not $k$-stacked remains...

  13. Stacking by electroinjection with discontinuous buffers in capillary zone electrophoresis.

    Science.gov (United States)

    Shihabi, Zak K

    2002-08-01

    The work presented here demonstrates that electroinjection can be performed using discontinuous buffers, which can result in better stacking than that obtained by hydrodynamic injection. The sample can be concentrated at the tip of the capillary leaving practically the whole capillary for sample separation. This results in several advantages, such as better sample concentration, higher plate number and shorter time of stacking. However, sample introduction by electromigration is suited for samples free or low in salt content. Samples, which are high in salt content, are better introduced by the hydrodynamic injection for stacking by the discontinuous buffers. Different simple methods to introduce the discontinuity in the buffer for electroinjection are discussed.

  14. Optimized stacked RADFETs for milli-rad dose measurement

    International Nuclear Information System (INIS)

    O'Connell, B.; Lane, B.; Mohammadzadeh, A.

    1999-01-01

    This paper details the improvements in the design of stacked RADFETs for increased radiation sensitivity. The issues of high read-out voltage has been shown to be a draw-back. It is the body (bulk)effect factor that is responsible for the increased overall stack Threshold voltage (V T ), which is greater than the sum of the individual devices V T . From extensive process and device simulation and resultant circuit simulation, modified stack structures have been proposed and designed. New and exciting result of lower initial (pre-irradiation) output voltage as well as increased radiation sensitivity will be presented. (author)

  15. HISTRAP [Heavy Ion Storage Ring for Atomic Physics] prototype hardware studies

    International Nuclear Information System (INIS)

    Olsen, D.K.; Atkins, W.H.; Dowling, D.T.; Johnson, J.W.; Lord, R.S.; McConnell, J.W.; Milner, W.T.; Mosko, S.W.; Tatum, B.A.

    1989-01-01

    HISTRAP, Heavy Ion Storage Ring for Atomic Physics, is a proposed 2.67-Tm synchrotron/cooler/storage ring optimized for advanced atomic physics research which will be injected with ions from either the HHIRF 25-MV tandem accelerator or a dedicated ECR source and RFQ linac. Over the last two years, hardware prototypes have been developed for difficult and long lead-time components. A vacuum test stand, the rf cavity, and a prototype dipole magnet have been designed, constructed, and tested. 7 refs., 8 figs., 2 tabs

  16. IT Career JumpStart An Introduction to PC Hardware, Software, and Networking

    CERN Document Server

    Alpern, Naomi J; Muller, Randy

    2011-01-01

    A practical approach for anyone looking to enter the IT workforce Before candidates can begin to prepare for any kind of certification, they need a basic understanding of the various hardware and software components used in a computer network. Aimed at aspiring IT professionals, this invaluable book strips down a network to its bare basics, and discusses this complex topic in a clear and concise manner so that IT beginners can confidently gain an understanding of fundamental IT concepts. In addition, a base knowledge has been established so that more advanced topics and technologies can be lea

  17. A Principled Kernel Testbed for Hardware/Software Co-Design Research

    Energy Technology Data Exchange (ETDEWEB)

    Kaiser, Alex; Williams, Samuel; Madduri, Kamesh; Ibrahim, Khaled; Bailey, David; Demmel, James; Strohmaier, Erich

    2010-04-01

    Recently, advances in processor architecture have become the driving force for new programming models in the computing industry, as ever newer multicore processor designs with increasing number of cores are introduced on schedules regimented by marketing demands. As a result, collaborative parallel (rather than simply concurrent) implementations of important applications, programming languages, models, and even algorithms have been forced to adapt to these architectures to exploit the available raw performance. We believe that this optimization regime is flawed. In this paper, we present an alternate approach that, rather than starting with an existing hardware/software solution laced with hidden assumptions, defines the computational problems of interest and invites architects, researchers and programmers to implement novel hardware/software co-designed solutions. Our work builds on the previous ideas of computational dwarfs, motifs, and parallel patterns by selecting a representative set of essential problems for which we provide: An algorithmic description; scalable problem definition; illustrative reference implementations; verification schemes. This testbed will enable comparative research in areas such as parallel programming models, languages, auto-tuning, and hardware/software codesign. For simplicity, we focus initially on the computational problems of interest to the scientific computing community but proclaim the methodology (and perhaps a subset of the problems) as applicable to other communities. We intend to broaden the coverage of this problem space through stronger community involvement.

  18. A Principled Kernel Testbed for Hardware/Software Co-Design Research

    Energy Technology Data Exchange (ETDEWEB)

    Kaiser, Alex [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Williams, Samuel [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Madduri, Kamesh [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Ibrahim, Khaled [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Bailey, David [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Demmel, James [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Strohmaier, Erich [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States)

    2010-07-16

    Recently, advances in processor architecture have become the driving force for new programming models in the computing industry, as ever newer multicore processor designs with increasing number of cores are introduced on schedules regimented by marketing demands. As a result, collaborative parallel (rather than simply concurrent) implementations of important applications, programming languages, models, and even algorithms have been forced to adapt to these architectures to exploit the available raw performance. We believe that this optimization regime is flawed. In this paper, we present an alternate approach that, rather than starting with an existing hardware/software solution laced with hidden assumptions, defines the computational problems of interest and invites architects, researchers and programmers to implement novel hardware/software co-designed solutions. Our work builds on the previous ideas of computational dwarfs, motifs, and parallel patterns by selecting a representative set of essential problems for which we provide: An algorithmic description; scalable problem definition; illustrative reference implementations; verification schemes. This testbed will enable comparative research in areas such as parallel programming models, languages, auto-tuning, and hardware/software codesign. For simplicity, we focus initially on the computational problems of interest to the scientific computing community but proclaim the methodology (and perhaps a subset of the problems) as applicable to other communities. We intend to broaden the coverage of this problem space through stronger community involvement.

  19. The impact of hardware improvement for molecular modeling in a grid environment.

    Science.gov (United States)

    Li, Dandan; Sun, Ming; Li, Mingxiao; Li, Zhibin; Jiang, Zhenran

    2009-08-01

    Molecular modeling has become an important tool in the process of computational drug discovery. One of the main challenges in the routine application of molecular modeling technique is the excessive computing capability. Recent advances in hardware capability and improvement in software have led to an increasing interest in meeting the demand of massive computing power for molecular modeling. Grid computing can deliver computational as well as large, sustained data-rich and knowledge-intensive resources across distributed heterogeneous sites, which is attracting increasing attention in solving computing intensive problems. This paper describes the application of grid computing in computational drug discovery. In particular, the impact of hardware improvement for molecular modeling and challenges presented by the grid computing infrastructure domain are discussed. Hardware improvement in grid computing setting can accelerate computational drug discovery at the molecular modeling stage. However, despite the promising results obtained in different projects, there are still some potential problems in the large-scale application of current grid computing techniques to be addressed.

  20. Hardware design and implementation of the closed-orbit feedback system at APS

    International Nuclear Information System (INIS)

    Barr, D.; Chung, Youngjoo.

    1996-01-01

    The Advanced Photon Source (APS) storage ring will utilize a closed-orbit feedback system in order to produce a more stable beam. The specified orbit measurement resolution is 25 microns for global feedback and 1 micron for local feedback. The system will sample at 4 kHz and provide a correction bandwidth of 100 Hz. At this bandwidth, standard rf BPMs will provide a resolution of 0.7 micron, while specialized miniature BPMs positioned on either side of the insertion devices for local feedback will provide a resolution of 0.2 micron (1). The measured BPM noise floor for standard BPMs is 0.06 micron per root hertz mA. Such a system has been designed, simulated, and tested on a small scale (2). This paper covers the actual hardware design and layout of the entire closed-loop system. This includes commercial hardware components, in addition to many components designed and built in-house. The paper will investigate the large-scale workings of all these devices, as well as an overall view of each piece of hardware used

  1. MSAP Hardware Verification: Testing Multi-Mission System Architecture Platform Hardware Using Simulation and Bench Test Equipment

    Science.gov (United States)

    Crossin, Kent R.

    2005-01-01

    The Multi-Mission System Architecture Platform (MSAP) project aims to develop a system of hardware and software that will provide the core functionality necessary in many JPL missions and can be tailored to accommodate mission-specific requirements. The MSAP flight hardware is being developed in the Verilog hardware description language, allowing developers to simulate their design before releasing it to a field programmable gate array (FPGA). FPGAs can be updated in a matter of minutes, drastically reducing the time and expense required to produce traditional application-specific integrated circuits. Bench test equipment connected to the FPGAs can then probe and run Tcl scripts on the hardware. The Verilog and Tcl code can be reused or modified with each design. These steps are effective in confirming that the design operates according specifications.

  2. An assessment of air sampling location for stack monitoring in nuclear facility

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Jung Bok [University of Science and Technology, Daejeon (Korea, Republic of); Kim, Tae Hyoung; Lee, Jong Il; Kim, Bong Hwan [Korea Atomic Energy Research Institute, Daejeon (Korea, Republic of)

    2017-06-15

    In this study, air sampling locations in the stack of the Advanced Fuel Science Building (AFSB) at the Korea Atomic Energy Research Institute (KAERI) were assessed according to the ANSI/HPS N13.1-1999 specification. The velocity profile, flow angle and 10 μm aerosol particle profile at the cross-section as functions of stack height L and stack diameter D (L/D) were assessed according to the sampling location criteria using COMSOL. The criteria for the velocity profile were found to be met at 5 L/D or more for the height, and the criteria for the average flow angle were met at all locations through this assessment. The criteria for the particle profile were met at 5 L/D and 9 L/D. However, the particle profile at the cross-section of each sampling location was found to be non-uniform. In order to establish uniformity of the particle profile, a static mixer and a perimeter ring were modeled, after which the degrees of effectiveness of these components were compared. Modeling using the static mixer indicated that the sampling locations that met the criteria for the particle profile were 5-10 L/D. When modeling using the perimeter ring, the sampling locations that met the criteria for particle profile were 5 L/D and 7-10 L/D. The criteria for the velocity profile and the average flow angle were also met at the sampling locations that met the criteria for the particle profile. The methodologies used in this study can also be applied during assessments of air sampling locations when monitoring stacks at new nuclear facilities as well as existing nuclear facilities.

  3. Fuel flow distribution in SOFC stacks revealed by impedance spectroscopy

    DEFF Research Database (Denmark)

    Mosbæk, Rasmus Rode; Hjelm, Johan; Barfod, Rasmus

    2014-01-01

    . An operating stack is subject to compositional gradients in the gaseous reactant streams, and temperature gradients across each cell and across the stack, which complicates detailed analysis. An experimental stack with low ohmic resistance from Topsoe Fuel Cell A/S was characterized using Electrochemical...... Impedance Spectroscopy (EIS). The stack measurement geometry was optimized for EIS by careful selection of the placement of current feeds and voltage probes in order to minimize measurement errors. It was demonstrated that with the improved placement of current feeds and voltage probes it is possible...... to separate the loss contributions in an ohmic and a polarization part and that the low frequency response is useful in detecting mass transfer limitations. This methodology can be used to detect possible minor changes in the supply of gas to the individual cells, which is important when going to high fuel...

  4. Simulation of magnetization and levitation characteristics of HTS tape stacks

    Science.gov (United States)

    Anischenko, I. V.; Pokrovskii, S. V.; Mineev, N. A.

    2017-12-01

    In this work it is presented a computational model of a magnetic levitation system based on stacks of high-temperature second generation superconducting tapes (HTS) GdBa2Cu3O7-x. Calculated magnetic field and the current distributions in the system for different stacks geometries in the zero-field cooling mode are also presented. The magnetization curves of the stacks in the external field of a permanent NdFeB magnet and the levitation force dependence on the gap between the magnet and the HTS tapes stack were obtained. A model of the magnetic system, oriented to levitation application, is given. Results of modeling were compared with the experimental data.

  5. Fast principal component analysis for stacking seismic data

    Science.gov (United States)

    Wu, Juan; Bai, Min

    2018-04-01

    Stacking seismic data plays an indispensable role in many steps of the seismic data processing and imaging workflow. Optimal stacking of seismic data can help mitigate seismic noise and enhance the principal components to a great extent. Traditional average-based seismic stacking methods cannot obtain optimal performance when the ambient noise is extremely strong. We propose a principal component analysis (PCA) algorithm for stacking seismic data without being sensitive to noise level. Considering the computational bottleneck of the classic PCA algorithm in processing massive seismic data, we propose an efficient PCA algorithm to make the proposed method readily applicable for industrial applications. Two numerically designed examples and one real seismic data are used to demonstrate the performance of the presented method.

  6. Static analysis of worst-case stack cache behavior

    DEFF Research Database (Denmark)

    Jordan, Alexander; Brandner, Florian; Schoeberl, Martin

    2013-01-01

    Utilizing a stack cache in a real-time system can aid predictability by avoiding interference that heap memory traffic causes on the data cache. While loads and stores are guaranteed cache hits, explicit operations are responsible for managing the stack cache. The behavior of these operations can......-graph, the worst-case bounds can be efficiently yet precisely determined. Our evaluation using the MiBench benchmark suite shows that only 37% and 21% of potential stack cache operations actually store to and load from memory, respectively. Analysis times are modest, on average running between 0.46s and 1.30s per...... be analyzed statically. We present algorithms that derive worst-case bounds on the latency-inducing operations of the stack cache. Their results can be used by a static WCET tool. By breaking the analysis down into subproblems that solve intra-procedural data-flow analysis and path searches on the call...

  7. A Stack Cache for Real-Time Systems

    DEFF Research Database (Denmark)

    Schoeberl, Martin; Nielsen, Carsten

    2016-01-01

    Real-time systems need time-predictable computing platforms to allowfor static analysis of the worst-case execution time. Caches are important for good performance, but data caches arehard to analyze for the worst-case execution time. Stack allocated data has different properties related to local......Real-time systems need time-predictable computing platforms to allowfor static analysis of the worst-case execution time. Caches are important for good performance, but data caches arehard to analyze for the worst-case execution time. Stack allocated data has different properties related...... to locality, lifetime, and static analyzability of access addresses comparedto static or heap allocated data. Therefore, caching of stack allocateddata benefits from having its own cache. In this paper we present a cache architecture optimized for stack allocateddata. This cache is additional to the normal...

  8. DBaaS with OpenStack Trove

    CERN Document Server

    Giardini, Andrea

    2013-01-01

    The purpose of the project was to evaluate the Trove component for OpenStack, understand if it can be used with the CERN infrastructure and report the benefits and disadvantages of this software. Currently, databases for CERN projects are provided by a DbaaS software developed inside the IT-DB group. This solution works well with the actual infrastructure but it is not easy to maintain. With the migration of the CERN infrastructure to OpenStack the Database group started to evaluate the Trove component. Instead of mantaining an own DbaaS service it can be interesting to migrate everything to OpenStack and replace the actual DbaaS software with Trove. This way both virtual machines and databases will be managed by OpenStack itself.

  9. Stacking dependence of carrier transport properties in multilayered black phosphorous.

    Science.gov (United States)

    Sengupta, A; Audiffred, M; Heine, T; Niehaus, T A

    2016-02-24

    We present the effect of different stacking orders on carrier transport properties of multi-layer black phosphorous. We consider three different stacking orders AAA, ABA and ACA, with increasing number of layers (from 2 to 6 layers). We employ a hierarchical approach in density functional theory (DFT), with structural simulations performed with generalized gradient approximation (GGA) and the bandstructure, carrier effective masses and optical properties evaluated with the meta-generalized gradient approximation (MGGA). The carrier transmission in the various black phosphorous sheets was carried out with the non-equilibrium green's function (NEGF) approach. The results show that ACA stacking has the highest electron and hole transmission probabilities. The results show tunability for a wide range of band-gaps, carrier effective masses and transmission with a great promise for lattice engineering (stacking order and layers) in black phosphorous.

  10. SEE on Different Layers of Stacked-SRAMs

    CERN Document Server

    Gupta, V; Tsiligiannis, G; Rousselet, M; Mohammadzadeh, A; Javanainen, A; Virtanen, A; Puchner, H; Saigné, F; Wrobel, F; Dilillo, L

    2015-01-01

    This paper presents heavy-ion and proton radiation test results of a 90 nm COTS SRAM with stacked structure. Radiation tests were made using high penetration heavy-ion cocktails at the HIF (Belgium) and at RADEF (Finland) as well as low energy protons at RADEF. The heavy-ion SEU cross-section showed an unusual profile with a peak at the lowest LET (heavy-ion with the highest penetration range). The discrepancy is due to the fact that the SRAM is constituted of two vertically stacked dice. The impact of proton testing on the response of both stacked dice is presented. The results are discussed and the SEU cross-sections of the upper and lower layers are compared. The impact of the stacked structure on the proton SEE rate is investigated.

  11. Modeling of a Stacked Power Module for Parasitic Inductance Extraction

    Science.gov (United States)

    2017-09-15

    ARL-TR-8138 ● SEP 2017 US Army Research Laboratory Modeling of a Stacked Power Module for Parasitic Inductance Extraction by...not return it to the originator. ARL-TR-8138 ● SEP 2017 US Army Research Laboratory Modeling of a Stacked Power Module for...aware that notwithstanding any other provision of law , no person shall be subject to any penalty for failing to comply with a collection of information if

  12. National Spherical Torus Experiment (NSTX) Center Stack Upgrade

    International Nuclear Information System (INIS)

    Neumeyer, C.; Avasarala, S.; Chrzanowski, J.; Dudek, L.; Fan, H.; Hatcher, H.; Heitzenroeder, P.; Menard, J.; Ono, M.; Ramakrishnan, S.; Titus, P.; Woolley, R.; Zhan, H.

    2009-01-01

    The purpose of the NSTX Center Stack Upgrade project is to expand the NSTX operational space and thereby the physics basis for next-step ST facilities. The plasma aspect ratio (ratio of plasma major to minor radius) of the upgrade is increased to 1.5 from the original value of 1.26, which increases the cross sectional area of the center stack by a factor of ∼ 3 and makes possible higher levels of performance and pulse duration.

  13. A new method for beam stacking in storage rings

    Energy Technology Data Exchange (ETDEWEB)

    Bhat, C.M.; /Fermilab

    2008-06-01

    Recently, I developed a new beam stacking scheme for synchrotron storage rings called 'longitudinal phase-space coating' (LPSC). This scheme has been convincingly validated by multi-particle beam dynamics simulations and has been demonstrated with beam experiments at the Fermilab Recycler. Here, I present the results from both simulations and experiments. The beam stacking scheme presented here is the first of its kind.

  14. Stacking faults and phase transformations in silicon nitride

    Science.gov (United States)

    Milhet, X.; Demenet, J.-L.; Rabier, J.

    1998-11-01

    From observations of extended dislocation nodes in β silicon nitride, possible stacking fault structures in the basal plane of this compound have been investigated. It has been found that stacking fault structure is locally analogous to α silicon nitride. A phase transformation α to β or β to α can also be achieved by cooperative shear of partial dislocations with 1/3<~ngle1bar{1}00rangle Burgers vectors.

  15. LOFT diesel generator ''A'' exhaust stack seismic analysis

    International Nuclear Information System (INIS)

    Blandford, R.K.

    1978-01-01

    A stress analysis of the LOFT Diesel Generator ''A'' Exhaust Stack was performed to determine its reaction to Safe-Shutdown Earthquake loads. The exhaust stack silencer and supporting foundation was found to be inadequate for the postulated seismic accelerations. Lateral support is required to prevent overturning of the silencer pedestal and reinforcement of the 4'' x 0.5'' silencer base straps is necessary. Basic requirements for this additional support are discussed

  16. Field-induced stacking transition of biofunctionalized trilayer graphene

    Energy Technology Data Exchange (ETDEWEB)

    Masato Nakano, C. [Flintridge Preparatory School, La Canada, California 91011 (United States); Sajib, Md Symon Jahan; Samieegohar, Mohammadreza; Wei, Tao [Dan F. Smith Department of Chemical Engineering, Lamar University, Beaumont, Texas 77710 (United States)

    2016-02-01

    Trilayer graphene (TLG) is attracting a lot of attention as their stacking structures (i.e., rhombohedral vs. Bernal) drastically affect electronic and optical properties. Based on full-atom molecular dynamics simulations, we here predict electric field-induced rhombohedral-to-Bernal transition of TLG tethered with proteins. Furthermore, our simulations show that protein's electrophoretic mobility and diffusivity are enhanced on TLG surface. This phenomenon of controllable TLG stacking transition will contribute to various applications including biosensing.

  17. Measurements of proton energy spectra using a radiochromic film stack

    Science.gov (United States)

    Filkins, T. M.; Steidle, Jessica; Ellison, D. M.; Steidle, Jeffrey; Freeman, C. G.; Padalino, S. J.; Fiksel, G.; Regan, S. P.; Sangster, T. C.

    2014-10-01

    The energy spectrum of protons accelerated from the rear-side of a thin foil illuminated with ultra-intense laser light from the OMEGA EP laser system at the University of Rochester's Laboratory for Laser Energetics (LLE) was measured using a stack of radiochromic film (RCF). The film stack consisted of four layers of Gafchromic HD-V2 film and four layers of Gafchromic MD-V2-55 film. Aluminum foils of various thicknesses were placed between each piece of RCF in the stack. This arrangement allowed protons with energies of 30 MeV to reach the back layer of RCF in the stack. The stack was placed in the detector plane of a Thomson parabola ion energy (TPIE) spectrometer. Each piece of film in the stack was scanned using a commercially available flat-bed scanner (Epson 10000XL). The resulting optical density was converted into proton fluence using an absolute calibration of the RCF obtained at the SUNY Geneseo 1.7 MV Pelletron accelerator laboratory. In these calibration measurements, the sensitivity of the radiochromic film was measured using monoenergetic protons produced by the accelerator. Details of the analysis procedure and the resulting proton energy spectra will be presented. Funded in part by a grant from the DOE through the Laboratory for Laser Energetics.

  18. Standoff Stack Emissions Monitoring Using Short Range Lidar

    Science.gov (United States)

    Gravel, Jean-Francois Y.; Babin, Francois; Allard, Martin

    2016-06-01

    There are well documented methods for stack emissions monitoring. These are all based on stack sampling through sampling ports in well defined conditions. Once sampled, the molecules are quantified in instruments that often use optical techniques. Unfortunately sampling ports are not found on all stacks/ducts or the use of the sampling ports cannot be planned efficiently because of operational constraints or the emissions monitoring equipment cannot be driven to a remote stack/duct. Emissions monitoring using many of the same optical techniques, but at a standoff distance, through the atmosphere, using short range high spatial resolution lidar techniques was thus attempted. Standoff absorption and Raman will be discussed and results from a field campaign will be presented along with short descriptions of the apparatus. In the first phase of these tests, the molecules that were targeted were NO and O2. Spatially resolved optical measurements allow for standoff identification and quantification of molecules, much like the standardized methods, except for the fact that it is not done in the stack, but in the plume formed by the emissions from the stack. The pros and cons will also be discussed, and in particular the problem of mass emission estimates that require the knowledge of the flow rate and the distribution of molecular concentration in the plane of measurement.

  19. Standoff Stack Emissions Monitoring Using Short Range Lidar

    Directory of Open Access Journals (Sweden)

    Gravel Jean-Francois Y.

    2016-01-01

    Full Text Available There are well documented methods for stack emissions monitoring. These are all based on stack sampling through sampling ports in well defined conditions. Once sampled, the molecules are quantified in instruments that often use optical techniques. Unfortunately sampling ports are not found on all stacks/ducts or the use of the sampling ports cannot be planned efficiently because of operational constraints or the emissions monitoring equipment cannot be driven to a remote stack/duct. Emissions monitoring using many of the same optical techniques, but at a standoff distance, through the atmosphere, using short range high spatial resolution lidar techniques was thus attempted. Standoff absorption and Raman will be discussed and results from a field campaign will be presented along with short descriptions of the apparatus. In the first phase of these tests, the molecules that were targeted were NO and O2. Spatially resolved optical measurements allow for standoff identification and quantification of molecules, much like the standardized methods, except for the fact that it is not done in the stack, but in the plume formed by the emissions from the stack. The pros and cons will also be discussed, and in particular the problem of mass emission estimates that require the knowledge of the flow rate and the distribution of molecular concentration in the plane of measurement.

  20. Advanced Hydrogen Turbine Development

    Energy Technology Data Exchange (ETDEWEB)

    Marra, John [Siemens Energy, Inc., Orlando, FL (United States)

    2015-09-30

    Under the sponsorship of the U.S. Department of Energy (DOE) National Energy Technology Laboratories, Siemens has completed the Advanced Hydrogen Turbine Development Program to develop an advanced gas turbine for incorporation into future coal-based Integrated Gasification Combined Cycle (IGCC) plants. All the scheduled DOE Milestones were completed and significant technical progress was made in the development of new technologies and concepts. Advanced computer simulations and modeling, as well as subscale, full scale laboratory, rig and engine testing were utilized to evaluate and select concepts for further development. Program Requirements of: A 3 to 5 percentage point improvement in overall plant combined cycle efficiency when compared to the reference baseline plant; 20 to 30 percent reduction in overall plant capital cost when compared to the reference baseline plant; and NOx emissions of 2 PPM out of the stack. were all met. The program was completed on schedule and within the allotted budget

  1. Flight Hardware Virtualization for On-Board Science Data Processing Project

    Data.gov (United States)

    National Aeronautics and Space Administration — Utilize Hardware Virtualization technology to benefit on-board science data processing by investigating new real time embedded Hardware Virtualization solutions and...

  2. OS friendly microprocessor architecture: Hardware level computer security

    Science.gov (United States)

    Jungwirth, Patrick; La Fratta, Patrick

    2016-05-01

    We present an introduction to the patented OS Friendly Microprocessor Architecture (OSFA) and hardware level computer security. Conventional microprocessors have not tried to balance hardware performance and OS performance at the same time. Conventional microprocessors have depended on the Operating System for computer security and information assurance. The goal of the OS Friendly Architecture is to provide a high performance and secure microprocessor and OS system. We are interested in cyber security, information technology (IT), and SCADA control professionals reviewing the hardware level security features. The OS Friendly Architecture is a switched set of cache memory banks in a pipeline configuration. For light-weight threads, the memory pipeline configuration provides near instantaneous context switching times. The pipelining and parallelism provided by the cache memory pipeline provides for background cache read and write operations while the microprocessor's execution pipeline is running instructions. The cache bank selection controllers provide arbitration to prevent the memory pipeline and microprocessor's execution pipeline from accessing the same cache bank at the same time. This separation allows the cache memory pages to transfer to and from level 1 (L1) caching while the microprocessor pipeline is executing instructions. Computer security operations are implemented in hardware. By extending Unix file permissions bits to each cache memory bank and memory address, the OSFA provides hardware level computer security.

  3. Fast DRR splat rendering using common consumer graphics hardware

    International Nuclear Information System (INIS)

    Spoerk, Jakob; Bergmann, Helmar; Wanschitz, Felix; Dong, Shuo; Birkfellner, Wolfgang

    2007-01-01

    Digitally rendered radiographs (DRR) are a vital part of various medical image processing applications such as 2D/3D registration for patient pose determination in image-guided radiotherapy procedures. This paper presents a technique to accelerate DRR creation by using conventional graphics hardware for the rendering process. DRR computation itself is done by an efficient volume rendering method named wobbled splatting. For programming the graphics hardware, NVIDIAs C for Graphics (Cg) is used. The description of an algorithm used for rendering DRRs on the graphics hardware is presented, together with a benchmark comparing this technique to a CPU-based wobbled splatting program. Results show a reduction of rendering time by about 70%-90% depending on the amount of data. For instance, rendering a volume of 2x10 6 voxels is feasible at an update rate of 38 Hz compared to 6 Hz on a common Intel-based PC using the graphics processing unit (GPU) of a conventional graphics adapter. In addition, wobbled splatting using graphics hardware for DRR computation provides higher resolution DRRs with comparable image quality due to special processing characteristics of the GPU. We conclude that DRR generation on common graphics hardware using the freely available Cg environment is a major step toward 2D/3D registration in clinical routine

  4. FPGA hardware acceleration for high performance neutron transport computation based on agent methodology - 318

    International Nuclear Information System (INIS)

    Shanjie, Xiao; Tatjana, Jevremovic

    2010-01-01

    The accurate, detailed and 3D neutron transport analysis for Gen-IV reactors is still time-consuming regardless of advanced computational hardware available in developed countries. This paper introduces a new concept in addressing the computational time while persevering the detailed and accurate modeling; a specifically designed FPGA co-processor accelerates robust AGENT methodology for complex reactor geometries. For the first time this approach is applied to accelerate the neutronics analysis. The AGENT methodology solves neutron transport equation using the method of characteristics. The AGENT methodology performance was carefully analyzed before the hardware design based on the FPGA co-processor was adopted. The most time-consuming kernel part is then transplanted into the FPGA co-processor. The FPGA co-processor is designed with data flow-driven non von-Neumann architecture and has much higher efficiency than the conventional computer architecture. Details of the FPGA co-processor design are introduced and the design is benchmarked using two different examples. The advanced chip architecture helps the FPGA co-processor obtaining more than 20 times speed up with its working frequency much lower than the CPU frequency. (authors)

  5. An open-source wireless sensor stack: from Arduino to SDI-12 to Water One Flow

    Science.gov (United States)

    Hicks, S.; Damiano, S. G.; Smith, K. M.; Olexy, J.; Horsburgh, J. S.; Mayorga, E.; Aufdenkampe, A. K.

    2013-12-01

    Implementing a large-scale streaming environmental sensor network has previously been limited by the high cost of the datalogging and data communication infrastructure. The Christina River Basin Critical Zone Observatory (CRB-CZO) is overcoming the obstacles to large near-real-time data collection networks by using Arduino, an open source electronics platform, in combination with XBee ZigBee wireless radio modules. These extremely low-cost and easy-to-use open source electronics are at the heart of the new DIY movement and have provided solutions to countless projects by over half a million users worldwide. However, their use in environmental sensing is in its infancy. At present a primary limitation to widespread deployment of open-source electronics for environmental sensing is the lack of a simple, open-source software stack to manage streaming data from heterogeneous sensor networks. Here we present a functioning prototype software stack that receives sensor data over a self-meshing ZigBee wireless network from over a hundred sensors, stores the data locally and serves it on demand as a CUAHSI Water One Flow (WOF) web service. We highlight a few new, innovative components, including: (1) a versatile open data logger design based the Arduino electronics platform and ZigBee radios; (2) a software library implementing SDI-12 communication protocol between any Arduino platform and SDI12-enabled sensors without the need for additional hardware (https://github.com/StroudCenter/Arduino-SDI-12); and (3) 'midStream', a light-weight set of Python code that receives streaming sensor data, appends it with metadata on the fly by querying a relational database structured on an early version of the Observations Data Model version 2.0 (ODM2), and uses the WOFpy library to serve the data as WaterML via SOAP and REST web services.

  6. Plutonium Protection System (PPS). Volume 2. Hardware description. Final report

    International Nuclear Information System (INIS)

    Miyoshi, D.S.

    1979-05-01

    The Plutonium Protection System (PPS) is an integrated safeguards system developed by Sandia Laboratories for the Department of Energy, Office of Safeguards and Security. The system is designed to demonstrate and test concepts for the improved safeguarding of plutonium. Volume 2 of the PPS final report describes the hardware elements of the system. The major areas containing hardware elements are the vault, where plutonium is stored, the packaging room, where plutonium is packaged into Container Modules, the Security Operations Center, which controls movement of personnel, the Material Accountability Center, which maintains the system data base, and the Material Operations Center, which monitors the operating procedures in the system. References are made to documents in which details of the hardware items can be found

  7. High-performance free-space optical modem hardware

    Science.gov (United States)

    Sluz, Joseph E.; Juarez, Juan C.; Bair, Chun-Huei; Oberc, Rachel L.; Venkat, Radha A.; Rollend, Derek; Young, David W.

    2012-06-01

    This paper describes key aspects of modem hardware designed to operate in free space optical (FSO) links of up to 200 km. The hardware serves as a bridge between 10 gigabit Ethernet client data systems and FSO terminals. The modem hardware alters the client data rate and format for optimal transmission and reception over the FSO link by applying forward error correction (FEC) processing and differential phase shift keying (DPSK) modulation. Optical automatic gain control (OAGC) is also used. The result of these features provide sensitivities approaching -48 dBm with 60 dB of error-free dynamic range while in the presence of turbulent optical conditions to deal with large dynamic range optical power fades.

  8. Hardware Abstraction and Protocol Optimization for Coded Sensor Networks

    DEFF Research Database (Denmark)

    Nistor, Maricica; Roetter, Daniel Enrique Lucani; Barros, João

    2015-01-01

    The design of the communication protocols in wireless sensor networks (WSNs) often neglects several key characteristics of the sensor's hardware, while assuming that the number of transmitted bits is the dominating factor behind the system's energy consumption. A closer look at the hardware...... specifications of common sensors reveals, however, that other equally important culprits exist, such as the reception and processing energy. Hence, there is a need for a more complete hardware abstraction of a sensor node to reduce effectively the total energy consumption of the network by designing energy......-efficient protocols that use such an abstraction, as well as mechanisms to optimize a communication protocol in terms of energy consumption. The problem is modeled for different feedback-based techniques, where sensors are connected to a base station, either directly or through relays. We show that for four example...

  9. Asymmetric Hardware Distortions in Receive Diversity Systems: Outage Performance Analysis

    KAUST Repository

    Javed, Sidrah

    2017-02-22

    This paper studies the impact of asymmetric hardware distortion (HWD) on the performance of receive diversity systems using linear and switched combining receivers. The asymmetric attribute of the proposed model motivates the employment of improper Gaussian signaling (IGS) scheme rather than the traditional proper Gaussian signaling (PGS) scheme. The achievable rate performance is analyzed for the ideal and non-ideal hardware scenarios using PGS and IGS transmission schemes for different combining receivers. In addition, the IGS statistical characteristics are optimized to maximize the achievable rate performance. Moreover, the outage probability performance of the receive diversity systems is analyzed yielding closed form expressions for both PGS and IGS based transmission schemes. HWD systems that employ IGS is proven to efficiently combat the self interference caused by the HWD. Furthermore, the obtained analytic expressions are validated through Monte-Carlo simulations. Eventually, non-ideal hardware transceivers degradation and IGS scheme acquired compensation are quantified through suitable numerical results.

  10. Hardware Realization of Chaos-based Symmetric Video Encryption

    KAUST Repository

    Ibrahim, Mohamad A.

    2013-05-01

    This thesis reports original work on hardware realization of symmetric video encryption using chaos-based continuous systems as pseudo-random number generators. The thesis also presents some of the serious degradations caused by digitally implementing chaotic systems. Subsequently, some techniques to eliminate such defects, including the ultimately adopted scheme are listed and explained in detail. Moreover, the thesis describes original work on the design of an encryption system to encrypt MPEG-2 video streams. Information about the MPEG-2 standard that fits this design context is presented. Then, the security of the proposed system is exhaustively analyzed and the performance is compared with other reported systems, showing superiority in performance and security. The thesis focuses more on the hardware and the circuit aspect of the system’s design. The system is realized on Xilinx Vetrix-4 FPGA with hardware parameters and throughput performance surpassing conventional encryption systems.

  11. XOR-FREE Implementation of Convolutional Encoder for Reconfigurable Hardware

    Directory of Open Access Journals (Sweden)

    Gaurav Purohit

    2016-01-01

    Full Text Available This paper presents a novel XOR-FREE algorithm to implement the convolutional encoder using reconfigurable hardware. The approach completely removes the XOR processing of a chosen nonsystematic, feedforward generator polynomial of larger constraint length. The hardware (HW implementation of new architecture uses Lookup Table (LUT for storing the parity bits. The design implements architectural reconfigurability by modifying the generator polynomial of the same constraint length and code rate to reduce the design complexity. The proposed architecture reduces the dynamic power up to 30% and improves the hardware cost and propagation delay up to 20% and 32%, respectively. The performance of the proposed architecture is validated in MATLAB Simulink and tested on Zynq-7 series FPGA.

  12. Advanced computers and simulation

    International Nuclear Information System (INIS)

    Ryne, R.D.

    1993-01-01

    Accelerator physicists today have access to computers that are far more powerful than those available just 10 years ago. In the early 1980's, desktop workstations performed less one million floating point operations per second (Mflops), and the realized performance of vector supercomputers was at best a few hundred Mflops. Today vector processing is available on the desktop, providing researchers with performance approaching 100 Mflops at a price that is measured in thousands of dollars. Furthermore, advances in Massively Parallel Processors (MPP) have made performance of over 10 gigaflops a reality, and around mid-decade MPPs are expected to be capable of teraflops performance. Along with advances in MPP hardware, researchers have also made significant progress in developing algorithms and software for MPPS. These changes have had, and will continue to have, a significant impact on the work of computational accelerator physicists. Now, instead of running particle simulations with just a few thousand particles, we can perform desktop simulations with tens of thousands of simulation particles, and calculations with well over 1 million particles are being performed on MPPs. In the area of computational electromagnetics, simulations that used to be performed only on vector supercomputers now run in several hours on desktop workstations, and researchers are hoping to perform simulations with over one billion mesh points on future MPPs. In this paper we will discuss the latest advances, and what can be expected in the near future, in hardware, software and applications codes for advanced simulation of particle accelerators

  13. Mini-O, simple Omega receiver hardware for user education

    Science.gov (United States)

    Burhans, R. W.

    1976-01-01

    A problem with the Omega system is a lack of suitable low cost hardware for the small user community. A collection of do it yourself circuit modules are under development intended for use by educational institutions, small boat owners, aviation enthusiasts, and others who have some skills in fabricating their own electronic equipment. Applications of the hardware to time frequency standards measurements, signal propagation monitoring, and navigation experiments are presented. A family of Mini-O systems have been constructed varying from the simplest RF preamplifiers and narrowband filters front-ends, to sophisticated microcomputer interface adapters.

  14. Hardware-assisted software clock synchronization for homogeneous distributed systems

    Science.gov (United States)

    Ramanathan, P.; Kandlur, Dilip D.; Shin, Kang G.

    1990-01-01

    A clock synchronization scheme that strikes a balance between hardware and software solutions is proposed. The proposed is a software algorithm that uses minimal additional hardware to achieve reasonably tight synchronization. Unlike other software solutions, the guaranteed worst-case skews can be made insensitive to the maximum variation of message transit delay in the system. The scheme is particularly suitable for large partially connected distributed systems with topologies that support simple point-to-point broadcast algorithms. Examples of such topologies include the hypercube and the mesh interconnection structures.

  15. Surface moisture measurement system hardware acceptance test report

    Energy Technology Data Exchange (ETDEWEB)

    Ritter, G.A., Westinghouse Hanford

    1996-05-28

    This document summarizes the results of the hardware acceptance test for the Surface Moisture Measurement System (SMMS). This test verified that the mechanical and electrical features of the SMMS functioned as designed and that the unit is ready for field service. The bulk of hardware testing was performed at the 306E Facility in the 300 Area and the Fuels and Materials Examination Facility in the 400 Area. The SMMS was developed primarily in support of Tank Waste Remediation System (TWRS) Safety Programs for moisture measurement in organic and ferrocyanide watch list tanks.

  16. Automated power distribution system hardware. [for space station power supplies

    Science.gov (United States)

    Anderson, Paul M.; Martin, James A.; Thomason, Cindy

    1989-01-01

    An automated power distribution system testbed for the space station common modules has been developed. It incorporates automated control and monitoring of a utility-type power system. Automated power system switchgear, control and sensor hardware requirements, hardware design, test results, and potential applications are discussed. The system is designed so that the automated control and monitoring of the power system is compatible with both a 208-V, 20-kHz single-phase AC system and a high-voltage (120 to 150 V) DC system.

  17. Integrated circuit authentication hardware Trojans and counterfeit detection

    CERN Document Server

    Tehranipoor, Mohammad; Zhang, Xuehui

    2013-01-01

    This book describes techniques to verify the authenticity of integrated circuits (ICs). It focuses on hardware Trojan detection and prevention and counterfeit detection and prevention. The authors discuss a variety of detection schemes and design methodologies for improving Trojan detection techniques, as well as various attempts at developing hardware Trojans in IP cores and ICs. While describing existing Trojan detection methods, the authors also analyze their effectiveness in disclosing various types of Trojans, and demonstrate several architecture-level solutions. 

  18. Computer organization and design the hardware/software interface

    CERN Document Server

    Hennessy, John L

    1994-01-01

    Computer Organization and Design: The Hardware/Software Interface presents the interaction between hardware and software at a variety of levels, which offers a framework for understanding the fundamentals of computing. This book focuses on the concepts that are the basis for computers.Organized into nine chapters, this book begins with an overview of the computer revolution. This text then explains the concepts and algorithms used in modern computer arithmetic. Other chapters consider the abstractions and concepts in memory hierarchies by starting with the simplest possible cache. This book di

  19. Hardware Design for a Smart Lock System for Home Automation

    OpenAIRE

    Javierre, Sergio

    2016-01-01

    Developing a system that can be controlled by a portable device and easily implemented on any door is the main goal of the Smart Lock System. Its purpose is to avoid the usage of a hardware key; the new key will be an Android app in the mobile device which provides security to the user and to the specific area due to the fact that only restricted personnel is permitted access in this area. The design of the embedded system and its implementation, focusing on the system hardware part, are t...

  20. Electrical, electronics, and digital hardware essentials for scientists and engineers

    CERN Document Server

    Lipiansky, Ed

    2012-01-01

    A practical guide for solving real-world circuit board problems Electrical, Electronics, and Digital Hardware Essentials for Scientists and Engineers arms engineers with the tools they need to test, evaluate, and solve circuit board problems. It explores a wide range of circuit analysis topics, supplementing the material with detailed circuit examples and extensive illustrations. The pros and cons of various methods of analysis, fundamental applications of electronic hardware, and issues in logic design are also thoroughly examined. The author draws on more than tw

  1. Laser Light Scattering, from an Advanced Technology Development Program to Experiments in a Reduced Gravity Environment

    Science.gov (United States)

    Meyer, William V.; Tscharnuter, Walther W.; Macgregor, Andrew D.; Dautet, Henri; Deschamps, Pierre; Boucher, Francois; Zuh, Jixiang; Tin, Padetha; Rogers, Richard B.; Ansari, Rafat R.

    1994-01-01

    Recent advancements in laser light scattering hardware are described. These include intelligent single card correlators; active quench/active reset avalanche photodiodes; laser diodes; and fiber optics which were used by or developed for a NASA advanced technology development program. A space shuttle experiment which will employ aspects of these hardware developments is previewed.

  2. Validation test of advanced technology for IPV nickel-hydrogen flight cells - Update

    Science.gov (United States)

    Smithrick, John J.; Hall, Stephen W.

    1992-01-01

    Individual pressure vessel (IPV) nickel-hydrogen technology was advanced at NASA Lewis and under Lewis contracts with the intention of improving cycle life and performance. One advancement was to use 26 percent potassium hydroxide (KOH) electrolyte to improve cycle life. Another advancement was to modify the state-of-the-art cell design to eliminate identified failure modes. The modified design is referred to as the advanced design. A breakthrough in the LEO cycle life of IPV nickel-hydrogen cells has been previously reported. The cycle life of boiler plate cells containing 26 percent KOH electrolyte was about 40,000 LEO cycles compared to 3,500 cycles for cells containing 31 percent KOH. The boiler plate test results are in the process of being validated using flight hardware and real time LEO testing. The primary function of the advanced cell is to store and deliver energy for long-term, LEO spacecraft missions. The new features of this design are: (1) use of 26 percent rather than 31 percent KOH electrolyte; (2) use of a patented catalyzed wall wick; (3) use of serrated-edge separators to facilitate gaseous oxygen and hydrogen flow within the cell, while still maintaining physical contact with the wall wick for electrolyte management; and (4) use of a floating rather than a fixed stack (state-of-the-art) to accommodate nickel electrode expansion due to charge/discharge cycling. The significant improvements resulting from these innovations are: extended cycle life; enhanced thermal, electrolyte, and oxygen management; and accommodation of nickel electrode expansion.

  3. Three-Dimensional Modeling of the Detonation of a Munitions Stack and the Loading on an Adjacent Stack Protected by a Water Barricade

    National Research Council Canada - National Science Library

    Lottero, Richard

    2001-01-01

    This report describes the results of three-dimensional (3-D) hydrocode computations modeling the detonation of a donor munitions stack and the loading on and response of a protective water barricade and a nearby acceptor munitions stack...

  4. Optical Multiple Access Network (OMAN) for advanced processing satellite applications

    Science.gov (United States)

    Mendez, Antonio J.; Gagliardi, Robert M.; Park, Eugene; Ivancic, William D.; Sherman, Bradley D.

    1991-01-01

    An OMAN breadboard for exploring advanced processing satellite circuit switch applications is introduced. Network architecture, hardware trade offs, and multiple user interference issues are presented. The breadboard test set up and experimental results are discussed.

  5. Generalized diffraction-stack migration and filtering of coherent noise

    KAUST Repository

    Zhan, Ge

    2014-01-27

    We reformulate the equation of reverse-time migration so that it can be interpreted as summing data along a series of hyperbola-like curves, each one representing a different type of event such as a reflection or multiple. This is a generalization of the familiar diffraction-stack migration algorithm where the migration image at a point is computed by the sum of trace amplitudes along an appropriate hyperbola-like curve. Instead of summing along the curve associated with the primary reflection, the sum is over all scattering events and so this method is named generalized diffraction-stack migration. This formulation leads to filters that can be applied to the generalized diffraction-stack migration operator to mitigate coherent migration artefacts due to, e.g., crosstalk and aliasing. Results with both synthetic and field data show that generalized diffraction-stack migration images have fewer artefacts than those computed by the standard reverse-time migration algorithm. The main drawback is that generalized diffraction-stack migration is much more memory intensive and I/O limited than the standard reverse-time migration method. © 2014 European Association of Geoscientists & Engineers.

  6. Effect of flow parameters on flare stack generator noise

    International Nuclear Information System (INIS)

    Dinn, T.S.

    1998-01-01

    The SoundPLAN Computer Noise Model was used to determine the general effect of flare noise in a community adjacent to a petrochemical plant. Tests were conducted to determine the effect of process flow conditions and the pulsating flame on the flare stack generator noise from both a refinery flare and process flare. Flaring under normal plant operations, the flaring of fuel gas and the flaring of hydrogen were the three conditions that were tested. It was shown that the steam flow rate was the determining factor in the flare stack generated noise. Variations in the water seal level in the flare line surge tank increased or decreased the gas flowrate, which resulted in a pulsating flame. The period and amplitude of the pulsating noise from the flare stacks was determined by measuring several parameters. Flare stack noise oscillations were found to be greater for the process flare than for the refinery flare stack. It was suggested that minimizing the amount of steam fed to the flare and improving the burner design would minimize noise. 2 tabs., 6 figs

  7. Estimation of stacking fault and twin energies in transition metals

    International Nuclear Information System (INIS)

    Papon, Anne-Marie

    1979-01-01

    As twins and stacking faults play an important role in the plastic deformation of metals, the objective of this research thesis is, by using an as correct as possible description of band d state density, to assess the internal energy of twins and stacking faults in metals with a CFC, HC or CC crystal structure. If, in transition metals, cohesion mainly results from d electron attraction, other terms intervening in crystal equilibrium must also be taken into account. Thus, the author proposes a decomposition of cohesion energy. The geometry of twins and stacking faults in compact phases is defined, and energy calculations are presented and discussed. Alloying effects are then addressed, as well as a general comparison with available experimental results. After a geometric description of twins and stacking faults in CC structures, their energies are calculated for a Gaussian distribution of state density. For higher order moments, defect energy due to d orbital anisotropy is assessed, and then applied to energy and stability calculations in twins and stacking faults for various relaxed atomic configurations

  8. Implementation of a Hardware-in-the-Loop System Using Scale Model Hardware for Hybrid Electric Vehicle Development

    OpenAIRE

    Janczak, John

    2007-01-01

    Hardware-in-a-loop (HIL) testing and simulation for components and control strategies can reduce both time and cost of development. HIL testing focuses on one component or control system rather than the entire vehicle. The rest of the system is simulated by computer systems which use real time data acquisition systems to read outputs and respond like the systems in the actual vehicle would respond. The hardware for the system is on a scaled-down level to save both time and money during tes...

  9. Hardware realization of an SVM algorithm implemented in FPGAs

    Science.gov (United States)

    Wiśniewski, Remigiusz; Bazydło, Grzegorz; Szcześniak, Paweł

    2017-08-01

    The paper proposes a technique of hardware realization of a space vector modulation (SVM) of state function switching in matrix converter (MC), oriented on the implementation in a single field programmable gate array (FPGA). In MC the SVM method is based on the instantaneous space-vector representation of input currents and output voltages. The traditional computation algorithms usually involve digital signal processors (DSPs) which consumes the large number of power transistors (18 transistors and 18 independent PWM outputs) and "non-standard positions of control pulses" during the switching sequence. Recently, hardware implementations become popular since computed operations may be executed much faster and efficient due to nature of the digital devices (especially concurrency). In the paper, we propose a hardware algorithm of SVM computation. In opposite to the existing techniques, the presented solution applies COordinate Rotation DIgital Computer (CORDIC) method to solve the trigonometric operations. Furthermore, adequate arithmetic modules (that is, sub-devices) used for intermediate calculations, such as code converters or proper sectors selectors (for output voltages and input current) are presented in detail. The proposed technique has been implemented as a design described with the use of Verilog hardware description language. The preliminary results of logic implementation oriented on the Xilinx FPGA (particularly, low-cost device from Artix-7 family from Xilinx was used) are also presented.

  10. Improving Reliability, Security, and Efficiency of Reconfigurable Hardware Systems (Habilitation)

    NARCIS (Netherlands)

    Ziener, Daniel

    2017-01-01

    In this treatise,  my research on methods to improve efficiency, reliability, and security of reconfigurable hardware systems, i.e., FPGAs, through partial dynamic reconfiguration is outlined. The efficiency of reconfigurable systems can be improved by loading optimized data paths on-the-fly on an

  11. A Hardware Framework for on-Chip FPGA Acceleration

    DEFF Research Database (Denmark)

    Lomuscio, Andrea; Cardarilli, Gian Carlo; Nannarelli, Alberto

    2016-01-01

    In this work, we present a new framework to dynamically load hardware accelerators on reconfigurable platforms (FPGAs). Provided a library of application-specific processors, we load on-the-fly the specific processor in the FPGA, and we transfer the execution from the CPU to the FPGA...

  12. TreeBASIS Feature Descriptor and Its Hardware Implementation

    Directory of Open Access Journals (Sweden)

    Spencer Fowers

    2014-01-01

    Full Text Available This paper presents a novel feature descriptor called TreeBASIS that provides improvements in descriptor size, computation time, matching speed, and accuracy. This new descriptor uses a binary vocabulary tree that is computed using basis dictionary images and a test set of feature region images. To facilitate real-time implementation, a feature region image is binary quantized and the resulting quantized vector is passed into the BASIS vocabulary tree. A Hamming distance is then computed between the feature region image and the effectively descriptive basis dictionary image at a node to determine the branch taken and the path the feature region image takes is saved as a descriptor. The TreeBASIS feature descriptor is an excellent candidate for hardware implementation because of its reduced descriptor size and the fact that descriptors can be created and features matched without the use of floating point operations. The TreeBASIS descriptor is more computationally and space efficient than other descriptors such as BASIS, SIFT, and SURF. Moreover, it can be computed entirely in hardware without the support of a CPU for additional software-based computations. Experimental results and a hardware implementation show that the TreeBASIS descriptor compares well with other descriptors for frame-to-frame homography computation while requiring fewer hardware resources.

  13. Chip-Multiprocessor Hardware Locks for Safety-Critical Java

    DEFF Research Database (Denmark)

    Strøm, Torur Biskopstø; Puffitsch, Wolfgang; Schoeberl, Martin

    2013-01-01

    and may void a task set's schedulability. In this paper we present a hardware locking mechanism to reduce the synchronization overhead. The solution is implemented for the chip-multiprocessor version of the Java Optimized Processor in the context of safety-critical Java. The implementation is compared...

  14. Hardware Algorithms For Tile-Based Real-Time Rendering

    NARCIS (Netherlands)

    Crisu, D.

    2012-01-01

    In this dissertation, we present the GRAphics AcceLerator (GRAAL) framework for developing embedded tile-based rasterization hardware for mobile devices, meant to accelerate real-time 3-D graphics (OpenGL compliant) applications. The goal of the framework is a low-cost, low-power, high-performance

  15. Detecting System of Nested Hardware Virtual Machine Monitor

    Directory of Open Access Journals (Sweden)

    Artem Vladimirovich Iuzbashev

    2015-03-01

    Full Text Available Method of nested hardware virtual machine monitor detection was proposed in this work. The method is based on HVM timing attack. In case of HVM presence in system, the number of different instruction sequences execution time values will increase. We used this property as indicator in our detection.

  16. Hardware support for the tumult real-time scheduler

    NARCIS (Netherlands)

    van der Bij, H.C.; Smit, Gerardus Johannes Maria; Havinga, Paul J.M.

    1989-01-01

    This article describes the hardware which is designed for speeding up and supporting the schedule routines of the TUMULT multi-tasking operating system. TUMULT uses a “priority running up” schedule algorithm which automatically increases the priority of a process when (part of) it must be finished

  17. A selective logging mechanism for hardware transactional memory systems

    OpenAIRE

    Lupon Navazo, Marc; Magklis, Grigorios; González Colás, Antonio María

    2011-01-01

    Log-based Hardware Transactional Memory (HTM) systems offer an elegant solution to handle speculative data that overflow transactional L1 caches. By keeping the pre-transactional values on a software-resident log, speculative values can be safely moved across the memory hierarchy, without requiring expensive searches on L1 misses or commits.

  18. Towards Shop Floor Hardware Reconfiguration for Industrial Collaborative Robots

    DEFF Research Database (Denmark)

    Schou, Casper; Madsen, Ole

    2016-01-01

    In this paper we propose a roadmap for hardware reconfiguration of industrial collaborative robots. As a flexible resource, the collaborative robot will often need transitioning to a new task. Our goal is, that this transitioning should be done by the shop floor operators, not highly specialized ...

  19. Efficient Architecture for Spike Sorting in Reconfigurable Hardware

    Science.gov (United States)

    Hwang, Wen-Jyi; Lee, Wei-Hao; Lin, Shiow-Jyu; Lai, Sheng-Ying

    2013-01-01

    This paper presents a novel hardware architecture for fast spike sorting. The architecture is able to perform both the feature extraction and clustering in hardware. The generalized Hebbian algorithm (GHA) and fuzzy C-means (FCM) algorithm are used for feature extraction and clustering, respectively. The employment of GHA allows efficient computation of principal components for subsequent clustering operations. The FCM is able to achieve near optimal clustering for spike sorting. Its performance is insensitive to the selection of initial cluster centers. The hardware implementations of GHA and FCM feature low area costs and high throughput. In the GHA architecture, the computation of different weight vectors share the same circuit for lowering the area costs. Moreover, in the FCM hardware implementation, the usual iterative operations for updating the membership matrix and cluster centroid are merged into one single updating process to evade the large storage requirement. To show the effectiveness of the circuit, the proposed architecture is physically implemented by field programmable gate array (FPGA). It is embedded in a System-on-Chip (SOC) platform for performance measurement. Experimental results show that the proposed architecture is an efficient spike sorting design for attaining high classification correct rate and high speed computation. PMID:24189331

  20. Hardware Design Considerations for Edge-Accelerated Stereo Correspondence Algorithms

    Directory of Open Access Journals (Sweden)

    Christos Ttofis

    2012-01-01

    Full Text Available Stereo correspondence is a popular algorithm for the extraction of depth information from a pair of rectified 2D images. Hence, it has been used in many computer vision applications that require knowledge about depth. However, stereo correspondence is a computationally intensive algorithm and requires high-end hardware resources in order to achieve real-time processing speed in embedded computer vision systems. This paper presents an overview of the use of edge information as a means to accelerate hardware implementations of stereo correspondence algorithms. The presented approach restricts the stereo correspondence algorithm only to the edges of the input images rather than to all image points, thus resulting in a considerable reduction of the search space. The paper highlights the benefits of the edge-directed approach by applying it to two stereo correspondence algorithms: an SAD-based fixed-support algorithm and a more complex adaptive support weight algorithm. Furthermore, we present design considerations about the implementation of these algorithms on reconfigurable hardware and also discuss issues related to the memory structures needed, the amount of parallelism that can be exploited, the organization of the processing blocks, and so forth. The two architectures (fixed-support based versus adaptive-support weight based are compared in terms of processing speed, disparity map accuracy, and hardware overheads, when both are implemented on a Virtex-5 FPGA platform.

  1. Efficient Architecture for Spike Sorting in Reconfigurable Hardware

    Directory of Open Access Journals (Sweden)

    Sheng-Ying Lai

    2013-11-01

    Full Text Available This paper presents a novel hardware architecture for fast spike sorting. The architecture is able to perform both the feature extraction and clustering in hardware. The generalized Hebbian algorithm (GHA and fuzzy C-means (FCM algorithm are used for feature extraction and clustering, respectively. The employment of GHA allows efficient computation of principal components for subsequent clustering operations. The FCM is able to achieve near optimal clustering for spike sorting. Its performance is insensitive to the selection of initial cluster centers. The hardware implementations of GHA and FCM feature low area costs and high throughput. In the GHA architecture, the computation of different weight vectors share the same circuit for lowering the area costs. Moreover, in the FCM hardware implementation, the usual iterative operations for updating the membership matrix and cluster centroid are merged into one single updating process to evade the large storage requirement. To show the effectiveness of the circuit, the proposed architecture is physically implemented by field programmable gate array (FPGA. It is embedded in a System-on-Chip (SOC platform for performance measurement. Experimental results show that the proposed architecture is an efficient spike sorting design for attaining high classification correct rate and high speed computation.

  2. CT image reconstruction system based on hardware implementation

    International Nuclear Information System (INIS)

    Silva, Hamilton P. da; Evseev, Ivan; Schelin, Hugo R.; Paschuk, Sergei A.; Milhoretto, Edney; Setti, Joao A.P.; Zibetti, Marcelo; Hormaza, Joel M.; Lopes, Ricardo T.

    2009-01-01

    Full text: The timing factor is very important for medical imaging systems, which can nowadays be synchronized by vital human signals, like heartbeats or breath. The use of hardware implemented devices in such a system has advantages considering the high speed of information treatment combined with arbitrary low cost on the market. This article refers to a hardware system which is based on electronic programmable logic called FPGA, model Cyclone II from ALTERA Corporation. The hardware was implemented on the UP3 ALTERA Kit. A partially connected neural network with unitary weights was programmed. The system was tested with 60 topographic projections, 100 points in each, of the Shepp and Logan phantom created by MATLAB. The main restriction was found to be the memory size available on the device: the dynamic range of reconstructed image was limited to 0 65535. Also, the normalization factor must be observed in order to do not saturate the image during the reconstruction and filtering process. The test shows a principal possibility to build CT image reconstruction systems for any reasonable amount of input data by arranging the parallel work of the hardware units like we have tested. However, further studies are necessary for better understanding of the error propagation from topographic projections to reconstructed image within the implemented method. (author)

  3. Hardware prototype with component specification and usage description

    NARCIS (Netherlands)

    Azam, Tre; Aswat, Soyeb; Klemke, Roland; Sharma, Puneet; Wild, Fridolin

    2017-01-01

    Following on from D3.1 and the final selection of sensors, in this D3.2 report we present the first version of the experience capturing hardware prototype design and API architecture taking into account the current limitations of the Hololens not being available until early next month in time for

  4. Hardware Synchronization for Embedded Multi-Core Processors

    DEFF Research Database (Denmark)

    Stoif, Christian; Schoeberl, Martin; Liccardi, Benito

    2011-01-01

    -core systems, using an FPGA-development board with two hard PowerPC processor cores. Best- and worst-case results, together with intensive benchmarking of all synchronization primitives implemented, show the expected superiority of the hardware solutions. It is also shown that dual-ported memory outperforms...

  5. Evaluation of In-House versus Contract Computer Hardware Maintenance

    International Nuclear Information System (INIS)

    Wright, H.P.

    1981-09-01

    The issue of In-House versus Contract Computer Hardware Maintenance is one which every organization who uses computers must resolve. This report discusses the advantages and disadvantages of both approaches to computer maintenance, the costs involved (based on the current AGNS computer inventory), and the AGNS maintenance experience to date. A recommendation on an appropriate approach for AGNS is made

  6. Use of Heritage Hardware on MPCV Exploration Flight Test One

    Science.gov (United States)

    Rains, George Edward; Cross, Cynthia D.

    2011-01-01

    Due to an aggressive schedule for the first orbital test flight of an unmanned Orion capsule, known as Exploration Flight Test One (EFT1), combined with severe programmatic funding constraints, an effort was made to identify heritage hardware, i.e., already existing, flight-certified components from previous manned space programs, which might be available for use on EFT1. With the end of the Space Shuttle Program, no current means exists to launch Multi Purpose Logistics Modules (MPLMs) to the International Space Station (ISS), and so the inventory of many flight-certified Shuttle and MPLM components are available for other purposes. Two of these items are the Shuttle Ground Support Equipment Heat Exchanger (GSE Hx) and the MPLM cabin Positive Pressure Relief Assembly (PPRA). In preparation for the utilization of these components by the Orion Program, analyses and testing of the hardware were performed. The PPRA had to be analyzed to determine its susceptibility to pyrotechnic shock, and vibration testing had to be performed, since those environments are predicted to be significantly more severe during an Orion mission than those the hardware was originally designed to accommodate. The GSE Hx had to be tested for performance with the Orion thermal working fluids, which are different from those used by the Space Shuttle. This paper summarizes the certification of the use of heritage hardware for EFT1.

  7. Choropleth Mapping on Personal Computers: Software Sources and Hardware Requirements.

    Science.gov (United States)

    Lewis, Lawrence T.

    1986-01-01

    Describes the hardware and some of the choropleth mapping software available for the IBM-PC, PC compatible and Apple II microcomputers. Reviewed are: Micromap II, Documap, Desktop Information Display System (DIDS) , Multimap, Execuvision, Iris Gis, Mapmaker, PC Map, Statmap, and Atlas Map. Vendors' addresses are provided. (JDH)

  8. Hardware methods in cosmetology. Programs of face care

    OpenAIRE

    Chuhraev, N.; Zukow, W.; Samosiuk, N.; Chuhraeva, E.; Tereshchenko, A.; Gunko, M.; Unichenko, A.; Paramonova, A.

    2016-01-01

    Medical Innovative Technologies, Kiev, Ukraine Radomska Szkoła Wyższa w Radomiu, Polska Radom University in Radom, Poland HARDWARE METHODS IN COSMETOLOGY PROGRAMS OF FACE CARE N. Chuhraev, W. Zukow, N. Samosiuk, E. Chuhraeva, A. Tereshchenko, M. Gunko, A. Unichenko, A. Paramonova Edited by N. Chuhraev W. Zukow N. Samosiuk E. Chuhraeva A. Tereshchenko M. Gunko A. Unichenko A. Paramonov...

  9. Parallel asynchronous hardware implementation of image processing algorithms

    Science.gov (United States)

    Coon, Darryl D.; Perera, A. G. U.

    1990-01-01

    Research is being carried out on hardware for a new approach to focal plane processing. The hardware involves silicon injection mode devices. These devices provide a natural basis for parallel asynchronous focal plane image preprocessing. The simplicity and novel properties of the devices would permit an independent analog processing channel to be dedicated to every pixel. A laminar architecture built from arrays of the devices would form a two-dimensional (2-D) array processor with a 2-D array of inputs located directly behind a focal plane detector array. A 2-D image data stream would propagate in neuron-like asynchronous pulse-coded form through the laminar processor. No multiplexing, digitization, or serial processing would occur in the preprocessing state. High performance is expected, based on pulse coding of input currents down to one picoampere with noise referred to input of about 10 femtoamperes. Linear pulse coding has been observed for input currents ranging up to seven orders of magnitude. Low power requirements suggest utility in space and in conjunction with very large arrays. Very low dark current and multispectral capability are possible because of hardware compatibility with the cryogenic environment of high performance detector arrays. The aforementioned hardware development effort is aimed at systems which would integrate image acquisition and image processing.

  10. Hardware Approach for Real Time Machine Stereo Vision

    Directory of Open Access Journals (Sweden)

    Michael Tornow

    2006-02-01

    Full Text Available Image processing is an effective tool for the analysis of optical sensor information for driver assistance systems and controlling of autonomous robots. Algorithms for image processing are often very complex and costly in terms of computation. In robotics and driver assistance systems, real-time processing is necessary. Signal processing algorithms must often be drastically modified so they can be implemented in the hardware. This task is especially difficult for continuous real-time processing at high speeds. This article describes a hardware-software co-design for a multi-object position sensor based on a stereophotogrammetric measuring method. In order to cover a large measuring area, an optimized algorithm based on an image pyramid is implemented in an FPGA as a parallel hardware solution for depth map calculation. Object recognition and tracking are then executed in real-time in a processor with help of software. For this task a statistical cluster method is used. Stabilization of the tracking is realized through use of a Kalman filter. Keywords: stereophotogrammetry, hardware-software co-design, FPGA, 3-d image analysis, real-time, clustering and tracking.

  11. Tomographic image reconstruction and rendering with texture-mapping hardware

    International Nuclear Information System (INIS)

    Azevedo, S.G.; Cabral, B.K.; Foran, J.

    1994-07-01

    The image reconstruction problem, also known as the inverse Radon transform, for x-ray computed tomography (CT) is found in numerous applications in medicine and industry. The most common algorithm used in these cases is filtered backprojection (FBP), which, while a simple procedure, is time-consuming for large images on any type of computational engine. Specially-designed, dedicated parallel processors are commonly used in medical CT scanners, whose results are then passed to graphics workstation for rendering and analysis. However, a fast direct FBP algorithm can be implemented on modern texture-mapping hardware in current high-end workstation platforms. This is done by casting the FBP algorithm as an image warping operation with summing. Texture-mapping hardware, such as that on the Silicon Graphics Reality Engine (TM), shows around 600 times speedup of backprojection over a CPU-based implementation (a 100 Mhz R4400 in this case). This technique has the further advantages of flexibility and rapid programming. In addition, the same hardware can be used for both image reconstruction and for volumetric rendering. The techniques can also be used to accelerate iterative reconstruction algorithms. The hardware architecture also allows more complex operations than straight-ray backprojection if they are required, including fan-beam, cone-beam, and curved ray paths, with little or no speed penalties

  12. Towards automated construction of dependable software/hardware systems

    Energy Technology Data Exchange (ETDEWEB)

    Yakhnis, A.; Yakhnis, V. [Pioneer Technologies & Rockwell Science Center, Albuquerque, NM (United States)

    1997-11-01

    This report contains viewgraphs on the automated construction of dependable computer architecture systems. The outline of this report is: examples of software/hardware systems; dependable systems; partial delivery of dependability; proposed approach; removing obstacles; advantages of the approach; criteria for success; current progress of the approach; and references.

  13. Smart Home Hardware-in-the-Loop Testing

    Energy Technology Data Exchange (ETDEWEB)

    Pratt, Annabelle

    2017-07-12

    This presentation provides a high-level overview of NREL's smart home hardware-in-the-loop testing. It was presented at the Fourth International Workshop on Grid Simulator Testing of Energy Systems and Wind Turbine Powertrains, held April 25-26, 2017, hosted by NREL and Clemson University at the Energy Systems Integration Facility in Golden, Colorado.

  14. Hardware availability calculations and results of the IFMIF accelerator facility

    Energy Technology Data Exchange (ETDEWEB)

    Bargalló, Enric, E-mail: enric.bargallo-font@upc.edu [Fusion Energy Engineering Laboratory (FEEL), Technical University of Catalonia (UPC), Barcelona (Spain); Arroyo, Jose Manuel [Laboratorio Nacional de Fusión por Confinamiento Magnético – CIEMAT, Madrid (Spain); Abal, Javier [Fusion Energy Engineering Laboratory (FEEL), Technical University of Catalonia (UPC), Barcelona (Spain); Beauvais, Pierre-Yves; Gobin, Raphael; Orsini, Fabienne [Commissariat à l’Energie Atomique, Saclay (France); Weber, Moisés; Podadera, Ivan [Laboratorio Nacional de Fusión por Confinamiento Magnético – CIEMAT, Madrid (Spain); Grespan, Francesco; Fagotti, Enrico [Istituto Nazionale di Fisica Nucleare, Legnaro (Italy); De Blas, Alfredo; Dies, Javier; Tapia, Carlos [Fusion Energy Engineering Laboratory (FEEL), Technical University of Catalonia (UPC), Barcelona (Spain); Mollá, Joaquín; Ibarra, Ángel [Laboratorio Nacional de Fusión por Confinamiento Magnético – CIEMAT, Madrid (Spain)

    2014-10-15

    Highlights: • IFMIF accelerator facility hardware availability analyses methodology is described. • Results of the individual hardware availability analyses are shown for the reference design. • Accelerator design improvements are proposed for each system. • Availability results are evaluated and compared with the requirements. - Abstract: Hardware availability calculations have been done individually for each system of the deuteron accelerators of the International Fusion Materials Irradiation Facility (IFMIF). The principal goal of these analyses is to estimate the availability of the systems, compare it with the challenging IFMIF requirements and find new paths to improve availability performances. Major unavailability contributors are highlighted and possible design changes are proposed in order to achieve the hardware availability requirements established for each system. In this paper, such possible improvements are implemented in fault tree models and the availability results are evaluated. The parallel activity on the design and construction of the linear IFMIF prototype accelerator (LIPAc) provides detailed design information for the RAMI (reliability, availability, maintainability and inspectability) analyses and allows finding out the improvements that the final accelerator could have. Because of the R and D behavior of the LIPAc, RAMI improvements could be the major differences between the prototype and the IFMIF accelerator design.

  15. Detection of hardware backdoor through microcontroller read time ...

    African Journals Online (AJOL)

    The objective of this work, christened “HABA” (Hardware Backdoor Aware) is to collect data samples of series of read time of microcontroller embedded on military grade equipments and correlate it with previously stored expected behavior read time samples so as to detect abnormality or otherwise. I was motivated by the ...

  16. Improvement of nuclear ship engineering simulation system. Hardware renewal and interface improvement of the integral type reactor

    Energy Technology Data Exchange (ETDEWEB)

    Takahashi, Hiroki; Kyoya, Masahiko; Shimazaki, Junya [Japan Atomic Energy Research Inst., Tokai, Ibaraki (Japan). Tokai Research Establishment; Kano, Tadashi [KCS, Co., Mito, Ibaraki (Japan); Takahashi, Teruo [Energis, Co., Kobe, Hyogo (Japan)

    2001-10-01

    JAERI had carried out the design study about a lightweight and compact integral type reactor (an advanced marine reactor) with passive safety equipment as a power source for the future nuclear ships, and completed an engineering design. We have developed the simulator for the integral type reactor to confirm the design and operation performance and to utilize the study of automation of the reactor operation. The simulator can be used also for future research and development of a compact reactor. However, the improvement in a performance of hardware and a human machine interface of software of the simulator were needed for future research and development. Therefore, renewal of hardware and improvement of software have been conducted. The operability of the integral-reactor simulator has been improved. Furthermore, this improvement with the hardware and software on the market brought about better versatility, maintainability, extendibility and transfer of the system. This report mainly focuses on contents of the enhancement in a human machine interface, and describes hardware renewal and the interface improvement of the integral type reactor simulator. (author)

  17. Flight Hardware Packaging Design for Stringent EMC Radiated Emission Requirements

    Science.gov (United States)

    Lortz, Charlene L.; Huang, Chi-Chien N.; Ravich, Joshua A.; Steiner, Carl N.

    2013-01-01

    This packaging design approach can help heritage hardware meet a flight project's stringent EMC radiated emissions requirement. The approach requires only minor modifications to a hardware's chassis and mainly concentrates on its connector interfaces. The solution is to raise the surface area where the connector is mounted by a few millimeters using a pedestal, and then wrapping with conductive tape from the cable backshell down to the surface-mounted connector. This design approach has been applied to JPL flight project subsystems. The EMC radiated emissions requirements for flight projects can vary from benign to mission critical. If the project's EMC requirements are stringent, the best approach to meet EMC requirements would be to design an EMC control program for the project early on and implement EMC design techniques starting with the circuit board layout. This is the ideal scenario for hardware that is built from scratch. Implementation of EMC radiated emissions mitigation techniques can mature as the design progresses, with minimal impact to the design cycle. The real challenge exists for hardware that is planned to be flown following a built-to-print approach, in which heritage hardware from a past project with a different set of requirements is expected to perform satisfactorily for a new project. With acceptance of heritage, the design would already be established (circuit board layout and components have already been pre-determined), and hence any radiated emissions mitigation techniques would only be applicable at the packaging level. The key is to take a heritage design with its known radiated emissions spectrum and repackage, or modify its chassis design so that it would have a better chance of meeting the new project s radiated emissions requirements.

  18. Communication: Thermodynamics of stacking disorder in ice nuclei

    Science.gov (United States)

    Quigley, D.

    2014-09-01

    A simple Ising-like model for the stacking thermodynamics of ice 1 is constructed for nuclei in supercooled water, and combined with classical nucleation theory. For relative stabilities of cubic and hexagonal ice I within the range of experimental estimates, this predicts critical nuclei are stacking disordered at strong sub-cooling, consistent with recent experiments. At higher temperatures nucleation of pure hexagonal ice is recovered. Lattice-switching Monte-Carlo is applied to accurately compute the relative stability of cubic and hexagonal ice for the popular mW model of water. Results demonstrate that this model fails to adequately capture the relative energetics of the two polytypes, leading to stacking disorder at all temperatures.

  19. Reliability assessment of germanium gate stacks with promising initial characteristics

    Science.gov (United States)

    Lu, Cimang; Lee, Choong Hyun; Nishimura, Tomonori; Nagashio, Kosuke; Toriumi, Akira

    2015-02-01

    This work reports on the reliability assessment of germanium (Ge) gate stacks with promising initial electrical properties, with focus on trap generation under a constant electric stress field (Estress). Initial Ge gate stack properties do not necessarily mean highly robust reliability when it is considered that traps are newly generated under high Estress. A small amount of yttrium- or scandium oxide-doped GeO2 (Y-GeO2 or Sc-GeO2, respectively) significantly reduces trap generation in Ge gate stacks without deterioration of the interface. This is explained by the increase in the average coordination number (Nav) of the modified GeO2 network that results from the doping.

  20. Edge-edge interactions in stacked graphene nanoplatelets

    Energy Technology Data Exchange (ETDEWEB)

    Cruz Silva, Eduardo [ORNL; Terrones Maldonado, Humberto [ORNL; Terrones Maldonado, Mauricio [ORNL; Jia, Xiaoting [Massachusetts Institute of Technology (MIT); Sumpter, Bobby G [ORNL; Dresselhaus, M [Massachusetts Institute of Technology (MIT); Meunier, V. [Rensselaer Polytechnic Institute (RPI)

    2013-01-01

    High-resolution transmission electron microscopy (HRTEM) studies show the dynamics of small graphene platelets on larger graphene layers. The platelets move nearly freely to eventually lock in at well-defined positions close to the edges of the larger underlying graphene sheet. While such movement is driven by a shallow potential energy surface described by an interplane interaction, the lock-in position occurs by via edge-edge interactions of the platelet and the graphene surface located underneath. Here we quantitatively study this behavior using van der Waals density functional calculations. Local interactions at the open edges are found to dictate stacking configurations that are different from Bernal (AB) stacking. These stacking configurations are known to be otherwise absent in edge-free two-dimensional (2D) graphene. The results explain the experimentally observed platelet dynamics and provide a detailed account of the new electronic properties of these combined systems.