WorldWideScience

Sample records for advanced stack hardware

  1. Hardware Evaluation of the Horizontal Exercise Fixture with Weight Stack

    Science.gov (United States)

    Newby, Nate; Leach, Mark; Fincke, Renita; Sharp, Carwyn

    2009-01-01

    HEF with weight stack seems to be a very sturdy and reliable exercise device that should function well in a bed rest training setting. A few improvements should be made to both the hardware and software to improve usage efficiency, but largely, this evaluation has demonstrated HEF's robustness. The hardware offers loading to muscles, bones, and joints, potentially sufficient to mitigate the loss of muscle mass and bone mineral density during long-duration bed rest campaigns. With some minor modifications, the HEF with weight stack equipment provides the best currently available means of performing squat, heel raise, prone row, bench press, and hip flexion/extension exercise in a supine orientation.

  2. Advanced hardware design for error correcting codes

    CERN Document Server

    Coussy, Philippe

    2015-01-01

    This book provides thorough coverage of error correcting techniques. It includes essential basic concepts and the latest advances on key topics in design, implementation, and optimization of hardware/software systems for error correction. The book’s chapters are written by internationally recognized experts in this field. Topics include evolution of error correction techniques, industrial user needs, architectures, and design approaches for the most advanced error correcting codes (Polar Codes, Non-Binary LDPC, Product Codes, etc). This book provides access to recent results, and is suitable for graduate students and researchers of mathematics, computer science, and engineering. • Examines how to optimize the architecture of hardware design for error correcting codes; • Presents error correction codes from theory to optimized architecture for the current and the next generation standards; • Provides coverage of industrial user needs advanced error correcting techniques.

  3. MRI - From basic knowledge to advanced strategies: Hardware

    International Nuclear Information System (INIS)

    Carpenter, T.A.; Williams, E.J.

    1999-01-01

    There have been remarkable advances in the hardware used for nuclear magnetic resonance imaging scanners. These advances have enabled an extraordinary range of sophisticated magnetic resonance MR sequences to be performed routinely. This paper focuses on the following particular aspects: (a) Magnet system. Advances in magnet technology have allowed superconducting magnets which are low maintenance and have excellent homogeneity and very small stray field footprints. (b) Gradient system. Optimisation of gradient design has allowed gradient coils which provide excellent field for spatial encoding, have reduced diameter and have technology to minimise the effects of eddy currents. These coils can now routinely provide the strength and switching rate required by modern imaging methods. (c) Radio-frequency (RF) system. The advances in digital electronics can now provide RF electronics which have low noise characteristics, high accuracy and improved stability, which are all essential to the formation of excellent images. The use of surface coils has increased with the availability of phased-array systems, which are ideal for spinal work. (d) Computer system. The largest advance in technology has been in the supporting computer hardware which is now affordable, reliable and with performance to match the processing requirements demanded by present imaging sequences. (orig.)

  4. ORELA data acquisition system hardware. Vol. 6. Eight-stage stacking buffer memory (Q-5066)

    International Nuclear Information System (INIS)

    Wintenberg, R.E.; Reynolds, J.W.

    1977-01-01

    A Stacking Buffer Memory for de-randomizing data on high data rate experiments at ORELA is documented by a description of operation, mechanical details of design, and a detailed theory of operation illustrated through six examples of operation

  5. Advances in neuromorphic hardware exploiting emerging nanoscale devices

    CERN Document Server

    2017-01-01

    This book covers all major aspects of cutting-edge research in the field of neuromorphic hardware engineering involving emerging nanoscale devices. Special emphasis is given to leading works in hybrid low-power CMOS-Nanodevice design. The book offers readers a bidirectional (top-down and bottom-up) perspective on designing efficient bio-inspired hardware. At the nanodevice level, it focuses on various flavors of emerging resistive memory (RRAM) technology. At the algorithm level, it addresses optimized implementations of supervised and stochastic learning paradigms such as: spike-time-dependent plasticity (STDP), long-term potentiation (LTP), long-term depression (LTD), extreme learning machines (ELM) and early adoptions of restricted Boltzmann machines (RBM) to name a few. The contributions discuss system-level power/energy/parasitic trade-offs, and complex real-world applications. The book is suited for both advanced researchers and students interested in the field.

  6. Advances in flexible optrode hardware for use in cybernetic insects

    Science.gov (United States)

    Register, Joseph; Callahan, Dennis M.; Segura, Carlos; LeBlanc, John; Lissandrello, Charles; Kumar, Parshant; Salthouse, Christopher; Wheeler, Jesse

    2017-08-01

    Optogenetic manipulation is widely used to selectively excite and silence neurons in laboratory experiments. Recent efforts to miniaturize the components of optogenetic systems have enabled experiments on freely moving animals, but further miniaturization is required for freely flying insects. In particular, miniaturization of high channel-count optical waveguides are needed for high-resolution interfaces. Thin flexible waveguide arrays are needed to bend light around tight turns to access small anatomical targets. We present the design of lightweight miniaturized optogentic hardware and supporting electronics for the untethered steering of dragonfly flight. The system is designed to enable autonomous flight and includes processing, guidance sensors, solar power, and light stimulators. The system will weigh less than 200mg and be worn by the dragonfly as a backpack. The flexible implant has been designed to provide stimuli around nerves through micron scale apertures of adjacent neural tissue without the use of heavy hardware. We address the challenges of lightweight optogenetics and the development of high contrast polymer waveguides for this purpose.

  7. Hardware design for the production of NTD silicon in the Advanced Test Reactor

    International Nuclear Information System (INIS)

    Schell, M.J.

    1984-01-01

    The Advanced Test Reactor (ATR) is a 250-MW(t) materials testing and nuclear research facility operated for EG and G Idaho, Inc. The unique capabilities of the ATR can be readily adapted via hardware to produce large quantitities of large-diameter (20 cm plus) doped silicon crystals. Conservative estimates place the production capability in excess of 15 metric tons per year. The proposed hardware is based upon a closed-loop, hydraulic-shuttle tube system

  8. Test Hardware Design for Flightlike Operation of Advanced Stirling Convertors (ASC-E3)

    Science.gov (United States)

    Oriti, Salvatore M.

    2012-01-01

    NASA Glenn Research Center (GRC) has been supporting development of the Advanced Stirling Radioisotope Generator (ASRG) since 2006. A key element of the ASRG project is providing life, reliability, and performance testing of the Advanced Stirling Convertor (ASC). For this purpose, the Thermal Energy Conversion branch at GRC has been conducting extended operation of a multitude of free-piston Stirling convertors. The goal of this effort is to generate long-term performance data (tens of thousands of hours) simultaneously on multiple units to build a life and reliability database. The test hardware for operation of these convertors was designed to permit in-air investigative testing, such as performance mapping over a range of environmental conditions. With this, there was no requirement to accurately emulate the flight hardware. For the upcoming ASC-E3 units, the decision has been made to assemble the convertors into a flight-like configuration. This means the convertors will be arranged in the dual-opposed configuration in a housing that represents the fit, form, and thermal function of the ASRG. The goal of this effort is to enable system level tests that could not be performed with the traditional test hardware at GRC. This offers the opportunity to perform these system-level tests much earlier in the ASRG flight development, as they would normally not be performed until fabrication of the qualification unit. This paper discusses the requirements, process, and results of this flight-like hardware design activity.

  9. Test Hardware Design for Flight-Like Operation of Advanced Stirling Convertors

    Science.gov (United States)

    Oriti, Salvatore M.

    2012-01-01

    NASA Glenn Research Center (GRC) has been supporting development of the Advanced Stirling Radioisotope Generator (ASRG) since 2006. A key element of the ASRG project is providing life, reliability, and performance testing of the Advanced Stirling Convertor (ASC). For this purpose, the Thermal Energy Conversion branch at GRC has been conducting extended operation of a multitude of free-piston Stirling convertors. The goal of this effort is to generate long-term performance data (tens of thousands of hours) simultaneously on multiple units to build a life and reliability database. The test hardware for operation of these convertors was designed to permit in-air investigative testing, such as performance mapping over a range of environmental conditions. With this, there was no requirement to accurately emulate the flight hardware. For the upcoming ASC-E3 units, the decision has been made to assemble the convertors into a flight-like configuration. This means the convertors will be arranged in the dual-opposed configuration in a housing that represents the fit, form, and thermal function of the ASRG. The goal of this effort is to enable system level tests that could not be performed with the traditional test hardware at GRC. This offers the opportunity to perform these system-level tests much earlier in the ASRG flight development, as they would normally not be performed until fabrication of the qualification unit. This paper discusses the requirements, process, and results of this flight-like hardware design activity.

  10. Interim Service ISDN Satellite (ISIS) hardware experiment development for advanced ISDN satellite designs and experiments

    Science.gov (United States)

    Pepin, Gerard R.

    1992-01-01

    The Interim Service Integrated Service Digital Network (ISDN) Satellite (ISIS) Hardware Experiment Development for Advanced Satellite Designs describes the development of the ISDN Satellite Terminal Adapter (ISTA) capable of translating ISDN protocol traffic into Time Division Multiple Access (TDMA) signals for use by a communications satellite. The ISTA connects the Type 1 Network Termination (NT1) via the U-interface on the line termination side of the CPE to the RS-499 interface for satellite uplink. The same ISTA converts in the opposite direction the RS-499 to U-interface data with a simple switch setting.

  11. Interim Service ISDN Satellite (ISIS) hardware experiment design for advanced ISDN satellite design and experiments

    Science.gov (United States)

    Pepin, Gerard R.

    1992-01-01

    The Interim Service Integrated Services Digital Network (ISDN) Satellite (ISIS) Hardware Experiment Design for Advanced Satellite Designs describes the design of the ISDN Satellite Terminal Adapter (ISTA) capable of translating ISDN protocol traffic into time division multiple access (TDMA) signals for use by a communications satellite. The ISTA connects the Type 1 Network Termination (NT1) via the U-interface on the line termination side of the CPE to the V.35 interface for satellite uplink. The same ISTA converts in the opposite direction the V.35 to U-interface data with a simple switch setting.

  12. Backside versus frontside advanced chemical analysis of high-k/metal gate stacks

    Energy Technology Data Exchange (ETDEWEB)

    Martinez, E., E-mail: eugenie.martinez@cea.fr [Univ Grenoble Alpes, F-38000 Grenoble (France); CEA, LETI, MINATEC Campus, F-38054 Grenoble (France); Saidi, B. [STMicroelectronics, 850 rue Jean Monnet, 38926 Rousset Cedex, Crolles (France); Veillerot, M. [Univ Grenoble Alpes, F-38000 Grenoble (France); CEA, LETI, MINATEC Campus, F-38054 Grenoble (France); Caubet, P. [STMicroelectronics, 850 rue Jean Monnet, 38926 Rousset Cedex, Crolles (France); Fabbri, J-M. [Univ Grenoble Alpes, F-38000 Grenoble (France); CEA, LETI, MINATEC Campus, F-38054 Grenoble (France); Piallat, F. [STMicroelectronics, 850 rue Jean Monnet, 38926 Rousset Cedex, Crolles (France); Gassilloud, R. [Univ Grenoble Alpes, F-38000 Grenoble (France); CEA, LETI, MINATEC Campus, F-38054 Grenoble (France); Schamm-Chardon, S. [CEMES-CNRS et Université de Toulouse, 29 rue Jeanne Marvig, 31055 Toulouse (France)

    2015-08-15

    Highlights: • The backside approach is a promising solution for advanced chemical characterization of future MOSFETs. • Frontside ToF-SIMS and Auger depth profiles are affected by cumulative mixing effects and thus not relevant for analyzing ultra-thin layers. • Higher in-depth resolution is possible in the backside approach for Auger and ToF-SIMS depth profiling. • Backside depth profiling allows revealing ultra-thin layers and elemental in-depth redistribution inside high-k/metal gate stacks. • Backside XPS allows preserving the full metal gate, thus enabling the analysis of real technological samples. - Abstract: Downscaling of transistors beyond the 14 nm technological node requires the implementation of new architectures and materials. Advanced characterization methods are needed to gain information about the chemical composition of buried layers and interfaces. An effective approach based on backside analysis is presented here. X-ray photoelectron spectroscopy, Auger depth profiling and time-of-flight secondary ions mass spectrometry are combined to investigate inter-diffusion phenomena. To highlight improvements related to the backside method, backside and frontside analyses are compared. Critical information regarding nitrogen, oxygen and aluminium redistribution inside the gate stacks is obtained only in the backside configuration.

  13. Investigation of Ruthenium Dissolution in Advanced Membrane Electrode Assemblies for Direct Methanol Based Fuel Cells Stacks

    Science.gov (United States)

    Valdez, T. I.; Firdosy, S.; Koel, B. E.; Narayanan, S. R.

    2005-01-01

    This viewgraph presentation gives a detailed review of the Direct Methanol Based Fuel Cell (DMFC) stack and investigates the Ruthenium that was found at the exit of the stack. The topics include: 1) Motivation; 2) Pathways for Cell Degradation; 3) Cell Duration Testing; 4) Duration Testing, MEA Analysis; and 5) Stack Degradation Analysis.

  14. System-Level Testing of the Advanced Stirling Radioisotope Generator Engineering Hardware

    Science.gov (United States)

    Chan, Jack; Wiser, Jack; Brown, Greg; Florin, Dominic; Oriti, Salvatore M.

    2014-01-01

    To support future NASA deep space missions, a radioisotope power system utilizing Stirling power conversion technology was under development. This development effort was performed under the joint sponsorship of the Department of Energy and NASA, until its termination at the end of 2013 due to budget constraints. The higher conversion efficiency of the Stirling cycle compared with that of the Radioisotope Thermoelectric Generators (RTGs) used in previous missions (Viking, Pioneer, Voyager, Galileo, Ulysses, Cassini, Pluto New Horizons and Mars Science Laboratory) offers the advantage of a four-fold reduction in Pu-238 fuel, thereby extending its limited domestic supply. As part of closeout activities, system-level testing of flight-like Advanced Stirling Convertors (ASCs) with a flight-like ASC Controller Unit (ACU) was performed in February 2014. This hardware is the most representative of the flight design tested to date. The test fully demonstrates the following ACU and system functionality: system startup; ASC control and operation at nominal and worst-case operating conditions; power rectification; DC output power management throughout nominal and out-of-range host voltage levels; ACU fault management, and system command / telemetry via MIL-STD 1553 bus. This testing shows the viability of such a system for future deep space missions and bolsters confidence in the maturity of the flight design.

  15. Computer Hardware, Advanced Mathematics and Model Physics pilot project final report

    International Nuclear Information System (INIS)

    1992-05-01

    The Computer Hardware, Advanced Mathematics and Model Physics (CHAMMP) Program was launched in January, 1990. A principal objective of the program has been to utilize the emerging capabilities of massively parallel scientific computers in the challenge of regional scale predictions of decade-to-century climate change. CHAMMP has already demonstrated the feasibility of achieving a 10,000 fold increase in computational throughput for climate modeling in this decade. What we have also recognized, however, is the need for new algorithms and computer software to capitalize on the radically new computing architectures. This report describes the pilot CHAMMP projects at the DOE National Laboratories and the National Center for Atmospheric Research (NCAR). The pilot projects were selected to identify the principal challenges to CHAMMP and to entrain new scientific computing expertise. The success of some of these projects has aided in the definition of the CHAMMP scientific plan. Many of the papers in this report have been or will be submitted for publication in the open literature. Readers are urged to consult with the authors directly for questions or comments about their papers

  16. Reconfiguration of NASA GRC's Vacuum Facility 6 for Testing of Advanced Electric Propulsion System (AEPS) Hardware

    Science.gov (United States)

    Peterson, Peter Y.; Kamhawi, Hani; Huang, Wensheng; Yim, John T.; Haag, Thomas W.; Mackey, Jonathan A.; McVetta, Michael S.; Sorrelle, Luke T.; Tomsik, Thomas M.; Gilligan, Ryan P.; hide

    2018-01-01

    The NASA Hall Effect Rocket with Magnetic Shielding (HERMeS) 12.5 kW Hall thruster has been the subject of extensive technology maturation in preparation for development into a flight propulsion system. The HERMeS thruster is being developed and tested at NASA GRC and NASA JPL through support of the Space Technology Mission Directorate (STMD) and is intended to be used as the electric propulsion system on the Power and Propulsion Element (PPE) of the recently announced Deep Space Gateway (DSG). The Advanced Electric Propulsion System (AEPS) contract was awarded to Aerojet-Rocketdyne to develop the HERMeS system into a flight system for use by NASA. To address the hardware test needs of the AEPS project, NASA GRC launched an effort to reconfigure Vacuum Facility 6 (VF-6) for high-power electric propulsion testing including upgrades and reconfigurations necessary to conduct performance, plasma plume, and system level integration testing. Results of the verification and validation testing with HERMeS Technology Demonstration Unit (TDU)-1 and TDU-3 Hall thrusters are also included.

  17. Advanced Research and Education in Electrical Drives by Using Digital Real-Time Hardware-in-the-Loop Simulation

    DEFF Research Database (Denmark)

    Bojoi, R.; Profumo, F.; Griva, G.

    2002-01-01

    The authors present in this paper a digital real-time hardware-in-the-loop simulation of a three-phase induction motor drive. The main real-time simulation tool is the dSPACE DS1103 PPC Controller Board which simulates the power and signal conditioning parts. The control algorithm of the virtual...... drive has been implemented on the Evaluation Board of TMS320F240 DSP. The experimental results validate this solution as a powerful tool to be used in research and advanced education. Thus, the students can put in practic the theory without spending too much time with details concerning the hardware...

  18. Testing and Evaluation of an Advanced High Performance Planar SOFC Stack

    National Research Council Canada - National Science Library

    Elangovan, S

    1999-01-01

    .... SOFCo has conducted several programs which synergistically address this objective: an internally funded program focusing on stack development and system integration for pipeline natural gas (PNG...

  19. Recent advances in hardware and software are to improve spent fuel measurements

    International Nuclear Information System (INIS)

    Staples, P.; Beddingfield, D.H.; Lestone, J.P.; Pelowitz, D.G.; Bytchkov, M.; Starovich, Z.; Harizanov, I.; Luna-Vellejo, J.; Lavender, C.

    2001-01-01

    Vast quantities of spent fuel are available for safeguard measurements, primarily in Commonwealth of Independent States (CIS) of the former Soviet Union. This spent fuel, much of which consists of long-cooling-time material, is going to become less unique in the world safeguards arena as reprocessing projects or permanent repositories continue to be delayed or postponed. The long cooling time of many of the spent fuel assemblies being prepared for intermediate term storage in the CIS countries promotes the possibility of increased accuracy in spent fuel assays. This improvement is made possible through the process of decay of the Curium isotopes and of fission products. An important point to consider for the future that could advance safeguards measurements for reverification and inspection would be to determine what safeguards requirements should be imposed upon this 'new' class of spent fuel, Improvements in measurement capability will obviously affect the safeguards requirements. What most significantly enables this progress in spent fuel measurements is the improvement in computer processing power and software enhancements leading to user-friendly Graphical User Interfaces (GUT's). The software used for these projects significantly reduces the IAEA inspector's time expenditure for both learning and operating computer and data acquisition systems, At the same time, by standardizing the spent fuel measurements, it is possible to increase reproducibility and reliability of the measurement data. Hardware systems will be described which take advantage of the increased computer control available to enable more complex measurement scenarios. A specific example of this is the active regulation of a spent fuel neutron coincident counter's 3 He tubes high voltage, and subsequent scaling of measurement results to maintain a calibration for direct assay of the plutonium content of Fast Breeder Reactor spent fuel. The plutonium content has been successfully determined for

  20. Survey of hardware supported by the Control System at the Advanced Photon Source

    International Nuclear Information System (INIS)

    Coulter, K.J.; Nawrocki, G.J.

    1993-01-01

    The Experimental Physics and Industrial control System (EPICS) has been under development at Los Alamos and Argonne National Laboratories for over six years. A wide variety of instrumentation is now supported. This presentation will give an overview of the types of hardware and subsystems which are currently supported and will discuss future plans for addressing additional hardware requirements at the APS. Supported systems to be discussed include: motion control, vacuum pump control and system monitoring, standard laboratory instrumentation (ADCs, DVMs, pulse generators, etc.), image processing, discrete binary and analog I/O, and standard temperature, pressure and flow monitoring

  1. Investigation of Ruthenium Dissolution in Advanced Membrane Electrode Assemblies for Direct Methanol Based Fuel Cell Stacks

    Science.gov (United States)

    Valdez, Thomas I.; Firdosy, S.; Koel, B. E.; Narayanan, S. R.

    2005-01-01

    Dissolution of ruthenium was observed in the 80-cell stack. Duration testing was performed in single cell MEAs to determine the pathway of cell degradation. EDAX analysis on each of the single cell MEAs has shown that the Johnson Matthey commercial catalyst is stable in DMFC operation for 250 hours, no ruthenium dissolution was observed. Changes in the hydrophobicity of the cathode backing papers was minimum. Electrode polarization analysis revealed that the MEA performance loss is attributed to changes in the cathode catalyst layer. Ruthenium migration does not seem to occur during cell operation but can occur when methanol is absent from the anode compartment, the cathode compartment has access to air, and the cells in the stack are electrically connected to a load (Shunt Currents). The open-to-air cathode stack design allowed for: a) The MEAs to have continual access to oxygen; and b) The stack to sustain shunt currents. Ruthenium dissolution in a DMFC stack can be prevented by: a) Developing an internally manifolded stacks that seal reactant compartments when not in operation; b) Bringing the cell voltages to zero quickly when not in operation; and c) Limiting the total number of cells to 25 in an effort to limit shunt currents.

  2. Asynchronous Advanced Encryption Standard Hardware with Random Noise Injection for Improved Side-Channel Attack Resistance

    Directory of Open Access Journals (Sweden)

    Siva Kotipalli

    2014-01-01

    (SCA resistance. These designs are based on a delay-insensitive (DI logic paradigm known as null convention logic (NCL, which supports useful properties for resisting SCAs including dual-rail encoding, clock-free operation, and monotonic transitions. Potential benefits include reduced and more uniform switching activities and reduced signal-to-noise (SNR ratio. A novel method to further augment NCL AES hardware with random voltage scaling technique is also presented for additional security. Thereby, the proposed components leak significantly less side-channel information than conventional clocked approaches. To quantitatively verify such improvements, functional verification and WASSO (weighted average simultaneous switching output analysis have been carried out on both conventional synchronous approach and the proposed NCL based approach using Mentor Graphics ModelSim and Xilinx simulation tools. Hardware implementation has been carried out on both designs exploiting a specified side-channel attack standard evaluation FPGA board, called SASEBO-GII, and the corresponding power waveforms for both designs have been collected. Along with the results of software simulations, we have analyzed the collected waveforms to validate the claims related to benefits of the proposed cryptohardware design approach.

  3. An iLab for Teaching Advanced Logic Concepts with Hardware Descriptive Languages

    Science.gov (United States)

    Ayodele, Kayode P.; Inyang, Isaac A.; Kehinde, Lawrence O.

    2015-01-01

    One of the more interesting approaches to teaching advanced logic concepts is the use of online laboratory frameworks to provide student access to remote field-programmable devices. There is as yet, however, no conclusive evidence of the effectiveness of such an approach. This paper presents the Advanced Digital Lab, a remote laboratory based on…

  4. TU-F-18C-07: Hardware Advances for MTF Improvement in Dedicated Breast CT

    International Nuclear Information System (INIS)

    Gazi, P; Burkett, G; Yang, K; Boone, J

    2014-01-01

    Purpose: In this study, we have designed and implemented a prototype dedicated breast CT system (bCT) to improve the spatial resolution characteristics, in order to improve detection of micro-calcifications. Methods: A 10.8 kW water-cooled, tungsten anode x-ray tube, running up to 240 mA at 60 kV, coupled with an x-ray generator specifically designed for this application, and 0.3 mm of added copper filter was used to generate x-ray pulses. A CsI CMOS flat panel detector with a pixel pitch of 0.075 mm in native binning mode was used. The system geometry was designed in a way to achieve an FOV on par with similar bCT prototypes, resulting in a magnification factor of 1.39. A 0.013 mm tungsten wire was used to generate point spread functions. Multiple scans were performed with different numbers of projections, different reconstruction kernel sizes and different reconstruction filters to study the effects of each parameter on MTF. The resulting MTFs were then evaluated quantitatively using the generated PFSs. Duplicate scans with the same parameters were performed on two other dedicated breast CT systems to compare the performance of the new prototype. Results: The results of the MTF experiments demonstrate a significant improvement in the spatial resolution characteristics. In the new prototype, using the pulsed x-ray source results in a restoration of the azimuthal MTF degradation, due to motion blurring previously seen in other bCT systems. Moreover, employing the higher resolution x-ray detector considerably improves the MTF. The MTF at 10% of the new system is at 3.5 1/mm, a factor of 4.36 greater than an earlier bCT scanner. Conclusion: The MTF analysis of the new prototype bCT shows that using the new hardware and control results in a significant improvement in visualization of finer detail. This suggests that the visualization of micro-calcifications will be significantly improved

  5. Advanced Photovoltaic Inverter Control Development and Validation in a Controller-Hardware-in-the-Loop Test Bed

    Energy Technology Data Exchange (ETDEWEB)

    Prabakar, Kumaraguru [National Renewable Energy Laboratory (NREL), Golden, CO (United States); Shirazi, Mariko [National Renewable Energy Laboratory (NREL), Golden, CO (United States); Singh, Akanksha [National Renewable Energy Laboratory (NREL), Golden, CO (United States); Chakraborty, Sudipta [National Renewable Energy Laboratory (NREL), Golden, CO (United States)

    2017-11-07

    Penetration levels of solar photovoltaic (PV) generation on the electric grid have increased in recent years. In the past, most PV installations have not included grid-support functionalities. But today, standards such as the upcoming revisions to IEEE 1547 recommend grid support and anti-islanding functions-including volt-var, frequency-watt, volt-watt, frequency/voltage ride-through, and other inverter functions. These functions allow for the standardized interconnection of distributed energy resources into the grid. This paper develops and tests low-level inverter current control and high-level grid support functions. The controller was developed to integrate advanced inverter functions in a systematic approach, thus avoiding conflict among the different control objectives. The algorithms were then programmed on an off-the-shelf, embedded controller with a dual-core computer processing unit and field-programmable gate array (FPGA). This programmed controller was tested using a controller-hardware-in-the-loop (CHIL) test bed setup using an FPGA-based real-time simulator. The CHIL was run at a time step of 500 ns to accommodate the 20-kHz switching frequency of the developed controller. The details of the advanced control function and CHIL test bed provided here will aide future researchers when designing, implementing, and testing advanced functions of PV inverters.

  6. Parabolic Flight Investigation for Advanced Exercise Concept Hardware Hybrid Ultimate Lifting Kit (HULK)

    Science.gov (United States)

    Weaver, A. S.; Funk, J. H.; Funk, N. W.; Sheehan, C. C.; Humphreys, B. T.; Perusek, G. P.

    2015-01-01

    Long-duration space flight poses many hazards to the health of the crew. Among those hazards is the physiological deconditioning of the musculoskeletal and cardiovascular systems due to prolonged exposure to microgravity. To combat this erosion of physical condition space flight may take on the crew, the Human Research Program (HRP) is charged with developing Advanced Exercise Concepts to maintain astronaut health and fitness during long-term missions, while keeping device mass, power, and volume to a minimum. The goal of this effort is to preserve the physical capability of the crew to perform mission critical tasks in transit and during planetary surface operations. The HULK is a pneumatic-based exercise system, which provides both resistive and aerobic modes to protect against human deconditioning in microgravity. Its design targeted the International Space Station (ISS) Advanced Resistive Exercise Device (ARED) high level performance characteristics and provides up to 600 foot pounds resitive loading with the capability to allow for eccentric to concentric (E:C) ratios of higher than 1:1 through a DC motor assist component. The device's rowing mode allows for high cadence aerobic activity. The HULK parabolic flight campaign, conducted through the NASA Flight Opportunities Program at Ellington Field, resulted in the creation of device specific data sets including low fidelity motion capture, accelerometry and both inline and ground reaction forces. These data provide a critical link in understanding how to vibration isolate the device in both ISS and space transit applications. Secondarily, the study of human exercise and associated body kinematics in microgravity allows for more complete understanding of human to machine interface designs to allow for maximum functionality of the device in microgravity.

  7. Algebraic stacks

    Indian Academy of Sciences (India)

    Deligne, Mumford and Artin [DM, Ar2]) and consider algebraic stacks, then we can cons- truct the 'moduli ... the moduli scheme and the moduli stack of vector bundles. First I will give ... 1–31. © Printed in India. 1 ...... Cultura, Spain. References.

  8. Hardware for dynamic quantum computing.

    Science.gov (United States)

    Ryan, Colm A; Johnson, Blake R; Ristè, Diego; Donovan, Brian; Ohki, Thomas A

    2017-10-01

    We describe the hardware, gateware, and software developed at Raytheon BBN Technologies for dynamic quantum information processing experiments on superconducting qubits. In dynamic experiments, real-time qubit state information is fed back or fed forward within a fraction of the qubits' coherence time to dynamically change the implemented sequence. The hardware presented here covers both control and readout of superconducting qubits. For readout, we created a custom signal processing gateware and software stack on commercial hardware to convert pulses in a heterodyne receiver into qubit state assignments with minimal latency, alongside data taking capability. For control, we developed custom hardware with gateware and software for pulse sequencing and steering information distribution that is capable of arbitrary control flow in a fraction of superconducting qubit coherence times. Both readout and control platforms make extensive use of field programmable gate arrays to enable tailored qubit control systems in a reconfigurable fabric suitable for iterative development.

  9. Laser-plasma acceleration with multi-color pulse stacks: Designer electron beams for advanced radiation sources

    Science.gov (United States)

    Kalmykov, Serge; Shadwick, Bradley; Ghebregziabher, Isaac; Davoine, Xavier

    2015-11-01

    Photon engineering offers new avenues to coherently control electron beam phase space on a femtosecond time scale. It enables generation of high-quality beams at a kHz-scale repetition rate. Reducing the peak pulse power (and thus the average laser power) is the key to effectively exercise such control. A stepwise negative chirp, synthesized by incoherently stacking collinear sub-Joule pulses from conventional CPA, affords a micron-scale bandwidth. It is sufficient to prevent rapid compression of the pulse into an optical shock, while delaying electron dephasing. This extends electron energy far beyond the limits suggested by accepted scalings (beyond 1 GeV in a 3 mm plasma), without compromising beam quality. In addition, acceleration with a stacked pulse in a channel favorably modifies electron beam on a femtosecond time scale, controllably producing synchronized sequences of 100 kA-scale, quasi-monoenergetic bunches. These comb-like, designer GeV electron beams are ideal drivers of polychromatic, tunable inverse Thomson γ-ray sources. The work of SYK and BAS is supported by the US DOE Grant DE-SC0008382 and NSF Grant PHY-1104683. Inverse Thomson scattering simulations were completed utilizing the Holland Computing Center of the University of Nebraska.

  10. Hardware malware

    CERN Document Server

    Krieg, Christian

    2013-01-01

    In our digital world, integrated circuits are present in nearly every moment of our daily life. Even when using the coffee machine in the morning, or driving our car to work, we interact with integrated circuits. The increasing spread of information technology in virtually all areas of life in the industrialized world offers a broad range of attack vectors. So far, mainly software-based attacks have been considered and investigated, while hardware-based attacks have attracted comparatively little interest. The design and production process of integrated circuits is mostly decentralized due to

  11. Qualification issues associated with the use of advanced instrumentation and control systems hardware in nuclear power plants

    International Nuclear Information System (INIS)

    Korsah, K.; Antonescu, C.

    1993-01-01

    The instrumentation and control (I ampersand C) systems in advanced reactors will make extensive use of digital controls, microprocessors, multiplexing, and Tiber-optic transmission. Elements of these advances in I ampersand C have been implemented on some current operating plants. However, the widespread use of the above technologies, as well as the use of artificial intelligence with minimum reliance on human operator control of reactors, highlights the need to develop standards for qualifying I ampersand C used in the next generation of nuclear power plants. As a first step in this direction, the protection system I ampersand C for present-day plants was compared to that proposed for advanced light water reactors (ALWRs). An evaluation template was developed by assembling a configuration of a safety channel instrument string for a generic ALWR, then comparing the impact of environmental stressors on that string to their effect on an equivalent instrument string from an existing light water reactor. The template was then used to address reliability issues for microprocessor-based protection systems. Standards (or lack thereof) for the qualification of microprocessor-based safety I ampersand C systems were also identified. This approach addresses in part issues raised in Nuclear Regulatory Commission policy document SECY-91-292. which recognizes that advanced I ampersand C systems for the nuclear industry are ''being developed without consensus standards, as the technology available for design is ahead of the technology that is well understood through experience and supported by application standards.''

  12. Qualification issues associated with the use of advanced instrumentation and control systems hardware in nuclear power plants

    International Nuclear Information System (INIS)

    Korsah, K.; Antonescu, C.

    1993-01-01

    The instrumentation and control (I ampersand C) systems in advanced reactors will make extensive use of digital controls, microprocessors, multiplexing, and fiber-optic transmission. Elements of these advances in I ampersand C have been implemented on some current operating plants. However, the widespread use of the above technologies, as well as the use of artificial intelligence with minimum reliance on human operator control of reactors, highlights the need to develop standards for qualifying I ampersand C used in the next generation of nuclear power plants. As a first step in this direction, the protection system I ampersand C for present-day plants was compared to that proposed for advanced light water reactors (ALWRs). An evaluation template was developed by assembling a configuration of a safety channel instrument string for a generic ALWR, then comparing the impact of environmental stressors on that string to their effect on an equivalent instrument string from an existing light water reactor. The template was then used to address reliability issues for microprocessor-based protection systems. Standards (or lack thereof) for the qualification of microprocessor-based safety I ampersand C systems were also identified. This approach addresses in part issues raised in Nuclear Regulatory Commission policy document SECY-91-292, which recognizes that advanced I ampersand C systems for the nuclear industry are open-quotes being developed without consensus standards, as the technology available for design is ahead of the technology that is well understood through experience and supported by application standards.close quotes

  13. 3D IC and RF SiPs advanced stacking and planar solutions for 5G mobility

    CERN Document Server

    Hwang, Lih-Tyng

    2017-01-01

    An interdisciplinary guide to enabling technologies for 3D ICs and 5G mobility, covering packaging, design to product life and reliability assessments * Features an interdisciplinary approach to the enabling technologies and hardware for 3D ICs and 5G mobility * Presents statistical treatments and examples with tools that are easily accessible, such as Microsoft's Excel and Minitab * Fundamental design topics such as electromagnetic design for logic and RF/passives centric circuits are explained in detail * Provides chapter-wise review questions and powerpoint slides as teaching tools

  14. Time-predictable Stack Caching

    DEFF Research Database (Denmark)

    Abbaspourseyedi, Sahar

    completely. Thus, in systems with hard deadlines the worst-case execution time (WCET) of the real-time software running on them needs to be bounded. Modern architectures use features such as pipelining and caches for improving the average performance. These features, however, make the WCET analysis more...... addresses, provides an opportunity to predict and tighten the WCET of accesses to data in caches. In this thesis, we introduce the time-predictable stack cache design and implementation within a time-predictable processor. We introduce several optimizations to our design for tightening the WCET while...... keeping the timepredictability of the design intact. Moreover, we provide a solution for reducing the cost of context switching in a system using the stack cache. In design of these caches, we use custom hardware and compiler support for delivering time-predictable stack data accesses. Furthermore...

  15. Field Quality from Tolerance Stack-up In R&D Quadrupoles for the Advanced Photon Source Upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Liu, J.; Jaski, M.; Dejus, R.; Doose, C.; Donnelly, A.; Downey, J.; Borland, M.; Jain, Animesh

    2016-10-01

    The Advanced Photon Source (APS) at Argonne National Laboratory (ANL) is considering upgrading the current double-bend, 7-GeV, 3rd generation storage ring to a 6-GeV, 4th generation storage ring with a Multibend Achromat (MBA) lattice. In this study, a novel method is proposed to determine fabrication and assembly tolerances through a combination of magnetic and mechanical tolerance analyses. Mechanical tolerance stackup analyses using Teamcenter Variation Analysis are carried out to determine the part and assembly level fabrication tolerances. Finite element analyses using OPERA are conducted to estimate the effect of fabrication and assembly errors on the magnetic field of a quadrupole magnet and to determine the allowable tolerances to achieve the desired magnetic performance. Finally, results of measurements in R&D quadrupole prototypes are compared with the analysis results.

  16. Solid Oxide Fuel Cell Stack Diagnostics

    DEFF Research Database (Denmark)

    Mosbæk, Rasmus Rode; Barfod, Rasmus Gottrup

    As SOFC technology is moving closer to a commercial break through, methods to measure the “state-of-health” of operating stacks are becoming of increasing interest. This requires application of advanced methods for detailed electrical and electrochemical characterization during operation....... An operating stack is subject to compositional gradients in the gaseous reactant streams, and temperature gradients across each cell and across the stack, which complicates detailed analysis. Several experimental stacks from Topsoe Fuel Cell A/S were characterized using Electrochemical Impedance Spectroscopy...... in the hydrogen fuel gas supplied to the stack. EIS was used to examine the long-term behavior and monitor the evolution of the impedance of each of the repeating units and the whole stack. The observed impedance was analyzed in detail for one of the repeating units and the whole stack and the losses reported...

  17. The Impact of 3D Stacking and Technology Scaling on the Power and Area of Stereo Matching Processors

    Directory of Open Access Journals (Sweden)

    Seung-Ho Ok

    2017-02-01

    Full Text Available Recently, stereo matching processors have been adopted in real-time embedded systems such as intelligent robots and autonomous vehicles, which require minimal hardware resources and low power consumption. Meanwhile, thanks to the through-silicon via (TSV, three-dimensional (3D stacking technology has emerged as a practical solution to achieving the desired requirements of a high-performance circuit. In this paper, we present the benefits of 3D stacking and process technology scaling on stereo matching processors. We implemented 2-tier 3D-stacked stereo matching processors with GlobalFoundries 130-nm and Nangate 45-nm process design kits and compare them with their two-dimensional (2D counterparts to identify comprehensive design benefits. In addition, we examine the findings from various analyses to identify the power benefits of 3D-stacked integrated circuit (IC and device technology advancements. From experiments, we observe that the proposed 3D-stacked ICs, compared to their 2D IC counterparts, obtain 43% area, 13% power, and 14% wire length reductions. In addition, we present a logic partitioning method suitable for a pipeline-based hardware architecture that minimizes the use of TSVs.

  18. Model-based design validation for advanced energy management strategies for electrified hybrid power trains using innovative vehicle hardware in the loop (VHIL) approach

    International Nuclear Information System (INIS)

    Mayyas, Abdel Ra'ouf; Kumar, Sushil; Pisu, Pierluigi; Rios, Jacqueline; Jethani, Puneet

    2017-01-01

    Highlights: •Vehicle hardware In-the-loop VHiL testing and validation is implemented in vehicle test bed. •Torque at the roller bench test is used to control the torque at wheels to reflect vehicle electrification symptoms. •Electrified powertrain with Equivalent Consumption Minimization Strategy is tested and validated using VHiL. •Fuel economy and power train performance is measured using high precision fuel measurement device. -- Abstract: Hybridization of automotive powertrains by using more than one type of energy converter is considered as an important step towards reducing fuel consumption and air pollutants. Specifically, the development of energy efficient, highly complex, alternative drive-train systems, in which the interactions of different energy converters play an important role, requires new design methods and processes. This paper discusses the inclusion of an alternative hybrid power train into an existing vehicle platform for maximum energy efficiency. The new proposed integrated Vehicle Hardware In-the-loop (VHiL) and Model Based Design (MBD) approach is utilized to evaluate the energy efficiency of electrified powertrain. In VHiL, a complete chassis system becomes an integrated part of the vehicle test bed. A complete conventional Internal Combustion Engine (ICE) powered vehicle is tested in roller bench test for the integration of energy efficient hybrid electric power train modules in closed-loop, real-time, feedback configuration. A model that is a replica of the test vehicle is executed – in real-time- where all hybrid power train modules are included. While the VHiL platform is controlling the signal exchange between the test bed automation software and the vehicle on-board controller, the road load exerted on the driving wheels is manipulated in closed –loop real-time manner in order to reflect all hybrid driving modes including: All Electric Range (AER), Electric Power Assist (EPA) and blended Modes (BM). Upon successful

  19. Introduction to Hardware Security

    Directory of Open Access Journals (Sweden)

    Yier Jin

    2015-10-01

    Full Text Available Hardware security has become a hot topic recently with more and more researchers from related research domains joining this area. However, the understanding of hardware security is often mixed with cybersecurity and cryptography, especially cryptographic hardware. For the same reason, the research scope of hardware security has never been clearly defined. To help researchers who have recently joined in this area better understand the challenges and tasks within the hardware security domain and to help both academia and industry investigate countermeasures and solutions to solve hardware security problems, we will introduce the key concepts of hardware security as well as its relations to related research topics in this survey paper. Emerging hardware security topics will also be clearly depicted through which the future trend will be elaborated, making this survey paper a good reference for the continuing research efforts in this area.

  20. Constructing Hardware in a Scale Embedded Language

    Energy Technology Data Exchange (ETDEWEB)

    2014-08-21

    Chisel is a new open-source hardware construction language developed at UC Berkeley that supports advanced hardware design using highly parameterized generators and layered domain-specific hardware languages. Chisel is embedded in the Scala programming language, which raises the level of hardware design abstraction by providing concepts including object orientation, functional programming, parameterized types, and type inference. From the same source, Chisel can generate a high-speed C++-based cycle-accurate software simulator, or low-level Verilog designed to pass on to standard ASIC or FPGA tools for synthesis and place and route.

  1. Dynamic modelling and hardware-in-the-loop testing of PEMFC

    Energy Technology Data Exchange (ETDEWEB)

    Vath, Andreas; Soehn, Matthias; Nicoloso, Norbert; Hartkopf, Thomas [Technische Universitaet Darmstadt/Institut fuer Elektrische Energie wand lung, Landgraf-Georg-Str. 4, D-64283 Darmstadt (Germany); Lemes, Zijad; Maencher, Hubert [MAGNUM Automatisierungstechnik GmbH, Bunsenstr. 22, D-64293 Darmstadt (Germany)

    2006-07-03

    Modelling and hardware-in-the-loop (HIL) testing of fuel cell components and entire systems open new ways for the design and advance development of FCs. In this work proton exchange membrane fuel cells (PEMFC) are dynamically modelled within MATLAB-Simulink at various operation conditions in order to establish a comprehensive description of their dynamic behaviour as well as to explore the modelling facility as a diagnostic tool. Set-up of a hardware-in-the-loop (HIL) system enables real time interaction between the selected hardware and the model. The transport of hydrogen, nitrogen, oxygen, water vapour and liquid water in the gas diffusion and catalyst layers of the stack are incorporated into the model according to their physical and electrochemical characteristics. Other processes investigated include, e.g., the membrane resistance as a function of the water content during fast load changes. Cells are modelled three-dimensionally and dynamically. In case of system simulations a one-dimensional model is preferred to reduce computation time. The model has been verified by experiments with a water-cooled stack. (author)

  2. Proceedings of the Twenty-First Water Reactor Safety Information Meeting: Volume 1, Plenary session; Advanced reactor research; advanced control system technology; advanced instrumentation and control hardware; human factors research; probabilistic risk assessment topics; thermal hydraulics; thermal hydraulic research for advanced passive LWRs

    International Nuclear Information System (INIS)

    Monteleone, S.

    1994-04-01

    This three-volume report contains 90 papers out of the 102 that were presented at the Twenty-First Water Reactor Safety Information Meeting held at the Bethesda Marriott Hotel, Bethesda, Maryland, during the week of October 25--27, 1993. The papers are printed in the order of their presentation in each session and describe progress and results of programs in nuclear safety research conducted in this country and abroad. Foreign participation in the meeting included papers presented by researchers from France, Germany, Japan, Russia, Switzerland, Taiwan, and United Kingdom. The titles of the papers and the names of the authors have been updated and may differ from those that appeared in the final program of the meeting. Individual papers have been cataloged separately. This document, Volume 1 covers the following topics: Advanced Reactor Research; Advanced Instrumentation and Control Hardware; Advanced Control System Technology; Human Factors Research; Probabilistic Risk Assessment Topics; Thermal Hydraulics; and Thermal Hydraulic Research for Advanced Passive Light Water Reactors

  3. Proceedings of the Twenty-First Water Reactor Safety Information Meeting: Volume 1, Plenary session; Advanced reactor research; advanced control system technology; advanced instrumentation and control hardware; human factors research; probabilistic risk assessment topics; thermal hydraulics; thermal hydraulic research for advanced passive LWRs

    Energy Technology Data Exchange (ETDEWEB)

    Monteleone, S. [Brookhaven National Lab., Upton, NY (United States)] [comp.

    1994-04-01

    This three-volume report contains 90 papers out of the 102 that were presented at the Twenty-First Water Reactor Safety Information Meeting held at the Bethesda Marriott Hotel, Bethesda, Maryland, during the week of October 25--27, 1993. The papers are printed in the order of their presentation in each session and describe progress and results of programs in nuclear safety research conducted in this country and abroad. Foreign participation in the meeting included papers presented by researchers from France, Germany, Japan, Russia, Switzerland, Taiwan, and United Kingdom. The titles of the papers and the names of the authors have been updated and may differ from those that appeared in the final program of the meeting. Individual papers have been cataloged separately. This document, Volume 1 covers the following topics: Advanced Reactor Research; Advanced Instrumentation and Control Hardware; Advanced Control System Technology; Human Factors Research; Probabilistic Risk Assessment Topics; Thermal Hydraulics; and Thermal Hydraulic Research for Advanced Passive Light Water Reactors.

  4. Twenty-third water reactor safety information meeting: Volume 2, Human factors research; Advanced I and C hardware and software; Severe accident research; Probabilistic risk assessment topics; Individual plant examination: Proceedings

    Energy Technology Data Exchange (ETDEWEB)

    Monteleone, S. [comp.] [Brookhaven National Lab., Upton, NY (United States)

    1996-03-01

    This three-volume report contains papers presented at the Twenty- Third Water Reactor Safety Information Meeting held at the Bethesda Marriott Hotel, Bethesda, Maryland, October 23-25, 1995. The papers are printed in the order of their presentation in each session and describe progress and results of programs in nuclear safety research conducted in this country and abroad. Foreign participation in the meeting included papers presented by researchers from France, Italy, Japan, Norway, Russia, Sweden, and Switzerland. This document, Volume 2, present topics in human factors research, advanced instrumentation and control hardware and software, severe accident research, probabilistic risk assessment, and individual plant examination. Individual papers have been cataloged separately.

  5. A Time-predictable Stack Cache

    DEFF Research Database (Denmark)

    Abbaspour, Sahar; Brandner, Florian; Schoeberl, Martin

    2013-01-01

    Real-time systems need time-predictable architectures to support static worst-case execution time (WCET) analysis. One architectural feature, the data cache, is hard to analyze when different data areas (e.g., heap allocated and stack allocated data) share the same cache. This sharing leads to le...... of a cache for stack allocated data. Our port of the LLVM C++ compiler supports the management of the stack cache. The combination of stack cache instructions and the hardware implementation of the stack cache is a further step towards timepredictable architectures.......Real-time systems need time-predictable architectures to support static worst-case execution time (WCET) analysis. One architectural feature, the data cache, is hard to analyze when different data areas (e.g., heap allocated and stack allocated data) share the same cache. This sharing leads to less...... precise results of the cache analysis part of the WCET analysis. Splitting the data cache for different data areas enables composable data cache analysis. The WCET analysis tool can analyze the accesses to these different data areas independently. In this paper we present the design and implementation...

  6. Open Hardware Business Models

    Directory of Open Access Journals (Sweden)

    Edy Ferreira

    2008-04-01

    Full Text Available In the September issue of the Open Source Business Resource, Patrick McNamara, president of the Open Hardware Foundation, gave a comprehensive introduction to the concept of open hardware, including some insights about the potential benefits for both companies and users. In this article, we present the topic from a different perspective, providing a classification of market offers from companies that are making money with open hardware.

  7. Open Hardware Business Models

    OpenAIRE

    Edy Ferreira

    2008-01-01

    In the September issue of the Open Source Business Resource, Patrick McNamara, president of the Open Hardware Foundation, gave a comprehensive introduction to the concept of open hardware, including some insights about the potential benefits for both companies and users. In this article, we present the topic from a different perspective, providing a classification of market offers from companies that are making money with open hardware.

  8. Dynamic Stability of Cylindrical Shells under Moving Loads by Applying Advanced Controlling Techniques—Part II: Using Piezo-Stack Control

    Directory of Open Access Journals (Sweden)

    Khaled M. Saadeldin Eldalil

    2009-01-01

    Full Text Available The load acting on the actively controlled cylindrical shell under a transient pressure pulse propelling a moving mass (gun case has been experimentally studied. The concept of using piezoelectric stack and stiffener combination is utilized for damping the tube wall radial and circumferential deforming vibrations, in the correct meeting location timing of the moving mass. The experiment was carried out by using the same stiffened shell tube of the experimental 14 mm gun tube facility which is used in part 1. Using single and double stacks is tried at two pressure levels of low-speed modes, which have response frequencies adapted with the used piezoelectric stacks characteristics. The maximum active damping ratio is occurred at high-pressure level. The radial circumferential strains are measured by using high-frequency strain gage system in phase with laser beam detection system similar to which used in part 1. Time resolved strain measurements of the wall response were obtained, and both precursor and transverse hoop strains have been resolved. A complete comparison had been made between the effect of active controlled and stepped structure cases, which indicate a significant attenuation ratio especially at higher operating pressures.

  9. Advanced Platform for Development and Evaluation of Grid Interconnection Systems Using Hardware-in-the-Loop: Part III -- Grid Interconnection System Evaluator: Preprint

    Energy Technology Data Exchange (ETDEWEB)

    Lundstrom, B.; Shirazi, M.; Coddington, M.; Kroposki, B.

    2013-01-01

    This paper, presented at the IEEE Green Technologies Conference 2013, describes a Grid Interconnection System Evaluator (GISE) that leverages hardware-in-the-loop (HIL) simulation techniques to rapidly evaluate the grid interconnection standard conformance of an ICS according to the procedures in IEEE Std 1547.1 (TM). The architecture and test sequencing of this evaluation tool, along with a set of representative ICS test results from three different photovoltaic (PV) inverters, are presented. The GISE adds to the National Renewable Energy Laboratory's (NREL) evaluation platform that now allows for rapid development of ICS control algorithms using controller HIL (CHIL) techniques, the ability to test the dc input characteristics of PV-based ICSs through the use of a PV simulator capable of simulating real-world dynamics using power HIL (PHIL), and evaluation of ICS grid interconnection conformance.

  10. Advanced Platform for Development and Evaluation of Grid Interconnection Systems Using Hardware-in-the-Loop: Part III - Grid Interconnection System Evaluator

    Energy Technology Data Exchange (ETDEWEB)

    Lundstrom, B.; Shirazi, M.; Coddington, M.; Kroposki, B.

    2013-01-01

    This paper describes a Grid Interconnection System Evaluator (GISE) that leverages hardware-in-the-loop (HIL) simulation techniques to rapidly evaluate the grid interconnection standard conformance of an ICS according to the procedures in IEEE Std 1547.1. The architecture and test sequencing of this evaluation tool, along with a set of representative ICS test results from three different photovoltaic (PV) inverters, are presented. The GISE adds to the National Renewable Energy Laboratory's (NREL) evaluation platform that now allows for rapid development of ICS control algorithms using controller HIL (CHIL) techniques, the ability to test the dc input characteristics of PV-based ICSs through the use of a PV simulator capable of simulating real-world dynamics using power HIL (PHIL), and evaluation of ICS grid interconnection conformance.

  11. OpenStack essentials

    CERN Document Server

    Radez, Dan

    2015-01-01

    If you need to get started with OpenStack or want to learn more, then this book is your perfect companion. If you're comfortable with the Linux command line, you'll gain confidence in using OpenStack.

  12. Stack gas treatment

    Science.gov (United States)

    Reeves, Adam A.

    1977-04-12

    Hot stack gases transfer contained heat to a gravity flow of pebbles treated with a catalyst, cooled stacked gases and a sulfuric acid mist is withdrawn from the unit, and heat picked up by the pebbles is transferred to air for combustion or other process. The sulfuric acid (or sulfur, depending on the catalyst) is withdrawn in a recovery unit.

  13. Mastering OpenStack

    CERN Document Server

    Khedher, Omar

    2015-01-01

    This book is intended for system administrators, cloud engineers, and system architects who want to deploy a cloud based on OpenStack in a mid- to large-sized IT infrastructure. If you have a fundamental understanding of cloud computing and OpenStack and want to expand your knowledge, then this book is an excellent checkpoint to move forward.

  14. Stacking with stochastic cooling

    Energy Technology Data Exchange (ETDEWEB)

    Caspers, Fritz E-mail: Fritz.Caspers@cern.ch; Moehl, Dieter

    2004-10-11

    Accumulation of large stacks of antiprotons or ions with the aid of stochastic cooling is more delicate than cooling a constant intensity beam. Basically the difficulty stems from the fact that the optimized gain and the cooling rate are inversely proportional to the number of particles 'seen' by the cooling system. Therefore, to maintain fast stacking, the newly injected batch has to be strongly 'protected' from the Schottky noise of the stack. Vice versa the stack has to be efficiently 'shielded' against the high gain cooling system for the injected beam. In the antiproton accumulators with stacking ratios up to 10{sup 5} the problem is solved by radial separation of the injection and the stack orbits in a region of large dispersion. An array of several tapered cooling systems with a matched gain profile provides a continuous particle flux towards the high-density stack core. Shielding of the different systems from each other is obtained both through the spatial separation and via the revolution frequencies (filters). In the 'old AA', where the antiproton collection and stacking was done in one single ring, the injected beam was further shielded during cooling by means of a movable shutter. The complexity of these systems is very high. For more modest stacking ratios, one might use azimuthal rather than radial separation of stack and injected beam. Schematically half of the circumference would be used to accept and cool new beam and the remainder to house the stack. Fast gating is then required between the high gain cooling of the injected beam and the low gain stack cooling. RF-gymnastics are used to merge the pre-cooled batch with the stack, to re-create free space for the next injection, and to capture the new batch. This scheme is less demanding for the storage ring lattice, but at the expense of some reduction in stacking rate. The talk reviews the 'radial' separation schemes and also gives some

  15. Open Hardware at CERN

    CERN Multimedia

    CERN Knowledge Transfer Group

    2015-01-01

    CERN is actively making its knowledge and technology available for the benefit of society and does so through a variety of different mechanisms. Open hardware has in recent years established itself as a very effective way for CERN to make electronics designs and in particular printed circuit board layouts, accessible to anyone, while also facilitating collaboration and design re-use. It is creating an impact on many levels, from companies producing and selling products based on hardware designed at CERN, to new projects being released under the CERN Open Hardware Licence. Today the open hardware community includes large research institutes, universities, individual enthusiasts and companies. Many of the companies are actively involved in the entire process from design to production, delivering services and consultancy and even making their own products available under open licences.

  16. Hardware description languages

    Science.gov (United States)

    Tucker, Jerry H.

    1994-01-01

    Hardware description languages are special purpose programming languages. They are primarily used to specify the behavior of digital systems and are rapidly replacing traditional digital system design techniques. This is because they allow the designer to concentrate on how the system should operate rather than on implementation details. Hardware description languages allow a digital system to be described with a wide range of abstraction, and they support top down design techniques. A key feature of any hardware description language environment is its ability to simulate the modeled system. The two most important hardware description languages are Verilog and VHDL. Verilog has been the dominant language for the design of application specific integrated circuits (ASIC's). However, VHDL is rapidly gaining in popularity.

  17. Hardware protection through obfuscation

    CERN Document Server

    Bhunia, Swarup; Tehranipoor, Mark

    2017-01-01

    This book introduces readers to various threats faced during design and fabrication by today’s integrated circuits (ICs) and systems. The authors discuss key issues, including illegal manufacturing of ICs or “IC Overproduction,” insertion of malicious circuits, referred as “Hardware Trojans”, which cause in-field chip/system malfunction, and reverse engineering and piracy of hardware intellectual property (IP). The authors provide a timely discussion of these threats, along with techniques for IC protection based on hardware obfuscation, which makes reverse-engineering an IC design infeasible for adversaries and untrusted parties with any reasonable amount of resources. This exhaustive study includes a review of the hardware obfuscation methods developed at each level of abstraction (RTL, gate, and layout) for conventional IC manufacturing, new forms of obfuscation for emerging integration strategies (split manufacturing, 2.5D ICs, and 3D ICs), and on-chip infrastructure needed for secure exchange o...

  18. ZEUS hardware control system

    Science.gov (United States)

    Loveless, R.; Erhard, P.; Ficenec, J.; Gather, K.; Heath, G.; Iacovacci, M.; Kehres, J.; Mobayyen, M.; Notz, D.; Orr, R.; Orr, R.; Sephton, A.; Stroili, R.; Tokushuku, K.; Vogel, W.; Whitmore, J.; Wiggers, L.

    1989-12-01

    The ZEUS collaboration is building a system to monitor, control and document the hardware of the ZEUS detector. This system is based on a network of VAX computers and microprocessors connected via ethernet. The database for the hardware values will be ADAMO tables; the ethernet connection will be DECNET, TCP/IP, or RPC. Most of the documentation will also be kept in ADAMO tables for easy access by users.

  19. ZEUS hardware control system

    International Nuclear Information System (INIS)

    Loveless, R.; Erhard, P.; Ficenec, J.; Gather, K.; Heath, G.; Iacovacci, M.; Kehres, J.; Mobayyen, M.; Notz, D.; Orr, R.; Sephton, A.; Stroili, R.; Tokushuku, K.; Vogel, W.; Whitmore, J.; Wiggers, L.

    1989-01-01

    The ZEUS collaboration is building a system to monitor, control and document the hardware of the ZEUS detector. This system is based on a network of VAX computers and microprocessors connected via ethernet. The database for the hardware values will be ADAMO tables; the ethernet connection will be DECNET, TCP/IP, or RPC. Most of the documentation will also be kept in ADAMO tables for easy access by users. (orig.)

  20. Routes to a commercially viable PEM fuel cell stack

    Energy Technology Data Exchange (ETDEWEB)

    Newton, J.; Foster, S.E.; Hodgson, D.; Marrett, A.

    2002-07-01

    This report describes the results of a project to design and build a 10 kW{sub e} proton exchange membrane fuel cell (PEMFC) stack, including membrane electrode assemblies (MEAs), bipolar plates and stack hardware. The aim was to prove the design concept and to demonstrate functionality by operating the stack at >1 kW{sub e}/L and 500 W/kg for 200 hours operation. The project was extended to include the assembly and testing of two additional 1 kW{sub e} PEMFC stacks based on coated metal components. Low equivalent weight perfluorinated ionomer ion exchange membranes were prepared and were found to give a superior electrochemical performance to commercial materials. A technique to etch various stainless steel grades and control processes was successfully developed and optimised. Coatings for stainless steel and titanium were successfully developed and met the required performance criteria. All PEMFC stack components were selected and designed to enable subsequent commercial manufacture.

  1. Fuel cell hardware-in-loop

    Energy Technology Data Exchange (ETDEWEB)

    Moore, R.M.; Randolf, G.; Virji, M. [University of Hawaii, Hawaii Natural Energy Institute (United States); Hauer, K.H. [Xcellvision (Germany)

    2006-11-08

    Hardware-in-loop (HiL) methodology is well established in the automotive industry. One typical application is the development and validation of control algorithms for drive systems by simulating the vehicle plus the vehicle environment in combination with specific control hardware as the HiL component. This paper introduces the use of a fuel cell HiL methodology for fuel cell and fuel cell system design and evaluation-where the fuel cell (or stack) is the unique HiL component that requires evaluation and development within the context of a fuel cell system designed for a specific application (e.g., a fuel cell vehicle) in a typical use pattern (e.g., a standard drive cycle). Initial experimental results are presented for the example of a fuel cell within a fuel cell vehicle simulation under a dynamic drive cycle. (author)

  2. EmuStack: An OpenStack-Based DTN Network Emulation Platform (Extended Version

    Directory of Open Access Journals (Sweden)

    Haifeng Li

    2016-01-01

    Full Text Available With the advancement of computing and network virtualization technology, the networking research community shows great interest in network emulation. Compared with network simulation, network emulation can provide more relevant and comprehensive details. In this paper, EmuStack, a large-scale real-time emulation platform for Delay Tolerant Network (DTN, is proposed. EmuStack aims at empowering network emulation to become as simple as network simulation. Based on OpenStack, distributed synchronous emulation modules are developed to enable EmuStack to implement synchronous and dynamic, precise, and real-time network emulation. Meanwhile, the lightweight approach of using Docker container technology and network namespaces allows EmuStack to support a (up to hundreds of nodes large-scale topology with only several physical nodes. In addition, EmuStack integrates the Linux Traffic Control (TC tools with OpenStack for managing and emulating the virtual link characteristics which include variable bandwidth, delay, loss, jitter, reordering, and duplication. Finally, experiences with our initial implementation suggest the ability to run and debug experimental network protocol in real time. EmuStack environment would bring qualitative change in network research works.

  3. Hardware Objects for Java

    DEFF Research Database (Denmark)

    Schoeberl, Martin; Thalinger, Christian; Korsholm, Stephan

    2008-01-01

    Java, as a safe and platform independent language, avoids access to low-level I/O devices or direct memory access. In standard Java, low-level I/O it not a concern; it is handled by the operating system. However, in the embedded domain resources are scarce and a Java virtual machine (JVM) without...... an underlying middleware is an attractive architecture. When running the JVM on bare metal, we need access to I/O devices from Java; therefore we investigate a safe and efficient mechanism to represent I/O devices as first class Java objects, where device registers are represented by object fields. Access...... to those registers is safe as Java’s type system regulates it. The access is also fast as it is directly performed by the bytecodes getfield and putfield. Hardware objects thus provide an object-oriented abstraction of low-level hardware devices. As a proof of concept, we have implemented hardware objects...

  4. Stacking the Equiangular Spiral

    OpenAIRE

    Agrawal, A.; Azabi, Y. O.; Rahman, B. M.

    2013-01-01

    We present an algorithm that adapts the mature Stack and Draw (SaD) methodology for fabricating the exotic Equiangular Spiral Photonic Crystal Fiber. (ES-PCF) The principle of Steiner chains and circle packing is exploited to obtain a non-hexagonal design using a stacking procedure based on Hexagonal Close Packing. The optical properties of the proposed structure are promising for SuperContinuum Generation. This approach could make accessible not only the equiangular spiral but also other qua...

  5. Computer hardware fault administration

    Science.gov (United States)

    Archer, Charles J.; Megerian, Mark G.; Ratterman, Joseph D.; Smith, Brian E.

    2010-09-14

    Computer hardware fault administration carried out in a parallel computer, where the parallel computer includes a plurality of compute nodes. The compute nodes are coupled for data communications by at least two independent data communications networks, where each data communications network includes data communications links connected to the compute nodes. Typical embodiments carry out hardware fault administration by identifying a location of a defective link in the first data communications network of the parallel computer and routing communications data around the defective link through the second data communications network of the parallel computer.

  6. Radiation-Tolerant Intelligent Memory Stack - RTIMS

    Science.gov (United States)

    Ng, Tak-kwong; Herath, Jeffrey A.

    2011-01-01

    This innovation provides reconfigurable circuitry and 2-Gb of error-corrected or 1-Gb of triple-redundant digital memory in a small package. RTIMS uses circuit stacking of heterogeneous components and radiation shielding technologies. A reprogrammable field-programmable gate array (FPGA), six synchronous dynamic random access memories, linear regulator, and the radiation mitigation circuits are stacked into a module of 42.7 42.7 13 mm. Triple module redundancy, current limiting, configuration scrubbing, and single- event function interrupt detection are employed to mitigate radiation effects. The novel self-scrubbing and single event functional interrupt (SEFI) detection allows a relatively soft FPGA to become radiation tolerant without external scrubbing and monitoring hardware

  7. The VMTG Hardware Description

    CERN Document Server

    Puccio, B

    1998-01-01

    The document describes the hardware features of the CERN Master Timing Generator. This board is the common platform for the transmission of General Timing Machine required by the CERN accelerators. In addition, the paper shows the various jumper options to customise the card which is compliant to the VMEbus standard.

  8. The LASS hardware processor

    International Nuclear Information System (INIS)

    Kunz, P.F.

    1976-01-01

    The problems of data analysis with hardware processors are reviewed and a description is given of a programmable processor. This processor, the 168/E, has been designed for use in the LASS multi-processor system; it has an execution speed comparable to the IBM 370/168 and uses the subset of IBM 370 instructions appropriate to the LASS analysis task. (Auth.)

  9. CERN Neutrino Platform Hardware

    CERN Document Server

    Nelson, Kevin

    2017-01-01

    My summer research was broadly in CERN's neutrino platform hardware efforts. This project had two main components: detector assembly and data analysis work for ICARUS. Specifically, I worked on assembly for the ProtoDUNE project and monitored the safety of ICARUS as it was transported to Fermilab by analyzing the accelerometer data from its move.

  10. RRFC hardware operation manual

    International Nuclear Information System (INIS)

    Abhold, M.E.; Hsue, S.T.; Menlove, H.O.; Walton, G.

    1996-05-01

    The Research Reactor Fuel Counter (RRFC) system was developed to assay the 235 U content in spent Material Test Reactor (MTR) type fuel elements underwater in a spent fuel pool. RRFC assays the 235 U content using active neutron coincidence counting and also incorporates an ion chamber for gross gamma-ray measurements. This manual describes RRFC hardware, including detectors, electronics, and performance characteristics

  11. Metallorganic chemical vapor deposition and atomic layer deposition approaches for the growth of hafnium-based thin films from dialkylamide precursors for advanced CMOS gate stack applications

    Science.gov (United States)

    Consiglio, Steven P.

    the properties of conductive HfN grown via plasma-assisted atomic layer deposition (PA-ALD) using tetrakis(ethylmethylamido)hafnium on a modified commercially available wafer processing tool. Key properties of these materials for use as gate stack replacement materials are addressed and future directions for further characterization and novel material investigations are proposed.

  12. Towards stacked zone plates

    International Nuclear Information System (INIS)

    Werner, S; Rehbein, S; Guttman, P; Heim, S; Schneider, G

    2009-01-01

    Fresnel zone plates are the key optical elements for soft and hard x-ray microscopy. For short exposure times and minimum radiation load of the specimen the diffraction efficiency of the zone plate objectives has to be maximized. As the efficiency strongly depends on the height of the diffracting zone structures the achievable aspect ratio of the nanostructures determines these limits. To reach aspect ratios ≥ 20:1 for high efficient optics we propose to superimpose zone plates on top of each other. With this multiplication approach the final aspect ratio is only limited by the number of stacked zone plate layers. For the stack process several nanostructuring process steps have to be developed and/or improved. Our results show for the first time two layers of zone plates stacked on top of each other.

  13. Stochastic stacking without filters

    International Nuclear Information System (INIS)

    Johnson, R.P.; Marriner, J.

    1982-12-01

    The rate of accumulation of antiprotons is a critical factor in the design of p anti p colliders. A design of a system to accumulate higher anti p fluxes is presented here which is an alternative to the schemes used at the CERN AA and in the Fermilab Tevatron I design. Contrary to these stacking schemes, which use a system of notch filters to protect the dense core of antiprotons from the high power of the stack tail stochastic cooling, an eddy current shutter is used to protect the core in the region of the stack tail cooling kicker. Without filters one can have larger cooling bandwidths, better mixing for stochastic cooling, and easier operational criteria for the power amplifiers. In the case considered here a flux of 1.4 x 10 8 per sec is achieved with a 4 to 8 GHz bandwidth

  14. Stack filter classifiers

    Energy Technology Data Exchange (ETDEWEB)

    Porter, Reid B [Los Alamos National Laboratory; Hush, Don [Los Alamos National Laboratory

    2009-01-01

    Just as linear models generalize the sample mean and weighted average, weighted order statistic models generalize the sample median and weighted median. This analogy can be continued informally to generalized additive modeels in the case of the mean, and Stack Filters in the case of the median. Both of these model classes have been extensively studied for signal and image processing but it is surprising to find that for pattern classification, their treatment has been significantly one sided. Generalized additive models are now a major tool in pattern classification and many different learning algorithms have been developed to fit model parameters to finite data. However Stack Filters remain largely confined to signal and image processing and learning algorithms for classification are yet to be seen. This paper is a step towards Stack Filter Classifiers and it shows that the approach is interesting from both a theoretical and a practical perspective.

  15. Hardware Accelerated Simulated Radiography

    International Nuclear Information System (INIS)

    Laney, D; Callahan, S; Max, N; Silva, C; Langer, S; Frank, R

    2005-01-01

    We present the application of hardware accelerated volume rendering algorithms to the simulation of radiographs as an aid to scientists designing experiments, validating simulation codes, and understanding experimental data. The techniques presented take advantage of 32 bit floating point texture capabilities to obtain validated solutions to the radiative transport equation for X-rays. An unsorted hexahedron projection algorithm is presented for curvilinear hexahedra that produces simulated radiographs in the absorption-only regime. A sorted tetrahedral projection algorithm is presented that simulates radiographs of emissive materials. We apply the tetrahedral projection algorithm to the simulation of experimental diagnostics for inertial confinement fusion experiments on a laser at the University of Rochester. We show that the hardware accelerated solution is faster than the current technique used by scientists

  16. Sterilization of space hardware.

    Science.gov (United States)

    Pflug, I. J.

    1971-01-01

    Discussion of various techniques of sterilization of space flight hardware using either destructive heating or the action of chemicals. Factors considered in the dry-heat destruction of microorganisms include the effects of microbial water content, temperature, the physicochemical properties of the microorganism and adjacent support, and nature of the surrounding gas atmosphere. Dry-heat destruction rates of microorganisms on the surface, between mated surface areas, or buried in the solid material of space vehicle hardware are reviewed, along with alternative dry-heat sterilization cycles, thermodynamic considerations, and considerations of final sterilization-process design. Discussed sterilization chemicals include ethylene oxide, formaldehyde, methyl bromide, dimethyl sulfoxide, peracetic acid, and beta-propiolactone.

  17. Hardware characteristic and application

    International Nuclear Information System (INIS)

    Gu, Dong Hyeon

    1990-03-01

    The contents of this book are system board on memory, performance, system timer system click and specification, coprocessor such as programing interface and hardware interface, power supply on input and output, protection for DC output, Power Good signal, explanation on 84 keyboard and 101/102 keyboard,BIOS system, 80286 instruction set and 80287 coprocessor, characters, keystrokes and colors, communication and compatibility of IBM personal computer on application direction, multitasking and code for distinction of system.

  18. Laser pulse stacking method

    Science.gov (United States)

    Moses, E.I.

    1992-12-01

    A laser pulse stacking method is disclosed. A problem with the prior art has been the generation of a series of laser beam pulses where the outer and inner regions of the beams are generated so as to form radially non-synchronous pulses. Such pulses thus have a non-uniform cross-sectional area with respect to the outer and inner edges of the pulses. The present invention provides a solution by combining the temporally non-uniform pulses in a stacking effect to thus provide a more uniform temporal synchronism over the beam diameter. 2 figs.

  19. Quantum neuromorphic hardware for quantum artificial intelligence

    Science.gov (United States)

    Prati, Enrico

    2017-08-01

    The development of machine learning methods based on deep learning boosted the field of artificial intelligence towards unprecedented achievements and application in several fields. Such prominent results were made in parallel with the first successful demonstrations of fault tolerant hardware for quantum information processing. To which extent deep learning can take advantage of the existence of a hardware based on qubits behaving as a universal quantum computer is an open question under investigation. Here I review the convergence between the two fields towards implementation of advanced quantum algorithms, including quantum deep learning.

  20. Carbonate fuel cell endurance: Hardware corrosion and electrolyte management status

    Energy Technology Data Exchange (ETDEWEB)

    Yuh, C.; Johnsen, R.; Farooque, M.; Maru, H.

    1993-01-01

    Endurance tests of carbonate fuel cell stacks (up to 10,000 hours) have shown that hardware corrosion and electrolyte losses can be reasonably controlled by proper material selection and cell design. Corrosion of stainless steel current collector hardware, nickel clad bipolar plate and aluminized wet seal show rates within acceptable limits. Electrolyte loss rate to current collector surface has been minimized by reducing exposed current collector surface area. Electrolyte evaporation loss appears tolerable. Electrolyte redistribution has been restrained by proper design of manifold seals.

  1. Carbonate fuel cell endurance: Hardware corrosion and electrolyte management status

    Energy Technology Data Exchange (ETDEWEB)

    Yuh, C.; Johnsen, R.; Farooque, M.; Maru, H.

    1993-05-01

    Endurance tests of carbonate fuel cell stacks (up to 10,000 hours) have shown that hardware corrosion and electrolyte losses can be reasonably controlled by proper material selection and cell design. Corrosion of stainless steel current collector hardware, nickel clad bipolar plate and aluminized wet seal show rates within acceptable limits. Electrolyte loss rate to current collector surface has been minimized by reducing exposed current collector surface area. Electrolyte evaporation loss appears tolerable. Electrolyte redistribution has been restrained by proper design of manifold seals.

  2. Learning SaltStack

    CERN Document Server

    Myers, Colton

    2015-01-01

    If you are a system administrator who manages multiple servers, then you know how difficult it is to keep your infrastructure in line. If you've been searching for an easier way, this book is for you. No prior experience with SaltStack is required.

  3. Progress of MCFC stack technology at Toshiba

    Energy Technology Data Exchange (ETDEWEB)

    Hori, M.; Hayashi, T.; Shimizu, Y. [Toshiba Corp., Tokyo (Japan)

    1996-12-31

    Toshiba is working on the development of MCFC stack technology; improvement of cell characteristics, and establishment of separator technology. For the cell technology, Toshiba has concentrated on both the restraints of NiO cathode dissolution and electrolyte loss from cells, which are the critical issues to extend cell life in MCFC, and great progress has been made. On the other hand, recognizing that the separator is one of key elements in accomplishing reliable and cost-competitive MCFC stacks, Toshiba has been accelerating the technology establishment and verification of an advanced type separator. A sub-scale stack with such a separator was provided for an electric generating test, and has been operated for more than 10,000 hours. This paper presents several topics obtained through the technical activities in the MCFC field at Toshiba.

  4. Detailed Electrochemical Characterisation of Large SOFC Stacks

    DEFF Research Database (Denmark)

    Mosbæk, Rasmus Rode; Hjelm, Johan; Barfod, R.

    2012-01-01

    application of advanced methods for detailed electrochemical characterisation during operation. An operating stack is subject to steep compositional gradients in the gaseous reactant streams, and significant temperature gradients across each cell and across the stack, which makes it a complex system...... Fuel Cell A/S was characterised in detail using electrochemical impedance spectroscopy. An investigation of the optimal geometrical placement of the current probes and voltage probes was carried out in order to minimise measurement errors caused by stray impedances. Unwanted stray impedances...... are particularly problematic at high frequencies. Stray impedances may be caused by mutual inductance and stray capacitance in the geometrical set-up and do not describe the fuel cell. Three different stack geometries were investigated by electrochemical impedance spectroscopy. Impedance measurements were carried...

  5. Fuel flow distribution in SOFC stacks revealed by impedance spectroscopy

    DEFF Research Database (Denmark)

    Mosbæk, Rasmus Rode; Hjelm, Johan; Barfod, Rasmus

    2014-01-01

    As SOFC technology is moving closer to a commercial break through, methods to measure the “state-of-health” of operating stacks are becoming of increasing interest. This requires application of advanced methods for detailed electrical and electrochemical characterization during operation. An oper......As SOFC technology is moving closer to a commercial break through, methods to measure the “state-of-health” of operating stacks are becoming of increasing interest. This requires application of advanced methods for detailed electrical and electrochemical characterization during operation...... utilizations. The fuel flow distribution provides important information about the operating limits of the stack when high electrical efficiency is required....

  6. COMPUTER HARDWARE MARKING

    CERN Multimedia

    Groupe de protection des biens

    2000-01-01

    As part of the campaign to protect CERN property and for insurance reasons, all computer hardware belonging to the Organization must be marked with the words 'PROPRIETE CERN'.IT Division has recently introduced a new marking system that is both economical and easy to use. From now on all desktop hardware (PCs, Macintoshes, printers) issued by IT Division with a value equal to or exceeding 500 CHF will be marked using this new system.For equipment that is already installed but not yet marked, including UNIX workstations and X terminals, IT Division's Desktop Support Service offers the following services free of charge:Equipment-marking wherever the Service is called out to perform other work (please submit all work requests to the IT Helpdesk on 78888 or helpdesk@cern.ch; for unavoidable operational reasons, the Desktop Support Service will only respond to marking requests when these coincide with requests for other work such as repairs, system upgrades, etc.);Training of personnel designated by Division Leade...

  7. OpenStack cloud security

    CERN Document Server

    Locati, Fabio Alessandro

    2015-01-01

    If you are an OpenStack administrator or developer, or wish to build solutions to protect your OpenStack environment, then this book is for you. Experience of Linux administration and familiarity with different OpenStack components is assumed.

  8. Foundations of hardware IP protection

    CERN Document Server

    Torres, Lionel

    2017-01-01

    This book provides a comprehensive and up-to-date guide to the design of security-hardened, hardware intellectual property (IP). Readers will learn how IP can be threatened, as well as protected, by using means such as hardware obfuscation/camouflaging, watermarking, fingerprinting (PUF), functional locking, remote activation, hidden transmission of data, hardware Trojan detection, protection against hardware Trojan, use of secure element, ultra-lightweight cryptography, and digital rights management. This book serves as a single-source reference to design space exploration of hardware security and IP protection. · Provides readers with a comprehensive overview of hardware intellectual property (IP) security, describing threat models and presenting means of protection, from integrated circuit layout to digital rights management of IP; · Enables readers to transpose techniques fundamental to digital rights management (DRM) to the realm of hardware IP security; · Introduce designers to the concept of salutar...

  9. Open hardware for open science

    CERN Multimedia

    CERN Bulletin

    2011-01-01

    Inspired by the open source software movement, the Open Hardware Repository was created to enable hardware developers to share the results of their R&D activities. The recently published CERN Open Hardware Licence offers the legal framework to support this knowledge and technology exchange.   Two years ago, a group of electronics designers led by Javier Serrano, a CERN engineer, working in experimental physics laboratories created the Open Hardware Repository (OHR). This project was initiated in order to facilitate the exchange of hardware designs across the community in line with the ideals of “open science”. The main objectives include avoiding duplication of effort by sharing results across different teams that might be working on the same need. “For hardware developers, the advantages of open hardware are numerous. For example, it is a great learning tool for technologies some developers would not otherwise master, and it avoids unnecessary work if someone ha...

  10. Stacked magnet superconducting bearing

    International Nuclear Information System (INIS)

    Rigney, T.K. II; Saville, M.P.

    1993-01-01

    A superconducting bearing is described, comprising: a plurality of permanent magnets magnetized end-to-end and stacked side-by-side in alternating polarity, such that flux lines flow between ends of adjacent magnets; isolating means, disposed between said adjacent magnets, for reducing flux leakage between opposing sides of said adjacent magnets; and a member made of superconducting material having at least one surface in communication with said flux lines

  11. Iridium Interfacial Stack (IRIS)

    Science.gov (United States)

    Spry, David James (Inventor)

    2015-01-01

    An iridium interfacial stack ("IrIS") and a method for producing the same are provided. The IrIS may include ordered layers of TaSi.sub.2, platinum, iridium, and platinum, and may be placed on top of a titanium layer and a silicon carbide layer. The IrIS may prevent, reduce, or mitigate against diffusion of elements such as oxygen, platinum, and gold through at least some of its layers.

  12. Hardware Middleware for Person Tracking on Embedded Distributed Smart Cameras

    Directory of Open Access Journals (Sweden)

    Ali Akbar Zarezadeh

    2012-01-01

    Full Text Available Tracking individuals is a prominent application in such domains like surveillance or smart environments. This paper provides a development of a multiple camera setup with jointed view that observes moving persons in a site. It focuses on a geometry-based approach to establish correspondence among different views. The expensive computational parts of the tracker are hardware accelerated via a novel system-on-chip (SoC design. In conjunction with this vision application, a hardware object request broker (ORB middleware is presented as the underlying communication system. The hardware ORB provides a hardware/software architecture to achieve real-time intercommunication among multiple smart cameras. Via a probing mechanism, a performance analysis is performed to measure network latencies, that is, time traversing the TCP/IP stack, in both software and hardware ORB approaches on the same smart camera platform. The empirical results show that using the proposed hardware ORB as client and server in separate smart camera nodes will considerably reduce the network latency up to 100 times compared to the software ORB.

  13. Stack monitor for the Proof-of-Breeding Project

    International Nuclear Information System (INIS)

    Fergus, R.W.

    1985-01-01

    This stack monitor system is a coordinated arrangement of hardware and software to monitor four hot cells (8 stacks) during the fuel dissection for the Proof-of-Breeding Project. The cell monitors, which are located in fan lofts, contain a microprocessor, radiation detectors, air flow sensors, and air flow control equipment. Design criteria included maximizing microprocessor control while minimizing the hardware complexity. The monitors have been programmed to produce concentration and total activity release data based on several detector measurements and flow rates. Although each monitor can function independently, a microcomputer can also be used to control each cell monitor including reprogramming if necessary. All programming is software, as opposed to firmware, with machine language for compactness in the cell monitors and Basic language for adaptability in the microcomputer controller

  14. New approach for dynamic flow management within the PEMFC stack

    International Nuclear Information System (INIS)

    Varlam, Mihai; Culcer, Mihai; Carcadea, Elena; Stefanescu, Ioan; Iliescu, Mariana; Enache, Adrian

    2009-01-01

    An adequate gas and water flow management is a key issue to reach and maintain a higher output power for a PEM fuel cell stack. One of the main aspects which could limit the performance of a PEM fuel cell stack is the weak capability for a non-uniform water distribution management within the fuel cell. The produced water could become a handicap to attain the best working performance by blocking the catalytic surfaces and by preventing the mass transport process. Usually, the excess water is removed in one cell, comparatively to others from the stack and taking into account that all the cells are supplied in parallel from a common air admission pipe, a limitation of gas flow rate within that cell is created. Consequently, this constraint will reduce further the water removal speed. This feedback process will generate finally a drastic decrease of the fuel cell stack performance. A new practical solution to this water and gas non-uniformity of distributions problem is to use a sequential purge procedure of several fuel cell groups inside the stack which could guarantee a right management of water. An experimental setup has been built based on four fuel cell stack. Every fuel cell was connected to a single removal pipe via a solenoid valve. A computer-controlled hardware and software system has been designed and built, in order to generate a given opening-closing sequence for the automatic valve system. (authors)

  15. Hardware Support for Embedded Java

    DEFF Research Database (Denmark)

    Schoeberl, Martin

    2012-01-01

    The general Java runtime environment is resource hungry and unfriendly for real-time systems. To reduce the resource consumption of Java in embedded systems, direct hardware support of the language is a valuable option. Furthermore, an implementation of the Java virtual machine in hardware enables...... worst-case execution time analysis of Java programs. This chapter gives an overview of current approaches to hardware support for embedded and real-time Java....

  16. HARDWARE TROJAN IDENTIFICATION AND DETECTION

    OpenAIRE

    Samer Moein; Fayez Gebali; T. Aaron Gulliver; Abdulrahman Alkandari

    2017-01-01

    ABSTRACT The majority of techniques developed to detect hardware trojans are based on specific attributes. Further, the ad hoc approaches employed to design methods for trojan detection are largely ineffective. Hardware trojans have a number of attributes which can be used to systematically develop detection techniques. Based on this concept, a detailed examination of current trojan detection techniques and the characteristics of existing hardware trojans is presented. This is used to dev...

  17. MEAN STACK WEB DEVELOPMENT

    OpenAIRE

    Le Thanh, Nghi

    2017-01-01

    The aim of the thesis is to provide a universal website using JavaScript as the main programming language. It also shows the basic parts anyone need to create a web application. The thesis creates a simple CMS using MEAN stack. MEAN is a collection of JavaScript based technologies used to develop web application. It is an acronym for MongoDB, Express, AngularJS and Node.js. It also allows non-technical users to easily update and manage a website’s content. But the application also lets o...

  18. Die-stacking architecture

    CERN Document Server

    Xie, Yuan

    2015-01-01

    The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors. 3D memory stacking enables much higher memory bandwidth for future chip-multiprocessor design, mitigating the ""memory wall"" problem. In addition, heterogenous integration enabled by 3D technology can also result in innovative designs for future microprocessors. This book first provides a brief introduction to this emerging technology, and then presents a variety of approaches to design

  19. Open Source Hardware for DIY Environmental Sensing

    Science.gov (United States)

    Aufdenkampe, A. K.; Hicks, S. D.; Damiano, S. G.; Montgomery, D. S.

    2014-12-01

    The Arduino open source electronics platform has been very popular within the DIY (Do It Yourself) community for several years, and it is now providing environmental science researchers with an inexpensive alternative to commercial data logging and transmission hardware. Here we present the designs for our latest series of custom Arduino-based dataloggers, which include wireless communication options like self-meshing radio networks and cellular phone modules. The main Arduino board uses a custom interface board to connect to various research-grade sensors to take readings of turbidity, dissolved oxygen, water depth and conductivity, soil moisture, solar radiation, and other parameters. Sensors with SDI-12 communications can be directly interfaced to the logger using our open Arduino-SDI-12 software library (https://github.com/StroudCenter/Arduino-SDI-12). Different deployment options are shown, like rugged enclosures to house the loggers and rigs for mounting the sensors in both fresh water and marine environments. After the data has been collected and transmitted by the logger, the data is received by a mySQL-PHP stack running on a web server that can be accessed from anywhere in the world. Once there, the data can be visualized on web pages or served though REST requests and Water One Flow (WOF) services. Since one of the main benefits of using open source hardware is the easy collaboration between users, we are introducing a new web platform for discussion and sharing of ideas and plans for hardware and software designs used with DIY environmental sensors and data loggers.

  20. Hardware assisted hypervisor introspection.

    Science.gov (United States)

    Shi, Jiangyong; Yang, Yuexiang; Tang, Chuan

    2016-01-01

    In this paper, we introduce hypervisor introspection, an out-of-box way to monitor the execution of hypervisors. Similar to virtual machine introspection which has been proposed to protect virtual machines in an out-of-box way over the past decade, hypervisor introspection can be used to protect hypervisors which are the basis of cloud security. Virtual machine introspection tools are usually deployed either in hypervisor or in privileged virtual machines, which might also be compromised. By utilizing hardware support including nested virtualization, EPT protection and #BP, we are able to monitor all hypercalls belongs to the virtual machines of one hypervisor, include that of privileged virtual machine and even when the hypervisor is compromised. What's more, hypercall injection method is used to simulate hypercall-based attacks and evaluate the performance of our method. Experiment results show that our method can effectively detect hypercall-based attacks with some performance cost. Lastly, we discuss our furture approaches of reducing the performance cost and preventing the compromised hypervisor from detecting the existence of our introspector, in addition with some new scenarios to apply our hypervisor introspection system.

  1. LHCb: Hardware Data Injector

    CERN Multimedia

    Delord, V; Neufeld, N

    2009-01-01

    The LHCb High Level Trigger and Data Acquisition system selects about 2 kHz of events out of the 1 MHz of events, which have been selected previously by the first-level hardware trigger. The selected events are consolidated into files and then sent to permanent storage for subsequent analysis on the Grid. The goal of the upgrade of the LHCb readout is to lift the limitation to 1 MHz. This means speeding up the DAQ to 40 MHz. Such a DAQ system will certainly employ 10 Gigabit or technologies and might also need new networking protocols: a customized TCP or proprietary solutions. A test module is being presented, which integrates in the existing LHCb infrastructure. It is a 10-Gigabit traffic generator, flexible enough to generate LHCb's raw data packets using dummy data or simulated data. These data are seen as real data coming from sub-detectors by the DAQ. The implementation is based on an FPGA using 10 Gigabit Ethernet interface. This module is integrated in the experiment control system. The architecture, ...

  2. Consolidity: Stack-based systems change pathway theory elaborated

    Directory of Open Access Journals (Sweden)

    Hassen Taher Dorrah

    2014-06-01

    , programming and hardware representations of each stack layering type to serve in reducing tremendously any repetitive research efforts in future handling of similar or analogous problems of real life systems. Finally, a new global inter-related stack-based configuration in multi-stacking networks is proposed incorporating conceptually the mutual stack-based changes balancing process through assumed ideal case of lossless bi-directional transfer piping systems.

  3. Hardware for soft computing and soft computing for hardware

    CERN Document Server

    Nedjah, Nadia

    2014-01-01

    Single and Multi-Objective Evolutionary Computation (MOEA),  Genetic Algorithms (GAs), Artificial Neural Networks (ANNs), Fuzzy Controllers (FCs), Particle Swarm Optimization (PSO) and Ant colony Optimization (ACO) are becoming omnipresent in almost every intelligent system design. Unfortunately, the application of the majority of these techniques is complex and so requires a huge computational effort to yield useful and practical results. Therefore, dedicated hardware for evolutionary, neural and fuzzy computation is a key issue for designers. With the spread of reconfigurable hardware such as FPGAs, digital as well as analog hardware implementations of such computation become cost-effective. The idea behind this book is to offer a variety of hardware designs for soft computing techniques that can be embedded in any final product. Also, to introduce the successful application of soft computing technique to solve many hard problem encountered during the design of embedded hardware designs. Reconfigurable em...

  4. FY1995 evolvable hardware chip; 1995 nendo shinkasuru hardware chip

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1997-03-01

    This project aims at the development of 'Evolvable Hardware' (EHW) which can adapt its hardware structure to the environment to attain better hardware performance, under the control of genetic algorithms. EHW is a key technology to explore the new application area requiring real-time performance and on-line adaptation. 1. Development of EHW-LSI for function level hardware evolution, which includes 15 DSPs in one chip. 2. Application of the EHW to the practical industrial applications such as data compression, ATM control, digital mobile communication. 3. Two patents : (1) the architecture and the processing method for programmable EHW-LSI. (2) The method of data compression for loss-less data, using EHW. 4. The first international conference for evolvable hardware was held by authors: Intl. Conf. on Evolvable Systems (ICES96). It was determined at ICES96 that ICES will be held every two years between Japan and Europe. So the new society has been established by us. (NEDO)

  5. Asymmetric Flexible Supercapacitor Stack

    Directory of Open Access Journals (Sweden)

    Leela Mohana Reddy A

    2008-01-01

    Full Text Available AbstractElectrical double layer supercapacitor is very significant in the field of electrical energy storage which can be the solution for the current revolution in the electronic devices like mobile phones, camera flashes which needs flexible and miniaturized energy storage device with all non-aqueous components. The multiwalled carbon nanotubes (MWNTs have been synthesized by catalytic chemical vapor deposition technique over hydrogen decrepitated Mischmetal (Mm based AB3alloy hydride. The polymer dispersed MWNTs have been obtained by insitu polymerization and the metal oxide/MWNTs were synthesized by sol-gel method. Morphological characterizations of polymer dispersed MWNTs have been carried out using scanning electron microscopy (SEM, transmission electron microscopy (TEM and HRTEM. An assymetric double supercapacitor stack has been fabricated using polymer/MWNTs and metal oxide/MWNTs coated over flexible carbon fabric as electrodes and nafion®membrane as a solid electrolyte. Electrochemical performance of the supercapacitor stack has been investigated using cyclic voltammetry, galvanostatic charge-discharge, and electrochemical impedance spectroscopy.

  6. Secure coupling of hardware components

    NARCIS (Netherlands)

    Hoepman, J.H.; Joosten, H.J.M.; Knobbe, J.W.

    2011-01-01

    A method and a system for securing communication between at least a first and a second hardware components of a mobile device is described. The method includes establishing a first shared secret between the first and the second hardware components during an initialization of the mobile device and,

  7. Instant BlueStacks

    CERN Document Server

    Judge, Gary

    2013-01-01

    Get to grips with a new technology, understand what it is and what it can do for you, and then get to work with the most important features and tasks. A fast-paced, example-based approach guide for learning BlueStacks.This book is for anyone with a Mac or PC who wants to run Android apps on their computer. Whether you want to play games that are freely available for Android but not your computer, or you want to try apps before you install them on a physical device or use it as a development tool, this book will show you how. No previous experience is needed as this is written in plain English

  8. Flight Avionics Hardware Roadmap

    Science.gov (United States)

    Hodson, Robert; McCabe, Mary; Paulick, Paul; Ruffner, Tim; Some, Rafi; Chen, Yuan; Vitalpur, Sharada; Hughes, Mark; Ling, Kuok; Redifer, Matt; hide

    2013-01-01

    As part of NASA's Avionics Steering Committee's stated goal to advance the avionics discipline ahead of program and project needs, the committee initiated a multi-Center technology roadmapping activity to create a comprehensive avionics roadmap. The roadmap is intended to strategically guide avionics technology development to effectively meet future NASA missions needs. The scope of the roadmap aligns with the twelve avionics elements defined in the ASC charter, but is subdivided into the following five areas: Foundational Technology (including devices and components), Command and Data Handling, Spaceflight Instrumentation, Communication and Tracking, and Human Interfaces.

  9. Utilizing IXP1200 hardware and software for packet filtering

    OpenAIRE

    Lindholm, Jeffery L.

    2004-01-01

    As network processors have advanced in speed and efficiency they have become more and more complex in both hardware and software configurations. Intel's IXP1200 is one of these new network processors that has been given to different universities worldwide to conduct research on. The goal of this thesis is to take the first step in starting that research by providing a stable system that can provide a reliable platform for further research. This thesis introduces the fundamental hardware of In...

  10. Assessing Elementary Algebra with STACK

    Science.gov (United States)

    Sangwin, Christopher J.

    2007-01-01

    This paper concerns computer aided assessment (CAA) of mathematics in which a computer algebra system (CAS) is used to help assess students' responses to elementary algebra questions. Using a methodology of documentary analysis, we examine what is taught in elementary algebra. The STACK CAA system, http://www.stack.bham.ac.uk/, which uses the CAS…

  11. Spherical Torus Center Stack Design

    International Nuclear Information System (INIS)

    C. Neumeyer; P. Heitzenroeder; C. Kessel; M. Ono; M. Peng; J. Schmidt; R. Woolley; I. Zatz

    2002-01-01

    The low aspect ratio spherical torus (ST) configuration requires that the center stack design be optimized within a limited available space, using materials within their established allowables. This paper presents center stack design methods developed by the National Spherical Torus Experiment (NSTX) Project Team during the initial design of NSTX, and more recently for studies of a possible next-step ST (NSST) device

  12. ATLAS software stack on ARM64

    CERN Document Server

    Smith, Joshua Wyatt; The ATLAS collaboration

    2016-01-01

    The ATLAS experiment explores new hardware and software platforms that, in the future, may be more suited to its data intensive workloads. One such alternative hardware platform is the ARM architecture, which is designed to be extremely power efficient and is found in most smartphones and tablets. CERN openlab recently installed a small cluster of ARM 64-bit evaluation prototype servers. Each server is based on a single-socket ARM 64-bit system on a chip, with 32 Cortex-A57 cores. In total, each server has 128 GB RAM connected with four fast memory channels. This paper reports on the port of the ATLAS software stack onto these new prototype ARM64 servers. This included building the "external" packages that the ATLAS software relies on. Patches were needed to introduce this new architecture into the build as well as patches that correct for platform specific code that caused failures on non-x86 architectures. These patches were applied such that porting to further platforms will need no or only very little adj...

  13. Protection of Microkernel Environment L4Re from Stack-smashed Attacks

    OpenAIRE

    Vasily Andreevich Sartakov; Alexander Sergeevich Tarasikov

    2014-01-01

    Microkernel-based operating systems provide high level of protection due to the strong isolation of components, small size of Trusted Computing Base and execution of drivers in user space. At the same time, such systems are vulnerable to a stack overflow attacks, because these attacks exploit the hardware features of the platform, such as shared memory space for data and code. Modern architectures, such as AMD64 and ARM, provide opportunities to counteract attacks at the hardware level by dis...

  14. NDAS Hardware Translation Layer Development

    Science.gov (United States)

    Nazaretian, Ryan N.; Holladay, Wendy T.

    2011-01-01

    The NASA Data Acquisition System (NDAS) project is aimed to replace all DAS software for NASA s Rocket Testing Facilities. There must be a software-hardware translation layer so the software can properly talk to the hardware. Since the hardware from each test stand varies, drivers for each stand have to be made. These drivers will act more like plugins for the software. If the software is being used in E3, then the software should point to the E3 driver package. If the software is being used at B2, then the software should point to the B2 driver package. The driver packages should also be filled with hardware drivers that are universal to the DAS system. For example, since A1, A2, and B2 all use the Preston 8300AU signal conditioners, then the driver for those three stands should be the same and updated collectively.

  15. Modeling fuel cell stack systems

    Energy Technology Data Exchange (ETDEWEB)

    Lee, J H [Los Alamos National Lab., Los Alamos, NM (United States); Lalk, T R [Dept. of Mech. Eng., Texas A and M Univ., College Station, TX (United States)

    1998-06-15

    A technique for modeling fuel cell stacks is presented along with the results from an investigation designed to test the validity of the technique. The technique was specifically designed so that models developed using it can be used to determine the fundamental thermal-physical behavior of a fuel cell stack for any operating and design configuration. Such models would be useful tools for investigating fuel cell power system parameters. The modeling technique can be applied to any type of fuel cell stack for which performance data is available for a laboratory scale single cell. Use of the technique is demonstrated by generating sample results for a model of a Proton Exchange Membrane Fuel Cell (PEMFC) stack consisting of 125 cells each with an active area of 150 cm{sup 2}. A PEMFC stack was also used in the verification investigation. This stack consisted of four cells, each with an active area of 50 cm{sup 2}. Results from the verification investigation indicate that models developed using the technique are capable of accurately predicting fuel cell stack performance. (orig.)

  16. Environmental assessment of phosphogypsum stacks

    International Nuclear Information System (INIS)

    Odat, M.; Al-Attar, L.; Raja, G.; Abdul Ghany, B.

    2009-01-01

    Phosphogypsum is one of the most important by-products of phosphate fertilizer industry. It is kept in large stacks to the west of Homs city. Storing Phosphogypsum as open stacks exposed to various environmental effects, wind and rain, may cause pollution of the surrounding ecosystem (soil, plant, water and air). This study was carried out in order to assess the environmental impact of Phosphogypsum stacks on the surrounding ecosystem. The obtained results show that Phosphogypsum stacks did not increase the concentration of radionuclides, i.e. Radon-222 and Radium-226, the external exposed dose of gamma rays, as well as the concentration of heavy metals in the components of the ecosystem, soil, plant, water and air, as their concentrations did not exceed the permissible limits. However, the concentration of fluorine in the upper layer of soil, located to the east of the Phosphogypsum stacks, increased sufficiently, especially in the dry period of the year. Also, the concentration of fluoride in plants growing up near-by the Phosphogypsum stacks was too high, exceeded the permissible levels. This was reflected in poising plants and animals, feeding on the plants. Consequently, increasing the concentration of fluoride in soil and plants is the main impact of Phosphogypsum stacks on the surrounding ecosystem. Minimising this effect could be achieved by establishing a 50 meter wide protection zone surrounding the Phosphogypsum stacks, which has to be planted with non palatable trees, such as pine and cypress, forming wind barriers. Increasing the concentrations of heavy metals and fluoride in infiltrated water around the stacks was high; hence cautions must be taken to prevent its usage in any application or disposal in adjacent rivers and leaks.(author)

  17. Environmental assessment of phosphogypsum stacks

    International Nuclear Information System (INIS)

    Odat, M.; Al-Attar, L.; Raja, G.; Abdul Ghany, B.

    2008-03-01

    Phosphogypsum is one of the most important by-products of phosphate fertilizer industry. It is kept in large stacks to the west of Homs city. Storing Phosphogypsum as open stacks exposed to various environmental effects, wind and rain, may cause pollution of the surrounding ecosystem (soil, plant, water and air). This study was carried out in order to assess the environmental impact of Phosphogypsum stacks on the surrounding ecosystem. The obtained results show that Phosphogypsum stacks did not increase the concentration of radionuclides, i.e. Radon-222 and Radium-226, the external exposed dose of gamma rays, as well as the concentration of heavy metals in the components of the ecosystem, soil, plant, water and air, as their concentrations did not exceed the permissible limits. However, the concentration of fluorine in the upper layer of soil, located to the east of the Phosphogypsum stacks, increased sufficiently, especially in the dry period of the year. Also, the concentration of fluoride in plants growing up near-by the Phosphogypsum stacks was too high, exceeded the permissible levels. This was reflected in poising plants and animals, feeding on the plants. Consequently, increasing the concentration of fluoride in soil and plants is the main impact of Phosphogypsum stacks on the surrounding ecosystem. Minimising this effect could be achieved by establishing a 50 meter wide protection zone surrounding the Phosphogypsum stacks, which has to be planted with non palatable trees, such as pine and cypress, forming wind barriers. Increasing the concentrations of heavy metals and fluoride in infiltrated water around the stacks was high; hence cautions must be taken to prevent its usage in any application or disposal in adjacent rivers and leaks.(author)

  18. FY1995 evolvable hardware chip; 1995 nendo shinkasuru hardware chip

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1997-03-01

    This project aims at the development of 'Evolvable Hardware' (EHW) which can adapt its hardware structure to the environment to attain better hardware performance, under the control of genetic algorithms. EHW is a key technology to explore the new application area requiring real-time performance and on-line adaptation. 1. Development of EHW-LSI for function level hardware evolution, which includes 15 DSPs in one chip. 2. Application of the EHW to the practical industrial applications such as data compression, ATM control, digital mobile communication. 3. Two patents : (1) the architecture and the processing method for programmable EHW-LSI. (2) The method of data compression for loss-less data, using EHW. 4. The first international conference for evolvable hardware was held by authors: Intl. Conf. on Evolvable Systems (ICES96). It was determined at ICES96 that ICES will be held every two years between Japan and Europe. So the new society has been established by us. (NEDO)

  19. Advanced Simulation Center

    Data.gov (United States)

    Federal Laboratory Consortium — The Advanced Simulation Center consists of 10 individual facilities which provide missile and submunition hardware-in-the-loop simulation capabilities. The following...

  20. Raspberry Pi hardware projects 1

    CERN Document Server

    Robinson, Andrew

    2013-01-01

    Learn how to take full advantage of all of Raspberry Pi's amazing features and functions-and have a blast doing it! Congratulations on becoming a proud owner of a Raspberry Pi, the credit-card-sized computer! If you're ready to dive in and start finding out what this amazing little gizmo is really capable of, this ebook is for you. Taken from the forthcoming Raspberry Pi Projects, Raspberry Pi Hardware Projects 1 contains three cool hardware projects that let you have fun with the Raspberry Pi while developing your Raspberry Pi skills. The authors - PiFace inventor, Andrew Robinson and Rasp

  1. A mathematical model of an automatic assembler to stack fuel pellets

    International Nuclear Information System (INIS)

    Jarvis, R.G.; Joynes, R.; Bretzlaff, C.I.

    1980-11-01

    Fuel elements for CANDU reactors are assembled from stacks of cylindrical UO 2 pellets, with close tolerances on lengths and diameters. Present stacking techniques involve extensive manual operations and they can be speeded up and reduced in cost by an automated device. If gamma-active fuel is handled such a device is essential. An automatic fuel pellet assembly process was modelled mathematically. The model indicated a suitable sequence of pellet manipulations to arrive at a stack length that was always within tolerance. This sequence was used as the inital input for the design of mechanical hardware. The mechanical design and the refinement of the mathematical model proceeded simultaneously. Mechanical constraints were allowed for in the model, and its optimized sequence of operations was incorporated in a microcomputer program to control the mechanical hardware. (auth)

  2. Dynamic stack testing and HiL simulation

    Energy Technology Data Exchange (ETDEWEB)

    Randolf, G. [GRandalytics, Honolulu, HI (United States)

    2009-07-01

    The applications for fuel cell and stack deployment have changed rapidly over the years, from stationary backup supplies to highly dynamic automotive power systems. As a result, testing must keep up in order to ensure mature products of high quality. A new breed of stack test stations has been designed, based on a newly developed single cell, high dynamic hardware-in-the-loop (HiL) simulator in order to meet the growing demand of realistic fuel cell testing scenarios for aviation and automotive industries. The paper described and illustrated the test station architecture and outline of communication nodes. The paper also described the voltage monitor and presented schematics of voltage monitoring modules. The basic requirements of the architecture that were presented included low latency; flexible communication with simulation targets and other data input/output nodes; scalability to various stack sizes; and, safety and reliability. It was concluded that first tests with the voltage monitoring system not only confirmed the design, high throughput and signal quality, but also suggested another application, namely a stack impedance spectrometer for each individual cell. 1 ref., 3 figs.

  3. Hardware standardization for embedded systems

    International Nuclear Information System (INIS)

    Sharma, M.K.; Kalra, Mohit; Patil, M.B.; Mohanty, Ashutos; Ganesh, G.; Biswas, B.B.

    2010-01-01

    Reactor Control Division (RCnD) has been one of the main designers of safety and safety related systems for power reactors. These systems have been built using in-house developed hardware. Since the present set of hardware was designed long ago, a need was felt to design a new family of hardware boards. A Working Group on Electronics Hardware Standardization (WG-EHS) was formed with an objective to develop a family of boards, which is general purpose enough to meet the requirements of the system designers/end users. RCnD undertook the responsibility of design, fabrication and testing of boards for embedded systems. VME and a proprietary I/O bus were selected as the two system buses. The boards have been designed based on present day technology and components. The intelligence of these boards has been implemented on FPGA/CPLD using VHDL. This paper outlines the various boards that have been developed with a brief description. (author)

  4. Commodity hardware and software summary

    International Nuclear Information System (INIS)

    Wolbers, S.

    1997-04-01

    A review is given of the talks and papers presented in the Commodity Hardware and Software Session at the CHEP97 conference. An examination of the trends leading to the consideration of PC's for HEP is given, and a status of the work that is being done at various HEP labs and Universities is given

  5. CSNS computing environment Based on OpenStack

    Science.gov (United States)

    Li, Yakang; Qi, Fazhi; Chen, Gang; Wang, Yanming; Hong, Jianshu

    2017-10-01

    Cloud computing can allow for more flexible configuration of IT resources and optimized hardware utilization, it also can provide computing service according to the real need. We are applying this computing mode to the China Spallation Neutron Source(CSNS) computing environment. So, firstly, CSNS experiment and its computing scenarios and requirements are introduced in this paper. Secondly, the design and practice of cloud computing platform based on OpenStack are mainly demonstrated from the aspects of cloud computing system framework, network, storage and so on. Thirdly, some improvments to openstack we made are discussed further. Finally, current status of CSNS cloud computing environment are summarized in the ending of this paper.

  6. Foundations of digital signal processing theory, algorithms and hardware design

    CERN Document Server

    Gaydecki, Patrick

    2005-01-01

    An excellent introductory text, this book covers the basic theoretical, algorithmic and real-time aspects of digital signal processing (DSP). Detailed information is provided on off-line, real-time and DSP programming and the reader is effortlessly guided through advanced topics such as DSP hardware design, FIR and IIR filter design and difference equation manipulation.

  7. Hardware Descriptive Languages: An Efficient Approach to Device ...

    African Journals Online (AJOL)

    Contemporarily, owing to astronomical advancements in the very large scale integration (VLSI) market segments, hardware engineers are now focusing on how to develop their new digital system designs in programmable languages like very high speed integrated circuit hardwaredescription language (VHDL) and Verilog ...

  8. Optimizing main-memory join on modern hardware

    OpenAIRE

    Boncz, Peter; Manegold, Stefan; Kersten, Martin

    2002-01-01

    textabstractIn the past decade, the exponential growth in commodity CPUs speed has far outpaced advances in memory latency. A second trend is that CPU performance advances are not only brought by increased clock rate, but also by increasing parallelism inside the CPU. Current database systems have not yet adapted to these trends, and show poor utilization of both CPU and memory resources on current hardware. In this article, we show how these resources can be optimized for large joins and tra...

  9. Glassy carbon based supercapacitor stacks

    Energy Technology Data Exchange (ETDEWEB)

    Baertsch, M; Braun, A; Koetz, R; Haas, O [Paul Scherrer Inst. (PSI), Villigen (Switzerland)

    1997-06-01

    Considerable effort is being made to develop electrochemical double layer capacitors (EDLC) that store relatively large quantities of electrical energy and possess at the same time a high power density. Our previous work has shown that glassy carbon is suitable as a material for capacitor electrodes concerning low resistance and high capacity requirements. We present the development of bipolar electrochemical glassy carbon capacitor stacks of up to 3 V. Bipolar stacks are an efficient way to meet the high voltage and high power density requirements for traction applications. Impedance and cyclic voltammogram measurements are reported here and show the frequency response of a 1, 2, and 3 V stack. (author) 3 figs., 1 ref..

  10. CASIS Fact Sheet: Hardware and Facilities

    Science.gov (United States)

    Solomon, Michael R.; Romero, Vergel

    2016-01-01

    Vencore is a proven information solutions, engineering, and analytics company that helps our customers solve their most complex challenges. For more than 40 years, we have designed, developed and delivered mission-critical solutions as our customers' trusted partner. The Engineering Services Contract, or ESC, provides engineering and design services to the NASA organizations engaged in development of new technologies at the Kennedy Space Center. Vencore is the ESC prime contractor, with teammates that include Stinger Ghaffarian Technologies, Sierra Lobo, Nelson Engineering, EASi, and Craig Technologies. The Vencore team designs and develops systems and equipment to be used for the processing of space launch vehicles, spacecraft, and payloads. We perform flight systems engineering for spaceflight hardware and software; develop technologies that serve NASA's mission requirements and operations needs for the future. Our Flight Payload Support (FPS) team at Kennedy Space Center (KSC) provides engineering, development, and certification services as well as payload integration and management services to NASA and commercial customers. Our main objective is to assist principal investigators (PIs) integrate their science experiments into payload hardware for research aboard the International Space Station (ISS), commercial spacecraft, suborbital vehicles, parabolic flight aircrafts, and ground-based studies. Vencore's FPS team is AS9100 certified and a recognized implementation partner for the Center for Advancement of Science in Space (CASIS

  11. BIOLOGICALLY INSPIRED HARDWARE CELL ARCHITECTURE

    DEFF Research Database (Denmark)

    2010-01-01

    Disclosed is a system comprising: - a reconfigurable hardware platform; - a plurality of hardware units defined as cells adapted to be programmed to provide self-organization and self-maintenance of the system by means of implementing a program expressed in a programming language defined as DNA...... language, where each cell is adapted to communicate with one or more other cells in the system, and where the system further comprises a converter program adapted to convert keywords from the DNA language to a binary DNA code; where the self-organisation comprises that the DNA code is transmitted to one...... or more of the cells, and each of the one or more cells is adapted to determine its function in the system; where if a fault occurs in a first cell and the first cell ceases to perform its function, self-maintenance is performed by that the system transmits information to the cells that the first cell has...

  12. Hardware-Accelerated Simulated Radiography

    International Nuclear Information System (INIS)

    Laney, D; Callahan, S; Max, N; Silva, C; Langer, S.; Frank, R

    2005-01-01

    We present the application of hardware accelerated volume rendering algorithms to the simulation of radiographs as an aid to scientists designing experiments, validating simulation codes, and understanding experimental data. The techniques presented take advantage of 32-bit floating point texture capabilities to obtain solutions to the radiative transport equation for X-rays. The hardware accelerated solutions are accurate enough to enable scientists to explore the experimental design space with greater efficiency than the methods currently in use. An unsorted hexahedron projection algorithm is presented for curvilinear hexahedral meshes that produces simulated radiographs in the absorption-only regime. A sorted tetrahedral projection algorithm is presented that simulates radiographs of emissive materials. We apply the tetrahedral projection algorithm to the simulation of experimental diagnostics for inertial confinement fusion experiments on a laser at the University of Rochester

  13. The principles of computer hardware

    CERN Document Server

    Clements, Alan

    2000-01-01

    Principles of Computer Hardware, now in its third edition, provides a first course in computer architecture or computer organization for undergraduates. The book covers the core topics of such a course, including Boolean algebra and logic design; number bases and binary arithmetic; the CPU; assembly language; memory systems; and input/output methods and devices. It then goes on to cover the related topics of computer peripherals such as printers; the hardware aspects of the operating system; and data communications, and hence provides a broader overview of the subject. Its readable, tutorial-based approach makes it an accessible introduction to the subject. The book has extensive in-depth coverage of two microprocessors, one of which (the 68000) is widely used in education. All chapters in the new edition have been updated. Major updates include: powerful software simulations of digital systems to accompany the chapters on digital design; a tutorial-based introduction to assembly language, including many exam...

  14. Hunting for hardware changes in data centres

    International Nuclear Information System (INIS)

    Coelho dos Santos, M; Steers, I; Szebenyi, I; Xafi, A; Barring, O; Bonfillou, E

    2012-01-01

    With many servers and server parts the environment of warehouse sized data centres is increasingly complex. Server life-cycle management and hardware failures are responsible for frequent changes that need to be managed. To manage these changes better a project codenamed “hardware hound” focusing on hardware failure trending and hardware inventory has been started at CERN. By creating and using a hardware oriented data set - the inventory - with detailed information on servers and their parts as well as tracking changes to this inventory, the project aims at, for example, being able to discover trends in hardware failure rates.

  15. Stack semantics of type theory

    DEFF Research Database (Denmark)

    Coquand, Thierry; Mannaa, Bassel; Ruch, Fabian

    2017-01-01

    We give a model of dependent type theory with one univalent universe and propositional truncation interpreting a type as a stack, generalizing the groupoid model of type theory. As an application, we show that countable choice cannot be proved in dependent type theory with one univalent universe...

  16. Multilayer Piezoelectric Stack Actuator Characterization

    Science.gov (United States)

    Sherrit, Stewart; Jones, Christopher M.; Aldrich, Jack B.; Blodget, Chad; Bao, Xioaqi; Badescu, Mircea; Bar-Cohen, Yoseph

    2008-01-01

    Future NASA missions are increasingly seeking to use actuators for precision positioning to accuracies of the order of fractions of a nanometer. For this purpose, multilayer piezoelectric stacks are being considered as actuators for driving these precision mechanisms. In this study, sets of commercial PZT stacks were tested in various AC and DC conditions at both nominal and extreme temperatures and voltages. AC signal testing included impedance, capacitance and dielectric loss factor of each actuator as a function of the small-signal driving sinusoidal frequency, and the ambient temperature. DC signal testing includes leakage current and displacement as a function of the applied DC voltage. The applied DC voltage was increased to over eight times the manufacturers' specifications to investigate the correlation between leakage current and breakdown voltage. Resonance characterization as a function of temperature was done over a temperature range of -180C to +200C which generally exceeded the manufacturers' specifications. In order to study the lifetime performance of these stacks, five actuators from one manufacturer were driven by a 60volt, 2 kHz sine-wave for ten billion cycles. The tests were performed using a Lab-View controlled automated data acquisition system that monitored the waveform of the stack electrical current and voltage. The measurements included the displacement, impedance, capacitance and leakage current and the analysis of the experimental results will be presented.

  17. V-stack piezoelectric actuator

    Science.gov (United States)

    Ardelean, Emil V.; Clark, Robert L.

    2001-07-01

    Aeroelastic control of wings by means of a distributed, trailing-edge control surface is of interest with regards to maneuvers, gust alleviation, and flutter suppression. The use of high energy density, piezoelectric materials as motors provides an appealing solution to this problem. A comparative analysis of the state of the art actuators is currently being conducted. A new piezoelectric actuator design is presented. This actuator meets the requirements for trailing edge flap actuation in both stroke and force. It is compact, simple, sturdy, and leverages stroke geometrically with minimum force penalties while displaying linearity over a wide range of stroke. The V-Stack Piezoelectric Actuator, consists of a base, a lever, two piezoelectric stacks, and a pre-tensioning element. The work is performed alternately by the two stacks, placed on both sides of the lever. Pre-tensioning can be readily applied using a torque wrench, obviating the need for elastic elements and this is for the benefit of the stiffness of the actuator. The characteristics of the actuator are easily modified by changing the base or the stacks. A prototype was constructed and tested experimentally to validate the theoretical model.

  18. Open stack thermal battery tests

    Energy Technology Data Exchange (ETDEWEB)

    Long, Kevin N. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Roberts, Christine C. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Grillet, Anne M. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Headley, Alexander J. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Fenton, Kyle [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Wong, Dennis [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Ingersoll, David [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2017-04-17

    We present selected results from a series of Open Stack thermal battery tests performed in FY14 and FY15 and discuss our findings. These tests were meant to provide validation data for the comprehensive thermal battery simulation tools currently under development in Sierra/Aria under known conditions compared with as-manufactured batteries. We are able to satisfy this original objective in the present study for some test conditions. Measurements from each test include: nominal stack pressure (axial stress) vs. time in the cold state and during battery ignition, battery voltage vs. time against a prescribed current draw with periodic pulses, and images transverse to the battery axis from which cell displacements are computed. Six battery configurations were evaluated: 3, 5, and 10 cell stacks sandwiched between 4 layers of the materials used for axial thermal insulation, either Fiberfrax Board or MinK. In addition to the results from 3, 5, and 10 cell stacks with either in-line Fiberfrax Board or MinK insulation, a series of cell-free “control” tests were performed that show the inherent settling and stress relaxation based on the interaction between the insulation and heat pellets alone.

  19. Adding large EM stack support

    KAUST Repository

    Holst, Glendon

    2016-12-01

    Serial section electron microscopy (SSEM) image stacks generated using high throughput microscopy techniques are an integral tool for investigating brain connectivity and cell morphology. FIB or 3View scanning electron microscopes easily generate gigabytes of data. In order to produce analyzable 3D dataset from the imaged volumes, efficient and reliable image segmentation is crucial. Classical manual approaches to segmentation are time consuming and labour intensive. Semiautomatic seeded watershed segmentation algorithms, such as those implemented by ilastik image processing software, are a very powerful alternative, substantially speeding up segmentation times. We have used ilastik effectively for small EM stacks – on a laptop, no less; however, ilastik was unable to carve the large EM stacks we needed to segment because its memory requirements grew too large – even for the biggest workstations we had available. For this reason, we refactored the carving module of ilastik to scale it up to large EM stacks on large workstations, and tested its efficiency. We modified the carving module, building on existing blockwise processing functionality to process data in manageable chunks that can fit within RAM (main memory). We review this refactoring work, highlighting the software architecture, design choices, modifications, and issues encountered.

  20. Electrically Conductive and Protective Coating for Planar SOFC Stacks

    Energy Technology Data Exchange (ETDEWEB)

    Choi, Jung-Pyung; Stevenson, Jeffry W.

    2017-12-04

    Ferritic stainless steels are preferred interconnect materials for intermediate temperature SOFCs because of their resistance to oxidation, high formability and low cost. However, their protective oxide layer produces Cr-containing volatile species at SOFC operating temperatures and conditions, which can cause cathode poisoning. Electrically conducting spinel coatings have been developed to prevent cathode poisoning and to maintain an electrically conductive pathway through SOFC stacks. However, this coating is not compatible with the formation of stable, hermetic seals between the interconnect frame component and the ceramic cell. Thus, a new aluminizing process has been developed by PNNL to enable durable sealing, prevent Cr evaporation, and maintain electrical insulation between stack repeat units. Hence, two different types of coating need to have stable operation of SOFC stacks. This paper will focus on the electrically conductive coating process. Moreover, an advanced coating process, compatible with a non-electrically conductive coating will be

  1. Cell layer level generalized dynamic modeling of a PEMFC stack using VHDL-AMS language

    Energy Technology Data Exchange (ETDEWEB)

    Gao, Fei; Blunier, Benjamin; Miraoui, Abdellatif; El-Moudni, Abdellah [Transport and Systems Laboratory (SeT) - EA 3317/UTBM, University of Technology of Belfort-Montbeliard, Rue Thierry Mieg, 90000 Belfort (France)

    2009-07-15

    A generalized, cell layer scale proton exchange membrane fuel cell (PEMFC) stack dynamic model is presented using VHDL-AMS (IEEE standard Very High Speed Integrated Circuit Hardware Description Language-Analog and Mixed-Signal Extensions) modeling language. A PEMFC stack system is a complex energy conversion system that covers three main energy domains: electrical, fluidic and thermal. The first part of this work shows the performance and the advantages of VHDL-AMS language when modeling such a complex system. Then, using the VHDL-AMS modeling standards, an electrical domain model, a fluidic domain model and a thermal domain model of the PEMFC stack are coupled and presented together. Thus, a complete coupled multi-domain fuel cell stack 1-D dynamic model is given. The simulation results are then compared with a Ballard 1.2 kW NEXA fuel cell system, and show a great agreement between the simulation and experimentation. This complex multi-domain VHDL-AMS stack model can be used for a model based control design or a Hardware-In-the-Loop application. (author)

  2. Design and analysis of the PBFA-Z vacuum insulator stack

    International Nuclear Information System (INIS)

    Shoup, R.W.; Long, F.; Martin, T.H.; Stygar, W.A.; Spielman, R.B.; Struve, K.W.; Mostrom, M.; Corcoran, P.; Smith, I.

    1996-01-01

    Sandia is developing PBFA-Z, a 20-MA driver for z-pinch experiments by replacing the water lines, insulator stack, and MITLs on PBFA II with new hardware. The design of the vacuum insulator stack was dictated by the drive voltage, the electric field stress and grading requirements, the water line and MITL interface requirements, and the machine operations and maintenance requirements. The insulator stack will consist of four separate modules, each of a different design because of different voltage drive and hardware interface requirements. The shape of the components in each module, i.e., grading rings, insulator rings, flux excluders, anode and cathode conductors, and the design of the water line and MITL interfaces, were optimized by using the electrostatic analysis codes, ELECTRO and JASON. The time-dependent performance of the insulator stack was evaluated using IVORY, a 2-D PIC code. The insulator stack design and present the results of the ELECTRO and IVORY analyses are described. (author). 2 tabs., 9 figs., 3 refs

  3. Design and analysis of the PBFA-Z vacuum insulator stack

    Energy Technology Data Exchange (ETDEWEB)

    Shoup, R W [Field Command Defense Nuclear Agency, Kirtland AFB, NM (United States); Long, F; Martin, T H; Stygar, W A; Spielman, R B [Sandia National Laboratories, Albuquerque, NM (United States). Dept 9573; Ives, H [EG and G, Albuquerque, NM (United States); Struve, K W; Mostrom, M [Mission Research Corp., Albuquerque, NM (United States); Corcoran, P; Smith, I [Pulse Sciences, Inc., San Leandro, CA (United States)

    1997-12-31

    Sandia is developing PBFA-Z, a 20-MA driver for z-pinch experiments by replacing the water lines, insulator stack, and MITLs on PBFA II with new hardware. The design of the vacuum insulator stack was dictated by the drive voltage, the electric field stress and grading requirements, the water line and MITL interface requirements, and the machine operations and maintenance requirements. The insulator stack will consist of four separate modules, each of a different design because of different voltage drive and hardware interface requirements. The shape of the components in each module, i.e., grading rings, insulator rings, flux excluders, anode and cathode conductors, and the design of the water line and MITL interfaces, were optimized by using the electrostatic analysis codes, ELECTRO and JASON. The time-dependent performance of the insulator stack was evaluated using IVORY, a 2-D PIC code. The insulator stack design and present the results of the ELECTRO and IVORY analyses are described. (author). 2 tabs., 9 figs., 3 refs.

  4. Hardware and software maintenance strategies for upgrading vintage computers

    International Nuclear Information System (INIS)

    Wang, B.C.; Buijs, W.J.; Banting, R.D.

    1992-01-01

    The paper focuses on the maintenance of the computer hardware and software for digital control computers (DCC). Specific design and problems related to various maintenance strategies are reviewed. A foundation was required for a reliable computer maintenance and upgrading program to provide operation of the DCC with high availability and reliability for 40 years. This involved a carefully planned and executed maintenance and upgrading program, involving complementary hardware and software strategies. The computer system was designed on a modular basis, with large sections easily replaceable, to facilitate maintenance and improve availability of the system. Advances in computer hardware have made it possible to replace DCC peripheral devices with reliable, inexpensive, and widely available components from PC-based systems (PC = personal computer). By providing a high speed link from the DCC to a PC, it is now possible to use many commercial software packages to process data from the plant. 1 fig

  5. Qualification of software and hardware

    International Nuclear Information System (INIS)

    Gossner, S.; Schueller, H.; Gloee, G.

    1987-01-01

    The qualification of on-line process control equipment is subdivided into three areas: 1) materials and structural elements; 2) on-line process-control components and devices; 3) electrical systems (reactor protection and confinement system). Microprocessor-aided process-control equipment are difficult to verify for failure-free function owing to the complexity of the functional structures of the hardware and to the variety of the software feasible for microprocessors. Hence, qualification will make great demands on the inspecting expert. (DG) [de

  6. Vertical melting of a stack of membranes

    Science.gov (United States)

    Borelli, M. E. S.; Kleinert, H.; Schakel, A. M. J.

    2001-02-01

    A stack of tensionless membranes with nonlinear curvature energy and vertical harmonic interaction is studied. At low temperatures, the system forms a lamellar phase. At a critical temperature, the stack disorders vertically in a melting-like transition.

  7. Door Hardware and Installations; Carpentry: 901894.

    Science.gov (United States)

    Dade County Public Schools, Miami, FL.

    The curriculum guide outlines a course designed to provide instruction in the selection, preparation, and installation of hardware for door assemblies. The course is divided into five blocks of instruction (introduction to doors and hardware, door hardware, exterior doors and jambs, interior doors and jambs, and a quinmester post-test) totaling…

  8. GOSH! A roadmap for open-source science hardware

    CERN Multimedia

    Stefania Pandolfi

    2016-01-01

    The goal of the Gathering for Open Science Hardware (GOSH! 2016), held from 2 to 5 March 2016 at IdeaSquare, was to lay the foundations of the open-source hardware for science movement.   The participants in the GOSH! 2016 meeting gathered in IdeaSquare. (Image: GOSH Community) “Despite advances in technology, many scientific innovations are held back because of a lack of affordable and customisable hardware,” says François Grey, a professor at the University of Geneva and coordinator of Citizen Cyberlab – a partnership between CERN, the UN Institute for Training and Research and the University of Geneva – which co-organised the GOSH! 2016 workshop. “This scarcity of accessible science hardware is particularly obstructive for citizen science groups and humanitarian organisations that don’t have the same economic means as a well-funded institution.” Instead, open sourcing science hardware co...

  9. Helping Students Design HyperCard Stacks.

    Science.gov (United States)

    Dunham, Ken

    1995-01-01

    Discusses how to teach students to design HyperCard stacks. Highlights include introducing HyperCard, developing storyboards, introducing design concepts and scripts, presenting stacks, evaluating storyboards, and continuing projects. A sidebar presents a HyperCard stack evaluation form. (AEF)

  10. Travel Software using GPU Hardware

    CERN Document Server

    Szalwinski, Chris M; Dimov, Veliko Atanasov; CERN. Geneva. ATS Department

    2015-01-01

    Travel is the main multi-particle tracking code being used at CERN for the beam dynamics calculations through hadron and ion linear accelerators. It uses two routines for the calculation of space charge forces, namely, rings of charges and point-to-point. This report presents the studies to improve the performance of Travel using GPU hardware. The studies showed that the performance of Travel with the point-to-point simulations of space-charge effects can be speeded up at least 72 times using current GPU hardware. Simple recompilation of the source code using an Intel compiler can improve performance at least 4 times without GPU support. The limited memory of the GPU is the bottleneck. Two algorithms were investigated on this point: repeated computation and tiling. The repeating computation algorithm is simpler and is the currently recommended solution. The tiling algorithm was more complicated and degraded performance. Both build and test instructions for the parallelized version of the software are inclu...

  11. PRECISION COSMOGRAPHY WITH STACKED VOIDS

    International Nuclear Information System (INIS)

    Lavaux, Guilhem; Wandelt, Benjamin D.

    2012-01-01

    We present a purely geometrical method for probing the expansion history of the universe from the observation of the shape of stacked voids in spectroscopic redshift surveys. Our method is an Alcock-Paczyński (AP) test based on the average sphericity of voids posited on the local isotropy of the universe. It works by comparing the temporal extent of cosmic voids along the line of sight with their angular, spatial extent. We describe the algorithm that we use to detect and stack voids in redshift shells on the light cone and test it on mock light cones produced from N-body simulations. We establish a robust statistical model for estimating the average stretching of voids in redshift space and quantify the contamination by peculiar velocities. Finally, assuming that the void statistics that we derive from N-body simulations is preserved when considering galaxy surveys, we assess the capability of this approach to constrain dark energy parameters. We report this assessment in terms of the figure of merit (FoM) of the dark energy task force and in particular of the proposed Euclid mission which is particularly suited for this technique since it is a spectroscopic survey. The FoM due to stacked voids from the Euclid wide survey may double that of all other dark energy probes derived from Euclid data alone (combined with Planck priors). In particular, voids seem to outperform baryon acoustic oscillations by an order of magnitude. This result is consistent with simple estimates based on mode counting. The AP test based on stacked voids may be a significant addition to the portfolio of major dark energy probes and its potentialities must be studied in detail.

  12. Docker on OpenStack

    OpenAIRE

    Agarwal, Nitin; Moreira, Belmiro

    2014-01-01

    Project Specification CERN is establishing a large scale private cloud based on OpenStack as part of the expansion of the computing infrastructure for storing the data coming out of the Large Hadron Collider (LHC) experiments. As the data coming out of the detectors is increasing continuously that needs to be stored in the data center, we need more physical resources (more money) and since Virtual machines takes lot of CPU and memory overhead and minutes for creating the images, booting u...

  13. Stack Monitor Operating Experience Review

    International Nuclear Information System (INIS)

    Cadwallader, L.C.; Bruyere, S.A.

    2009-01-01

    Stack monitors are used to sense radioactive particulates and gases in effluent air being vented from rooms of nuclear facilities. These monitors record the levels and types of effluents to the environment. This paper presents the results of a stack monitor operating experience review of the U.S. Department of Energy (DOE) Occurrence Reporting and Processing System (ORPS) database records from the past 18 years. Regulations regarding these monitors are briefly described. Operating experiences reported by the U.S. DOE and in engineering literature sources were reviewed to determine the strengths and weaknesses of these monitors. Electrical faults, radiation instrumentation faults, and human errors are the three leading causes of failures. A representative 'all modes' failure rate is 1E-04/hr. Repair time estimates vary from an average repair time of 17.5 hours (with spare parts on hand) to 160 hours (without spare parts on hand). These data should support the use of stack monitors in any nuclear facility, including the National Ignition Facility and the international ITER project.

  14. Lightweight Stacks of Direct Methanol Fuel Cells

    Science.gov (United States)

    Narayanan, Sekharipuram; Valdez, Thomas

    2004-01-01

    An improved design concept for direct methanol fuel cells makes it possible to construct fuel-cell stacks that can weigh as little as one-third as much as do conventional bipolar fuel-cell stacks of equal power. The structural-support components of the improved cells and stacks can be made of relatively inexpensive plastics. Moreover, in comparison with conventional bipolar fuel-cell stacks, the improved fuel-cell stacks can be assembled, disassembled, and diagnosed for malfunctions more easily. These improvements are expected to bring portable direct methanol fuel cells and stacks closer to commercialization. In a conventional bipolar fuel-cell stack, the cells are interspersed with bipolar plates (also called biplates), which are structural components that serve to interconnect the cells and distribute the reactants (methanol and air). The cells and biplates are sandwiched between metal end plates. Usually, the stack is held together under pressure by tie rods that clamp the end plates. The bipolar stack configuration offers the advantage of very low internal electrical resistance. However, when the power output of a stack is only a few watts, the very low internal resistance of a bipolar stack is not absolutely necessary for keeping the internal power loss acceptably low.

  15. Hardware Support for Dynamic Languages

    DEFF Research Database (Denmark)

    Schleuniger, Pascal; Karlsson, Sven; Probst, Christian W.

    2011-01-01

    In recent years, dynamic programming languages have enjoyed increasing popularity. For example, JavaScript has become one of the most popular programming languages on the web. As the complexity of web applications is growing, compute-intensive workloads are increasingly handed off to the client...... side. While a lot of effort is put in increasing the performance of web browsers, we aim for multicore systems with dedicated cores to effectively support dynamic languages. We have designed Tinuso, a highly flexible core for experimentation that is optimized for high performance when implemented...... on FPGA. We composed a scalable multicore configuration where we study how hardware support for software speculation can be used to increase the performance of dynamic languages....

  16. Protection of Microkernel Environment L4Re from Stack-smashed Attacks

    Directory of Open Access Journals (Sweden)

    Vasily Andreevich Sartakov

    2014-12-01

    Full Text Available Microkernel-based operating systems provide high level of protection due to the strong isolation of components, small size of Trusted Computing Base and execution of drivers in user space. At the same time, such systems are vulnerable to a stack overflow attacks, because these attacks exploit the hardware features of the platform, such as shared memory space for data and code. Modern architectures, such as AMD64 and ARM, provide opportunities to counteract attacks at the hardware level by disallowing memory allocation for storing executable stack and heap, but this protection mechanism requires additional support from the operating system. This paper presents memory management, program execution model and IPC mechanism of microkernel Fiasco.OC and environment L4Re from nonexecution memory support point of view.

  17. Automatic Optimization of Hardware Accelerators for Image Processing

    OpenAIRE

    Reiche, Oliver; Häublein, Konrad; Reichenbach, Marc; Hannig, Frank; Teich, Jürgen; Fey, Dietmar

    2015-01-01

    In the domain of image processing, often real-time constraints are required. In particular, in safety-critical applications, such as X-ray computed tomography in medical imaging or advanced driver assistance systems in the automotive domain, timing is of utmost importance. A common approach to maintain real-time capabilities of compute-intensive applications is to offload those computations to dedicated accelerator hardware, such as Field Programmable Gate Arrays (FPGAs). Programming such arc...

  18. Technology leadership : a road map to commercially viable PEMFC stack technology

    Energy Technology Data Exchange (ETDEWEB)

    Stone, C. [Ballard Power Systems, Burnaby, BC (Canada)

    2005-07-01

    This abstract discussed recent advances in stack technology by Ballard Power Systems. The technology department of this Canadian-owned company exhibited the capability of a single proton exchange membrane fuel cell (PEMFC) stack design to demonstrate that cost reduction, freeze start capability from -20 degrees C and durability under an automotive dynamic operating cycle are comparable to that experienced by a fuel cell stack in an actual vehicle. A technology road map has been developed by the company to define a path to the commercial viability of the PEMFC stack by 2010. Key target parameters for cost reduction, durability, freeze start and stack power density were described in detail along with demonstrated historical capability and details of how the company will achieve its required targets. refs., tabs., figs.

  19. Optimized electrode configuration for current-in-plane characterization of magnetic tunnel junction stacks

    DEFF Research Database (Denmark)

    Cagliani, Alberto; Kjær, Daniel; Østerberg, Frederik Westergaard

    2017-01-01

    The current-in-plane tunneling technique (CIPT) has been a crucial tool in the development of magnetic tunnel junction stacks suitable for magnetic random access memories (MRAM) for more than a decade. The MRAM development has now reached the maturity to make the transition from the R&D phase...... of electrodes on a multi-electrode probe to reach up to 36% improvement on the repeatability for the resistance area product and the tunneling magnetoresistance measurement, without any hardware modification....

  20. Actuators Using Piezoelectric Stacks and Displacement Enhancers

    Science.gov (United States)

    Bar-Cohen, Yoseph; Sherrit, Stewart; Bao, Xiaoqi; Badescu, Mircea; Lee, Hyeong Jae; Walkenmeyer, Phillip; Lih, Shyh-Shiuh

    2015-01-01

    Actuators are used to drive all active mechanisms including machines, robots, and manipulators to name a few. The actuators are responsible for moving, manipulating, displacing, pushing and executing any action that is needed by the mechanism. There are many types and principles of actuation that are responsible for these movements ranging from electromagnetic, electroactive, thermo-mechanic, piezoelectric, electrostrictive etc. Actuators are readily available from commercial producers but there is a great need for reducing their size, increasing their efficiency and reducing their weight. Studies at JPL’s Non Destructive Evaluation and Advanced Actuators (NDEAA) Laboratory have been focused on the use of piezoelectric stacks and novel designs taking advantage of piezoelectric’s potential to provide high torque/force density actuation and high electromechanical conversion efficiency. The actuators/motors that have been developed and reviewed in this paper are operated by various horn configurations as well as the use of pre-stress flexures that make them thermally stable and increases their coupling efficiency. The use of monolithic designs that pre-stress the piezoelectric stack eliminates the use of compression stress bolt. These designs enable the embedding of developed solid-state motors/actuators in any structure with the only macroscopically moving parts are the rotor or the linear translator. Finite element modeling and design tools were used to determine the requirements and operation parameters and the results were used to simulate, design and fabricate novel actuators/motors. The developed actuators and performance will be described and discussed in this paper.

  1. Black Hole Spectroscopy with Coherent Mode Stacking.

    Science.gov (United States)

    Yang, Huan; Yagi, Kent; Blackman, Jonathan; Lehner, Luis; Paschalidis, Vasileios; Pretorius, Frans; Yunes, Nicolás

    2017-04-21

    The measurement of multiple ringdown modes in gravitational waves from binary black hole mergers will allow for testing the fundamental properties of black holes in general relativity and to constrain modified theories of gravity. To enhance the ability of Advanced LIGO/Virgo to perform such tasks, we propose a coherent mode stacking method to search for a chosen target mode within a collection of multiple merger events. We first rescale each signal so that the target mode in each of them has the same frequency and then sum the waveforms constructively. A crucial element to realize this coherent superposition is to make use of a priori information extracted from the inspiral-merger phase of each event. To illustrate the method, we perform a study with simulated events targeting the ℓ=m=3 ringdown mode of the remnant black holes. We show that this method can significantly boost the signal-to-noise ratio of the collective target mode compared to that of the single loudest event. Using current estimates of merger rates, we show that it is likely that advanced-era detectors can measure this collective ringdown mode with one year of coincident data gathered at design sensitivity.

  2. Vertically stacked nanocellulose tactile sensor.

    Science.gov (United States)

    Jung, Minhyun; Kim, Kyungkwan; Kim, Bumjin; Lee, Kwang-Jae; Kang, Jae-Wook; Jeon, Sanghun

    2017-11-16

    Paper-based electronic devices are attracting considerable attention, because the paper platform has unique attributes such as flexibility and eco-friendliness. Here we report on what is claimed to be the firstly fully integrated vertically-stacked nanocellulose-based tactile sensor, which is capable of simultaneously sensing temperature and pressure. The pressure and temperature sensors are operated using different principles and are stacked vertically, thereby minimizing the interference effect. For the pressure sensor, which utilizes the piezoresistance principle under pressure, the conducting electrode was inkjet printed on the TEMPO-oxidized-nanocellulose patterned with micro-sized pyramids, and the counter electrode was placed on the nanocellulose film. The pressure sensor has a high sensitivity over a wide range (500 Pa-3 kPa) and a high durability of 10 4 loading/unloading cycles. The temperature sensor combines various materials such as poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonate) (PEDOT:PSS), silver nanoparticles (AgNPs) and carbon nanotubes (CNTs) to form a thermocouple on the upper nanocellulose layer. The thermoelectric-based temperature sensors generate a thermoelectric voltage output of 1.7 mV for a temperature difference of 125 K. Our 5 × 5 tactile sensor arrays show a fast response, negligible interference, and durable sensing performance.

  3. Open-source hardware for medical devices.

    Science.gov (United States)

    Niezen, Gerrit; Eslambolchilar, Parisa; Thimbleby, Harold

    2016-04-01

    Open-source hardware is hardware whose design is made publicly available so anyone can study, modify, distribute, make and sell the design or the hardware based on that design. Some open-source hardware projects can potentially be used as active medical devices. The open-source approach offers a unique combination of advantages, including reducing costs and faster innovation. This article compares 10 of open-source healthcare projects in terms of how easy it is to obtain the required components and build the device.

  4. Hardware Resource Allocation for Hardware/Software Partitioning in the LYCOS System

    DEFF Research Database (Denmark)

    Grode, Jesper Nicolai Riis; Knudsen, Peter Voigt; Madsen, Jan

    1998-01-01

    as a designer's/design tool's aid to generate good hardware allocations for use in hardware/software partitioning. The algorithm has been implemented in a tool under the LYCOS system. The results show that the allocations produced by the algorithm come close to the best allocations obtained by exhaustive search.......This paper presents a novel hardware resource allocation technique for hardware/software partitioning. It allocates hardware resources to the hardware data-path using information such as data-dependencies between operations in the application, and profiling information. The algorithm is useful...

  5. Nanorobot Hardware Architecture for Medical Defense

    Directory of Open Access Journals (Sweden)

    Luiz C. Kretly

    2008-05-01

    Full Text Available This work presents a new approach with details on the integrated platform and hardware architecture for nanorobots application in epidemic control, which should enable real time in vivo prognosis of biohazard infection. The recent developments in the field of nanoelectronics, with transducers progressively shrinking down to smaller sizes through nanotechnology and carbon nanotubes, are expected to result in innovative biomedical instrumentation possibilities, with new therapies and efficient diagnosis methodologies. The use of integrated systems, smart biosensors, and programmable nanodevices are advancing nanoelectronics, enabling the progressive research and development of molecular machines. It should provide high precision pervasive biomedical monitoring with real time data transmission. The use of nanobioelectronics as embedded systems is the natural pathway towards manufacturing methodology to achieve nanorobot applications out of laboratories sooner as possible. To demonstrate the practical application of medical nanorobotics, a 3D simulation based on clinical data addresses how to integrate communication with nanorobots using RFID, mobile phones, and satellites, applied to long distance ubiquitous surveillance and health monitoring for troops in conflict zones. Therefore, the current model can also be used to prevent and save a population against the case of some targeted epidemic disease.

  6. Solid Oxide Cell and Stack Testing, Safety and Quality Assurance (SOCTESQA)

    OpenAIRE

    Auer, Corinna; Lang, Michael; Couturier, Karine; Nielsen, Eva Ravn; Mc Phail, Stephen; Tsotridis, Georgios; FU, Qingxi; Chan, Siew Hwa

    2015-01-01

    The market penetration of fuel and electrolysis cell energy systems in Europe requires the development of reliable assessment, testing and prediction of performance and durability of solid oxide cells and stacks (SOC). To advance in this field the EU-project “SOCTESQA” was launched in May 2014. Partners from different countries in Europe and one external party from Singapore are working together to develop uniform and industry wide test procedures and protocols for SOC cell/stack assembly. In...

  7. The untyped stack calculus and Bohm's theorem

    Directory of Open Access Journals (Sweden)

    Alberto Carraro

    2013-03-01

    Full Text Available The stack calculus is a functional language in which is in a Curry-Howard correspondence with classical logic. It enjoys confluence but, as well as Parigot's lambda-mu, does not admit the Bohm Theorem, typical of the lambda-calculus. We present a simple extension of stack calculus which is for the stack calculus what Saurin's Lambda-mu is for lambda-mu.

  8. Flexural characteristics of a stack leg

    International Nuclear Information System (INIS)

    Cook, J.

    1979-06-01

    A 30 MV tandem Van de Graaff accelerator is at present under construction at Daresbury Laboratory. The insulating stack of the machine is of modular construction, each module being 860 mm in length. Each live section stack module contains 8 insulating legs mounted between bulkhead rings. The design, fabrication (from glass discs bonded to stainless steel discs using an epoxy film adhesive) and testing of the stack legs is described. (U.K.)

  9. ooi: OpenStack OCCI interface

    Directory of Open Access Journals (Sweden)

    Álvaro López García

    2016-01-01

    Full Text Available In this document we present an implementation of the Open Grid Forum’s Open Cloud Computing Interface (OCCI for OpenStack, namely ooi (Openstack occi interface, 2015  [1]. OCCI is an open standard for management tasks over cloud resources, focused on interoperability, portability and integration. ooi aims to implement this open interface for the OpenStack cloud middleware, promoting interoperability with other OCCI-enabled cloud management frameworks and infrastructures. ooi focuses on being non-invasive with a vanilla OpenStack installation, not tied to a particular OpenStack release version.

  10. ooi: OpenStack OCCI interface

    Science.gov (United States)

    López García, Álvaro; Fernández del Castillo, Enol; Orviz Fernández, Pablo

    In this document we present an implementation of the Open Grid Forum's Open Cloud Computing Interface (OCCI) for OpenStack, namely ooi (Openstack occi interface, 2015) [1]. OCCI is an open standard for management tasks over cloud resources, focused on interoperability, portability and integration. ooi aims to implement this open interface for the OpenStack cloud middleware, promoting interoperability with other OCCI-enabled cloud management frameworks and infrastructures. ooi focuses on being non-invasive with a vanilla OpenStack installation, not tied to a particular OpenStack release version.

  11. Computer hardware description languages - A tutorial

    Science.gov (United States)

    Shiva, S. G.

    1979-01-01

    The paper introduces hardware description languages (HDL) as useful tools for hardware design and documentation. The capabilities and limitations of HDLs are discussed along with the guidelines needed in selecting an appropriate HDL. The directions for future work are provided and attention is given to the implementation of HDLs in microcomputers.

  12. Stacks of SPS Dipole Magnets

    CERN Multimedia

    1974-01-01

    Stacks of SPS Dipole Magnets ready for installation in the tunnel. The SPS uses a separated function lattice with dipoles for bending and quadrupoles for focusing. The 6.2 m long normal conducting dipoles are of H-type with coils that are bent-up at the ends. There are two types, B1 (total of 360) and B2 (384). Both are for a maximum field of 1.8 Tesla and have the same outer dimensions (450x800 mm2 vxh) but with different gaps (B1: 39x129 mm2, B2: 52x92 mm2) tailored to the beam size. The yoke, made of 1.5 mm thick laminations, consists of an upper and a lower half joined together in the median plane once the coils have been inserted.

  13. California dreaming?[PEM stacks

    Energy Technology Data Exchange (ETDEWEB)

    Crosse, J.

    2002-06-01

    Hyundai's Santa Fe FCEV will be on sale by the end of 2002. Hyundai uses PEM stacks that are manufactured by International Fuel Cells (IFC), a division of United Technologies. Santa Fe is equipped with a 65 kW electric powertrain of Enova systems and Shell's new gasoline reformer called Hydrogen Source. Eugene Jang, Senior Engineer - Fuel Cell and Materials at Hyundai stated that the compressor related losses on IFC system are below 3%. The maximum speed offered by the vehicle is estimated as 123km/hr while the petrol equivalent fuel consumption is quoted between 5.6L/100 km and 4.8L/100 km. Santa Fe is a compact vehicle offering better steering response and a pleasant drive. (author)

  14. An evaluation of Skylab habitability hardware

    Science.gov (United States)

    Stokes, J.

    1974-01-01

    For effective mission performance, participants in space missions lasting 30-60 days or longer must be provided with hardware to accommodate their personal needs. Such habitability hardware was provided on Skylab. Equipment defined as habitability hardware was that equipment composing the food system, water system, sleep system, waste management system, personal hygiene system, trash management system, and entertainment equipment. Equipment not specifically defined as habitability hardware but which served that function were the Wardroom window, the exercise equipment, and the intercom system, which was occasionally used for private communications. All Skylab habitability hardware generally functioned as intended for the three missions, and most items could be considered as adequate concepts for future flights of similar duration. Specific components were criticized for their shortcomings.

  15. Comparative Modal Analysis of Sieve Hardware Designs

    Science.gov (United States)

    Thompson, Nathaniel

    2012-01-01

    The CMTB Thwacker hardware operates as a testbed analogue for the Flight Thwacker and Sieve components of CHIMRA, a device on the Curiosity Rover. The sieve separates particles with a diameter smaller than 150 microns for delivery to onboard science instruments. The sieving behavior of the testbed hardware should be similar to the Flight hardware for the results to be meaningful. The elastodynamic behavior of both sieves was studied analytically using the Rayleigh Ritz method in conjunction with classical plate theory. Finite element models were used to determine the mode shapes of both designs, and comparisons between the natural frequencies and mode shapes were made. The analysis predicts that the performance of the CMTB Thwacker will closely resemble the performance of the Flight Thwacker within the expected steady state operating regime. Excitations of the testbed hardware that will mimic the flight hardware were recommended, as were those that will improve the efficiency of the sieving process.

  16. Vector Fields and Flows on Differentiable Stacks

    DEFF Research Database (Denmark)

    A. Hepworth, Richard

    2009-01-01

    This paper introduces the notions of vector field and flow on a general differentiable stack. Our main theorem states that the flow of a vector field on a compact proper differentiable stack exists and is unique up to a uniquely determined 2-cell. This extends the usual result on the existence...... of vector fields....

  17. Project W-420 stack monitoring system upgrades

    International Nuclear Information System (INIS)

    CARPENTER, K.E.

    1999-01-01

    This project will execute the design, procurement, construction, startup, and turnover activities for upgrades to the stack monitoring system on selected Tank Waste Remediation System (TWRS) ventilation systems. In this plan, the technical, schedule, and cost baselines are identified, and the roles and responsibilities of project participants are defined for managing the Stack Monitoring System Upgrades, Project W-420

  18. 40 CFR 61.44 - Stack sampling.

    Science.gov (United States)

    2010-07-01

    ... 40 Protection of Environment 8 2010-07-01 2010-07-01 false Stack sampling. 61.44 Section 61.44 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED) NATIONAL... Firing § 61.44 Stack sampling. (a) Sources subject to § 61.42(b) shall be continuously sampled, during...

  19. On the "stacking fault" in copper

    NARCIS (Netherlands)

    Fransens, J.R.; Pleiter, F

    2003-01-01

    The results of a perturbed gamma-gamma angular correlations experiment on In-111 implanted into a properly cut single crystal of copper show that the defect known in the literature as "stacking fault" is not a planar faulted loop but a stacking fault tetrahedron with a size of 10-50 Angstrom.

  20. Learning OpenStack networking (Neutron)

    CERN Document Server

    Denton, James

    2014-01-01

    If you are an OpenStack-based cloud operator with experience in OpenStack Compute and nova-network but are new to Neutron networking, then this book is for you. Some networking experience is recommended, and a physical network infrastructure is required to provide connectivity to instances and other network resources configured in the book.

  1. Status of MCFC stack technology at IHI

    Energy Technology Data Exchange (ETDEWEB)

    Hosaka, M.; Morita, T.; Matsuyama, T.; Otsubo, M. [Ishikawajima-Harima Heavy Industries Co., Ltd., Tokyo (Japan)

    1996-12-31

    The molten carbonate fuel cell (MCFC) is a promising option for highly efficient power generation possible to enlarge. IHI has been studying parallel flow MCFC stacks with internal manifolds that have a large electrode area of 1m{sup 2}. IHI will make two 250 kW stacks for MW plant, and has begun to make cell components for the plant. To improve the stability of stack, soft corrugated plate used in the separator has been developed, and a way of gathering current from stacks has been studied. The DC output potential of the plant being very high, the design of electric insulation will be very important. A 20 kW short stack test was conducted in 1995 FY to certificate some of the improvements and components of the MW plant. These activities are presented below.

  2. Modular fuel-cell stack assembly

    Science.gov (United States)

    Patel, Pinakin

    2010-07-13

    A fuel cell assembly having a plurality of fuel cells arranged in a stack. An end plate assembly abuts the fuel cell at an end of said stack. The end plate assembly has an inlet area adapted to receive an exhaust gas from the stack, an outlet area and a passage connecting the inlet area and outlet area and adapted to carry the exhaust gas received at the inlet area from the inlet area to the outlet area. A further end plate assembly abuts the fuel cell at a further opposing end of the stack. The further end plate assembly has a further inlet area adapted to receive a further exhaust gas from the stack, a further outlet area and a further passage connecting the further inlet area and further outlet area and adapted to carry the further exhaust gas received at the further inlet area from the further inlet area to the further outlet area.

  3. Fast concurrent array-based stacks, queues and deques using fetch-and-increment-bounded, fetch-and-decrement-bounded and store-on-twin synchronization primitives

    Science.gov (United States)

    Chen, Dong; Gara, Alana; Heidelberger, Philip; Kumar, Sameer; Ohmacht, Martin; Steinmacher-Burow, Burkhard; Wisniewski, Robert

    2014-09-16

    Implementation primitives for concurrent array-based stacks, queues, double-ended queues (deques) and wrapped deques are provided. In one aspect, each element of the stack, queue, deque or wrapped deque data structure has its own ticket lock, allowing multiple threads to concurrently use multiple elements of the data structure and thus achieving high performance. In another aspect, new synchronization primitives FetchAndIncrementBounded (Counter, Bound) and FetchAndDecrementBounded (Counter, Bound) are implemented. These primitives can be implemented in hardware and thus promise a very fast throughput for queues, stacks and double-ended queues.

  4. ADvanced Electric Powertrain Technology (ADEPT) : virtual and hardware platforms

    NARCIS (Netherlands)

    Lomonova, E.A.; Paulides, J.J.H.; Wilkins, S.; Tegenbosch, J.A.P.

    2015-01-01

    Alternative energy sources for traditional combustion engines (e.g. fuel cells, solar cells, batteries) in vehicles like motorbikes, cars, trucks, boats, planes will go hand in hand with a massive growth of the application of electric machines inside (`E-propulsion'). For automotive, marine,

  5. Transmission delays in hardware clock synchronization

    Science.gov (United States)

    Shin, Kang G.; Ramanathan, P.

    1988-01-01

    Various methods, both with software and hardware, have been proposed to synchronize a set of physical clocks in a system. Software methods are very flexible and economical but suffer an excessive time overhead, whereas hardware methods require no time overhead but are unable to handle transmission delays in clock signals. The effects of nonzero transmission delays in synchronization have been studied extensively in the communication area in the absence of malicious or Byzantine faults. The authors show that it is easy to incorporate the ideas from the communication area into the existing hardware clock synchronization algorithms to take into account the presence of both malicious faults and nonzero transmission delays.

  6. Probing Temperature Inside Planar SOFC Short Stack, Modules, and Stack Series

    Science.gov (United States)

    Yu, Rong; Guan, Wanbing; Zhou, Xiao-Dong

    2017-02-01

    Probing temperature inside a solid oxide fuel cell (SOFC) stack lies at the heart of the development of high-performance and stable SOFC systems. In this article, we report our recent work on the direct measurements of the temperature in three types of SOFC systems: a 5-cell short stack, a 30-cell stack module, and a stack series consisting of two 30-cell stack modules. The dependence of temperature on the gas flow rate and current density was studied under a current sweep or steady-state operation. During the current sweep, the temperature inside the 5-cell stack decreased with increasing current, while it increased significantly at the bottom and top of the 30-cell stack. During a steady-state operation, the temperature of the 5-cell stack was stable while it was increased in the 30-cell stack. In the stack series, the maximum temperature gradient reached 190°C when the gas was not preheated. If the gas was preheated and the temperature gradient was reduced to 23°C in the stack series with the presence of a preheating gas and segmented temperature control, this resulted in a low degradation rate.

  7. The impact of stack geometry and mean pressure on cold end temperature of stack in thermoacoustic refrigeration systems

    Science.gov (United States)

    Wantha, Channarong

    2018-02-01

    This paper reports on the experimental and simulation studies of the influence of stack geometries and different mean pressures on the cold end temperature of the stack in the thermoacoustic refrigeration system. The stack geometry was tested, including spiral stack, circular pore stack and pin array stack. The results of this study show that the mean pressure of the gas in the system has a significant impact on the cold end temperature of the stack. The mean pressure of the gas in the system corresponds to thermal penetration depth, which results in a better cold end temperature of the stack. The results also show that the cold end temperature of the pin array stack decreases more than that of the spiral stack and circular pore stack geometry by approximately 63% and 70%, respectively. In addition, the thermal area and viscous area of the stack are analyzed to explain the results of such temperatures of thermoacoustic stacks.

  8. Five stacks over the Danube

    International Nuclear Information System (INIS)

    Anon.

    1998-01-01

    Following the departure of Communism, Hungary adopted the most ambitious privatisation programme of all the eastern European countries. Within a year the state electricity company, MVM, and the oil and gas company, MOL, were prepared for sale and a consequent injection of foreign capital. Control of prices by central government inhibited investment initially but a new legal framework put in place in 1995 introduced a pricing regime more attractive to external investors. Particular interest was shown in the 2,200MW mixed heavy oil and natural gas power plant at Dunamenti on the Danube, characterised by its five stacks of varying height which reflect the changing technology employed at the plant. The bid was won by Tractabel of Belgium who have been highly successful in improving plant efficiency. However, the impact of privatisation is now being felt in uncertainty over fuel supply. Removing such uncertainty in order to maintain existing investment and provide the additional 4000MW of generating capacity needed to keep pace with demand, is a major problem which the incoming government faces. (UK)

  9. Bipolarly stacked electrolyser for energy and space efficient fabrication of supercapacitor electrodes

    Science.gov (United States)

    Liu, Xiaojuan; Wu, Tao; Dai, Zengxin; Tao, Keran; Shi, Yong; Peng, Chuang; Zhou, Xiaohang; Chen, George Z.

    2016-03-01

    Stacked electrolysers with titanium bipolar plates are constructed for electrodeposition of polypyrrole electrodes for supercapacitors. The cathode side of the bipolar Ti plates are pre-coated with activated carbon. In this new design, half electrolysis occurs which significantly lowers the deposition voltage. The deposited electrodes are tested in a symmetrical unit cell supercapacitor and an asymmetrical supercapacitor stack. Both devices show excellent energy storage performances and the capacitance values are very close to the design value, suggesting a very high current efficiency during the electrodeposition. The electrolyser stack offers multi-fold benefits for preparation of conducting polymer electrodes, i.e. low energy consumption, facile control of the electrode capacitance and simultaneous preparation of a number of identical electrodes. Therefore, the stacked bipolar electrolyser is a technology advance that offers an engineering solution for mass production of electrodeposited conducting polymer electrodes for supercapacitors.

  10. Hardware-in-the-Loop Testing

    Data.gov (United States)

    Federal Laboratory Consortium — RTC has a suite of Hardware-in-the Loop facilities that include three operational facilities that provide performance assessment and production acceptance testing of...

  11. Hardware device binding and mutual authentication

    Science.gov (United States)

    Hamlet, Jason R; Pierson, Lyndon G

    2014-03-04

    Detection and deterrence of device tampering and subversion by substitution may be achieved by including a cryptographic unit within a computing device for binding multiple hardware devices and mutually authenticating the devices. The cryptographic unit includes a physically unclonable function ("PUF") circuit disposed in or on the hardware device, which generates a binding PUF value. The cryptographic unit uses the binding PUF value during an enrollment phase and subsequent authentication phases. During a subsequent authentication phase, the cryptographic unit uses the binding PUF values of the multiple hardware devices to generate a challenge to send to the other device, and to verify a challenge received from the other device to mutually authenticate the hardware devices.

  12. Implementation of Hardware Accelerators on Zynq

    DEFF Research Database (Denmark)

    Toft, Jakob Kenn

    of the ARM Cortex-9 processor featured on the Zynq SoC, with regard to execution time, power dissipation and energy consumption. The implementation of the hardware accelerators were successful. Use of the Monte Carlo processor resulted in a significant increase in performance. The Telco hardware accelerator......In the recent years it has become obvious that the performance of general purpose processors are having trouble meeting the requirements of high performance computing applications of today. This is partly due to the relatively high power consumption, compared to the performance, of general purpose...... processors, which has made hardware accelerators an essential part of several datacentres and the worlds fastest super-computers. In this work, two different hardware accelerators were implemented on a Xilinx Zynq SoC platform mounted on the ZedBoard platform. The two accelerators are based on two different...

  13. Cooperative communications hardware, channel and PHY

    CERN Document Server

    Dohler, Mischa

    2010-01-01

    Facilitating Cooperation for Wireless Systems Cooperative Communications: Hardware, Channel & PHY focuses on issues pertaining to the PHY layer of wireless communication networks, offering a rigorous taxonomy of this dispersed field, along with a range of application scenarios for cooperative and distributed schemes, demonstrating how these techniques can be employed. The authors discuss hardware, complexity and power consumption issues, which are vital for understanding what can be realized at the PHY layer, showing how wireless channel models differ from more traditional

  14. Designing Secure Systems on Reconfigurable Hardware

    OpenAIRE

    Huffmire, Ted; Brotherton, Brett; Callegari, Nick; Valamehr, Jonathan; White, Jeff; Kastner, Ryan; Sherwood, Ted

    2008-01-01

    The extremely high cost of custom ASIC fabrication makes FPGAs an attractive alternative for deployment of custom hardware. Embedded systems based on reconfigurable hardware integrate many functions onto a single device. Since embedded designers often have no choice but to use soft IP cores obtained from third parties, the cores operate at different trust levels, resulting in mixed trust designs. The goal of this project is to evaluate recently proposed security primitives for reconfigurab...

  15. IDD Archival Hardware Architecture and Workflow

    Energy Technology Data Exchange (ETDEWEB)

    Mendonsa, D; Nekoogar, F; Martz, H

    2008-10-09

    This document describes the functionality of every component in the DHS/IDD archival and storage hardware system shown in Fig. 1. The document describes steps by step process of image data being received at LLNL then being processed and made available to authorized personnel and collaborators. Throughout this document references will be made to one of two figures, Fig. 1 describing the elements of the architecture and the Fig. 2 describing the workflow and how the project utilizes the available hardware.

  16. Density of oxidation-induced stacking faults in damaged silicon

    NARCIS (Netherlands)

    Kuper, F.G.; Hosson, J.Th.M. De; Verwey, J.F.

    1986-01-01

    A model for the relation between density and length of oxidation-induced stacking faults on damaged silicon surfaces is proposed, based on interactions of stacking faults with dislocations and neighboring stacking faults. The model agrees with experiments.

  17. Software for Managing Inventory of Flight Hardware

    Science.gov (United States)

    Salisbury, John; Savage, Scott; Thomas, Shirman

    2003-01-01

    The Flight Hardware Support Request System (FHSRS) is a computer program that relieves engineers at Marshall Space Flight Center (MSFC) of most of the non-engineering administrative burden of managing an inventory of flight hardware. The FHSRS can also be adapted to perform similar functions for other organizations. The FHSRS affords a combination of capabilities, including those formerly provided by three separate programs in purchasing, inventorying, and inspecting hardware. The FHSRS provides a Web-based interface with a server computer that supports a relational database of inventory; electronic routing of requests and approvals; and electronic documentation from initial request through implementation of quality criteria, acquisition, receipt, inspection, storage, and final issue of flight materials and components. The database lists both hardware acquired for current projects and residual hardware from previous projects. The increased visibility of residual flight components provided by the FHSRS has dramatically improved the re-utilization of materials in lieu of new procurements, resulting in a cost savings of over $1.7 million. The FHSRS includes subprograms for manipulating the data in the database, informing of the status of a request or an item of hardware, and searching the database on any physical or other technical characteristic of a component or material. The software structure forces normalization of the data to facilitate inquiries and searches for which users have entered mixed or inconsistent values.

  18. Benchmarking and Hardware-In-The-Loop Operation of a ...

    Science.gov (United States)

    Engine Performance evaluation in support of LD MTE. EPA used elements of its ALPHA model to apply hardware-in-the-loop (HIL) controls to the SKYACTIV engine test setup to better understand how the engine would operate in a chassis test after combined with future leading edge technologies, advanced high-efficiency transmission, reduced mass, and reduced roadload. Predict future vehicle performance with Atkinson engine. As part of its technology assessment for the upcoming midterm evaluation of the 2017-2025 LD vehicle GHG emissions regulation, EPA has been benchmarking engines and transmissions to generate inputs for use in its ALPHA model

  19. Dynamical stability of slip-stacking particles

    Energy Technology Data Exchange (ETDEWEB)

    Eldred, Jeffrey; Zwaska, Robert

    2014-09-01

    We study the stability of particles in slip-stacking configuration, used to nearly double proton beam intensity at Fermilab. We introduce universal area factors to calculate the available phase space area for any set of beam parameters without individual simulation. We find perturbative solutions for stable particle trajectories. We establish Booster beam quality requirements to achieve 97% slip-stacking efficiency. We show that slip-stacking dynamics directly correspond to the driven pendulum and to the system of two standing-wave traps moving with respect to each other.

  20. Text-Filled Stacked Area Graphs

    DEFF Research Database (Denmark)

    Kraus, Martin

    2011-01-01

    -filled stacked area graphs; i.e., graphs that feature stacked areas that are filled with small-typed text. Since these graphs allow for computing the text layout automatically, it is possible to include large amounts of textual detail with very little effort. We discuss the most important challenges and some...... solutions for the design of text-filled stacked area graphs with the help of an exemplary visualization of the genres, publication years, and titles of a database of several thousand PC games....

  1. Tunable electro-optic filter stack

    Science.gov (United States)

    Fontecchio, Adam K.; Shriyan, Sameet K.; Bellingham, Alyssa

    2017-09-05

    A holographic polymer dispersed liquid crystal (HPDLC) tunable filter exhibits switching times of no more than 20 microseconds. The HPDLC tunable filter can be utilized in a variety of applications. An HPDLC tunable filter stack can be utilized in a hyperspectral imaging system capable of spectrally multiplexing hyperspectral imaging data acquired while the hyperspectral imaging system is airborne. HPDLC tunable filter stacks can be utilized in high speed switchable optical shielding systems, for example as a coating for a visor or an aircraft canopy. These HPDLC tunable filter stacks can be fabricated using a spin coating apparatus and associated fabrication methods.

  2. Test system design for Hardware-in-Loop evaluation of PEM fuel cells and auxiliaries

    Energy Technology Data Exchange (ETDEWEB)

    Randolf, Guenter; Moore, Robert M. [Hawaii Natural Energy Institute, University of Hawaii, Honolulu, HI (United States)

    2006-07-14

    In order to evaluate the dynamic behavior of proton exchange membrane (PEM) fuel cells and their auxiliaries, the dynamic capability of the test system must exceed the dynamics of the fastest component within the fuel cell or auxiliary component under test. This criterion is even more critical when a simulated component of the fuel cell system (e.g., the fuel cell stack) is replaced by hardware and Hardware-in-Loop (HiL) methodology is employed. This paper describes the design of a very fast dynamic test system for fuel cell transient research and HiL evaluation. The integration of the real time target (which runs the simulation), the test stand PC (that controls the operation of the test stand), and the programmable logic controller (PLC), for safety and low-level control tasks, into one single integrated unit is successfully completed. (author)

  3. Characterization of Piezoelectric Stacks for Space Applications

    Science.gov (United States)

    Sherrit, Stewart; Jones, Christopher; Aldrich, Jack; Blodget, Chad; Bao, Xiaoqi; Badescu, Mircea; Bar-Cohen, Yoseph

    2008-01-01

    Future NASA missions are increasingly seeking to actuate mechanisms to precision levels in the nanometer range and below. Co-fired multilayer piezoelectric stacks offer the required actuation precision that is needed for such mechanisms. To obtain performance statistics and determine reliability for extended use, sets of commercial PZT stacks were tested in various AC and DC conditions at both nominal and high temperatures and voltages. In order to study the lifetime performance of these stacks, five actuators were driven sinusoidally for up to ten billion cycles. An automated data acquisition system was developed and implemented to monitor each stack's electrical current and voltage waveforms over the life of the test. As part of the monitoring tests, the displacement, impedance, capacitance and leakage current were measured to assess the operation degradation. This paper presents some of the results of this effort.

  4. The stack on software and sovereignty

    CERN Document Server

    Bratton, Benjamin H

    2016-01-01

    A comprehensive political and design theory of planetary-scale computation proposing that The Stack -- an accidental megastructure -- is both a technological apparatus and a model for a new geopolitical architecture.

  5. Development of Auto-Stacking Warehouse Truck

    Directory of Open Access Journals (Sweden)

    Kuo-Hsien Hsia

    2018-03-01

    Full Text Available Warehouse automation is a very important issue for the promotion of traditional industries. For the production of larger and stackable products, it is usually necessary to operate a fork-lifter for the stacking and storage of the products by a skilled person. The general autonomous warehouse-truck does not have the ability of stacking objects. In this paper, we develop a prototype of auto-stacking warehouse-truck that can work without direct operation by a skill person. With command made by an RFID card, the stacker truck can take the packaged product to the warehouse on the prior-planned route and store it in a stacking way in the designated storage area, or deliver the product to the shipping area or into the container from the storage area. It can significantly reduce the manpower requirements of the skilled-person of forklift technician and improve the safety of the warehousing area.

  6. VEG-01: Veggie Hardware Verification Testing

    Science.gov (United States)

    Massa, Gioia; Newsham, Gary; Hummerick, Mary; Morrow, Robert; Wheeler, Raymond

    2013-01-01

    The Veggie plant/vegetable production system is scheduled to fly on ISS at the end of2013. Since much of the technology associated with Veggie has not been previously tested in microgravity, a hardware validation flight was initiated. This test will allow data to be collected about Veggie hardware functionality on ISS, allow crew interactions to be vetted for future improvements, validate the ability of the hardware to grow and sustain plants, and collect data that will be helpful to future Veggie investigators as they develop their payloads. Additionally, food safety data on the lettuce plants grown will be collected to help support the development of a pathway for the crew to safely consume produce grown on orbit. Significant background research has been performed on the Veggie plant growth system, with early tests focusing on the development of the rooting pillow concept, and the selection of fertilizer, rooting medium and plant species. More recent testing has been conducted to integrate the pillow concept into the Veggie hardware and to ensure that adequate water is provided throughout the growth cycle. Seed sanitation protocols have been established for flight, and hardware sanitation between experiments has been studied. Methods for shipping and storage of rooting pillows and the development of crew procedures and crew training videos for plant activities on-orbit have been established. Science verification testing was conducted and lettuce plants were successfully grown in prototype Veggie hardware, microbial samples were taken, plant were harvested, frozen, stored and later analyzed for microbial growth, nutrients, and A TP levels. An additional verification test, prior to the final payload verification testing, is desired to demonstrate similar growth in the flight hardware and also to test a second set of pillows containing zinnia seeds. Issues with root mat water supply are being resolved, with final testing and flight scheduled for later in 2013.

  7. From Open Source Software to Open Source Hardware

    OpenAIRE

    Viseur , Robert

    2012-01-01

    Part 2: Lightning Talks; International audience; The open source software principles progressively give rise to new initiatives for culture (free culture), data (open data) or hardware (open hardware). The open hardware is experiencing a significant growth but the business models and legal aspects are not well known. This paper is dedicated to the economics of open hardware. We define the open hardware concept and determine intellectual property tools we can apply to open hardware, with a str...

  8. Exploring online evolution of network stacks

    OpenAIRE

    Imai, Pierre

    2013-01-01

    Network stacks today follow a one-size-fits-all philosophy. They are mostly kept unmodified due to often prohibitive costs of engineering, deploying and administrating customisation of the networking software, with the Internet stack architecture still largely being based on designs and assumptions made for the ARPANET 40 years ago. We venture that heterogeneous and rapidly changing networks of the future require, in order to be successful, run-time self-adaptation mechanisms at different tim...

  9. Introduction to co-simulation of software and hardware in embedded processor systems

    Energy Technology Data Exchange (ETDEWEB)

    Dreike, P.L.; McCoy, J.A.

    1996-09-01

    From the dawn of the first use of microprocessors and microcontrollers in embedded systems, the software has been blamed for products being late to market, This is due to software being developed after hardware is fabricated. During the past few years, the use of Hardware Description (or Design) Languages (HDLs) and digital simulation have advanced to a point where the concurrent development of software and hardware can be contemplated using simulation environments. This offers the potential of 50% or greater reductions in time-to-market for embedded systems. This paper is a tutorial on the technical issues that underlie software-hardware (swhw) co-simulation, and the current state of the art. We review the traditional sequential hardware-software design paradigm, and suggest a paradigm for concurrent design, which is supported by co-simulation of software and hardware. This is followed by sections on HDLs modeling and simulation;hardware assisted approaches to simulation; microprocessor modeling methods; brief descriptions of four commercial products for sw-hw co-simulation and a description of our own experiments to develop a co-simulation environment.

  10. StackGAN++: Realistic Image Synthesis with Stacked Generative Adversarial Networks

    OpenAIRE

    Zhang, Han; Xu, Tao; Li, Hongsheng; Zhang, Shaoting; Wang, Xiaogang; Huang, Xiaolei; Metaxas, Dimitris

    2017-01-01

    Although Generative Adversarial Networks (GANs) have shown remarkable success in various tasks, they still face challenges in generating high quality images. In this paper, we propose Stacked Generative Adversarial Networks (StackGAN) aiming at generating high-resolution photo-realistic images. First, we propose a two-stage generative adversarial network architecture, StackGAN-v1, for text-to-image synthesis. The Stage-I GAN sketches the primitive shape and colors of the object based on given...

  11. Flight Hardware Virtualization for On-Board Science Data Processing

    Data.gov (United States)

    National Aeronautics and Space Administration — Utilize Hardware Virtualization technology to benefit on-board science data processing by investigating new real time embedded Hardware Virtualization solutions and...

  12. Non-fuel bearing hardware melting technology

    International Nuclear Information System (INIS)

    Newman, D.F.

    1993-01-01

    Battelle has developed a portable hardware melter concept that would allow spent fuel rod consolidation operations at commercial nuclear power plants to provide significantly more storage space for other spent fuel assemblies in existing pool racks at lower cost. Using low pressure compaction, the non-fuel bearing hardware (NFBH) left over from the removal of spent fuel rods from the stainless steel end fittings and the Zircaloy guide tubes and grid spacers still occupies 1/3 to 2/5 of the volume of the consolidated fuel rod assemblies. Melting the non-fuel bearing hardware reduces its volume by a factor 4 from that achievable with low-pressure compaction. This paper describes: (1) the configuration and design features of Battelle's hardware melter system that permit its portability, (2) the system's throughput capacity, (3) the bases for capital and operating estimates, and (4) the status of NFBH melter demonstration to reduce technical risks for implementation of the concept. Since all NFBH handling and processing operations would be conducted at the reactor site, costs for shipping radioactive hardware to and from a stationary processing facility for volume reduction are avoided. Initial licensing, testing, and installation in the field would follow the successful pattern achieved with rod consolidation technology

  13. Technology leadership: a road map to commercially viable PEMFC stack technology. Paper no. IGEC-1-008

    Energy Technology Data Exchange (ETDEWEB)

    Stone, C. [Ballard Power Systems, Burnaby, British Columbia (Canada)

    2005-07-01

    'Full text:' In February 2005, Ballard announced its most recent advances in PEMFC stack technology. This technology development exhibited, we believe, for the first time the capability of a single PEMFC stack design to demonstrate combined excellence in cost reduction, freeze start capability from -20 C and durability under an automotive OEM defined dynamic operating cycle, comparable to that experienced by a fuel cell stack in an actual vehicle. One month later, building on the above technology leadership demonstration, Ballard announced a technology {sup '}oad map' that defined a path to commercially viability for a PEMFC stack by 2010. The key target parameters for cost reduction, durability, freeze start and stack power density are described in detail along with demonstrated historical capability and a clear path as to how Ballard will achieve the required targets. (author)

  14. Technology leadership: a road map to commercially viable PEMFC stack technology. Paper no. IGEC-1-008

    International Nuclear Information System (INIS)

    Stone, C.

    2005-01-01

    'Full text:' In February 2005, Ballard announced its most recent advances in PEMFC stack technology. This technology development exhibited, we believe, for the first time the capability of a single PEMFC stack design to demonstrate combined excellence in cost reduction, freeze start capability from -20 C and durability under an automotive OEM defined dynamic operating cycle, comparable to that experienced by a fuel cell stack in an actual vehicle. One month later, building on the above technology leadership demonstration, Ballard announced a technology ' oad map' that defined a path to commercially viability for a PEMFC stack by 2010. The key target parameters for cost reduction, durability, freeze start and stack power density are described in detail along with demonstrated historical capability and a clear path as to how Ballard will achieve the required targets. (author)

  15. Creating a Rackspace and NASA Nebula compatible cloud using the OpenStack project (Invited)

    Science.gov (United States)

    Clark, R.

    2010-12-01

    NASA and Rackspace have both provided technology to the OpenStack that allows anyone to create a private Infrastructure as a Service (IaaS) cloud using open source software and commodity hardware. OpenStack is designed and developed completely in the open and with an open governance process. NASA donated Nova, which powers the compute portion of NASA Nebula Cloud Computing Platform, and Rackspace donated Swift, which powers Rackspace Cloud Files. The project is now in continuous development by NASA, Rackspace, and hundreds of other participants. When you create a private cloud using Openstack, you will have the ability to easily interact with your private cloud, a government cloud, and an ecosystem of public cloud providers, using the same API.

  16. Development of an automatic subsea blowout preventer stack control system using PLC based SCADA.

    Science.gov (United States)

    Cai, Baoping; Liu, Yonghong; Liu, Zengkai; Wang, Fei; Tian, Xiaojie; Zhang, Yanzhen

    2012-01-01

    An extremely reliable remote control system for subsea blowout preventer stack is developed based on the off-the-shelf triple modular redundancy system. To meet a high reliability requirement, various redundancy techniques such as controller redundancy, bus redundancy and network redundancy are used to design the system hardware architecture. The control logic, human-machine interface graphical design and redundant databases are developed by using the off-the-shelf software. A series of experiments were performed in laboratory to test the subsea blowout preventer stack control system. The results showed that the tested subsea blowout preventer functions could be executed successfully. For the faults of programmable logic controllers, discrete input groups and analog input groups, the control system could give correct alarms in the human-machine interface. Copyright © 2011 ISA. Published by Elsevier Ltd. All rights reserved.

  17. A Hardware Abstraction Layer in Java

    DEFF Research Database (Denmark)

    Schoeberl, Martin; Korsholm, Stephan; Kalibera, Tomas

    2011-01-01

    Embedded systems use specialized hardware devices to interact with their environment, and since they have to be dependable, it is attractive to use a modern, type-safe programming language like Java to develop programs for them. Standard Java, as a platform-independent language, delegates access...... to devices, direct memory access, and interrupt handling to some underlying operating system or kernel, but in the embedded systems domain resources are scarce and a Java Virtual Machine (JVM) without an underlying middleware is an attractive architecture. The contribution of this article is a proposal...... for Java packages with hardware objects and interrupt handlers that interface to such a JVM. We provide implementations of the proposal directly in hardware, as extensions of standard interpreters, and finally with an operating system middleware. The latter solution is mainly seen as a migration path...

  18. Hardware Acceleration of Adaptive Neural Algorithms.

    Energy Technology Data Exchange (ETDEWEB)

    James, Conrad D. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2017-11-01

    As tradit ional numerical computing has faced challenges, researchers have turned towards alternative computing approaches to reduce power - per - computation metrics and improve algorithm performance. Here, we describe an approach towards non - conventional computing that strengthens the connection between machine learning and neuroscience concepts. The Hardware Acceleration of Adaptive Neural Algorithms (HAANA) project ha s develop ed neural machine learning algorithms and hardware for applications in image processing and cybersecurity. While machine learning methods are effective at extracting relevant features from many types of data, the effectiveness of these algorithms degrades when subjected to real - world conditions. Our team has generated novel neural - inspired approa ches to improve the resiliency and adaptability of machine learning algorithms. In addition, we have also designed and fabricated hardware architectures and microelectronic devices specifically tuned towards the training and inference operations of neural - inspired algorithms. Finally, our multi - scale simulation framework allows us to assess the impact of microelectronic device properties on algorithm performance.

  19. MFTF supervisory control and diagnostics system hardware

    International Nuclear Information System (INIS)

    Butner, D.N.

    1979-01-01

    The Supervisory Control and Diagnostics System (SCDS) for the Mirror Fusion Test Facility (MFTF) is a multiprocessor minicomputer system designed so that for most single-point failures, the hardware may be quickly reconfigured to provide continued operation of the experiment. The system is made up of nine Perkin-Elmer computers - a mixture of 8/32's and 7/32's. Each computer has ports on a shared memory system consisting of two independent shared memory modules. Each processor can signal other processors through hardware external to the shared memory. The system communicates with the Local Control and Instrumentation System, which consists of approximately 65 microprocessors. Each of the six system processors has facilities for communicating with a group of microprocessors; the groups consist of from four to 24 microprocessors. There are hardware switches so that if an SCDS processor communicating with a group of microprocessors fails, another SCDS processor takes over the communication

  20. Hardware Accelerated Sequence Alignment with Traceback

    Directory of Open Access Journals (Sweden)

    Scott Lloyd

    2009-01-01

    in a timely manner. Known methods to accelerate alignment on reconfigurable hardware only address sequence comparison, limit the sequence length, or exhibit memory and I/O bottlenecks. A space-efficient, global sequence alignment algorithm and architecture is presented that accelerates the forward scan and traceback in hardware without memory and I/O limitations. With 256 processing elements in FPGA technology, a performance gain over 300 times that of a desktop computer is demonstrated on sequence lengths of 16000. For greater performance, the architecture is scalable to more processing elements.

  1. Human Centered Hardware Modeling and Collaboration

    Science.gov (United States)

    Stambolian Damon; Lawrence, Brad; Stelges, Katrine; Henderson, Gena

    2013-01-01

    In order to collaborate engineering designs among NASA Centers and customers, to in clude hardware and human activities from multiple remote locations, live human-centered modeling and collaboration across several sites has been successfully facilitated by Kennedy Space Center. The focus of this paper includes innovative a pproaches to engineering design analyses and training, along with research being conducted to apply new technologies for tracking, immersing, and evaluating humans as well as rocket, vehic le, component, or faci lity hardware utilizing high resolution cameras, motion tracking, ergonomic analysis, biomedical monitoring, wor k instruction integration, head-mounted displays, and other innovative human-system integration modeling, simulation, and collaboration applications.

  2. Start-Stop Test Procedures on the PEMFC Stack Level

    DEFF Research Database (Denmark)

    Mitzel, Jens; Nygaard, Frederik; Veltzé, Sune

    The test is addressed to investigate the influence on stack durability of a long stop followed by a restart of a stack. Long stop should be defined as a stop in which the anodic compartment is fully filled by air due to stack leakages. In systems, leakage level of the stack is low and time to fil...

  3. Principles for Instructional Stack Development in HyperCard.

    Science.gov (United States)

    McEneaney, John E.

    The purpose of this paper is to provide information about obtaining and using HyperCard stacks that introduce users to principles of stack development. The HyperCard stacks described are available for downloading free of charge from a server at Indiana University South Bend. Specific directions are given for stack use, with advice for beginners. A…

  4. A polymer electrolyte fuel cell stack for stationary power generation from hydrogen fuel

    Energy Technology Data Exchange (ETDEWEB)

    Gottesfeld, S. [Los Alamos National Lab., NM (United States)

    1995-09-01

    The fuel cell is the most efficient device for the conversion of hydrogen fuel to electric power. As such, the fuel cell represents a key element in efforts to demonstrate and implement hydrogen fuel utilization for electric power generation. The low temperature, polymer electrolyte membrane fuel cell (PEMFC) has recently been identified as an attractive option for stationary power generation, based on the relatively simple and benign materials employed, the zero-emission character of the device, and the expected high power density, high reliability and low cost. However, a PEMFC stack fueled by hydrogen with the combined properties of low cost, high performance and high reliability has not yet been demonstrated. Demonstration of such a stack will remove a significant barrier to implementation of this advanced technology for electric power generation from hydrogen. Work done in the past at LANL on the development of components and materials, particularly on advanced membrane/electrode assemblies (MEAs), has contributed significantly to the capability to demonstrate in the foreseeable future a PEMFC stack with the combined characteristics described above. A joint effort between LANL and an industrial stack manufacturer will result in the demonstration of such a fuel cell stack for stationary power generation. The stack could operate on hydrogen fuel derived from either natural gas or from renewable sources. The technical plan includes collaboration with a stack manufacturer (CRADA). It stresses the special requirements from a PEMFC in stationary power generation, particularly maximization of the energy conversion efficiency, extension of useful life to the 10 hours time scale and tolerance to impurities from the reforming of natural gas.

  5. A Self-Provisioning Mechanism in OpenStack for IoT Devices

    Directory of Open Access Journals (Sweden)

    Antonio Solano

    2016-08-01

    Full Text Available The aim of this paper is to introduce a plug-and-play mechanism for an Internet of Things (IoT device to instantiate a Software as a Service (SaaS application in a private cloud, built up with OpenStack. The SaaS application is the digital avatar of a physical object connected to Internet. As a proof of concept, a Vending Machine is retrofitted and connected to Internet with and Arduino Open Hardware device. Once the self-configuration mechanism is completed, it is possible to order a product from a mobile communication device.

  6. A Self-Provisioning Mechanism in OpenStack for IoT Devices.

    Science.gov (United States)

    Solano, Antonio; Dormido, Raquel; Duro, Natividad; Sánchez, Juan Miguel

    2016-08-17

    The aim of this paper is to introduce a plug-and-play mechanism for an Internet of Things (IoT) device to instantiate a Software as a Service (SaaS) application in a private cloud, built up with OpenStack. The SaaS application is the digital avatar of a physical object connected to Internet. As a proof of concept, a Vending Machine is retrofitted and connected to Internet with and Arduino Open Hardware device. Once the self-configuration mechanism is completed, it is possible to order a product from a mobile communication device.

  7. Forced Air-Breathing PEMFC Stacks

    Directory of Open Access Journals (Sweden)

    K. S. Dhathathreyan

    2012-01-01

    Full Text Available Air-breathing fuel cells have a great potential as power sources for various electronic devices. They differ from conventional fuel cells in which the cells take up oxygen from ambient air by active or passive methods. The air flow occurs through the channels due to concentration and temperature gradient between the cell and the ambient conditions. However developing a stack is very difficult as the individual cell performance may not be uniform. In order to make such a system more realistic, an open-cathode forced air-breathing stacks were developed by making appropriate channel dimensions for the air flow for uniform performance in a stack. At CFCT-ARCI (Centre for Fuel Cell Technology-ARC International we have developed forced air-breathing fuel cell stacks with varying capacity ranging from 50 watts to 1500 watts. The performance of the stack was analysed based on the air flow, humidity, stability, and so forth, The major advantage of the system is the reduced number of bipolar plates and thereby reduction in volume and weight. However, the thermal management is a challenge due to the non-availability of sufficient air flow to remove the heat from the system during continuous operation. These results will be discussed in this paper.

  8. Levitation characteristics of HTS tape stacks

    Energy Technology Data Exchange (ETDEWEB)

    Pokrovskiy, S. V.; Ermolaev, Y. S.; Rudnev, I. A. [National Research Nuclear University MEPhI (Moscow Engineering Physics Institute), Moscow (Russian Federation)

    2015-03-15

    Due to the considerable development of the technology of second generation high-temperature superconductors and a significant improvement in their mechanical and transport properties in the last few years it is possible to use HTS tapes in the magnetic levitation systems. The advantages of tapes on a metal substrate as compared with bulk YBCO material primarily in the strength, and the possibility of optimizing the convenience of manufacturing elements of levitation systems. In the present report presents the results of the magnetic levitation force measurements between the stack of HTS tapes containing of tapes and NdFeB permanent magnet in the FC and ZFC regimes. It was found a non- linear dependence of the levitation force from the height of the array of stack in both modes: linear growth at small thickness gives way to flattening and constant at large number of tapes in the stack. Established that the levitation force of stacks comparable to that of bulk samples. The numerical calculations using finite element method showed that without the screening of the applied field the levitation force of the bulk superconductor and the layered superconductor stack with a critical current of tapes increased by the filling factor is exactly the same, and taking into account the screening force slightly different.

  9. Monitoring and Hardware Management for Critical Fusion Plasma Instrumentation

    Directory of Open Access Journals (Sweden)

    Carvalho Paulo F.

    2018-01-01

    Full Text Available Controlled nuclear fusion aims to obtain energy by particles collision confined inside a nuclear reactor (Tokamak. These ionized particles, heavier isotopes of hydrogen, are the main elements inside of plasma that is kept at high temperatures (millions of Celsius degrees. Due to high temperatures and magnetic confinement, plasma is exposed to several sources of instabilities which require a set of procedures by the control and data acquisition systems throughout fusion experiments processes. Control and data acquisition systems often used in nuclear fusion experiments are based on the Advanced Telecommunication Computer Architecture (AdvancedTCA® standard introduced by the Peripheral Component Interconnect Industrial Manufacturers Group (PICMG®, to meet the demands of telecommunications that require large amount of data (TB transportation at high transfer rates (Gb/s, to ensure high availability including features such as reliability, serviceability and redundancy. For efficient plasma control, systems are required to collect large amounts of data, process it, store for later analysis, make critical decisions in real time and provide status reports either from the experience itself or the electronic instrumentation involved. Moreover, systems should also ensure the correct handling of detected anomalies and identified faults, notify the system operator of occurred events, decisions taken to acknowledge and implemented changes. Therefore, for everything to work in compliance with specifications it is required that the instrumentation includes hardware management and monitoring mechanisms for both hardware and software. These mechanisms should check the system status by reading sensors, manage events, update inventory databases with hardware system components in use and maintenance, store collected information, update firmware and installed software modules, configure and handle alarms to detect possible system failures and prevent emergency

  10. Monitoring and Hardware Management for Critical Fusion Plasma Instrumentation

    Science.gov (United States)

    Carvalho, Paulo F.; Santos, Bruno; Correia, Miguel; Combo, Álvaro M.; Rodrigues, AntÓnio P.; Pereira, Rita C.; Fernandes, Ana; Cruz, Nuno; Sousa, Jorge; Carvalho, Bernardo B.; Batista, AntÓnio J. N.; Correia, Carlos M. B. A.; Gonçalves, Bruno

    2018-01-01

    Controlled nuclear fusion aims to obtain energy by particles collision confined inside a nuclear reactor (Tokamak). These ionized particles, heavier isotopes of hydrogen, are the main elements inside of plasma that is kept at high temperatures (millions of Celsius degrees). Due to high temperatures and magnetic confinement, plasma is exposed to several sources of instabilities which require a set of procedures by the control and data acquisition systems throughout fusion experiments processes. Control and data acquisition systems often used in nuclear fusion experiments are based on the Advanced Telecommunication Computer Architecture (AdvancedTCA®) standard introduced by the Peripheral Component Interconnect Industrial Manufacturers Group (PICMG®), to meet the demands of telecommunications that require large amount of data (TB) transportation at high transfer rates (Gb/s), to ensure high availability including features such as reliability, serviceability and redundancy. For efficient plasma control, systems are required to collect large amounts of data, process it, store for later analysis, make critical decisions in real time and provide status reports either from the experience itself or the electronic instrumentation involved. Moreover, systems should also ensure the correct handling of detected anomalies and identified faults, notify the system operator of occurred events, decisions taken to acknowledge and implemented changes. Therefore, for everything to work in compliance with specifications it is required that the instrumentation includes hardware management and monitoring mechanisms for both hardware and software. These mechanisms should check the system status by reading sensors, manage events, update inventory databases with hardware system components in use and maintenance, store collected information, update firmware and installed software modules, configure and handle alarms to detect possible system failures and prevent emergency scenarios

  11. Enabling Open Hardware through FOSS tools

    CERN Multimedia

    CERN. Geneva

    2016-01-01

    Software developers often take open file formats and tools for granted. When you publish code on github, you do not ask yourself if somebody will be able to open it and modify it. We need the same freedom in the open hardware world, to make it truly accessible for everyone.

  12. Hardware and layout aspects affecting maintainability

    International Nuclear Information System (INIS)

    Jayaraman, V.N.; Surendar, Ch.

    1977-01-01

    It has been found from maintenance experience at the Rajasthan Atomic Power Station that proper hardware and instrumentation layout can reduce maintenance and down-time on the related equipment. The problems faced in this connection and how they were solved is narrated. (M.G.B.)

  13. CAMAC high energy physics electronics hardware

    International Nuclear Information System (INIS)

    Kolpakov, I.F.

    1977-01-01

    CAMAC hardware for high energy physics large spectrometers and control systems is reviewed as is the development of CAMAC modules at the High Energy Laboratory, JINR (Dubna). The total number of crates used at the Laboratory is 179. The number of CAMAC modules of 120 different types exceeds 1700. The principles of organization and the structure of developed CAMAC systems are described. (author)

  14. Design of hardware accelerators for demanding applications.

    NARCIS (Netherlands)

    Jozwiak, L.; Jan, Y.

    2010-01-01

    This paper focuses on mastering the architecture development of hardware accelerators. It presents the results of our analysis of the main issues that have to be addressed when designing accelerators for modern demanding applications, when using as an example the accelerator design for LDPC decoding

  15. Building Correlators with Many-Core Hardware

    NARCIS (Netherlands)

    van Nieuwpoort, R.V.

    2010-01-01

    Radio telescopes typically consist of multiple receivers whose signals are cross-correlated to filter out noise. A recent trend is to correlate in software instead of custom-built hardware, taking advantage of the flexibility that software solutions offer. Examples include e-VLBI and LOFAR. However,

  16. Computer hardware for radiologists: Part I

    Directory of Open Access Journals (Sweden)

    Indrajit I

    2010-01-01

    Full Text Available Computers are an integral part of modern radiology practice. They are used in different radiology modalities to acquire, process, and postprocess imaging data. They have had a dramatic influence on contemporary radiology practice. Their impact has extended further with the emergence of Digital Imaging and Communications in Medicine (DICOM, Picture Archiving and Communication System (PACS, Radiology information system (RIS technology, and Teleradiology. A basic overview of computer hardware relevant to radiology practice is presented here. The key hardware components in a computer are the motherboard, central processor unit (CPU, the chipset, the random access memory (RAM, the memory modules, bus, storage drives, and ports. The personnel computer (PC has a rectangular case that contains important components called hardware, many of which are integrated circuits (ICs. The fiberglass motherboard is the main printed circuit board and has a variety of important hardware mounted on it, which are connected by electrical pathways called "buses". The CPU is the largest IC on the motherboard and contains millions of transistors. Its principal function is to execute "programs". A Pentium® 4 CPU has transistors that execute a billion instructions per second. The chipset is completely different from the CPU in design and function; it controls data and interaction of buses between the motherboard and the CPU. Memory (RAM is fundamentally semiconductor chips storing data and instructions for access by a CPU. RAM is classified by storage capacity, access speed, data rate, and configuration.

  17. Computer hardware for radiologists: Part I

    International Nuclear Information System (INIS)

    Indrajit, IK; Alam, A

    2010-01-01

    Computers are an integral part of modern radiology practice. They are used in different radiology modalities to acquire, process, and postprocess imaging data. They have had a dramatic influence on contemporary radiology practice. Their impact has extended further with the emergence of Digital Imaging and Communications in Medicine (DICOM), Picture Archiving and Communication System (PACS), Radiology information system (RIS) technology, and Teleradiology. A basic overview of computer hardware relevant to radiology practice is presented here. The key hardware components in a computer are the motherboard, central processor unit (CPU), the chipset, the random access memory (RAM), the memory modules, bus, storage drives, and ports. The personnel computer (PC) has a rectangular case that contains important components called hardware, many of which are integrated circuits (ICs). The fiberglass motherboard is the main printed circuit board and has a variety of important hardware mounted on it, which are connected by electrical pathways called “buses”. The CPU is the largest IC on the motherboard and contains millions of transistors. Its principal function is to execute “programs”. A Pentium ® 4 CPU has transistors that execute a billion instructions per second. The chipset is completely different from the CPU in design and function; it controls data and interaction of buses between the motherboard and the CPU. Memory (RAM) is fundamentally semiconductor chips storing data and instructions for access by a CPU. RAM is classified by storage capacity, access speed, data rate, and configuration

  18. Environmental Control System Software & Hardware Development

    Science.gov (United States)

    Vargas, Daniel Eduardo

    2017-01-01

    ECS hardware: (1) Provides controlled purge to SLS Rocket and Orion spacecraft. (2) Provide mission-focused engineering products and services. ECS software: (1) NASA requires Compact Unique Identifiers (CUIs); fixed-length identifier used to identify information items. (2) CUI structure; composed of nine semantic fields that aid the user in recognizing its purpose.

  19. Digital Hardware Design Teaching: An Alternative Approach

    Science.gov (United States)

    Benkrid, Khaled; Clayton, Thomas

    2012-01-01

    This article presents the design and implementation of a complete review of undergraduate digital hardware design teaching in the School of Engineering at the University of Edinburgh. Four guiding principles have been used in this exercise: learning-outcome driven teaching, deep learning, affordability, and flexibility. This has identified…

  20. The fast Amsterdam multiprocessor (FAMP) system hardware

    International Nuclear Information System (INIS)

    Hertzberger, L.O.; Kieft, G.; Kisielewski, B.; Wiggers, L.W.; Engster, C.; Koningsveld, L. van

    1981-01-01

    The architecture of a multiprocessor system is described that will be used for on-line filter and second stage trigger applications. The system is based on the MC 68000 microprocessor from Motorola. Emphasis is paid to hardware aspects, in particular the modularity, processor communication and interfacing, whereas the system software and the applications will be described in separate articles. (orig.)

  1. Remote hardware-reconfigurable robotic camera

    Science.gov (United States)

    Arias-Estrada, Miguel; Torres-Huitzil, Cesar; Maya-Rueda, Selene E.

    2001-10-01

    In this work, a camera with integrated image processing capabilities is discussed. The camera is based on an imager coupled to an FPGA device (Field Programmable Gate Array) which contains an architecture for real-time computer vision low-level processing. The architecture can be reprogrammed remotely for application specific purposes. The system is intended for rapid modification and adaptation for inspection and recognition applications, with the flexibility of hardware and software reprogrammability. FPGA reconfiguration allows the same ease of upgrade in hardware as a software upgrade process. The camera is composed of a digital imager coupled to an FPGA device, two memory banks, and a microcontroller. The microcontroller is used for communication tasks and FPGA programming. The system implements a software architecture to handle multiple FPGA architectures in the device, and the possibility to download a software/hardware object from the host computer into its internal context memory. System advantages are: small size, low power consumption, and a library of hardware/software functionalities that can be exchanged during run time. The system has been validated with an edge detection and a motion processing architecture, which will be presented in the paper. Applications targeted are in robotics, mobile robotics, and vision based quality control.

  2. Development of an Integrated Polymer Microfluidic Stack

    International Nuclear Information System (INIS)

    Datta, Proyag; Hammacher, Jens; Pease, Mark; Gurung, Sitanshu; Goettert, Jost

    2006-01-01

    Microfluidic is a field of considerable interest. While significant research has been carried out to develop microfluidic components, very little has been done to integrate the components into a complete working system. We present a flexible modular system platform that addresses the requirements of a complete microfluidic system. A microfluidic stack system is demonstrated with the layers of the stack being modular for specific functions. The stack and accompanying infrastructure provides an attractive platform for users to transition their design concepts into a working microfluidic system quickly with very little effort. The concept is demonstrated by using the system to carry out a chemilumiscence experiment. Details regarding the fabrication, assembly and experimental methods are presented

  3. High power, repetitive stacked Blumlein pulse generators

    Energy Technology Data Exchange (ETDEWEB)

    Davanloo, F; Borovina, D L; Korioth, J L; Krause, R K; Collins, C B [Univ. of Texas at Dallas, Richardson, TX (United States). Center for Quantum Electronics; Agee, F J [US Air Force Phillips Lab., Kirtland AFB, NM (United States); Kingsley, L E [US Army CECOM, Ft. Monmouth, NJ (United States)

    1997-12-31

    The repetitive stacked Blumlein pulse power generators developed at the University of Texas at Dallas consist of several triaxial Blumleins stacked in series at one end. The lines are charged in parallel and synchronously commuted with a single switch at the other end. In this way, relatively low charging voltages are multiplied to give a high discharge voltage across an arbitrary load. Extensive characterization of these novel pulsers have been performed over the past few years. Results indicate that they are capable of producing high power waveforms with rise times and repetition rates in the range of 0.5-50 ns and 1-300 Hz, respectively, using a conventional thyratron, spark gap, or photoconductive switch. The progress in the development and use of stacked Blumlein pulse generators is reviewed. The technology and the characteristics of these novel pulsers driving flash x-ray diodes are discussed. (author). 4 figs., 5 refs.

  4. Calculation of tritium release from reactor's stack

    International Nuclear Information System (INIS)

    Akhadi, M.

    1996-01-01

    Method for calculation of tritium release from nuclear to environment has been discussed. Part of gas effluent contain tritium in form of HTO vapor released from reactor's stack was sampled using silica-gel. The silica-gel was put in the water to withdraw HTO vapor absorbed by silica-gel. Tritium concentration in the water was measured by liquid scintillation counter of Aloka LSC-703. Tritium concentration in the gas effluent and total release of tritium from reactor's stack during certain interval time were calculated using simple mathematic formula. This method has examined for calculation of tritium release from JRR-3M's stack of JAERI, Japan. From the calculation it was obtained the value of tritium release as much as 4.63 x 10 11 Bq during one month. (author)

  5. Nonlinearly stacked low noise turbofan stator

    Science.gov (United States)

    Schuster, William B. (Inventor); Nolcheff, Nick A. (Inventor); Gunaraj, John A. (Inventor); Kontos, Karen B. (Inventor); Weir, Donald S. (Inventor)

    2009-01-01

    A nonlinearly stacked low noise turbofan stator vane having a characteristic curve that is characterized by a nonlinear sweep and a nonlinear lean is provided. The stator is in an axial fan or compressor turbomachinery stage that is comprised of a collection of vanes whose highly three-dimensional shape is selected to reduce rotor-stator and rotor-strut interaction noise while maintaining the aerodynamic and mechanical performance of the vane. The nonlinearly stacked low noise turbofan stator vane reduces noise associated with the fan stage of turbomachinery to improve environmental compatibility.

  6. Stack Monitoring System At PUSPATI TRIGA Reactor

    International Nuclear Information System (INIS)

    Zamrul Faizad Omar; Mohd Sabri Minhat; Zareen Khan Abdul Jalil Khan; Ridzuan Abdul Mutalib; Khairulezwan Abdul Manan; Nurfarhana Ayuni Joha; Izhar Abu Hussin

    2014-01-01

    This paper describes the current Stack Monitoring System at PUSPATI TRIGA Reactor (RTP) building. A stack monitoring system is a continuous air monitor placed at the reactor top for monitoring the presence of radioactive gaseous in the effluent air from the RTP building. The system consists of four detectors that provide the reading for background, particulate, Iodine and Noble gas. There is a plan to replace the current system due to frequent fault of the system, thus thorough understanding of the current system is required. Overview of the whole system will be explained in this paper. Some current results would be displayed and moving forward brief plan would be mentioned. (author)

  7. Test Program for Stirling Radioisotope Generator Hardware at NASA Glenn Research Center

    Science.gov (United States)

    Lewandowski, Edward J.; Bolotin, Gary S.; Oriti, Salvatore M.

    2015-01-01

    Stirling-based energy conversion technology has demonstrated the potential of high efficiency and low mass power systems for future space missions. This capability is beneficial, if not essential, to making certain deep space missions possible. Significant progress was made developing the Advanced Stirling Radioisotope Generator (ASRG), a 140-W radioisotope power system. A variety of flight-like hardware, including Stirling convertors, controllers, and housings, was designed and built under the ASRG flight development project. To support future Stirling-based power system development NASA has proposals that, if funded, will allow this hardware to go on test at the NASA Glenn Research Center. While future flight hardware may not be identical to the hardware developed under the ASRG flight development project, many components will likely be similar, and system architectures may have heritage to ASRG. Thus, the importance of testing the ASRG hardware to the development of future Stirling-based power systems cannot be understated. This proposed testing will include performance testing, extended operation to establish an extensive reliability database, and characterization testing to quantify subsystem and system performance and better understand system interfaces. This paper details this proposed test program for Stirling radioisotope generator hardware at NASA Glenn. It explains the rationale behind the proposed tests and how these tests will meet the stated objectives.

  8. Hardware for dynamic quantum computing experiments: Part I

    Science.gov (United States)

    Johnson, Blake; Ryan, Colm; Riste, Diego; Donovan, Brian; Ohki, Thomas

    Static, pre-defined control sequences routinely achieve high-fidelity operation on superconducting quantum processors. Efforts toward dynamic experiments depending on real-time information have mostly proceeded through hardware duplication and triggers, requiring a combinatorial explosion in the number of channels. We provide a hardware efficient solution to dynamic control with a complete platform of specialized FPGA-based control and readout electronics; these components enable arbitrary control flow, low-latency feedback and/or feedforward, and scale far beyond single-qubit control and measurement. We will introduce the BBN Arbitrary Pulse Sequencer 2 (APS2) control system and the X6 QDSP readout platform. The BBN APS2 features: a sequencer built around implementing short quantum gates, a sequence cache to allow long sequences with branching structures, subroutines for code re-use, and a trigger distribution module to capture and distribute steering information. The X6 QDSP features a single-stage DSP pipeline that combines demodulation with arbitrary integration kernels, and multiple taps to inspect data flow for debugging and calibration. We will show system performance when putting it all together, including a latency budget for feedforward operations. This research was funded by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA), through the Army Research Office Contract No. W911NF-10-1-0324.

  9. Hardware and software status of QCDOC

    International Nuclear Information System (INIS)

    Boyle, P.A.; Chen, D.; Christ, N.H.; Clark, M.; Cohen, S.D.; Cristian, C.; Dong, Z.; Gara, A.; Joo, B.; Jung, C.; Kim, C.; Levkova, L.; Liao, X.; Liu, G.; Mawhinney, R.D.; Ohta, S.; Petrov, K.; Wettig, T.; Yamaguchi, A.

    2004-01-01

    QCDOC is a massively parallel supercomputer whose processing nodes are based on an application-specific integrated circuit (ASIC). This ASIC was custom-designed so that crucial lattice QCD kernels achieve an overall sustained performance of 50% on machines with several 10,000 nodes. This strong scalability, together with low power consumption and a price/performance ratio of $1 per sustained MFlops, enable QCDOC to attack the most demanding lattice QCD problems. The first ASICs became available in June of 2003, and the testing performed so far has shown all systems functioning according to specification. We review the hardware and software status of QCDOC and present performance figures obtained in real hardware as well as in simulation

  10. Stacked spheres and lower bound theorem

    Indian Academy of Sciences (India)

    BASUDEB DATTA

    2011-11-20

    Nov 20, 2011 ... Preliminaries. Lower bound theorem. On going work. Definitions. An n-simplex is a convex hull of n + 1 affinely independent points. (called vertices) in some Euclidean space R. N . Stacked spheres and lower bound theorem. Basudeb Datta. Indian Institute of Science. 2 / 27 ...

  11. Contemporary sample stacking in analytical electrophoresis

    Czech Academy of Sciences Publication Activity Database

    Šlampová, Andrea; Malá, Zdeňka; Pantůčková, Pavla; Gebauer, Petr; Boček, Petr

    2013-01-01

    Roč. 34, č. 1 (2013), s. 3-18 ISSN 0173-0835 R&D Projects: GA ČR GAP206/10/1219 Institutional support: RVO:68081715 Keywords : biological samples * stacking * trace analysis * zone electrophoresis Subject RIV: CB - Analytical Chemistry, Separation Impact factor: 3.161, year: 2013

  12. SRS reactor stack plume marking tests

    International Nuclear Information System (INIS)

    Petry, S.F.

    1992-03-01

    Tests performed in 105-K in 1987 and 1988 demonstrated that the stack plume can successfully be made visible (i.e., marked) by introducing smoke into the stack breech. The ultimate objective of these tests is to provide a means during an emergency evacuation so that an evacuee can readily identify the stack plume and evacuate in the opposite direction, thus minimizing the potential of severe radiation exposure. The EPA has also requested DOE to arrange for more tests to settle a technical question involving the correct calculation of stack downwash. New test canisters were received in 1988 designed to produce more smoke per unit time; however, these canisters have not been evaluated, because normal ventilation conditions have not been reestablished in K Area. Meanwhile, both the authorization and procedure to conduct the tests have expired. The tests can be performed during normal reactor operation. It is recommended that appropriate authorization and procedure approval be obtained to resume testing after K Area restart

  13. Scaling the CERN OpenStack cloud

    Science.gov (United States)

    Bell, T.; Bompastor, B.; Bukowiec, S.; Castro Leon, J.; Denis, M. K.; van Eldik, J.; Fermin Lobo, M.; Fernandez Alvarez, L.; Fernandez Rodriguez, D.; Marino, A.; Moreira, B.; Noel, B.; Oulevey, T.; Takase, W.; Wiebalck, A.; Zilli, S.

    2015-12-01

    CERN has been running a production OpenStack cloud since July 2013 to support physics computing and infrastructure services for the site. In the past year, CERN Cloud Infrastructure has seen a constant increase in nodes, virtual machines, users and projects. This paper will present what has been done in order to make the CERN cloud infrastructure scale out.

  14. Stacking non-BPS D-branes

    International Nuclear Information System (INIS)

    Alberghi, Gian Luigi; Caceres, Elena; Goldstein, Kevin; Lowe, David A. . lowe@het.brown.edu

    2001-08-01

    We present a candidate supergravity solution for a stacked configuration of stable non-BPS D-branes in Type II string theory compactified on T 4 /Z 2 . This gives a supergravity description of nonabelian tachyon condensation on the brane woldvolume. (author)

  15. Trace interpolation by slant-stack migration

    International Nuclear Information System (INIS)

    Novotny, M.

    1990-01-01

    The slant-stack migration formula based on the radon transform is studied with respect to the depth steep Δz of wavefield extrapolation. It can be viewed as a generalized trace-interpolation procedure including wave extrapolation with an arbitrary step Δz. For Δz > 0 the formula yields the familiar plane-wave decomposition, while for Δz > 0 it provides a robust tool for migration transformation of spatially under sampled wavefields. Using the stationary phase method, it is shown that the slant-stack migration formula degenerates into the Rayleigh-Sommerfeld integral in the far-field approximation. Consequently, even a narrow slant-stack gather applied before the diffraction stack can significantly improve the representation of noisy data in the wavefield extrapolation process. The theory is applied to synthetic and field data to perform trace interpolation and dip reject filtration. The data examples presented prove that the radon interpolator works well in the dip range, including waves with mutual stepouts smaller than half the dominant period

  16. Contemporary sample stacking in analytical electrophoresis

    Czech Academy of Sciences Publication Activity Database

    Malá, Zdeňka; Šlampová, Andrea; Křivánková, Ludmila; Gebauer, Petr; Boček, Petr

    2015-01-01

    Roč. 36, č. 1 (2015), s. 15-35 ISSN 0173-0835 R&D Projects: GA ČR(CZ) GA13-05762S Institutional support: RVO:68081715 Keywords : biological samples * stacking * trace analysis * zone electrophoresis Subject RIV: CB - Analytical Chemistry, Separation Impact factor: 2.482, year: 2015

  17. 40 CFR 61.53 - Stack sampling.

    Science.gov (United States)

    2010-07-01

    ... 40 Protection of Environment 8 2010-07-01 2010-07-01 false Stack sampling. 61.53 Section 61.53 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED) NATIONAL... sampling. (a) Mercury ore processing facility. (1) Unless a waiver of emission testing is obtained under...

  18. 40 CFR 61.33 - Stack sampling.

    Science.gov (United States)

    2010-07-01

    ... 40 Protection of Environment 8 2010-07-01 2010-07-01 false Stack sampling. 61.33 Section 61.33 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED) NATIONAL... sampling. (a) Unless a waiver of emission testing is obtained under § 61.13, each owner or operator...

  19. OpenStack cloud computing cookbook

    CERN Document Server

    Jackson, Kevin

    2013-01-01

    A Cookbook full of practical and applicable recipes that will enable you to use the full capabilities of OpenStack like never before.This book is aimed at system administrators and technical architects moving from a virtualized environment to cloud environments with familiarity of cloud computing platforms. Knowledge of virtualization and managing linux environments is expected.

  20. Toward advising SME's on stacked funding

    NARCIS (Netherlands)

    Rauwerda, Kirsten; van Teeffelen, Lex; de Graaf, Frank Jan

    2017-01-01

    This paper addresses new funding issues faced by SMEs. Over a period of nine months, the authors conducted a preliminary study into the problems surrounding stacked funding faced by SMEs and their financial advisers. The study includes a short literature review, the outcomes of three round table

  1. Photoswitchable Intramolecular H-Stacking of Perylenebisimide

    NARCIS (Netherlands)

    Wang, Jiaobing; Kulago, Artem; Browne, Wesley R.; Feringa, Ben L.

    2010-01-01

    Dynamic control over the formation of H- or J-type aggregates of chromophores is of fundamental importance for developing responsive organic optoelectronic materials. In this study, the first example of photoswitching between a nonstacked and an intramolecularly H-stacked arrangement of

  2. Optoelectronic interconnects for 3D wafer stacks

    Science.gov (United States)

    Ludwig, David; Carson, John C.; Lome, Louis S.

    1996-01-01

    Wafer and chip stacking are envisioned as means of providing increased processing power within the small confines of a three-dimensional structure. Optoelectronic devices can play an important role in these dense 3-D processing electronic packages in two ways. In pure electronic processing, optoelectronics can provide a method for increasing the number of input/output communication channels within the layers of the 3-D chip stack. Non-free space communication links allow the density of highly parallel input/output ports to increase dramatically over typical edge bus connections. In hybrid processors, where electronics and optics play a role in defining the computational algorithm, free space communication links are typically utilized for, among other reasons, the increased network link complexity which can be achieved. Free space optical interconnections provide bandwidths and interconnection complexity unobtainable in pure electrical interconnections. Stacked 3-D architectures can provide the electronics real estate and structure to deal with the increased bandwidth and global information provided by free space optical communications. This paper will provide definitions and examples of 3-D stacked architectures in optoelectronics processors. The benefits and issues of these technologies will be discussed.

  3. OpenStack Object Storage (Swift) essentials

    CERN Document Server

    Kapadia, Amar; Varma, Sreedhar

    2015-01-01

    If you are an IT administrator and you want to enter the world of cloud storage using OpenStack Swift, then this book is ideal for you. Basic knowledge of Linux and server technology is beneficial to get the most out of the book.

  4. Electrochemical Characterization and Degradation Analysis of Large SOFC Stacks by Impedance Spectroscopy

    DEFF Research Database (Denmark)

    Mosbæk, Rasmus Rode; Hjelm, Johan; Barfod, R.

    2013-01-01

    As solid oxide fuel cell (SOFC) technology is moving closer to a commercial break through, lifetime limiting factors, and methods to measure the “state-of-health” of operating cells and stacks are becoming of increasing interest. This requires application of advanced methods for detailed...... electrochemical characterization during operation. An experimental stack with low ohmic resistance from Topsoe Fuel Cell A/S was characterized in detail using electrochemical impedance spectroscopy (EIS). An investigation of the optimal geometrical placement of the current feeds and voltage probes was carried out...... with hydrogen as fuel with 52% fuel utilization and constant current load (0.2 A cm–2) at 750 °C. Stack interconnects were coated with six different coatings to prevent chromium poisoning on the cathode side. Four repeating units (RUs) with different coatings were selected for detailed impedance analysis. EIS...

  5. A Scalable Approach for Hardware Semiformal Verification

    OpenAIRE

    Grimm, Tomas; Lettnin, Djones; Hübner, Michael

    2018-01-01

    The current verification flow of complex systems uses different engines synergistically: virtual prototyping, formal verification, simulation, emulation and FPGA prototyping. However, none is able to verify a complete architecture. Furthermore, hybrid approaches aiming at complete verification use techniques that lower the overall complexity by increasing the abstraction level. This work focuses on the verification of complex systems at the RT level to handle the hardware peculiarities. Our r...

  6. Hardware Design of a Smart Meter

    OpenAIRE

    Ganiyu A. Ajenikoko; Anthony A. Olaomi

    2014-01-01

    Smart meters are electronic measurement devices used by utilities to communicate information for billing customers and operating their electric systems. This paper presents the hardware design of a smart meter. Sensing and circuit protection circuits are included in the design of the smart meter in which resistors are naturally a fundamental part of the electronic design. Smart meters provides a route for energy savings, real-time pricing, automated data collection and elimina...

  7. Optimization Strategies for Hardware-Based Cofactorization

    Science.gov (United States)

    Loebenberger, Daniel; Putzka, Jens

    We use the specific structure of the inputs to the cofactorization step in the general number field sieve (GNFS) in order to optimize the runtime for the cofactorization step on a hardware cluster. An optimal distribution of bitlength-specific ECM modules is proposed and compared to existing ones. With our optimizations we obtain a speedup between 17% and 33% of the cofactorization step of the GNFS when compared to the runtime of an unoptimized cluster.

  8. Particle Transport Simulation on Heterogeneous Hardware

    CERN Multimedia

    CERN. Geneva

    2014-01-01

    CPUs and GPGPUs. About the speaker Vladimir Koylazov is CTO and founder of Chaos Software and one of the original developers of the V-Ray raytracing software. Passionate about 3D graphics and programming, Vlado is the driving force behind Chaos Group's software solutions. He participated in the implementation of algorithms for accurate light simulations and support for different hardware platforms, including CPU and GPGPU, as well as distributed calculat...

  9. High exposure rate hardware ALARA plan

    International Nuclear Information System (INIS)

    Nellesen, A.L.

    1996-10-01

    This as low as reasonably achievable review provides a description of the engineering and administrative controls used to manage personnel exposure and to control contamination levels and airborne radioactivity concentrations. HERH waste is hardware found in the N-Fuel Storage Basin, which has a contact dose rate greater than 1 R/hr and used filters. This waste will be collected in the fuel baskets at various locations in the basins

  10. Trends in computer hardware and software.

    Science.gov (United States)

    Frankenfeld, F M

    1993-04-01

    Previously identified and current trends in the development of computer systems and in the use of computers for health care applications are reviewed. Trends identified in a 1982 article were increasing miniaturization and archival ability, increasing software costs, increasing software independence, user empowerment through new software technologies, shorter computer-system life cycles, and more rapid development and support of pharmaceutical services. Most of these trends continue today. Current trends in hardware and software include the increasing use of reduced instruction-set computing, migration to the UNIX operating system, the development of large software libraries, microprocessor-based smart terminals that allow remote validation of data, speech synthesis and recognition, application generators, fourth-generation languages, computer-aided software engineering, object-oriented technologies, and artificial intelligence. Current trends specific to pharmacy and hospitals are the withdrawal of vendors of hospital information systems from the pharmacy market, improved linkage of information systems within hospitals, and increased regulation by government. The computer industry and its products continue to undergo dynamic change. Software development continues to lag behind hardware, and its high cost is offsetting the savings provided by hardware.

  11. Software error masking effect on hardware faults

    International Nuclear Information System (INIS)

    Choi, Jong Gyun; Seong, Poong Hyun

    1999-01-01

    Based on the Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL), in this work, a simulation model for fault injection is developed to estimate the dependability of the digital system in operational phase. We investigated the software masking effect on hardware faults through the single bit-flip and stuck-at-x fault injection into the internal registers of the processor and memory cells. The fault location reaches all registers and memory cells. Fault distribution over locations is randomly chosen based on a uniform probability distribution. Using this model, we have predicted the reliability and masking effect of an application software in a digital system-Interposing Logic System (ILS) in a nuclear power plant. We have considered four the software operational profiles. From the results it was found that the software masking effect on hardware faults should be properly considered for predicting the system dependability accurately in operation phase. It is because the masking effect was formed to have different values according to the operational profile

  12. A Hardware Lab Anywhere At Any Time

    Directory of Open Access Journals (Sweden)

    Tobias Schubert

    2004-12-01

    Full Text Available Scientific technical courses are an important component in any student's education. These courses are usually characterised by the fact that the students execute experiments in special laboratories. This leads to extremely high costs and a reduction in the maximum number of possible participants. From this traditional point of view, it doesn't seem possible to realise the concepts of a Virtual University in the context of sophisticated technical courses since the students must be "on the spot". In this paper we introduce the so-called Mobile Hardware Lab which makes student participation possible at any time and from any place. This lab nevertheless transfers a feeling of being present in a laboratory. This is accomplished with a special Learning Management System in combination with hardware components which correspond to a fully equipped laboratory workstation that are lent out to the students for the duration of the lab. The experiments are performed and solved at home, then handed in electronically. Judging and marking are also both performed electronically. Since 2003 the Mobile Hardware Lab is now offered in a completely web based form.

  13. Instrument hardware and software upgrades at IPNS

    International Nuclear Information System (INIS)

    Worlton, Thomas; Hammonds, John; Mikkelson, D.; Mikkelson, Ruth; Porter, Rodney; Tao, Julian; Chatterjee, Alok

    2006-01-01

    IPNS is in the process of upgrading their time-of-flight neutron scattering instruments with improved hardware and software. The hardware upgrades include replacing old VAX Qbus and Multibus-based data acquisition systems with new systems based on VXI and VME. Hardware upgrades also include expanded detector banks and new detector electronics. Old VAX Fortran-based data acquisition and analysis software is being replaced with new software as part of the ISAW project. ISAW is written in Java for ease of development and portability, and is now used routinely for data visualization, reduction, and analysis on all upgraded instruments. ISAW provides the ability to process and visualize the data from thousands of detector pixels, each having thousands of time channels. These operations can be done interactively through a familiar graphical user interface or automatically through simple scripts. Scripts and operators provided by end users are automatically included in the ISAW menu structure, along with those distributed with ISAW, when the application is started

  14. Industrial hardware and software verification with ACL2.

    Science.gov (United States)

    Hunt, Warren A; Kaufmann, Matt; Moore, J Strother; Slobodova, Anna

    2017-10-13

    The ACL2 theorem prover has seen sustained industrial use since the mid-1990s. Companies that have used ACL2 regularly include AMD, Centaur Technology, IBM, Intel, Kestrel Institute, Motorola/Freescale, Oracle and Rockwell Collins. This paper introduces ACL2 and focuses on how and why ACL2 is used in industry. ACL2 is well-suited to its industrial application to numerous software and hardware systems, because it is an integrated programming/proof environment supporting a subset of the ANSI standard Common Lisp programming language. As a programming language ACL2 permits the coding of efficient and robust programs; as a prover ACL2 can be fully automatic but provides many features permitting domain-specific human-supplied guidance at various levels of abstraction. ACL2 specifications and models often serve as efficient execution engines for the modelled artefacts while permitting formal analysis and proof of properties. Crucially, ACL2 also provides support for the development and verification of other formal analysis tools. However, ACL2 did not find its way into industrial use merely because of its technical features. The core ACL2 user/development community has a shared vision of making mechanized verification routine when appropriate and has been committed to this vision for the quarter century since the Computational Logic, Inc., Verified Stack. The community has focused on demonstrating the viability of the tool by taking on industrial projects (often at the expense of not being able to publish much).This article is part of the themed issue 'Verified trustworthy software systems'. © 2017 The Author(s).

  15. CT and MRI techniques for imaging around orthopedic hardware

    Energy Technology Data Exchange (ETDEWEB)

    Do, Thuy Duong; Skornitzke, Stephan; Weber, Marc-Andre [Heidelberg Univ. (Germany). Dept. of Clinical Radiology; Sutter, Reto [Uniklinik Balgrist, Zurich (Switzerland). Radiology

    2018-01-15

    Orthopedic hardware impairs image quality in cross-sectional imaging. With an increasing number of orthopedic implants in an aging population, the need to mitigate metal artifacts in computed tomography and magnetic resonance imaging is becoming increasingly relevant. This review provides an overview of the major artifacts in CT and MRI and state-of-the-art solutions to improve image quality. All steps of image acquisition from device selection, scan preparations and parameters to image post-processing influence the magnitude of metal artifacts. Technological advances like dual-energy CT with the possibility of virtual monochromatic imaging (VMI) and new materials offer opportunities to further reduce artifacts in CT and MRI. Dedicated metal artifact reduction sequences contain algorithms to reduce artifacts and improve imaging of surrounding tissue and are essential tools in orthopedic imaging to detect postoperative complications in early stages.

  16. Programming languages and compiler design for realistic quantum hardware

    Science.gov (United States)

    Chong, Frederic T.; Franklin, Diana; Martonosi, Margaret

    2017-09-01

    Quantum computing sits at an important inflection point. For years, high-level algorithms for quantum computers have shown considerable promise, and recent advances in quantum device fabrication offer hope of utility. A gap still exists, however, between the hardware size and reliability requirements of quantum computing algorithms and the physical machines foreseen within the next ten years. To bridge this gap, quantum computers require appropriate software to translate and optimize applications (toolflows) and abstraction layers. Given the stringent resource constraints in quantum computing, information passed between layers of software and implementations will differ markedly from in classical computing. Quantum toolflows must expose more physical details between layers, so the challenge is to find abstractions that expose key details while hiding enough complexity.

  17. Programming languages and compiler design for realistic quantum hardware.

    Science.gov (United States)

    Chong, Frederic T; Franklin, Diana; Martonosi, Margaret

    2017-09-13

    Quantum computing sits at an important inflection point. For years, high-level algorithms for quantum computers have shown considerable promise, and recent advances in quantum device fabrication offer hope of utility. A gap still exists, however, between the hardware size and reliability requirements of quantum computing algorithms and the physical machines foreseen within the next ten years. To bridge this gap, quantum computers require appropriate software to translate and optimize applications (toolflows) and abstraction layers. Given the stringent resource constraints in quantum computing, information passed between layers of software and implementations will differ markedly from in classical computing. Quantum toolflows must expose more physical details between layers, so the challenge is to find abstractions that expose key details while hiding enough complexity.

  18. The Application of Hardware in the Loop Testing for Distributed Engine Control

    Science.gov (United States)

    Thomas, George L.; Culley, Dennis E.; Brand, Alex

    2016-01-01

    The essence of a distributed control system is the modular partitioning of control function across a hardware implementation. This type of control architecture requires embedding electronics in a multitude of control element nodes for the execution of those functions, and their integration as a unified system. As the field of distributed aeropropulsion control moves toward reality, questions about building and validating these systems remain. This paper focuses on the development of hardware-in-the-loop (HIL) test techniques for distributed aero engine control, and the application of HIL testing as it pertains to potential advanced engine control applications that may now be possible due to the intelligent capability embedded in the nodes.

  19. How open hardware drives digital fabrication tools such as the 3D printer

    Directory of Open Access Journals (Sweden)

    Johan Söderberg

    2013-06-01

    Full Text Available A case study of hobbyists developing a desktop 3D printer, indicative of a broader movement around open hardware development, is used to advance a theoretical apparatus drawing on social movement research. This is proposed as an alternative to how innovation by users is typically studied in innovation studies literature, namely, as discrete, isolated cases. Open hardware development projects make up a larger ecology, held together by common ideas, a shared communication infrastructure, conferences and licenses, among other things, and it therefore makes sense to look at them as part of a single movement.

  20. A Cost-Effective Approach to Hardware-in-the-Loop Simulation

    DEFF Research Database (Denmark)

    Pedersen, Mikkel Melters; Hansen, M. R.; Ballebye, M.

    2012-01-01

    This paper presents an approach for developing cost effective hardware-in-the- loop (HIL) simulation platforms for the use in controller software test and development. The approach is aimed at the many smaller manufacturers of e.g. mobile hydraulic machinery, which often do not have very advanced...... testing facilities at their disposal. A case study is presented where a HIL simulation platform is developed for the controller of a truck mounted loader crane. The total expenses in hardware and software is less than 10.000$....

  1. Autonomous distributed self-organizing and self-healing hardware architecture - The eDNA concept

    DEFF Research Database (Denmark)

    Boesen, Michael Reibel; Madsen, Jan; Keymeulen, Didier

    2011-01-01

    This paper presents the current state of the autonomous distributed self-organizing and self-healing electronic DNA (eDNA) hardware architecture (patent pending). In its current prototype state, the eDNA architecture is capable of responding to multiple injected faults by autonomously reconfiguring...... itself to accommodate the fault and keep the application running. This paper will also disclose advanced features currently available in the simulation model only. These features are future work and will soon be implemented in hardware. Finally we will describe step-by-step how an application...

  2. High Performance Motion-Planner Architecture for Hardware-In-the-Loop System Based on Position-Based-Admittance-Control

    OpenAIRE

    Francesco La Mura; Giovanni Todeschini; Hermes Giberti

    2018-01-01

    This article focuses on a Hardware-In-the-Loop application developed from the advanced energy field project LIFES50+. The aim is to replicate, inside a wind gallery test facility, the combined effect of aerodynamic and hydrodynamic loads on a floating wind turbine model for offshore energy production, using a force controlled robotic device, emulating floating substructure’s behaviour. In addition to well known real-time Hardware-In-the-Loop (HIL) issues, the particular application presented ...

  3. Energy Efficient Clustering Based Network Protocol Stack for 3D Airborne Monitoring System

    Directory of Open Access Journals (Sweden)

    Abhishek Joshi

    2017-01-01

    Full Text Available Wireless Sensor Network consists of large number of nodes densely deployed in ad hoc manner. Usually, most of the application areas of WSNs require two-dimensional (2D topology. Various emerging application areas such as airborne networks and underwater wireless sensor networks are usually deployed using three-dimensional (3D network topology. In this paper, a static 3D cluster-based network topology has been proposed for airborne networks. A network protocol stack consisting of various protocols such as TDMA MAC and dynamic routing along with services such as time synchronization, Cluster Head rotation, and power level management has been proposed for this airborne network. The proposed protocol stack has been implemented on the hardware platform consisting of number of TelosB nodes. This 3D airborne network architecture can be used to measure Air Quality Index (AQI in an area. Various parameters of network such as energy consumption, Cluster Head rotation, time synchronization, and Packet Delivery Ratio (PDR have been analyzed. Detailed description of the implementation of the protocol stack along with results of implementation has been provided in this paper.

  4. Optimized electrode configuration for current-in-plane characterization of magnetic tunnel junction stacks

    International Nuclear Information System (INIS)

    Cagliani, A; Kjær, D; Østerberg, F W; Hansen, O; Petersen, D H; Nielsen, P F

    2017-01-01

    The current-in-plane tunneling technique (CIPT) has been a crucial tool in the development of magnetic tunnel junction stacks suitable for magnetic random access memories (MRAM) for more than a decade. The MRAM development has now reached the maturity to make the transition from the R and D phase to the pilot production phase. This will require an improvement in the repeatability of the CIPT metrology technique. Here, we present an analytical model that can be used to simulate numerically the repeatability of a CIPT measurement for an arbitrary MTJ stack prior to any CIPT measurement. The model describes mathematically the main sources of error arising when a micro multi-electrode probe is used to perform a CIPT measurement. The numerically simulated repeatability values obtained on four different MTJ stacks are verified by experimental data and the model is used to optimize the choice of electrodes on a multi-electrode probe to reach up to 36% improvement on the repeatability for the resistance area product and the tunneling magnetoresistance measurement, without any hardware modification. (paper)

  5. Project W-420 Stack Monitoring system upgrades conceptual design report

    International Nuclear Information System (INIS)

    TUCK, J.A.

    1998-01-01

    This document describes the scope, justification, conceptual design, and performance of Project W-420 stack monitoring system upgrades on six NESHAP-designated, Hanford Tank Farms ventilation exhaust stacks

  6. Project W-420 Stack Monitoring system upgrades conceptual design report

    Energy Technology Data Exchange (ETDEWEB)

    TUCK, J.A.

    1998-11-06

    This document describes the scope, justification, conceptual design, and performance of Project W-420 stack monitoring system upgrades on six NESHAP-designated, Hanford Tank Farms ventilation exhaust stacks.

  7. Hardware implementation of a GFSR pseudo-random number generator

    Science.gov (United States)

    Aiello, G. R.; Budinich, M.; Milotti, E.

    1989-12-01

    We describe the hardware implementation of a pseudo-random number generator of the "Generalized Feedback Shift Register" (GFSR) type. After brief theoretical considerations we describe two versions of the hardware, the tests done and the performances achieved.

  8. Application of advanced electronics to a future spacecraft computer design

    Science.gov (United States)

    Carney, P. C.

    1980-01-01

    Advancements in hardware and software technology are summarized with specific emphasis on spacecraft computer capabilities. Available state of the art technology is reviewed and candidate architectures are defined.

  9. Computer hardware for radiologists: Part 2

    Directory of Open Access Journals (Sweden)

    Indrajit I

    2010-01-01

    Full Text Available Computers are an integral part of modern radiology equipment. In the first half of this two-part article, we dwelt upon some fundamental concepts regarding computer hardware, covering components like motherboard, central processing unit (CPU, chipset, random access memory (RAM, and memory modules. In this article, we describe the remaining computer hardware components that are of relevance to radiology. "Storage drive" is a term describing a "memory" hardware used to store data for later retrieval. Commonly used storage drives are hard drives, floppy drives, optical drives, flash drives, and network drives. The capacity of a hard drive is dependent on many factors, including the number of disk sides, number of tracks per side, number of sectors on each track, and the amount of data that can be stored in each sector. "Drive interfaces" connect hard drives and optical drives to a computer. The connections of such drives require both a power cable and a data cable. The four most popular "input/output devices" used commonly with computers are the printer, monitor, mouse, and keyboard. The "bus" is a built-in electronic signal pathway in the motherboard to permit efficient and uninterrupted data transfer. A motherboard can have several buses, including the system bus, the PCI express bus, the PCI bus, the AGP bus, and the (outdated ISA bus. "Ports" are the location at which external devices are connected to a computer motherboard. All commonly used peripheral devices, such as printers, scanners, and portable drives, need ports. A working knowledge of computers is necessary for the radiologist if the workflow is to realize its full potential and, besides, this knowledge will prepare the radiologist for the coming innovations in the ′ever increasing′ digital future.

  10. Computer hardware for radiologists: Part 2

    International Nuclear Information System (INIS)

    Indrajit, IK; Alam, A

    2010-01-01

    Computers are an integral part of modern radiology equipment. In the first half of this two-part article, we dwelt upon some fundamental concepts regarding computer hardware, covering components like motherboard, central processing unit (CPU), chipset, random access memory (RAM), and memory modules. In this article, we describe the remaining computer hardware components that are of relevance to radiology. “Storage drive” is a term describing a “memory” hardware used to store data for later retrieval. Commonly used storage drives are hard drives, floppy drives, optical drives, flash drives, and network drives. The capacity of a hard drive is dependent on many factors, including the number of disk sides, number of tracks per side, number of sectors on each track, and the amount of data that can be stored in each sector. “Drive interfaces” connect hard drives and optical drives to a computer. The connections of such drives require both a power cable and a data cable. The four most popular “input/output devices” used commonly with computers are the printer, monitor, mouse, and keyboard. The “bus” is a built-in electronic signal pathway in the motherboard to permit efficient and uninterrupted data transfer. A motherboard can have several buses, including the system bus, the PCI express bus, the PCI bus, the AGP bus, and the (outdated) ISA bus. “Ports” are the location at which external devices are connected to a computer motherboard. All commonly used peripheral devices, such as printers, scanners, and portable drives, need ports. A working knowledge of computers is necessary for the radiologist if the workflow is to realize its full potential and, besides, this knowledge will prepare the radiologist for the coming innovations in the ‘ever increasing’ digital future

  11. The Impact of Flight Hardware Scavenging on Space Logistics

    Science.gov (United States)

    Oeftering, Richard C.

    2011-01-01

    For a given fixed launch vehicle capacity the logistics payload delivered to the moon may be only roughly 20 percent of the payload delivered to the International Space Station (ISS). This is compounded by the much lower flight frequency to the moon and thus low availability of spares for maintenance. This implies that lunar hardware is much more scarce and more costly per kilogram than ISS and thus there is much more incentive to preserve hardware. The Constellation Lunar Surface System (LSS) program is considering ways of utilizing hardware scavenged from vehicles including the Altair lunar lander. In general, the hardware will have only had a matter of hours of operation yet there may be years of operational life remaining. By scavenging this hardware the program, in effect, is treating vehicle hardware as part of the payload. Flight hardware may provide logistics spares for system maintenance and reduce the overall logistics footprint. This hardware has a wide array of potential applications including expanding the power infrastructure, and exploiting in-situ resources. Scavenging can also be seen as a way of recovering the value of, literally, billions of dollars worth of hardware that would normally be discarded. Scavenging flight hardware adds operational complexity and steps must be taken to augment the crew s capability with robotics, capabilities embedded in flight hardware itself, and external processes. New embedded technologies are needed to make hardware more serviceable and scavengable. Process technologies are needed to extract hardware, evaluate hardware, reconfigure or repair hardware, and reintegrate it into new applications. This paper also illustrates how scavenging can be used to drive down the cost of the overall program by exploiting the intrinsic value of otherwise discarded flight hardware.

  12. Multistage Force Amplification of Piezoelectric Stacks

    Science.gov (United States)

    Xu, Tian-Bing (Inventor); Siochi, Emilie J. (Inventor); Zuo, Lei (Inventor); Jiang, Xiaoning (Inventor); Kang, Jin Ho (Inventor)

    2015-01-01

    Embodiments of the disclosure include an apparatus and methods for using a piezoelectric device, that includes an outer flextensional casing, a first cell and a last cell serially coupled to each other and coupled to the outer flextensional casing such that each cell having a flextensional cell structure and each cell receives an input force and provides an output force that is amplified based on the input force. The apparatus further includes a piezoelectric stack coupled to each cell such that the piezoelectric stack of each cell provides piezoelectric energy based on the output force for each cell. Further, the last cell receives an input force that is the output force from the first cell and the last cell provides an output apparatus force In addition, the piezoelectric energy harvested is based on the output apparatus force. Moreover, the apparatus provides displacement based on the output apparatus force.

  13. Development of on-site PAFC stacks

    Energy Technology Data Exchange (ETDEWEB)

    Hotta, K.; Matsumoto, Y. [Kansai Electric Power Co., Amagasaki (Japan); Horiuchi, H.; Ohtani, T. [Mitsubishi Electric Corp., Kobe (Japan)

    1996-12-31

    PAFC (Phosphoric Acid Fuel Cell) has been researched for commercial use and demonstration plants have been installed in various sites. However, PAFC don`t have a enough stability yet, so more research and development must be required in the future. Especially, cell stack needs a proper state of three phases (liquid, gas and solid) interface. It is very difficult technology to keep this condition for a long time. In the small size cell with the electrode area of 100 cm{sup 2}, gas flow and temperature distributions show uniformity. But in the large size cell with the electrode area of 4000 cm{sup 2}, the temperature distributions show non-uniformity. These distributions would cause to be shorten the cell life. Because these distributions make hot-spot and gas poverty in limited parts. So we inserted thermocouples in short-stack for measuring three-dimensional temperature distributions and observed effects of current density and gas utilization on temperature.

  14. System for inspection of stacked cargo containers

    Science.gov (United States)

    Derenzo, Stephen [Pinole, CA

    2011-08-16

    The present invention relates to a system for inspection of stacked cargo containers. One embodiment of the invention generally comprises a plurality of stacked cargo containers arranged in rows or tiers, each container having a top, a bottom a first side, a second side, a front end, and a back end; a plurality of spacers arranged in rows or tiers; one or more mobile inspection devices for inspecting the cargo containers, wherein the one or more inspection devices are removeably disposed within the spacers, the inspection means configured to move through the spacers to detect radiation within the containers. The invented system can also be configured to inspect the cargo containers for a variety of other potentially hazardous materials including but not limited to explosive and chemical threats.

  15. Industrial stacks design; Diseno de chimeneas industriales

    Energy Technology Data Exchange (ETDEWEB)

    Cacheux, Luis [Instituto de Investigaciones Electricas, Cuernavaca (Mexico)

    1987-12-31

    The Instituto de Investigaciones Electricas (IIE) though its Civil Works Department, develops, under contract with CFE`s Gerencia de Proyectos Termoelectricos (Management of Fossil Power Plant Projects), a series of methods for the design of stacks, which pretends to solve the a present day problem: the stack design of the fossil power plants that will go into operation during the next coming years in the country. [Espanol] El Instituto de Investigaciones Electricas (IIE), a traves del Departamento de Ingenieria Civil, desarrolla, bajo contrato con la Gerencia de Proyectos Termoelectricos, de la Comision Federal de Electricidad (CFE), un conjunto de metodos para el diseno de chimeneas, con el que se pretende resolver un problema inmediato: el diseno de las chimeneas de las centrales termoelectricas que entraran en operacion durante los proximos anos, en el pais.

  16. Absorption spectra of AA-stacked graphite

    International Nuclear Information System (INIS)

    Chiu, C W; Lee, S H; Chen, S C; Lin, M F; Shyu, F L

    2010-01-01

    AA-stacked graphite shows strong anisotropy in geometric structures and velocity matrix elements. However, the absorption spectra are isotropic for the polarization vector on the graphene plane. The spectra exhibit one prominent plateau at middle energy and one shoulder structure at lower energy. These structures directly reflect the unique geometric and band structures and provide sufficient information for experimental fitting of the intralayer and interlayer atomic interactions. On the other hand, monolayer graphene shows a sharp absorption peak but no shoulder structure; AA-stacked bilayer graphene has two absorption peaks at middle energy and abruptly vanishes at lower energy. Furthermore, the isotropic features are expected to exist in other graphene-related systems. The calculated results and the predicted atomic interactions could be verified by optical measurements.

  17. Industrial stacks design; Diseno de chimeneas industriales

    Energy Technology Data Exchange (ETDEWEB)

    Cacheux, Luis [Instituto de Investigaciones Electricas, Cuernavaca (Mexico)

    1986-12-31

    The Instituto de Investigaciones Electricas (IIE) though its Civil Works Department, develops, under contract with CFE`s Gerencia de Proyectos Termoelectricos (Management of Fossil Power Plant Projects), a series of methods for the design of stacks, which pretends to solve the a present day problem: the stack design of the fossil power plants that will go into operation during the next coming years in the country. [Espanol] El Instituto de Investigaciones Electricas (IIE), a traves del Departamento de Ingenieria Civil, desarrolla, bajo contrato con la Gerencia de Proyectos Termoelectricos, de la Comision Federal de Electricidad (CFE), un conjunto de metodos para el diseno de chimeneas, con el que se pretende resolver un problema inmediato: el diseno de las chimeneas de las centrales termoelectricas que entraran en operacion durante los proximos anos, en el pais.

  18. Management of cladding hulls and fuel hardware

    International Nuclear Information System (INIS)

    1985-01-01

    The reprocessing of spent fuel from power reactors based on chop-leach technology produces a solid waste product of cladding hulls and other metallic residues. This report describes the current situation in the management of fuel cladding hulls and hardware. Information is presented on the material composition of such waste together with the heating effects due to neutron-induced activation products and fuel contamination. As no country has established a final disposal route and the corresponding repository, this report also discusses possible disposal routes and various disposal options under consideration at present

  19. Open Hardware for CERN's accelerator control systems

    International Nuclear Information System (INIS)

    Bij, E van der; Serrano, J; Wlostowski, T; Cattin, M; Gousiou, E; Sanchez, P Alvarez; Boccardi, A; Voumard, N; Penacoba, G

    2012-01-01

    The accelerator control systems at CERN will be upgraded and many electronics modules such as analog and digital I/O, level converters and repeaters, serial links and timing modules are being redesigned. The new developments are based on the FPGA Mezzanine Card, PCI Express and VME64x standards while the Wishbone specification is used as a system on a chip bus. To attract partners, the projects are developed in an 'Open' fashion. Within this Open Hardware project new ways of working with industry are being evaluated and it has been proven that industry can be involved at all stages, from design to production and support.

  20. Hardware for computing the integral image

    OpenAIRE

    Fernández-Berni, J.; Rodríguez-Vázquez, Ángel; Río, Rocío del; Carmona-Galán, R.

    2015-01-01

    La presente invención, según se expresa en el enunciado de esta memoria descriptiva, consiste en hardware de señal mixta para cómputo de la imagen integral en el plano focal mediante una agrupación de celdas básicas de sensado-procesamiento cuya interconexión puede ser reconfigurada mediante circuitería periférica que hace posible una implementación muy eficiente de una tarea de procesamiento muy útil en visión artificial como es el cálculo de la imagen integral en escenarios tales como monit...

  1. Development of Hardware Dual Modality Tomography System

    Directory of Open Access Journals (Sweden)

    R. M. Zain

    2009-06-01

    Full Text Available The paper describes the hardware development and performance of the Dual Modality Tomography (DMT system. DMT consists of optical and capacitance sensors. The optical sensors consist of 16 LEDs and 16 photodiodes. The Electrical Capacitance Tomography (ECT electrode design use eight electrode plates as the detecting sensor. The digital timing and the control unit have been developing in order to control the light projection of optical emitters, switching the capacitance electrodes and to synchronize the operation of data acquisition. As a result, the developed system is able to provide a maximum 529 set data per second received from the signal conditioning circuit to the computer.

  2. Fast Gridding on Commodity Graphics Hardware

    DEFF Research Database (Denmark)

    Sørensen, Thomas Sangild; Schaeffter, Tobias; Noe, Karsten Østergaard

    2007-01-01

    is the far most time consuming of the three steps (Table 1). Modern graphics cards (GPUs) can be utilised as a fast parallel processor provided that algorithms are reformulated in a parallel solution. The purpose of this work is to test the hypothesis, that a non-cartesian reconstruction can be efficiently...... implemented on graphics hardware giving a significant speedup compared to CPU based alternatives. We present a novel GPU implementation of the convolution step that overcomes the problems of memory bandwidth that has limited the speed of previous GPU gridding algorithms [2]....

  3. Reconfigurable Hardware for Compressing Hyperspectral Image Data

    Science.gov (United States)

    Aranki, Nazeeh; Namkung, Jeffrey; Villapando, Carlos; Kiely, Aaron; Klimesh, Matthew; Xie, Hua

    2010-01-01

    High-speed, low-power, reconfigurable electronic hardware has been developed to implement ICER-3D, an algorithm for compressing hyperspectral-image data. The algorithm and parts thereof have been the topics of several NASA Tech Briefs articles, including Context Modeler for Wavelet Compression of Hyperspectral Images (NPO-43239) and ICER-3D Hyperspectral Image Compression Software (NPO-43238), which appear elsewhere in this issue of NASA Tech Briefs. As described in more detail in those articles, the algorithm includes three main subalgorithms: one for computing wavelet transforms, one for context modeling, and one for entropy encoding. For the purpose of designing the hardware, these subalgorithms are treated as modules to be implemented efficiently in field-programmable gate arrays (FPGAs). The design takes advantage of industry- standard, commercially available FPGAs. The implementation targets the Xilinx Virtex II pro architecture, which has embedded PowerPC processor cores with flexible on-chip bus architecture. It incorporates an efficient parallel and pipelined architecture to compress the three-dimensional image data. The design provides for internal buffering to minimize intensive input/output operations while making efficient use of offchip memory. The design is scalable in that the subalgorithms are implemented as independent hardware modules that can be combined in parallel to increase throughput. The on-chip processor manages the overall operation of the compression system, including execution of the top-level control functions as well as scheduling, initiating, and monitoring processes. The design prototype has been demonstrated to be capable of compressing hyperspectral data at a rate of 4.5 megasamples per second at a conservative clock frequency of 50 MHz, with a potential for substantially greater throughput at a higher clock frequency. The power consumption of the prototype is less than 6.5 W. The reconfigurability (by means of reprogramming) of

  4. List search hardware for interpretive software

    CERN Document Server

    Altaber, Jacques; Mears, B; Rausch, R

    1979-01-01

    Interpreted languages, e.g. BASIC, are simple to learn, easy to use, quick to modify and in general 'user-friendly'. However, a critically time consuming process during interpretation is that of list searching. A special microprogrammed device for fast list searching has therefore been developed at the SPS Division of CERN. It uses bit- sliced hardware. Fast algorithms perform search, insert and delete of a six-character name and its value in a list of up to 1000 pairs. The prototype shows retrieval times of the order of 10-30 microseconds. (11 refs).

  5. Hardware trigger processor for the MDT system

    CERN Document Server

    AUTHOR|(SzGeCERN)757787; The ATLAS collaboration; Hazen, Eric; Butler, John; Black, Kevin; Gastler, Daniel Edward; Ntekas, Konstantinos; Taffard, Anyes; Martinez Outschoorn, Verena; Ishino, Masaya; Okumura, Yasuyuki

    2017-01-01

    We are developing a low-latency hardware trigger processor for the Monitored Drift Tube system in the Muon spectrometer. The processor will fit candidate Muon tracks in the drift tubes in real time, improving significantly the momentum resolution provided by the dedicated trigger chambers. We present a novel pure-FPGA implementation of a Legendre transform segment finder, an associative-memory alternative implementation, an ARM (Zynq) processor-based track fitter, and compact ATCA carrier board architecture. The ATCA architecture is designed to allow a modular, staged approach to deployment of the system and exploration of alternative technologies.

  6. 400 W High Temperature PEM Fuel Cell Stack Test

    DEFF Research Database (Denmark)

    Andreasen, Søren Juhl; Kær, Søren Knudsen

    2006-01-01

    This work demonstrates the operation of a 30 cell high temperature PEM (HTPEM) fuel cell stack. This prototype stack has been developed at the Institute of Energy Technology, Aalborg University, as a proof-of-concept for a low pressure cathode air cooled HTPEM stack. The membranes used are Celtec...

  7. Static Scheduling of Periodic Hardware Tasks with Precedence and Deadline Constraints on Reconfigurable Hardware Devices

    Directory of Open Access Journals (Sweden)

    Ikbel Belaid

    2011-01-01

    Full Text Available Task graph scheduling for reconfigurable hardware devices can be defined as finding a schedule for a set of periodic tasks with precedence, dependence, and deadline constraints as well as their optimal allocations on the available heterogeneous hardware resources. This paper proposes a new methodology comprising three main stages. Using these three main stages, dynamic partial reconfiguration and mixed integer programming, pipelined scheduling and efficient placement are achieved and enable parallel computing of the task graph on the reconfigurable devices by optimizing placement/scheduling quality. Experiments on an application of heterogeneous hardware tasks demonstrate an improvement of resource utilization of 12.45% of the available reconfigurable resources corresponding to a resource gain of 17.3% compared to a static design. The configuration overhead is reduced to 2% of the total running time. Due to pipelined scheduling, the task graph spanning is minimized by 4% compared to sequential execution of the graph.

  8. Role of stacking disorder in ice nucleation.

    Science.gov (United States)

    Lupi, Laura; Hudait, Arpa; Peters, Baron; Grünwald, Michael; Gotchy Mullen, Ryan; Nguyen, Andrew H; Molinero, Valeria

    2017-11-08

    The freezing of water affects the processes that determine Earth's climate. Therefore, accurate weather and climate forecasts hinge on good predictions of ice nucleation rates. Such rate predictions are based on extrapolations using classical nucleation theory, which assumes that the structure of nanometre-sized ice crystallites corresponds to that of hexagonal ice, the thermodynamically stable form of bulk ice. However, simulations with various water models find that ice nucleated and grown under atmospheric temperatures is at all sizes stacking-disordered, consisting of random sequences of cubic and hexagonal ice layers. This implies that stacking-disordered ice crystallites either are more stable than hexagonal ice crystallites or form because of non-equilibrium dynamical effects. Both scenarios challenge central tenets of classical nucleation theory. Here we use rare-event sampling and free energy calculations with the mW water model to show that the entropy of mixing cubic and hexagonal layers makes stacking-disordered ice the stable phase for crystallites up to a size of at least 100,000 molecules. We find that stacking-disordered critical crystallites at 230 kelvin are about 14 kilojoules per mole of crystallite more stable than hexagonal crystallites, making their ice nucleation rates more than three orders of magnitude higher than predicted by classical nucleation theory. This effect on nucleation rates is temperature dependent, being the most pronounced at the warmest conditions, and should affect the modelling of cloud formation and ice particle numbers, which are very sensitive to the temperature dependence of ice nucleation rates. We conclude that classical nucleation theory needs to be corrected to include the dependence of the crystallization driving force on the size of the ice crystallite when interpreting and extrapolating ice nucleation rates from experimental laboratory conditions to the temperatures that occur in clouds.

  9. A Late Pleistocene sea level stack

    OpenAIRE

    Spratt Rachel M; Lisiecki Lorraine E

    2016-01-01

    Late Pleistocene sea level has been reconstructed from ocean sediment core data using a wide variety of proxies and models. However, the accuracy of individual reconstructions is limited by measurement error, local variations in salinity and temperature, and assumptions particular to each technique. Here we present a sea level stack (average) which increases the signal-to-noise ratio of individual reconstructions. Specifically, we perform principal componen...

  10. CAM and stack air sampler design guide

    International Nuclear Information System (INIS)

    Phillips, T.D.

    1994-01-01

    About 128 air samplers and CAMs presently in service to detect and document potential radioactive release from 'H' and 'F' area tank farm ventilation stacks are scheduled for replacement and/or upgrade by Projects S-5764, S-2081, S-3603, and S-4516. The seven CAMs scheduled to be upgraded by Project S-4516 during 1995 are expected to provide valuable experience for the three remaining projects. The attached document provides design guidance for the standardized High Level Waste air sampling system

  11. Is Hardware Removal Recommended after Ankle Fracture Repair?

    Directory of Open Access Journals (Sweden)

    Hong-Geun Jung

    2016-01-01

    Full Text Available The indications and clinical necessity for routine hardware removal after treating ankle or distal tibia fracture with open reduction and internal fixation are disputed even when hardware-related pain is insignificant. Thus, we determined the clinical effects of routine hardware removal irrespective of the degree of hardware-related pain, especially in the perspective of patients’ daily activities. This study was conducted on 80 consecutive cases (78 patients treated by surgery and hardware removal after bony union. There were 56 ankle and 24 distal tibia fractures. The hardware-related pain, ankle joint stiffness, discomfort on ambulation, and patient satisfaction were evaluated before and at least 6 months after hardware removal. Pain score before hardware removal was 3.4 (range 0 to 6 and decreased to 1.3 (range 0 to 6 after removal. 58 (72.5% patients experienced improved ankle stiffness and 65 (81.3% less discomfort while walking on uneven ground and 63 (80.8% patients were satisfied with hardware removal. These results suggest that routine hardware removal after ankle or distal tibia fracture could ameliorate hardware-related pain and improves daily activities and patient satisfaction even when the hardware-related pain is minimal.

  12. Extended Life PZT Stack Test Fixture

    Science.gov (United States)

    Badescu, Mircea; Sherrit, S.; Bao, X.; Aldrich, J.; Bar-Cohen, Y.; Jones, C.

    2009-01-01

    Piezoelectric stacks are being sought to be used as actuators for precision positioning and deployment of mechanisms in future planetary missions. Beside the requirement for very high operation reliability, these actuators are required for operation at space environments that are considered harsh compared to normal terrestrial conditions.These environmental conditions include low and high temperatures and vacuum or high pressure. Additionally, the stacks are subjected to high stress and in some applications need to operate with a very long lifetime durability.Many of these requirements are beyond the current industry design margins for nominal terrestrial applications. In order to investigate some of the properties that will indicate the durability of such actuators and their limitations we have developed a new type of test fixture that can be easily integrated in various test chambers for simulating environmental conditions, can provide access for multiple measurements while being exposed to adjustable stress levels. We designed and built two test fixtures and these fixtures were made to be adjustable for testing stacks with different dimensions and can be easily used in small or large numbers. The properties that were measured using these fixtures include impedance, capacitance, dielectric loss factor, leakage current, displacement, breakdown voltage, and lifetime performance. The fixtures characteristics and the test capabilities are presented in this paper.

  13. Electrochemical Detection in Stacked Paper Networks.

    Science.gov (United States)

    Liu, Xiyuan; Lillehoj, Peter B

    2015-08-01

    Paper-based electrochemical biosensors are a promising technology that enables rapid, quantitative measurements on an inexpensive platform. However, the control of liquids in paper networks is generally limited to a single sample delivery step. Here, we propose a simple method to automate the loading and delivery of liquid samples to sensing electrodes on paper networks by stacking multiple layers of paper. Using these stacked paper devices (SPDs), we demonstrate a unique strategy to fully immerse planar electrodes by aqueous liquids via capillary flow. Amperometric measurements of xanthine oxidase revealed that electrochemical sensors on four-layer SPDs generated detection signals up to 75% higher compared with those on single-layer paper devices. Furthermore, measurements could be performed with minimal user involvement and completed within 30 min. Due to its simplicity, enhanced automation, and capability for quantitative measurements, stacked paper electrochemical biosensors can be useful tools for point-of-care testing in resource-limited settings. © 2015 Society for Laboratory Automation and Screening.

  14. Multi-loop PWR modeling and hardware-in-the-loop testing using ACSL

    International Nuclear Information System (INIS)

    Thomas, V.M.; Heibel, M.D.; Catullo, W.J.

    1989-01-01

    Westinghouse has developed an Advanced Digital Feedwater Control System (ADFCS) which is aimed at reducing feedwater related reactor trips through improved control performance for pressurized water reactor (PWR) power plants. To support control system setpoint studies and functional design efforts for the ADFCS, an ACSL based model of the nuclear steam supply system (NSSS) of a Westinghouse (PWR) was generated. Use of this plant model has been extended from system design to system testing through integration of the model into a Hardware-in-Loop test environment for the ADFCS. This integration includes appropriate interfacing between a Gould SEL 32/87 computer, upon which the plant model executes in real time, and the Westinghouse Distributed Processing family (WDPF) test hardware. A development program has been undertaken to expand the existing ACSL model to include capability to explicitly model multiple plant loops, steam generators, and corresponding feedwater systems. Furthermore, the program expands the ADFCS Hardware-in-Loop testing to include the multi-loop plant model. This paper provides an overview of the testing approach utilized for the ADFCS with focus on the role of Hardware-in-Loop testing. Background on the plant model, methodology and test environment is also provided. Finally, an overview is presented of the program to expand the model and associated Hardware-in-Loop test environment to handle multiple loops

  15. Internet-based hardware/software co-design framework for embedded 3D graphics applications

    Directory of Open Access Journals (Sweden)

    Wong Weng-Fai

    2011-01-01

    Full Text Available Abstract Advances in technology are making it possible to run three-dimensional (3D graphics applications on embedded and handheld devices. In this article, we propose a hardware/software co-design environment for 3D graphics application development that includes the 3D graphics software, OpenGL ES application programming interface (API, device driver, and 3D graphics hardware simulators. We developed a 3D graphics system-on-a-chip (SoC accelerator using transaction-level modeling (TLM. This gives software designers early access to the hardware even before it is ready. On the other hand, hardware designers also stand to gain from the more complex test benches made available in the software for verification. A unique aspect of our framework is that it allows hardware and software designers from geographically dispersed areas to cooperate and work on the same framework. Designs can be entered and executed from anywhere in the world without full access to the entire framework, which may include proprietary components. This results in controlled and secure transparency and reproducibility, granting leveled access to users of various roles.

  16. Guanine base stacking in G-quadruplex nucleic acids

    Science.gov (United States)

    Lech, Christopher Jacques; Heddi, Brahim; Phan, Anh Tuân

    2013-01-01

    G-quadruplexes constitute a class of nucleic acid structures defined by stacked guanine tetrads (or G-tetrads) with guanine bases from neighboring tetrads stacking with one another within the G-tetrad core. Individual G-quadruplexes can also stack with one another at their G-tetrad interface leading to higher-order structures as observed in telomeric repeat-containing DNA and RNA. In this study, we investigate how guanine base stacking influences the stability of G-quadruplexes and their stacked higher-order structures. A structural survey of the Protein Data Bank is conducted to characterize experimentally observed guanine base stacking geometries within the core of G-quadruplexes and at the interface between stacked G-quadruplex structures. We couple this survey with a systematic computational examination of stacked G-tetrad energy landscapes using quantum mechanical computations. Energy calculations of stacked G-tetrads reveal large energy differences of up to 12 kcal/mol between experimentally observed geometries at the interface of stacked G-quadruplexes. Energy landscapes are also computed using an AMBER molecular mechanics description of stacking energy and are shown to agree quite well with quantum mechanical calculated landscapes. Molecular dynamics simulations provide a structural explanation for the experimentally observed preference of parallel G-quadruplexes to stack in a 5′–5′ manner based on different accessible tetrad stacking modes at the stacking interfaces of 5′–5′ and 3′–3′ stacked G-quadruplexes. PMID:23268444

  17. ISS Logistics Hardware Disposition and Metrics Validation

    Science.gov (United States)

    Rogers, Toneka R.

    2010-01-01

    I was assigned to the Logistics Division of the International Space Station (ISS)/Spacecraft Processing Directorate. The Division consists of eight NASA engineers and specialists that oversee the logistics portion of the Checkout, Assembly, and Payload Processing Services (CAPPS) contract. Boeing, their sub-contractors and the Boeing Prime contract out of Johnson Space Center, provide the Integrated Logistics Support for the ISS activities at Kennedy Space Center. Essentially they ensure that spares are available to support flight hardware processing and the associated ground support equipment (GSE). Boeing maintains a Depot for electrical, mechanical and structural modifications and/or repair capability as required. My assigned task was to learn project management techniques utilized by NASA and its' contractors to provide an efficient and effective logistics support infrastructure to the ISS program. Within the Space Station Processing Facility (SSPF) I was exposed to Logistics support components, such as, the NASA Spacecraft Services Depot (NSSD) capabilities, Mission Processing tools, techniques and Warehouse support issues, required for integrating Space Station elements at the Kennedy Space Center. I also supported the identification of near-term ISS Hardware and Ground Support Equipment (GSE) candidates for excessing/disposition prior to October 2010; and the validation of several Logistics Metrics used by the contractor to measure logistics support effectiveness.

  18. ARM assembly language with hardware experiments

    CERN Document Server

    Elahi, Ata

    2015-01-01

    This book provides a hands-on approach to learning ARM assembly language with the use of a TI microcontroller. The book starts with an introduction to computer architecture and then discusses number systems and digital logic. The text covers ARM Assembly Language, ARM Cortex Architecture and its components, and Hardware Experiments using TILM3S1968. Written for those interested in learning embedded programming using an ARM Microcontroller. ·         Introduces number systems and signal transmission methods   ·         Reviews logic gates, registers, multiplexers, decoders and memory   ·         Provides an overview and examples of ARM instruction set   ·         Uses using Keil development tools for writing and debugging ARM assembly language Programs   ·         Hardware experiments using a Mbed NXP LPC1768 microcontroller; including General Purpose Input/Output (GPIO) configuration, real time clock configuration, binary input to 7-segment display, creating ...

  19. Introduction to Hardware Security and Trust

    CERN Document Server

    Wang, Cliff

    2012-01-01

    The emergence of a globalized, horizontal semiconductor business model raises a set of concerns involving the security and trust of the information systems on which modern society is increasingly reliant for mission-critical functionality. Hardware-oriented security and trust issues span a broad range including threats related to the malicious insertion of Trojan circuits designed, e.g.,to act as a ‘kill switch’ to disable a chip, to integrated circuit (IC) piracy,and to attacks designed to extract encryption keys and IP from a chip. This book provides the foundations for understanding hardware security and trust, which have become major concerns for national security over the past decade.  Coverage includes security and trust issues in all types of electronic devices and systems such as ASICs, COTS, FPGAs, microprocessors/DSPs, and embedded systems.  This serves as an invaluable reference to the state-of-the-art research that is of critical significance to the security of,and trust in, modern society�...

  20. Fast image processing on parallel hardware

    International Nuclear Information System (INIS)

    Bittner, U.

    1988-01-01

    Current digital imaging modalities in the medical field incorporate parallel hardware which is heavily used in the stage of image formation like the CT/MR image reconstruction or in the DSA real time subtraction. In order to image post-processing as efficient as image acquisition, new software approaches have to be found which take full advantage of the parallel hardware architecture. This paper describes the implementation of two-dimensional median filter which can serve as an example for the development of such an algorithm. The algorithm is analyzed by viewing it as a complete parallel sort of the k pixel values in the chosen window which leads to a generalization to rank order operators and other closely related filters reported in literature. A section about the theoretical base of the algorithm gives hints for how to characterize operations suitable for implementations on pipeline processors and the way to find the appropriate algorithms. Finally some results that computation time and usefulness of medial filtering in radiographic imaging are given

  1. Dynamic fuel cell models and their application in hardware in the loop simulation

    Energy Technology Data Exchange (ETDEWEB)

    Lemes, Zijad; Maencher, H. [MAGNUM Automatisierungstechnik GmbH, Bunsenstr. 22, D-64293 Darmstadt (Germany); Vath, Andreas; Hartkopf, Th. [Technische Universitaet Darmstadt/Institut fuer Elektrische Energiewandlung, Landgraf-Georg-Str. 4, D-64283 Darmstadt (Germany)

    2006-03-21

    Currently, fuel cell technology plays an important role in the development of alternative energy converters for mobile, portable and stationary applications. With the help of physical based models of fuel cell systems and appropriate test benches it is possible to design different applications and investigate their stationary and dynamic behaviour. The polymer electrolyte membrane (PEM) fuel cell system model includes gas humidifier, air and hydrogen supply, current converter and a detailed stack model incorporating the physical characteristics of the different layers. In particular, the use of these models together with hardware in the loop (HIL) capable test stands helps to decrease the costs and accelerate the development of fuel cell systems. The interface program provides fast data exchange between the test bench and the physical model of the fuel cell or any other systems in real time. So the flexibility and efficiency of the test bench increase fundamentally, because it is possible to replace real components with their mathematical models. (author)

  2. Dynamic Model of High Temperature PEM Fuel Cell Stack Temperature

    DEFF Research Database (Denmark)

    Andreasen, Søren Juhl; Kær, Søren Knudsen

    2007-01-01

    cathode air cooled 30 cell HTPEM fuel cell stack developed at the Institute of Energy Technology at Aalborg University. This fuel cell stack uses PEMEAS Celtec P-1000 membranes, runs on pure hydrogen in a dead end anode configuration with a purge valve. The cooling of the stack is managed by running......The present work involves the development of a model for predicting the dynamic temperature of a high temperature PEM (HTPEM) fuel cell stack. The model is developed to test different thermal control strategies before implementing them in the actual system. The test system consists of a prototype...... the stack at a high stoichiometric air flow. This is possible because of the PBI fuel cell membranes used, and the very low pressure drop in the stack. The model consists of a discrete thermal model dividing the stack into three parts: inlet, middle and end and predicting the temperatures in these three...

  3. Accelerating epistasis analysis in human genetics with consumer graphics hardware

    Directory of Open Access Journals (Sweden)

    Cancare Fabio

    2009-07-01

    Full Text Available Abstract Background Human geneticists are now capable of measuring more than one million DNA sequence variations from across the human genome. The new challenge is to develop computationally feasible methods capable of analyzing these data for associations with common human disease, particularly in the context of epistasis. Epistasis describes the situation where multiple genes interact in a complex non-linear manner to determine an individual's disease risk and is thought to be ubiquitous for common diseases. Multifactor Dimensionality Reduction (MDR is an algorithm capable of detecting epistasis. An exhaustive analysis with MDR is often computationally expensive, particularly for high order interactions. This challenge has previously been met with parallel computation and expensive hardware. The option we examine here exploits commodity hardware designed for computer graphics. In modern computers Graphics Processing Units (GPUs have more memory bandwidth and computational capability than Central Processing Units (CPUs and are well suited to this problem. Advances in the video game industry have led to an economy of scale creating a situation where these powerful components are readily available at very low cost. Here we implement and evaluate the performance of the MDR algorithm on GPUs. Of primary interest are the time required for an epistasis analysis and the price to performance ratio of available solutions. Findings We found that using MDR on GPUs consistently increased performance per machine over both a feature rich Java software package and a C++ cluster implementation. The performance of a GPU workstation running a GPU implementation reduces computation time by a factor of 160 compared to an 8-core workstation running the Java implementation on CPUs. This GPU workstation performs similarly to 150 cores running an optimized C++ implementation on a Beowulf cluster. Furthermore this GPU system provides extremely cost effective

  4. Accelerating epistasis analysis in human genetics with consumer graphics hardware.

    Science.gov (United States)

    Sinnott-Armstrong, Nicholas A; Greene, Casey S; Cancare, Fabio; Moore, Jason H

    2009-07-24

    Human geneticists are now capable of measuring more than one million DNA sequence variations from across the human genome. The new challenge is to develop computationally feasible methods capable of analyzing these data for associations with common human disease, particularly in the context of epistasis. Epistasis describes the situation where multiple genes interact in a complex non-linear manner to determine an individual's disease risk and is thought to be ubiquitous for common diseases. Multifactor Dimensionality Reduction (MDR) is an algorithm capable of detecting epistasis. An exhaustive analysis with MDR is often computationally expensive, particularly for high order interactions. This challenge has previously been met with parallel computation and expensive hardware. The option we examine here exploits commodity hardware designed for computer graphics. In modern computers Graphics Processing Units (GPUs) have more memory bandwidth and computational capability than Central Processing Units (CPUs) and are well suited to this problem. Advances in the video game industry have led to an economy of scale creating a situation where these powerful components are readily available at very low cost. Here we implement and evaluate the performance of the MDR algorithm on GPUs. Of primary interest are the time required for an epistasis analysis and the price to performance ratio of available solutions. We found that using MDR on GPUs consistently increased performance per machine over both a feature rich Java software package and a C++ cluster implementation. The performance of a GPU workstation running a GPU implementation reduces computation time by a factor of 160 compared to an 8-core workstation running the Java implementation on CPUs. This GPU workstation performs similarly to 150 cores running an optimized C++ implementation on a Beowulf cluster. Furthermore this GPU system provides extremely cost effective performance while leaving the CPU available for other

  5. TechTuning: Stress Management For 3D Through-Silicon-Via Stacking Technologies

    Science.gov (United States)

    Radojcic, Riko; Nowak, Matt; Nakamoto, Mark

    2011-09-01

    The concerns with managing mechanical stress distributions and the consequent effects on device performance and material integrity, for advanced TSV based technologies 3D are outlined. A model and simulation based Design For Manufacturability (DFM) type of a flow for managing the mechanical stresses throughout Si die, stack and package design is proposed. The key attributes of the models and simulators required to fuel the proposed flow are summarized. Finally, some of the essential infrastructure and the Supply Chain support items are described.

  6. Handbook of hardware/software codesign

    CERN Document Server

    Teich, Jürgen

    2017-01-01

    This handbook presents fundamental knowledge on the hardware/software (HW/SW) codesign methodology. Contributing expert authors look at key techniques in the design flow as well as selected codesign tools and design environments, building on basic knowledge to consider the latest techniques. The book enables readers to gain real benefits from the HW/SW codesign methodology through explanations and case studies which demonstrate its usefulness. Readers are invited to follow the progress of design techniques through this work, which assists readers in following current research directions and learning about state-of-the-art techniques. Students and researchers will appreciate the wide spectrum of subjects that belong to the design methodology from this handbook. .

  7. Battery Management System Hardware Concepts: An Overview

    Directory of Open Access Journals (Sweden)

    Markus Lelie

    2018-03-01

    Full Text Available This paper focuses on the hardware aspects of battery management systems (BMS for electric vehicle and stationary applications. The purpose is giving an overview on existing concepts in state-of-the-art systems and enabling the reader to estimate what has to be considered when designing a BMS for a given application. After a short analysis of general requirements, several possible topologies for battery packs and their consequences for the BMS’ complexity are examined. Four battery packs that were taken from commercially available electric vehicles are shown as examples. Later, implementation aspects regarding measurement of needed physical variables (voltage, current, temperature, etc. are discussed, as well as balancing issues and strategies. Finally, safety considerations and reliability aspects are investigated.

  8. EPICS: Allen-Bradley hardware reference manual

    International Nuclear Information System (INIS)

    Nawrocki, G.

    1993-01-01

    This manual covers the following hardware: Allen-Bradley 6008 -- SV VMEbus I/O scanner; Allen-Bradley universal I/O chassis 1771-A1B, -A2B, -A3B, and -A4B; Allen-Bradley power supply module 1771-P4S; Allen-Bradley 1771-ASB remote I/O adapter module; Allen-Bradley 1771-IFE analog input module; Allen-Bradley 1771-OFE analog output module; Allen-Bradley 1771-IG(D) TTL input module; Allen-Bradley 1771-OG(d) TTL output; Allen-Bradley 1771-IQ DC selectable input module; Allen-Bradley 1771-OW contact output module; Allen-Bradley 1771-IBD DC (10--30V) input module; Allen-Bradley 1771-OBD DC (10--60V) output module; Allen-Bradley 1771-IXE thermocouple/millivolt input module; and the Allen-Bradley 2705 RediPANEL push button module

  9. Locating hardware faults in a parallel computer

    Science.gov (United States)

    Archer, Charles J.; Megerian, Mark G.; Ratterman, Joseph D.; Smith, Brian E.

    2010-04-13

    Locating hardware faults in a parallel computer, including defining within a tree network of the parallel computer two or more sets of non-overlapping test levels of compute nodes of the network that together include all the data communications links of the network, each non-overlapping test level comprising two or more adjacent tiers of the tree; defining test cells within each non-overlapping test level, each test cell comprising a subtree of the tree including a subtree root compute node and all descendant compute nodes of the subtree root compute node within a non-overlapping test level; performing, separately on each set of non-overlapping test levels, an uplink test on all test cells in a set of non-overlapping test levels; and performing, separately from the uplink tests and separately on each set of non-overlapping test levels, a downlink test on all test cells in a set of non-overlapping test levels.

  10. Theorem Proving in Intel Hardware Design

    Science.gov (United States)

    O'Leary, John

    2009-01-01

    For the past decade, a framework combining model checking (symbolic trajectory evaluation) and higher-order logic theorem proving has been in production use at Intel. Our tools and methodology have been used to formally verify execution cluster functionality (including floating-point operations) for a number of Intel products, including the Pentium(Registered TradeMark)4 and Core(TradeMark)i7 processors. Hardware verification in 2009 is much more challenging than it was in 1999 - today s CPU chip designs contain many processor cores and significant firmware content. This talk will attempt to distill the lessons learned over the past ten years, discuss how they apply to today s problems, outline some future directions.

  11. Hardware implementation of stochastic spiking neural networks.

    Science.gov (United States)

    Rosselló, Josep L; Canals, Vincent; Morro, Antoni; Oliver, Antoni

    2012-08-01

    Spiking Neural Networks, the last generation of Artificial Neural Networks, are characterized by its bio-inspired nature and by a higher computational capacity with respect to other neural models. In real biological neurons, stochastic processes represent an important mechanism of neural behavior and are responsible of its special arithmetic capabilities. In this work we present a simple hardware implementation of spiking neurons that considers this probabilistic nature. The advantage of the proposed implementation is that it is fully digital and therefore can be massively implemented in Field Programmable Gate Arrays. The high computational capabilities of the proposed model are demonstrated by the study of both feed-forward and recurrent networks that are able to implement high-speed signal filtering and to solve complex systems of linear equations.

  12. Communication Estimation for Hardware/Software Codesign

    DEFF Research Database (Denmark)

    Knudsen, Peter Voigt; Madsen, Jan

    1998-01-01

    This paper presents a general high level estimation model of communication throughput for the implementation of a given communication protocol. The model, which is part of a larger model that includes component price, software driver object code size and hardware driver area, is intended...... to be general enough to be able to capture the characteristics of a wide range of communication protocols and yet to be sufficiently detailed as to allow the designer or design tool to efficiently explore tradeoffs between throughput, bus widths, burst/non-burst transfers and data packing strategies. Thus...... it provides a basis for decision making with respect to communication protocols/components and communication driver design in the initial design space exploration phase of a co-synthesis process where a large number of possibilities must be examined and where fast estimators are therefore necessary. The fill...

  13. The double Chooz hardware trigger system

    Energy Technology Data Exchange (ETDEWEB)

    Cucoanes, Andi; Beissel, Franz; Reinhold, Bernd; Roth, Stefan; Stahl, Achim; Wiebusch, Christopher [RWTH Aachen (Germany)

    2008-07-01

    The double Chooz neutrino experiment aims to improve the present knowledge on {theta}{sub 13} mixing angle using two similar detectors placed at {proportional_to}280 m and respectively 1 km from the Chooz power plant reactor cores. The detectors measure the disappearance of reactor antineutrinos. The hardware trigger has to be very efficient for antineutrinos as well as for various types of background events. The triggering condition is based on discriminated PMT sum signals and the multiplicity of groups of PMTs. The talk gives an outlook to the double Chooz experiment and explains the requirements of the trigger system. The resulting concept and its performance is shown as well as first results from a prototype system.

  14. NSF tandem stack support structure deflection characteristics

    International Nuclear Information System (INIS)

    Cook, J.

    1979-12-01

    Results are reported of load tests carried out on the glass legs of the insulating stack of the 30 MV tandem Van de Graaff accelerator now under construction at Daresbury Laboratory. The tests to investigate the vulnerability of the legs when subjected to tensile stresses were designed to; establish the angle of rotation of the pads from which the stresses in the glass legs may be calculated, proof-test the structure and at the same time reveal any asymmetry in pad rotations or deflections, and to confirm the validity of the computer design analysis. (UK)

  15. Compliant Glass Seals for SOFC Stacks

    Energy Technology Data Exchange (ETDEWEB)

    Chou, Yeong -Shyung [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Choi, Jung-Pyung [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Xu, Wei [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Stephens, Elizabeth V. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Koeppel, Brian J. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Stevenson, Jeffry W. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Lara-Curzio, Edgar [Oak Ridge National Lab. (ORNL), Oak Ridge, TN (United States)

    2014-04-30

    This report summarizes results from experimental and modeling studies performed by participants in the Solid-State Energy Conversion Alliance (SECA) Core Technology Program, which indicate that compliant glass-based seals offer a number of potential advantages over conventional seals based on de-vitrifying glasses, including reduced stresses during stack operation and thermal cycling, and the ability to heal micro-damage induced during thermal cycling. The properties and composition of glasses developed and/or investigated in these studies are reported, along with results from long-term (up to 5,800h) evaluations of seals based on a compliant glass containing ceramic particles or ceramic fibers.

  16. Improved Direct Methanol Fuel Cell Stack

    Science.gov (United States)

    Wilson, Mahlon S.; Ramsey, John C.

    2005-03-08

    A stack of direct methanol fuel cells exhibiting a circular footprint. A cathode and anode manifold, tie-bolt penetrations and tie-bolts are located within the circular footprint. Each fuel cell uses two graphite-based plates. One plate includes a cathode active area that is defined by serpentine channels connecting the inlet and outlet cathode manifold. The other plate includes an anode active area defined by serpentine channels connecting the inlet and outlet of the anode manifold, where the serpentine channels of the anode are orthogonal to the serpentine channels of the cathode. Located between the two plates is the fuel cell active region.

  17. Displacive phase transformations and generalized stacking faults

    Czech Academy of Sciences Publication Activity Database

    Paidar, Václav; Ostapovets, Andriy; Duparc, O. H.; Khalfallah, O.

    2012-01-01

    Roč. 122, č. 3 (2012), s. 490-492 ISSN 0587-4246. [International Symposium on Physics of Materials, ISPMA /12./. Praha, 04.09.2011-08.09.2011] R&D Projects: GA AV ČR IAA100100920 Institutional research plan: CEZ:AV0Z10100520 Keywords : ab-initio calculations * close-packed structures * generalized stacking faults * homogeneous deformation * lattice deformation * many-body potentials Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 0.531, year: 2012

  18. LONG-TERM PERFORMANCE OF SOLID OXIDE STACKS WITH ELECTRODE-SUPPORTED CELLS OPERATING IN THE STEAM ELECTROLYSIS MODE

    Energy Technology Data Exchange (ETDEWEB)

    J. E. O' Brien; R. C. O' Brien; X. Zhang; G. Tao; B. J. Butler

    2011-11-01

    Performance characterization and durability testing have been completed on two five-cell high-temperature electrolysis stacks constructed with advanced cell and stack technologies. The solid oxide cells incorporate a negative-electrode-supported multi-layer design with nickel-zirconia cermet negative electrodes, thin-film yttria-stabilized zirconia electrolytes, and multi-layer lanthanum ferrite-based positive electrodes. The per-cell active area is 100 cm2. The stack is internally manifolded with compliant mica-glass seals. Treated metallic interconnects with integral flow channels separate the cells. Stack compression is accomplished by means of a custom spring-loaded test fixture. Initial stack performance characterization was determined through a series of DC potential sweeps in both fuel cell and electrolysis modes of operation. Results of these sweeps indicated very good initial performance, with area-specific resistance values less than 0.5 ?.cm2. Long-term durability testing was performed with A test duration of 1000 hours. Overall performance degradation was less than 10% over the 1000-hour period. Final stack performance characterization was again determined by a series of DC potential sweeps at the same flow conditions as the initial sweeps in both electrolysis and fuel cell modes of operation. A final sweep in the fuel cell mode indicated a power density of 0.356 W/cm2, with average per-cell voltage of 0.71 V at a current of 50 A.

  19. Dynamic model of a micro-tubular solid oxide fuel cell stack including an integrated cooling system

    Science.gov (United States)

    Hering, Martin; Brouwer, Jacob; Winkler, Wolfgang

    2017-02-01

    A novel dynamic micro-tubular solid oxide fuel cell (MT-SOFC) and stack model including an integrated cooling system is developed using a quasi three-dimensional, spatially resolved, transient thermodynamic, physical and electrochemical model that accounts for the complex geometrical relations between the cells and cooling-tubes. The modeling approach includes a simplified tubular geometry and stack design including an integrated cooling structure, detailed pressure drop and gas property calculations, the electrical and physical constraints of the stack design that determine the current, as well as control strategies for the temperature. Moreover, an advanced heat transfer balance with detailed radiative heat transfer between the cells and the integrated cooling-tubes, convective heat transfer between the gas flows and the surrounding structures and conductive heat transfer between the solid structures inside of the stack, is included. The detailed model can be used as a design basis for the novel MT-SOFC stack assembly including an integrated cooling system, as well as for the development of a dynamic system control strategy. The evaluated best-case design achieves very high electrical efficiency between around 75 and 55% in the entire power density range between 50 and 550 mW /cm2 due to the novel stack design comprising an integrated cooling structure.

  20. Hardware/Software Data Acquisition System for Real Time Cell Temperature Monitoring in Air-Cooled Polymer Electrolyte Fuel Cells.

    Science.gov (United States)

    Segura, Francisca; Bartolucci, Veronica; Andújar, José Manuel

    2017-07-09

    This work presents a hardware/software data acquisition system developed for monitoring the temperature in real time of the cells in Air-Cooled Polymer Electrolyte Fuel Cells (AC-PEFC). These fuel cells are of great interest because they can carry out, in a single operation, the processes of oxidation and refrigeration. This allows reduction of weight, volume, cost and complexity of the control system in the AC-PEFC. In this type of PEFC (and in general in any PEFC), the reliable monitoring of temperature along the entire surface of the stack is fundamental, since a suitable temperature and a regular distribution thereof, are key for a better performance of the stack and a longer lifetime under the best operating conditions. The developed data acquisition (DAQ) system can perform non-intrusive temperature measurements of each individual cell of an AC-PEFC stack of any power (from watts to kilowatts). The stack power is related to the temperature gradient; i.e., a higher power corresponds to a higher stack surface, and consequently higher temperature difference between the coldest and the hottest point. The developed DAQ system has been implemented with the low-cost open-source platform Arduino, and it is completed with a modular virtual instrument that has been developed using NI LabVIEW. Temperature vs time evolution of all the cells of an AC-PEFC both together and individually can be registered and supervised. The paper explains comprehensively the developed DAQ system together with experimental results that demonstrate the suitability of the system.

  1. Hardware/Software Data Acquisition System for Real Time Cell Temperature Monitoring in Air-Cooled Polymer Electrolyte Fuel Cells

    Directory of Open Access Journals (Sweden)

    Francisca Segura

    2017-07-01

    Full Text Available This work presents a hardware/software data acquisition system developed for monitoring the temperature in real time of the cells in Air-Cooled Polymer Electrolyte Fuel Cells (AC-PEFC. These fuel cells are of great interest because they can carry out, in a single operation, the processes of oxidation and refrigeration. This allows reduction of weight, volume, cost and complexity of the control system in the AC-PEFC. In this type of PEFC (and in general in any PEFC, the reliable monitoring of temperature along the entire surface of the stack is fundamental, since a suitable temperature and a regular distribution thereof, are key for a better performance of the stack and a longer lifetime under the best operating conditions. The developed data acquisition (DAQ system can perform non-intrusive temperature measurements of each individual cell of an AC-PEFC stack of any power (from watts to kilowatts. The stack power is related to the temperature gradient; i.e., a higher power corresponds to a higher stack surface, and consequently higher temperature difference between the coldest and the hottest point. The developed DAQ system has been implemented with the low-cost open-source platform Arduino, and it is completed with a modular virtual instrument that has been developed using NI LabVIEW. Temperature vs time evolution of all the cells of an AC-PEFC both together and individually can be registered and supervised. The paper explains comprehensively the developed DAQ system together with experimental results that demonstrate the suitability of the system.

  2. The use of low cost compact cameras with focus stacking functionality in entomological digitization projects

    Directory of Open Access Journals (Sweden)

    Jan Mertens

    2017-10-01

    Full Text Available Digitization of specimen collections has become a key priority of many natural history museums. The camera systems built for this purpose are expensive, providing a barrier in institutes with limited funding, and therefore hampering progress. An assessment is made on whether a low cost compact camera with image stacking functionality can help expedite the digitization process in large museums or provide smaller institutes and amateur entomologists with the means to digitize their collections. Images of a professional setup were compared with the Olympus Stylus TG-4 Tough, a low-cost compact camera with internal focus stacking functions. Parameters considered include image quality, digitization speed, price, and ease-of-use. The compact camera’s image quality, although inferior to the professional setup, is exceptional considering its fourfold lower price point. Producing the image slices in the compact camera is a matter of seconds and when optimal image quality is less of a priority, the internal stacking function omits the need for dedicated stacking software altogether, further decreasing the cost and speeding up the process. In general, it is found that, aware of its limitations, this compact camera is capable of digitizing entomological collections with sufficient quality. As technology advances, more institutes and amateur entomologists will be able to easily and affordably catalogue their specimens.

  3. FocusStack and StimServer: a new open source MATLAB toolchain for visual stimulation and analysis of two-photon calcium neuronal imaging data.

    Science.gov (United States)

    Muir, Dylan R; Kampa, Björn M

    2014-01-01

    Two-photon calcium imaging of neuronal responses is an increasingly accessible technology for probing population responses in cortex at single cell resolution, and with reasonable and improving temporal resolution. However, analysis of two-photon data is usually performed using ad-hoc solutions. To date, no publicly available software exists for straightforward analysis of stimulus-triggered two-photon imaging experiments. In addition, the increasing data rates of two-photon acquisition systems imply increasing cost of computing hardware required for in-memory analysis. Here we present a Matlab toolbox, FocusStack, for simple and efficient analysis of two-photon calcium imaging stacks on consumer-level hardware, with minimal memory footprint. We also present a Matlab toolbox, StimServer, for generation and sequencing of visual stimuli, designed to be triggered over a network link from a two-photon acquisition system. FocusStack is compatible out of the box with several existing two-photon acquisition systems, and is simple to adapt to arbitrary binary file formats. Analysis tools such as stack alignment for movement correction, automated cell detection and peri-stimulus time histograms are already provided, and further tools can be easily incorporated. Both packages are available as publicly-accessible source-code repositories.

  4. Computerized plutonium laboratory-stack monitoring system

    International Nuclear Information System (INIS)

    Stafford, R.G.; DeVore, R.K.

    1977-01-01

    The Los Alamos Scientific Laboratory has recently designed and constructed a Plutonium Research and Development Facility to meet design criteria imposed by the United States Energy Research and Development Administration. A primary objective of the design criteria is to assure environmental protection and to reliably monitor plutonium effluent via the ventilation exhaust systems. A state-of-the-art facility exhaust air monitoring system is described which establishes near ideal conditions for evaluating plutonium activity in the stack effluent. Total and static pressure sensing manifolds are incorporated to measure average velocity and integrated total discharge air volume. These data are logged at a computer which receives instrument data through a multiplex scanning system. A multipoint isokinetic sampling assembly with associated instrumentation is described. Continuous air monitors have been designed to sample from the isokinetic sampling assembly and transmit both instantaneous and integrated stack effluent concentration data to the computer and various cathode ray tube displays. The continuous air monitors also serve as room air monitors in the plutonium facility with the primary objective of timely evacuation of personnel if an above tolerance airborne plutonium concentration is detected. Several continuous air monitors are incorporated in the ventilation system to assist in identification of release problem areas

  5. Control of heteroepitaxial stacking by substrate miscut

    International Nuclear Information System (INIS)

    Bonham, S.W.; Flynn, C.P.

    1998-01-01

    We report studies of fcc epitaxial crystals, grown on Nb(110), in which the Nb surface offers a template for selection between the two alternative stackings, ABCA hor-ellipsis and ACBA hor-ellipsis of the fcc close-packed planes. The Nb templates were grown epitaxially about 500 Angstrom thick on sapphire (11 bar 20), and the fcc material studied was Cu 3 Au. From symmetry it is not possible for the perfect bcc (110) surface to cause any such selection, which is here attributed instead to vicinal miscut: the logarithm of the stacking ratio must be even in miscut along [001] and odd in miscut along [1 bar 10]. We find that the measured selectivity is small for miscuts less than about 0.5 degree, but approaches a factor 10 3 for miscuts along [1 bar 10] greater than about 1 degree. A mechanism for the selection process is discussed in terms of fingered mesostructures that grow on Nb(110) in this regime, as observed first by Zhou, Bonham, and Flynn. copyright 1998 The American Physical Society

  6. Generalized stacking fault energies of alloys.

    Science.gov (United States)

    Li, Wei; Lu, Song; Hu, Qing-Miao; Kwon, Se Kyun; Johansson, Börje; Vitos, Levente

    2014-07-02

    The generalized stacking fault energy (γ surface) provides fundamental physics for understanding the plastic deformation mechanisms. Using the ab initio exact muffin-tin orbitals method in combination with the coherent potential approximation, we calculate the γ surface for the disordered Cu-Al, Cu-Zn, Cu-Ga, Cu-Ni, Pd-Ag and Pd-Au alloys. Studying the effect of segregation of the solute to the stacking fault planes shows that only the local chemical composition affects the γ surface. The calculated alloying trends are discussed using the electronic band structure of the base and distorted alloys.Based on our γ surface results, we demonstrate that the previous revealed 'universal scaling law' between the intrinsic energy barriers (IEBs) is well obeyed in random solid solutions. This greatly simplifies the calculations of the twinning measure parameters or the critical twinning stress. Adopting two twinnability measure parameters derived from the IEBs, we find that in binary Cu alloys, Al, Zn and Ga increase the twinnability, while Ni decreases it. Aluminum and gallium yield similar effects on the twinnability.

  7. Compact Modbus TCP/IP protocol for data acquisition systems based on limited hardware resources

    Science.gov (United States)

    Bai, Q.; Jin, B.; Wang, D.; Wang, Y.; Liu, X.

    2018-04-01

    The Modbus TCP/IP has been a standard industry communication protocol and widely utilized for establishing sensor-cloud platforms on the Internet. However, numerous existing data acquisition systems built on traditional single-chip microcontrollers without sufficient resources cannot support it, because the complete Modbus TCP/IP protocol always works dependent on a full operating system which occupies abundant hardware resources. Hence, a compact Modbus TCP/IP protocol is proposed in this work to make it run efficiently and stably even on a resource-limited hardware platform. Firstly, the Modbus TCP/IP protocol stack is analyzed and the refined protocol suite is rebuilt by streamlining the typical TCP/IP suite. Then, specific implementation of every hierarchical layer is respectively presented in detail according to the protocol structure. Besides, the compact protocol is implemented in a traditional microprocessor to validate the feasibility of the scheme. Finally, the performance of the proposed scenario is assessed. The experimental results demonstrate that message packets match the frame format of Modbus TCP/IP protocol and the average bandwidth reaches to 1.15 Mbps. The compact protocol operates stably even based on a traditional microcontroller with only 4-kB RAM and 12-MHz system clock, and no communication congestion or frequent packet loss occurs.

  8. Hardware descriptions of the I and C systems for NPP

    International Nuclear Information System (INIS)

    Lee, Cheol Kwon; Oh, In Suk; Park, Joo Hyun; Kim, Dong Hoon; Han, Jae Bok; Shin, Jae Whal; Kim, Young Bak

    2003-09-01

    The hardware specifications for I and C Systems of SNPP(Standard Nuclear Power Plant) are reviewed in order to acquire the hardware requirement and specification of KNICS (Korea Nuclear Instrumentation and Control System). In the study, we investigated hardware requirements, hardware configuration, hardware specifications, man-machine hardware requirements, interface requirements with the other system, and data communication requirements that are applicable to SNP. We reviewed those things of control systems, protection systems, monitoring systems, information systems, and process instrumentation systems. Through the study, we described the requirements and specifications of digital systems focusing on a microprocessor and a communication interface, and repeated it for analog systems focusing on the manufacturing companies. It is expected that the experience acquired from this research will provide vital input for the development of the KNICS

  9. Expert System analysis of non-fuel assembly hardware and spent fuel disassembly hardware: Its generation and recommended disposal

    International Nuclear Information System (INIS)

    Williamson, D.A.

    1991-01-01

    Almost all of the effort being expended on radioactive waste disposal in the United States is being focused on the disposal of spent Nuclear Fuel, with little consideration for other areas that will have to be disposed of in the same facilities. one area of radioactive waste that has not been addressed adequately because it is considered a secondary part of the waste issue is the disposal of the various Non-Fuel Bearing Components of the reactor core. These hardware components fall somewhat arbitrarily into two categories: Non-Fuel Assembly (NFA) hardware and Spent Fuel Disassembly (SFD) hardware. This work provides a detailed examination of the generation and disposal of NFA hardware and SFD hardware by the nuclear utilities of the United States as it relates to the Civilian Radioactive Waste Management Program. All available sources of data on NFA and SFD hardware are analyzed with particular emphasis given to the Characteristics Data Base developed by Oak Ridge National Laboratory and the characterization work performed by Pacific Northwest Laboratories and Rochester Gas ampersand Electric. An Expert System developed as a portion of this work is used to assist in the prediction of quantities of NFA hardware and SFD hardware that will be generated by the United States' utilities. Finally, the hardware waste management practices of the United Kingdom, France, Germany, Sweden, and Japan are studied for possible application to the disposal of domestic hardware wastes. As a result of this work, a general classification scheme for NFA and SFD hardware was developed. Only NFA and SFD hardware constructed of zircaloy and experiencing a burnup of less than 70,000 MWD/MTIHM and PWR control rods constructed of stainless steel are considered Low-Level Waste. All other hardware is classified as Greater-ThanClass-C waste

  10. Analog Exercise Hardware to Implement a High Intensity Exercise Program During Bed Rest

    Science.gov (United States)

    Loerch, Linda; Newby, Nate; Ploutz-Snyder, Lori

    2012-01-01

    used for leg press and heel raise exercises. Minor modifications were made to the device including adding 200 lbs to the weight stack, raising the frame by 12 inches, making the footplate adjustable, and providing removable handles. Conclusion: A combination of novel and commercial exercise hardware are used to mimic the exercise hardware capabilities aboard the ISS, allowing scientific investigation of new countermeasure protocols in a space flight analog prior to flight validation

  11. Description of gasket failure in a 7 cell PEMFC stack

    Energy Technology Data Exchange (ETDEWEB)

    Husar, Attila; Serra, Maria [Institut de Robotica i Informatica Industrial, Parc Tecnologic de Barcelona, Edifici U, C. Llorens i Artigas, 4-6, 2a Planta, 08028 Barcelona (Spain); Kunusch, Cristian [Laboratorio de Electronica Industrial Control e Instrumentacion, Facultad de Ingenieria, UNLP (Argentina)

    2007-06-10

    This article presents the data and the description of a fuel cell stack that failed due to gasket degradation. The fuel cell under study is a 7 cell stack. The unexpected change in several variables such as temperature, pressure and voltage indicated the possible failure of the stack. The stack was monitored over a 6 h period in which data was collected and consequently analyzed to conclude that the fuel cell stack failed due to a crossover leak on the anode inlet port located on the cathode side gasket of cell 2. This stack failure analysis revealed a series of indicators that could be used by a super visional controller in order to initiate a shutdown procedure. (author)

  12. Simple Stacking Methods for Silicon Micro Fuel Cells

    Directory of Open Access Journals (Sweden)

    Gianmario Scotti

    2014-08-01

    Full Text Available We present two simple methods, with parallel and serial gas flows, for the stacking of microfabricated silicon fuel cells with integrated current collectors, flow fields and gas diffusion layers. The gas diffusion layer is implemented using black silicon. In the two stacking methods proposed in this work, the fluidic apertures and gas flow topology are rotationally symmetric and enable us to stack fuel cells without an increase in the number of electrical or fluidic ports or interconnects. Thanks to this simplicity and the structural compactness of each cell, the obtained stacks are very thin (~1.6 mm for a two-cell stack. We have fabricated two-cell stacks with two different gas flow topologies and obtained an open-circuit voltage (OCV of 1.6 V and a power density of 63 mW·cm−2, proving the viability of the design.

  13. Why Open Source Hardware matters and why you should care

    OpenAIRE

    Gürkaynak, Frank K.

    2017-01-01

    Open source hardware is currently where open source software was about 30 years ago. The idea is well received by enthusiasts, there is interest and the open source hardware has gained visible momentum recently, with several well-known universities including UC Berkeley, Cambridge and ETH Zürich actively working on large projects involving open source hardware, attracting the attention of companies big and small. But it is still not quite there yet. In this talk, based on my experience on the...

  14. Support for NUMA hardware in HelenOS

    OpenAIRE

    Horký, Vojtěch

    2011-01-01

    The goal of this master thesis is to extend HelenOS operating system with the support for ccNUMA hardware. The text of the thesis contains a brief introduction to ccNUMA hardware, an overview of NUMA features and relevant features of HelenOS (memory management, scheduling, etc.). The thesis analyses various design decisions of the implementation of NUMA support -- introducing the hardware topology into the kernel data structures, propagating this information to user space, thread affinity to ...

  15. Reliable software for unreliable hardware a cross layer perspective

    CERN Document Server

    Rehman, Semeen; Henkel, Jörg

    2016-01-01

    This book describes novel software concepts to increase reliability under user-defined constraints. The authors’ approach bridges, for the first time, the reliability gap between hardware and software. Readers will learn how to achieve increased soft error resilience on unreliable hardware, while exploiting the inherent error masking characteristics and error (stemming from soft errors, aging, and process variations) mitigations potential at different software layers. · Provides a comprehensive overview of reliability modeling and optimization techniques at different hardware and software levels; · Describes novel optimization techniques for software cross-layer reliability, targeting unreliable hardware.

  16. Environmental Friendly Coatings and Corrosion Prevention For Flight Hardware Project

    Science.gov (United States)

    Calle, Luz

    2014-01-01

    Identify, test and develop qualification criteria for environmentally friendly corrosion protective coatings and corrosion preventative compounds (CPC's) for flight hardware an ground support equipment.

  17. Development of the electric utility dispersed use PAFC stack

    Energy Technology Data Exchange (ETDEWEB)

    Horiuchi, Hiroshi; Kotani, Ikuo [Mitsubishi Electric Co., Kobe (Japan); Morotomi, Isamu [Kansai Electric Power Co., Hyogo (Japan)] [and others

    1996-12-31

    Kansai Electric Power Co. and Mitsubishi Electric Co. have been developing the electric utility dispersed use PAFC stack operated under the ambient pressure. The new cell design have been developed, so that the large scale cell (1 m{sup 2} size) was adopted for the stack. To confirm the performance and the stability of the 1 m{sup 2} scale cell design, the short stack study had been performed.

  18. Stacked Heterogeneous Neural Networks for Time Series Forecasting

    Directory of Open Access Journals (Sweden)

    Florin Leon

    2010-01-01

    Full Text Available A hybrid model for time series forecasting is proposed. It is a stacked neural network, containing one normal multilayer perceptron with bipolar sigmoid activation functions, and the other with an exponential activation function in the output layer. As shown by the case studies, the proposed stacked hybrid neural model performs well on a variety of benchmark time series. The combination of weights of the two stack components that leads to optimal performance is also studied.

  19. Open Hardware For CERN's Accelerator Control Systems

    CERN Document Server

    van der Bij, E; Ayass, M; Boccardi, A; Cattin, M; Gil Soriano, C; Gousiou, E; Iglesias Gonsálvez, S; Penacoba Fernandez, G; Serrano, J; Voumard, N; Wlostowski, T

    2011-01-01

    The accelerator control systems at CERN will be renovated and many electronics modules will be redesigned as the modules they will replace cannot be bought anymore or use obsolete components. The modules used in the control systems are diverse: analog and digital I/O, level converters and repeaters, serial links and timing modules. Overall around 120 modules are supported that are used in systems such as beam instrumentation, cryogenics and power converters. Only a small percentage of the currently used modules are commercially available, while most of them had been specifically designed at CERN. The new developments are based on VITA and PCI-SIG standards such as FMC (FPGA Mezzanine Card), PCI Express and VME64x using transition modules. As system-on-chip interconnect, the public domain Wishbone specification is used. For the renovation, it is considered imperative to have for each board access to the full hardware design and its firmware so that problems could quickly be resolved by CERN engineers or its ...

  20. Magnetic qubits as hardware for quantum computers

    International Nuclear Information System (INIS)

    Tejada, J.; Chudnovsky, E.; Barco, E. del

    2000-01-01

    We propose two potential realisations for quantum bits based on nanometre scale magnetic particles of large spin S and high anisotropy molecular clusters. In case (1) the bit-value basis states vertical bar-0> and vertical bar-1> are the ground and first excited spin states S z = S and S-1, separated by an energy gap given by the ferromagnetic resonance (FMR) frequency. In case (2), when there is significant tunnelling through the anisotropy barrier, the qubit states correspond to the symmetric, vertical bar-0>, and antisymmetric, vertical bar-1>, combinations of the two-fold degenerate ground state S z = ± S. In each case the temperature of operation must be low compared to the energy gap, Δ, between the states vertical bar-0> and vertical bar-1>. The gap Δ in case (2) can be controlled with an external magnetic field perpendicular to the easy axis of the molecular cluster. The states of different molecular clusters and magnetic particles may be entangled by connecting them by superconducting lines with Josephson switches, leading to the potential for quantum computing hardware. (author)

  1. Magnetic qubits as hardware for quantum computers

    Energy Technology Data Exchange (ETDEWEB)

    Tejada, J.; Chudnovsky, E.; Barco, E. del [and others

    2000-07-01

    We propose two potential realisations for quantum bits based on nanometre scale magnetic particles of large spin S and high anisotropy molecular clusters. In case (1) the bit-value basis states vertical bar-0> and vertical bar-1> are the ground and first excited spin states S{sub z} = S and S-1, separated by an energy gap given by the ferromagnetic resonance (FMR) frequency. In case (2), when there is significant tunnelling through the anisotropy barrier, the qubit states correspond to the symmetric, vertical bar-0>, and antisymmetric, vertical bar-1>, combinations of the two-fold degenerate ground state S{sub z} = {+-} S. In each case the temperature of operation must be low compared to the energy gap, {delta}, between the states vertical bar-0> and vertical bar-1>. The gap {delta} in case (2) can be controlled with an external magnetic field perpendicular to the easy axis of the molecular cluster. The states of different molecular clusters and magnetic particles may be entangled by connecting them by superconducting lines with Josephson switches, leading to the potential for quantum computing hardware. (author)

  2. Hardware upgrade for A2 data acquisition

    Energy Technology Data Exchange (ETDEWEB)

    Ostrick, Michael; Gradl, Wolfgang; Otte, Peter-Bernd; Neiser, Andreas; Steffen, Oliver; Wolfes, Martin; Koerner, Tito [Institut fuer Kernphysik, Mainz (Germany); Collaboration: A2-Collaboration

    2014-07-01

    The A2 Collaboration uses an energy tagged photon beam which is produced via bremsstrahlung off the MAMI electron beam. The detector system consists of Crystal Ball and TAPS and covers almost the whole solid angle. A frozen-spin polarized target allows to perform high precision measurements of polarization observables in meson photo-production. During the last summer, a major upgrade of the data acquisition system was performed, both on the hardware and the software side. The goal of this upgrade was increased reliability of the system and an improvement in the data rate to disk. By doubling the number of readout CPUs and employing special VME crates with a split backplane, the number of bus accesses per readout cycle and crate was cut by a factor of two, giving almost a factor of two gain in the readout rate. In the course of the upgrade, we also switched most of the detector control system to using the distributed control system EPICS. For the upgraded control system, some new tools were developed to make full use of the capabilities of this decentralised slow control and monitoring system. The poster presents some of the major contributions to this project.

  3. Turbostratic stacked CVD graphene for high-performance devices

    Science.gov (United States)

    Uemura, Kohei; Ikuta, Takashi; Maehashi, Kenzo

    2018-03-01

    We have fabricated turbostratic stacked graphene with high-transport properties by the repeated transfer of CVD monolayer graphene. The turbostratic stacked CVD graphene exhibited higher carrier mobility and conductivity than CVD monolayer graphene. The electron mobility for the three-layer turbostratic stacked CVD graphene surpassed 10,000 cm2 V-1 s-1 at room temperature, which is five times greater than that for CVD monolayer graphene. The results indicate that the high performance is derived from maintenance of the linear band dispersion, suppression of the carrier scattering, and parallel conduction. Therefore, turbostratic stacked CVD graphene is a superior material for high-performance devices.

  4. Method for monitoring stack gases for uranium activity

    International Nuclear Information System (INIS)

    Beverly, C.R.; Ernstberger, H.G.

    1988-01-01

    A method for sampling stack gases emanating from the purge cascade of a gaseous diffusion cascade system utilized to enrich uranium for determining the presence and extent of uranium in the stack gases in the form of gaseous uranium hexafluoride, is described comprising the steps of removing a side stream of gases from the stack gases, contacting the side stream of the stack gases with a stream of air sufficiently saturated with moisture for reacting with and converting any gaseous uranium hexafluroide contracted thereby in the side stream of stack gases to particulate uranyl fluoride. Thereafter contacting the side stream of stack gases containing the particulate uranyl fluoride with moving filter means for continuously intercepting and conveying the intercepted particulate uranyl fluoride away from the side stream of stack gases, and continually scanning the moving filter means with radiation monitoring means for sensing the presence and extent of particulate uranyl fluoride on the moving filter means which is indicative of the extent of particulate uranyl fluoride in the side stream of stack gases which in turn is indicative of the presence and extent of uranium hexafluoride in the stack gases

  5. Highly Efficient, Durable Regenerative Solid Oxide Stack, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Precision Combustion, Inc. (PCI) proposes to develop a highly efficient regenerative solid oxide stack design. Novel structural elements allow direct internal...

  6. Conceptual Design Approach to Implementing Hardware-based Security Controls in Data Communication Systems

    Energy Technology Data Exchange (ETDEWEB)

    Ibrahim, Ahmad Salah; Jung, Jaecheon [KEPCO International Nuclear Graduate School, Ulsan (Korea, Republic of)

    2016-10-15

    In the Korean Advanced Power Reactor (APR1400), safety control systems network is electrically isolated and physically separated from non-safety systems data network. Unidirectional gateways, include data diode fiber-optic cabling and computer-based servers, transmit the plant safety critical parameters to the main control room (MCR) for control and monitoring processes. The data transmission is only one-way from safety to non-safety. Reverse communication is blocked so that safety systems network is protected from potential cyberattacks or intrusions from non-safety side. Most of commercials off-the-shelf (COTS) security devices are software-based solutions that require operating systems and processors to perform its functions. Field Programmable Gate Arrays (FPGAs) offer digital hardware solutions to implement security controls such as data packet filtering and deep data packet inspection. This paper presents a conceptual design to implement hardware-based network security controls for maintaining the availability of gateway servers. A conceptual design of hardware-based network security controls was discussed in this paper. The proposed design is aiming at utilizing the hardware-based capabilities of FPGAs together with filtering and DPI functions of COTS software-based firewalls and intrusion detection and prevention systems (IDPS). The proposed design implemented a network security perimeter between the DCN-I zone and gateway servers zone. Security control functions are to protect the gateway servers from potential DoS attacks that could affect the data availability and integrity.

  7. Conceptual Design Approach to Implementing Hardware-based Security Controls in Data Communication Systems

    International Nuclear Information System (INIS)

    Ibrahim, Ahmad Salah; Jung, Jaecheon

    2016-01-01

    In the Korean Advanced Power Reactor (APR1400), safety control systems network is electrically isolated and physically separated from non-safety systems data network. Unidirectional gateways, include data diode fiber-optic cabling and computer-based servers, transmit the plant safety critical parameters to the main control room (MCR) for control and monitoring processes. The data transmission is only one-way from safety to non-safety. Reverse communication is blocked so that safety systems network is protected from potential cyberattacks or intrusions from non-safety side. Most of commercials off-the-shelf (COTS) security devices are software-based solutions that require operating systems and processors to perform its functions. Field Programmable Gate Arrays (FPGAs) offer digital hardware solutions to implement security controls such as data packet filtering and deep data packet inspection. This paper presents a conceptual design to implement hardware-based network security controls for maintaining the availability of gateway servers. A conceptual design of hardware-based network security controls was discussed in this paper. The proposed design is aiming at utilizing the hardware-based capabilities of FPGAs together with filtering and DPI functions of COTS software-based firewalls and intrusion detection and prevention systems (IDPS). The proposed design implemented a network security perimeter between the DCN-I zone and gateway servers zone. Security control functions are to protect the gateway servers from potential DoS attacks that could affect the data availability and integrity

  8. The Hardware Topological Trigger of ATLAS: Commissioning and Operations

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00226165; The ATLAS collaboration

    2018-01-01

    The Level-1 trigger is the first rate-reducing step in the ATLAS trigger system with an output rate of 100 kHz and decision latency smaller than 2.5 μs. It consists of a calorimeter trigger, muon trigger and a central trigger processor. To improve the physics potential reach in ATLAS, during the LHC shutdown after Run 1, the Level-1 trigger system was upgraded at hardware, firmware and software level. In particular, a new electronics sub-system was introduced in the real-time data processing path: the Topological Processor System (L1Topo). It consists of a single AdvancedCTA shelf equipped with two Level-1 topological processor blades. For individual blades, real-time information from calorimeter and muon Level-1 trigger systems, is processed by four individual state-of-the-art FPGAs. It needs to deal with a large input bandwidth of up to 6 Tb/s, optical connectivity and low processing latency on the real-time data path. The L1Topo firmware apply measurements of angles between jets and/or leptons and several...

  9. Astronaut Prepares for Mission With Virtual Reality Hardware

    Science.gov (United States)

    2001-01-01

    Astronaut John M. Grunsfeld, STS-109 payload commander, uses virtual reality hardware at Johnson Space Center to rehearse some of his duties prior to the STS-109 mission. The most familiar form of virtual reality technology is some form of headpiece, which fits over your eyes and displays a three dimensional computerized image of another place. Turn your head left and right, and you see what would be to your sides; turn around, and you see what might be sneaking up on you. An important part of the technology is some type of data glove that you use to propel yourself through the virtual world. This technology allows NASA astronauts to practice International Space Station work missions in advance. Currently, the medical community is using the new technologies in four major ways: To see parts of the body more accurately, for study, to make better diagnosis of disease and to plan surgery in more detail; to obtain a more accurate picture of a procedure during surgery; to perform more types of surgery with the most noninvasive, accurate methods possible; and to model interactions among molecules at a molecular level.

  10. A Fast hardware tracker for the ATLAS Trigger

    CERN Document Server

    Pandini, Carlo Enrico; The ATLAS collaboration

    2015-01-01

    The trigger system at the ATLAS experiment is designed to lower the event rate occurring from the nominal bunch crossing at 40 MHz to about 1 kHz for a designed LHC luminosity of 10$^{34}$ cm$^{-2}$ s$^{-1}$. To achieve high background rejection while maintaining good efficiency for interesting physics signals, sophisticated algorithms are needed which require extensive use of tracking information. The Fast TracKer (FTK) trigger system, part of the ATLAS trigger upgrade program, is a highly parallel hardware device designed to perform track-finding at 100 kHz and based on a mixture of advanced technologies. Modern, powerful Field Programmable Gate Arrays (FPGA) form an important part of the system architecture, and the combinatorial problem of pattern recognition is solved by ~8000 standard-cell ASICs named Associative Memories. The availability of the tracking and subsequent vertex information within a short latency ensures robust selections and allows improved trigger performance for the most difficult sign...

  11. A Fast hardware Tracker for the ATLAS Trigger system

    CERN Document Server

    Pandini, Carlo Enrico; The ATLAS collaboration

    2015-01-01

    The trigger system at the ATLAS experiment is designed to lower the event rate occurring from the nominal bunch crossing at 40 MHz to about 1 kHz for a designed LHC luminosity of 10$^{34}$ cm$^{-2}$ s$^{-1}$. After a very successful data taking run the LHC is expected to run starting in 2015 with much higher instantaneous luminosities and this will increase the load on the High Level Trigger system. More sophisticated algorithms will be needed to achieve higher background rejection while maintaining good efficiency for interesting physics signals, which requires a more extensive use of tracking information. The Fast Tracker (FTK) trigger system, part of the ATLAS trigger upgrade program, is a highly parallel hardware device designed to perform full-scan track-finding at the event rate of 100 kHz. FTK is a dedicated processor based on a mixture of advanced technologies. Modern, powerful, Field Programmable Gate Arrays form an important part of the system architecture, and the combinatorial problem of pattern r...

  12. RF control hardware design for CYCIAE-100 cyclotron

    Energy Technology Data Exchange (ETDEWEB)

    Yin, Zhiguo, E-mail: bitbearAT@hotmail.com; Fu, Xiaoliang; Ji, Bin; Zhao, Zhenlu; Zhang, Tianjue; Li, Pengzhan; Wei, Junyi; Xing, Jiansheng; Wang, Chuan

    2015-11-21

    The Beijing Radioactive Ion-beam Facility project is being constructed by BRIF division of China Institute of Atomic Energy. In this project, a 100 MeV high intensity compact proton cyclotron is built for multiple applications. The first successful beam extraction of CYCIAE-100 cyclotron was done in the middle of 2014. The extracted proton beam energy is 100 MeV and the beam current is more than 20 μA. The RF system of the CYCIAE-100 cyclotron includes two half-wavelength cavities, two 100 kW tetrode amplifiers and power transmission line systems (all above are independent from each other) and two sets of Low Level RF control crates. Each set of LLRF control includes an amplitude control unit, a tuning control unit, a phase control unit, a local Digital Signal Process control unit and an Advanced RISC Machines based EPICS IOC unit. These two identical LLRF control crates share one common reference clock and take advantages of modern digital technologies (e.g. DSP and Direct Digital Synthesizer) to achieve closed loop voltage and phase regulations of the dee-voltage. In the beam commission, the measured dee-voltage stability of RF system is better than 0.1% and phase stability is better than 0.03°. The hardware design of the LLRF system will be reviewed in this paper.

  13. Mechanical Design and Development of TES Bolometer Detector Arrays for the Advanced ACTPol Experiment

    Science.gov (United States)

    Ward, Jonathan T.; Austermann, Jason; Beall, James A.; Choi, Steve K.; Crowley, Kevin T.; Devlin, Mark J.; Duff, Shannon M.; Gallardo, Patricio M.; Henderson, Shawn W.; Ho, Shuay-Pwu Patty; hide

    2016-01-01

    The next generation Advanced ACTPol (AdvACT) experiment is currently underway and will consist of four Transition Edge Sensor (TES) bolometer arrays, with three operating together, totaling 5800 detectors on the sky. Building on experience gained with the ACTPol detector arrays, AdvACT will utilize various new technologies, including 150 mm detector wafers equipped with multichroic pixels, allowing for a more densely packed focal plane. Each set of detectors includes a feedhorn array of stacked silicon wafers which form a spline pro le leading to each pixel. This is then followed by a waveguide interface plate, detector wafer, back short cavity plate, and backshort cap. Each array is housed in a custom designed structure manufactured from high purity copper and then gold plated. In addition to the detector array assembly, the array package also encloses cryogenic readout electronics. We present the full mechanical design of the AdvACT high frequency (HF) detector array package along with a detailed look at the detector array stack assemblies. This experiment will also make use of extensive hardware and software previously developed for ACT, which will be modi ed to incorporate the new AdvACT instruments. Therefore, we discuss the integration of all AdvACT arrays with pre-existing ACTPol infrastructure.

  14. Durable solid oxide electrolysis cells and stacks

    Energy Technology Data Exchange (ETDEWEB)

    Ming Chen

    2010-08-15

    The purpose of this project was to make a substantial contribution to development of a cost competitive electrolysis technology based on solid oxide cells. The strategy was to address what had been identified as the key issues in previous research projects. Accordingly five lines of work were carried out in the here reported project: 1) Cell and stack element testing and post test characterization to identify major degradation mechanisms under electrolysis operation. 2) Development of interconnects and coatings to allow stable electrolysis operation at approx850 deg. C or above. 3) Development of seals with reduced Si emission. 4) Development of durable SOEC cathodes. 5) Modeling. Good progress has been made on several of the planned activities. The outcome and most important achievements of the current project are listed for the five lines of the work. (LN)

  15. ATLAS software stack on ARM64

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00529764; The ATLAS collaboration; Stewart, Graeme; Seuster, Rolf; Quadt, Arnulf

    2017-01-01

    This paper reports on the port of the ATLAS software stack onto new prototype ARM64 servers. This included building the “external” packages that the ATLAS software relies on. Patches were needed to introduce this new architecture into the build as well as patches that correct for platform specific code that caused failures on non-x86 architectures. These patches were applied such that porting to further platforms will need no or only very little adjustments. A few additional modifications were needed to account for the different operating system, Ubuntu instead of Scientific Linux 6 / CentOS7. Selected results from the validation of the physics outputs on these ARM 64-bit servers will be shown. CPU, memory and IO intensive benchmarks using ATLAS specific environment and infrastructure have been performed, with a particular emphasis on the performance vs. energy consumption.

  16. ATLAS software stack on ARM64

    Science.gov (United States)

    Smith, Joshua Wyatt; Stewart, Graeme A.; Seuster, Rolf; Quadt, Arnulf; ATLAS Collaboration

    2017-10-01

    This paper reports on the port of the ATLAS software stack onto new prototype ARM64 servers. This included building the “external” packages that the ATLAS software relies on. Patches were needed to introduce this new architecture into the build as well as patches that correct for platform specific code that caused failures on non-x86 architectures. These patches were applied such that porting to further platforms will need no or only very little adjustments. A few additional modifications were needed to account for the different operating system, Ubuntu instead of Scientific Linux 6 / CentOS7. Selected results from the validation of the physics outputs on these ARM 64-bit servers will be shown. CPU, memory and IO intensive benchmarks using ATLAS specific environment and infrastructure have been performed, with a particular emphasis on the performance vs. energy consumption.

  17. Stacked generalization: an introduction to super learning.

    Science.gov (United States)

    Naimi, Ashley I; Balzer, Laura B

    2018-04-10

    Stacked generalization is an ensemble method that allows researchers to combine several different prediction algorithms into one. Since its introduction in the early 1990s, the method has evolved several times into a host of methods among which is the "Super Learner". Super Learner uses V-fold cross-validation to build the optimal weighted combination of predictions from a library of candidate algorithms. Optimality is defined by a user-specified objective function, such as minimizing mean squared error or maximizing the area under the receiver operating characteristic curve. Although relatively simple in nature, use of Super Learner by epidemiologists has been hampered by limitations in understanding conceptual and technical details. We work step-by-step through two examples to illustrate concepts and address common concerns.

  18. Manifold seal structure for fuel cell stack

    Science.gov (United States)

    Collins, William P.

    1988-01-01

    The seal between the sides of a fuel cell stack and the gas manifolds is improved by adding a mechanical interlock between the adhesive sealing strip and the abutting surface of the manifolds. The adhesive is a material which can flow to some extent when under compression, and the mechanical interlock is formed providing small openings in the portion of the manifold which abuts the adhesive strip. When the manifolds are pressed against the adhesive strips, the latter will flow into and through the manifold openings to form buttons or ribs which mechanically interlock with the manifolds. These buttons or ribs increase the bond between the manifolds and adhesive, which previously relied solely on the adhesive nature of the adhesive.

  19. FPGA BASED HARDWARE KEY FOR TEMPORAL ENCRYPTION

    Directory of Open Access Journals (Sweden)

    B. Lakshmi

    2010-09-01

    Full Text Available In this paper, a novel encryption scheme with time based key technique on an FPGA is presented. Time based key technique ensures right key to be entered at right time and hence, vulnerability of encryption through brute force attack is eliminated. Presently available encryption systems, suffer from Brute force attack and in such a case, the time taken for breaking a code depends on the system used for cryptanalysis. The proposed scheme provides an effective method in which the time is taken as the second dimension of the key so that the same system can defend against brute force attack more vigorously. In the proposed scheme, the key is rotated continuously and four bits are drawn from the key with their concatenated value representing the delay the system has to wait. This forms the time based key concept. Also the key based function selection from a pool of functions enhances the confusion and diffusion to defend against linear and differential attacks while the time factor inclusion makes the brute force attack nearly impossible. In the proposed scheme, the key scheduler is implemented on FPGA that generates the right key at right time intervals which is then connected to a NIOS – II processor (a virtual microcontroller which is brought out from Altera FPGA that communicates with the keys to the personal computer through JTAG (Joint Test Action Group communication and the computer is used to perform encryption (or decryption. In this case the FPGA serves as hardware key (dongle for data encryption (or decryption.

  20. Bayesian Estimation and Inference using Stochastic Hardware

    Directory of Open Access Journals (Sweden)

    Chetan Singh Thakur

    2016-03-01

    Full Text Available In this paper, we present the implementation of two types of Bayesian inference problems to demonstrate the potential of building probabilistic algorithms in hardware using single set of building blocks with the ability to perform these computations in real time. The first implementation, referred to as the BEAST (Bayesian Estimation and Stochastic Tracker, demonstrates a simple problem where an observer uses an underlying Hidden Markov Model (HMM to track a target in one dimension. In this implementation, sensors make noisy observations of the target position at discrete time steps. The tracker learns the transition model for target movement, and the observation model for the noisy sensors, and uses these to estimate the target position by solving the Bayesian recursive equation online. We show the tracking performance of the system and demonstrate how it can learn the observation model, the transition model, and the external distractor (noise probability interfering with the observations. In the second implementation, referred to as the Bayesian INference in DAG (BIND, we show how inference can be performed in a Directed Acyclic Graph (DAG using stochastic circuits. We show how these building blocks can be easily implemented using simple digital logic gates. An advantage of the stochastic electronic implementation is that it is robust to certain types of noise, which may become an issue in integrated circuit (IC technology with feature sizes in the order of tens of nanometers due to their low noise margin, the effect of high-energy cosmic rays and the low supply voltage. In our framework, the flipping of random individual bits would not affect the system performance because information is encoded in a bit stream.

  1. Development of Robust Metal-Supported SOFCs and Stack Components in EU METSAPP Consortium

    DEFF Research Database (Denmark)

    Sudireddy, Bhaskar Reddy; Nielsen, Jimmi; Persson, Åsa Helen

    2017-01-01

    METSAPP project has been executed with an overall aim of developing advanced metal-supported cells and stacks based on a robust, reliable and up-scalable technology. During the project, oxidation resistant nanostructured anodes based on modified SrTiO3 were developed and integrated into MS...... and best performance and stability combination was observed with doped SrTiO3 based anode designs. Furthermore, numerical models to understand the corrosion behavior of the MS-SOFCs were developed and validated. Finally, the cost effective concept of coated metal interconnects was developed, which resulted...... in 90% reduction in Cr evaporation, three times lower Cr2O3 scale thickness and increased lifetime. The possibility of assembling these cells into two radically different stack designs was demonstrated....

  2. Dynamic provisioning of local and remote compute resources with OpenStack

    Science.gov (United States)

    Giffels, M.; Hauth, T.; Polgart, F.; Quast, G.

    2015-12-01

    Modern high-energy physics experiments rely on the extensive usage of computing resources, both for the reconstruction of measured events as well as for Monte-Carlo simulation. The Institut fur Experimentelle Kernphysik (EKP) at KIT is participating in both the CMS and Belle experiments with computing and storage resources. In the upcoming years, these requirements are expected to increase due to growing amount of recorded data and the rise in complexity of the simulated events. It is therefore essential to increase the available computing capabilities by tapping into all resource pools. At the EKP institute, powerful desktop machines are available to users. Due to the multi-core nature of modern CPUs, vast amounts of CPU time are not utilized by common desktop usage patterns. Other important providers of compute capabilities are classical HPC data centers at universities or national research centers. Due to the shared nature of these installations, the standardized software stack required by HEP applications cannot be installed. A viable way to overcome this constraint and offer a standardized software environment in a transparent manner is the usage of virtualization technologies. The OpenStack project has become a widely adopted solution to virtualize hardware and offer additional services like storage and virtual machine management. This contribution will report on the incorporation of the institute's desktop machines into a private OpenStack Cloud. The additional compute resources provisioned via the virtual machines have been used for Monte-Carlo simulation and data analysis. Furthermore, a concept to integrate shared, remote HPC centers into regular HEP job workflows will be presented. In this approach, local and remote resources are merged to form a uniform, virtual compute cluster with a single point-of-entry for the user. Evaluations of the performance and stability of this setup and operational experiences will be discussed.

  3. Hardware replacements and software tools for digital control computers

    International Nuclear Information System (INIS)

    Walker, R.A.P.; Wang, B-C.; Fung, J.

    1996-01-01

    Technological obsolescence is an on-going challenge for all computer use. By design, and to some extent good fortune, AECL has had a good track record with respect to the march of obsolescence in CANDU digital control computer technology. Recognizing obsolescence as a fact of life, AECL has undertaken a program of supporting the digital control technology of existing CANDU plants. Other AECL groups are developing complete replacement systems for the digital control computers, and more advanced systems for the digital control computers of the future CANDU reactors. This paper presents the results of the efforts of AECL's DCC service support group to replace obsolete digital control computer and related components and to provide friendlier software technology related to the maintenance and use of digital control computers in CANDU. These efforts are expected to extend the current lifespan of existing digital control computers through their mandated life. This group applied two simple rules; the product, whether new or replacement should have a generic basis, and the products should be applicable to both existing CANDU plants and to 'repeat' plant designs built using current design guidelines. While some exceptions do apply, the rules have been met. The generic requirement dictates that the product should not be dependent on any brand technology, and should back-fit to and interface with any such technology which remains in the control design. The application requirement dictates that the product should have universal use and be user friendly to the greatest extent possible. Furthermore, both requirements were designed to anticipate user involvement, modifications and alternate user defined applications. The replacements for hardware components such as paper tape reader/punch, moving arm disk, contact scanner and Ramtek are discussed. The development of these hardware replacements coincide with the development of a gateway system for selected CANDU digital control

  4. Sharing open hardware through ROP, the robotic open platform

    NARCIS (Netherlands)

    Lunenburg, J.; Soetens, R.P.T.; Schoenmakers, F.; Metsemakers, P.M.G.; van de Molengraft, M.J.G.; Steinbuch, M.; Behnke, S.; Veloso, M.; Visser, A.; Xiong, R.

    2014-01-01

    The robot open source software community, in particular ROS, drastically boosted robotics research. However, a centralized place to exchange open hardware designs does not exist. Therefore we launched the Robotic Open Platform (ROP). A place to share and discuss open hardware designs. Among others

  5. Sharing open hardware through ROP, the Robotic Open Platform

    NARCIS (Netherlands)

    Lunenburg, J.J.M.; Soetens, R.P.T.; Schoenmakers, Ferry; Metsemakers, P.M.G.; Molengraft, van de M.J.G.; Steinbuch, M.

    2013-01-01

    The robot open source software community, in particular ROS, drastically boosted robotics research. However, a centralized place to exchange open hardware designs does not exist. Therefore we launched the Robotic Open Platform (ROP). A place to share and discuss open hardware designs. Among others

  6. The role of the visual hardware system in rugby performance ...

    African Journals Online (AJOL)

    This study explores the importance of the 'hardware' factors of the visual system in the game of rugby. A group of professional and club rugby players were tested and the results compared. The results were also compared with the established norms for elite athletes. The findings indicate no significant difference in hardware ...

  7. Hardware packet pacing using a DMA in a parallel computer

    Science.gov (United States)

    Chen, Dong; Heidelberger, Phillip; Vranas, Pavlos

    2013-08-13

    Method and system for hardware packet pacing using a direct memory access controller in a parallel computer which, in one aspect, keeps track of a total number of bytes put on the network as a result of a remote get operation, using a hardware token counter.

  8. Hardware/software virtualization for the reconfigurable multicore platform.

    NARCIS (Netherlands)

    Ferger, M.; Al Kadi, M.; Hübner, M.; Koedam, M.L.P.J.; Sinha, S.S.; Goossens, K.G.W.; Marchesan Almeida, Gabriel; Rodrigo Azambuja, J.; Becker, Juergen

    2012-01-01

    This paper presents the Flex Tiles approach for the virtualization of hardware and software for a reconfigurable multicore architecture. The approach enables the virtualization of a dynamic tile-based hardware architecture consisting of processing tiles connected via a network-on-chip and a

  9. Flexible hardware design for RSA and Elliptic Curve Cryptosystems

    NARCIS (Netherlands)

    Batina, L.; Bruin - Muurling, G.; Örs, S.B.; Okamoto, T.

    2004-01-01

    This paper presents a scalable hardware implementation of both commonly used public key cryptosystems, RSA and Elliptic Curve Cryptosystem (ECC) on the same platform. The introduced hardware accelerator features a design which can be varied from very small (less than 20 Kgates) targeting wireless

  10. Hardware and software for image acquisition in nuclear medicine

    International Nuclear Information System (INIS)

    Fideles, E.L.; Vilar, G.; Silva, H.S.

    1992-01-01

    A system for image acquisition and processing in nuclear medicine is presented, including the hardware and software referring to acquisition. The hardware is consisted of an analog-digital conversion card, developed in wire-wape. Its function is digitate the analogic signs provided by gamma camera. The acquisitions are made in list or frame mode. (C.G.C.)

  11. Hardware Abstraction and Protocol Optimization for Coded Sensor Networks

    DEFF Research Database (Denmark)

    Nistor, Maricica; Roetter, Daniel Enrique Lucani; Barros, João

    2015-01-01

    The design of the communication protocols in wireless sensor networks (WSNs) often neglects several key characteristics of the sensor's hardware, while assuming that the number of transmitted bits is the dominating factor behind the system's energy consumption. A closer look at the hardware speci...

  12. A Practical Introduction to HardwareSoftware Codesign

    CERN Document Server

    Schaumont, Patrick R

    2013-01-01

    This textbook provides an introduction to embedded systems design, with emphasis on integration of custom hardware components with software. The key problem addressed in the book is the following: how can an embedded systems designer strike a balance between flexibility and efficiency? The book describes how combining hardware design with software design leads to a solution to this important computer engineering problem. The book covers four topics in hardware/software codesign: fundamentals, the design space of custom architectures, the hardware/software interface and application examples. The book comes with an associated design environment that helps the reader to perform experiments in hardware/software codesign. Each chapter also includes exercises and further reading suggestions. Improvements in this second edition include labs and examples using modern FPGA environments from Xilinx and Altera, which make the material applicable to a greater number of courses where these tools are already in use.  Mo...

  13. A Two-Dimensional Lamellar Membrane: MXene Nanosheet Stacks.

    Science.gov (United States)

    Ding, Li; Wei, Yanying; Wang, Yanjie; Chen, Hongbin; Caro, Jürgen; Wang, Haihui

    2017-02-06

    Two-dimensional (2D) materials are promising candidates for advanced water purification membranes. A new kind of lamellar membrane is based on a stack of 2D MXene nanosheets. Starting from compact Ti 3 AlC 2 , delaminated nanosheets of the composition Ti 3 C 2 T x with the functional groups T (O, OH, and/or F) can be produced by etching and ultrasonication and stapled on a porous support by vacuum filtration. The MXene membrane supported on anodic aluminum oxide (AAO) substrate shows excellent water permeance (more than 1000 L m -2  h -1  bar -1 ) and favorable rejection rate (over 90 %) for molecules with sizes larger than 2.5 nm. The water permeance through the MXene membrane is much higher than that of the most membranes with similar rejections. Long-time operation also reveals the outstanding stability of the MXene membrane for water purification. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  14. Precise, flexible and affordable gene stacking for crop improvement.

    Science.gov (United States)

    Chen, Weiqiang; Ow, David W

    2017-09-03

    The genetic engineering of plants offers a revolutionary advance for crop improvement, and the incorporation of transgenes into crop species can impart new traits that would otherwise be difficult to obtain through conventional breeding. Transgenes introduced into plants, however, can only be useful when bred out to field cultivars. As new traits are continually added to further improve transgenic cultivars, clustering new DNA near previously introduced transgenes keep from inflating the number of segregating units that breeders must assemble back into a breeding line. Here we discuss various options to introduce DNA site-specifically into an existing transgenic locus. As food security is becoming a pressing global issue, the old proverb resonates true to this day: "give a man a fish and you feed him for a day; teach a man to fish and you feed him for a lifetime." Hence, we describe a recombinase-mediate gene stacking system designed with freedom to operate, providing an affordable option for crop improvement by less developed countries where food security is most at risk.

  15. A dual shared stack for FSLM in Erika Enterprise

    NARCIS (Netherlands)

    Balasubramanian, S.M.N.; Afshar, S.; Gai, P.; Behnam, M.; Bril, R.J.

    2017-01-01

    Recently, the flexible spin-lock model (FSLM) has been introduced, unifying spin-based and suspension-based resource sharing protocols for real-time multi-core platforms. Unlike the multiprocessor stack resource policy (MSRP), FSLM doesn’t allow tasks on a core to share a single stack, however. In

  16. Long Josephson Junction Stack Coupled to a Cavity

    DEFF Research Database (Denmark)

    Madsen, Søren Peder; Pedersen, Niels Falsig; Groenbech-Jensen, N.

    2007-01-01

    A stack of inductively coupled long Josephson junctions are modeled as a system of coupled sine-Gordon equations. One boundary of the stack is coupled electrically to a resonant cavity. With one fluxon in each Josephson junction, the inter-junction fluxon forces are repulsive. We look at a possible...... transition, induced by the cavity, to a bunched state....

  17. Efficient Context Switching for the Stack Cache: Implementation and Analysis

    DEFF Research Database (Denmark)

    Abbaspourseyedi, Sahar; Brandner, Florian; Naji, Amine

    2015-01-01

    , the analysis of the stack cache was limited to individual tasks, ignoring aspects related to multitasking. A major drawback of the original stack cache design is that, due to its simplicity, it cannot hold the data of multiple tasks at the same time. Consequently, the entire cache content needs to be saved...

  18. Analysis of preemption costs for the stack cache

    DEFF Research Database (Denmark)

    Naji, Amine; Abbaspour, Sahar; Brandner, Florian

    2018-01-01

    , the analysis of the stack cache was limited to individual tasks, ignoring aspects related to multitasking. A major drawback of the original stack cache design is that, due to its simplicity, it cannot hold the data of multiple tasks at the same time. Consequently, the entire cache content needs to be saved...

  19. Simultaneous stack-gas scrubbing and waste water treatment

    Science.gov (United States)

    Poradek, J. C.; Collins, D. D.

    1980-01-01

    Simultaneous treatment of wastewater and S02-laden stack gas make both treatments more efficient and economical. According to results of preliminary tests, solution generated by stack gas scrubbing cycle reduces bacterial content of wastewater. Both processess benefit by sharing concentrations of iron.

  20. A Software Managed Stack Cache for Real-Time Systems

    DEFF Research Database (Denmark)

    Jordan, Alexander; Abbaspourseyedi, Sahar; Schoeberl, Martin

    2016-01-01

    In a real-time system, the use of a scratchpad memory can mitigate the difficulties related to analyzing data caches, whose behavior is inherently hard to predict. We propose to use a scratchpad memory for stack allocated data. While statically allocating stack frames for individual functions...

  1. Hardware Acceleration on Cloud Services: The use of Restricted Boltzmann Machines on Handwritten Digits Recognition

    Directory of Open Access Journals (Sweden)

    Eleni Bougioukou

    2018-02-01

    Full Text Available Cloud computing allows users and enterprises to process their data in high performance servers, thus reducing the need for advanced hardware at the client side. Although local processing is viable in many cases, collecting data from multiple clients and processing them in a server gives the best possible performance in terms of processing rate. In this work, the implementation of a high performance cloud computing engine for recognizing handwritten digits is presented. The engine exploits the benefits of cloud and uses a powerful hardware accelerator in order to classify the images received concurrently from multiple clients. The accelerator implements a number of neural networks, operating in parallel, resulting to a processing rate of more than 10 MImages/sec.

  2. High-Density Stacked Ru Nanocrystals for Nonvolatile Memory Application

    International Nuclear Information System (INIS)

    Ping, Mao; Zhi-Gang, Zhang; Li-Yang, Pan; Jun, Xu; Pei-Yi, Chen

    2009-01-01

    Stacked ruthenium (Ru) nanocrystals (NCs) are formed by rapid thermal annealing for the whole gate stacks and embedded in memory structure, which is compatible with conventional CMOS technology. Ru NCs with high density (3 × 10 12 cm −2 ), small size (2–4 nm) and good uniformity both in aerial distribution and morphology are formed. Attributed to the higher surface trap density, a memory window of 5.2 V is obtained with stacked Ru NCs in comparison to that of 3.5 V with single-layer samples. The stacked Ru NCs device also exhibits much better retention performance because of Coulomb blockade and vertical uniformity between stacked Ru NCs

  3. Hardware Development Process for Human Research Facility Applications

    Science.gov (United States)

    Bauer, Liz

    2000-01-01

    The simple goal of the Human Research Facility (HRF) is to conduct human research experiments on the International Space Station (ISS) astronauts during long-duration missions. This is accomplished by providing integration and operation of the necessary hardware and software capabilities. A typical hardware development flow consists of five stages: functional inputs and requirements definition, market research, design life cycle through hardware delivery, crew training, and mission support. The purpose of this presentation is to guide the audience through the early hardware development process: requirement definition through selecting a development path. Specific HRF equipment is used to illustrate the hardware development paths. The source of hardware requirements is the science community and HRF program. The HRF Science Working Group, consisting of SCientists from various medical disciplines, defined a basic set of equipment with functional requirements. This established the performance requirements of the hardware. HRF program requirements focus on making the hardware safe and operational in a space environment. This includes structural, thermal, human factors, and material requirements. Science and HRF program requirements are defined in a hardware requirements document which includes verification methods. Once the hardware is fabricated, requirements are verified by inspection, test, analysis, or demonstration. All data is compiled and reviewed to certify the hardware for flight. Obviously, the basis for all hardware development activities is requirement definition. Full and complete requirement definition is ideal prior to initiating the hardware development. However, this is generally not the case, but the hardware team typically has functional inputs as a guide. The first step is for engineers to conduct market research based on the functional inputs provided by scientists. CommerCially available products are evaluated against the science requirements as

  4. Monitoring Particulate Matter with Commodity Hardware

    Science.gov (United States)

    Holstius, David

    Health effects attributed to outdoor fine particulate matter (PM 2.5) rank it among the risk factors with the highest health burdens in the world, annually accounting for over 3.2 million premature deaths and over 76 million lost disability-adjusted life years. Existing PM2.5 monitoring infrastructure cannot, however, be used to resolve variations in ambient PM2.5 concentrations with adequate spatial and temporal density, or with adequate coverage of human time-activity patterns, such that the needs of modern exposure science and control can be met. Small, inexpensive, and portable devices, relying on newly available off-the-shelf sensors, may facilitate the creation of PM2.5 datasets with improved resolution and coverage, especially if many such devices can be deployed concurrently with low system cost. Datasets generated with such technology could be used to overcome many important problems associated with exposure misclassification in air pollution epidemiology. Chapter 2 presents an epidemiological study of PM2.5 that used data from ambient monitoring stations in the Los Angeles basin to observe a decrease of 6.1 g (95% CI: 3.5, 8.7) in population mean birthweight following in utero exposure to the Southern California wildfires of 2003, but was otherwise limited by the sparsity of the empirical basis for exposure assessment. Chapter 3 demonstrates technical potential for remedying PM2.5 monitoring deficiencies, beginning with the generation of low-cost yet useful estimates of hourly and daily PM2.5 concentrations at a regulatory monitoring site. The context (an urban neighborhood proximate to a major goods-movement corridor) and the method (an off-the-shelf sensor costing approximately USD $10, combined with other low-cost, open-source, readily available hardware) were selected to have special significance among researchers and practitioners affiliated with contemporary communities of practice in public health and citizen science. As operationalized by

  5. A Power Hardware-in-the-Loop Platform with Remote Distribution Circuit Cosimulation

    Energy Technology Data Exchange (ETDEWEB)

    Palmintier, Bryan; Lundstrom, Blake; Chakraborty, Sudipta; Williams, Tess L.; Schneider, Kevin P.; Chassin, David P.

    2015-04-01

    This paper demonstrates the use of a novel cosimulation architecture that integrates hardware testing using Power Hardware-in-the-Loop (PHIL) with larger-scale electric grid models using off-the-shelf, non-PHIL software tools. This architecture enables utilities to study the impacts of emerging energy technologies on their system and manufacturers to explore the interactions of new devices with existing and emerging devices on the power system, both without the need to convert existing grid models to a new platform or to conduct in-field trials. The paper describes an implementation of this architecture for testing two residential-scale advanced solar inverters at separate points of common coupling. The same hardware setup is tested with two different distribution feeders (IEEE 123 and 8500 node test systems) modeled using GridLAB-D. In addition to simplifying testing with multiple feeders, the architecture demonstrates additional flexibility with hardware testing in one location linked via the Internet to software modeling in a remote location. In testing, inverter current, real and reactive power, and PCC voltage are well captured by the co-simulation platform. Testing of the inverter advanced control features is currently somewhat limited by the software model time step (1 sec) and tested communication latency (24 msec). Overshoot induced oscillations are observed with volt/VAR control delays of 0 and 1.5 sec, while 3.4 sec and 5.5 sec delays produced little or no oscillation. These limitations could be overcome using faster modeling and communication within the same co-simulation architecture.

  6. Autonomous Dynamically Self-Organizing and Self-Healing Distributed Hardware Architecture - the eDNA Concept

    Science.gov (United States)

    Boesen, Michael Reibel; Madsen, Jan; Keymeulen, Didier

    2011-01-01

    This paper presents the current state of the autonomous dynamically self-organizing and self-healing electronic DNA (eDNA) hardware architecture (patent pending). In its current prototype state, the eDNA architecture is capable of responding to multiple injected faults by autonomously reconfiguring itself to accommodate the fault and keep the application running. This paper will also disclose advanced features currently available in the simulation model only. These features are future work and will soon be implemented in hardware. Finally we will describe step-by-step how an application is implemented on the eDNA architecture.

  7. Reflector imaging by diffraction stacking with stacking velocity analysis; Jugo sokudo kaiseki wo tomonau sanran jugoho ni yoru hanshamen imaging

    Energy Technology Data Exchange (ETDEWEB)

    Matsushima, J; Rokugawa, S; Kato, Y [The University of Tokyo, Tokyo (Japan). Faculty of Engineering; Yokota, T [Japan National Oil Corp., Tokyo (Japan); Miyazaki, T [Geological Survey of Japan, Tsukuba (Japan)

    1997-10-22

    Concerning seismic reflection survey for geometrical arrangement between pits, the scattering stacking method with stacking velocity analysis is compared with the CDP (common depth point horizontal stacking method). The advantages of the CDP supposedly include the following. Since it presumes an average velocity field, it can determine velocities having stacking effects. The method presumes stratification and, since such enables the division of huge quantities of observed data into smaller groups, more data can be calculated in a shorter time period. The method has disadvantages, attributable to its presuming an average velocity field, that accuracy in processing is lower when the velocity field contrast is higher, that accuracy in processing is low unless stratification is employed, and that velocities obtained from stacking velocity analysis are affected by dipped structures. Such shortcomings may be remedied in the scattering stacking method with stacking velocity analysis. Possibilities are that, as far as the horizontal reflection plane is concerned, it may yield stack records higher in S/N ratio than the CDP. Findings relative to dipped reflection planes will be introduced at the presentation. 6 refs., 12 figs.

  8. Adding Cross-Platform Support to a High-Throughput Software Stack and Exploration of Vectorization Libraries

    CERN Document Server

    AUTHOR|(CDS)2258962

    This master thesis is written at the LHCb experiment at CERN. It is part of the initiative for improving software in view of the upcoming upgrade in 2021 which will significantly increase the amount of acquired data. This thesis consists of two parts. The first part is about the exploration of different vectorization libraries and their usefulness for the LHCb collaboration. The second part is about adding cross-platform support to the LHCb software stack. Here, the LHCb stack is successfully ported to ARM (aarch64) and its performance is analyzed. At the end of the thesis, the port to PowerPC(ppc64le) awaits the performance analysis. The main goal of porting the stack is the cost-performance evaluation for the different platforms to get the most cost efficient hardware for the new server farm for the upgrade. For this, selected vectorization libraries are extended to support the PowerPC and ARM platform. And though the same compiler is used, platform-specific changes to the compilation flags are required. In...

  9. Targeting multiple heterogeneous hardware platforms with OpenCL

    Science.gov (United States)

    Fox, Paul A.; Kozacik, Stephen T.; Humphrey, John R.; Paolini, Aaron; Kuller, Aryeh; Kelmelis, Eric J.

    2014-06-01

    The OpenCL API allows for the abstract expression of parallel, heterogeneous computing, but hardware implementations have substantial implementation differences. The abstractions provided by the OpenCL API are often insufficiently high-level to conceal differences in hardware architecture. Additionally, implementations often do not take advantage of potential performance gains from certain features due to hardware limitations and other factors. These factors make it challenging to produce code that is portable in practice, resulting in much OpenCL code being duplicated for each hardware platform being targeted. This duplication of effort offsets the principal advantage of OpenCL: portability. The use of certain coding practices can mitigate this problem, allowing a common code base to be adapted to perform well across a wide range of hardware platforms. To this end, we explore some general practices for producing performant code that are effective across platforms. Additionally, we explore some ways of modularizing code to enable optional optimizations that take advantage of hardware-specific characteristics. The minimum requirement for portability implies avoiding the use of OpenCL features that are optional, not widely implemented, poorly implemented, or missing in major implementations. Exposing multiple levels of parallelism allows hardware to take advantage of the types of parallelism it supports, from the task level down to explicit vector operations. Static optimizations and branch elimination in device code help the platform compiler to effectively optimize programs. Modularization of some code is important to allow operations to be chosen for performance on target hardware. Optional subroutines exploiting explicit memory locality allow for different memory hierarchies to be exploited for maximum performance. The C preprocessor and JIT compilation using the OpenCL runtime can be used to enable some of these techniques, as well as to factor in hardware

  10. Long Duration Balloon Charge Controller Stack Integration

    Science.gov (United States)

    Clifford, Kyle

    NASA and the Columbia Scientific Balloon Facility are interested in updating the design of the charge controller on their long duration balloon (LDB) in order to enable the charge controllers to be directly interfaced via RS232 serial communication by a ground testing computers and the balloon's flight computer without the need to have an external electronics stack. The design involves creating a board that will interface with the existing boards in the charge controller in order to receive telemetry from and send commands to those boards, and interface with a computer through serial communication. The inputs to the board are digital status inputs indicating things like whether the photovoltaic panels are connected or disconnected; and analog inputs with information such as the battery voltage and temperature. The outputs of the board are 100ms duration command pulses that will switch relays that do things like connect the photovoltaic panels. The main component of this design is a PIC microcontroller which translates the outputs of the existing charge controller into serial data when interrogated by a ground testing or flight computer. Other components involved in the design are an AD7888 12-bit analog to digital converter, a MAX3232 serial transceiver, various other ICs, capacitors, resistors, and connectors.

  11. Testing system for a fuel cells stack

    International Nuclear Information System (INIS)

    Culcer, Mihai; Iliescu, Mariana; Stefanescu, Ioan; Raceanu, Mircea; Enache, Adrian; Lazar, Roxana Elena

    2006-01-01

    Hydrogen and electricity together represent one of the most promising ways to realize sustainable energy, whilst fuel cells provide the most efficient conversion devices for converting hydrogen and possibly other fuels into electricity. Thus, the development of fuel cell technology is currently being actively pursued worldwide. Due to its simple operation and other fair characteristics, the Proton Exchange Membrane Fuel Cell (PEMFC) is especially suitable as a replacement for the internal combustion engine. The PEMFC is also being developed for decentralized electricity and heat generation in buildings and mobile applications. Starting with 2001 the Institute of Research - Development for Cryogenics and Isotopic Technologies - ICIT - Rm. Valcea developed research activities supported by the Romanian Ministry of Education and Research within the National Research Program in order to bridge the gap to European competencies in the area of hydrogen and fuel cells. The paper deals with the testing system designed and developed in ICIT Rm. Valcea as a flexible and versatile tool allowing a large scale of parameter settings and measurements on a single cell or on a fuel cells stack onto a wind range of output power values. (authors)

  12. Weyl magnons in noncoplanar stacked kagome antiferromagnets

    Science.gov (United States)

    Owerre, S. A.

    2018-03-01

    Weyl nodes have been experimentally realized in photonic, electronic, and phononic crystals. However, magnonic Weyl nodes are yet to be seen experimentally. In this paper, we propose Weyl magnon nodes in noncoplanar stacked frustrated kagome antiferromagnets, naturally available in various real materials. Most crucially, the Weyl nodes in the current system occur at the lowest excitation and possess a topological thermal Hall effect, therefore they are experimentally accessible at low temperatures due to the population effect of bosonic quasiparticles. In stark contrast to other magnetic systems, the current Weyl nodes do not rely on time-reversal symmetry breaking by the magnetic order. Rather, they result from explicit macroscopically broken time reversal symmetry by the scalar spin chirality of noncoplanar spin textures and can be generalized to chiral spin liquid states. Moreover, the scalar spin chirality gives a real space Berry curvature which is not available in previously studied magnetic Weyl systems. We show the existence of magnon arc surface states connecting projected Weyl magnon nodes on the surface Brillouin zone. We also uncover the first realization of triply-degenerate nodal magnon point in the noncollinear regime with zero scalar spin chirality.

  13. Lithiation-induced shuffling of atomic stacks

    KAUST Repository

    Nie, Anmin

    2014-09-10

    In rechargeable lithium-ion batteries, understanding the atomic-scale mechanism of Li-induced structural evolution occurring at the host electrode materials provides essential knowledge for design of new high performance electrodes. Here, we report a new crystalline-crystalline phase transition mechanism in single-crystal Zn-Sb intermetallic nanowires upon lithiation. Using in situ transmission electron microscopy, we observed that stacks of atomic planes in an intermediate hexagonal (h-)LiZnSb phase are "shuffled" to accommodate the geometrical confinement stress arising from lamellar nanodomains intercalated by lithium ions. Such atomic rearrangement arises from the anisotropic lithium diffusion and is accompanied by appearance of partial dislocations. This transient structure mediates further phase transition from h-LiZnSb to cubic (c-)Li2ZnSb, which is associated with a nearly "zero-strain" coherent interface viewed along the [001]h/[111]c directions. This study provides new mechanistic insights into complex electrochemically driven crystalline-crystalline phase transitions in lithium-ion battery electrodes and represents a noble example of atomic-level structural and interfacial rearrangements.

  14. Captioning Transformer with Stacked Attention Modules

    Directory of Open Access Journals (Sweden)

    Xinxin Zhu

    2018-05-01

    Full Text Available Image captioning is a challenging task. Meanwhile, it is important for the machine to understand the meaning of an image better. In recent years, the image captioning usually use the long-short-term-memory (LSTM as the decoder to generate the sentence, and these models show excellent performance. Although the LSTM can memorize dependencies, the LSTM structure has complicated and inherently sequential across time problems. To address these issues, recent works have shown benefits of the Transformer for machine translation. Inspired by their success, we develop a Captioning Transformer (CT model with stacked attention modules. We attempt to introduce the Transformer to the image captioning task. The CT model contains only attention modules without the dependencies of the time. It not only can memorize dependencies between the sequence but also can be trained in parallel. Moreover, we propose the multi-level supervision to make the Transformer achieve better performance. Extensive experiments are carried out on the challenging MSCOCO dataset and the proposed Captioning Transformer achieves competitive performance compared with some state-of-the-art methods.

  15. Validation test of advanced technology for IPV nickel-hydrogen flight cells: Update

    Science.gov (United States)

    Smithrick, John J.; Hall, Stephen W.

    1992-01-01

    Individual pressure vessel (IPV) nickel-hydrogen technology was advanced at NASA Lewis and under Lewis contracts with the intention of improving cycle life and performance. One advancement was to use 26 percent potassium hydroxide (KOH) electrolyte to improve cycle life. Another advancement was to modify the state-of-the-art cell design to eliminate identified failure modes. The modified design is referred to as the advanced design. A breakthrough in the low-earth-orbit (LEO) cycle life of IPV nickel-hydrogen cells has been previously reported. The cycle life of boiler plate cells containing 26 percent KOH electrolyte was about 40,000 LEO cycles compared to 3,500 cycles for cells containing 31 percent KOH. The boiler plate test results are in the process of being validated using flight hardware and real time LEO testing at the Naval Weapons Support Center (NWSC), Crane, Indiana under a NASA Lewis Contract. An advanced 125 Ah IPV nickel-hydrogen cell was designed. The primary function of the advanced cell is to store and deliver energy for long-term, LEO spacecraft missions. The new features of this design are: (1) use of 26 percent rather than 31 percent KOH electrolyte; (2) use of a patented catalyzed wall wick; (3) use of serrated-edge separators to facilitate gaseous oxygen and hydrogen flow within the cell, while still maintaining physical contact with the wall wick for electrolyte management; and (4) use of a floating rather than a fixed stack (state-of-the-art) to accommodate nickel electrode expansion due to charge/discharge cycling. The significant improvements resulting from these innovations are: extended cycle life; enhanced thermal, electrolyte, and oxygen management; and accommodation of nickel electrode expansion. The advanced cell design is in the process of being validated using real time LEO cycle life testing of NWSC, Crane, Indiana. An update of validation test results confirming this technology is presented.

  16. Advanced Environmental Monitoring Technologies

    Science.gov (United States)

    Jan, Darrell

    2004-01-01

    Viewgraphs on Advanced Environmental Monitoring Technologies are presented. The topics include: 1) Monitoring & Controlling the Environment; 2) Illustrative Example: Canary 3) Ground-based Commercial Technology; 4) High Capability & Low Mass/Power + Autonomy = Key to Future SpaceFlight; 5) Current Practice: in Flight; 6) Current Practice: Post Flight; 7) Miniature Mass Spectrometer for Planetary Exploration and Long Duration Human Flight; 8) Hardware and Data Acquisition System; 9) 16S rDNA Phylogenetic Tree; and 10) Preview of Porter.

  17. Hardware Implementation of a Bilateral Subtraction Filter

    Science.gov (United States)

    Huertas, Andres; Watson, Robert; Villalpando, Carlos; Goldberg, Steven

    2009-01-01

    A bilateral subtraction filter has been implemented as a hardware module in the form of a field-programmable gate array (FPGA). In general, a bilateral subtraction filter is a key subsystem of a high-quality stereoscopic machine vision system that utilizes images that are large and/or dense. Bilateral subtraction filters have been implemented in software on general-purpose computers, but the processing speeds attainable in this way even on computers containing the fastest processors are insufficient for real-time applications. The present FPGA bilateral subtraction filter is intended to accelerate processing to real-time speed and to be a prototype of a link in a stereoscopic-machine- vision processing chain, now under development, that would process large and/or dense images in real time and would be implemented in an FPGA. In terms that are necessarily oversimplified for the sake of brevity, a bilateral subtraction filter is a smoothing, edge-preserving filter for suppressing low-frequency noise. The filter operation amounts to replacing the value for each pixel with a weighted average of the values of that pixel and the neighboring pixels in a predefined neighborhood or window (e.g., a 9 9 window). The filter weights depend partly on pixel values and partly on the window size. The present FPGA implementation of a bilateral subtraction filter utilizes a 9 9 window. This implementation was designed to take advantage of the ability to do many of the component computations in parallel pipelines to enable processing of image data at the rate at which they are generated. The filter can be considered to be divided into the following parts (see figure): a) An image pixel pipeline with a 9 9- pixel window generator, b) An array of processing elements; c) An adder tree; d) A smoothing-and-delaying unit; and e) A subtraction unit. After each 9 9 window is created, the affected pixel data are fed to the processing elements. Each processing element is fed the pixel value for

  18. Hardware Realization of Chaos Based Symmetric Image Encryption

    KAUST Repository

    Barakat, Mohamed L.

    2012-06-01

    This thesis presents a novel work on hardware realization of symmetric image encryption utilizing chaos based continuous systems as pseudo random number generators. Digital implementation of chaotic systems results in serious degradations in the dynamics of the system. Such defects are illuminated through a new technique of generalized post proceeding with very low hardware cost. The thesis further discusses two encryption algorithms designed and implemented as a block cipher and a stream cipher. The security of both systems is thoroughly analyzed and the performance is compared with other reported systems showing a superior results. Both systems are realized on Xilinx Vetrix-4 FPGA with a hardware and throughput performance surpassing known encryption systems.

  19. Dynamically-Loaded Hardware Libraries (HLL) Technology for Audio Applications

    DEFF Research Database (Denmark)

    Esposito, A.; Lomuscio, A.; Nunzio, L. Di

    2016-01-01

    In this work, we apply hardware acceleration to embedded systems running audio applications. We present a new framework, Dynamically-Loaded Hardware Libraries or HLL, to dynamically load hardware libraries on reconfigurable platforms (FPGAs). Provided a library of application-specific processors......, we load on-the-fly the specific processor in the FPGA, and we transfer the execution from the CPU to the FPGA-based accelerator. The proposed architecture provides excellent flexibility with respect to the different audio applications implemented, high quality audio, and an energy efficient solution....

  20. Acceleration of Meshfree Radial Point Interpolation Method on Graphics Hardware

    International Nuclear Information System (INIS)

    Nakata, Susumu

    2008-01-01

    This article describes a parallel computational technique to accelerate radial point interpolation method (RPIM)-based meshfree method using graphics hardware. RPIM is one of the meshfree partial differential equation solvers that do not require the mesh structure of the analysis targets. In this paper, a technique for accelerating RPIM using graphics hardware is presented. In the method, the computation process is divided into small processes suitable for processing on the parallel architecture of the graphics hardware in a single instruction multiple data manner.

  1. Hardware support for collecting performance counters directly to memory

    Science.gov (United States)

    Gara, Alan; Salapura, Valentina; Wisniewski, Robert W.

    2012-09-25

    Hardware support for collecting performance counters directly to memory, in one aspect, may include a plurality of performance counters operable to collect one or more counts of one or more selected activities. A first storage element may be operable to store an address of a memory location. A second storage element may be operable to store a value indicating whether the hardware should begin copying. A state machine may be operable to detect the value in the second storage element and trigger hardware copying of data in selected one or more of the plurality of performance counters to the memory location whose address is stored in the first storage element.

  2. Aspects of system modelling in Hardware/Software partitioning

    DEFF Research Database (Denmark)

    Knudsen, Peter Voigt; Madsen, Jan

    1996-01-01

    This paper addresses fundamental aspects of system modelling and partitioning algorithms in the area of Hardware/Software Codesign. Three basic system models for partitioning are presented and the consequences of partitioning according to each of these are analyzed. The analysis shows...... the importance of making a clear distinction between the model used for partitioning and the model used for evaluation It also illustrates the importance of having a realistic hardware model such that hardware sharing can be taken into account. Finally, the importance of integrating scheduling and allocation...

  3. Efficiency of Polymer Electrolyte Membrane Fuel Cell Stack

    Directory of Open Access Journals (Sweden)

    Hans Bosma

    2011-08-01

    Full Text Available This paper applies a feedforward control of optimal oxygen excess ratio that maximize net power (improve efficiency of a NedStack P8.0-64 PEM fuel cell stack (FCS system. Net powers profile as a function of oxygen excess ratio for some points of operation are analyzed by using FCS model. The relationships between stack current and the corresponding control input voltage that gives an optimal oxygen excess ratio are used to design a feedforward control scheme. The results of this scheme are compared to the results of a feedforward control using a constant oxygen excess ratio. Simulation results show that optimal oxygen excess ratio improves fuel cell performance compared to the results of constant oxygen excess ratio. The same procedures are performed experimentally for the FCS system. The behaviour of the net power of the fuel cell stack with respect to the variation of oxygen excess ratio is analyzed to obtain optimal values. Data of stack current and the corresponding voltage input to the compressor that gives optimal values of oxygen excess ratio are used to develop a feedforward control. Feedforward control based on constant and optimal oxygen excess ratio control, are implemented in the NedStack P8.0-64 PEM fuel cell stack system by using LabVIEW. Implementation results shows that optimal oxygen excess ratio control improves the fuel cell performance compared to the constant oxygen excess ratio control.

  4. Reliability analysis and initial requirements for FC systems and stacks

    Science.gov (United States)

    Åström, K.; Fontell, E.; Virtanen, S.

    In the year 2000 Wärtsilä Corporation started an R&D program to develop SOFC systems for CHP applications. The program aims to bring to the market highly efficient, clean and cost competitive fuel cell systems with rated power output in the range of 50-250 kW for distributed generation and marine applications. In the program Wärtsilä focuses on system integration and development. System reliability and availability are key issues determining the competitiveness of the SOFC technology. In Wärtsilä, methods have been implemented for analysing the system in respect to reliability and safety as well as for defining reliability requirements for system components. A fault tree representation is used as the basis for reliability prediction analysis. A dynamic simulation technique has been developed to allow for non-static properties in the fault tree logic modelling. Special emphasis has been placed on reliability analysis of the fuel cell stacks in the system. A method for assessing reliability and critical failure predictability requirements for fuel cell stacks in a system consisting of several stacks has been developed. The method is based on a qualitative model of the stack configuration where each stack can be in a functional, partially failed or critically failed state, each of the states having different failure rates and effects on the system behaviour. The main purpose of the method is to understand the effect of stack reliability, critical failure predictability and operating strategy on the system reliability and availability. An example configuration, consisting of 5 × 5 stacks (series of 5 sets of 5 parallel stacks) is analysed in respect to stack reliability requirements as a function of predictability of critical failures and Weibull shape factor of failure rate distributions.

  5. Validating and improving a zero-dimensional stack voltage model of the Vanadium Redox Flow Battery

    Science.gov (United States)

    König, S.; Suriyah, M. R.; Leibfried, T.

    2018-02-01

    Simple, computationally efficient battery models can contribute significantly to the development of flow batteries. However, validation studies for these models on an industrial-scale stack level are rarely published. We first extensively present a simple stack voltage model for the Vanadium Redox Flow Battery. For modeling the concentration overpotential, we derive mass transfer coefficients from experimental results presented in the 1990s. The calculated mass transfer coefficient of the positive half-cell is 63% larger than of the negative half-cell, which is not considered in models published to date. Further, we advance the concentration overpotential model by introducing an apparent electrochemically active electrode surface which differs from the geometric electrode area. We use the apparent surface as fitting parameter for adapting the model to experimental results of a flow battery manufacturer. For adapting the model, we propose a method for determining the agreement between model and reality quantitatively. To protect the manufacturer's intellectual property, we introduce a normalization method for presenting the results. For the studied stack, the apparent electrochemically active surface of the electrode is 41% larger than its geometrical area. Hence, the current density in the diffusion layer is 29% smaller than previously reported for a zero-dimensional model.

  6. Mixed Mechanism of Lubrication by Lipid Bilayer Stacks.

    Science.gov (United States)

    Boţan, Alexandru; Joly, Laurent; Fillot, Nicolas; Loison, Claire

    2015-11-10

    Although the key role of lipid bilayer stacks in biological lubrication is generally accepted, the mechanisms underlying their extreme efficiency remain elusive. In this article, we report molecular dynamics simulations of lipid bilayer stacks undergoing load and shear. When the hydration level is reduced, the velocity accommodation mechanism changes from viscous shear in hydration water to interlayer sliding in the bilayers. This enables stacks of hydrated lipid bilayers to act as efficient boundary lubricants for various hydration conditions, structures, and mechanical loads. We also propose an estimation for the friction coefficient; thanks to the strong hydration forces between lipid bilayers, the high local viscosity is not in contradiction with low friction coefficients.

  7. Fabrication of high gradient insulators by stack compression

    Science.gov (United States)

    Harris, John Richardson; Sanders, Dave; Hawkins, Steven Anthony; Norona, Marcelo

    2014-04-29

    Individual layers of a high gradient insulator (HGI) are first pre-cut to their final dimensions. The pre-cut layers are then stacked to form an assembly that is subsequently pressed into an HGI unit with the desired dimension. The individual layers are stacked, and alignment is maintained, using a sacrificial alignment tube that is removed after the stack is hot pressed. The HGI's are used as high voltage vacuum insulators in energy storage and transmission structures or devices, e.g. in particle accelerators and pulsed power systems.

  8. Study and Development of an OpenStack solution

    OpenAIRE

    Jorba Brosa, Maria

    2014-01-01

    Estudi i desenvolupament d'una solució de virtualització amb Openstack. Es farà un especial èmfasi en la part de seguretat. Deployment of a solution based in OpenStack for the creation of an Infrastructure service cloud. Implementación de una solución basada en OpenStack para la creación de una infrastructura de servicios cloud. Implementació d'una solució basada en OpenStack per la creació d'una infrastructura de serveis cloud.

  9. Loop Entropy Assists Tertiary Order: Loopy Stabilization of Stacking Motifs

    Directory of Open Access Journals (Sweden)

    Daniel P. Aalberts

    2011-11-01

    Full Text Available The free energy of an RNA fold is a combination of favorable base pairing and stacking interactions competing with entropic costs of forming loops. Here we show how loop entropy, surprisingly, can promote tertiary order. A general formula for the free energy of forming multibranch and other RNA loops is derived with a polymer-physics based theory. We also derive a formula for the free energy of coaxial stacking in the context of a loop. Simulations support the analytic formulas. The effects of stacking of unpaired bases are also studied with simulations.

  10. Static analysis of worst-case stack cache behavior

    DEFF Research Database (Denmark)

    Jordan, Alexander; Brandner, Florian; Schoeberl, Martin

    2013-01-01

    Utilizing a stack cache in a real-time system can aid predictability by avoiding interference that heap memory traffic causes on the data cache. While loads and stores are guaranteed cache hits, explicit operations are responsible for managing the stack cache. The behavior of these operations can......-graph, the worst-case bounds can be efficiently yet precisely determined. Our evaluation using the MiBench benchmark suite shows that only 37% and 21% of potential stack cache operations actually store to and load from memory, respectively. Analysis times are modest, on average running between 0.46s and 1.30s per...

  11. Full Piezoelectric Multilayer-Stacked Hybrid Actuation/Transduction Systems

    Science.gov (United States)

    Su, Ji; Jiang, Xiaoning; Zu, Tian-Bing

    2011-01-01

    The Stacked HYBATS (Hybrid Actuation/Transduction system) demonstrates significantly enhanced electromechanical performance by using the cooperative contributions of the electromechanical responses of multilayer, stacked negative strain components and positive strain components. Both experimental and theoretical studies indicate that, for Stacked HYBATS, the displacement is over three times that of a same-sized conventional flextensional actuator/transducer. The coupled resonance mode between positive strain and negative strain components of Stacked HYBATS is much stronger than the resonance of a single element actuation only when the effective lengths of the two kinds of elements match each other. Compared with the previously invented hybrid actuation system (HYBAS), the multilayer Stacked HYBATS can be designed to provide high mechanical load capability, low voltage driving, and a highly effective piezoelectric constant. The negative strain component will contract, and the positive strain component will expand in the length directions when an electric field is applied on the device. The interaction between the two elements makes an enhanced motion along the Z direction for Stacked-HYBATS. In order to dominate the dynamic length of Stacked-HYBATS by the negative strain component, the area of the cross-section for the negative strain component will be much larger than the total cross-section areas of the two positive strain components. The transverse strain is negative and longitudinal strain positive in inorganic materials, such as ceramics/single crystals. Different piezoelectric multilayer stack configurations can make a piezoelectric ceramic/single-crystal multilayer stack exhibit negative strain or positive strain at a certain direction without increasing the applied voltage. The difference of this innovation from the HYBAS is that all the elements can be made from one-of-a-kind materials. Stacked HYBATS can provide an extremely effective piezoelectric

  12. Stacking by electroinjection with discontinuous buffers in capillary zone electrophoresis.

    Science.gov (United States)

    Shihabi, Zak K

    2002-08-01

    The work presented here demonstrates that electroinjection can be performed using discontinuous buffers, which can result in better stacking than that obtained by hydrodynamic injection. The sample can be concentrated at the tip of the capillary leaving practically the whole capillary for sample separation. This results in several advantages, such as better sample concentration, higher plate number and shorter time of stacking. However, sample introduction by electromigration is suited for samples free or low in salt content. Samples, which are high in salt content, are better introduced by the hydrodynamic injection for stacking by the discontinuous buffers. Different simple methods to introduce the discontinuity in the buffer for electroinjection are discussed.

  13. Production and Reliability Oriented SOFC Cell and Stack Design

    DEFF Research Database (Denmark)

    Hauth, Martin; Lawlor, Vincent; Cartellieri, Peter

    2017-01-01

    The paper presents an innovative development methodology for a production and reliability oriented SOFC cell and stack design aiming at improving the stacks robustness, manufacturability, efficiency and cost. Multi-physics models allowed a probabilistic approach to consider statistical variations...... in production, material and operating parameters for the optimization phase. A methodology for 3D description of spatial distribution of material properties based on a random field models was developed and validated by experiments. Homogenized material models on multiple levels of the SOFC stack were...... and output parameters and to perform a sensitivity analysis were developed and implemented. The capabilities of the methodology is illustrated on two practical cases....

  14. Calculation of AC losses in large HTS stacks and coils

    DEFF Research Database (Denmark)

    Zermeno, Victor; Abrahamsen, Asger Bech; Mijatovic, Nenad

    2012-01-01

    In this work, we present a homogenization method to model a stack of HTS tapes under AC applied transport current or magnetic field. The idea is to find an anisotropic bulk equivalent for the stack of tapes, where the internal alternating structures of insulating, metallic, superconducting...... allowing for overcritical current densities to be considered. The method presented here allowed for a computational speedup factor of up to 2 orders of magnitude when compared to full 2-D simulations taking into account the actual structure of the stacks without compromising accuracy....

  15. Optimized stacked RADFETs for milli-rad dose measurement

    International Nuclear Information System (INIS)

    O'Connell, B.; Lane, B.; Mohammadzadeh, A.

    1999-01-01

    This paper details the improvements in the design of stacked RADFETs for increased radiation sensitivity. The issues of high read-out voltage has been shown to be a draw-back. It is the body (bulk)effect factor that is responsible for the increased overall stack Threshold voltage (V T ), which is greater than the sum of the individual devices V T . From extensive process and device simulation and resultant circuit simulation, modified stack structures have been proposed and designed. New and exciting result of lower initial (pre-irradiation) output voltage as well as increased radiation sensitivity will be presented. (author)

  16. Ablation of film stacks in solar cell fabrication processes

    Science.gov (United States)

    Harley, Gabriel; Kim, Taeseok; Cousins, Peter John

    2013-04-02

    A dielectric film stack of a solar cell is ablated using a laser. The dielectric film stack includes a layer that is absorptive in a wavelength of operation of the laser source. The laser source, which fires laser pulses at a pulse repetition rate, is configured to ablate the film stack to expose an underlying layer of material. The laser source may be configured to fire a burst of two laser pulses or a single temporally asymmetric laser pulse within a single pulse repetition to achieve complete ablation in a single step.

  17. Generation of Embedded Hardware/Software from SystemC

    Directory of Open Access Journals (Sweden)

    Dominique Houzet

    2006-08-01

    Full Text Available Designers increasingly rely on reusing intellectual property (IP and on raising the level of abstraction to respect system-on-chip (SoC market characteristics. However, most hardware and embedded software codes are recoded manually from system level. This recoding step often results in new coding errors that must be identified and debugged. Thus, shorter time-to-market requires automation of the system synthesis from high-level specifications. In this paper, we propose a design flow intended to reduce the SoC design cost. This design flow unifies hardware and software using a single high-level language. It integrates hardware/software (HW/SW generation tools and an automatic interface synthesis through a custom library of adapters. We have validated our interface synthesis approach on a hardware producer/consumer case study and on the design of a given software radiocommunication application.

  18. Generation of Embedded Hardware/Software from SystemC

    Directory of Open Access Journals (Sweden)

    Ouadjaout Salim

    2006-01-01

    Full Text Available Designers increasingly rely on reusing intellectual property (IP and on raising the level of abstraction to respect system-on-chip (SoC market characteristics. However, most hardware and embedded software codes are recoded manually from system level. This recoding step often results in new coding errors that must be identified and debugged. Thus, shorter time-to-market requires automation of the system synthesis from high-level specifications. In this paper, we propose a design flow intended to reduce the SoC design cost. This design flow unifies hardware and software using a single high-level language. It integrates hardware/software (HW/SW generation tools and an automatic interface synthesis through a custom library of adapters. We have validated our interface synthesis approach on a hardware producer/consumer case study and on the design of a given software radiocommunication application.

  19. Hardware device to physical structure binding and authentication

    Science.gov (United States)

    Hamlet, Jason R.; Stein, David J.; Bauer, Todd M.

    2013-08-20

    Detection and deterrence of device tampering and subversion may be achieved by including a cryptographic fingerprint unit within a hardware device for authenticating a binding of the hardware device and a physical structure. The cryptographic fingerprint unit includes an internal physically unclonable function ("PUF") circuit disposed in or on the hardware device, which generate an internal PUF value. Binding logic is coupled to receive the internal PUF value, as well as an external PUF value associated with the physical structure, and generates a binding PUF value, which represents the binding of the hardware device and the physical structure. The cryptographic fingerprint unit also includes a cryptographic unit that uses the binding PUF value to allow a challenger to authenticate the binding.

  20. Hardware Realization of Chaos Based Symmetric Image Encryption

    KAUST Repository

    Barakat, Mohamed L.

    2012-01-01

    This thesis presents a novel work on hardware realization of symmetric image encryption utilizing chaos based continuous systems as pseudo random number generators. Digital implementation of chaotic systems results in serious degradations

  1. Hardware Implementation Of Line Clipping A lgorithm By Using FPGA

    Directory of Open Access Journals (Sweden)

    Amar Dawod

    2013-04-01

    Full Text Available The computer graphics system performance is increasing faster than any other computing application. Algorithms for line clipping against convex polygons and lines have been studied for a long time and many research papers have been published so far. In spite of the latest graphical hardware development and significant increase of performance the clipping is still a bottleneck of any graphical system. So its implementation in hardware is essential for real time applications. In this paper clipping operation is discussed and a hardware implementation of the line clipping algorithm is presented and finally formulated and tested using Field Programmable Gate Arrays (FPGA. The designed hardware unit consists of two parts : the first is positional code generator unit and the second is the clipping unit. Finally it is worth mentioning that the  designed unit is capable of clipping (232524 line segments per second.       

  2. Performance comparison between ISCSI and other hardware and software solutions

    CERN Document Server

    Gug, M

    2003-01-01

    We report on our investigations on some technologies that can be used to build disk servers and networks of disk servers using commodity hardware and software solutions. It focuses on the performance that can be achieved by these systems and gives measured figures for different configurations. It is divided into two parts : iSCSI and other technologies and hardware and software RAID solutions. The first part studies different technologies that can be used by clients to access disk servers using a gigabit ethernet network. It covers block access technologies (iSCSI, hyperSCSI, ENBD). Experimental figures are given for different numbers of clients and servers. The second part compares a system based on 3ware hardware RAID controllers, a system using linux software RAID and IDE cards and a system mixing both hardware RAID and software RAID. Performance measurements for reading and writing are given for different RAID levels.

  3. Hardware Realization of Chaos-based Symmetric Video Encryption

    KAUST Repository

    Ibrahim, Mohamad A.

    2013-01-01

    This thesis reports original work on hardware realization of symmetric video encryption using chaos-based continuous systems as pseudo-random number generators. The thesis also presents some of the serious degradations caused by digitally

  4. Improvement of hardware basic testing : Identification and development of a scripted automation tool that will support hardware basic testing

    OpenAIRE

    Rask, Ulf; Mannestig, Pontus

    2002-01-01

    In the ever-increasing development pace, circuits and hardware are no exception. Hardware designs grow and circuits gets more complex at the same time as the market pressure lowers the expected time-to-market. In this rush, verification methods often lag behind. Hardware manufacturers must be aware of the importance of total verification if they want to avoid quality flaws and broken deadlines which in the long run will lead to delayed time-to-market, bad publicity and a decreasing market sha...

  5. Solid Oxide Cell and Stack Testing, Safety and Quality Assurance (SOCTESQA)

    DEFF Research Database (Denmark)

    Auer, C.; Lang, M.; Couturier, K.

    2015-01-01

    The market penetration of fuel and electrolysis cell energy systems in Europe requires the development of reliable assessment, testing and prediction of performance and durability of solid oxide cells and stacks (SOC). To advance in this field the EU-project “SOCTESQA” was launched in May 2014...... and dynamic operating conditions. The application specific test programs are created by combining several of these test modules. In a next step defined test modules will be applied for the initial test bench validation, which will be improved by several validation loops. The final test protocols...

  6. Basics of spectroscopic instruments. Hardware of NMR spectrometer

    International Nuclear Information System (INIS)

    Sato, Hajime

    2009-01-01

    NMR is a powerful tool for structure analysis of small molecules, natural products, biological macromolecules, synthesized polymers, samples from material science and so on. Magnetic Resonance Imaging (MRI) is applicable to plants and animals Because most of NMR experiments can be done by an automation mode, one can forget hardware of NMR spectrometers. It would be good to understand features and performance of NMR spectrometers. Here I present hardware of a modern NMR spectrometer which is fully equipped with digital technology. (author)

  7. Memory Based Machine Intelligence Techniques in VLSI hardware

    OpenAIRE

    James, Alex Pappachen

    2012-01-01

    We briefly introduce the memory based approaches to emulate machine intelligence in VLSI hardware, describing the challenges and advantages. Implementation of artificial intelligence techniques in VLSI hardware is a practical and difficult problem. Deep architectures, hierarchical temporal memories and memory networks are some of the contemporary approaches in this area of research. The techniques attempt to emulate low level intelligence tasks and aim at providing scalable solutions to high ...

  8. Security challenges and opportunities in adaptive and reconfigurable hardware

    OpenAIRE

    Costan, Victor Marius; Devadas, Srinivas

    2011-01-01

    We present a novel approach to building hardware support for providing strong security guarantees for computations running in the cloud (shared hardware in massive data centers), while maintaining the high performance and low cost that make cloud computing attractive in the first place. We propose augmenting regular cloud servers with a Trusted Computation Base (TCB) that can securely perform high-performance computations. Our TCB achieves cost savings by spreading functionality across two pa...

  9. Review of Maxillofacial Hardware Complications and Indications for Salvage

    OpenAIRE

    Hernandez Rosa, Jonatan; Villanueva, Nathaniel L.; Sanati-Mehrizy, Paymon; Factor, Stephanie H.; Taub, Peter J.

    2015-01-01

    From 2002 to 2006, more than 117,000 facial fractures were recorded in the U.S. National Trauma Database. These fractures are commonly treated with open reduction and internal fixation. While in place, the hardware facilitates successful bony union. However, when postoperative complications occur, the plates may require removal before bony union. Indications for salvage versus removal of the maxillofacial hardware are not well defined. A literature review was performed to identify instances w...

  10. Testing Microgravity Flight Hardware Concepts on the NASA KC-135

    Science.gov (United States)

    Motil, Susan M.; Harrivel, Angela R.; Zimmerli, Gregory A.

    2001-01-01

    This paper provides an overview of utilizing the NASA KC-135 Reduced Gravity Aircraft for the Foam Optics and Mechanics (FOAM) microgravity flight project. The FOAM science requirements are summarized, and the KC-135 test-rig used to test hardware concepts designed to meet the requirements are described. Preliminary results regarding foam dispensing, foam/surface slip tests, and dynamic light scattering data are discussed in support of the flight hardware development for the FOAM experiment.

  11. Accelerator Technology: Injection and Extraction Related Hardware: Kickers and Septa

    CERN Document Server

    Barnes, M J; Mertens, V

    2013-01-01

    This document is part of Subvolume C 'Accelerators and Colliders' of Volume 21 'Elementary Particles' of Landolt-Börnstein - Group I 'Elementary Particles, Nuclei and Atoms'. It contains the the Section '8.7 Injection and Extraction Related Hardware: Kickers and Septa' of the Chapter '8 Accelerator Technology' with the content: 8.7 Injection and Extraction Related Hardware: Kickers and Septa 8.7.1 Fast Pulsed Systems (Kickers) 8.7.2 Electrostatic and Magnetic Septa

  12. Learning Machines Implemented on Non-Deterministic Hardware

    OpenAIRE

    Gupta, Suyog; Sindhwani, Vikas; Gopalakrishnan, Kailash

    2014-01-01

    This paper highlights new opportunities for designing large-scale machine learning systems as a consequence of blurring traditional boundaries that have allowed algorithm designers and application-level practitioners to stay -- for the most part -- oblivious to the details of the underlying hardware-level implementations. The hardware/software co-design methodology advocated here hinges on the deployment of compute-intensive machine learning kernels onto compute platforms that trade-off deter...

  13. Hardware control system using modular software under RSX-11D

    International Nuclear Information System (INIS)

    Kittell, R.S.; Helland, J.A.

    1978-01-01

    A modular software system used to control extensive hardware is described. The development, operation, and experience with this software are discussed. Included are the methods employed to implement this system while taking advantage of the Real-Time features of RSX-11D. Comparisons are made between this system and an earlier nonmodular system. The controlled hardware includes magnet power supplies, stepping motors, DVM's, and multiplexors, and is interfaced through CAMAC. 4 figures

  14. Fundamentals of GPS Receivers A Hardware Approach

    CERN Document Server

    Doberstein, Dan

    2012-01-01

    While much of the current literature on GPS receivers is aimed at those intimately familiar with their workings, this volume summarizes the basic principles using as little mathematics as possible, and details the necessary specifications and circuits for constructing a GPS receiver that is accurate to within 300 meters. Dedicated sections deal with the features of the GPS signal and its data stream, the details of the receiver (using a hybrid design as exemplar), and more advanced receivers and topics including time and frequency measurements. Later segments discuss the Zarlink GPS receiver chip set, as well as providing a thorough examination of the TurboRogue receiver, one of the most accurate yet made. Guiding the reader through the concepts and circuitry, from the antenna to the solution of user position, the book’s deployment of a hybrid receiver as a basis for discussion allows for extrapolation of the core ideas to more complex, and more accurate designs. Digital methods are used, but any analogue c...

  15. An assessment of air sampling location for stack monitoring in nuclear facility

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Jung Bok [University of Science and Technology, Daejeon (Korea, Republic of); Kim, Tae Hyoung; Lee, Jong Il; Kim, Bong Hwan [Korea Atomic Energy Research Institute, Daejeon (Korea, Republic of)

    2017-06-15

    In this study, air sampling locations in the stack of the Advanced Fuel Science Building (AFSB) at the Korea Atomic Energy Research Institute (KAERI) were assessed according to the ANSI/HPS N13.1-1999 specification. The velocity profile, flow angle and 10 μm aerosol particle profile at the cross-section as functions of stack height L and stack diameter D (L/D) were assessed according to the sampling location criteria using COMSOL. The criteria for the velocity profile were found to be met at 5 L/D or more for the height, and the criteria for the average flow angle were met at all locations through this assessment. The criteria for the particle profile were met at 5 L/D and 9 L/D. However, the particle profile at the cross-section of each sampling location was found to be non-uniform. In order to establish uniformity of the particle profile, a static mixer and a perimeter ring were modeled, after which the degrees of effectiveness of these components were compared. Modeling using the static mixer indicated that the sampling locations that met the criteria for the particle profile were 5-10 L/D. When modeling using the perimeter ring, the sampling locations that met the criteria for particle profile were 5 L/D and 7-10 L/D. The criteria for the velocity profile and the average flow angle were also met at the sampling locations that met the criteria for the particle profile. The methodologies used in this study can also be applied during assessments of air sampling locations when monitoring stacks at new nuclear facilities as well as existing nuclear facilities.

  16. MRI monitoring of focused ultrasound sonications near metallic hardware.

    Science.gov (United States)

    Weber, Hans; Ghanouni, Pejman; Pascal-Tenorio, Aurea; Pauly, Kim Butts; Hargreaves, Brian A

    2018-07-01

    To explore the temperature-induced signal change in two-dimensional multi-spectral imaging (2DMSI) for fast thermometry near metallic hardware to enable MR-guided focused ultrasound surgery (MRgFUS) in patients with implanted metallic hardware. 2DMSI was optimized for temperature sensitivity and applied to monitor focus ultrasound surgery (FUS) sonications near metallic hardware in phantoms and ex vivo porcine muscle tissue. Further, we evaluated its temperature sensitivity for in vivo muscle in patients without metallic hardware. In addition, we performed a comparison of temperature sensitivity between 2DMSI and conventional proton-resonance-frequency-shift (PRFS) thermometry at different distances from metal devices and different signal-to-noise ratios (SNR). 2DMSI thermometry enabled visualization of short ultrasound sonications near metallic hardware. Calibration using in vivo muscle yielded a constant temperature sensitivity for temperatures below 43 °C. For an off-resonance coverage of ± 6 kHz, we achieved a temperature sensitivity of 1.45%/K, resulting in a minimum detectable temperature change of ∼2.5 K for an SNR of 100 with a temporal resolution of 6 s per frame. The proposed 2DMSI thermometry has the potential to allow MR-guided FUS treatments of patients with metallic hardware and therefore expand its reach to a larger patient population. Magn Reson Med 80:259-271, 2018. © 2017 International Society for Magnetic Resonance in Medicine. © 2017 International Society for Magnetic Resonance in Medicine.

  17. Compiling quantum circuits to realistic hardware architectures using temporal planners

    Science.gov (United States)

    Venturelli, Davide; Do, Minh; Rieffel, Eleanor; Frank, Jeremy

    2018-04-01

    To run quantum algorithms on emerging gate-model quantum hardware, quantum circuits must be compiled to take into account constraints on the hardware. For near-term hardware, with only limited means to mitigate decoherence, it is critical to minimize the duration of the circuit. We investigate the application of temporal planners to the problem of compiling quantum circuits to newly emerging quantum hardware. While our approach is general, we focus on compiling to superconducting hardware architectures with nearest neighbor constraints. Our initial experiments focus on compiling Quantum Alternating Operator Ansatz (QAOA) circuits whose high number of commuting gates allow great flexibility in the order in which the gates can be applied. That freedom makes it more challenging to find optimal compilations but also means there is a greater potential win from more optimized compilation than for less flexible circuits. We map this quantum circuit compilation problem to a temporal planning problem, and generated a test suite of compilation problems for QAOA circuits of various sizes to a realistic hardware architecture. We report compilation results from several state-of-the-art temporal planners on this test set. This early empirical evaluation demonstrates that temporal planning is a viable approach to quantum circuit compilation.

  18. [Abscess at the implant site following apical parodontitis. Hardware-related complications of deep brain stimulation].

    Science.gov (United States)

    Sixel-Döring, F; Trenkwalder, C; Kappus, C; Hellwig, D

    2006-08-01

    Deep brain stimulation of the subthalamic nucleus is an important treatment option for advanced stages of idiopathic Parkinson's disease, leading to significant improvement of motor symptoms in suited patients. Hardware-related complications such as technical malfunction, skin erosion, and infections however cause patient discomfort and additional expense. The patient presented here suffered a putrid infection of the impulse generator site following only local dental treatment of apical parodontitis. Therefore, prophylactic systemic antibiotic treatment is recommended for patients with implanted deep brain stimulation devices in case of operations, dental procedures, or infectious disease.

  19. IT Career JumpStart An Introduction to PC Hardware, Software, and Networking

    CERN Document Server

    Alpern, Naomi J; Muller, Randy

    2011-01-01

    A practical approach for anyone looking to enter the IT workforce Before candidates can begin to prepare for any kind of certification, they need a basic understanding of the various hardware and software components used in a computer network. Aimed at aspiring IT professionals, this invaluable book strips down a network to its bare basics, and discusses this complex topic in a clear and concise manner so that IT beginners can confidently gain an understanding of fundamental IT concepts. In addition, a base knowledge has been established so that more advanced topics and technologies can be lea

  20. HISTRAP [Heavy Ion Storage Ring for Atomic Physics] prototype hardware studies

    International Nuclear Information System (INIS)

    Olsen, D.K.; Atkins, W.H.; Dowling, D.T.; Johnson, J.W.; Lord, R.S.; McConnell, J.W.; Milner, W.T.; Mosko, S.W.; Tatum, B.A.

    1989-01-01

    HISTRAP, Heavy Ion Storage Ring for Atomic Physics, is a proposed 2.67-Tm synchrotron/cooler/storage ring optimized for advanced atomic physics research which will be injected with ions from either the HHIRF 25-MV tandem accelerator or a dedicated ECR source and RFQ linac. Over the last two years, hardware prototypes have been developed for difficult and long lead-time components. A vacuum test stand, the rf cavity, and a prototype dipole magnet have been designed, constructed, and tested. 7 refs., 8 figs., 2 tabs

  1. Hardware design and implementation of the closed-orbit feedback system at APS

    International Nuclear Information System (INIS)

    Barr, D.; Chung, Youngjoo.

    1996-01-01

    The Advanced Photon Source (APS) storage ring will utilize a closed-orbit feedback system in order to produce a more stable beam. The specified orbit measurement resolution is 25 microns for global feedback and 1 micron for local feedback. The system will sample at 4 kHz and provide a correction bandwidth of 100 Hz. At this bandwidth, standard rf BPMs will provide a resolution of 0.7 micron, while specialized miniature BPMs positioned on either side of the insertion devices for local feedback will provide a resolution of 0.2 micron (1). The measured BPM noise floor for standard BPMs is 0.06 micron per root hertz mA. Such a system has been designed, simulated, and tested on a small scale (2). This paper covers the actual hardware design and layout of the entire closed-loop system. This includes commercial hardware components, in addition to many components designed and built in-house. The paper will investigate the large-scale workings of all these devices, as well as an overall view of each piece of hardware used

  2. Stacking dependence of carrier transport properties in multilayered black phosphorous

    Science.gov (United States)

    Sengupta, A.; Audiffred, M.; Heine, T.; Niehaus, T. A.

    2016-02-01

    We present the effect of different stacking orders on carrier transport properties of multi-layer black phosphorous. We consider three different stacking orders AAA, ABA and ACA, with increasing number of layers (from 2 to 6 layers). We employ a hierarchical approach in density functional theory (DFT), with structural simulations performed with generalized gradient approximation (GGA) and the bandstructure, carrier effective masses and optical properties evaluated with the meta-generalized gradient approximation (MGGA). The carrier transmission in the various black phosphorous sheets was carried out with the non-equilibrium green’s function (NEGF) approach. The results show that ACA stacking has the highest electron and hole transmission probabilities. The results show tunability for a wide range of band-gaps, carrier effective masses and transmission with a great promise for lattice engineering (stacking order and layers) in black phosphorous.

  3. Fast principal component analysis for stacking seismic data

    Science.gov (United States)

    Wu, Juan; Bai, Min

    2018-04-01

    Stacking seismic data plays an indispensable role in many steps of the seismic data processing and imaging workflow. Optimal stacking of seismic data can help mitigate seismic noise and enhance the principal components to a great extent. Traditional average-based seismic stacking methods cannot obtain optimal performance when the ambient noise is extremely strong. We propose a principal component analysis (PCA) algorithm for stacking seismic data without being sensitive to noise level. Considering the computational bottleneck of the classic PCA algorithm in processing massive seismic data, we propose an efficient PCA algorithm to make the proposed method readily applicable for industrial applications. Two numerically designed examples and one real seismic data are used to demonstrate the performance of the presented method.

  4. Sample Stacking in capillary zone electrophoresis : Principles, advantages and limitations

    NARCIS (Netherlands)

    Beckers, J.L.; Bocek, P.

    2000-01-01

    The principles of stacking procedures are described and their properties are discussed, including the fundamentals of the behavior of zone boundaries and the consequences of the self-correcting properties of boundaries in moving boundary electrophoresis, isotachophoresis, and zone electrophoresis.

  5. DBaaS with OpenStack Trove

    CERN Document Server

    Giardini, Andrea

    2013-01-01

    The purpose of the project was to evaluate the Trove component for OpenStack, understand if it can be used with the CERN infrastructure and report the benefits and disadvantages of this software. Currently, databases for CERN projects are provided by a DbaaS software developed inside the IT-DB group. This solution works well with the actual infrastructure but it is not easy to maintain. With the migration of the CERN infrastructure to OpenStack the Database group started to evaluate the Trove component. Instead of mantaining an own DbaaS service it can be interesting to migrate everything to OpenStack and replace the actual DbaaS software with Trove. This way both virtual machines and databases will be managed by OpenStack itself.

  6. Development and preliminary experimental study on micro-stacked insulator

    International Nuclear Information System (INIS)

    Ren Chengyan; Yuan Weiqun; Zhang Dongdong; Yan Ping; Wang Jue

    2009-01-01

    High gradient insulating technology is one of the key technologies in new type dielectric wall accelerator(DWA). High gradient insulator, namely micro-stacked insulator, was developed and preliminary experimental study was done. Based on the finite element and particle simulating method, surface electric field distribution and electron movement track of micro-stacked insulator were numerated, and then the optimized design proposal was put forward. Using high temperature laminated method, we developed micro-stacked insulator samples which uses exhaustive fluorinated ethylene propylene(FEP) as dielectric layer and stainless steel as metal layer. Preliminary experiment of vacuum surface flashover in nanosecond pulse voltage was done and micro-stacked insulator exhibited favorable vacuum surface flashover performance with flashover field strength of near 180 kV/cm. (authors)

  7. Simulation of magnetization and levitation characteristics of HTS tape stacks

    Science.gov (United States)

    Anischenko, I. V.; Pokrovskii, S. V.; Mineev, N. A.

    2017-12-01

    In this work it is presented a computational model of a magnetic levitation system based on stacks of high-temperature second generation superconducting tapes (HTS) GdBa2Cu3O7-x. Calculated magnetic field and the current distributions in the system for different stacks geometries in the zero-field cooling mode are also presented. The magnetization curves of the stacks in the external field of a permanent NdFeB magnet and the levitation force dependence on the gap between the magnet and the HTS tapes stack were obtained. A model of the magnetic system, oriented to levitation application, is given. Results of modeling were compared with the experimental data.

  8. Sport stacking activities in school children's motor skill development.

    Science.gov (United States)

    Li, Yuhua; Coleman, Diane; Ransdell, Mary; Coleman, Lyndsie; Irwin, Carol

    2011-10-01

    This study examined the impact of a 12-wk. sport stacking intervention on reaction time (RT), manual dexterity, and hand-eye coordination in elementary school-aged children. 80 Grade 2 students participated in a 15-min. sport stacking practice session every school day for 12 wk., and were tested on psychomotor performance improvement. Tests for choice RT, manual dexterity, and photoelectric rotary pursuit tracking were conducted pre- and post-intervention for both experimental group (n = 36) and the controls (n = 44) who did no sport stacking. Students who had the intervention showed a greater improvement in two-choice RT. No other group difference was found. Such sport stacking activities may facilitate children's central processing and perceptual-motor integration.

  9. Stacking faults and microstructural parameters in non-mulberry silk ...

    Indian Academy of Sciences (India)

    rameters like crystal size (〈N〉), lattice strain (g) and stacking faults in polymer materials ... metal oxide compounds, but may be inadequate for describing diffraction patterns .... Further, with these model parameters for individual Bragg reflec-.

  10. Heuristic Solution Approaches to the Double TSP with Multiple Stacks

    DEFF Research Database (Denmark)

    Petersen, Hanne Løhmann

    This paper introduces the Double Travelling Salesman Problem with Multiple Stacks and presents a three different metaheuristic approaches to its solution. The Double Travelling Salesman Problem with Multiple Stacks is concerned with finding the shortest route performing pickups and deliveries in ...... are developed for the problem and used with each of the heuristics. Finally some computational results are given along with lower bounds on the objective value....

  11. Heuristic Solution Approaches to the Double TSP with Multiple Stacks

    DEFF Research Database (Denmark)

    Petersen, Hanne Løhmann

    2006-01-01

    This paper introduces the Double Travelling Salesman Problem with Multiple Stacks and presents a three different metaheuristic approaches to its solution. The Double Travelling Salesman Problem with Multiple Stacks is concerned with finding the shortest route performing pickups and deliveries in ...... are developed for the problem and used with each of the heuristics. Finally some computational results are given along with lower bounds on the objective value....

  12. Modeling of a Stacked Power Module for Parasitic Inductance Extraction

    Science.gov (United States)

    2017-09-15

    ARL-TR-8138 ● SEP 2017 US Army Research Laboratory Modeling of a Stacked Power Module for Parasitic Inductance Extraction by...not return it to the originator. ARL-TR-8138 ● SEP 2017 US Army Research Laboratory Modeling of a Stacked Power Module for... Power Module for Parasitic Inductance Extraction 5a. CONTRACT NUMBER 5b. GRANT NUMBER 5c. PROGRAM ELEMENT NUMBER 6. AUTHOR(S) Steven Kaplan

  13. Field-induced stacking transition of biofunctionalized trilayer graphene

    Energy Technology Data Exchange (ETDEWEB)

    Masato Nakano, C. [Flintridge Preparatory School, La Canada, California 91011 (United States); Sajib, Md Symon Jahan; Samieegohar, Mohammadreza; Wei, Tao [Dan F. Smith Department of Chemical Engineering, Lamar University, Beaumont, Texas 77710 (United States)

    2016-02-01

    Trilayer graphene (TLG) is attracting a lot of attention as their stacking structures (i.e., rhombohedral vs. Bernal) drastically affect electronic and optical properties. Based on full-atom molecular dynamics simulations, we here predict electric field-induced rhombohedral-to-Bernal transition of TLG tethered with proteins. Furthermore, our simulations show that protein's electrophoretic mobility and diffusivity are enhanced on TLG surface. This phenomenon of controllable TLG stacking transition will contribute to various applications including biosensing.

  14. Reexamination of the ISABELLE box car stacking scheme

    International Nuclear Information System (INIS)

    Chasman, R.

    1975-01-01

    Box car stacking of ISABELLE after acceleration of the fundamental frequency in the AGS is reviewed with the present ISABELLE parameters and examined with regard to longitudinal impedence requirements. The scheme results in an impedance tolerance of Z/n less than or equal to 30 Ω compared to Z/n less than or equal to 5 Ω obtained for rf stacking. However, to meet the claimed luminosity, the AGS performance demands are increased above those assumed in the ISABELLE proposal

  15. National Spherical Torus Experiment (NSTX) Center Stack Upgrade

    International Nuclear Information System (INIS)

    Neumeyer, C.; Avasarala, S.; Chrzanowski, J.; Dudek, L.; Fan, H.; Hatcher, H.; Heitzenroeder, P.; Menard, J.; Ono, M.; Ramakrishnan, S.; Titus, P.; Woolley, R.; Zhan, H.

    2009-01-01

    The purpose of the NSTX Center Stack Upgrade project is to expand the NSTX operational space and thereby the physics basis for next-step ST facilities. The plasma aspect ratio (ratio of plasma major to minor radius) of the upgrade is increased to 1.5 from the original value of 1.26, which increases the cross sectional area of the center stack by a factor of ∼ 3 and makes possible higher levels of performance and pulse duration.

  16. LOFT diesel generator ''A'' exhaust stack seismic analysis

    International Nuclear Information System (INIS)

    Blandford, R.K.

    1978-01-01

    A stress analysis of the LOFT Diesel Generator ''A'' Exhaust Stack was performed to determine its reaction to Safe-Shutdown Earthquake loads. The exhaust stack silencer and supporting foundation was found to be inadequate for the postulated seismic accelerations. Lateral support is required to prevent overturning of the silencer pedestal and reinforcement of the 4'' x 0.5'' silencer base straps is necessary. Basic requirements for this additional support are discussed

  17. Measurements of proton energy spectra using a radiochromic film stack

    Science.gov (United States)

    Filkins, T. M.; Steidle, Jessica; Ellison, D. M.; Steidle, Jeffrey; Freeman, C. G.; Padalino, S. J.; Fiksel, G.; Regan, S. P.; Sangster, T. C.

    2014-10-01

    The energy spectrum of protons accelerated from the rear-side of a thin foil illuminated with ultra-intense laser light from the OMEGA EP laser system at the University of Rochester's Laboratory for Laser Energetics (LLE) was measured using a stack of radiochromic film (RCF). The film stack consisted of four layers of Gafchromic HD-V2 film and four layers of Gafchromic MD-V2-55 film. Aluminum foils of various thicknesses were placed between each piece of RCF in the stack. This arrangement allowed protons with energies of 30 MeV to reach the back layer of RCF in the stack. The stack was placed in the detector plane of a Thomson parabola ion energy (TPIE) spectrometer. Each piece of film in the stack was scanned using a commercially available flat-bed scanner (Epson 10000XL). The resulting optical density was converted into proton fluence using an absolute calibration of the RCF obtained at the SUNY Geneseo 1.7 MV Pelletron accelerator laboratory. In these calibration measurements, the sensitivity of the radiochromic film was measured using monoenergetic protons produced by the accelerator. Details of the analysis procedure and the resulting proton energy spectra will be presented. Funded in part by a grant from the DOE through the Laboratory for Laser Energetics.

  18. Iridium Interfacial Stack - IrIS

    Science.gov (United States)

    Spry, David

    2012-01-01

    Iridium Interfacial Stack (IrIS) is the sputter deposition of high-purity tantalum silicide (TaSi2-400 nm)/platinum (Pt-200 nm)/iridium (Ir-200 nm)/platinum (Pt-200 nm) in an ultra-high vacuum system followed by a 600 C anneal in nitrogen for 30 minutes. IrIS simultaneously acts as both a bond metal and a diffusion barrier. This bondable metallization that also acts as a diffusion barrier can prevent oxygen from air and gold from the wire-bond from infiltrating silicon carbide (SiC) monolithically integrated circuits (ICs) operating above 500 C in air for over 1,000 hours. This TaSi2/Pt/Ir/Pt metallization is easily bonded for electrical connection to off-chip circuitry and does not require extra anneals or masking steps. There are two ways that IrIS can be used in SiC ICs for applications above 500 C: it can be put directly on a SiC ohmic contact metal, such as Ti, or be used as a bond metal residing on top of an interconnect metal. For simplicity, only the use as a bond metal is discussed. The layer thickness ratio of TaSi2 to the first Pt layer deposited thereon should be 2:1. This will allow Si from the TaSi2 to react with the Pt to form Pt2Si during the 600 C anneal carried out after all layers have been deposited. The Ir layer does not readily form a silicide at 600 C, and thereby prevents the Si from migrating into the top-most Pt layer during future anneals and high-temperature IC operation. The second (i.e., top-most) deposited Pt layer needs to be about 200 nm to enable easy wire bonding. The thickness of 200 nm for Ir was chosen for initial experiments; further optimization of the Ir layer thickness may be possible via further experimentation. Ir itself is not easily wire-bonded because of its hardness and much higher melting point than Pt. Below the iridium layer, the TaSi2 and Pt react and form desired Pt2Si during the post-deposition anneal while above the iridium layer remains pure Pt as desired to facilitate easy and strong wire-bonding to the Si

  19. Advanced Hydrogen Turbine Development

    Energy Technology Data Exchange (ETDEWEB)

    Marra, John [Siemens Energy, Inc., Orlando, FL (United States)

    2015-09-30

    Under the sponsorship of the U.S. Department of Energy (DOE) National Energy Technology Laboratories, Siemens has completed the Advanced Hydrogen Turbine Development Program to develop an advanced gas turbine for incorporation into future coal-based Integrated Gasification Combined Cycle (IGCC) plants. All the scheduled DOE Milestones were completed and significant technical progress was made in the development of new technologies and concepts. Advanced computer simulations and modeling, as well as subscale, full scale laboratory, rig and engine testing were utilized to evaluate and select concepts for further development. Program Requirements of: A 3 to 5 percentage point improvement in overall plant combined cycle efficiency when compared to the reference baseline plant; 20 to 30 percent reduction in overall plant capital cost when compared to the reference baseline plant; and NOx emissions of 2 PPM out of the stack. were all met. The program was completed on schedule and within the allotted budget

  20. Laser light scattering instrument advanced technology development

    Science.gov (United States)

    Wallace, J. F.

    1993-01-01

    The objective of this advanced technology development (ATD) project has been to provide sturdy, miniaturized laser light scattering (LLS) instrumentation for use in microgravity experiments. To do this, we assessed user requirements, explored the capabilities of existing and prospective laser light scattering hardware, and both coordinated and participated in the hardware and software advances needed for a flight hardware instrument. We have successfully breadboarded and evaluated an engineering version of a single-angle glove-box instrument which uses solid state detectors and lasers, along with fiber optics, for beam delivery and detection. Additionally, we have provided the specifications and written verification procedures necessary for procuring a miniature multi-angle LLS instrument which will be used by the flight hardware project which resulted from this work and from this project's interaction with the laser light scattering community.

  1. Flight Hardware Virtualization for On-Board Science Data Processing Project

    Data.gov (United States)

    National Aeronautics and Space Administration — Utilize Hardware Virtualization technology to benefit on-board science data processing by investigating new real time embedded Hardware Virtualization solutions and...

  2. Fast DRR splat rendering using common consumer graphics hardware

    International Nuclear Information System (INIS)

    Spoerk, Jakob; Bergmann, Helmar; Wanschitz, Felix; Dong, Shuo; Birkfellner, Wolfgang

    2007-01-01

    Digitally rendered radiographs (DRR) are a vital part of various medical image processing applications such as 2D/3D registration for patient pose determination in image-guided radiotherapy procedures. This paper presents a technique to accelerate DRR creation by using conventional graphics hardware for the rendering process. DRR computation itself is done by an efficient volume rendering method named wobbled splatting. For programming the graphics hardware, NVIDIAs C for Graphics (Cg) is used. The description of an algorithm used for rendering DRRs on the graphics hardware is presented, together with a benchmark comparing this technique to a CPU-based wobbled splatting program. Results show a reduction of rendering time by about 70%-90% depending on the amount of data. For instance, rendering a volume of 2x10 6 voxels is feasible at an update rate of 38 Hz compared to 6 Hz on a common Intel-based PC using the graphics processing unit (GPU) of a conventional graphics adapter. In addition, wobbled splatting using graphics hardware for DRR computation provides higher resolution DRRs with comparable image quality due to special processing characteristics of the GPU. We conclude that DRR generation on common graphics hardware using the freely available Cg environment is a major step toward 2D/3D registration in clinical routine

  3. An open-source wireless sensor stack: from Arduino to SDI-12 to Water One Flow

    Science.gov (United States)

    Hicks, S.; Damiano, S. G.; Smith, K. M.; Olexy, J.; Horsburgh, J. S.; Mayorga, E.; Aufdenkampe, A. K.

    2013-12-01

    Implementing a large-scale streaming environmental sensor network has previously been limited by the high cost of the datalogging and data communication infrastructure. The Christina River Basin Critical Zone Observatory (CRB-CZO) is overcoming the obstacles to large near-real-time data collection networks by using Arduino, an open source electronics platform, in combination with XBee ZigBee wireless radio modules. These extremely low-cost and easy-to-use open source electronics are at the heart of the new DIY movement and have provided solutions to countless projects by over half a million users worldwide. However, their use in environmental sensing is in its infancy. At present a primary limitation to widespread deployment of open-source electronics for environmental sensing is the lack of a simple, open-source software stack to manage streaming data from heterogeneous sensor networks. Here we present a functioning prototype software stack that receives sensor data over a self-meshing ZigBee wireless network from over a hundred sensors, stores the data locally and serves it on demand as a CUAHSI Water One Flow (WOF) web service. We highlight a few new, innovative components, including: (1) a versatile open data logger design based the Arduino electronics platform and ZigBee radios; (2) a software library implementing SDI-12 communication protocol between any Arduino platform and SDI12-enabled sensors without the need for additional hardware (https://github.com/StroudCenter/Arduino-SDI-12); and (3) 'midStream', a light-weight set of Python code that receives streaming sensor data, appends it with metadata on the fly by querying a relational database structured on an early version of the Observations Data Model version 2.0 (ODM2), and uses the WOFpy library to serve the data as WaterML via SOAP and REST web services.

  4. Forward and adjoint spectral-element simulations of seismic wave propagation using hardware accelerators

    Science.gov (United States)

    Peter, Daniel; Videau, Brice; Pouget, Kevin; Komatitsch, Dimitri

    2015-04-01

    Improving the resolution of tomographic images is crucial to answer important questions on the nature of Earth's subsurface structure and internal processes. Seismic tomography is the most prominent approach where seismic signals from ground-motion records are used to infer physical properties of internal structures such as compressional- and shear-wave speeds, anisotropy and attenuation. Recent advances in regional- and global-scale seismic inversions move towards full-waveform inversions which require accurate simulations of seismic wave propagation in complex 3D media, providing access to the full 3D seismic wavefields. However, these numerical simulations are computationally very expensive and need high-performance computing (HPC) facilities for further improving the current state of knowledge. During recent years, many-core architectures such as graphics processing units (GPUs) have been added to available large HPC systems. Such GPU-accelerated computing together with advances in multi-core central processing units (CPUs) can greatly accelerate scientific applications. There are mainly two possible choices of language support for GPU cards, the CUDA programming environment and OpenCL language standard. CUDA software development targets NVIDIA graphic cards while OpenCL was adopted mainly by AMD graphic cards. In order to employ such hardware accelerators for seismic wave propagation simulations, we incorporated a code generation tool BOAST into an existing spectral-element code package SPECFEM3D_GLOBE. This allows us to use meta-programming of computational kernels and generate optimized source code for both CUDA and OpenCL languages, running simulations on either CUDA or OpenCL hardware accelerators. We show here applications of forward and adjoint seismic wave propagation on CUDA/OpenCL GPUs, validating results and comparing performances for different simulations and hardware usages.

  5. Huffman coding in advanced audio coding standard

    Science.gov (United States)

    Brzuchalski, Grzegorz

    2012-05-01

    This article presents several hardware architectures of Advanced Audio Coding (AAC) Huffman noiseless encoder, its optimisations and working implementation. Much attention has been paid to optimise the demand of hardware resources especially memory size. The aim of design was to get as short binary stream as possible in this standard. The Huffman encoder with whole audio-video system has been implemented in FPGA devices.

  6. Thermal stress analysis of a planar SOFC stack

    Science.gov (United States)

    Lin, Chih-Kuang; Chen, Tsung-Ting; Chyou, Yau-Pin; Chiang, Lieh-Kwang

    The aim of this study is, by using finite element analysis (FEA), to characterize the thermal stress distribution in a planar solid oxide fuel cell (SOFC) stack during various stages. The temperature profiles generated by an integrated thermo-electrochemical model were applied to calculate the thermal stress distributions in a multiple-cell SOFC stack by using a three-dimensional (3D) FEA model. The constructed 3D FEA model consists of the complete components used in a practical SOFC stack, including positive electrode-electrolyte-negative electrode (PEN) assembly, interconnect, nickel mesh, and gas-tight glass-ceramic seals. Incorporation of the glass-ceramic sealant, which was never considered in previous studies, into the 3D FEA model would produce more realistic results in thermal stress analysis and enhance the reliability of predicting potential failure locations in an SOFC stack. The effects of stack support condition, viscous behavior of the glass-ceramic sealant, temperature gradient, and thermal expansion mismatch between components were characterized. Modeling results indicated that a change in the support condition at the bottom frame of the SOFC stack would not cause significant changes in thermal stress distribution. Thermal stress distribution did not differ significantly in each unit cell of the multiple-cell stack due to a comparable in-plane temperature profile. By considering the viscous characteristics of the glass-ceramic sealant at temperatures above the glass-transition temperature, relaxation of thermal stresses in the PEN was predicted. The thermal expansion behavior of the metallic interconnect/frame had a greater influence on the thermal stress distribution in the PEN than did that of the glass-ceramic sealant due to the domination of interconnect/frame in the volume of a planar SOFC assembly.

  7. Shielded battery syndrome: a new hardware complication of deep brain stimulation.

    Science.gov (United States)

    Chelvarajah, Ramesh; Lumsden, Daniel; Kaminska, Margaret; Samuel, Michael; Hulse, Natasha; Selway, Richard P; Lin, Jean-Pierre; Ashkan, Keyoumars

    2012-01-01

    Deep brain stimulation hardware is constantly advancing. The last few years have seen the introduction of rechargeable cell technology into the implanted pulse generator design, allowing for longer battery life and fewer replacement operations. The Medtronic® system requires an additional pocket adaptor when revising a non-rechargeable battery such as their Kinetra® to their rechargeable Activa® RC. This additional hardware item can, if it migrates superficially, become an impediment to the recharging of the battery and negate the intended technological advance. To report the emergence of the 'shielded battery syndrome', which has not been previously described. We reviewed our deep brain stimulation database to identify cases of recharging difficulties reported by patients with Activa RC implanted pulse generators. Two cases of shielded battery syndrome were identified. The first required surgery to reposition the adaptor to the deep aspect of the subcutaneous pocket. In the second case, it was possible to perform external manual manipulation to restore the adaptor to its original position deep to the battery. We describe strategies to minimise the occurrence of the shielded battery syndrome and advise vigilance in all patients who experience difficulty with recharging after replacement surgery of this type for the implanted pulse generator. Copyright © 2012 S. Karger AG, Basel.

  8. FPGA hardware acceleration for high performance neutron transport computation based on agent methodology - 318

    International Nuclear Information System (INIS)

    Shanjie, Xiao; Tatjana, Jevremovic

    2010-01-01

    The accurate, detailed and 3D neutron transport analysis for Gen-IV reactors is still time-consuming regardless of advanced computational hardware available in developed countries. This paper introduces a new concept in addressing the computational time while persevering the detailed and accurate modeling; a specifically designed FPGA co-processor accelerates robust AGENT methodology for complex reactor geometries. For the first time this approach is applied to accelerate the neutronics analysis. The AGENT methodology solves neutron transport equation using the method of characteristics. The AGENT methodology performance was carefully analyzed before the hardware design based on the FPGA co-processor was adopted. The most time-consuming kernel part is then transplanted into the FPGA co-processor. The FPGA co-processor is designed with data flow-driven non von-Neumann architecture and has much higher efficiency than the conventional computer architecture. Details of the FPGA co-processor design are introduced and the design is benchmarked using two different examples. The advanced chip architecture helps the FPGA co-processor obtaining more than 20 times speed up with its working frequency much lower than the CPU frequency. (authors)

  9. Advanced computers and simulation

    International Nuclear Information System (INIS)

    Ryne, R.D.

    1993-01-01

    Accelerator physicists today have access to computers that are far more powerful than those available just 10 years ago. In the early 1980's, desktop workstations performed less one million floating point operations per second (Mflops), and the realized performance of vector supercomputers was at best a few hundred Mflops. Today vector processing is available on the desktop, providing researchers with performance approaching 100 Mflops at a price that is measured in thousands of dollars. Furthermore, advances in Massively Parallel Processors (MPP) have made performance of over 10 gigaflops a reality, and around mid-decade MPPs are expected to be capable of teraflops performance. Along with advances in MPP hardware, researchers have also made significant progress in developing algorithms and software for MPPS. These changes have had, and will continue to have, a significant impact on the work of computational accelerator physicists. Now, instead of running particle simulations with just a few thousand particles, we can perform desktop simulations with tens of thousands of simulation particles, and calculations with well over 1 million particles are being performed on MPPs. In the area of computational electromagnetics, simulations that used to be performed only on vector supercomputers now run in several hours on desktop workstations, and researchers are hoping to perform simulations with over one billion mesh points on future MPPs. In this paper we will discuss the latest advances, and what can be expected in the near future, in hardware, software and applications codes for advanced simulation of particle accelerators

  10. Hardware Realization of Chaos-based Symmetric Video Encryption

    KAUST Repository

    Ibrahim, Mohamad A.

    2013-05-01

    This thesis reports original work on hardware realization of symmetric video encryption using chaos-based continuous systems as pseudo-random number generators. The thesis also presents some of the serious degradations caused by digitally implementing chaotic systems. Subsequently, some techniques to eliminate such defects, including the ultimately adopted scheme are listed and explained in detail. Moreover, the thesis describes original work on the design of an encryption system to encrypt MPEG-2 video streams. Information about the MPEG-2 standard that fits this design context is presented. Then, the security of the proposed system is exhaustively analyzed and the performance is compared with other reported systems, showing superiority in performance and security. The thesis focuses more on the hardware and the circuit aspect of the system’s design. The system is realized on Xilinx Vetrix-4 FPGA with hardware parameters and throughput performance surpassing conventional encryption systems.

  11. Asymmetric Hardware Distortions in Receive Diversity Systems: Outage Performance Analysis

    KAUST Repository

    Javed, Sidrah; Amin, Osama; Ikki, Salama S.; Alouini, Mohamed-Slim

    2017-01-01

    This paper studies the impact of asymmetric hardware distortion (HWD) on the performance of receive diversity systems using linear and switched combining receivers. The asymmetric attribute of the proposed model motivates the employment of improper Gaussian signaling (IGS) scheme rather than the traditional proper Gaussian signaling (PGS) scheme. The achievable rate performance is analyzed for the ideal and non-ideal hardware scenarios using PGS and IGS transmission schemes for different combining receivers. In addition, the IGS statistical characteristics are optimized to maximize the achievable rate performance. Moreover, the outage probability performance of the receive diversity systems is analyzed yielding closed form expressions for both PGS and IGS based transmission schemes. HWD systems that employ IGS is proven to efficiently combat the self interference caused by the HWD. Furthermore, the obtained analytic expressions are validated through Monte-Carlo simulations. Eventually, non-ideal hardware transceivers degradation and IGS scheme acquired compensation are quantified through suitable numerical results.

  12. Hardware controls for the STAR experiment at RHIC

    International Nuclear Information System (INIS)

    Reichhold, D.; Bieser, F.; Bordua, M.; Cherney, M.; Chrin, J.; Dunlop, J.C.; Ferguson, M.I.; Ghazikhanian, V.; Gross, J.; Harper, G.; Howe, M.; Jacobson, S.; Klein, S.R.; Kravtsov, P.; Lewis, S.; Lin, J.; Lionberger, C.; LoCurto, G.; McParland, C.; McShane, T.; Meier, J.; Sakrejda, I.; Sandler, Z.; Schambach, J.; Shi, Y.; Willson, R.; Yamamoto, E.; Zhang, W.

    2003-01-01

    The STAR detector sits in a high radiation area when operating normally; therefore it was necessary to develop a robust system to remotely control all hardware. The STAR hardware controls system monitors and controls approximately 14,000 parameters in the STAR detector. Voltages, currents, temperatures, and other parameters are monitored. Effort has been minimized by the adoption of experiment-wide standards and the use of pre-packaged software tools. The system is based on the Experimental Physics and Industrial Control System (EPICS) . VME processors communicate with subsystem-based sensors over a variety of field busses, with High-level Data Link Control (HDLC) being the most prevalent. Other features of the system include interfaces to accelerator and magnet control systems, a web-based archiver, and C++-based communication between STAR online, run control and hardware controls and their associated databases. The system has been designed for easy expansion as new detector elements are installed in STAR

  13. Plutonium Protection System (PPS). Volume 2. Hardware description. Final report

    International Nuclear Information System (INIS)

    Miyoshi, D.S.

    1979-05-01

    The Plutonium Protection System (PPS) is an integrated safeguards system developed by Sandia Laboratories for the Department of Energy, Office of Safeguards and Security. The system is designed to demonstrate and test concepts for the improved safeguarding of plutonium. Volume 2 of the PPS final report describes the hardware elements of the system. The major areas containing hardware elements are the vault, where plutonium is stored, the packaging room, where plutonium is packaged into Container Modules, the Security Operations Center, which controls movement of personnel, the Material Accountability Center, which maintains the system data base, and the Material Operations Center, which monitors the operating procedures in the system. References are made to documents in which details of the hardware items can be found

  14. Asymmetric Hardware Distortions in Receive Diversity Systems: Outage Performance Analysis

    KAUST Repository

    Javed, Sidrah

    2017-02-22

    This paper studies the impact of asymmetric hardware distortion (HWD) on the performance of receive diversity systems using linear and switched combining receivers. The asymmetric attribute of the proposed model motivates the employment of improper Gaussian signaling (IGS) scheme rather than the traditional proper Gaussian signaling (PGS) scheme. The achievable rate performance is analyzed for the ideal and non-ideal hardware scenarios using PGS and IGS transmission schemes for different combining receivers. In addition, the IGS statistical characteristics are optimized to maximize the achievable rate performance. Moreover, the outage probability performance of the receive diversity systems is analyzed yielding closed form expressions for both PGS and IGS based transmission schemes. HWD systems that employ IGS is proven to efficiently combat the self interference caused by the HWD. Furthermore, the obtained analytic expressions are validated through Monte-Carlo simulations. Eventually, non-ideal hardware transceivers degradation and IGS scheme acquired compensation are quantified through suitable numerical results.

  15. Maturing of SOFC cell and stack production technology and preparation for demonstration of SOFC stacks. Part 2

    Energy Technology Data Exchange (ETDEWEB)

    2006-07-01

    The TOFC/Riso pilot plant production facility for the manufacture of anode-supported cells has been further up-scaled with an automated continuous spraying process and an extra sintering capacity resulting in production capacity exceeding 15,000 standard cells (12x12 cm2) in 2006 with a success rate of about 85% in the cell production. All processing steps such as tape-casting, spraying, screen-printing and atmospheric air sintering in the cell production have been selected on condition that up-scaling and cost effective, flexible, industrial mass production are feasible. The standard cell size is currently being increased to 18x18 cm2, and 150 cells of this size have been produced in 2006 for our further stack development. To improve quality and lower production cost, a new screen printing line is under establishment. TOFC's stack design is an ultra compact multilayer assembly of cells (including contact layers), metallic interconnects, spacer frames and glass seals. The compactness ensures minimized material consumption and low cost. Standard stacks with cross flow configuration contains 75 cells (12x12cm2) delivering about 1.2 kW at optimal operation conditions with pre-reformed NG as fuel. Stable performance has been demonstrated for 500-1000 hours. Significantly improved materials, especially concerning the metallic interconnect and the coatings have been introduced during the last year. Small stacks (5-10 cells) exhibit no detectable stack degradation using our latest cells and stack materials during test periods of 500-1000 hours. Larger stacks (50-75 cells) suffer from mal-distribution of gas and air inside the stacks, gas leakage, gas cross-over, pressure drop, and a certain loss of internal electrical contact during operation cycles. Measures have been taken to find solutions during the following development work. The stack production facilities have been improved and up-scaled. In 2006, 5 standard stacks have been assembled and burned in based on

  16. Optimized hardware design for the divertor remote handling control system

    Energy Technology Data Exchange (ETDEWEB)

    Saarinen, Hannu [Tampere University of Technology, Korkeakoulunkatu 6, 33720 Tampere (Finland)], E-mail: hannu.saarinen@tut.fi; Tiitinen, Juha; Aha, Liisa; Muhammad, Ali; Mattila, Jouni; Siuko, Mikko; Vilenius, Matti [Tampere University of Technology, Korkeakoulunkatu 6, 33720 Tampere (Finland); Jaervenpaeae, Jorma [VTT Systems Engineering, Tekniikankatu 1, 33720 Tampere (Finland); Irving, Mike; Damiani, Carlo; Semeraro, Luigi [Fusion for Energy, Josep Pla 2, Torres Diagonal Litoral B3, 08019 Barcelona (Spain)

    2009-06-15

    A key ITER maintenance activity is the exchange of the divertor cassettes. One of the major focuses of the EU Remote Handling (RH) programme has been the study and development of the remote handling equipment necessary for divertor exchange. The current major step in this programme involves the construction of a full scale physical test facility, namely DTP2 (Divertor Test Platform 2), in which to demonstrate and refine the RH equipment designs for ITER using prototypes. The major objective of the DTP2 project is the proof of concept studies of various RH devices, but is also important to define principles for standardizing control hardware and methods around the ITER maintenance equipment. This paper focuses on describing the control system hardware design optimization that is taking place at DTP2. Here there will be two RH movers, namely the Cassette Multifuctional Mover (CMM), Cassette Toroidal Mover (CTM) and assisting water hydraulic force feedback manipulators (WHMAN) located aboard each Mover. The idea here is to use common Real Time Operating Systems (RTOS), measurement and control IO-cards etc. for all maintenance devices and to standardize sensors and control components as much as possible. In this paper, new optimized DTP2 control system hardware design and some initial experimentation with the new DTP2 RH control system platform are presented. The proposed new approach is able to fulfil the functional requirements for both Mover and Manipulator control systems. Since the new control system hardware design has reduced architecture there are a number of benefits compared to the old approach. The simplified hardware solution enables the use of a single software development environment and a single communication protocol. This will result in easier maintainability of the software and hardware, less dependence on trained personnel, easier training of operators and hence reduced the development costs of ITER RH.

  17. Electrical, electronics, and digital hardware essentials for scientists and engineers

    CERN Document Server

    Lipiansky, Ed

    2012-01-01

    A practical guide for solving real-world circuit board problems Electrical, Electronics, and Digital Hardware Essentials for Scientists and Engineers arms engineers with the tools they need to test, evaluate, and solve circuit board problems. It explores a wide range of circuit analysis topics, supplementing the material with detailed circuit examples and extensive illustrations. The pros and cons of various methods of analysis, fundamental applications of electronic hardware, and issues in logic design are also thoroughly examined. The author draws on more than tw

  18. Automating an EXAFS facility: hardware and software considerations

    International Nuclear Information System (INIS)

    Georgopoulos, P.; Sayers, D.E.; Bunker, B.; Elam, T.; Grote, W.A.

    1981-01-01

    The basic design considerations for computer hardware and software, applicable not only to laboratory EXAFS facilities, but also to synchrotron installations, are reviewed. Uniformity and standardization of both hardware configurations and program packages for data collection and analysis are heavily emphasized. Specific recommendations are made with respect to choice of computers, peripherals, and interfaces, and guidelines for the development of software packages are set forth. A description of two working computer-interfaced EXAFS facilities is presented which can serve as prototypes for future developments. 3 figures

  19. Surface moisture measurement system hardware acceptance test report

    Energy Technology Data Exchange (ETDEWEB)

    Ritter, G.A., Westinghouse Hanford

    1996-05-28

    This document summarizes the results of the hardware acceptance test for the Surface Moisture Measurement System (SMMS). This test verified that the mechanical and electrical features of the SMMS functioned as designed and that the unit is ready for field service. The bulk of hardware testing was performed at the 306E Facility in the 300 Area and the Fuels and Materials Examination Facility in the 400 Area. The SMMS was developed primarily in support of Tank Waste Remediation System (TWRS) Safety Programs for moisture measurement in organic and ferrocyanide watch list tanks.

  20. Computer organization and design the hardware/software interface

    CERN Document Server

    Hennessy, John L

    1994-01-01

    Computer Organization and Design: The Hardware/Software Interface presents the interaction between hardware and software at a variety of levels, which offers a framework for understanding the fundamentals of computing. This book focuses on the concepts that are the basis for computers.Organized into nine chapters, this book begins with an overview of the computer revolution. This text then explains the concepts and algorithms used in modern computer arithmetic. Other chapters consider the abstractions and concepts in memory hierarchies by starting with the simplest possible cache. This book di