WorldWideScience

Sample records for accurate analog circuits

  1. Intuitive analog circuit design

    CERN Document Server

    Thompson, Marc

    2013-01-01

    Intuitive Analog Circuit Design outlines ways of thinking about analog circuits and systems that let you develop a feel for what a good, working analog circuit design should be. This book reflects author Marc Thompson's 30 years of experience designing analog and power electronics circuits and teaching graduate-level analog circuit design, and is the ideal reference for anyone who needs a straightforward introduction to the subject. In this book, Dr. Thompson describes intuitive and ""back-of-the-envelope"" techniques for designing and analyzing analog circuits, including transistor amplifi

  2. Analog circuit design

    CERN Document Server

    Dobkin, Bob

    2012-01-01

    Analog circuit and system design today is more essential than ever before. With the growth of digital systems, wireless communications, complex industrial and automotive systems, designers are being challenged to develop sophisticated analog solutions. This comprehensive source book of circuit design solutions aids engineers with elegant and practical design techniques that focus on common analog challenges. The book's in-depth application examples provide insight into circuit design and application solutions that you can apply in today's demanding designs. <

  3. Troubleshooting analog circuits

    CERN Document Server

    Pease, Robert A

    1991-01-01

    Troubleshooting Analog Circuits is a guidebook for solving product or process related problems in analog circuits. The book also provides advice in selecting equipment, preventing problems, and general tips. The coverage of the book includes the philosophy of troubleshooting; the modes of failure of various components; and preventive measures. The text also deals with the active components of analog circuits, including diodes and rectifiers, optically coupled devices, solar cells, and batteries. The book will be of great use to both students and practitioners of electronics engineering. Other

  4. ESD analog circuits and design

    CERN Document Server

    Voldman, Steven H

    2014-01-01

    A comprehensive and in-depth review of analog circuit layout, schematic architecture, device, power network and ESD design This book will provide a balanced overview of analog circuit design layout, analog circuit schematic development, architecture of chips, and ESD design.  It will start at an introductory level and will bring the reader right up to the state-of-the-art. Two critical design aspects for analog and power integrated circuits are combined. The first design aspect covers analog circuit design techniques to achieve the desired circuit performance. The second and main aspect pres

  5. Analog circuits cookbook

    CERN Document Server

    Hickman, Ian

    2013-01-01

    Analog Circuits Cookbook presents articles about advanced circuit techniques, components and concepts, useful IC for analog signal processing in the audio range, direct digital synthesis, and ingenious video op-amp. The book also includes articles about amplitude measurements on RF signals, linear optical imager, power supplies and devices, and RF circuits and techniques. Professionals and students of electrical engineering will find the book informative and useful.

  6. Electrical Circuits and Water Analogies

    Science.gov (United States)

    Smith, Frederick A.; Wilson, Jerry D.

    1974-01-01

    Briefly describes water analogies for electrical circuits and presents plans for the construction of apparatus to demonstrate these analogies. Demonstrations include series circuits, parallel circuits, and capacitors. (GS)

  7. CMOS analog circuit design

    CERN Document Server

    Allen, Phillip E

    1987-01-01

    This text presents the principles and techniques for designing analog circuits to be implemented in a CMOS technology. The level is appropriate for seniors and graduate students familiar with basic electronics, including biasing, modeling, circuit analysis, and some familiarity with frequency response. Students learn the methodology of analog integrated circuit design through a hierarchically-oriented approach to the subject that provides thorough background and practical guidance for designing CMOS analog circuits, including modeling, simulation, and testing. The authors' vast industrial experience and knowledge is reflected in the circuits, techniques, and principles presented. They even identify the many common pitfalls that lie in the path of the beginning designer--expert advice from veteran designers. The text mixes the academic and practical viewpoints in a treatment that is neither superficial nor overly detailed, providing the perfect balance.

  8. Advances in Analog Circuit Design 2015

    CERN Document Server

    Baschirotto, Andrea; Harpe, Pieter

    2016-01-01

    This book is based on the 18 tutorials presented during the 24th workshop on Advances in Analog Circuit Design. Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, including low-power and energy-efficient analog electronics, with specific contributions focusing on the design of efficient sensor interfaces and low-power RF systems. This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development. ·         Provides a state-of-the-art reference in analog circuit design, written by experts from industry and academia; ·         Presents material in a tutorial-based format; ·         Includes coverage of high-performance analog-to-digital and digital to analog converters, integrated circuit design in scaled technologies, and time-domain signal processing.

  9. Analog circuit design art, science, and personalities

    CERN Document Server

    Williams, Jim

    1991-01-01

    Analog Circuit Design: Art, Science, and Personalities discusses the many approaches and styles in the practice of analog circuit design. The book is written in an informal yet informative manner, making it easily understandable to those new in the field. The selection covers the definition, history, current practice, and future direction of analog design; the practice proper; and the styles in analog circuit design. The book also includes the problems usually encountered in analog circuit design; approach to feedback loop design; and other different techniques and applications. The text is

  10. Single-event transients (SET) in analog circuits

    International Nuclear Information System (INIS)

    Chen Panxun; Zhou Kaiming

    2006-01-01

    A new phenomenon of single- event upset is introduced. The transient signal is produced in the output of analog circuits after a heavy ion strikes. The transient upset can influence the circuit connected with the output of analog circuits. For example, the output of operational amplifier can be connected with the input of a digital counter, and the pulse of sufficiently high transient output induced by an ion can increase counts of the counter. On the other hand, the transient voltage signal at the output of analog circuits can change the stage of other circuits. (authors)

  11. Synthetic Biology: A Unifying View and Review Using Analog Circuits.

    Science.gov (United States)

    Teo, Jonathan J Y; Woo, Sung Sik; Sarpeshkar, Rahul

    2015-08-01

    We review the field of synthetic biology from an analog circuits and analog computation perspective, focusing on circuits that have been built in living cells. This perspective is well suited to pictorially, symbolically, and quantitatively representing the nonlinear, dynamic, and stochastic (noisy) ordinary and partial differential equations that rigorously describe the molecular circuits of synthetic biology. This perspective enables us to construct a canonical analog circuit schematic that helps unify and review the operation of many fundamental circuits that have been built in synthetic biology at the DNA, RNA, protein, and small-molecule levels over nearly two decades. We review 17 circuits in the literature as particular examples of feedforward and feedback analog circuits that arise from special topological cases of the canonical analog circuit schematic. Digital circuit operation of these circuits represents a special case of saturated analog circuit behavior and is automatically incorporated as well. Many issues that have prevented synthetic biology from scaling are naturally represented in analog circuit schematics. Furthermore, the deep similarity between the Boltzmann thermodynamic equations that describe noisy electronic current flow in subthreshold transistors and noisy molecular flux in biochemical reactions has helped map analog circuit motifs in electronics to analog circuit motifs in cells and vice versa via a `cytomorphic' approach. Thus, a body of knowledge in analog electronic circuit design, analysis, simulation, and implementation may also be useful in the robust and efficient design of molecular circuits in synthetic biology, helping it to scale to more complex circuits in the future.

  12. Analog circuit design art, science and personalities

    CERN Document Server

    Williams, Jim

    1991-01-01

    This book is far more than just another tutorial or reference guide - it's a tour through the world of analog design, combining theory and applications with the philosophies behind the design process. Readers will learn how leading analog circuit designers approach problems and how they think about solutions to those problems. They'll also learn about the `analog way' - a broad, flexible method of thinking about analog design tasks.A comprehensive and useful guide to analog theory and applications. Covers visualizing the operation of analog circuits. Looks at how to rap

  13. An analog integrated circuit design laboratory

    OpenAIRE

    Mondragon-Torres, A.F.; Mayhugh, Jr.; Pineda de Gyvez, J.; Silva-Martinez, J.; Sanchez-Sinencio, E.

    2003-01-01

    We present the structure of an analog integrated circuit design laboratory to instruct at both, senior undergraduate and entry graduate levels. The teaching material includes: a laboratory manual with analog circuit design theory, pre-laboratory exercises and circuit design specifications; a reference web page with step by step instructions and examples; the use of mathematical tools for automation and analysis; and state of the art CAD design tools in use by industry. Upon completion of the ...

  14. 23rd workshop on Advances in Analog Circuit Design

    CERN Document Server

    Baschirotto, Andrea; Makinwa, Kofi

    2015-01-01

    This book is based on the 18 tutorials presented during the 23rd workshop on Advances in Analog Circuit Design.  Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, serving as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.    • Includes coverage of high-performance analog-to-digital and digital to analog converters, integrated circuit design in scaled technologies, and time-domain signal processing; • Provides a state-of-the-art reference in analog circuit design, written by experts from industry and academia; • Presents material in a tutorial-based format.

  15. Design of analog integrated circuits and systems

    CERN Document Server

    Laker, Kenneth R

    1994-01-01

    This text is designed for senior or graduate level courses in analog integrated circuits or design of analog integrated circuits. This book combines consideration of CMOS and bipolar circuits into a unified treatment. Also included are CMOS-bipolar circuits made possible by BiCMOS technology. The text progresses from MOS and bipolar device modelling to simple one and two transistor building block circuits. The final two chapters present a unified coverage of sample-data and continuous-time signal processing systems.

  16. Digital circuit for the introduction and later removal of dither from an analog signal

    Science.gov (United States)

    Borgen, Gary S.

    1994-05-01

    An electronics circuit is presented for accurately digitizing an analog audio or like data signal into a digital equivalent signal by introducing dither into the analog signal and then subsequently removing the dither from the digitized signal prior to its conversion to an analog signal which is a substantial replica of the incoming analog audio or like data signal. The electronics circuit of the present invention is characterized by a first pseudo-random number generator which generates digital random noise signals or dither for addition to the digital equivalent signal and a second pseudo-random number generator which generates subtractive digital random noise signals for the subsequent removal of dither from the digital equivalent signal prior its conversion to the analog replica signal.

  17. 25th workshop on Advances in Analog Circuit Design

    CERN Document Server

    Harpe, Pieter; Makinwa, Kofi

    2017-01-01

    This book is based on the 18 tutorials presented during the 25th workshop on Advances in Analog Circuit Design. Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, including low-power and energy-efficient analog electronics, with specific contributions focusing on the design of continuous-time sigma-delta modulators, automotive electronics, and power management. This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.

  18. Feedback in analog circuits

    CERN Document Server

    Ochoa, Agustin

    2016-01-01

    This book describes a consistent and direct methodology to the analysis and design of analog circuits with particular application to circuits containing feedback. The analysis and design of circuits containing feedback is generally presented by either following a series of examples where each circuit is simplified through the use of insight or experience (someone else’s), or a complete nodal-matrix analysis generating lots of algebra. Neither of these approaches leads to gaining insight into the design process easily. The author develops a systematic approach to circuit analysis, the Driving Point Impedance and Signal Flow Graphs (DPI/SFG) method that does not require a-priori insight to the circuit being considered and results in factored analysis supporting the design function. This approach enables designers to account fully for loading and the bi-directional nature of elements both in the feedback path and in the amplifier itself, properties many times assumed negligible and ignored. Feedback circuits a...

  19. 22nd Workshop on Advances in Analog Circuit Design

    CERN Document Server

    Makinwa, Kofi; Harpe, Pieter

    2014-01-01

    This book is based on the 18 tutorials presented during the 22nd workshop on Advances in Analog Circuit Design.  Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, including frequency reference, power management for systems-on-chip, and smart wireless interfaces.  This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.    ·         Provides a state-of-the-art reference in analog circuit design, written by experts from industry and academia; ·         Presents material in a tutorial-based format; ·         Includes coverage of frequency reference, power management for systems-on-chip, and smart wireless interfaces.

  20. CMOS analog integrated circuits high-speed and power-efficient design

    CERN Document Server

    Ndjountche, Tertulien

    2011-01-01

    High-speed, power-efficient analog integrated circuits can be used as standalone devices or to interface modern digital signal processors and micro-controllers in various applications, including multimedia, communication, instrumentation, and control systems. New architectures and low device geometry of complementary metaloxidesemiconductor (CMOS) technologies have accelerated the movement toward system on a chip design, which merges analog circuits with digital, and radio-frequency components. CMOS: Analog Integrated Circuits: High-Speed and Power-Efficient Design describes the important tren

  1. Analog integrated circuits design for processing physiological signals.

    Science.gov (United States)

    Li, Yan; Poon, Carmen C Y; Zhang, Yuan-Ting

    2010-01-01

    Analog integrated circuits (ICs) designed for processing physiological signals are important building blocks of wearable and implantable medical devices used for health monitoring or restoring lost body functions. Due to the nature of physiological signals and the corresponding application scenarios, the ICs designed for these applications should have low power consumption, low cutoff frequency, and low input-referred noise. In this paper, techniques for designing the analog front-end circuits with these three characteristics will be reviewed, including subthreshold circuits, bulk-driven MOSFETs, floating gate MOSFETs, and log-domain circuits to reduce power consumption; methods for designing fully integrated low cutoff frequency circuits; as well as chopper stabilization (CHS) and other techniques that can be used to achieve a high signal-to-noise performance. Novel applications using these techniques will also be discussed.

  2. On automatic synthesis of analog/digital circuits

    Energy Technology Data Exchange (ETDEWEB)

    Beiu, V.

    1998-12-31

    The paper builds on a recent explicit numerical algorithm for Kolmogorov`s superpositions, and will show that in order to synthesize minimum size (i.e., size-optimal) circuits for implementing any Boolean function, the nonlinear activation function of the gates has to be the identity function. Because classical and--or implementations, as well as threshold gate implementations require exponential size, it follows that size-optimal solutions for implementing arbitrary Boolean functions can be obtained using analog (or mixed analog/digital) circuits. Conclusions and several comments are ending the paper.

  3. Single-event effects in analog and mixed-signal integrated circuits

    International Nuclear Information System (INIS)

    Turflinger, T.L.

    1996-01-01

    Analog and mixed-signal integrated circuits are also susceptible to single-event effects, but they have rarely been tested. Analog circuit single-particle transients require modified test techniques and data analysis. Existing work is reviewed and future concerns are outlined

  4. SEMICONDUCTOR INTEGRATED CIRCUITS: A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth

    Science.gov (United States)

    Tao, Tong; Baoyong, Chi; Ziqiang, Wang; Ying, Zhang; Hanjun, Jiang; Zhihua, Wang

    2010-05-01

    A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth in 0.35 μm CMOS is presented. The circuit consists of two variable gain amplifiers (VGA) in cascade and a Gm-C elliptic low-pass filter (LPF). The filter-order and the cut-off frequency of the LPF can be reconfigured to satisfy the requirements of various applications. In order to achieve the optimum power consumption, the bandwidth of the VGAs can also be dynamically reconfigured and some Gm cells can be cut off in the given application. Simulation results show that the analog baseband circuit consumes 16.8 mW for WLAN, 8.9 mW for WCDMA and only 6.5 mW for Bluetooth, all with a 3 V power supply. The analog baseband circuit could provide -10 to +40 dB variable gain, third-order low pass filtering with 1 MHz cut-off frequency for Bluetooth, fourth-order low pass filtering with 2.2 MHz cut-off frequency for WCDMA, and fifth-order low pass filtering with 11 MHz cut-off frequency for WLAN, respectively.

  5. High-frequency analog integrated circuit design

    CERN Document Server

    1995-01-01

    To learn more about designing analog integrated circuits (ICs) at microwave frequencies using GaAs materials, turn to this text and reference. It addresses GaAs MESFET-based IC processing. Describes the newfound ability to apply silicon analog design techniques to reliable GaAs materials and devices which, until now, was only available through technical papers scattered throughout hundred of articles in dozens of professional journals.

  6. Methodology for the digital calibration of analog circuits and systems with case studies

    CERN Document Server

    Pastre, Marc

    2006-01-01

    Methodology for the Digital Calibration of Analog Circuits and Systems shows how to relax the extreme design constraints in analog circuits, allowing the realization of high-precision systems even with low-performance components. A complete methodology is proposed, and three applications are detailed. To start with, an in-depth analysis of existing compensation techniques for analog circuit imperfections is carried out. The M/2+M sub-binary digital-to-analog converter is thoroughly studied, and the use of this very low-area circuit in conjunction with a successive approximations algorithm for digital compensation is described. A complete methodology based on this compensation circuit and algorithm is then proposed. The detection and correction of analog circuit imperfections is studied, and a simulation tool allowing the transparent simulation of analog circuits with automatic compensation blocks is introduced. The first application shows how the sub-binary M/2+M structure can be employed as a conventional di...

  7. Analog Multilayer Perceptron Circuit with On-chip Learning: Portable Electronic Nose

    Science.gov (United States)

    Pan, Chih-Heng; Tang, Kea-Tiong

    2011-09-01

    This article presents an analog multilayer perceptron (MLP) neural network circuit with on-chip back propagation learning. This low power and small area analog MLP circuit is proposed to implement as a classifier in an electronic nose (E-nose). Comparing with the E-nose using microprocessor or FPGA as a classifier, the E-nose applying analog circuit as a classifier can be faster and much smaller, demonstrate greater power efficiency and be capable of developing a portable E-nose [1]. The system contains four inputs, four hidden neurons, and only one output neuron; this simple structure allows the circuit to have a smaller area and less power consumption. The circuit is fabricated using TSMC 0.18 μm 1P6M CMOS process with 1.8 V supply voltage. The area of this chip is 1.353×1.353 mm2 and the power consumption is 0.54 mW. Post-layout simulations show that the proposed analog MLP circuit can be successively trained to identify three kinds of fruit odors.

  8. Nyquist AD Converters, Sensor Interfaces, and Robustness Advances in Analog Circuit Design, 2012

    CERN Document Server

    Baschirotto, Andrea; Steyaert, Michiel

    2013-01-01

    This book is based on the presentations during the 21st workshop on Advances in Analog Circuit Design.  Expert designers provide readers with information about a variety of topics at the frontier of analog circuit design, including Nyquist analog-to-digital converters, capacitive sensor interfaces, reliability, variability, and connectivity.  This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.  Provides a state-of-the-art reference in analog circuit design, written by experts from industry and academia; Presents material in a tutorial-based format; Includes coverage of Nyquist A/D converters, capacitive sensor interfaces, reliability, variability, and connectivity.

  9. Analog Circuit Design Optimization Based on Evolutionary Algorithms

    Directory of Open Access Journals (Sweden)

    Mansour Barari

    2014-01-01

    Full Text Available This paper investigates an evolutionary-based designing system for automated sizing of analog integrated circuits (ICs. Two evolutionary algorithms, genetic algorithm and PSO (Parswal particle swarm optimization algorithm, are proposed to design analog ICs with practical user-defined specifications. On the basis of the combination of HSPICE and MATLAB, the system links circuit performances, evaluated through specific electrical simulation, to the optimization system in the MATLAB environment, for the selected topology. The system has been tested by typical and hard-to-design cases, such as complex analog blocks with stringent design requirements. The results show that the design specifications are closely met. Comparisons with available methods like genetic algorithms show that the proposed algorithm offers important advantages in terms of optimization quality and robustness. Moreover, the algorithm is shown to be efficient.

  10. High-precision analog circuit technology for power supply integrated circuits; Dengen IC yo koseido anarogu kairo gijutsu

    Energy Technology Data Exchange (ETDEWEB)

    Nakamori, A.; Suzuki, T.; Mizoe, K. [Fuji Electric Corporate Research and Development,Ltd., Kanagawa (Japan)

    2000-08-10

    With the recent rapid spread of portable electronic appliances, specification requirements such as compact power supply and long operation with batteries have become severer. Power supply ICs (integrated circuits) are required to reduce power consumption in the circuit and perform high-precision control. To meet these requirements, Fuji Electric develops high-precision CMOS (complementary metal-oxide semiconductor) analog technology. This paper describes three analog circuit technologies of a voltage reference, an operational amplifier and a comparator as circuit components particularly important for the precision of power supply ICs. (author)

  11. Analog circuit design automation for performance

    NARCIS (Netherlands)

    Ning, Zhen-Qiu; Ning, Zhen-Qiu; Kole, Marq; Kole, M.E.; Mouthaan, A.J.; Wallinga, Hans

    1992-01-01

    This paper describes an improved version of the program SEAS (a Simulated Evolution approach for Analog circuit Synthesis), in which an approach for selection of alternatives based on the evaluation of mutation values is developed, and design automafion for high performance comparators is covered.

  12. CMOS analog integrated circuit design technology; CMOS anarogu IC sekkei gijutsu

    Energy Technology Data Exchange (ETDEWEB)

    Fujimoto, H.; Fujisawa, A. [Fuji Electric Co. Ltd., Tokyo (Japan)

    2000-08-10

    In the field of the LSI (large scale integrated circuit) in rapid progress toward high integration and advanced functions, CAD (computer-aided design) technology has become indispensable to LSI development within a short period. Fuji Electric has developed design technologies and automatic design system to develop high-quality analog ICs (integrated circuits), including power supply ICs. within a short period. This paper describes CMOS (complementary metal-oxide semiconductor) analog macro cell, circuit simulation, automatic routing, and backannotation technologies. (author)

  13. A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth

    International Nuclear Information System (INIS)

    Tong Tao; Chi Baoyong; Wang Ziqiang; Zhang Ying; Jiang Hanjun; Wang Zhihua

    2010-01-01

    A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth in 0.35 μm CMOS is presented. The circuit consists of two variable gain amplifiers (VGA) in cascade and a G m -C elliptic low-pass filter (LPF). The filter-order and the cut-off frequency of the LPF can be reconfigured to satisfy the requirements of various applications. In order to achieve the optimum power consumption, the bandwidth of the VGAs can also be dynamically reconfigured and some G m cells can be cut off in the given application. Simulation results show that the analog baseband circuit consumes 16.8 mW for WLAN, 8.9 mW for WCDMA and only 6.5 mW for Bluetooth, all with a 3 V power supply. The analog baseband circuit could provide -10 to +40 dB variable gain, third-order low pass filtering with 1 MHz cut-off frequency for Bluetooth, fourth-order low pass filtering with 2.2 MHz cut-off frequency for WCDMA, and fifth-order low pass filtering with 11 MHz cut-off frequency for WLAN, respectively. (semiconductor integrated circuits)

  14. A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth

    Energy Technology Data Exchange (ETDEWEB)

    Tong Tao; Chi Baoyong; Wang Ziqiang; Zhang Ying; Jiang Hanjun; Wang Zhihua, E-mail: tongt05@gmail.co [Institute of Microelectronics, Tsinghua University, Beijing 100084 (China)

    2010-05-15

    A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth in 0.35 {mu}m CMOS is presented. The circuit consists of two variable gain amplifiers (VGA) in cascade and a G{sub m}-C elliptic low-pass filter (LPF). The filter-order and the cut-off frequency of the LPF can be reconfigured to satisfy the requirements of various applications. In order to achieve the optimum power consumption, the bandwidth of the VGAs can also be dynamically reconfigured and some G{sub m} cells can be cut off in the given application. Simulation results show that the analog baseband circuit consumes 16.8 mW for WLAN, 8.9 mW for WCDMA and only 6.5 mW for Bluetooth, all with a 3 V power supply. The analog baseband circuit could provide -10 to +40 dB variable gain, third-order low pass filtering with 1 MHz cut-off frequency for Bluetooth, fourth-order low pass filtering with 2.2 MHz cut-off frequency for WCDMA, and fifth-order low pass filtering with 11 MHz cut-off frequency for WLAN, respectively. (semiconductor integrated circuits)

  15. SEAS: A simulated evolution approach for analog circuit synthesis

    NARCIS (Netherlands)

    Ning, Zhen-Qiu; Ning, Zhen-Qiu; Mouthaan, A.J.; Wallinga, Hans

    1991-01-01

    The authors present a simulated evolution approach for analog circuit synthesis based on an analogy with the natural selection process in biological environments and on the iterative improvements in solving engineering problems. A prototype framework based on this idea, called SEAS, has been

  16. Analog front end circuit design of CSNS beam loss monitor system

    International Nuclear Information System (INIS)

    Xiao Shuai; Guo Xian; Tian Jianmin; Zeng Lei; Xu Taoguang; Fu Shinian

    2013-01-01

    The China Spallation Neutron Source (CSNS) beam loss monitor system uses gas ionization chamber to detect beam losses. The output signals from ionization chamber need to be processed in the analog front end circuit, which has been designed and developed independently. The way of transimpedance amplifier was used to achieve current-voltage (I-V) conversion measurement of signal with low repetition rate, low duty cycle and low amplitude. The analog front end circuit also realized rapid response to the larger beam loss in order to protect the safe operation of the accelerator equipment. The testing results show that the analog front end circuit meets the requirements of beam loss monitor system. (authors)

  17. MOSFET analog memory circuit achieves long duration signal storage

    Science.gov (United States)

    1966-01-01

    Memory circuit maintains the signal voltage at the output of an analog signal amplifier when the input signal is interrupted or removed. The circuit uses MOSFET /Metal Oxide Semiconductor Field Effect Transistor/ devices as voltage-controlled switches, triggered by an external voltage-sensing device.

  18. Diagnosis of soft faults in analog integrated circuits based on fractional correlation

    International Nuclear Information System (INIS)

    Deng Yong; Shi Yibing; Zhang Wei

    2012-01-01

    Aiming at the problem of diagnosing soft faults in analog integrated circuits, an approach based on fractional correlation is proposed. First, the Volterra series of the circuit under test (CUT) decomposed by the fractional wavelet packet are used to calculate the fractional correlation functions. Then, the calculated fractional correlation functions are used to form the fault signatures of the CUT. By comparing the fault signatures, the different soft faulty conditions of the CUT are identified and the faults are located. Simulations of benchmark circuits illustrate the proposed method and validate its effectiveness in diagnosing soft faults in analog integrated circuits. (semiconductor integrated circuits)

  19. Development of reconfigurable analog and digital circuits for plasma diagnostics measurement systems

    International Nuclear Information System (INIS)

    Srivastava, Amit Kumar; Sharma, Atish; Raval, Tushar

    2009-01-01

    In long pulse discharge tokamak, a large number of diagnostic channels are being used to understand the complex behavior of plasma. Different diagnostics demand different types of analog and digital processing for plasma parameters measurement. This leads to variable requirements of signal processing for diagnostic measurement. For such types of requirements, we have developed hardware with reconfigurable electronic devices, which provide flexible solution for rapid development of measurement system. Here the analog processing is achieved by Field Programmable Analog Array (FPAA) integrated circuit while reconfigurable digital devices (CPLD/FPGA) achieve digital processing. FPAA's provide an ideal integrated platform for implementing low to medium complexity analog signal processing. With dynamic reconfigurability, the functionality of the FPAA can be reconfigured in-system by the designer or on the fly by a microprocessor. This feature is quite useful to manipulate the tuning or the construction of any part of the analog circuit without interrupting operation of the FPAA, thus maintaining system integrity. The hardware operation control logic circuits are configured in the reconfigurable digital devices (CPLD/FPGA) to control proper hardware functioning. These reconfigurable devices provide the design flexibility and save the component space on the board. It also provides the flexibility for various setting through software. The circuit controlling commands are either issued by computer/processor or generated by circuit itself. (author)

  20. Design of pressure-driven microfluidic networks using electric circuit analogy.

    Science.gov (United States)

    Oh, Kwang W; Lee, Kangsun; Ahn, Byungwook; Furlani, Edward P

    2012-02-07

    This article reviews the application of electric circuit methods for the analysis of pressure-driven microfluidic networks with an emphasis on concentration- and flow-dependent systems. The application of circuit methods to microfluidics is based on the analogous behaviour of hydraulic and electric circuits with correlations of pressure to voltage, volumetric flow rate to current, and hydraulic to electric resistance. Circuit analysis enables rapid predictions of pressure-driven laminar flow in microchannels and is very useful for designing complex microfluidic networks in advance of fabrication. This article provides a comprehensive overview of the physics of pressure-driven laminar flow, the formal analogy between electric and hydraulic circuits, applications of circuit theory to microfluidic network-based devices, recent development and applications of concentration- and flow-dependent microfluidic networks, and promising future applications. The lab-on-a-chip (LOC) and microfluidics community will gain insightful ideas and practical design strategies for developing unique microfluidic network-based devices to address a broad range of biological, chemical, pharmaceutical, and other scientific and technical challenges.

  1. Digitally-assisted analog and RF CMOS circuit design for software-defined radio

    CERN Document Server

    Okada, Kenichi

    2011-01-01

    This book describes the state-of-the-art in RF, analog, and mixed-signal circuit design for Software Defined Radio (SDR). It synthesizes for analog/RF circuit designers the most important general design approaches to take advantage of the most recent CMOS technology, which can integrate millions of transistors, as well as several real examples from the most recent research results.

  2. A PURE NODAL-ANALYSIS METHOD SUITABLE FOR ANALOG CIRCUITS USING NULLORS

    OpenAIRE

    E. Tlelo-Cuautle; L.A. Sarmiento-Reyes

    2003-01-01

    A novel technique suitable for computer-aided analysis of analog integrated circuits (ICs) is introduced. This technique uses the features of both nodal-analysis (NA) and symbolic analysis, at nullor level. First, the nullor is used to model the ideal behavior of several analog devices, namely: transistors, opamps, OTAs, and current conveyors. From this modeling approach, it is shown how to transform circuits working in voltage-mode to current-mode and vice-versa. Second, it is demonstrated t...

  3. AnalogRF and mixed-signal circuit systematic design

    CERN Document Server

    Tlelo-Cuautle, Esteban; Castro-Lopez, Rafael

    2013-01-01

    Despite the fact that in the digital domain, designers can take full benefits of IPs and design automation tools to synthesize and design very complex systems, the analog designers’ task is still considered as a ‘handcraft’, cumbersome and very time consuming process. Thus, tremendous efforts are being deployed  to develop new design methodologies in the analog/RF and mixed-signal domains. This book collects 16 state-of-the-art contributions devoted to the topic of systematic design of analog, RF and mixed signal circuits. Divided in the two parts Methodologies and Techniques recent theories, synthesis techniques and design methodologies, as well as new sizing approaches in the field of robust analog and mixed signal design automation are presented for researchers and R/D engineers.  

  4. Test signal generation for analog circuits

    Directory of Open Access Journals (Sweden)

    B. Burdiek

    2003-01-01

    Full Text Available In this paper a new test signal generation approach for general analog circuits based on the variational calculus and modern control theory methods is presented. The computed transient test signals also called test stimuli are optimal with respect to the detection of a given fault set by means of a predefined merit functional representing a fault detection criterion. The test signal generation problem of finding optimal test stimuli detecting all faults form the fault set is formulated as an optimal control problem. The solution of the optimal control problem representing the test stimuli is computed using an optimization procedure. The optimization procedure is based on the necessary conditions for optimality like the maximum principle of Pontryagin and adjoint circuit equations.

  5. A Transistor Sizing Tool for Optimization of Analog CMOS Circuits: TSOp

    OpenAIRE

    Y.C.Wong; Syafeeza A. R; N. A. Hamid

    2015-01-01

    Optimization of a circuit by transistor sizing is often a slow, tedious and iterative manual process which relies on designer intuition. It is highly desirable to automate the transistor sizing process towards being able to rapidly design high performance integrated circuit. Presented here is a simple but effective algorithm for automatically optimizing the circuit parameters by exploiting the relationships among the genetic algorithm's coefficient values derived from the analog circuit desig...

  6. Designing charge-sensitive preamplifiers based on low-noise analog integrated circuits

    International Nuclear Information System (INIS)

    Agakhanyan, T.M.

    1998-01-01

    The methodology for designing charge-sensitive preamplifiers on the low-noise analog integral circuits, including all the stages: the mathematical synthesis with optimization of the intermediate function; the scheme-technical synthesis with parametric optimization of the scheme and analysis of draft projects with the parameter verification is presented. The designing is conducted on the basis of requirements for signal parameters and noise indices of the preamplifier. The system of automated designing of the charge-sensitive preamplifiers on the low-noise analog integral circuits is developed [ru

  7. Analog circuit design a tutorial guide to applications and solutions

    CERN Document Server

    Williams, Jim

    2011-01-01

    * Covers the fundamentals of linear/analog circuit and system design to guide engineers with their design challenges. * Based on the Application Notes of Linear Technology, the foremost designer of high performance analog products, readers will gain practical insights into design techniques and practice. * Broad range of topics, including power management tutorials, switching regulator design, linear regulator design, data conversion, signal conditioning, and high frequency/RF design. * Contributors include the leading lights in analog design, Robert Dobkin, Jim Willia

  8. Integrated Circuits for Analog Signal Processing

    CERN Document Server

    2013-01-01

      This book presents theory, design methods and novel applications for integrated circuits for analog signal processing.  The discussion covers a wide variety of active devices, active elements and amplifiers, working in voltage mode, current mode and mixed mode.  This includes voltage operational amplifiers, current operational amplifiers, operational transconductance amplifiers, operational transresistance amplifiers, current conveyors, current differencing transconductance amplifiers, etc.  Design methods and challenges posed by nanometer technology are discussed and applications described, including signal amplification, filtering, data acquisition systems such as neural recording, sensor conditioning such as biomedical implants, actuator conditioning, noise generators, oscillators, mixers, etc.   Presents analysis and synthesis methods to generate all circuit topologies from which the designer can select the best one for the desired application; Includes design guidelines for active devices/elements...

  9. A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement

    Science.gov (United States)

    Lin, Wei-Liang; Cheng, Wang-Chuan; Wu, Chen-Hao; Wu, Hai-Ming; Wu, Chang-Yu; Ho, Kuan-Hsuan; Chan, Chueh-An

    2010-01-01

    This work describes a novel, first-year graduate-level analog integrated circuit (IC) design course. The course teaches students analog circuit design; an external manufacturer then produces their designs in three different silicon chips. The students, working in pairs, then test these chips to verify their success. All work is completed within…

  10. Accurate automatic tuning circuit for bipolar integrated filters

    NARCIS (Netherlands)

    de Heij, Wim J.A.; de Heij, W.J.A.; Hoen, Klaas; Hoen, Klaas; Seevinck, Evert; Seevinck, E.

    1990-01-01

    An accurate automatic tuning circuit for tuning the cutoff frequency and Q-factor of high-frequency bipolar filters is presented. The circuit is based on a voltage controlled quadrature oscillator (VCO). The frequency and the RMS (root mean square) amplitude of the oscillator output signal are

  11. Analog Circuit Design Low Voltage Low Power; Short Range Wireless Front-Ends; Power Management and DC-DC

    CERN Document Server

    Roermund, Arthur; Baschirotto, Andrea

    2012-01-01

    The book contains the contribution of 18 tutorials of the 20th workshop on Advances in Analog Circuit Design.  Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art information is shared and overviewed. This book is number 20 in this successful series of Analog Circuit Design, providing valuable information and excellent overviews of Low-Voltage Low-Power Data Converters - Chaired by Prof. Anderea Baschirotto, University of Milan-Bicocca Short Range Wireless Front-Ends - Chaired by Prof. Arthur van Roermund, Eindhoven University of Technology Power management and DC-DC - Chaired by Prof. M. Steyaert, Katholieke University Leuven Analog Circuit Design is an essential reference source for analog circuit designers and researchers wishing to keep abreast with the latest development in the field. The tutorial coverage also makes it suitable for use in an advanced design.

  12. Circuits and electronics hands-on learning with analog discovery

    CERN Document Server

    Okyere Attia, John

    2018-01-01

    The book provides instructions on building circuits on breadboards, connecting the Analog Discovery wires to the circuit under test, and making electrical measurements. Various measurement techniques are described and used in this book, including: impedance measurements, complex power measurements, frequency response measurements, power spectrum measurements, current versus voltage characteristic measurements of diodes, bipolar junction transistors, and Mosfets. The book includes end-of-chapter problems for additional exercises geared towards hands-on learning, experimentation, comparisons between measured results and those obtained from theoretical calculations.

  13. Wideband continuous-time ΣΔ ADCs, automotive electronics, and power management : advances in analog circuit design 2016

    NARCIS (Netherlands)

    Baschirotto, A.; Harpe, P.J.A.; Makinwa, K.A.A.

    2017-01-01

    This book is based on the 18 tutorials presented during the 25th workshop on Advances in Analog Circuit Design. Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, including low-power and energy-efficient analog electronics, with

  14. Text Based Analogy in Overcoming Student Misconception on Simple Electricity Circuit Material

    Science.gov (United States)

    Hesti, R.; Maknun, J.; Feranie, S.

    2017-09-01

    Some researcher have found that the use of analogy in learning and teaching physics was effective enough in giving comprehension in a complicated physics concept such as electrical circuits. Meanwhile, misconception become main cause that makes students failed when learning physics. To provide teaching physics effectively, the misconception should be resolved. Using Text Based Analogy is one of the way to identifying misconceptions and it is enough to assist teachers in conveying scientific truths in order to overcome misconceptions. The purpose of the study to investigate the use of text based analogy in overcoming students misconception on simple electrical circuit material. The samples of this research were 28 of junior high school students taken purposively from one high school in South Jakarta. The method use in this research is pre-experimental and design in one shot case study. Students who are the participants of sample have been identified misconception on the electrical circuit material by using the Diagnostic Test of Simple Electricity Circuit. The results of this study found that TBA can replace the misconceptions of the concept possessed by students with scientific truths conveyed in the text in a way that is easily understood so that TBA is strongly recommended to use in other physics materials.

  15. Design and implementation of JOM-3 Overhauser magnetometer analog circuit

    Science.gov (United States)

    Zhang, Xiao; Jiang, Xue; Zhao, Jianchang; Zhang, Shuang; Guo, Xin; Zhou, Tingting

    2017-09-01

    Overhauser magnetometer, a kind of static-magnetic measurement system based on the Overhauser effect, has been widely used in archaeological exploration, mineral resources exploration, oil and gas basin structure detection, prediction of engineering exploration environment, earthquakes and volcanic eruotions, object magnetic measurement and underground buried booty exploration. Overhauser magnetometer plays an important role in the application of magnetic field measurement for its characteristics of small size, low power consumption and high sensitivity. This paper researches the design and the application of the analog circuit of JOM-3 Overhauser magnetometer. First, the Larmor signal output by the probe is very weak. In order to obtain the signal with high signal to noise rstio(SNR), the design of pre-amplifier circuit is the key to improve the quality of the system signal. Second, in this paper, the effectual step which could improve the frequency characters of bandpass filter amplifier circuit were put forward, and theoretical analysis was made for it. Third, the shaping circuit shapes the amplified sine signal into a square wave signal which is suitable for detecting the rising edge. Fourth, this design elaborated the optimized choice of tuning circuit, so the measurement range of the magnetic field can be covered. Last, integrated analog circuit testing system was formed to detect waveform of each module. By calculating the standard deviation, the sensitivity of the improved Overhauser magnetometer is 0.047nT for Earth's magnetic field observation. Experimental results show that the new magnetometer is sensitive to earth field measurement.

  16. A Demonstrator Analog Signal Processing Circuit in a Radiation Hard SOI-CMOS Technology

    CERN Multimedia

    2002-01-01

    % RD-9 A Demonstrator Analog Signal Processing Circuit in a Radiation Hard SOI-CMOS Technology \\\\ \\\\Radiation hardened SOI-CMOS (Silicon-On-Insulator, Complementary Metal-Oxide- \\linebreak Semiconductor planar microelectronic circuit technology) was a likely candidate technology for mixed analog-digital signal processing electronics in experiments at the future high luminosity hadron colliders. We have studied the analog characteristics of circuit designs realized in the Thomson TCS radiation hard technologies HSOI3-HD. The feature size of this technology was 1.2 $\\mu$m. We have irradiated several devices up to 25~Mrad and 3.10$^{14}$ neutrons cm$^{-2}$. Gain, noise characteristics and speed have been measured. Irradiation introduces a degradation which in the interesting bandwidth of 0.01~MHz~-~1~MHz is less than 40\\%. \\\\ \\\\Some specific SOI phenomena have been studied in detail, like the influence on the noise spectrum of series resistence in the thin silicon film that constitutes the body of the transistor...

  17. Integrated electrofluidic circuits: pressure sensing with analog and digital operation functionalities for microfluidics.

    Science.gov (United States)

    Wu, Chueh-Yu; Lu, Jau-Ching; Liu, Man-Chi; Tung, Yi-Chung

    2012-10-21

    Microfluidic technology plays an essential role in various lab on a chip devices due to its desired advantages. An automated microfluidic system integrated with actuators and sensors can further achieve better controllability. A number of microfluidic actuation schemes have been well developed. In contrast, most of the existing sensing methods still heavily rely on optical observations and external transducers, which have drawbacks including: costly instrumentation, professional operation, tedious interfacing, and difficulties of scaling up and further signal processing. This paper reports the concept of electrofluidic circuits - electrical circuits which are constructed using ionic liquid (IL)-filled fluidic channels. The developed electrofluidic circuits can be fabricated using a well-developed multi-layer soft lithography (MSL) process with polydimethylsiloxane (PDMS) microfluidic channels. Electrofluidic circuits allow seamless integration of pressure sensors with analog and digital operation functions into microfluidic systems and provide electrical readouts for further signal processing. In the experiments, the analog operation device is constructed based on electrofluidic Wheatstone bridge circuits with electrical outputs of the addition and subtraction results of the applied pressures. The digital operation (AND, OR, and XOR) devices are constructed using the electrofluidic pressure controlled switches, and output electrical signals of digital operations of the applied pressures. The experimental results demonstrate the designed functions for analog and digital operations of applied pressures are successfully achieved using the developed electrofluidic circuits, making them promising to develop integrated microfluidic systems with capabilities of precise pressure monitoring and further feedback control for advanced lab on a chip applications.

  18. A novel analog/digital reconfigurable automatic gain control with a novel DC offset cancellation circuit

    Energy Technology Data Exchange (ETDEWEB)

    He Xiaofeng; Ye Tianchun [Institute of Microelectronics, Chinese Academy of Science, Beijing 100029 (China); Mo Taishan; Ma Chengyan, E-mail: hexiaofeng@casic.ac.cn [Hangzhou Zhongke Microelectronics Co, Ltd, Hangzhou 310053 (China)

    2011-02-15

    An analog/digital reconfigurable automatic gain control (AGC) circuit with a novel DC offset cancellation circuit for a direct-conversion receiver is presented. The AGC is analog/digital reconfigurable in order to be compatible with different baseband chips. What's more, a novel DC offset cancellation (DCOC) circuit with an HPCF (high pass cutoff frequency) less than 10 kHz is proposed. The AGC is fabricated by a 0.18 {mu}m CMOS process. Under analog control mode, the AGC achieves a 70 dB dynamic range with a 3 dB-bandwidth larger than 60 MHz. Under digital control mode, through a 5-bit digital control word, the AGC shows a 64 dB gain control range by 2 dB each step with a gain error of less than 0.3 dB. The DC offset cancellation circuits can suppress the output DC offset voltage to be less than 1.5 mV, while the offset voltage of 40 mV is introduced into the input. The overall power consumption is less than 3.5 mA, and the die area is 800 x 300 {mu}m{sup 2}. (semiconductor integrated circuits)

  19. Measurement and Analysis of Multiple Output Transient Propagation in BJT Analog Circuits

    Science.gov (United States)

    Roche, Nicolas J.-H.; Khachatrian, A.; Warner, J. H.; Buchner, S. P.; McMorrow, D.; Clymer, D. A.

    2016-08-01

    The propagation of Analog Single Event Transients (ASETs) to multiple outputs of Bipolar Junction Transistor (BJTs) Integrated Circuits (ICs) is reported for the first time. The results demonstrate that ASETs can appear at several outputs of a BJT amplifier or comparator as a result of a single ion or single laser pulse strike at a single physical location on the chip of a large-scale integrated BJT analog circuit. This is independent of interconnect cross-talk or charge-sharing effects. Laser experiments, together with SPICE simulations and analysis of the ASET's propagation in the s-domain are used to explain how multiple-output transients (MOTs) are generated and propagate in the device. This study demonstrates that both the charge collection associated with an ASET and the ASET's shape, commonly used to characterize the propagation of SETs in devices and systems, are unable to explain quantitatively how MOTs propagate through an integrated analog circuit. The analysis methodology adopted here involves combining the Fourier transform of the propagating signal and the current-source transfer function in the s-domain. This approach reveals the mechanisms involved in the transient signal propagation from its point of generation to one or more outputs without the signal following a continuous interconnect path.

  20. Electric Circuit Model Analogy for Equilibrium Lattice Relaxation in Semiconductor Heterostructures

    Science.gov (United States)

    Kujofsa, Tedi; Ayers, John E.

    2018-01-01

    The design and analysis of semiconductor strained-layer device structures require an understanding of the equilibrium profiles of strain and dislocations associated with mismatched epitaxy. Although it has been shown that the equilibrium configuration for a general semiconductor strained-layer structure may be found numerically by energy minimization using an appropriate partitioning of the structure into sublayers, such an approach is computationally intense and non-intuitive. We have therefore developed a simple electric circuit model approach for the equilibrium analysis of these structures. In it, each sublayer of an epitaxial stack may be represented by an analogous circuit configuration involving an independent current source, a resistor, an independent voltage source, and an ideal diode. A multilayered structure may be built up by the connection of the appropriate number of these building blocks, and the node voltages in the analogous electric circuit correspond to the equilibrium strains in the original epitaxial structure. This enables analysis using widely accessible circuit simulators, and an intuitive understanding of electric circuits can easily be extended to the relaxation of strained-layer structures. Furthermore, the electrical circuit model may be extended to continuously-graded epitaxial layers by considering the limit as the individual sublayer thicknesses are diminished to zero. In this paper, we describe the mathematical foundation of the electrical circuit model, demonstrate its application to several representative structures involving In x Ga1- x As strained layers on GaAs (001) substrates, and develop its extension to continuously-graded layers. This extension allows the development of analytical expressions for the strain, misfit dislocation density, critical layer thickness and widths of misfit dislocation free zones for a continuously-graded layer having an arbitrary compositional profile. It is similar to the transition from circuit

  1. Analog circuit design : low voltage low power; short range wireless front-ends; power management and DC-DC

    NARCIS (Netherlands)

    Steyaert, M.; Roermund, van A.H.M.; Baschirotto, A.

    2012-01-01

    The book contains the contribution of 18 tutorials of the 20th workshop on Advances in Analog Circuit Design. Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art

  2. Proposal for a fast, zero suppressing circuit for the digitization of analog pulses over long memory times

    International Nuclear Information System (INIS)

    Bourgeois, F.

    1984-01-01

    This report describes the design principles of a fast (100 MHz) time and pulse height digitizer that can record up to 15 analog pulses over 10-80 μs memory times. Unlike other triggered circuits prepulse samples are recorded without the help of an analog delay line. The low power requirements of the circuit as well as its fast read-out characteristics make it very attractive for detectors with many digitizing channels. Conventional circuits are described as a reference for the evaluation of this new design. An ECL 10 K implementation of the circuit is presented in the third section. (orig.)

  3. CASTOR a VLSI CMOS mixed analog-digital circuit for low noise multichannel counting applications

    International Nuclear Information System (INIS)

    Comes, G.; Loddo, F.; Hu, Y.; Kaplon, J.; Ly, F.; Turchetta, R.; Bonvicini, V.; Vacchi, A.

    1996-01-01

    In this paper we present the design and first experimental results of a VLSI mixed analog-digital 1.2 microns CMOS circuit (CASTOR) for multichannel radiation detectors applications demanding low noise amplification and counting of radiation pulses. This circuit is meant to be connected to pixel-like detectors. Imaging can be obtained by counting the number of hits in each pixel during a user-controlled exposure time. Each channel of the circuit features an analog and a digital part. In the former one, a charge preamplifier is followed by a CR-RC shaper with an output buffer and a threshold discriminator. In the digital part, a 16-bit counter is present together with some control logic. The readout of the counters is done serially on a common tri-state output. Daisy-chaining is possible. A 4-channel prototype has been built. This prototype has been optimised for use in the digital radiography Syrmep experiment at the Elettra synchrotron machine in Trieste (Italy): its main design parameters are: shaping time of about 850 ns, gain of 190 mV/fC and ENC (e - rms)=60+17 C (pF). The counting rate per channel, limited by the analog part, can be as high as about 200 kHz. Characterisation of the circuit and first tests with silicon microstrip detectors are presented. They show the circuit works according to design specification and can be used for imaging applications. (orig.)

  4. Four-gate transistor analog multiplier circuit

    Science.gov (United States)

    Mojarradi, Mohammad M. (Inventor); Blalock, Benjamin (Inventor); Cristoloveanu, Sorin (Inventor); Chen, Suheng (Inventor); Akarvardar, Kerem (Inventor)

    2011-01-01

    A differential output analog multiplier circuit utilizing four G.sup.4-FETs, each source connected to a current source. The four G.sup.4-FETs may be grouped into two pairs of two G.sup.4-FETs each, where one pair has its drains connected to a load, and the other par has its drains connected to another load. The differential output voltage is taken at the two loads. In one embodiment, for each G.sup.4-FET, the first and second junction gates are each connected together, where a first input voltage is applied to the front gates of each pair, and a second input voltage is applied to the first junction gates of each pair. Other embodiments are described and claimed.

  5. How to deal with substrate bounce in analog circuits in epi-type CMOS technology

    NARCIS (Netherlands)

    Nauta, Bram; Hoogzaad, Gian; Hoogzaad, G.; Donnay, S.; Gielen, G.

    2003-01-01

    Substrate noise is one of the key problems in mixed analog/digital ICs. Although measures are known to reduce substrate noise, the noise will never be completely eliminated since this requires larger chip area or exotic packages and thus higher cost. Analog circuits on digital ICs simply have to be

  6. Fault diagnosis for analog circuits utilizing time-frequency features and improved VVRKFA

    Science.gov (United States)

    He, Wei; He, Yigang; Luo, Qiwu; Zhang, Chaolong

    2018-04-01

    This paper proposes a novel scheme for analog circuit fault diagnosis utilizing features extracted from the time-frequency representations of signals and an improved vector-valued regularized kernel function approximation (VVRKFA). First, the cross-wavelet transform is employed to yield the energy-phase distribution of the fault signals over the time and frequency domain. Since the distribution is high-dimensional, a supervised dimensionality reduction technique—the bilateral 2D linear discriminant analysis—is applied to build a concise feature set from the distributions. Finally, VVRKFA is utilized to locate the fault. In order to improve the classification performance, the quantum-behaved particle swarm optimization technique is employed to gradually tune the learning parameter of the VVRKFA classifier. The experimental results for the analog circuit faults classification have demonstrated that the proposed diagnosis scheme has an advantage over other approaches.

  7. Low-power analog integrated circuits for wireless ECG acquisition systems.

    Science.gov (United States)

    Tsai, Tsung-Heng; Hong, Jia-Hua; Wang, Liang-Hung; Lee, Shuenn-Yuh

    2012-09-01

    This paper presents low-power analog ICs for wireless ECG acquisition systems. Considering the power-efficient communication in the body sensor network, the required low-power analog ICs are developed for a healthcare system through miniaturization and system integration. To acquire the ECG signal, a low-power analog front-end system, including an ECG signal acquisition board, an on-chip low-pass filter, and an on-chip successive-approximation analog-to-digital converter for portable ECG detection devices is presented. A quadrature CMOS voltage-controlled oscillator and a 2.4 GHz direct-conversion transmitter with a power amplifier and upconversion mixer are also developed to transmit the ECG signal through wireless communication. In the receiver, a 2.4 GHz fully integrated CMOS RF front end with a low-noise amplifier, differential power splitter, and quadrature mixer based on current-reused folded architecture is proposed. The circuits have been implemented to meet the specifications of the IEEE 802.15.4 2.4 GHz standard. The low-power ICs of the wireless ECG acquisition systems have been fabricated using a 0.18 μm Taiwan Semiconductor Manufacturing Company (TSMC) CMOS standard process. The measured results on the human body reveal that ECG signals can be acquired effectively by the proposed low-power analog front-end ICs.

  8. Analogy for Drude’s free electron model to promote students’ understanding of electric circuits in lower secondary school

    Directory of Open Access Journals (Sweden)

    Maria José BM de Almeida

    2014-09-01

    Full Text Available Aiming at a deep understanding of some basic concepts of electric circuits in lower secondary schools, this work introduces an analogy between the behavior of children playing in a school yard with a central lake, subject to different conditions, rules, and stimuli, and Drude’s free electron model of metals. Using this analogy from the first school contacts with electric phenomena, one can promote students’ understanding of concepts such as electric current, the role of generators, potential difference effects, energy transfer, open and closed circuits, resistances, and their combinations in series and parallel. One believes that through this analogy well-known previous misconceptions of young students about electric circuit behaviors can be overcome. Furthermore, students’ understanding will enable them to predict, and justify with self-constructed arguments, the behavior of different elementary circuits. The students’ predictions can be verified—as a challenge of self-produced understanding schemes—using laboratory experiments. At a preliminary stage, our previsions were confirmed through a pilot study with three classrooms of 9th level Portuguese students.

  9. Analog circuit design designing dynamic circuit response

    CERN Document Server

    Feucht, Dennis

    2010-01-01

    This second volume, Designing Dynamic Circuit Response builds upon the first volume Designing Amplifier Circuits by extending coverage to include reactances and their time- and frequency-related behavioral consequences.

  10. Sample-hold and analog multiplexer for multidetector systems

    Energy Technology Data Exchange (ETDEWEB)

    Goswami, G C; Ghoshdostidar, M R; Ghosh, B; Chaudhuri, N [North Bengal Univ., Darjeeling (India). Dept. of Physics

    1982-08-15

    A new sample-hold circuit with an analog multiplexer system is described. Designed for multichannel acquistion of data from an air shower array, the system is being used for accurate measurements of pulse heights from 16 channels by the use of a single ADC.

  11. An area and power-efficient analog li-ion battery charger circuit.

    Science.gov (United States)

    Do Valle, Bruno; Wentz, Christian T; Sarpeshkar, Rahul

    2011-04-01

    The demand for greater battery life in low-power consumer electronics and implantable medical devices presents a need for improved energy efficiency in the management of small rechargeable cells. This paper describes an ultra-compact analog lithium-ion (Li-ion) battery charger with high energy efficiency. The charger presented here utilizes the tanh basis function of a subthreshold operational transconductance amplifier to smoothly transition between constant-current and constant-voltage charging regimes without the need for additional area- and power-consuming control circuitry. Current-domain circuitry for end-of-charge detection negates the need for precision-sense resistors in either the charging path or control loop. We show theoretically and experimentally that the low-frequency pole-zero nature of most battery impedances leads to inherent stability of the analog control loop. The circuit was fabricated in an AMI 0.5-μm complementary metal-oxide semiconductor process, and achieves 89.7% average power efficiency and an end voltage accuracy of 99.9% relative to the desired target 4.2 V, while consuming 0.16 mm(2) of chip area. To date and to the best of our knowledge, this design represents the most area-efficient and most energy-efficient battery charger circuit reported in the literature.

  12. Investigation of flip-flop effects in a linear analog comparator-with-hysteresis circuit

    International Nuclear Information System (INIS)

    Roche, N.J.H.; Buchner, S.P.; Warner, J.H.; McMorrow, D.; Roig, F.; Auriel, G.; Dusseau, L.; Boch, J.; Saigne, F.; Azais, B.

    2013-01-01

    The impact of the positive feedback loop on analog single event transient (ASET) shapes was investigated for a comparator- with-hysteresis circuit. Simulation based on previous developed ASET simulation tool is used to model the impact of the power supply voltage, the input voltage level and the injected energy. Simulation results show that these kinds of circuits are sensitive to flip-flop effects. This phenomenon occurs if the input voltage is in the hysteresis band range. In this case, simulations show that the ASET can latch the output into a non-desired state by changing the state of the circuit on his transfer characteristic curves. Laser experiments were conducted and show that the simulation outputs are in agreement with the experimental collected data. (authors)

  13. An Analog Circuit Approximation of the Discrete Wavelet Transform for Ultra Low Power Signal Processing in Wearable Sensor Nodes.

    Science.gov (United States)

    Casson, Alexander J

    2015-12-17

    Ultra low power signal processing is an essential part of all sensor nodes, and particularly so in emerging wearable sensors for biomedical applications. Analog signal processing has an important role in these low power, low voltage, low frequency applications, and there is a key drive to decrease the power consumption of existing analog domain signal processing and to map more signal processing approaches into the analog domain. This paper presents an analog domain signal processing circuit which approximates the output of the Discrete Wavelet Transform (DWT) for use in ultra low power wearable sensors. Analog filters are used for the DWT filters and it is demonstrated how these generate analog domain DWT-like information that embeds information from Butterworth and Daubechies maximally flat mother wavelet responses. The Analog DWT is realised in hardware via g(m)C circuits, designed to operate from a 1.3 V coin cell battery, and provide DWT-like signal processing using under 115 nW of power when implemented in a 0.18 μm CMOS process. Practical examples demonstrate the effective use of the new Analog DWT on ECG (electrocardiogram) and EEG (electroencephalogram) signals recorded from humans.

  14. An Analog Circuit Approximation of the Discrete Wavelet Transform for Ultra Low Power Signal Processing in Wearable Sensor Nodes

    Directory of Open Access Journals (Sweden)

    Alexander J. Casson

    2015-12-01

    Full Text Available Ultra low power signal processing is an essential part of all sensor nodes, and particularly so in emerging wearable sensors for biomedical applications. Analog signal processing has an important role in these low power, low voltage, low frequency applications, and there is a key drive to decrease the power consumption of existing analog domain signal processing and to map more signal processing approaches into the analog domain. This paper presents an analog domain signal processing circuit which approximates the output of the Discrete Wavelet Transform (DWT for use in ultra low power wearable sensors. Analog filters are used for the DWT filters and it is demonstrated how these generate analog domain DWT-like information that embeds information from Butterworth and Daubechies maximally flat mother wavelet responses. The Analog DWT is realised in hardware via g m C circuits, designed to operate from a 1.3 V coin cell battery, and provide DWT-like signal processing using under 115 nW of power when implemented in a 0.18 μm CMOS process. Practical examples demonstrate the effective use of the new Analog DWT on ECG (electrocardiogram and EEG (electroencephalogram signals recorded from humans.

  15. Realization of rapid debugging for detection circuit of optical fiber gas sensor: Using an analog signal source

    Science.gov (United States)

    Tian, Changbin; Chang, Jun; Wang, Qiang; Wei, Wei; Zhu, Cunguang

    2015-03-01

    An optical fiber gas sensor mainly consists of two parts: optical part and detection circuit. In the debugging for the detection circuit, the optical part usually serves as a signal source. However, in the debugging condition, the optical part can be easily influenced by many factors, such as the fluctuation of ambient temperature or driving current resulting in instability of the wavelength and intensity for the laser; for dual-beam sensor, the different bends and stresses of the optical fiber will lead to the fluctuation of the intensity and phase; the intensity noise from the collimator, coupler, and other optical devices in the system will also result in the impurity of the optical part based signal source. In order to dramatically improve the debugging efficiency of the detection circuit and shorten the period of research and development, this paper describes an analog signal source, consisting of a single chip microcomputer (SCM), an amplifier circuit, and a voltage-to-current conversion circuit. It can be used to realize the rapid debugging detection circuit of the optical fiber gas sensor instead of optical part based signal source. This analog signal source performs well with many other advantages, such as the simple operation, small size, and light weight.

  16. Design of chaotic analog noise generators with logistic map and MOS QT circuits

    International Nuclear Information System (INIS)

    Vazquez-Medina, R.; Diaz-Mendez, A.; Rio-Correa, J.L. del; Lopez-Hernandez, J.

    2009-01-01

    In this paper a method to design chaotic analog noise generators using MOS transistors is presented. Two aspects are considered, the determination of operation regime of the MOS circuit and the statistical distribution of its output signal. The operation regime is related with the transconductance linear (TL: translinear) principle. For MOS transistors this principle was originally formulated in weak inversion regime; but, strong inversion regimen is used because in 1991, Seevinck and Wiegerink made the generalization for this principle. The statistical distribution of the output signal on the circuit, which should be a uniform distribution, is related with the parameter value that rules the transfer function of the circuit, the initial condition (seed) in the circuit and its operation as chaotic generator. To show these concepts, the MOS Quadratic Translinear circuit proposed by Wiegerink in 1993 was selected and it is related with the logistic map and its properties. This circuit will operate as noise generator if it works in strong inversion regime using current-mode approach when the parameter that rules the transfer function is higher than the onset chaos value (3.5699456...) for the logistic map.

  17. Analysis and application of analog electronic circuits to biomedical instrumentation

    CERN Document Server

    Northrop, Robert B

    2003-01-01

    This book introduces the basic mathematical tools used to describe noise and its propagation through linear systems and provides a basic description of the improvement of signal-to-noise ratio by signal averaging and linear filtering. The text also demonstrates how op amps are the keystone of modern analog signal conditioning systems design, and illustrates their use in isolation and instrumentation amplifiers, active filters, and numerous biomedical instrumentation systems and subsystems. It examines the properties of the ideal op amp and applies this model to the analysis of various circuits

  18. Analogy for Drude's Free Electron Model to Promote Students' Understanding of Electric Circuits in Lower Secondary School

    Science.gov (United States)

    de Almeida, Maria José B. M.; Salvador, Andreia; Costa, Maria Margarida R. R.

    2014-01-01

    Aiming at a deep understanding of some basic concepts of electric circuits in lower secondary schools, this work introduces an analogy between the behavior of children playing in a school yard with a central lake, subject to different conditions, rules, and stimuli, and Drude's free electron model of metals. Using this analogy from the first…

  19. A Alternative Analog Circuit Design Methodology Employing Integrated Artificial Intelligence Techniques

    Science.gov (United States)

    Tuttle, Jeffery L.

    In consideration of the computer processing power now available to the designer, an alternative analog circuit design methodology is proposed. Computer memory capacities no longer require the reduction of the transistor operational characteristics to an imprecise formulation. Therefore, it is proposed that transistor modelling be abandoned in favor of fully characterized transistor data libraries. Secondly, availability of the transistor libraries would facilitate an automated selection of the most appropriate device(s) for the circuit being designed. More specifically, a preprocessor computer program to a more sophisticated circuit simulator (e.g. SPICE) is developed to assist the designer in developing the basic circuit topology and the selection of the most appropriate transistor. Once this is achieved, the circuit topology and selected transistor data library would be downloaded to the simulator for full circuit operational characterization and subsequent design modifications. It is recognized that the design process is enhanced by the use of heuristics as applied to iterative design results. Accordingly, an artificial intelligence (AI) interface is developed to assist the designer in applying the preprocessor results. To demonstrate the retrofitability of the AI interface to established programs, the interface is specifically designed to be as non-intrusive to the host code as possible. Implementation of the proposed methodology offers the potential to speed the design process, since the preprocessor both minimizes the required number of simulator runs and provides a higher acceptance potential of the initial and subsequent simulator runs. Secondly, part count reductions may be realizable since the circuit topologies are not as strongly driven by transistor limitations. Thirdly, the predicted results should more closely match actual circuit operations since the inadequacies of the transistor models have been virtually eliminated. Finally, the AI interface

  20. An Analog Circuit Approximation of the Discrete Wavelet Transform for Ultra Low Power Signal Processing in Wearable Sensor Nodes

    OpenAIRE

    Casson, Alexander J.

    2015-01-01

    Ultra low power signal processing is an essential part of all sensor nodes, and particularly so in emerging wearable sensors for biomedical applications. Analog signal processing has an important role in these low power, low voltage, low frequency applications, and there is a key drive to decrease the power consumption of existing analog domain signal processing and to map more signal processing approaches into the analog domain. This paper presents an analog domain signal processing circuit ...

  1. Analog CMOS peak detect and hold circuits. Part 2. The two-phase offset-free and derandomizing configuration

    CERN Document Server

    De Geronimo, G; Kandasamy, A

    2002-01-01

    An analog CMOS peak detect and hold (PDH) circuit, which combines high speed and accuracy, rail-to-rail sensing and driving, low power, and buffering is presented. It is based on a configuration that cancels the major error sources of the classical CMOS PDH, including offset and common mode gain, by re-using the same amplifier for tracking, peak sensing, and output buffering. By virtue of its high absolute accuracy, two or more PDHs can be used in parallel to serve as a data-driven analog memory for derandomization. The first experimental results on the new peak detector and derandomizer (PDD) circuit, fabricated in 0.35 mu m CMOS technology, include a 0.2% absolute accuracy for pulses with 500 ns peaking time, 2.7 V linear input range, 3.3 mW power dissipation, 250 mV/s droop rate, and negligible dead time. The use of such a high performance analog PDD can greatly relax the requirements on the digitization in multi-channel systems.

  2. A novel technique for CAD-optimization of analog circuits with bipolar transistors

    Directory of Open Access Journals (Sweden)

    B. Dimov

    2009-05-01

    Full Text Available In this paper, a novel approach for robust automatic optimization of analog circuits with bipolar transistors is presented. It includes additional formal parameters into the device model cards, which sweep the model parameters smoothly between the different device types. In this way, not only the sizing, but also the choice of the device type is committed to the optimization tool, thus improving the efficiency of the design process significantly.

  3. Analog integrated circuit design automation placement, routing and parasitic extraction techniques

    CERN Document Server

    Martins, Ricardo; Horta, Nuno

    2017-01-01

    This book introduces readers to a variety of tools for analog layout design automation. After discussing the placement and routing problem in electronic design automation (EDA), the authors overview a variety of automatic layout generation tools, as well as the most recent advances in analog layout-aware circuit sizing. The discussion includes different methods for automatic placement (a template-based Placer and an optimization-based Placer), a fully-automatic Router and an empirical-based Parasitic Extractor. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. All the methods described are applied to practical examples for a 130nm design process, as well as placement and routing benchmark sets. Introduces readers to hierarchical combination of Pareto fronts of placements; Presents electromigration-aware routing with multilayer multiport terminal structures...

  4. Design of CMOS analog integrated fractional-order circuits applications in medicine and biology

    CERN Document Server

    Tsirimokou, Georgia; Elwakil, Ahmed

    2017-01-01

    This book describes the design and realization of analog fractional-order circuits, which are suitable for on-chip implementation, capable of low-voltage operation and electronic adjustment of their characteristics. The authors provide a brief introduction to fractional-order calculus, followed by design issues for fractional-order circuits of various orders and types. The benefits of this approach are demonstrated with current-mode and voltage-mode filter designs. Electronically tunable emulators of fractional-order capacitors and inductors are presented, where the behavior of the corresponding chips fabricated using the AMS 0.35um CMOS process has been experimentally verified. Applications of fractional-order circuits are demonstrated, including a pre-processing stage suitable for the implementation of the Pan-Tompkins algorithm for detecting the QRS complexes of an electrocardiogram (ECG), a fully tunable implementation of the Cole-Cole model used for the modeling of biological tissues, and a simple, non-i...

  5. Analog synthetic biology.

    Science.gov (United States)

    Sarpeshkar, R

    2014-03-28

    We analyse the pros and cons of analog versus digital computation in living cells. Our analysis is based on fundamental laws of noise in gene and protein expression, which set limits on the energy, time, space, molecular count and part-count resources needed to compute at a given level of precision. We conclude that analog computation is significantly more efficient in its use of resources than deterministic digital computation even at relatively high levels of precision in the cell. Based on this analysis, we conclude that synthetic biology must use analog, collective analog, probabilistic and hybrid analog-digital computational approaches; otherwise, even relatively simple synthetic computations in cells such as addition will exceed energy and molecular-count budgets. We present schematics for efficiently representing analog DNA-protein computation in cells. Analog electronic flow in subthreshold transistors and analog molecular flux in chemical reactions obey Boltzmann exponential laws of thermodynamics and are described by astoundingly similar logarithmic electrochemical potentials. Therefore, cytomorphic circuits can help to map circuit designs between electronic and biochemical domains. We review recent work that uses positive-feedback linearization circuits to architect wide-dynamic-range logarithmic analog computation in Escherichia coli using three transcription factors, nearly two orders of magnitude more efficient in parts than prior digital implementations.

  6. Fault Modeling and Testing for Analog Circuits in Complex Space Based on Supply Current and Output Voltage

    Directory of Open Access Journals (Sweden)

    Hongzhi Hu

    2015-01-01

    Full Text Available This paper deals with the modeling of fault for analog circuits. A two-dimensional (2D fault model is first proposed based on collaborative analysis of supply current and output voltage. This model is a family of circle loci on the complex plane, and it simplifies greatly the algorithms for test point selection and potential fault simulations, which are primary difficulties in fault diagnosis of analog circuits. Furthermore, in order to reduce the difficulty of fault location, an improved fault model in three-dimensional (3D complex space is proposed, which achieves a far better fault detection ratio (FDR against measurement error and parametric tolerance. To address the problem of fault masking in both 2D and 3D fault models, this paper proposes an effective design for testability (DFT method. By adding redundant bypassing-components in the circuit under test (CUT, this method achieves excellent fault isolation ratio (FIR in ambiguity group isolation. The efficacy of the proposed model and testing method is validated through experimental results provided in this paper.

  7. Realizing a Circuit Analog of an Optomechanical System with Longitudinally Coupled Superconducting Resonators

    OpenAIRE

    Eichler, C.; Petta, J. R.

    2017-01-01

    We realize a superconducting circuit analog of the generic cavity-optomechanical Hamiltonian by longitudinally coupling two superconducting resonators, which are an order of magnitude different in frequency. We achieve longitudinal coupling by embedding a superconducting quantum interference device (SQUID) into a high frequency resonator, making its resonance frequency depend on the zero point current fluctuations of a nearby low frequency LC-resonator. By employing sideband drive fields we e...

  8. Passive Guaranteed Simulation of Analog Audio Circuits: A Port-Hamiltonian Approach

    Directory of Open Access Journals (Sweden)

    Antoine Falaize

    2016-09-01

    Full Text Available We present a method that generates passive-guaranteed stable simulations of analog audio circuits from electronic schematics for real-time issues. On one hand, this method is based on a continuous-time power-balanced state-space representation structured into its energy-storing parts, dissipative parts, and external sources. On the other hand, a numerical scheme is especially designed to preserve this structure and the power balance. These state-space structures define the class of port-Hamiltonian systems. The derivation of this structured system associated with the electronic circuit is achieved by an automated analysis of the interconnection network combined with a dictionary of models for each elementary component. The numerical scheme is based on the combination of finite differences applied on the state (with respect to the time variable and on the total energy (with respect to the state. This combination provides a discrete-time version of the power balance. This set of algorithms is valid for both the linear and nonlinear case. Finally, three applications of increasing complexities are given: a diode clipper, a common-emitter bipolar-junction transistor amplifier, and a wah pedal. The results are compared to offline simulations obtained from a popular circuit simulator.

  9. AMPLITUDE AND TIME MEASUREMENT ASIC WITH ANALOG DERANDOMIZATION

    International Nuclear Information System (INIS)

    O CONNOR, P.; DE GERONIMO, G.; KANDASAMY, A.

    2002-01-01

    We describe a new ASIC for accurate and efficient processing of high-rate pulse signals from highly segmented detectors. In contrast to conventional approaches, this circuit affords a dramatic reduction in data volume through the use of analog techniques (precision peak detectors and time-to-amplitude converters) together with fast arbitration and sequencing logic to concentrate the data before digitization. In operation the circuit functions like a data-driven analog first-in, first-out (FIFO) memory between the preamplifiers and the ADC. Peak amplitudes of pulses arriving at any one of the 32 inputs are sampled, stored, and queued for readout and digitization through a single output port. Hit timing, pulse risetime, and channel address are also available at the output. Prototype chips have been fabricated in 0.35 micron CMOS and tested. First results indicate proper functionality for pulses down to 30 ns peaking time and input rates up to 1.6 MHz/channel. Amplitude accuracy of the peak detect and hold circuit is 0.3% (absolute). TAC accuracy is within 0.3% of full scale. Power consumption is less than 2 mW/channel. Compared with conventional techniques such as track-and-hold and analog memory, this new ASIC will enable efficient pulse height measurement at 20 to 300 times higher rates

  10. An analog memory integrated circuit for waveform sampling up to 900 MHz

    International Nuclear Information System (INIS)

    Haller, G.M.; Wooley, B.A.

    1994-01-01

    The potential of switched-capacitor technology for acquiring analog signals in high-energy physics (HEP) applications has been demonstrated in a number of analog memory designs. The design and implementation of a switched-capacitor memory suitable for capturing high-speed analog waveforms is described. Highlights of the presented circuit are a 900 MHz sampling frequency (generated on chip), input signal independent cell pedestal and sampling instances, and cell gains that are insensitive to component sizes. A two-channel version of the memory with 32 cells for each channel has been integrate in a 2-μm complementary metal oxide semiconductor (CMOS) process with polysilicon-to-polysilicon capacitors. The measured rms cell response variation in a channel after cell pedestal subtraction is less than 0.3 mV across the full input signal range. The cell-to-cell gain matching is better than 0.01% rms, and the nonlinearity is less than 0.03% for a 2.5-V input range. The dynamic range of the memory exceeds 13 bits, and the peak signal-to-(noise + distortion) ratio for a 21.4 MHz sine wave sampled at 900 MHz is 59 dB

  11. Experience in the Development of the CMS Inner Tracker Analog Optohybrid Circuits: Project, Qualification, Volume Production, Quality Assurance and Final Performance

    CERN Document Server

    Ricci, Daniel; Bilei, Gian Mario; Casinini, F; Postolache, Vasile

    2005-01-01

    The Tracker system of the Compact Muon Solenoid (CMS) Experiment, will employ approximately 40,000 analog fibre-optic data and control links. The optical readout system is responsible for converting and transmitting the electrical signals coming out from the front-end to the outside counting room. Concerning the inner part of the Tracker, about 3,600 Analog Optohybrid circuits are involved in this tasks. These circuits have been designed and successfully produced in Italy under the responsibility of INFN Perugia CMS group completing the volume production phase by February 2005. Environmental features, reliability and performances of these circuits have been extensively tested and qualified. This paper reviews the most relevant steps of the manufacturing and quality assurance process: from prototypes to mass-production for the final CMS use.

  12. Design and Analysis of Compact DNA Strand Displacement Circuits for Analog Computation Using Autocatalytic Amplifiers.

    Science.gov (United States)

    Song, Tianqi; Garg, Sudhanshu; Mokhtar, Reem; Bui, Hieu; Reif, John

    2018-01-19

    A main goal in DNA computing is to build DNA circuits to compute designated functions using a minimal number of DNA strands. Here, we propose a novel architecture to build compact DNA strand displacement circuits to compute a broad scope of functions in an analog fashion. A circuit by this architecture is composed of three autocatalytic amplifiers, and the amplifiers interact to perform computation. We show DNA circuits to compute functions sqrt(x), ln(x) and exp(x) for x in tunable ranges with simulation results. A key innovation in our architecture, inspired by Napier's use of logarithm transforms to compute square roots on a slide rule, is to make use of autocatalytic amplifiers to do logarithmic and exponential transforms in concentration and time. In particular, we convert from the input that is encoded by the initial concentration of the input DNA strand, to time, and then back again to the output encoded by the concentration of the output DNA strand at equilibrium. This combined use of strand-concentration and time encoding of computational values may have impact on other forms of molecular computation.

  13. Spiking Neural Networks with Unsupervised Learning Based on STDP Using Resistive Synaptic Devices and Analog CMOS Neuron Circuit.

    Science.gov (United States)

    Kwon, Min-Woo; Baek, Myung-Hyun; Hwang, Sungmin; Kim, Sungjun; Park, Byung-Gook

    2018-09-01

    We designed the CMOS analog integrate and fire (I&F) neuron circuit can drive resistive synaptic device. The neuron circuit consists of a current mirror for spatial integration, a capacitor for temporal integration, asymmetric negative and positive pulse generation part, a refractory part, and finally a back-propagation pulse generation part for learning of the synaptic devices. The resistive synaptic devices were fabricated using HfOx switching layer by atomic layer deposition (ALD). The resistive synaptic device had gradual set and reset characteristics and the conductance was adjusted by spike-timing-dependent-plasticity (STDP) learning rule. We carried out circuit simulation of synaptic device and CMOS neuron circuit. And we have developed an unsupervised spiking neural networks (SNNs) for 5 × 5 pattern recognition and classification using the neuron circuit and synaptic devices. The hardware-based SNNs can autonomously and efficiently control the weight updates of the synapses between neurons, without the aid of software calculations.

  14. Pseudo-differential CMOS analog front-end circuit for wide-bandwidth optical probe current sensor

    Science.gov (United States)

    Uekura, Takaharu; Oyanagi, Kousuke; Sonehara, Makoto; Sato, Toshiro; Miyaji, Kousuke

    2018-04-01

    In this paper, we present a pseudo-differential analog front-end (AFE) circuit for a novel optical probe current sensor (OPCS) aimed for high-frequency power electronics. It employs a regulated cascode transimpedance amplifier (RGC-TIA) to achieve a high gain and a large bandwidth without using an extremely high performance operational amplifier. The AFE circuit is designed in a 0.18 µm standard CMOS technology achieving a high transimpedance gain of 120 dB Ω and high cut off frequency of 16 MHz. The measured slew rate is 70 V/µs and the input referred current noise is 1.02 pA/\\sqrt{\\text{Hz}} . The magnetic resolution and bandwidth of OPCS are estimated to be 1.29 mTrms and 16 MHz, respectively; the bandwidth is higher than that of the reported Hall effect current sensor.

  15. An analog silicon retina with multichip configuration.

    Science.gov (United States)

    Kameda, Seiji; Yagi, Tetsuya

    2006-01-01

    The neuromorphic silicon retina is a novel analog very large scale integrated circuit that emulates the structure and the function of the retinal neuronal circuit. We fabricated a neuromorphic silicon retina, in which sample/hold circuits were embedded to generate fluctuation-suppressed outputs in the previous study [1]. The applications of this silicon retina, however, are limited because of a low spatial resolution and computational variability. In this paper, we have fabricated a multichip silicon retina in which the functional network circuits are divided into two chips: the photoreceptor network chip (P chip) and the horizontal cell network chip (H chip). The output images of the P chip are transferred to the H chip with analog voltages through the line-parallel transfer bus. The sample/hold circuits embedded in the P and H chips compensate for the pattern noise generated on the circuits, including the analog communication pathway. Using the multichip silicon retina together with an off-chip differential amplifier, spatial filtering of the image with an odd- and an even-symmetric orientation selective receptive fields was carried out in real time. The analog data transfer method in the present multichip silicon retina is useful to design analog neuromorphic multichip systems that mimic the hierarchical structure of neuronal networks in the visual system.

  16. Analog Organic Electronics Building Blocks for Organic Smart Sensor Systems on Foil

    CERN Document Server

    Marien, Hagen; Heremans, Paul

    2013-01-01

     This book provides insight into organic electronics technology and in analog circuit techniques that can be used to increase the performance of both analog and digital organic circuits. It explores the domain of organic electronics technology for analog circuit applications, specifically smart sensor systems.  It focuses on all the building blocks in the data path of an organic sensor system between the sensor and the digital processing block. Sensors, amplifiers, analog-to-digital converters and DC-DC converters are discussed in detail. Coverage includes circuit techniques, circuit implementation, design decisions and measurement results of the building blocks described. Offers readers the first book to focus on analog organic circuit design; Discusses organic electronics technology for analog circuit applications in the context of smart sensor systems; Describes all building blocks necessary for an organic sensor system between the sensor and the digital processing block; Includes circuit techniques, cir...

  17. An accurate low current measurement circuit for heavy iron beam current monitor

    International Nuclear Information System (INIS)

    Zhou Chaoyang; Su Hong; Mao Ruishi; Dong Chengfu; Qian Yi; Kong Jie

    2012-01-01

    Heavy-ion beams at 10 6 particles per second have been applied to the treatment of deep-seated inoperable tumors in the therapy terminal of the Heavy Ion Research Facility in Lanzhou (HIRFL) which is located at the Institute of Modern Physics, Chinese Academy of Sciences (IMP, CAS). An accurate low current measurement circuit following a Faraday cup was developed to monitor the beam current at pA range. The circuit consisted of a picoammeter with a bandwidth of 1 kHz and a gated integrator (GI). A low input bias current precision amplifier and new guarding and shielding techniques were used in the picoammeter circuit which allowed as to measure current less than 1 pA with a current gain of 0.22 V/pA and noise less than 10 fA. This paper will also describe a novel compensation approach which reduced the charge injection from switches in the GI to 10 −18 C, and a T-switch configuration which was used to eliminate leakage current in the reset switch.

  18. Deep Modeling: Circuit Characterization Using Theory Based Models in a Data Driven Framework

    Energy Technology Data Exchange (ETDEWEB)

    Bolme, David S [ORNL; Mikkilineni, Aravind K [ORNL; Rose, Derek C [ORNL; Yoginath, Srikanth B [ORNL; Holleman, Jeremy [University of Tennessee, Knoxville (UTK); Judy, Mohsen [University of Tennessee, Knoxville (UTK), Department of Electrical Engineering and Computer Science

    2017-01-01

    Analog computational circuits have been demonstrated to provide substantial improvements in power and speed relative to digital circuits, especially for applications requiring extreme parallelism but only modest precision. Deep machine learning is one such area and stands to benefit greatly from analog and mixed-signal implementations. However, even at modest precisions, offsets and non-linearity can degrade system performance. Furthermore, in all but the simplest systems, it is impossible to directly measure the intermediate outputs of all sub-circuits. The result is that circuit designers are unable to accurately evaluate the non-idealities of computational circuits in-situ and are therefore unable to fully utilize measurement results to improve future designs. In this paper we present a technique to use deep learning frameworks to model physical systems. Recently developed libraries like TensorFlow make it possible to use back propagation to learn parameters in the context of modeling circuit behavior. Offsets and scaling errors can be discovered even for sub-circuits that are deeply embedded in a computational system and not directly observable. The learned parameters can be used to refine simulation methods or to identify appropriate compensation strategies. We demonstrate the framework using a mixed-signal convolution operator as an example circuit.

  19. An integrated multichannel neural recording analog front-end ASIC with area-efficient driven right leg circuit.

    Science.gov (United States)

    Tao Tang; Wang Ling Goh; Lei Yao; Jia Hao Cheong; Yuan Gao

    2017-07-01

    This paper describes an integrated multichannel neural recording analog front end (AFE) with a novel area-efficient driven right leg (DRL) circuit to improve the system common mode rejection ratio (CMRR). The proposed AFE consists of an AC-coupled low-noise programmable-gain amplifier, an area-efficient DRL block and a 10-bit SAR ADC. Compared to conventional DRL circuit, the proposed capacitor-less DRL design achieves 90% chip area reduction with enhanced CMRR performance, making it ideal for multichannel biomedical recording applications. The AFE circuit has been designed in a standard 0.18-μm CMOS process. Post-layout simulation results show that the AFE provides two gain settings of 54dB/60dB while consuming 1 μA per channel under a supply voltage of 1 V. The input-referred noise of the AFE integrated from 1 Hz to 10k Hz is only 4 μVrms and the CMRR is 110 dB.

  20. Frequency to Voltage Converter Analog Front-End Prototype

    Science.gov (United States)

    Mata, Carlos; Raines, Matthew

    2012-01-01

    The frequency to voltage converter analog front end evaluation prototype (F2V AFE) is an evaluation board designed for comparison of different methods of accurately extracting the frequency of a sinusoidal input signal. A configurable input stage is routed to one or several of five separate, configurable filtering circuits, and then to a configurable output stage. Amplifier selection and gain, filter corner frequencies, and comparator hysteresis and voltage reference are all easily configurable through the use of jumpers and potentiometers.

  1. Study of CMOS-SOI Integrated Temperature Sensing Circuits for On-Chip Temperature Monitoring.

    Science.gov (United States)

    Malits, Maria; Brouk, Igor; Nemirovsky, Yael

    2018-05-19

    This paper investigates the concepts, performance and limitations of temperature sensing circuits realized in complementary metal-oxide-semiconductor (CMOS) silicon on insulator (SOI) technology. It is shown that the MOSFET threshold voltage ( V t ) can be used to accurately measure the chip local temperature by using a V t extractor circuit. Furthermore, the circuit's performance is compared to standard circuits used to generate an accurate output current or voltage proportional to the absolute temperature, i.e., proportional-to-absolute temperature (PTAT), in terms of linearity, sensitivity, power consumption, speed, accuracy and calibration needs. It is shown that the V t extractor circuit is a better solution to determine the temperature of low power, analog and mixed-signal designs due to its accuracy, low power consumption and no need for calibration. The circuit has been designed using 1 µm partially depleted (PD) CMOS-SOI technology, and demonstrates a measurement inaccuracy of ±1.5 K across 300 K⁻500 K temperature range while consuming only 30 µW during operation.

  2. Analog circuits using FinFETs: benefits in speed-accuracy-power trade-off and simulation of parasitic effects

    Directory of Open Access Journals (Sweden)

    M. Fulde

    2007-06-01

    Full Text Available Multi-gate FET, e.g. FinFET devices are the most promising contenders to replace bulk FETs in sub-45 nm CMOS technologies due to their improved sub threshold and short channel behavior, associated with low leakage currents. The introduction of novel gate stack materials (e.g. metal gate, high-k dielectric and modified device architectures (e.g. fully depleted, undoped fins affect the analog device properties significantly. First measurements indicate enhanced intrinsic gain (gm/gDS and promising matching behavior of FinFETs. The resulting benefits regarding the speed-accuracy-power trade-off in analog circuit design will be shown in this work. Additionally novel device specific effects will be discussed. The hysteresis effect caused by charge trapping in high-k dielectrics or self-heating due to the high thermal resistor of the BOX isolation are possible challenges for analog design in these emerging technologies. To gain an early assessment of the impact of such parasitic effects SPICE based models are derived and applied in analog building blocks.

  3. Low-power low-noise analog circuits for on-focal-plane signal processing of infrared sensors

    Science.gov (United States)

    Pain, Bedabrata; Mendis, Sunetra K.; Schober, Robert C.; Nixon, Robert H.; Fossum, Eric R.

    1993-10-01

    On-focal-plane signal processing circuits for enhancement of IR imager performance are presented. To enable the detection of high background IR images, an in-pixel current-mode background suppression scheme is presented. The background suppression circuit consists of a current memory placed in the feedback loop of a CTIA and is designed for a thousand-fold suppression of the background flux, thereby easing circuit design constraints, and assuring BLIP operation even with detectors having large response non-uniformities. For improving the performance of low-background IR imagers, an on-chip column-parallel analog-to-digital converter (ADC) is presented. The design of a 10-bit ADC with 50 micrometers pitch and based on sigma-delta ((Sigma) -(Delta) ) modulation is presented. A novel IR imager readout technique featuring photoelectron counting in the unit cell is presented for ultra-low background applications. The output of the unit cell is a digital word corresponding to the incident flux density and the readout is noise free. The design of low-power (noise, high-gain (> 100,000), small real estate (60 micrometers pitch) self-biased CMOS amplifiers required for photon counting are presented.

  4. Analog storage integrated circuit

    Science.gov (United States)

    Walker, J.T.; Larsen, R.S.; Shapiro, S.L.

    1989-03-07

    A high speed data storage array is defined utilizing a unique cell design for high speed sampling of a rapidly changing signal. Each cell of the array includes two input gates between the signal input and a storage capacitor. The gates are controlled by a high speed row clock and low speed column clock so that the instantaneous analog value of the signal is only sampled and stored by each cell on coincidence of the two clocks. 6 figs.

  5. Time domain analog circuit simulation

    NARCIS (Netherlands)

    Fijnvandraat, J.G.; Houben, S.H.M.J.; Maten, ter E.J.W.; Peters, J.M.F.

    2006-01-01

    Recent developments of new methods for simulating electric circuits are described. Emphasis is put on methods that fit existing datastructures for backward differentiation formulae methods. These methods can be modified to apply to hierarchically organized datastructures, which allows for efficient

  6. CMOS circuit design, layout and simulation

    CERN Document Server

    Baker, R Jacob

    2010-01-01

    The Third Edition of CMOS Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and much more. Regardless of one's integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples.

  7. A Parallel Genetic Algorithm for Automated Electronic Circuit Design

    Science.gov (United States)

    Lohn, Jason D.; Colombano, Silvano P.; Haith, Gary L.; Stassinopoulos, Dimitris; Norvig, Peter (Technical Monitor)

    2000-01-01

    We describe a parallel genetic algorithm (GA) that automatically generates circuit designs using evolutionary search. A circuit-construction programming language is introduced and we show how evolution can generate practical analog circuit designs. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. We present experimental results as applied to analog filter and amplifier design tasks.

  8. Synthetic analog computation in living cells.

    Science.gov (United States)

    Daniel, Ramiz; Rubens, Jacob R; Sarpeshkar, Rahul; Lu, Timothy K

    2013-05-30

    A central goal of synthetic biology is to achieve multi-signal integration and processing in living cells for diagnostic, therapeutic and biotechnology applications. Digital logic has been used to build small-scale circuits, but other frameworks may be needed for efficient computation in the resource-limited environments of cells. Here we demonstrate that synthetic analog gene circuits can be engineered to execute sophisticated computational functions in living cells using just three transcription factors. Such synthetic analog gene circuits exploit feedback to implement logarithmically linear sensing, addition, ratiometric and power-law computations. The circuits exhibit Weber's law behaviour as in natural biological systems, operate over a wide dynamic range of up to four orders of magnitude and can be designed to have tunable transfer functions. Our circuits can be composed to implement higher-order functions that are well described by both intricate biochemical models and simple mathematical functions. By exploiting analog building-block functions that are already naturally present in cells, this approach efficiently implements arithmetic operations and complex functions in the logarithmic domain. Such circuits may lead to new applications for synthetic biology and biotechnology that require complex computations with limited parts, need wide-dynamic-range biosensing or would benefit from the fine control of gene expression.

  9. Ultra-low power integrated circuit design circuits, systems, and applications

    CERN Document Server

    Li, Dongmei; Wang, Zhihua

    2014-01-01

    This book describes the design of CMOS circuits for ultra-low power consumption including analog, radio frequency (RF), and digital signal processing circuits (DSP). The book addresses issues from circuit and system design to production design, and applies the ultra-low power circuits described to systems for digital hearing aids and capsule endoscope devices. Provides a valuable introduction to ultra-low power circuit design, aimed at practicing design engineers; Describes all key building blocks of ultra-low power circuits, from a systems perspective; Applies circuits and systems described to real product examples such as hearing aids and capsule endoscopes.

  10. CMOS Analog IC Design: Fundamentals

    OpenAIRE

    Bruun, Erik

    2018-01-01

    This book is intended for use as the main textbook for an introductory course in CMOS analog integrated circuit design. It is aimed at electronics engineering students who have followed basic courses in mathematics, physics, circuit theory, electronics and signal processing. It takes the students directly from a basic level to a level where they can start working on simple analog IC design projects or continue their studies using more advanced textbooks in the field. A distinct feature of thi...

  11. Low-voltage current-mode CMOS building blocks for field programmable analog arrays and application

    International Nuclear Information System (INIS)

    Madian, A.H.K.

    2007-01-01

    The role of analog integrated circuits in modem electronic systems remains important, even though digital circuits dominate the market for VLSI solutions. Analog systems have always played an essential role in interfacing digital electronics to the real world in applications such as analog signal processing and signal conditioning .Industrial process and motion control and biomedical measurements . In addition, analog solutions are becoming increasingly competitive with digital circuits for dense, low-power, high-speed applications in low-precision signal-processing. Because of the wide variety of analog functions required in electronic systems and the complexity of the signals (frequency, time, signal levels, parasitic), analog system design is very specialized and supported by a diverse set of CAD tools that are more difficult to integrate than those required for digital design. The drive towards shorter design cycles for analog integrated circuits has demanded the development of high performance analog circuits that are re configurable and suitable for CAD methodologies. the researcher here try to contribute in this filed

  12. A bipolar analog front-end integrated circuit for the SDC silicon tracker

    International Nuclear Information System (INIS)

    Kipnis, I.; Spieler, H.; Collins, T.

    1993-11-01

    A low-noise, low-power, high-bandwidth, radiation hard, silicon bipolar-transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDC silicon tracker. The IC was designed and tested at LBL and was fabricated using AT ampersand T's CBIC-U2, 4 GHz f T complementary bipolar technology. Each channel contains the following functions: low-noise preamplification, pulse shaping and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 μm pitch double-sided silicon strip detector. The chip measures 6.8 mm x 3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. rms at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to 4 times the noise level, a 16 nsec time-walk for 1.25 to 10fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a Φ=10 14 protons/cm 2 have been performed on the IC, demonstrating the radiation hardness of the complementary bipolar process

  13. Circuit with a successive approximation analog to digital converter

    NARCIS (Netherlands)

    Louwsma, S.M.; Vertregt, Maarten

    2011-01-01

    During successive approximation analog to digital conversion a series of successive digital reference values is selected that converges towards a digital representation of an analog input signal. An analog reference signal is generated dependent on the successive digital reference values and

  14. Circuit with a successive approximation analog to digital converter

    NARCIS (Netherlands)

    Louwsma, S.M.; Vertregt, Maarten

    2010-01-01

    During successive approximation analog to digital conversion a series of successive digital reference values is selected that converges towards a digital representation of an analog input signal. An analog reference signal is generated dependent on the successive digital reference values and

  15. Digital signal processing in power electronics control circuits

    CERN Document Server

    Sozanski, Krzysztof

    2013-01-01

    Many digital control circuits in current literature are described using analog transmittance. This may not always be acceptable, especially if the sampling frequency and power transistor switching frequencies are close to the band of interest. Therefore, a digital circuit is considered as a digital controller rather than an analog circuit. This helps to avoid errors and instability in high frequency components. Digital Signal Processing in Power Electronics Control Circuits covers problems concerning the design and realization of digital control algorithms for power electronics circuits using

  16. A 1.4-V 48-μW current-mode front-end circuit for analog hearing aids with frequency compensation

    International Nuclear Information System (INIS)

    Wang Xiaoyu; Yang Haigang; Li Fanyang; Yin Tao; Liu Fei

    2012-01-01

    A current-mode front-end circuit with low voltage and low power for analog hearing aids is presented. The circuit consists of a current-mode AGC (automatic gain control) and a current-mode adaptive filter. Compared with its conventional voltage-mode counterparts, the proposed front-end circuit has the identified features of frequency compensation based on the state space theory and continuous gain with an exponential characteristic. The frequency compensation which appears only in the DSP unit of the digital hearing aid can upgrade the performance of the analog hearing aid in the field of low-frequency hearing loss. The continuous gain should meet the requirement of any input amplitude level, while its exponential characteristic leads to a large input dynamic range in accordance with the dB SPL (sound pressure level). Furthermore, the front-end circuit also provides a discrete knee point and discrete compression ratio to allow for high calibration flexibility. These features can accommodate users whose ears have different pain thresholds. Taking advantage of the current-mode technique, the MOS transistors work in the subthreshold region so that the quiescent current is small. Moreover, the input current can be compressed to a low voltage signal for processing according to the compression principle from the current-domain to the voltage-domain. Therefore, the objective of low voltage and low power (48 μW at 1.4 V) can be easily achieved in a high threshold-voltage CMOS process of 0.35 μm (V TON + |V TOP |≈ 1.35 V). The THD is below −45 dB. The fabricated chip only occupies the area of 1 × 0.5 mm 2 and 1 × 1 mm 2 .

  17. Analog fault diagnosis by inverse problem technique

    KAUST Repository

    Ahmed, Rania F.

    2011-12-01

    A novel algorithm for detecting soft faults in linear analog circuits based on the inverse problem concept is proposed. The proposed approach utilizes optimization techniques with the aid of sensitivity analysis. The main contribution of this work is to apply the inverse problem technique to estimate the actual parameter values of the tested circuit and so, to detect and diagnose single fault in analog circuits. The validation of the algorithm is illustrated through applying it to Sallen-Key second order band pass filter and the results show that the detecting percentage efficiency was 100% and also, the maximum error percentage of estimating the parameter values is 0.7%. This technique can be applied to any other linear circuit and it also can be extended to be applied to non-linear circuits. © 2011 IEEE.

  18. Analog and mixed-signal electronics

    CERN Document Server

    Stephan, Karl

    2015-01-01

    A practical guide to analog and mixed-signal electronics, with an emphasis on design problems and applications This book provides an in-depth coverage of essential analog and mixed-signal topics such as power amplifiers, active filters, noise and dynamic range, analog-to-digital and digital-to-analog conversion techniques, phase-locked loops, and switching power supplies. Readers will learn the basics of linear systems, types of nonlinearities and their effects, op-amp circuits, the high-gain analog filter-amplifier, and signal generation. The author uses system design examples to motivate

  19. Bootstrapped Low-Voltage Analog Switches

    DEFF Research Database (Denmark)

    Steensgaard-Madsen, Jesper

    1999-01-01

    Novel low-voltage constant-impedance analog switch circuits are proposed. The switch element is a single MOSFET, and constant-impedance operation is obtained using simple circuits to adjust the gate and bulk voltages relative to the switched signal. Low-voltage (1-volt) operation is made feasible...

  20. Fast and Accurate Icepak-PSpice Co-Simulation of IGBTs under Short-Circuit with an Advanced PSpice Model

    DEFF Research Database (Denmark)

    Wu, Rui; Iannuzzo, Francesco; Wang, Huai

    2014-01-01

    A basic problem in the IGBT short-circuit failure mechanism study is to obtain realistic temperature distribution inside the chip, which demands accurate electrical simulation to obtain power loss distribution as well as detailed IGBT geometry and material information. This paper describes an unp...

  1. Contribution of custom-designed integrated circuits to the electronic equipment of multiwire chambers

    International Nuclear Information System (INIS)

    Prunier, J.

    1977-01-01

    The first generations of circuits intended to equip the multiwire proportional chambers provided the user with logical type indications (absence or presence of a signal at a given place). This logical indication was soon associated with a semi-analog data (presence or absence of a signal above an analog threshold, i.e. the discrimination function) as with FILAS, RBA and RBB circuits. The evolution continued with the appearance of analog data capture (time, amplitude, charge) and the corresponding circuits: IFT circuits, analog-to-digital converters [fr

  2. Toward Wireless Health Monitoring via an Analog Signal Compression-Based Biosensing Platform.

    Science.gov (United States)

    Zhao, Xueyuan; Sadhu, Vidyasagar; Le, Tuan; Pompili, Dario; Javanmard, Mehdi

    2018-06-01

    Wireless all-analog biosensor design for the concurrent microfluidic and physiological signal monitoring is presented in this paper. The key component is an all-analog circuit capable of compressing two analog sources into one analog signal by the analog joint source-channel coding (AJSCC). Two circuit designs are discussed, including the stacked-voltage-controlled voltage source (VCVS) design with the fixed number of levels, and an improved design, which supports a flexible number of AJSCC levels. Experimental results are presented on the wireless biosensor prototype, composed of printed circuit board realizations of the stacked-VCVS design. Furthermore, circuit simulation and wireless link simulation results are presented on the improved design. Results indicate that the proposed wireless biosensor is well suited for sensing two biological signals simultaneously with high accuracy, and can be applied to a wide variety of low-power and low-cost wireless continuous health monitoring applications.

  3. A 16-Channel CMOS Chopper-Stabilized Analog Front-End ECoG Acquisition Circuit for a Closed-Loop Epileptic Seizure Control System.

    Science.gov (United States)

    Wu, Chung-Yu; Cheng, Cheng-Hsiang; Chen, Zhi-Xin

    2018-06-01

    In this paper, a 16-channel analog front-end (AFE) electrocorticography signal acquisition circuit for a closed-loop seizure control system is presented. It is composed of 16 input protection circuits, 16 auto-reset chopper-stabilized capacitive-coupled instrumentation amplifiers (AR-CSCCIA) with bandpass filters, 16 programmable transconductance gain amplifiers, a multiplexer, a transimpedance amplifier, and a 128-kS/s 10-bit delta-modulated successive-approximation-register analog-to-digital converter (SAR ADC). In closed-loop seizure control system applications, the stimulator shares the same electrode with the AFE amplifier for effective suppression of epileptic seizures. To prevent from overstress in MOS devices caused by high stimulation voltage, an input protection circuit with a high-voltage-tolerant switch is proposed for the AFE amplifier. Moreover, low input-referred noise is achieved by using the chopper modulation technique in the AR-CSCCIA. To reduce the undesired effects of chopper modulation, an improved offset reduction loop is proposed to reduce the output offset generated by input chopper mismatches. The digital ripple reduction loop is also used to reduce the chopper ripple. The fabricated AFE amplifier has 49.1-/59.4-/67.9-dB programmable gain and 2.02-μVrms input referred noise in a bandwidth of 0.59-117 Hz. The measured power consumption of the AFE amplifier is 3.26 μW per channel, and the noise efficiency factor is 3.36. The in vivo animal test has been successfully performed to verify the functions. It is shown that the proposed AFE acquisition circuit is suitable for implantable closed-loop seizure control systems.

  4. Development of a RF large signal MOSFET model, based on an equivalent circuit, and comparison with the BSIM3v3 compact model.

    NARCIS (Netherlands)

    Vandamme, E.P.; Schreurs, D.; Dinther, van C.H.J.; Badenes, G.; Deferm, L.

    2002-01-01

    The improved RF performance of silicon-based technologies over the years and their potential use in telecommunication applications has increased the research in RF modelling of MOS transistors. Especially for analog circuits, accurate RF small signal and large signal transistor models are required.

  5. Advances in analog and RF IC design for wireless communication systems

    CERN Document Server

    Manganaro, Gabriele

    2013-01-01

    Advances in Analog and RF IC Design for Wireless Communication Systems gives technical introductions to the latest and most significant topics in the area of circuit design of analog/RF ICs for wireless communication systems, emphasizing wireless infrastructure rather than handsets. The book ranges from very high performance circuits for complex wireless infrastructure systems to selected highly integrated systems for handsets and mobile devices. Coverage includes power amplifiers, low-noise amplifiers, modulators, analog-to-digital converters (ADCs) and digital-to-analog converters

  6. Diagnostic Neural Network Systems for the Electronic Circuits

    International Nuclear Information System (INIS)

    Mohamed, A.H.

    2014-01-01

    Neural Networks is one of the most important artificial intelligent approaches for solving the diagnostic processes. This research concerns with uses the neural networks for diagnosis of the electronic circuits. Modern electronic systems contain both the analog and digital circuits. But, diagnosis of the analog circuits suffers from great complexity due to their nonlinearity. To overcome this problem, the proposed system introduces a diagnostic system that uses the neural network to diagnose both the digital and analog circuits. So, it can face the new requirements for the modern electronic systems. A fault dictionary method was implemented in the system. Experimental results are presented on three electronic systems. They are: artificial kidney, wireless network and personal computer systems. The proposed system has improved the performance of the diagnostic systems when applied for these practical cases

  7. An Experimentation Platform for On-Chip Integration of Analog Neural Networks: A Pathway to Trusted and Robust Analog/RF ICs.

    Science.gov (United States)

    Maliuk, Dzmitry; Makris, Yiorgos

    2015-08-01

    We discuss the design of an experimentation platform intended for prototyping low-cost analog neural networks for on-chip integration with analog/RF circuits. The objective of such integration is to support various tasks, such as self-test, self-tuning, and trust/aging monitoring, which require classification of analog measurements obtained from on-chip sensors. Particular emphasis is given to cost-efficient implementation reflected in: 1) low energy and area budgets of circuits dedicated to neural networks; 2) robust learning in presence of analog inaccuracies; and 3) long-term retention of learned functionality. Our chip consists of a reconfigurable array of synapses and neurons operating below threshold and featuring sub-μW power consumption. The synapse circuits employ dual-mode weight storage: 1) a dynamic mode, for fast bidirectional weight updates during training and 2) a nonvolatile mode, for permanent storage of learned functionality. We discuss a robust learning strategy, and we evaluate the system performance on several benchmark problems, such as the XOR2-6 and two-spirals classification tasks.

  8. Analog integrated circuit for micro-gyro interface realized by multi-chip service in Japan; Multi chip service ni yoru micro gyro interface shuseki kairo no sekkei to shisaku

    Energy Technology Data Exchange (ETDEWEB)

    Maenaka, K.; Fujita, T.; Okamoto, K.; Maeda, M. [Himeji Institute of Technology, Hyogo (Japan)

    1998-10-01

    This paper deals with an analog integrated circuit for micro-machined gyroscopes with capacitive output. The Integrated circuit was fabricated as a part of the first project from the `Micromachining Multi-Chip Service Cooperative Re-search Committee` organized by The Institute of Electrical Engineers Japan. This multi-chip service project offers a master slice chip with an equivalent of 9 blocks of operational amplifier circuits. Our integrated circuit includes a modulator, demodulator and synchronous rectifier for detecting small changes in the capacitance of a silicon gyroscope. In the paper, the experimental results of fabricated samples will be described. 13 refs., 15 figs.

  9. Electronic circuit for rapid digital NMR signal imaging

    International Nuclear Information System (INIS)

    Jurak, P.; Krejci, I.; Belusa, J.

    1992-01-01

    The circuit is made up of two analog-to-digital converters whose outputs are connected to a process computer and the synchronization inputs to the clock terminal. The one analog-to-digital converter is connected, via the signal input, to the terminal of the nuclear magnetic resonance locking signal. The signal input of the other analog-to-digital converter is connected to the time base generator, which can be switched off, and to the magnetic field sweep circuit. The assets of this citcuit include easy computerized processing of the digitized information independently of the time base generation, and prevention of interfering signals from penetrating into the magnetic field sweep circuits. (Z.S.). 1 fig

  10. Transistor analogs of emergent iono-neuronal dynamics.

    Science.gov (United States)

    Rachmuth, Guy; Poon, Chi-Sang

    2008-06-01

    Neuromorphic analog metal-oxide-silicon (MOS) transistor circuits promise compact, low-power, and high-speed emulations of iono-neuronal dynamics orders-of-magnitude faster than digital simulation. However, their inherently limited input voltage dynamic range vs power consumption and silicon die area tradeoffs makes them highly sensitive to transistor mismatch due to fabrication inaccuracy, device noise, and other nonidealities. This limitation precludes robust analog very-large-scale-integration (aVLSI) circuits implementation of emergent iono-neuronal dynamics computations beyond simple spiking with limited ion channel dynamics. Here we present versatile neuromorphic analog building-block circuits that afford near-maximum voltage dynamic range operating within the low-power MOS transistor weak-inversion regime which is ideal for aVLSI implementation or implantable biomimetic device applications. The fabricated microchip allowed robust realization of dynamic iono-neuronal computations such as coincidence detection of presynaptic spikes or pre- and postsynaptic activities. As a critical performance benchmark, the high-speed and highly interactive iono-neuronal simulation capability on-chip enabled our prompt discovery of a minimal model of chaotic pacemaker bursting, an emergent iono-neuronal behavior of fundamental biological significance which has hitherto defied experimental testing or computational exploration via conventional digital or analog simulations. These compact and power-efficient transistor analogs of emergent iono-neuronal dynamics open new avenues for next-generation neuromorphic, neuroprosthetic, and brain-machine interface applications.

  11. Automatic analog IC sizing and optimization constrained with PVT corners and layout effects

    CERN Document Server

    Lourenço, Nuno; Horta, Nuno

    2017-01-01

    This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit’s performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches. The authors describe a methodology for an automatic flow for analog IC design, including details of the inputs and interfaces, multi-objective optimization techniques, and the enhancements made in the base implementation by using machine leaning techniques. The Gradient model is discussed in detail, along with the methods to include layout effects in the circuit sizing. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the qual...

  12. Toward a 62.5 MHz analog virtual pipeline integrated data acquisition system

    International Nuclear Information System (INIS)

    Kleinfelder, S.A.; Levi, M.; Milgrome, O.

    1991-01-01

    Requirements of analog pipeline memories at the SSC are reviewed and the concept of virtual pipelines is introduced. Design details and test results of several new custom analog and digital integrated circuits implementing sections of the virtual multiple pipeline (VMP) scheme are provied. These include serial, random access and simultaneous read and write random access analog storage and retrieval circuits, a 100 MHz systolic variable depth digital pipeline, and a prototye 32 μs, 12 bit serial analog to digital converter. (orig.)

  13. Study on Factors for Accurate Open Circuit Voltage Characterizations in Mn-Type Li-Ion Batteries

    Directory of Open Access Journals (Sweden)

    Natthawuth Somakettarin

    2017-03-01

    Full Text Available Open circuit voltage (OCV of lithium batteries has been of interest since the battery management system (BMS requires an accurate knowledge of the voltage characteristics of any Li-ion batteries. This article presents an OCV characteristic for lithium manganese oxide (LMO batteries under several experimental operating conditions, and discusses factors for accurate OCV determination. A test system is developed for OCV characterization based on the OCV pulse test method. Various factors for the OCV behavior, such as resting period, step-size of the pulse test, testing current amplitude, hysteresis phenomena, and terminal voltage relationship, are investigated and evaluated. To this end, a general OCV model based on state of charge (SOC tracking is developed and validated with satisfactory results.

  14. An Analog Computer for Electronic Engineering Education

    Science.gov (United States)

    Fitch, A. L.; Iu, H. H. C.; Lu, D. D. C.

    2011-01-01

    This paper describes a compact analog computer and proposes its use in electronic engineering teaching laboratories to develop student understanding of applications in analog electronics, electronic components, engineering mathematics, control engineering, safe laboratory and workshop practices, circuit construction, testing, and maintenance. The…

  15. Precision-analog fiber-optic transmission system

    International Nuclear Information System (INIS)

    Stover, G.

    1981-06-01

    This article describes the design, experimental development, and construction of a DC-coupled precision analog fiber optic link. Topics to be covered include overall electrical and mechanical system parameters, basic circuit organization, modulation format, optical system design, optical receiver circuit analysis, and the experimental verification of the major design parameters

  16. Design rules for superconducting analog-digital transducers; Entwurfsregeln fuer Supraleitende Analog-Digital-Wandler

    Energy Technology Data Exchange (ETDEWEB)

    Haddad, Taghrid

    2015-05-29

    This Thesis is a contribution for dimensioning aspects of circuits designs in superconductor electronics. Mainly superconductor comparators inclusive Josephson comparators as well as QOJS-Comparators are investigated. Both types were investigated in terms of speed and sensitivity. The influence of the thermal noise on the decision process of the comparators represent in so called gray zone, which is analysed in this thesis. Thereby, different relations between design parameters were derived. A circuit model of the Josephson comparator was verified by experiments. Concepts of superconductor analog-to-digital converters, which are based on above called comparators, were investigated in detail. From the comparator design rules, new rules for AD-converters were derived. Because of the reduced switching energy, the signal to noise ratio (SNR) of the circuits is affected and therefore the reliability of the decision-process is affected. For special applications with very demanding requirements in terms of the speed and accuracy superconductor analog-to-digital converters offer an excellent performance. This thesis provides relations between different design paramenters and shows resulting trade-offs, This method is transparent and easy to transfer to other circuit topologies. As a main result, a highly predictive tool for dimensioning of superconducting ADC's is proved.

  17. Optimal neural computations require analog processors

    Energy Technology Data Exchange (ETDEWEB)

    Beiu, V.

    1998-12-31

    This paper discusses some of the limitations of hardware implementations of neural networks. The authors start by presenting neural structures and their biological inspirations, while mentioning the simplifications leading to artificial neural networks. Further, the focus will be on hardware imposed constraints. They will present recent results for three different alternatives of parallel implementations of neural networks: digital circuits, threshold gate circuits, and analog circuits. The area and the delay will be related to the neurons` fan-in and to the precision of their synaptic weights. The main conclusion is that hardware-efficient solutions require analog computations, and suggests the following two alternatives: (i) cope with the limitations imposed by silicon, by speeding up the computation of the elementary silicon neurons; (2) investigate solutions which would allow the use of the third dimension (e.g. using optical interconnections).

  18. Circuits and filters handbook

    CERN Document Server

    Chen, Wai-Kai

    2003-01-01

    A bestseller in its first edition, The Circuits and Filters Handbook has been thoroughly updated to provide the most current, most comprehensive information available in both the classical and emerging fields of circuits and filters, both analog and digital. This edition contains 29 new chapters, with significant additions in the areas of computer-aided design, circuit simulation, VLSI circuits, design automation, and active and digital filters. It will undoubtedly take its place as the engineer's first choice in looking for solutions to problems encountered in the design, analysis, and behavi

  19. Signal Digitizer and Cross-Correlation Application Specific Integrated Circuit

    Science.gov (United States)

    Baranauskas, Dalius (Inventor); Baranauskas, Gytis (Inventor); Zelenin, Denis (Inventor); Kangaslahti, Pekka (Inventor); Tanner, Alan B. (Inventor); Lim, Boon H. (Inventor)

    2017-01-01

    According to one embodiment, a cross-correlator comprises a plurality of analog front ends (AFEs), a cross-correlation circuit and a data serializer. Each of the AFEs comprises a variable gain amplifier (VGA) and a corresponding analog-to-digital converter (ADC) in which the VGA receives and modifies a unique analog signal associates with a measured analog radio frequency (RF) signal and the ADC produces digital data associated with the modified analog signal. Communicatively coupled to the AFEs, the cross-correlation circuit performs a cross-correlation operation on the digital data produced from different measured analog RF signals. The data serializer is communicatively coupled to the summing and cross-correlating matrix and continuously outputs a prescribed amount of the correlated digital data.

  20. Development of analog watch with minute repeater

    Science.gov (United States)

    Okigami, Tomio; Aoyama, Shigeru; Osa, Takashi; Igarashi, Kiyotaka; Ikegami, Tomomi

    A complementary metal oxide semiconductor with large scale integration was developed for an electronic minute repeater. It is equipped with the synthetic struck sound circuit to generate natural struck sound necessary for the minute repeater. This circuit consists of an envelope curve drawing circuit, frequency mixer, polyphonic mixer, and booster circuit made by using analog circuit technology. This large scale integration is a single chip microcomputer with motor drivers and input ports in addition to the synthetic struck sound circuit, and it is possible to make an electronic system of minute repeater at a very low cost in comparison with the conventional type.

  1. Measurements of complex impedance in microwave high power systems with a new bluetooth integrated circuit.

    Science.gov (United States)

    Roussy, Georges; Dichtel, Bernard; Chaabane, Haykel

    2003-01-01

    By using a new integrated circuit, which is marketed for bluetooth applications, it is possible to simplify the method of measuring the complex impedance, complex reflection coefficient and complex transmission coefficient in an industrial microwave setup. The Analog Devices circuit AD 8302, which measures gain and phase up to 2.7 GHz, operates with variable level input signals and is less sensitive to both amplitude and frequency fluctuations of the industrial magnetrons than are mixers and AM crystal detectors. Therefore, accurate gain and phase measurements can be performed with low stability generators. A mechanical setup with an AD 8302 is described; the calibration procedure and its performance are presented.

  2. An analog front-end bipolar-transistor integrated circuit for the SDC silicon tracker

    International Nuclear Information System (INIS)

    Kipnis, I.; Spieler, H.; Collins, T.

    1994-01-01

    Since 1989 the Solenoidal Detector Collaboration (SDC) has been developing a general purpose detector to be operated at the Superconducting Super Collider (SSC). A low-noise, low-power, high-bandwidth, radiation hard, silicon bipolar-transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDS silicon tracker. The IC was designed and tested at LBL and was fabricated using AT and T's CBIC-U2, 4 GHz f T complementary bipolar technology. Each channel contains the following functions: low-noise preamplification, pulse shaping and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 μm pitch double-sided silicon strip detector. The chip measures 6.8 mm x 3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. rms at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to 4 times the noise level, a 16nsec time-walk for 1.25 to 10 fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a φ = 10 14 protons/cm 2 have been performed on the JC, demonstrating the radiation hardness of the complementary bipolar process

  3. Developing a 300C Analog Tool for EGS

    Energy Technology Data Exchange (ETDEWEB)

    Normann, Randy

    2015-03-23

    This paper covers the development of a 300°C geothermal well monitoring tool for supporting future EGS (enhanced geothermal systems) power production. This is the first of 3 tools planed. This is an analog tool designed for monitoring well pressure and temperature. There is discussion on 3 different circuit topologies and the development of the supporting surface electronics and software. There is information on testing electronic circuits and component. One of the major components is the cable used to connect the analog tool to the surface.

  4. System-level techniques for analog performance enhancement

    CERN Document Server

    Song, Bang-Sup

    2016-01-01

    This book shows readers to avoid common mistakes in circuit design, and presents classic circuit concepts and design approaches from the transistor to the system levels. The discussion is geared to be accessible and optimized for practical designers who want to learn to create circuits without simulations. Topic by topic, the author guides designers to learn the classic analog design skills by understanding the basic electronics principles correctly, and further prepares them to feel confident in designing high-performance, state-of-the art CMOS analog systems. This book combines and presents all in-depth necessary information to perform various design tasks so that readers can grasp essential material, without reading through the entire book. This top-down approach helps readers to build practical design expertise quickly, starting from their understanding of electronics fundamentals. .

  5. Dendritic nonlinearities are tuned for efficient spike-based computations in cortical circuits.

    Science.gov (United States)

    Ujfalussy, Balázs B; Makara, Judit K; Branco, Tiago; Lengyel, Máté

    2015-12-24

    Cortical neurons integrate thousands of synaptic inputs in their dendrites in highly nonlinear ways. It is unknown how these dendritic nonlinearities in individual cells contribute to computations at the level of neural circuits. Here, we show that dendritic nonlinearities are critical for the efficient integration of synaptic inputs in circuits performing analog computations with spiking neurons. We developed a theory that formalizes how a neuron's dendritic nonlinearity that is optimal for integrating synaptic inputs depends on the statistics of its presynaptic activity patterns. Based on their in vivo preynaptic population statistics (firing rates, membrane potential fluctuations, and correlations due to ensemble dynamics), our theory accurately predicted the responses of two different types of cortical pyramidal cells to patterned stimulation by two-photon glutamate uncaging. These results reveal a new computational principle underlying dendritic integration in cortical neurons by suggesting a functional link between cellular and systems--level properties of cortical circuits.

  6. A CMOS four-quadrant analog current multiplier

    NARCIS (Netherlands)

    Wiegerink, Remco J.

    1991-01-01

    A CMOS four-quadrant analog current multiplier is described. The circuit is based on the square-law characteristic of an MOS transistor and is insensitive to temperature and process variations. The circuit is insensitive to the body effect so it is not necessary to place transistors in individual

  7. Advanced circuit simulation using Multisim workbench

    CERN Document Server

    Báez-López, David; Cervantes-Villagómez, Ofelia Delfina

    2012-01-01

    Multisim is now the de facto standard for circuit simulation. It is a SPICE-based circuit simulator which combines analog, discrete-time, and mixed-mode circuits. In addition, it is the only simulator which incorporates microcontroller simulation in the same environment. It also includes a tool for printed circuit board design.Advanced Circuit Simulation Using Multisim Workbench is a companion book to Circuit Analysis Using Multisim, published by Morgan & Claypool in 2011. This new book covers advanced analyses and the creation of models and subcircuits. It also includes coverage of transmissi

  8. Accurate Electromagnetic Modeling Methods for Integrated Circuits

    NARCIS (Netherlands)

    Sheng, Z.

    2010-01-01

    The present development of modern integrated circuits (IC’s) is characterized by a number of critical factors that make their design and verification considerably more difficult than before. This dissertation addresses the important questions of modeling all electromagnetic behavior of features on

  9. Synthesis of computational structures for analog signal processing

    CERN Document Server

    Popa, Cosmin Radu

    2011-01-01

    Presents the most important classes of computational structures for analog signal processing, including differential or multiplier structures, squaring or square-rooting circuits, exponential or Euclidean distance structures and active resistor circuitsIntroduces the original concept of the multifunctional circuit, an active structure that is able to implement, starting from the same circuit core, a multitude of continuous mathematical functionsCovers mathematical analysis, design and implementation of a multitude of function generator structures

  10. Process and circuiting arrangement for the conversion of analog signals to digital signals and digital signals to analog signals

    International Nuclear Information System (INIS)

    Wintzer, K.

    1977-01-01

    Process for analog-to-digital and digital-to-analog conversion in telecommunication systems whose outstations each have an analog transmitter and an analog receiver. The invention illustrates a method of reducing the power demand of the converters at times when no conversion processes take place. (RW) [de

  11. RF Circuit Design in Nanometer CMOS

    NARCIS (Netherlands)

    Nauta, Bram

    2007-01-01

    With CMOS technology entering the nanometer regime, the design of analog and RF circuits is complicated by low supply voltages, very non-linear (and nonquadratic) devices and large 1/f noise. At the same time, circuits are required to operate over increasingly wide bandwidths to implement modern

  12. Analog IC Design at the University of Twente

    NARCIS (Netherlands)

    Nauta, Bram

    2007-01-01

    This article describes some recent research results from the IC Design group of the University of Twente, located in Enschede, The Netherlands. Our research focuses on analog CMOS circuit design with emphasis on high frequency and broadband circuits. With the trend of system integration in mind, we

  13. HAPS, a Handy Analog Programming System

    DEFF Research Database (Denmark)

    Højberg, Kristian Søe

    1975-01-01

    HAPS (Hybrid Analog Programming System) is an analog compiler that can be run on a minicomputer in an interactive mode. Essentially HAPS is written in FORTRAN. The equations to be programmed for an ana log computer are read in by using a FORTRAN-like notation. The input must contain maximum...... and emphasizes the limitations HAPS puts on equation structure, types of computing circuit, scaling, and static testing....

  14. Multifractal detrended fluctuation analysis of analog random multiplicative processes

    Energy Technology Data Exchange (ETDEWEB)

    Silva, L.B.M.; Vermelho, M.V.D. [Instituto de Fisica, Universidade Federal de Alagoas, Maceio - AL, 57072-970 (Brazil); Lyra, M.L. [Instituto de Fisica, Universidade Federal de Alagoas, Maceio - AL, 57072-970 (Brazil)], E-mail: marcelo@if.ufal.br; Viswanathan, G.M. [Instituto de Fisica, Universidade Federal de Alagoas, Maceio - AL, 57072-970 (Brazil)

    2009-09-15

    We investigate non-Gaussian statistical properties of stationary stochastic signals generated by an analog circuit that simulates a random multiplicative process with weak additive noise. The random noises are originated by thermal shot noise and avalanche processes, while the multiplicative process is generated by a fully analog circuit. The resulting signal describes stochastic time series of current interest in several areas such as turbulence, finance, biology and environment, which exhibit power-law distributions. Specifically, we study the correlation properties of the signal by employing a detrended fluctuation analysis and explore its multifractal nature. The singularity spectrum is obtained and analyzed as a function of the control circuit parameter that tunes the asymptotic power-law form of the probability distribution function.

  15. Circuit II--A Conversational Graphical Interface.

    Science.gov (United States)

    Singer, Ronald A.

    1993-01-01

    Provides an overview of Circuit II, an interactive system that provides users with a graphical representation of an electronic circuit within which questions may be posed and manipulated, and discusses how mouse selections have analogous roles to certain natural language features, such as anaphora, deixis, and ellipsis. (13 references) (EA)

  16. Radio-frequency integrated-circuit engineering

    CERN Document Server

    Nguyen, Cam

    2015-01-01

    Radio-Frequency Integrated-Circuit Engineering addresses the theory, analysis and design of passive and active RFIC's using Si-based CMOS and Bi-CMOS technologies, and other non-silicon based technologies. The materials covered are self-contained and presented in such detail that allows readers with only undergraduate electrical engineering knowledge in EM, RF, and circuits to understand and design RFICs. Organized into sixteen chapters, blending analog and microwave engineering, Radio-Frequency Integrated-Circuit Engineering emphasizes the microwave engineering approach for RFICs. Provide

  17. Full Digital Short Circuit Protection for Advanced IGBTs

    OpenAIRE

    谷村, 拓哉; 湯浅, 一史; 大村, 一郎

    2011-01-01

    A full digital short circuit protection method for advanced IGBTs has been proposed and experimentally demonstrated for the first time. The method employs combination of digital circuit, the gate charge sense instead of the conventional sense IGBT and analog circuit configuration. Digital protection scheme has significant advantages in thevprotection speed and flexibility.

  18. Project for a codable central unit for analog data acquisition

    International Nuclear Information System (INIS)

    Bouras, F.; Da Costa Vieira, D.; Sohier, B.

    1974-07-01

    The instrumentation for a 256 channel codable central processor intended for an operation in connection with a computer is presented. The computer indicates the adresses of the channels to be measured, orders the conversion, and acquires the results of measurements. The acquisition and computer coupling unit is located in a standard rock CAMAC (6 U 19inch., 25 positions); an example of configuration is given. The measurement velocity depends on the converter speed and dead time of analog circuits; for a ADC 1103 converter the total dead time is 6.5s min. The analog circuits are intended for +-10V range, the accuracy is 1/2n (2n is the number of bits). The result is acquired in words of 12 bits maximum. The information transfer and analog commutation (through integrated analog gates) are discussed [fr

  19. Signal processing: opportunities for superconductive circuits

    International Nuclear Information System (INIS)

    Ralston, R.W.

    1985-01-01

    Prime motivators in the evolution of increasingly sophisticated communication and detection systems are the needs for handling ever wider signal bandwidths and higher data processing speeds. These same needs drive the development of electronic device technology. Until recently the superconductive community has been tightly focused on digital devices for high speed computers. The purpose of this paper is to describe opportunities and challenges which exist for both analog and digital devices in a less familiar area, that of wideband signal processing. The function and purpose of analog signal-processing components, including matched filters, correlators and Fourier transformers, will be described and examples of superconductive implementations given. A canonic signal-processing system is then configured using these components in combination with analog/digital converters and digital output circuits to highlight the important issues of dynamic range, accuracy and equivalent computation rate. Superconductive circuits hold promise for processing signals of 10-GHz bandwidth. Signal processing systems, however, can be properly designed and implemented only through a synergistic combination of the talents of device physicists, circuit designers, algorithm architects and system engineers. An immediate challenge to the applied superconductivity community is to begin sharing ideas with these other researchers

  20. Fast parallel-series analog-to-digital converter

    International Nuclear Information System (INIS)

    Pogosov, A.Yu.

    1987-01-01

    Fast analog-to-digital converters are used in systems for detection of rapid processes, nuclear spectroscopy. A 12-digit analog-to-digital converter with conversion time of 160 ns and conversion frequency of 8.3 MHz is described; a segmented digital-to-analog converter with differential non-linearity of < 0.01% and a differential amplifier-limiter with setting time of 80 ns at the error of 0.2% are utilized in the converter; a control device is based on the chain of flip-flop circuit

  1. AMIC: an expandable integrated analog front-end for light distribution moments analysis

    OpenAIRE

    SPAGGIARI, MICHELE; Herrero Bosch, Vicente; Lerche, Christoph Werner; Aliaga Varea, Ramón José; Monzó Ferrer, José María; Gadea Gironés, Rafael

    2011-01-01

    In this article we introduce AMIC (Analog Moments Integrated Circuit), a novel analog Application Specific Integrated Circuit (ASIC) front-end for Positron Emission Tomography (PET) applications. Its working principle is based on mathematical analysis of light distribution through moments calculation. Each moment provides useful information about light distribution, such as energy, position, depth of interaction, skewness (deformation due to border effect) etc. A current buffer delivers a cop...

  2. Analog implementation of an integral resonant control scheme

    International Nuclear Information System (INIS)

    Pereira, E; Moheimani, S O R; Aphale, S S

    2008-01-01

    Integral resonant control (IRC) has been introduced as a high performance controller design methodology for flexible structures with collocated actuator–sensor pairs. IRC has a simple structure and is capable of achieving significant damping, over several modes, while guaranteeing closed-loop stability of the system in the presence of unmodeled out-of-bandwidth dynamics. IRC can be an ideal controller for various industrial damping applications, if packaged in a simple easy-to-implement electronic module. This work proposes an analog implementation of the IRC scheme using a single Op-Amp circuit. The objective is to show that with simple analog realization of the modified IRC scheme, it is possible to damp a large number of vibration modes. A brief discussion about the modeling, circuit considerations, implementation and experimental results is presented in order to validate the usefulness and practicality of the proposed analog IRC implementation. (technical note)

  3. Wavelet-Based Feature Extraction in Fault Diagnosis for Biquad High-Pass Filter Circuit

    OpenAIRE

    Yuehai Wang; Yongzheng Yan; Qinyong Wang

    2016-01-01

    Fault diagnosis for analog circuit has become a prominent factor in improving the reliability of integrated circuit due to its irreplaceability in modern integrated circuits. In fact fault diagnosis based on intelligent algorithms has become a popular research topic as efficient feature extraction and selection are a critical and intricate task in analog fault diagnosis. Further, it is extremely important to propose some general guidelines for the optimal feature extraction and selection. In ...

  4. Analog-to-digital conversion using custom CMOS analog memory for the EOS time projection chamber

    International Nuclear Information System (INIS)

    Lee, K.L.; Arthur, A.A.; Jones, R.W.; Matis, H.S.; Nakamura, M.; Kleinfelder, S.A.; Ritter, H.G.; Wienman, H.H.

    1990-01-01

    This paper describes the multiplexing scheme of custom CMOS analog memory integrated circuits, 16 channels x 256 cells, into analog to digital converters (ADC's) to handle 15,360 signal channels of a time projection, chamber detector system. Primary requirements of this system are high density, low power and large dynamic range. The analog memory device multiplexing scheme was designed to digitize the information stored in the memory cells. The digitization time of the ADC's and the settling times for the memory unit were carefully interleaved to optimize the performance and timing during the multiplexing operation. This kept the total number of ADC's, a costly and power dissipative component, to an acceptable minimum

  5. Structure problems in the analog computation

    International Nuclear Information System (INIS)

    Braffort, P.L.

    1957-01-01

    The recent mathematical development showed the importance of elementary structures (algebraic, topological, etc.) in abeyance under the great domains of classical analysis. Such structures in analog computation are put in evidence and possible development of applied mathematics are discussed. It also studied the topological structures of the standard representation of analog schemes such as additional triangles, integrators, phase inverters and functions generators. The analog method gives only the function of the variable: time, as results of its computations. But the course of computation, for systems including reactive circuits, introduces order structures which are called 'chronological'. Finally, it showed that the approximation methods of ordinary numerical and digital computation present the same structure as these analog computation. The structure analysis permits fruitful comparisons between the several domains of applied mathematics and suggests new important domains of application for analog method. (M.P.)

  6. Phase-locked loops. [in analog and digital circuits communication system

    Science.gov (United States)

    Gupta, S. C.

    1975-01-01

    An attempt to systematically outline the work done in the area of phase-locked loops which are now used in modern communication system design is presented. The analog phase-locked loops are well documented in several books but discrete, analog-digital, and digital phase-locked loop work is scattered. Apart from discussing the various analysis, design, and application aspects of phase-locked loops, a number of references are given in the bibliography.

  7. Circuits in the Sun: Solar Panel Physics

    Science.gov (United States)

    Gfroerer, Tim

    2013-01-01

    Typical commercial solar panels consist of approximately 60 individual photovoltaic cells connected in series. Since the usual Kirchhoff rules apply, the current is uniform throughout the circuit, while the electric potential of the individual devices is cumulative. Hence, a solar panel is a good analog of a simple resistive series circuit, except…

  8. Configurable Analog-Digital Conversion Using the Neural EngineeringFramework

    Directory of Open Access Journals (Sweden)

    Christian G Mayr

    2014-07-01

    Full Text Available Efficient Analog-Digital Converters (ADC are one of the mainstays of mixed-signal integrated circuit design. Besides the conventional ADCs used in mainstream ICs, there have been various attempts in the past to utilize neuromorphic networks to accomplish an efficient crossing between analog and digital domains, i.e. to build neurally inspired ADCs. Generally, these have suffered from the same problems as conventional ADCs, that is they require high-precision, handcrafted analog circuits and are thus not technology portable. In this paper, we present an ADC based on the Neural Engineering Framework (NEF. It carries out a large fraction of the overall ADC process in the digital domain, i.e. it is easily portable across technologies. The analog-digital conversion takes full advantage of the high degree of parallelism inherent in neuromorphic networks, making for a very scalable ADC. In addition, it has a number of features not commonly found in conventional ADCs, such as a runtime reconfigurability of the ADC sampling rate, resolution and transfer characteristic.

  9. Design rules for superconducting analog-digital transducers

    International Nuclear Information System (INIS)

    Haddad, Taghrid

    2015-01-01

    This Thesis is a contribution for dimensioning aspects of circuits designs in superconductor electronics. Mainly superconductor comparators inclusive Josephson comparators as well as QOJS-Comparators are investigated. Both types were investigated in terms of speed and sensitivity. The influence of the thermal noise on the decision process of the comparators represent in so called gray zone, which is analysed in this thesis. Thereby, different relations between design parameters were derived. A circuit model of the Josephson comparator was verified by experiments. Concepts of superconductor analog-to-digital converters, which are based on above called comparators, were investigated in detail. From the comparator design rules, new rules for AD-converters were derived. Because of the reduced switching energy, the signal to noise ratio (SNR) of the circuits is affected and therefore the reliability of the decision-process is affected. For special applications with very demanding requirements in terms of the speed and accuracy superconductor analog-to-digital converters offer an excellent performance. This thesis provides relations between different design paramenters and shows resulting trade-offs, This method is transparent and easy to transfer to other circuit topologies. As a main result, a highly predictive tool for dimensioning of superconducting ADC's is proved.

  10. Printed circuits and their applications: Which way forward?

    Science.gov (United States)

    Cantatore, E.

    2015-09-01

    The continuous advancements in printed electronics make nowadays feasible the design of printed circuits which enable meaningful applications. Examples include ultra-low cost sensors embedded in food packaging, large-area sensing surfaces and biomedical assays. This paper offers an overview of state-of-the-art digital and analog circuit blocks, manufactured with a printed complementary organic TFT technology. An analog to digital converter and an RFID tag implemented exploiting these building blocks are also described. The main remaining drawbacks of the printed technology described are identified, and new approaches to further improve the state of the art, enabling more innovative applications are discussed.

  11. Integrated coherent matter wave circuits

    International Nuclear Information System (INIS)

    Ryu, C.; Boshier, M. G.

    2015-01-01

    An integrated coherent matter wave circuit is a single device, analogous to an integrated optical circuit, in which coherent de Broglie waves are created and then launched into waveguides where they can be switched, divided, recombined, and detected as they propagate. Applications of such circuits include guided atom interferometers, atomtronic circuits, and precisely controlled delivery of atoms. We report experiments demonstrating integrated circuits for guided coherent matter waves. The circuit elements are created with the painted potential technique, a form of time-averaged optical dipole potential in which a rapidly moving, tightly focused laser beam exerts forces on atoms through their electric polarizability. Moreover, the source of coherent matter waves is a Bose-Einstein condensate (BEC). Finally, we launch BECs into painted waveguides that guide them around bends and form switches, phase coherent beamsplitters, and closed circuits. These are the basic elements that are needed to engineer arbitrarily complex matter wave circuitry

  12. Analogical reasoning: An incremental or insightful process? What cognitive and cortical evidence suggests.

    Science.gov (United States)

    Antonietti, Alessandro; Balconi, Michela

    2010-06-01

    Abstract The step-by-step, incremental nature of analogical reasoning can be questioned, since analogy making appears to be an insight-like process. This alternative view of analogical thinking can be integrated in Speed's model, even though the alleged role played by dopaminergic subcortical circuits needs further supporting evidence.

  13. Do Skilled Elementary Teachers Hold Scientific Conceptions and Can They Accurately Predict the Type and Source of Students' Preconceptions of Electric Circuits?

    Science.gov (United States)

    Lin, Jing-Wen

    2016-01-01

    Holding scientific conceptions and having the ability to accurately predict students' preconceptions are a prerequisite for science teachers to design appropriate constructivist-oriented learning experiences. This study explored the types and sources of students' preconceptions of electric circuits. First, 438 grade 3 (9 years old) students were…

  14. Multichannel analog temperature sensing system

    International Nuclear Information System (INIS)

    Gribble, R.

    1985-08-01

    A multichannel system that protects the numerous and costly water-cooled magnet coils on the translation section of the FRX-C/T magnetic fusion experiment is described. The system comprises a thermistor for each coil, a constant current circuit for each thermistor, and a multichannel analog-to-digital converter interfaced to the computer

  15. Grounding and shielding circuits and interference

    CERN Document Server

    Morrison, Ralph

    2016-01-01

    Applies basic field behavior in circuit design and demonstrates how it relates to grounding and shielding requirements and techniques in circuit design This book connects the fundamentals of electromagnetic theory to the problems of interference in all types of electronic design. The text covers power distribution in facilities, mixing of analog and digital circuitry, circuit board layout at high clock rates, and meeting radiation and susceptibility standards. The author examines the grounding and shielding requirements and techniques in circuit design and applies basic physics to circuit behavior. The sixth edition of this book has been updated with new material added throughout the chapters where appropriate. The presentation of the book has also been rearranged in order to reflect the current trends in the field.

  16. Memristor-based nanoelectronic computing circuits and architectures

    CERN Document Server

    Vourkas, Ioannis

    2016-01-01

    This book considers the design and development of nanoelectronic computing circuits, systems and architectures focusing particularly on memristors, which represent one of today’s latest technology breakthroughs in nanoelectronics. The book studies, explores, and addresses the related challenges and proposes solutions for the smooth transition from conventional circuit technologies to emerging computing memristive nanotechnologies. Its content spans from fundamental device modeling to emerging storage system architectures and novel circuit design methodologies, targeting advanced non-conventional analog/digital massively parallel computational structures. Several new results on memristor modeling, memristive interconnections, logic circuit design, memory circuit architectures, computer arithmetic systems, simulation software tools, and applications of memristors in computing are presented. High-density memristive data storage combined with memristive circuit-design paradigms and computational tools applied t...

  17. Analog/RF Circuit Design Techniques for Nanometerscale IC Technologies

    NARCIS (Netherlands)

    Nauta, Bram; Annema, Anne J.

    CMOS evolution introduces several problems in analog design. Gate-leakage mismatch exceeds conventional matching tolerances requiring active cancellation techniques or alternative architectures. One strategy to deal with the use of lower supply voltages is to operate critical parts at higher supply

  18. Modeling a verification test system for mixed-signal circuits

    NARCIS (Netherlands)

    San Segundo Bello, D.; Tangelder, R.J.W.T.; Kerkhoff, Hans G.

    In contrast to the large number of logic gates and storage circuits encountered in digital networks, purely analog networks usually have relatively few circuit primitives (operational amplifiers and so on). The complexity lies not in the number of building blocks but in the complexity of each block

  19. Ultra low-power integrated circuit design for wireless neural interfaces

    CERN Document Server

    Holleman, Jeremy; Otis, Brian

    2014-01-01

    Presenting results from real prototype systems, this volume provides an overview of ultra low-power integrated circuits and systems for neural signal processing and wireless communication. Topics include analog, radio, and signal processing theory and design for ultra low-power circuits.

  20. A Quantized Analog Delay for an ir-UWB Quadrature Downconversion Autocorrelation Receiver

    NARCIS (Netherlands)

    Bagga, S.; Zhang, L.; Serdijn, W.A.; Long, J.R.; Busking, E.B.

    2005-01-01

    A quantized analog delay is designed as a requirement for the autocorrelation function in the quadrature downconversion autocorrelation receiver (QDAR). The quantized analog delay is comprised of a quantizer, multiple binary delay lines and an adder circuit. Being the foremost element, the quantizer

  1. Silicon CMOS optical receiver circuits with integrated thin-film compound semiconductor detectors

    Science.gov (United States)

    Brooke, Martin A.; Lee, Myunghee; Jokerst, Nan Marie; Camperi-Ginestet, C.

    1995-04-01

    While many circuit designers have tackled the problem of CMOS digital communications receiver design, few have considered the problem of circuitry suitable for an all CMOS digital IC fabrication process. Faced with a high speed receiver design the circuit designer will soon conclude that a high speed analog-oriented fabrication process provides superior performance advantages to a digital CMOS process. However, for applications where there are overwhelming reasons to integrate the receivers on the same IC as large amounts of conventional digital circuitry, the low yield and high cost of the exotic analog-oriented fabrication is no longer an option. The issues that result from a requirement to use a digital CMOS IC process cut across all aspects of receiver design, and result in significant differences in circuit design philosophy and topology. Digital ICs are primarily designed to yield small, fast CMOS devices for digital logic gates, thus no effort is put into providing accurate or high speed resistances, or capacitors. This lack of any reliable resistance or capacitance has a significant impact on receiver design. Since resistance optimization is not a prerogative of the digital IC process engineer, the wisest option is thus to not use these elements, opting instead for active circuitry to replace the functions normally ascribed to resistance and capacitance. Depending on the application receiver noise may be a dominant design constraint. The noise performance of CMOS amplifiers is different than bipolar or GaAs MESFET circuits, shot noise is generally insignificant when compared to channel thermal noise. As a result the optimal input stage topology is significantly different for the different technologies. It is found that, at speeds of operation approaching the limits of the digital CMOS process, open loop designs have noise-power-gain-bandwidth tradeoff performance superior to feedback designs. Furthermore, the lack of good resisters and capacitors

  2. Introduction to engineering a starter's guide with hands-on analog multimedia explorations

    CERN Document Server

    Karam, Lina

    2008-01-01

    This lecture provides a hands-on glimpse of the field of electrical engineering. The introduced applications utilize the NI ELVIS hardware and software platform to explore concepts such as circuits, power, analog sensing, and introductory analog signal processing such as signal generation, analog filtering, and audio and music processing. These principals and technologies are introduced in a very practical way and are fundamental to many of the electronic devices we use today. Some examples include photodetection, analog signal (audio, light, temperature) level meter, and analog music equalize

  3. A simple structure wavelet transform circuit employing function link neural networks and SI filters

    Science.gov (United States)

    Mu, Li; Yigang, He

    2016-12-01

    Signal processing by means of analog circuits offers advantages from a power consumption viewpoint. Implementing wavelet transform (WT) using analog circuits is of great interest when low-power consumption becomes an important issue. In this article, a novel simple structure WT circuit in analog domain is presented by employing functional link neural network (FLNN) and switched-current (SI) filters. First, the wavelet base is approximated using FLNN algorithms for giving a filter transfer function that is suitable for simple structure WT circuit implementation. Next, the WT circuit is constructed with the wavelet filter bank, whose impulse response is the approximated wavelet and its dilations. The filter design that follows is based on a follow-the-leader feedback (FLF) structure with multiple output bilinear SI integrators and current mirrors as the main building blocks. SI filter is well suited for this application since the dilation constant across different scales of the transform can be precisely implemented and controlled by the clock frequency of the circuit with the same system architecture. Finally, to illustrate the design procedure, a seventh-order FLNN-approximated Gaussian wavelet is implemented as an example. Simulations have successfully verified that the designed simple structure WT circuit has low sensitivity, low-power consumption and litter effect to the imperfections.

  4. Doubling-resolution analog-to-digital conversion based on PIC18F45K80

    Directory of Open Access Journals (Sweden)

    Yueyang Yuan

    2014-08-01

    Full Text Available Aiming at the analog signal being converted into the digital with a higher precision, a method to improve the analog-to-digital converter (ADC resolution is proposed and described. Based on the microcomputer PIC18F45K80 in which the internal ADC modules are embedded, a circuit is designed for doubling the resolution of ADC. According to the circuit diagram, the mathematical formula for calculating this resolution is derived. The corresponding software and print circuit board assembly is also prepared. With the experiment, a 13 bit ADC is achieved based on the 12 bit ADC module predesigned in the PIC18F45K80.

  5. Accurate Models for Evaluating the Direct Conducted and Radiated Emissions from Integrated Circuits

    Directory of Open Access Journals (Sweden)

    Domenico Capriglione

    2018-03-01

    Full Text Available This paper deals with the electromagnetic compatibility (EMC issues related to the direct and radiated emissions from a high-speed integrated circuits (ICs. These emissions are evaluated here by means of circuital and electromagnetic models. As for the conducted emission, an equivalent circuit model is derived to describe the IC and the effect of its loads (package, printed circuit board, decaps, etc., based on the Integrated Circuit Emission Model template (ICEM. As for the radiated emission, an electromagnetic model is proposed, based on the superposition of the fields generated in the far field region by the loop currents flowing into the IC and the package pins. A custom experimental setup is designed for validating the models. Specifically, for the radiated emission measurement, a custom test board is designed and realized, able to highlight the contribution of the direct emission from the IC, usually hidden by the indirect emission coming from the printed circuit board. Measurements of the package currents and of the far-field emitted fields are carried out, providing a satisfactory agreement with the model predictions.

  6. Active component modeling for analog integrated circuit design. Model parametrization and implementation in the SPICE-PAC circuit simulator

    International Nuclear Information System (INIS)

    Marchal, Xavier

    1992-01-01

    In order to use CAD efficiently in the analysis and design of electronic Integrated circuits, adequate modeling of active non-linear devices such as MOSFET transistors must be available to the designer. Many mathematical forms can be given to those models, such as explicit relations, or implicit equations to be solved. A major requirement in developing MOS transistor models for IC simulation is the availability of electrical characteristic curves over a wide range of channel width and length, including the sub-micrometer range. To account in a convenient way for bulk charge influence on I_D_S = f(V_D_S, V_G_S, v_B_S) device characteristics, all 3 standard SPICE MOS models use an empirical fitting parameter called the 'charge sharing factor'. Unfortunately, this formulation produces models which only describe correctly either some of the short channel phenomena, or some particular operating conditions (low injection, avalanche effect, etc.). We present here a cellular model (CDM = Charge Distributed Model) implemented in the open modular SPICE-PAC Simulator; this model is derived from the 4-terminal WANG charge controlled MOSFET model, using the charge sheet approximation. The CDM model describes device characteristics in ail operating regions without introducing drain current discontinuities and without requiring a 'charge sharing factor'. A usual problem to be faced by designers when they simulate MOS ICs is to find a reliable source of model parameters. Though most models have a physical basis, some of their parameters cannot be easily estimated from physical considerations. It can also happen that physically determined parameters values do not produce a good fit to measured device characteristics. Thus it is generally necessary to extract model parameters from measured transistor data, to ensure that model equations approximate measured curves accurately enough. Model parameters extraction can be done in 2 different ways, exposed in this thesis. The first

  7. Modern analog filter analysis and design a practical approach

    CERN Document Server

    Raut, R

    2011-01-01

    Starting from the fundamentals, the present book describes methods of designing analog electronic filters and illustrates these methods by providing numerical and circuit simulation programs. The subject matters comprise many concepts and techniques that are not available in other text books on the market. To name a few - principle of transposition and its application in directly realizing current mode filters from well known voltage mode filters; an insight into the technological aspect of integrated circuit components used to implement an integrated circuit filter; a careful blending of basi

  8. Analysis of Recurrent Analog Neural Networks

    Directory of Open Access Journals (Sweden)

    Z. Raida

    1998-06-01

    Full Text Available In this paper, an original rigorous analysis of recurrent analog neural networks, which are built from opamp neurons, is presented. The analysis, which comes from the approximate model of the operational amplifier, reveals causes of possible non-stable states and enables to determine convergence properties of the network. Results of the analysis are discussed in order to enable development of original robust and fast analog networks. In the analysis, the special attention is turned to the examination of the influence of real circuit elements and of the statistical parameters of processed signals to the parameters of the network.

  9. Component-Level Electronic-Assembly Repair (CLEAR) Spacecraft Circuit Diagnostics by Analog and Complex Signature Analysis

    Science.gov (United States)

    Oeftering, Richard C.; Wade, Raymond P.; Izadnegahdar, Alain

    2011-01-01

    The Component-Level Electronic-Assembly Repair (CLEAR) project at the NASA Glenn Research Center is aimed at developing technologies that will enable space-flight crews to perform in situ component-level repair of electronics on Moon and Mars outposts, where there is no existing infrastructure for logistics spares. These technologies must provide effective repair capabilities yet meet the payload and operational constraints of space facilities. Effective repair depends on a diagnostic capability that is versatile but easy to use by crew members that have limited training in electronics. CLEAR studied two techniques that involve extensive precharacterization of "known good" circuits to produce graphical signatures that provide an easy-to-use comparison method to quickly identify faulty components. Analog Signature Analysis (ASA) allows relatively rapid diagnostics of complex electronics by technicians with limited experience. Because of frequency limits and the growing dependence on broadband technologies, ASA must be augmented with other capabilities. To meet this challenge while preserving ease of use, CLEAR proposed an alternative called Complex Signature Analysis (CSA). Tests of ASA and CSA were used to compare capabilities and to determine if the techniques provided an overlapping or complementary capability. The results showed that the methods are complementary.

  10. Synthesizing genetic sequential logic circuit with clock pulse generator.

    Science.gov (United States)

    Chuang, Chia-Hua; Lin, Chun-Liang

    2014-05-28

    Rhythmic clock widely occurs in biological systems which controls several aspects of cell physiology. For the different cell types, it is supplied with various rhythmic frequencies. How to synthesize a specific clock signal is a preliminary but a necessary step to further development of a biological computer in the future. This paper presents a genetic sequential logic circuit with a clock pulse generator based on a synthesized genetic oscillator, which generates a consecutive clock signal whose frequency is an inverse integer multiple to that of the genetic oscillator. An analogous electronic waveform-shaping circuit is constructed by a series of genetic buffers to shape logic high/low levels of an oscillation input in a basic sinusoidal cycle and generate a pulse-width-modulated (PWM) output with various duty cycles. By controlling the threshold level of the genetic buffer, a genetic clock pulse signal with its frequency consistent to the genetic oscillator is synthesized. A synchronous genetic counter circuit based on the topology of the digital sequential logic circuit is triggered by the clock pulse to synthesize the clock signal with an inverse multiple frequency to the genetic oscillator. The function acts like a frequency divider in electronic circuits which plays a key role in the sequential logic circuit with specific operational frequency. A cascaded genetic logic circuit generating clock pulse signals is proposed. Based on analogous implement of digital sequential logic circuits, genetic sequential logic circuits can be constructed by the proposed approach to generate various clock signals from an oscillation signal.

  11. Monolitic integrated circuit for the strobed charge-to-time converter

    International Nuclear Information System (INIS)

    Bel'skij, V.I.; Bushnin, Yu.B.; Zimin, S.A.; Punzhin, Yu.N.; Sen'ko, V.A.; Soldatov, M.M.; Tokarchuk, V.P.

    1985-01-01

    The developed and comercially produced semiconducting circuit - gating charge-to-time converter KR1101PD1 is described. The considered integrated circuit is a short pulse charge-to-time converter with integration of input current. The circuit is designed for construction of time-to-pulse analog-to-digital converters utilized in multichannel detection systems when studying complex topology processes. Input resistance of the circuit is 0.1 Ω permissible input current is 50 mA, maximum measured charge is 300-1000 pC

  12. Low-Noise CMOS Circuits for On-Chip Signal Processing in Focal-Plane Arrays

    Science.gov (United States)

    Pain, Bedabrata

    The performance of focal-plane arrays can be significantly enhanced through the use of on-chip signal processing. Novel, in-pixel, on-focal-plane, analog signal-processing circuits for high-performance imaging are presented in this thesis. The presence of a high background-radiation is a major impediment for infrared focal-plane array design. An in-pixel, background-suppression scheme, using dynamic analog current memory circuit, is described. The scheme also suppresses spatial noise that results from response non-uniformities of photo-detectors, leading to background limited infrared detector readout performance. Two new, low-power, compact, current memory circuits, optimized for operation at ultra-low current levels required in infrared-detection, are presented. The first one is a self-cascading current memory that increases the output impedance, and the second one is a novel, switch feed-through reducing current memory, implemented using error-current feedback. This circuit can operate with a residual absolute -error of less than 0.1%. The storage-time of the memory is long enough to also find applications in neural network circuits. In addition, a voltage-mode, accurate, low-offset, low-power, high-uniformity, random-access sample-and-hold cell, implemented using a CCD with feedback, is also presented for use in background-suppression and neural network applications. A new, low noise, ultra-low level signal readout technique, implemented by individually counting photo-electrons within the detection pixel, is presented. The output of each unit-cell is a digital word corresponding to the intensity of the photon flux, and the readout is noise free. This technique requires the use of unit-cell amplifiers that feature ultra-high-gain, low-power, self-biasing capability and noise in sub-electron levels. Both single-input and differential-input implementations of such amplifiers are investigated. A noise analysis technique is presented for analyzing sampled

  13. Uncertainty estimation of non-ideal analog switches using programmable Josephson voltage standards for mutual inductance measurement in the joule balance

    International Nuclear Information System (INIS)

    Wang, Gang; Zhang, Zhonghua; Li, Zhengkun; Xu, Jinxin; You, Qiang

    2016-01-01

    Measurement of the mutual inductance is one of the key techniques in the joule balance to determine the Planck constant h, where a standard-square-wave compensation method was proposed to accurately measure the dc value of the mutual inductance. With this method, analog switches are used to compose an analog-switch signal generator to synthesize the excitation and compensation voltages. However, the accuracy of the compensation voltage is influenced by the non-ideal behaviors of analog-switches. In this paper, the effect from these non-ideal switches is analyzed in detail and evaluated with the equivalent circuits. A programmable Josephson voltage standard (PJVS) is used to generate a reference compensation voltage to measure the time integration of the voltage waveform generated by the analog-switch signal generator. Moreover, the effect is also evaluated experimentally by comparing the difference between the mutual inductance measured with the analog-switch signal generator and the value determined by the PJVS-analog-switch generator alternately in the same mutual inductance measurement system. The result shows that the impact of analog switches is 1.97  ×  10 −7 with an uncertainty of 1.83  ×  10 −7 (k  =  1) and confirms that the analog switch method can be used regularly instead of the PJVS in the mutual inductance measurement for the joule balance experiment. (paper)

  14. Computer-integrated environments for electronics problem by means of the analog simulator PSPICE; Komp`yuterno-integrirovannye sredy dlya problemnogo obucheniya po ehlektronike na osnove analogovogo simulyatora PSPICE

    Energy Technology Data Exchange (ETDEWEB)

    Mileva, I; Petrov, A; Pavlov, I [Plovdivskij Univ., Plovdiv (Bulgaria)

    1996-12-31

    For the problem teaching purpose the computer-integrated environments are developed for simulation of electronic circuits. CIE for study of typical analog electronic circuits called STUDENT`s MODULE are described. Simulation of electronic circuits carried out by means of the analog simulator PSPICE. 9 refs.; 3 figs.

  15. Full-Circle Resolver-to-Linear-Analog Converter

    Science.gov (United States)

    Alhorn, Dean C.; Smith, Dennis A.; Howard, David E.

    2005-01-01

    A circuit generates sinusoidal excitation signals for a shaft-angle resolver and, like the arctangent circuit described in the preceding article, generates an analog voltage proportional to the shaft angle. The disadvantages of the circuit described in the preceding article arise from the fact that it must be made from precise analog subcircuits, including a functional block capable of implementing some trigonometric identities; this circuitry tends to be expensive, sensitive to noise, and susceptible to errors caused by temperature-induced drifts and imprecise matching of gains and phases. These disadvantages are overcome by the design of the present circuit. The present circuit (see figure) includes an excitation circuit, which generates signals Ksin(Omega(t)) and Kcos(Omega(t)) [where K is an amplitude, Omega denotes 2(pi)x a carrier frequency (the design value of which is 10 kHz), and t denotes time]. These signals are applied to the excitation terminals of a shaft-angle resolver, causing the resolver to put out signals C sin(Omega(t)-Theta) and C cos(Omega(t)-Theta). The cosine excitation signal and the cosine resolver output signal are processed through inverting comparator circuits, which are configured to function as inverting squarers, to obtain logic-level or square-wave signals .-LL[cos(Omega(t)] and -LL[cos(Omega(t)-Theta)], respectively. These signals are fed as inputs to a block containing digital logic circuits that effectively measure the phase difference (which equals Theta between the two logic-level signals). The output of this block is a pulse-width-modulated signal, PWM(Theta), the time-averaged value of which ranges from 0 to 5 VDC as Theta ranges from .180 to +180deg. PWM(Theta) is fed to a block of amplifying and level-shifting circuitry, which converts the input PWM waveform to an output waveform that switches between precise reference voltage levels of +10 and -10 V. This waveform is processed by a two-pole, low-pass filter, which removes

  16. Design and implementation of a hybrid circuit system for micro sensor signal processing

    International Nuclear Information System (INIS)

    Wang Zhuping; Chen Jing; Liu Ruqing

    2011-01-01

    This paper covers a micro sensor analog signal processing circuit system (MASPS) chip with low power and a digital signal processing circuit board implementation including hardware connection and software design. Attention has been paid to incorporate the MASPS chip into the digital circuit board. The ultimate aim is to form a hybrid circuit used for mixed-signal processing, which can be applied to a micro sensor flow monitoring system. (semiconductor integrated circuits)

  17. Large-scale digitizer system, analog converters

    International Nuclear Information System (INIS)

    Althaus, R.F.; Lee, K.L.; Kirsten, F.A.; Wagner, L.J.

    1976-10-01

    Analog to digital converter circuits that are based on the sharing of common resources, including those which are critical to the linearity and stability of the individual channels, are described. Simplicity of circuit composition is valued over other more costly approaches. These are intended to be applied in a large-scale processing and digitizing system for use with high-energy physics detectors such as drift-chambers or phototube-scintillator arrays. Signal distribution techniques are of paramount importance in maintaining adequate signal-to-noise ratio. Noise in both amplitude and time-jitter senses is held sufficiently low so that conversions with 10-bit charge resolution and 12-bit time resolution are achieved

  18. Swarm intelligence-based approach for optimal design of CMOS differential amplifier and comparator circuit using a hybrid salp swarm algorithm

    Science.gov (United States)

    Asaithambi, Sasikumar; Rajappa, Muthaiah

    2018-05-01

    In this paper, an automatic design method based on a swarm intelligence approach for CMOS analog integrated circuit (IC) design is presented. The hybrid meta-heuristics optimization technique, namely, the salp swarm algorithm (SSA), is applied to the optimal sizing of a CMOS differential amplifier and the comparator circuit. SSA is a nature-inspired optimization algorithm which mimics the navigating and hunting behavior of salp. The hybrid SSA is applied to optimize the circuit design parameters and to minimize the MOS transistor sizes. The proposed swarm intelligence approach was successfully implemented for an automatic design and optimization of CMOS analog ICs using Generic Process Design Kit (GPDK) 180 nm technology. The circuit design parameters and design specifications are validated through a simulation program for integrated circuit emphasis simulator. To investigate the efficiency of the proposed approach, comparisons have been carried out with other simulation-based circuit design methods. The performances of hybrid SSA based CMOS analog IC designs are better than the previously reported studies.

  19. Test and verification of a reactor protection system application-specific integrated circuit

    International Nuclear Information System (INIS)

    Battle, R.E.; Turner, G.W.; Vandermolen, R.I.; Vitalbo, C.

    1997-01-01

    Application-specific integrated circuits (ASICs) were utilized in the design of nuclear plant safety systems because they have certain advantages over software-based systems and analog-based systems. An advantage they have over software-based systems is that an ASIC design can be simple enough to not include branch statements and also can be thoroughly tested. A circuit card on which an ASIC is mounted can be configured to replace various versions of older analog equipment with fewer design types required. The approach to design and testing of ASICs for safety system applications is discussed in this paper. Included are discussions of the ASIC architecture, how it is structured to assist testing, and of the functional and enhanced circuit testing

  20. Two Kinds of Self-Oscillating Circuits Mechanically Demonstrated

    OpenAIRE

    Shiang-Hwua Yu; Po-Hsun Wu

    2015-01-01

    This study introduces two types of self-oscillating circuits that are frequently found in power electronics applications. Special effort is made to relate the circuits to the analogous mechanical systems of some important scientific inventions: Galileo’s pendulum clock and Coulomb’s friction model. A little touch of related history and philosophy of science will hopefully encourage curiosity, advance the understanding of self-oscillating systems and satisfy the aspiration ...

  1. Equivalent circuit analysis of terahertz metamaterial filters

    KAUST Repository

    Zhang, Xueqian

    2011-01-01

    An equivalent circuit model for the analysis and design of terahertz (THz) metamaterial filters is presented. The proposed model, derived based on LMC equivalent circuits, takes into account the detailed geometrical parameters and the presence of a dielectric substrate with the existing analytic expressions for self-inductance, mutual inductance, and capacitance. The model is in good agreement with the experimental measurements and full-wave simulations. Exploiting the circuit model has made it possible to predict accurately the resonance frequency of the proposed structures and thus, quick and accurate process of designing THz device from artificial metamaterials is offered. ©2011 Chinese Optics Letters.

  2. Designed cell consortia as fragrance-programmable analog-to-digital converters.

    Science.gov (United States)

    Müller, Marius; Ausländer, Simon; Spinnler, Andrea; Ausländer, David; Sikorski, Julian; Folcher, Marc; Fussenegger, Martin

    2017-03-01

    Synthetic biology advances the rational engineering of mammalian cells to achieve cell-based therapy goals. Synthetic gene networks have nearly reached the complexity of digital electronic circuits and enable single cells to perform programmable arithmetic calculations or to provide dynamic remote control of transgenes through electromagnetic waves. We designed a synthetic multilayered gaseous-fragrance-programmable analog-to-digital converter (ADC) allowing for remote control of digital gene expression with 2-bit AND-, OR- and NOR-gate logic in synchronized cell consortia. The ADC consists of multiple sampling-and-quantization modules sensing analog gaseous fragrance inputs; a gas-to-liquid transducer converting fragrance intensity into diffusible cell-to-cell signaling compounds; a digitization unit with a genetic amplifier circuit to improve the signal-to-noise ratio; and recombinase-based digital expression switches enabling 2-bit processing of logic gates. Synthetic ADCs that can remotely control cellular activities with digital precision may enable the development of novel biosensors and may provide bioelectronic interfaces synchronizing analog metabolic pathways with digital electronics.

  3. An Analog Correlator for Ultra-Wideband Receivers

    Directory of Open Access Journals (Sweden)

    Tu Chunjiang

    2005-01-01

    Full Text Available We present a new analog circuit exhibiting high bandwidth and low distortion, specially designed for signal correlation in an ultra-wideband receiver front end. The ultra-wideband short impulse signals are correlated with a local pulse template by the correlator. A comparator then samples the output for signal detection. A typical Gilbert mixer core is adopted for multiplication of broadband signals up to . As a result of synchronization of the received signal and the local template, the output voltage level after integration and sampling can reach up to , which is sufficient for detection by the comparator. The circuit dissipates about from double voltage supplies of and using SiGe BiCMOS technology. Simulation results are presented to show the feasibility of this circuit design for use in ultra-wideband receivers.

  4. A CMOS integrated timing discriminator circuit for fast scintillation counters

    International Nuclear Information System (INIS)

    Jochmann, M.W.

    1998-01-01

    Based on a zero-crossing discriminator using a CR differentiation network for pulse shaping, a new CMOS integrated timing discriminator circuit is proposed for fast (t r ≥ 2 ns) scintillation counters at the cooler synchrotron COSY-Juelich. By eliminating the input signal's amplitude information by means of an analog continuous-time divider, a normalized pulse shape at the zero-crossing point is gained over a wide dynamic input amplitude range. In combination with an arming comparator and a monostable multivibrator this yields in a highly precise timing discriminator circuit, that is expected to be useful in different time measurement applications. First measurement results of a CMOS integrated logarithmic amplifier, which is part of the analog continuous-time divider, agree well with the corresponding simulations. Moreover, SPICE simulations of the integrated discriminator circuit promise a time walk well below 200 ps (FWHM) over a 40 dB input amplitude dynamic range

  5. VHDL-based programming environment for Floating-Gate analog memory cell

    Directory of Open Access Journals (Sweden)

    Carlos Alberto dos Reis Filho

    2005-02-01

    Full Text Available An implementation in CMOS technology of a Floating-Gate Analog Memory Cell and Programming Environment is presented. A digital closed-loop control compares a reference value set by user and the memory output and after cycling, the memory output is updated and the new value stored. The circuit can be used as analog trimming for VLSI applications where mechanical trimming associated with postprocessing chip is prohibitive due to high costs.

  6. A Global Electric Circuit on Mars

    Science.gov (United States)

    Delory, G. T.; Farrell, W. M.; Desch, M. D.

    2001-01-01

    We describe conditions on the surface of Mars conducive to the formation of a martian global electric circuit, in a direct analogy to the terrestrial case where atmospheric currents and electric fields are generated worldwide through the charging in thunderstorms. Additional information is contained in the original extended abstract.

  7. "E pluribus unum" or How to Derive Single-equation Descriptions for Output-quantities in Nonlinear Circuits using Differential Algebra

    OpenAIRE

    Gerbracht, Eberhard H. -A.

    2008-01-01

    In this paper we describe by a number of examples how to deduce one single characterizing higher order differential equation for output quantities of an analog circuit. In the linear case, we apply basic "symbolic" methods from linear algebra to the system of differential equations which is used to model the analog circuit. For nonlinear circuits and their corresponding nonlinear differential equations, we show how to employ computer algebra tools implemented in Maple, which are based on diff...

  8. Hybrid integrated circuit for charge-to-time interval conversion

    Energy Technology Data Exchange (ETDEWEB)

    Basiladze, S.G.; Dotsenko, Yu.Yu.; Man' yakov, P.K.; Fedorchenko, S.N. (Joint Inst. for Nuclear Research, Dubna (USSR))

    The hybrid integrated circuit for charge-to time interval conversion with nanosecond input fast response is described. The circuit can be used in energy measuring channels, time-to-digital converters and in the modified variant in amplitude-to-digital converters. The converter described consists of a buffer amplifier, a linear transmission circuit, a direct current source and a unit of time interval separation. The buffer amplifier represents a current follower providing low input and high output resistances by the current feedback. It is concluded that the described converter excelled the QT100B circuit analogous to it in a number of parameters especially, in thermostability.

  9. Single-flux-quantum circuit technology for superconducting radiation detectors

    International Nuclear Information System (INIS)

    Fujimaki, Akira; Onogi, Masashi; Matsumoto, Tomohiro; Tanaka, Masamitsu; Sekiya, Akito; Hayakawa, Hisao; Yorozu, Shinichi; Terai, Hirotaka; Yoshikawa, Nobuyuki

    2003-01-01

    We discuss the application of the single-flux-quantum (SFQ) logic circuits to multi superconducting radiation detectors system. The SFQ-based analog-to-digital converters (ADCs) have the advantage in current sensitivity, which can reach less than 10 nA in a well-tuned ADC. We have also developed the design technology of the SFQ circuits. We demonstrate high-speed operation of large-scale integrated circuits such as a 2x2 cross/bar switch, arithmetic logic unit, indicating that our present SFQ technology is applicable to the multi radiation detectors system. (author)

  10. Monolithic circuit development for RHIC at Oak Ridge National Laboratory

    Energy Technology Data Exchange (ETDEWEB)

    Alley, G.T.; Britton, C.L. Jr.; Kennedy, E.J.; Newport, D.F.; Wintenberg, A.L.; Young, G.R. [Oak Ridge National Laboratory, TN (United States)

    1991-12-31

    The work performed for RHIC at Oak Ridge National Laboratory during FY 91 is presented in this paper. The work includes preamplifier, analog memory, and analog-digital converter development for Dimuon Pad Readout, and evaluation and development of preamplifier-shapers for silicon strip readout. The approaches for implementation are considered as well as measured data for the various circuits that have been developed.

  11. The Electron Runaround: Understanding Electric Circuit Basics through a Classroom Activity

    Science.gov (United States)

    Singh, Vandana

    2010-01-01

    Several misconceptions abound among college students taking their first general physics course, and to some extent pre-engineering physics students, regarding the physics and applications of electric circuits. Analogies used in textbooks, such as those that liken an electric circuit to a piped closed loop of water driven by a water pump, do not…

  12. Model, analysis, and evaluation of the effects of analog VLSI arithmetic on linear subspace-based image recognition.

    Science.gov (United States)

    Carvajal, Gonzalo; Figueroa, Miguel

    2014-07-01

    Typical image recognition systems operate in two stages: feature extraction to reduce the dimensionality of the input space, and classification based on the extracted features. Analog Very Large Scale Integration (VLSI) is an attractive technology to achieve compact and low-power implementations of these computationally intensive tasks for portable embedded devices. However, device mismatch limits the resolution of the circuits fabricated with this technology. Traditional layout techniques to reduce the mismatch aim to increase the resolution at the transistor level, without considering the intended application. Relating mismatch parameters to specific effects in the application level would allow designers to apply focalized mismatch compensation techniques according to predefined performance/cost tradeoffs. This paper models, analyzes, and evaluates the effects of mismatched analog arithmetic in both feature extraction and classification circuits. For the feature extraction, we propose analog adaptive linear combiners with on-chip learning for both Least Mean Square (LMS) and Generalized Hebbian Algorithm (GHA). Using mathematical abstractions of analog circuits, we identify mismatch parameters that are naturally compensated during the learning process, and propose cost-effective guidelines to reduce the effect of the rest. For the classification, we derive analog models for the circuits necessary to implement Nearest Neighbor (NN) approach and Radial Basis Function (RBF) networks, and use them to emulate analog classifiers with standard databases of face and hand-writing digits. Formal analysis and experiments show how we can exploit adaptive structures and properties of the input space to compensate the effects of device mismatch at the application level, thus reducing the design overhead of traditional layout techniques. Results are also directly extensible to multiple application domains using linear subspace methods. Copyright © 2014 Elsevier Ltd. All rights

  13. Research of Measurement Circuits for High Voltage Current Transformer Based on Rogowski Coils

    Directory of Open Access Journals (Sweden)

    Yan Bing

    2014-02-01

    Full Text Available The electronic current transformer plays an irreplaceable position in the field of relay protection and current measurement of the power system. Rogowski coils are used as sensor parts, and in order to improve the measurement accuracy and reliability, the circuits at the high voltage system are introduced and improved in this paper, including the analog integral element, the filtering circuit and the phase shift circuit. Simulations results proved the reliability and accuracy of the improved circuits.

  14. High speed, wide dynamic range analog signal processing for avalanche photodiode

    CERN Document Server

    Walder, J P; Pangaud, P

    2000-01-01

    A wide dynamic range multi-gain analog transimpedance amplifier integrated circuit has been developed for avalanche photodiode signal processing. The 96 dB input dynamic range is divided into four ranges of 12-bits each in order to provide 40 MHz analog sampled data to a 12-bits ADC. This concept which has been integrated in both BiCMOS and full complementary bipolar technology along with fitted design techniques will be presented.

  15. High speed, wide dynamic range analog signal processing for avalanche photodiode

    International Nuclear Information System (INIS)

    Walder, J.P.; El Mamouni, Houmani; Pangaud, Patrick

    2000-01-01

    A wide dynamic range multi-gain analog transimpedance amplifier integrated circuit has been developed for avalanche photodiode signal processing. The 96 dB input dynamic range is divided into four ranges of 12-bits each in order to provide 40 MHz analog sampled data to a 12-bits ADC. This concept which has been integrated in both BiCMOS and full complementary bipolar technology along with fitted design techniques will be presented

  16. High speed, wide dynamic range analog signal processing for avalanche photodiode

    Energy Technology Data Exchange (ETDEWEB)

    Walder, J.P. E-mail: walder@in2p3.fr; El Mamouni, Houmani; Pangaud, Patrick

    2000-03-11

    A wide dynamic range multi-gain analog transimpedance amplifier integrated circuit has been developed for avalanche photodiode signal processing. The 96 dB input dynamic range is divided into four ranges of 12-bits each in order to provide 40 MHz analog sampled data to a 12-bits ADC. This concept which has been integrated in both BiCMOS and full complementary bipolar technology along with fitted design techniques will be presented.

  17. Nanophotonic integrated circuits from nanoresonators grown on silicon.

    Science.gov (United States)

    Chen, Roger; Ng, Kar Wei; Ko, Wai Son; Parekh, Devang; Lu, Fanglu; Tran, Thai-Truong D; Li, Kun; Chang-Hasnain, Connie

    2014-07-07

    Harnessing light with photonic circuits promises to catalyse powerful new technologies much like electronic circuits have in the past. Analogous to Moore's law, complexity and functionality of photonic integrated circuits depend on device size and performance scale. Semiconductor nanostructures offer an attractive approach to miniaturize photonics. However, shrinking photonics has come at great cost to performance, and assembling such devices into functional photonic circuits has remained an unfulfilled feat. Here we demonstrate an on-chip optical link constructed from InGaAs nanoresonators grown directly on a silicon substrate. Using nanoresonators, we show a complete toolkit of circuit elements including light emitters, photodetectors and a photovoltaic power supply. Devices operate with gigahertz bandwidths while consuming subpicojoule energy per bit, vastly eclipsing performance of prior nanostructure-based optoelectronics. Additionally, electrically driven stimulated emission from an as-grown nanostructure is presented for the first time. These results reveal a roadmap towards future ultradense nanophotonic integrated circuits.

  18. Physically based arc-circuit interaction

    International Nuclear Information System (INIS)

    Zhong-Lie, L.

    1984-01-01

    An integral arc model is extended to study the interaction of the gas blast arc with the test circuit in this paper. The deformation in the waveshapes of arc current and voltage around the current zero has been formulated to first approximation by using a simple model of arc voltage based on the arc core energy conservation. By supplementing with the time scale for the radiation, the time rates of arc processes were amended. Both the contributions of various arc processes and the influence of circuit parameters to the arc-circuit interaction have been estimated by this theory. Analysis generated a new method of calculating test circuit parameters which improves the accurate simulation of arc-circuit interaction. The new method agrees with the published experimental results

  19. Logic analysis and verification of n-input genetic logic circuits

    DEFF Research Database (Denmark)

    Baig, Hasan; Madsen, Jan

    2017-01-01

    . In this paper, we present an approach to analyze and verify the Boolean logic of a genetic circuit from the data obtained through stochastic analog circuit simulations. The usefulness of this analysis is demonstrated through different case studies illustrating how our approach can be used to verify the expected......Nature is using genetic logic circuits to regulate the fundamental processes of life. These genetic logic circuits are triggered by a combination of external signals, such as chemicals, proteins, light and temperature, to emit signals to control other gene expressions or metabolic pathways...... accordingly. As compared to electronic circuits, genetic circuits exhibit stochastic behavior and do not always behave as intended. Therefore, there is a growing interest in being able to analyze and verify the logical behavior of a genetic circuit model, prior to its physical implementation in a laboratory...

  20. Design and Verification of Application Specific Integrated Circuits in a Network of Online Labs

    Directory of Open Access Journals (Sweden)

    A.Y. Al-Zoubi

    2009-08-01

    Full Text Available A solution to implement a remote laboratory for testing and designing analog Application-Specific Integrated Circuits of the type (ispPAC10 is presented. The application allows electrical engineering students to access and perform measurements and conduct analog electronics experiments over the internet. PAC-Designer software, running on a Citrix server, is used in the circuit design in which the signals are generated and the responses are acquired by a data acquisition board controlled by LabVIEW. Three interconnected remote labs located in three different continents will be implementing the proposed system.

  1. Improved algorithms for circuit fault diagnosis based on wavelet packet and neural network

    International Nuclear Information System (INIS)

    Zhang, W-Q; Xu, C

    2008-01-01

    In this paper, two improved BP neural network algorithms of fault diagnosis for analog circuit are presented through using optimal wavelet packet transform(OWPT) or incomplete wavelet packet transform(IWPT) as preprocessor. The purpose of preprocessing is to reduce the nodes in input layer and hidden layer of BP neural network, so that the neural network gains faster training and convergence speed. At first, we apply OWPT or IWPT to the response signal of circuit under test(CUT), and then calculate the normalization energy of each frequency band. The normalization energy is used to train the BP neural network to diagnose faulty components in the analog circuit. These two algorithms need small network size, while have faster learning and convergence speed. Finally, simulation results illustrate the two algorithms are effective for fault diagnosis

  2. Flexible, High-Speed CdSe Nanocrystal Integrated Circuits.

    Science.gov (United States)

    Stinner, F Scott; Lai, Yuming; Straus, Daniel B; Diroll, Benjamin T; Kim, David K; Murray, Christopher B; Kagan, Cherie R

    2015-10-14

    We report large-area, flexible, high-speed analog and digital colloidal CdSe nanocrystal integrated circuits operating at low voltages. Using photolithography and a newly developed process to fabricate vertical interconnect access holes, we scale down device dimensions, reducing parasitic capacitances and increasing the frequency of circuit operation, and scale up device fabrication over 4 in. flexible substrates. We demonstrate amplifiers with ∼7 kHz bandwidth, ring oscillators with <10 μs stage delays, and NAND and NOR logic gates.

  3. Detection Method for Soft Internal Short Circuit in Lithium-Ion Battery Pack by Extracting Open Circuit Voltage of Faulted Cell

    Directory of Open Access Journals (Sweden)

    Minhwan Seo

    2018-06-01

    Full Text Available Early detection of internal short circuit which is main cause of thermal runaway in a lithium-ion battery is necessary to ensure battery safety for users. As a promising fault index, internal short circuit resistance can directly represent degree of the fault because it describes self-discharge phenomenon caused by the internal short circuit clearly. However, when voltages of individual cells in a lithium-ion battery pack are not provided, the effect of internal short circuit in the battery pack is not readily observed in whole terminal voltage of the pack, leading to difficulty in estimating accurate internal short circuit resistance. In this paper, estimating the resistance with the whole terminal voltages and the load currents of the pack, a detection method for the soft internal short circuit in the pack is proposed. Open circuit voltage of a faulted cell in the pack is extracted to reflect the self-discharge phenomenon obviously; this process yields accurate estimates of the resistance. The proposed method is verified with various soft short conditions in both simulations and experiments. The error of estimated resistance does not exceed 31.2% in the experiment, thereby enabling the battery management system to detect the internal short circuit early.

  4. First-Order SPICE Modeling of Extreme-Temperature 4H-SiC JFET Integrated Circuits

    Science.gov (United States)

    Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu

    2016-01-01

    A separate submission to this conference reports that 4H-SiC Junction Field Effect Transistor (JFET) digital and analog Integrated Circuits (ICs) with two levels of metal interconnect have reproducibly demonstrated electrical operation at 500 C in excess of 1000 hours. While this progress expands the complexity and durability envelope of high temperature ICs, one important area for further technology maturation is the development of reasonably accurate and accessible computer-aided modeling and simulation tools for circuit design of these ICs. Towards this end, we report on development and verification of 25 C to 500 C SPICE simulation models of first order accuracy for this extreme-temperature durable 4H-SiC JFET IC technology. For maximum availability, the JFET IC modeling is implemented using the baseline-version SPICE NMOS LEVEL 1 model that is common to other variations of SPICE software and importantly includes the body-bias effect. The first-order accuracy of these device models is verified by direct comparison with measured experimental device characteristics.

  5. Negative Resistance Circuit for Damping an Array of Coupled FitzHugh-Nagumo Oscillators

    DEFF Research Database (Denmark)

    Tamaševičius, Arūnas; Adomaitienė, Elena; Bumelienė, Skaidra

    2015-01-01

    An analog circuit, based on a negative impedance converter and a capacitor, for damping oscillations in an array of mean-field coupled neuronal FitzHugh–Nagumo (FHN) type oscillators is described. The circuit is essentially a two-terminal feedback controller. When coupled to an array of the FHN...

  6. Advanced Breakdown Modeling for Solid-State Circuit Design

    NARCIS (Netherlands)

    Milovanovi?, V.

    2010-01-01

    Modeling of the effects occurring outside the usual region of application of semiconductor devices is becoming more important with increasing demands set upon electronic systems for simultaneous speed and output power. Analog integrated circuit designers are forced to enter regimes of transistor

  7. A 13-Bits wilkinson analog-digital converter for NIM acquisition system

    International Nuclear Information System (INIS)

    Acosta Toledo, R.; Osorio Deliz, J.; Arista Romeu, E.; Fernandez, J.

    1994-01-01

    A new 13-bits Wilkinson analog-digital converter is described. The aim of this work is to describe the circuits of sample and hold, memory condensator loading and releasing PROM based control memory logic, zero level detection and correction. The converter is designed for the digital measurement of the peak amplitudes of pulses with statistical or periodical time distribution. The analog-digital converter may be used in spectrometric systems, multi-channel analysers or any similar PC based system

  8. Digital-Analog Hybrid Scheme and Its Application to Chaotic Random Number Generators

    Science.gov (United States)

    Yuan, Zeshi; Li, Hongtao; Miao, Yunchi; Hu, Wen; Zhu, Xiaohua

    2017-12-01

    Practical random number generation (RNG) circuits are typically achieved with analog devices or digital approaches. Digital-based techniques, which use field programmable gate array (FPGA) and graphics processing units (GPU) etc. usually have better performances than analog methods as they are programmable, efficient and robust. However, digital realizations suffer from the effect of finite precision. Accordingly, the generated random numbers (RNs) are actually periodic instead of being real random. To tackle this limitation, in this paper we propose a novel digital-analog hybrid scheme that employs the digital unit as the main body, and minimum analog devices to generate physical RNs. Moreover, the possibility of realizing the proposed scheme with only one memory element is discussed. Without loss of generality, we use the capacitor and the memristor along with FPGA to construct the proposed hybrid system, and a chaotic true random number generator (TRNG) circuit is realized, producing physical RNs at a throughput of Gbit/s scale. These RNs successfully pass all the tests in the NIST SP800-22 package, confirming the significance of the scheme in practical applications. In addition, the use of this new scheme is not restricted to RNGs, and it also provides a strategy to solve the effect of finite precision in other digital systems.

  9. A Novel Analog-to-digital conversion Technique using nonlinear duty-cycle modulation

    OpenAIRE

    Jean Mbihi; François Ndjali Beng; Martin Kom; Léandre Nneme Nneme

    2012-01-01

    A new type of analog-to-digital conversion technique is presented in this paper. The interfacing hardware is a very simple nonlinear circuit with 1-bit modulated output. As a implication, behind the hardware simplicity retained is hidden a dreadful nonlinear duty-cycle modulation ratio. However, the overall nonlinear behavior embeds a sufficiently wide linear range, for a rigorous digital reconstitution of the analog input signal using a standard linear filter. Simulation and experimental r...

  10. READ - Remote Analog ASIC Design System

    Directory of Open Access Journals (Sweden)

    Michael E. Auer

    2006-11-01

    Full Text Available The scope of this work is to present a solution to implement a remote electronic laboratory for testing and designing analog ASICs (ispPAC10. The application allows users to create circuit schematics, upload the design to the device and perform measurements. The software used for designing circuits is the PAC-Designer and it runs on a Citrix server. The signals are generated and the responses are acquired by a data acquisition board controlled by LabView. The virtual instruments interact with some ActiveX controls specially designed to look like real oscilloscope and function generator devices and represent the user interface of the lab. These ActiveX give users the control over the LabView VIs and the access to its facilities in order to perform electronic exercises.

  11. Quantum-circuit model of Hamiltonian search algorithms

    International Nuclear Information System (INIS)

    Roland, Jeremie; Cerf, Nicolas J.

    2003-01-01

    We analyze three different quantum search algorithms, namely, the traditional circuit-based Grover's algorithm, its continuous-time analog by Hamiltonian evolution, and the quantum search by local adiabatic evolution. We show that these algorithms are closely related in the sense that they all perform a rotation, at a constant angular velocity, from a uniform superposition of all states to the solution state. This makes it possible to implement the two Hamiltonian-evolution algorithms on a conventional quantum circuit, while keeping the quadratic speedup of Grover's original algorithm. It also clarifies the link between the adiabatic search algorithm and Grover's algorithm

  12. MIMS circuit scrapbook V.I.

    CERN Document Server

    Mims, Forrest

    2000-01-01

    Here it is--a collection of Forrest Mims's classic work from the original Popular Electronics magazine! Using commonly available components and remarkable ingenuity, Forrest shows you how to build and experiment with circuits like these:analog computers color organs digital phase-locked loops frequency-to-voltage and voltage-to-frequency converters interval timers LED oscilloscopes light wave communicators magnetic field sensors optoelectronics pseudorandom number generators tone sequencers and much, much, more!

  13. Analysis and application of analog electronic circuits to biomedical instrumentation

    CERN Document Server

    Northrop, Robert B

    2012-01-01

    All chapters include an introduction and chapter summary.Sources and Properties of Biomedical SignalsSources of Endogenous Bioelectric SignalsNerve Action PotentialsMuscle Action PotentialsThe ElectrocardiogramOther BiopotentialsElectrical Properties of BioelectrodesExogenous Bioelectric SignalsProperties and Models of Semiconductor Devices Used in Analog Electronic Systemspn Junction DiodesMidfrequency Models for BJT BehaviorMidfrequency Models for Field-Effect TransistorsHigh-Frequency Models for Transistors and Simple Transistor AmplifiersPhotons, Photodiodes, Photoconductors, LEDs, and Las

  14. SP-100 Position Multiplexer and Analog Input Processor

    International Nuclear Information System (INIS)

    Syed, A.; Gilliland, K.; Shukla, J.N.

    1992-01-01

    This paper describes the design, implementation, and performance test results of an engineering model of the Position Multiplexer (MUX)-Analog Input Processor (AIP) System for the transmission and continuous measurements of Reflector Control Drive position in SP-100. This paper describes the work performed to determine the practical circuit limitations, investigate the circuit/component degradation of the multiplexer due to radiation, develop an interference cancellation technique, and evaluate the measurement accuracy as a function of resolver angle, temperature, radiation, and interference. The system developed performs a complex cross-correlation between the resolver excitation and the resolver sine cosine outputs, from which the precise resolver amplitude and phase can be determined while simultaneously eliminating virtually all uncorrelated interference

  15. An eight channel low-noise CMOS readout circuit for silicon detectors with on-chip front-end FET

    International Nuclear Information System (INIS)

    Fiorini, C.; Porro, M.

    2006-01-01

    We propose a CMOS readout circuit for the processing of signals from multi-channel silicon detectors to be used in X-ray spectroscopy and γ-ray imaging applications. The circuit is composed by eight channels, each one featuring a low-noise preamplifier, a 6th-order semigaussian shaping amplifier with four selectable peaking times, from 1.8 up to 6 μs, a peak stretcher and a discriminator. The circuit is conceived to be used with silicon detectors with a front-end FET integrated on the detector chips itself, like silicon drift detectors with JFET and pixel detectors with DEPMOS. The integrated time constants used for the shaping are implemented by means of an RC-cell, based on the technique of demagnification of the current flowing in a resistor R by means of the use of current mirrors. The eight analog channels of the chip are multiplexed to a single analog output. A suitable digital section provides self-resetting of each channel and trigger output and is able to set independent thresholds on the analog channels by means of a programmable serial register and 3-bit DACs. The circuit has been realized in the 0.35 μm CMOS AMS technology. In this work, the main features of the circuit are presented along with the experimental results of its characterization

  16. Designing of analog computer prototype for linear differential equation. Pt. 2

    International Nuclear Information System (INIS)

    Tiyono Wijoyo.

    1978-01-01

    In this second report, the circuits of the system in the analog computer prototype have been modified and the system of the electromagnetic switches is used to replace the system of the manual switches which was used previously, so that the higher reliability could be achieved. (author)

  17. An ADC-free adaptive interface circuit of resistive sensor for electronic nose system.

    Science.gov (United States)

    Chang, Chia-Lin; Chiu, Shih-Wen; Tang, Kea-Tiong

    2013-01-01

    The initial resistance of chemiresistive gas sensors could be affected by temperature, humidity, and background odors. In a sensing system, the traditional interface circuit always requires an ADC to convert analog signal to digital signal. In this paper, we propose an ADC-free adaptive interface circuit for a resistive gas sensor to read sensor signal and cancel the baseline drift. Furthermore, methanol was used to test the proposed interface circuit, which was connected with a FIGARO® gas sensor. This circuit was fabricated by TSMC 0.18 µm CMOS process, and consumed 86.41 µW under 1 V supply voltage.

  18. Virtual Analog Models of the Lockhart and Serge Wavefolders

    Directory of Open Access Journals (Sweden)

    Fabián Esqueda

    2017-12-01

    Full Text Available Wavefolders are a particular class of nonlinear waveshaping circuits, and a staple of the “West Coast” tradition of analog sound synthesis. In this paper, we present analyses of two popular wavefolding circuits—the Lockhart and Serge wavefolders—and show that they achieve a very similar audio effect. We digitally model the input–output relationship of both circuits using the Lambert-W function, and examine their time- and frequency-domain behavior. To ameliorate the issue of aliasing distortion introduced by the nonlinear nature of wavefolding, we propose the use of the first-order antiderivative method. This method allows us to implement the proposed digital models in real-time without having to resort to high oversampling factors. The practical synthesis usage of both circuits is discussed by considering the case of multiple wavefolder stages arranged in series.

  19. Vertically integrated circuit development at Fermilab for detectors

    International Nuclear Information System (INIS)

    Yarema, R; Deptuch, G; Hoff, J; Khalid, F; Lipton, R; Shenai, A; Trimpl, M; Zimmerman, T

    2013-01-01

    Today vertically integrated circuits, (a.k.a. 3D integrated circuits) is a popular topic in many trade journals. The many advantages of these circuits have been described such as higher speed due to shorter trace lenghts, the ability to reduce cross talk by placing analog and digital circuits on different levels, higher circuit density without the going to smaller feature sizes, lower interconnect capacitance leading to lower power, reduced chip size, and different processing for the various layers to optimize performance. There are some added advantages specifically for MAPS (Monolithic Active Pixel Sensors) in High Energy Physics: four side buttable pixel arrays, 100% diode fill factor, the ability to move PMOS transistors out of the diode sensing layer, and a increase in channel density. Fermilab began investigating 3D circuits in 2006. Many different bonding processes have been described for fabricating 3D circuits [1]. Fermilab has used three different processes to fabricate several circuits for specific applications in High Energy Physics and X-ray imaging. This paper covers some of the early 3D work at Fermilab and then moves to more recent activities. The major processes we have used are discussed and some of the problems encountered are described. An overview of pertinent 3D circuit designs is presented along with test results thus far.

  20. Radio frequency integrated circuit design for cognitive radio systems

    CERN Document Server

    Fahim, Amr

    2015-01-01

    This book fills a disconnect in the literature between Cognitive Radio systems and a detailed account of the circuit implementation and architectures required to implement such systems.  Throughout the book, requirements and constraints imposed by cognitive radio systems are emphasized when discussing the circuit implementation details.  In addition, this book details several novel concepts that advance state-of-the-art cognitive radio systems.  This is a valuable reference for anybody with background in analog and radio frequency (RF) integrated circuit design, needing to learn more about integrated circuits requirements and implementation for cognitive radio systems. ·         Describes in detail cognitive radio systems, as well as the circuit implementation and architectures required to implement them; ·         Serves as an excellent reference to state-of-the-art wideband transceiver design; ·         Emphasizes practical requirements and constraints imposed by cognitive radi...

  1. Ultra low-power biomedical signal processing : An analog wavelet filter approach for pacemakers

    NARCIS (Netherlands)

    Pavlík Haddad, S.A.

    2006-01-01

    The purpose of this thesis is to describe novel signal processing methodologies and analog integrated circuit techniques for low-power biomedical systems. Physiological signals, such as the electrocardiogram (ECG), the electroencephalogram (EEG) and the electromyogram (EMG) are mostly

  2. Structure problems in the analog computation; Problemes de structure dans le calcul analogique

    Energy Technology Data Exchange (ETDEWEB)

    Braffort, P.L. [Commissariat a l' Energie Atomique, Saclay (France). Centre d' Etudes Nucleaires

    1957-07-01

    The recent mathematical development showed the importance of elementary structures (algebraic, topological, etc.) in abeyance under the great domains of classical analysis. Such structures in analog computation are put in evidence and possible development of applied mathematics are discussed. It also studied the topological structures of the standard representation of analog schemes such as additional triangles, integrators, phase inverters and functions generators. The analog method gives only the function of the variable: time, as results of its computations. But the course of computation, for systems including reactive circuits, introduces order structures which are called 'chronological'. Finally, it showed that the approximation methods of ordinary numerical and digital computation present the same structure as these analog computation. The structure analysis permits fruitful comparisons between the several domains of applied mathematics and suggests new important domains of application for analog method. (M.P.)

  3. Structure problems in the analog computation; Problemes de structure dans le calcul analogique

    Energy Technology Data Exchange (ETDEWEB)

    Braffort, P L [Commissariat a l' Energie Atomique, Saclay (France). Centre d' Etudes Nucleaires

    1957-07-01

    The recent mathematical development showed the importance of elementary structures (algebraic, topological, etc.) in abeyance under the great domains of classical analysis. Such structures in analog computation are put in evidence and possible development of applied mathematics are discussed. It also studied the topological structures of the standard representation of analog schemes such as additional triangles, integrators, phase inverters and functions generators. The analog method gives only the function of the variable: time, as results of its computations. But the course of computation, for systems including reactive circuits, introduces order structures which are called 'chronological'. Finally, it showed that the approximation methods of ordinary numerical and digital computation present the same structure as these analog computation. The structure analysis permits fruitful comparisons between the several domains of applied mathematics and suggests new important domains of application for analog method. (M.P.)

  4. 4-bit digital to analog converter using R-2R ladder and binary weighted resistors

    Science.gov (United States)

    Diosanto, J.; Batac, M. L.; Pereda, K. J.; Caldo, R.

    2017-06-01

    The use of a 4-bit digital-to-analog converter using two methods; Binary Weighted Resistors and R-2R Ladder is designed and presented in this paper. The main components that were used in constructing both circuits were different resistor values, operational amplifier (LM741) and single pole double throw switches. Both circuits were designed using MULTISIM software to be able to test the circuit for its ideal application and FRITZING software for the layout designing and fabrication to the printed circuit board. The implementation of both systems in an actual circuit benefits in determining and comparing the advantages and disadvantages of each. It was realized that the binary weighted circuit is more efficient DAC, having lower percentage error of 0.267% compared to R-2R ladder circuit which has a minimum of percentage error of 4.16%.

  5. A main amplifier circuit and data acquisition system for charged particle detector array

    International Nuclear Information System (INIS)

    Hao Rui; Ge Yucheng

    2011-01-01

    The charged particle detector array has huge amounts of signal and needs high counting rate. To meet the requirements, a main amplifier and analog-to-digital conversion circuit based on high-speed op-amp chips and ADC chip was designed. A 51-MCU was used to control the circuit of ADC and the USB communication chip. The signals were digitized and uploaded by the MCU-ADC-USB circuit. The whole system has a compact hardware structure and a reasonable controlling software, which meet the design requirements. (authors)

  6. A New Approach for Modeling Darrieus-Type Vertical Axis Wind Turbine Rotors Using Electrical Equivalent Circuit Analogy: Basis of Theoretical Formulations and Model Development

    Directory of Open Access Journals (Sweden)

    Pierre Tchakoua

    2015-09-01

    Full Text Available Models are crucial in the engineering design process because they can be used for both the optimization of design parameters and the prediction of performance. Thus, models can significantly reduce design, development and optimization costs. This paper proposes a novel equivalent electrical model for Darrieus-type vertical axis wind turbines (DTVAWTs. The proposed model was built from the mechanical description given by the Paraschivoiu double-multiple streamtube model and is based on the analogy between mechanical and electrical circuits. This work addresses the physical concepts and theoretical formulations underpinning the development of the model. After highlighting the working principle of the DTVAWT, the step-by-step development of the model is presented. For assessment purposes, simulations of aerodynamic characteristics and those of corresponding electrical components are performed and compared.

  7. New equivalent lumped electrical circuit for piezoelectric transformers.

    Science.gov (United States)

    Gonnard, Paul; Schmitt, P M; Brissaud, Michel

    2006-04-01

    A new equivalent circuit is proposed for a contour-vibration-mode piezoelectric transformer (PT). It is shown that the usual lumped equivalent circuit derived from the conventional Mason approach is not accurate. The proposed circuit, built on experimental measurements, makes an explicit difference between the elastic energies stored respectively on the primary and secondary parts. The experimental and theoretical resonance frequencies with the secondary in open or short circuit are in good agreement as well as the output "voltage-current" characteristic and the optimum efficiency working point. This circuit can be extended to various PT configurations and appears to be a useful tool for modeling electronic devices that integrate piezoelectric transformers.

  8. Clock generators for SOC processors circuits and architectures

    CERN Document Server

    Fahim, Amr

    2004-01-01

    This book explores the design of fully-integrated frequency synthesizers suitable for system-on-a-chip (SOC) processors. The text takes a more global design perspective in jointly examining the design space at the circuit level as well as at the architectural level. The comprehensive coverage includes summary chapters on circuit theory as well as feedback control theory relevant to the operation of phase locked loops (PLLs). On the circuit level, the discussion includes low-voltage analog design in deep submicron digital CMOS processes, effects of supply noise, substrate noise, as well device noise. On the architectural level, the discussion includes PLL analysis using continuous-time as well as discrete-time models, linear and nonlinear effects of PLL performance, and detailed analysis of locking behavior. The book provides numerous real world applications, as well as practical rules-of-thumb for modern designers to use at the system, architectural, as well as the circuit level.

  9. Analog Amplitude Modulation of a High Voltage, Solid State Inductive Adder, Pulse Generator Using MOSFETS

    International Nuclear Information System (INIS)

    Gower, E J; Sullivan, J S

    2002-01-01

    High voltage, solid state, inductive adder, pulse generators have found increasing application as fast kicker pulse modulators for charged particle beams. The solid state, inductive adder, pulse generator is similar in operation to the linear induction accelerator. The main difference is that the solid state, adder couples energy by transformer action from multiple primaries to a voltage summing stalk, instead of an electron beam. Ideally, the inductive adder produces a rectangular voltage pulse at the load. In reality, there is usually some voltage variation at the load due to droop on primary circuit storage capacitors, or, temporal variations in the load impedance. Power MOSFET circuits have been developed to provide analog modulation of the output voltage amplitude of a solid state, inductive adder, pulse generator. The modulation is achieved by including MOSFET based, variable subtraction circuits in the multiple primary stack. The subtraction circuits can be used to compensate for voltage droop, or, to tailor the output pulse amplitude to provide a desired effect in the load. Power MOSFET subtraction circuits have been developed to modulate short, temporal (60-400 ns), voltage and current pulses. MOSFET devices have been tested up to 20 amps and 800 Volts with a band pass of 50 MHz. An analog modulation cell has been tested in a five cell high, voltage adder stack

  10. Analog Integrated Circuit Design for Spike Time Dependent Encoder and Reservoir in Reservoir Computing Processors

    Science.gov (United States)

    2018-01-01

    HAS BEEN REVIEWED AND IS APPROVED FOR PUBLICATION IN ACCORDANCE WITH ASSIGNED DISTRIBUTION STATEMENT. FOR THE CHIEF ENGINEER : / S / / S...bridged high-performance computing, nanotechnology , and integrated circuits & systems. 15. SUBJECT TERMS neuromorphic computing, neuron design, spike...multidisciplinary effort encompassed high-performance computing, nanotechnology , integrated circuits, and integrated systems. The project’s architecture was

  11. Noise Expands the Response Range of the Bacillus subtilis Competence Circuit.

    Directory of Open Access Journals (Sweden)

    Andrew Mugler

    2016-03-01

    Full Text Available Gene regulatory circuits must contend with intrinsic noise that arises due to finite numbers of proteins. While some circuits act to reduce this noise, others appear to exploit it. A striking example is the competence circuit in Bacillus subtilis, which exhibits much larger noise in the duration of its competence events than a synthetically constructed analog that performs the same function. Here, using stochastic modeling and fluorescence microscopy, we show that this larger noise allows cells to exit terminal phenotypic states, which expands the range of stress levels to which cells are responsive and leads to phenotypic heterogeneity at the population level. This is an important example of how noise confers a functional benefit in a genetic decision-making circuit.

  12. Modeling selective attention using a neuromorphic analog VLSI device.

    Science.gov (United States)

    Indiveri, G

    2000-12-01

    Attentional mechanisms are required to overcome the problem of flooding a limited processing capacity system with information. They are present in biological sensory systems and can be a useful engineering tool for artificial visual systems. In this article we present a hardware model of a selective attention mechanism implemented on a very large-scale integration (VLSI) chip, using analog neuromorphic circuits. The chip exploits a spike-based representation to receive, process, and transmit signals. It can be used as a transceiver module for building multichip neuromorphic vision systems. We describe the circuits that carry out the main processing stages of the selective attention mechanism and provide experimental data for each circuit. We demonstrate the expected behavior of the model at the system level by stimulating the chip with both artificially generated control signals and signals obtained from a saliency map, computed from an image containing several salient features.

  13. Top-down design and verification methodology for analog mixed-signal integrated circuits

    NARCIS (Netherlands)

    Beviz, P.

    2016-01-01

    The current report contains the introduction of a novel Top-Down Design and Verification methodology for AMS integrated circuits. With the introduction of new design and verification flow, more reliable and efficient development of AMS ICs is possible. The assignment incorporated the research on the

  14. Log-ratio circuit for beam position monitoring

    International Nuclear Information System (INIS)

    Wells, F.D.; Shafer, R.E.; Gilpatrick, J.D.; Shurter, R.B.

    1990-01-01

    A synopsis is given of work in progress on a new signal processing technique for obtaining real-time normalized beam position information from sensing electrodes in accelerator beam pipes. The circuit employs wideband logarithmic amplifiers in a configuration that converts pickup electrode signals to position signals that are substantially independent of beam current. The circuit functions as a ratio detector that computes the logarithm of (A/B) as (Log A-Log B), and presents the result in a video (real-time analog) format representing beam position. It has potential benefits of greater dynamic range and better linearity than other techniques currently used and it may be able to operate at substantially higher frequencies. 4 refs., 8 figs

  15. Adaptive Gain and Analog Wavelet Transform for Low-Power Infrared Image Sensors

    Directory of Open Access Journals (Sweden)

    P. Villard

    2012-01-01

    Full Text Available A decorrelation and analog-to-digital conversion scheme aiming to reduce the power consumption of infrared image sensors is presented in this paper. To exploit both intraframe redundancy and inherent photon shot noise characteristics, a column based 1D Haar analog wavelet transform combined with variable gain amplification prior to A/D conversion is used. This allows to use only an 11-bit ADC, instead of a 13-bit one, and to save 15% of data transfer. An 8×16 pixels test circuit demonstrates this functionality.

  16. Ultra-low power circuits based on tunnel FETs for energy harvesting applications

    OpenAIRE

    Cavalheiro, David

    2017-01-01

    There has been a tremendous evolution in integrated circuit technology in the past decades. With the scaling of complementary metal-oxide-semiconductor (CMOS) transistors, faster, less power consuming and more complex chips per unit area have made possible electronic gadgets to evolve to what we see today. The increasing demand in electronic portability imposes low power consumption as a key metric to analog and digital circuit design. While dynamic power consumption decreases quadraticall...

  17. Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

    Science.gov (United States)

    Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

    2003-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

  18. Connection of comparator circuit for pseudocoincidence counting of radioactive aerosols

    International Nuclear Information System (INIS)

    Fukatko, T.; Hajek, P.; Vidra, M.

    1985-01-01

    A block diagram is presented of the radioactive aerosol measuring instrument. The first counter records electric pulses corresponding to gross alpha activity and the second indicates pseudocoincidences derived from natural radioactivity. Data from the counters are converted to analog voltages which in the comparator circuit are compared such that the mean value of the output voltage is zero insofar as artificial radioactivity is not present on the filter. The designed connection of the comparator circuit allows the permanent adjustment of the whole measuring equipment to maximum sensitivity. (E.S.)

  19. Circuit modeling for electromagnetic compatibility

    CERN Document Server

    Darney, Ian B

    2013-01-01

    Very simply, electromagnetic interference (EMI) costs money, reduces profits, and generally wreaks havoc for circuit designers in all industries. This book shows how the analytic tools of circuit theory can be used to simulate the coupling of interference into, and out of, any signal link in the system being reviewed. The technique is simple, systematic and accurate. It enables the design of any equipment to be tailored to meet EMC requirements. Every electronic system consists of a number of functional modules interconnected by signal links and power supply lines. Electromagnetic interference

  20. Modelling of multilayer piezoelectric transducers for echographic applications Equivalent circuits

    International Nuclear Information System (INIS)

    Ramos, A.; Riera, E.; San Emeterio, J.L.; Sanz, P.T.

    1988-01-01

    In this paper, the main equivalent circuits of pulse-echo, single element, multilayer piezoelectric transducers, are analysed. The analogy of matching layers with lossless transmission lines is described. Finally, using the KLM model, the effects of backing and matching layers on the bandwidth and impulse response is analysed. (Author)

  1. Design of organic complementary circuits and systems on foil

    CERN Document Server

    Abdinia, Sahel; Cantatore, Eugenio

    2015-01-01

    This book describes new approaches to fabricate complementary organic electronics, and focuses on the design of circuits and practical systems created using these manufacturing approaches. The authors describe two state-of-the-art, complementary organic technologies, characteristics and modeling of their transistors and their capability to implement circuits and systems on foil. Readers will benefit from the valuable overview of the challenges and opportunities that these extremely innovative technologies provide. ·         Demonstrates first circuits implemented using specific complementary organic technologies, including first printed analog to digital converter, first dynamic logic on foil and largest complementary organic circuit ·         Includes step-by-step design from single transistor level to complete systems on foil ·         Provides a platform for comparing state-of-the-art complementary organic technologies and for comparing these with other similar technologies, spec...

  2. Resonant Tunneling Analog-To-Digital Converter

    Science.gov (United States)

    Broekaert, T. P. E.; Seabaugh, A. C.; Hellums, J.; Taddiken, A.; Tang, H.; Teng, J.; vanderWagt, J. P. A.

    1995-01-01

    As sampling rates continue to increase, current analog-to-digital converter (ADC) device technologies will soon reach a practical resolution limit. This limit will most profoundly effect satellite and military systems used, for example, for electronic countermeasures, electronic and signal intelligence, and phased array radar. New device and circuit concepts will be essential for continued progress. We describe a novel, folded architecture ADC which could enable a technological discontinuity in ADC performance. The converter technology is based on the integration of multiple resonant tunneling diodes (RTD) and hetero-junction transistors on an indium phosphide substrate. The RTD consists of a layered semiconductor hetero-structure AlAs/InGaAs/AlAs(2/4/2 nm) clad on either side by heavily doped InGaAs contact layers. Compact quantizers based around the RTD offer a reduction in the number of components and a reduction in the input capacitance Because the component count and capacitance scale with the number of bits N, rather than by 2 (exp n) as in the flash ADC, speed can be significantly increased, A 4-bit 2-GSps quantizer circuit is under development to evaluate the performance potential. Circuit designs for ADC conversion with a resolution of 6-bits at 25GSps may be enabled by the resonant tunneling approach.

  3. Learning fast accurate movements requires intact frontostriatal circuits

    Directory of Open Access Journals (Sweden)

    Britne eShabbott

    2013-11-01

    Full Text Available The basal ganglia are known to play a crucial role in movement execution, but their importance for motor skill learning remains unclear. Obstacles to our understanding include the lack of a universally accepted definition of motor skill learning (definition confound, and difficulties in distinguishing learning deficits from execution impairments (performance confound. We studied how healthy subjects and subjects with a basal ganglia disorder learn fast accurate reaching movements, and we addressed the definition and performance confounds by: 1 focusing on an operationally defined core element of motor skill learning (speed-accuracy learning, and 2 using normal variation in initial performance to separate movement execution impairment from motor learning abnormalities. We measured motor skill learning learning as performance improvement in a reaching task with a speed-accuracy trade-off. We compared the performance of subjects with Huntington’s disease (HD, a neurodegenerative basal ganglia disorder, to that of premanifest carriers of the HD mutation and of control subjects. The initial movements of HD subjects were less skilled (slower and/or less accurate than those of control subjects. To factor out these differences in initial execution, we modeled the relationship between learning and baseline performance in control subjects. Subjects with HD exhibited a clear learning impairment that was not explained by differences in initial performance. These results support a role for the basal ganglia in both movement execution and motor skill learning.

  4. Electron commutator on integrated circuits

    International Nuclear Information System (INIS)

    Demidenko, V.V.

    1975-01-01

    The scheme and the parameters of an electron 16-channel contactless commutator based entirely on integrated circuits are described. The device consists of a unit of analog keys based on field-controlled metal-insulator-semiconductor (m.i.s.) transistors, operation amplifier comparators controlling these keys, and a level distributor. The distributor is based on a ''matrix'' scheme and comprises two ring-shaped shift registers plugged in series and a decoder base on two-input logical elements I-NE. The principal dynamical parameters of the circuit are as follows: the control signal delay in the distributor. 50 nsec; the total channel switch-over time, 500-600 nsec. The commutator transmits both constant signals and pulses whose duration reaches tens of nsec. The commutator can be used in data acquisition and processing systems, for shaping complicated signals (for example), (otherwise signals), for simultaneous oscillographing of several signals, and so forth [ru

  5. Design of Microcantilever-Based Biosensor with Digital Feedback Control Circuit

    Directory of Open Access Journals (Sweden)

    Jayu P. Kalambe

    2012-01-01

    Full Text Available This paper present the design of cantilever-based biosensors with new readout, which hold promises as fast and cheap “point of care” device as well as interesting research tools. The fabrication process and related issues of the cantilever based bio-sensor are discussed. Coventorware simulation is carried out to analyze the device behavior. A fully integrated control circuit has been designed to solve manufacturing challenge which will take care of positioning of the cantilever instead of creating nanometer gap between the electrodes. The control circuit will solve the manufacturing challenge faced by the readout methods where it is essential to maintain precise gap between the electrodes. The circuit can take care of variation obtained due to fabrication process and maintain the precise gap between the electrodes by electrostatic actuation. The control circuit consist of analog and digital modules. The reliability issues of the sensor are also discussed.

  6. A 14-bit 50 MS/s sample-and-hold circuit for pipelined ADC

    International Nuclear Information System (INIS)

    Yue Sen; Zhao Yiqiang; Pang Ruilong; Sheng Yun

    2014-01-01

    A high performance sample-and-hold (S/H) circuit used in a pipelined analog-to-digital converter (ADC) is presented. Capacitor flip-around architecture is used in this S/H circuit with a novel gain-boosted differential folded cascode operational transconductance amplifier. A double-bootstrapped switch is designed to improve the performance of the circuit. The circuit is implemented using a 0.18 μm 1P6M CMOS process. Measurement results show that the effective number of bits is 14.03 bits, the spurious free dynamic range is 94.62 dB, the signal to noise and distortion ratio is 86.28 dB, and the total harmonic distortion is −91:84 dB for a 5 MHz input signal with 50 MS/s sampling rate. A pipeline ADC with the designed S/H circuit has been implemented. (semiconductor integrated circuits)

  7. Performance of in-pixel circuits for photon counting arrays (PCAs) based on polycrystalline silicon TFTs

    International Nuclear Information System (INIS)

    Liang, Albert K; Koniczek, Martin; Antonuk, Larry E; El-Mohri, Youcef; Zhao, Qihua; Street, Robert A; Lu, Jeng Ping

    2016-01-01

    Photon counting arrays (PCAs), defined as pixelated imagers which measure the absorbed energy of x-ray photons individually and record this information digitally, are of increasing clinical interest. A number of PCA prototypes with a 1 mm pixel-to-pixel pitch have recently been fabricated with polycrystalline silicon (poly-Si)—a thin-film technology capable of creating monolithic imagers of a size commensurate with human anatomy. In this study, analog and digital simulation frameworks were developed to provide insight into the influence of individual poly-Si transistors on pixel circuit performance—information that is not readily available through empirical means. The simulation frameworks were used to characterize the circuit designs employed in the prototypes. The analog framework, which determines the noise produced by individual transistors, was used to estimate energy resolution, as well as to identify which transistors contribute the most noise. The digital framework, which analyzes how well circuits function in the presence of significant variations in transistor properties, was used to estimate how fast a circuit can produce an output (referred to as output count rate). In addition, an algorithm was developed and used to estimate the minimum pixel pitch that could be achieved for the pixel circuits of the current prototypes. The simulation frameworks predict that the analog component of the PCA prototypes could have energy resolution as low as 8.9% full width at half maximum (FWHM) at 70 keV; and the digital components should work well even in the presence of significant thin-film transistor (TFT) variations, with the fastest component having output count rates as high as 3 MHz. Finally, based on conceivable improvements in the underlying fabrication process, the algorithm predicts that the 1 mm pitch of the current PCA prototypes could be reduced significantly, potentially to between ∼240 and 290 μm. (paper)

  8. Aida-CMK multi-algorithm optimization kernel applied to analog IC sizing

    CERN Document Server

    Lourenço, Ricardo; Horta, Nuno

    2015-01-01

    This work addresses the research and development of an innovative optimization kernel applied to analog integrated circuit (IC) design. Particularly, this works describes the modifications inside the AIDA Framework, an electronic design automation framework fully developed by at the Integrated Circuits Group-LX of the Instituto de Telecomunicações, Lisbon. It focusses on AIDA-CMK, by enhancing AIDA-C, which is the circuit optimizer component of AIDA, with a new multi-objective multi-constraint optimization module that constructs a base for multiple algorithm implementations. The proposed solution implements three approaches to multi-objective multi-constraint optimization, namely, an evolutionary approach with NSGAII, a swarm intelligence approach with MOPSO and stochastic hill climbing approach with MOSA. Moreover, the implemented structure allows the easy hybridization between kernels transforming the previous simple NSGAII optimization module into a more evolved and versatile module supporting multiple s...

  9. Design, Analysis and Test of Logic Circuits Under Uncertainty

    CERN Document Server

    Krishnaswamy, Smita; Hayes, John P

    2013-01-01

    Integrated circuits (ICs) increasingly exhibit uncertain characteristics due to soft errors, inherently probabilistic devices, and manufacturing variability. As device technologies scale, these effects can be detrimental to the reliability of logic circuits.  To improve future semiconductor designs, this book describes methods for analyzing, designing, and testing circuits subject to probabilistic effects. The authors first develop techniques to model inherently probabilistic methods in logic circuits and to test circuits for determining their reliability after they are manufactured. Then, they study error-masking mechanisms intrinsic to digital circuits and show how to leverage them to design more reliable circuits.  The book describes techniques for:   • Modeling and reasoning about probabilistic behavior in logic circuits, including a matrix-based reliability-analysis framework;   • Accurate analysis of soft-error rate (SER) based on functional-simulation, sufficiently scalable for use in gate-l...

  10. On the impact of approximate computation in an analog DeSTIN architecture.

    Science.gov (United States)

    Young, Steven; Lu, Junjie; Holleman, Jeremy; Arel, Itamar

    2014-05-01

    Deep machine learning (DML) holds the potential to revolutionize machine learning by automating rich feature extraction, which has become the primary bottleneck of human engineering in pattern recognition systems. However, the heavy computational burden renders DML systems implemented on conventional digital processors impractical for large-scale problems. The highly parallel computations required to implement large-scale deep learning systems are well suited to custom hardware. Analog computation has demonstrated power efficiency advantages of multiple orders of magnitude relative to digital systems while performing nonideal computations. In this paper, we investigate typical error sources introduced by analog computational elements and their impact on system-level performance in DeSTIN--a compositional deep learning architecture. These inaccuracies are evaluated on a pattern classification benchmark, clearly demonstrating the robustness of the underlying algorithm to the errors introduced by analog computational elements. A clear understanding of the impacts of nonideal computations is necessary to fully exploit the efficiency of analog circuits.

  11. Magnetomicrofluidics Circuits for Organizing Bioparticle Arrays

    Science.gov (United States)

    Abedini-Nassab, Roozbeh

    Single-cell analysis (SCA) tools have important applications in the analysis of phenotypic heterogeneity, which is difficult or impossible to analyze in bulk cell culture or patient samples. SCA tools thus have a myriad of applications ranging from better credentialing of drug therapies to the analysis of rare latent cells harboring HIV infection or in Cancer. However, existing SCA systems usually lack the required combination of programmability, flexibility, and scalability necessary to enable the study of cell behaviors and cell-cell interactions at the scales sufficient to analyze extremely rare events. To advance the field, I have developed a novel, programmable, and massively-parallel SCA tool which is based on the principles of computer circuits. By integrating these magnetic circuits with microfluidics channels, I developed a platform that can organize a large number of single particles into an array in a controlled manner. My magnetophoretic circuits use passive elements constructed in patterned magnetic thin films to move cells along programmed tracks with an external rotating magnetic field. Cell motion along these tracks is analogous to the motion of charges in an electrical conductor, following a rule similar to Ohm's law. I have also developed asymmetric conductors, similar to electrical diodes, and storage sites for cells that behave similarly to electrical capacitors. I have also developed magnetophoretic circuits which use an overlaid pattern of microwires to switch single cells between different tracks. This switching mechanism, analogous to the operation of electronic transistors, is achieved by establishing a semiconducting gap in the magnetic pattern which can be changed from an insulating state to a conducting state by application of electrical current to an overlaid electrode. I performed an extensive study on the operation of transistors to optimize their geometry and minimize the required gate currents. By combining these elements into

  12. Microscale solid-state thermal diodes enabling ambient temperature thermal circuits for energy applications

    KAUST Repository

    Wang, Song; Cottrill, Anton L.; Kunai, Yuichiro; Toland, Aubrey R.; Liu, Pingwei; Wang, Wen-Jun; Strano, Michael S.

    2017-01-01

    rectifications range from 1.18 to 1.34. We show that such devices perform reliably enough to operate in thermal diode bridges, dynamic thermal circuits capable of transforming oscillating temperature inputs into single polarity temperature differences – analogous

  13. Compact physical model of a-IGZO TFTs for circuit simulation

    NARCIS (Netherlands)

    Ghittorelli, M.; Torricelli, F.; Garripoli, C.; Van Der Steen, J.L.J.P.; Gelinck, G.H.; Abdinia, S.; Cantatore, E.; Kovacs-Vajna, Z.M.

    2017-01-01

    Amorphous InGaZnO (a-IGZO) is a candidate material for thin-film transistors (TFTs) owing to its large electron mobility. The development of high functionality circuits requires accurate and efficient circuit simulation that, in turn, is based on compact physical a-IGZO TFTs models. Here we propose

  14. A Parallel Genetic Algorithm for Automated Electronic Circuit Design

    Science.gov (United States)

    Long, Jason D.; Colombano, Silvano P.; Haith, Gary L.; Stassinopoulos, Dimitris

    2000-01-01

    issues in the GA, it is possible to have idle processors. However, as long as the load at each processing node is similar, the processors are kept busy nearly all of the time. In applying GAs to circuit design, a suitable genetic representation 'is that of a circuit-construction program. We discuss one such circuit-construction programming language and show how evolution can generate useful analog circuit designs. This language has the desirable property that virtually all sets of combinations of primitives result in valid circuit graphs. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. Using a parallel genetic algorithm and circuit simulation software, we present experimental results as applied to three analog filter and two amplifier design tasks. For example, a figure shows an 85 dB amplifier design evolved by our system, and another figure shows the performance of that circuit (gain and frequency response). In all tasks, our system is able to generate circuits that achieve the target specifications.

  15. Applying the Analog Configurability Test Approach in a Wireless Sensor Network Application

    Directory of Open Access Journals (Sweden)

    Agustín Laprovitta

    2014-01-01

    Full Text Available This work addresses the application of the analog configurability test (ACT approach for an embedded analog configurable circuit (EACC, composed of operational amplifiers and interconnection resources that are embedded in the MSP430xG461x microcontrollers family. This test strategy is particularly useful for in-field application requiring reliability, safe operation, or fault tolerance characteristics. Our test proposal consists of programming a reduced set of available configurations for the EACC and testing its functionality by measuring only a few key parameters. The processor executes an embedded test routine that sequentially programs selected configurations, sets the test stimulus, acquires data from the internal ADC, and performs required calculations. The test approach is experimentally evaluated using an embedded system-based real application board. Our experimental results show very good repeatability, with very low errors. These results show that the ACT proposed here is useful for testing the functionality of the circuit under test in a real application context by using a simple strategy at a very low cost.

  16. Analog Integrated Circuit and System Design for a Compact, Low-Power Cochlear Implant

    NARCIS (Netherlands)

    Ngamkham, W.

    2015-01-01

    Cochlear Implants (CIs) are prosthetic devices that restore hearing in profoundly deaf patients by bypassing the damaged parts of the inner ear and directly stimulating the remaining auditory nerve fibers in the cochlea with electrical pulses. This thesis describs the electronic circuit design of

  17. Experimental Verification of Guided-Wave Lumped Circuits Using Waveguide Metamaterials

    Science.gov (United States)

    Li, Yue; Zhang, Zhijun

    2018-04-01

    Through the construction and characterization in microwave frequencies, we experimentally demonstrate our recently developed theory of waveguide lumped circuits, i.e., waveguide metatronics [Sci. Adv. 2, e1501790 (2016), 10.1126/sciadv.1501790], as a method to design subwavelength-scaled analog circuits. In the paradigm of waveguide metatronics, numbers of lumped inductors and capacitors are easily integrated functionally inside the waveguide, which is an irreplaceable transmission line in millimeter-wave and terahertz systems with the advantages of low radiation loss and low crosstalk. An example of multiple-ordered metatronic filters with layered structures is fabricated utilizing the technique of substrate integrated waveguides, which can be easily constructed by the printed-circuit-board process. The materials used in the construction are also typical microwave materials with positive permittivity, low loss, and negligible dispersion, imitating the plasmonic materials with negative permittivity in the optical domain. The results verify the theory of waveguide metatronics, which provides an efficient platform of functional lumped circuit design for guided-wave processing.

  18. Flexible circuits with integrated switches for robotic shape sensing

    Science.gov (United States)

    Harnett, C. K.

    2016-05-01

    Digital switches are commonly used for detecting surface contact and limb-position limits in robotics. The typical momentary-contact digital switch is a mechanical device made from metal springs, designed to connect with a rigid printed circuit board (PCB). However, flexible printed circuits are taking over from the rigid PCB in robotics because the circuits can bend while carrying signals and power through moving joints. This project is motivated by a previous work where an array of surface-mount momentary contact switches on a flexible circuit acted as an all-digital shape sensor compatible with the power resources of energy harvesting systems. Without a rigid segment, the smallest commercially-available surface-mount switches would detach from the flexible circuit after several bending cycles, sometimes violently. This report describes a low-cost, conductive fiber based method to integrate electromechanical switches into flexible circuits and other soft, bendable materials. Because the switches are digital (on/off), they differ from commercially-available continuous-valued bend/flex sensors. No amplification or analog-to-digital conversion is needed to read the signal, but the tradeoff is that the digital switches only give a threshold curvature value. Boundary conditions on the edges of the flexible circuit are key to setting the threshold curvature value for switching. This presentation will discuss threshold-setting, size scaling of the design, automation for inserting a digital switch into the flexible circuit fabrication process, and methods for reconstructing a shape from an array of digital switch states.

  19. Analog Front-End Electronics in Beam Instrumentation

    CERN Document Server

    Boscolo, A

    2005-01-01

    The work gives an overview of present and near future technological opportunities for the first analog conditioning and subsequent signal processing of sensor signal. The interactions between beam sensor capability, their signals characteristics and the system requirements are analyzed from different approaches as: full analog continuous, sampled time discrete, full digital time and amplitude discrete. Special attention will be given to the impact of measurement methods and new devices in circuits and instrumentation architecture design, especially from the metrological point of view. A lot of measurement methods and related systems have been developed in order to overcome technological drawbacks and to reach the best cost-performances ratio. By a system revamping, some of these still now show the capability of reaching the actual technological limits in a simpler way in many applications as: ADC, linear and non linear signal processing, ultra high speed logic, etc. These methods could be carried out by the n...

  20. Integrated Circuit Design of 3 Electrode Sensing System Using Two-Stage Operational Amplifier

    Science.gov (United States)

    Rani, S.; Abdullah, W. F. H.; Zain, Z. M.; N, Aqmar N. Z.

    2018-03-01

    This paper presents the design of a two-stage operational amplifier(op amp) for 3-electrode sensing system readout circuits. The designs have been simulated using 0.13μm CMOS technology from Silterra (Malaysia) with Mentor graphics tools. The purpose of this projects is mainly to design a miniature interfacing circuit to detect the redox reaction in the form of current using standard analog modules. The potentiostat consists of several op amps combined together in order to analyse the signal coming from the 3-electrode sensing system. This op amp design will be used in potentiostat circuit device and to analyse the functionality for each module of the system.

  1. A CMOS analog front-end chip for amperometric electrochemical sensors

    International Nuclear Information System (INIS)

    Li Zhichao; Chen Min; Xiao Jingbo; Chen Jie; Liu Yuntao

    2015-01-01

    This paper reports a complimentary metal–oxide–semiconductor (CMOS) analog front-end chip for amperometric electrochemical sensors. The chip includes a digital configuration circuit, which can communicate with an external microcontroller by employing an I 2 C interface bus, and thus is highly programmable. Digital correlative double samples technique and an incremental sigma–delta analog to digital converter (Σ–Δ ADC) are employed to achieve a new proposed system architecture with double samples. The chip has been fabricated in a standard 0.18-μm CMOS process with high-precision and high-linearity performance occupying an area of 1.3 × 1.9 mm 2 . Sample solutions with various phosphate concentrations have been detected with a step concentration of 0.01 mg/L. (paper)

  2. Crows spontaneously exhibit analogical reasoning.

    Science.gov (United States)

    Smirnova, Anna; Zorina, Zoya; Obozova, Tanya; Wasserman, Edward

    2015-01-19

    Analogical reasoning is vital to advanced cognition and behavioral adaptation. Many theorists deem analogical thinking to be uniquely human and to be foundational to categorization, creative problem solving, and scientific discovery. Comparative psychologists have long been interested in the species generality of analogical reasoning, but they initially found it difficult to obtain empirical support for such thinking in nonhuman animals (for pioneering efforts, see [2, 3]). Researchers have since mustered considerable evidence and argument that relational matching-to-sample (RMTS) effectively captures the essence of analogy, in which the relevant logical arguments are presented visually. In RMTS, choice of test pair BB would be correct if the sample pair were AA, whereas choice of test pair EF would be correct if the sample pair were CD. Critically, no items in the correct test pair physically match items in the sample pair, thus demanding that only relational sameness or differentness is available to support accurate choice responding. Initial evidence suggested that only humans and apes can successfully learn RMTS with pairs of sample and test items; however, monkeys have subsequently done so. Here, we report that crows too exhibit relational matching behavior. Even more importantly, crows spontaneously display relational responding without ever having been trained on RMTS; they had only been trained on identity matching-to-sample (IMTS). Such robust and uninstructed relational matching behavior represents the most convincing evidence yet of analogical reasoning in a nonprimate species, as apes alone have spontaneously exhibited RMTS behavior after only IMTS training. Copyright © 2015 Elsevier Ltd. All rights reserved.

  3. Analog front-end for pixel sensors in a 3D CMOS technology for the SuperB Layer0

    International Nuclear Information System (INIS)

    Manazza, A.; Gaioni, L.; Re, V.

    2011-01-01

    This work is concerned with the design of two different analog channels for hybrid and monolithic pixels readout in view of applications to the SVT at the SuperB Factory. The circuits have been designed in a 130nm CMOS, vertically integrated technology, which, among others, may provide some advantages in terms of functional density and electrical isolation between the analog and the digital sections of the front-end.

  4. Command Interface ASIC - Analog Interface ASIC Chip Set

    Science.gov (United States)

    Ruiz, Baldes; Jaffe, Burton; Burke, Gary; Lung, Gerald; Pixler, Gregory; Plummer, Joe; Katanyoutanant,, Sunant; Whitaker, William

    2003-01-01

    A command interface application-specific integrated circuit (ASIC) and an analog interface ASIC have been developed as a chip set for remote actuation and monitoring of a collection of switches, which can be used to control generic loads, pyrotechnic devices, and valves in a high-radiation environment. The command interface ASIC (CIA) can be used alone or in combination with the analog interface ASIC (AIA). Designed primarily for incorporation into spacecraft control systems, they are also suitable for use in high-radiation terrestrial environments (e.g., in nuclear power plants and facilities that process radioactive materials). The primary role of the CIA within a spacecraft or other power system is to provide a reconfigurable means of regulating the power bus, actuating all valves, firing all pyrotechnic devices, and controlling the switching of power to all switchable loads. The CIA is a mixed-signal (analog and digital) ASIC that includes an embedded microcontroller with supporting fault-tolerant switch control and monitoring circuitry that is capable of connecting to a redundant set of interintegrated circuit (I(sup 2)C) buses. Commands and telemetry requests are communicated to the CIA. Adherence to the I(sup 2)C bus standard helps to reduce development costs by facilitating the use of previously developed, commercially available components. The AIA is a mixed-signal ASIC that includes the analog circuitry needed to connect the CIA to a custom higher powered version of the I(sup 2)C bus. The higher-powered version is designed to enable operation with bus cables longer than those contemplated in the I(sup 2)C standard. If there are multiple higher-power I(sup 2)C-like buses, then there must an AIA between the CIA and each such bus. The AIA includes two identical interface blocks: one for the side-A I(sup 2)C clock and data buses and the other for the side B buses. All the AIAs on each side are powered from a common power converter module (PCM). Sides A and B

  5. Contribution to the study of ionizing radiation effects on bipolar technologies: application to the hardening of integrated circuits

    International Nuclear Information System (INIS)

    Briand, R.

    2001-01-01

    The use of analog integrated circuits in radiation environments raises the problem of their behaviour with respect to the different effects induced by particles and radiations. The first chapter of this thesis presents the origins of radiations and the different topologies of bipolar transistors. The effects of ionizing radiations on bipolar components, like cumulative dose, dose rates, and single events, are detailed in three distinct chapters with the same scientifical approach. The simulation of the physical degradation phenomena of the components allows to establish original electrical models coming from the understanding of the induced mechanisms. These models are used to evaluate the degradations occurring in linear analogic circuits. Common and original hardening methods are presented, some of which are applied to bipolar integrated circuit technologies. Finally, experimental laser beam test techniques are presented, which are used to reproduce the dose rate and the single events. (J.S.)

  6. Analog VLSI Models of Range-Tuned Neurons in the Bat Echolocation System

    Directory of Open Access Journals (Sweden)

    Horiuchi Timothy

    2003-01-01

    Full Text Available Bat echolocation is a fascinating topic of research for both neuroscientists and engineers, due to the complex and extremely time-constrained nature of the problem and its potential for application to engineered systems. In the bat's brainstem and midbrain exist neural circuits that are sensitive to the specific difference in time between the outgoing sonar vocalization and the returning echo. While some of the details of the neural mechanisms are known to be species-specific, a basic model of reafference-triggered, postinhibitory rebound timing is reasonably well supported by available data. We have designed low-power, analog VLSI circuits to mimic this mechanism and have demonstrated range-dependent outputs for use in a real-time sonar system. These circuits are being used to implement range-dependent vocalization amplitude, vocalization rate, and closest target isolation.

  7. Simple, fast and accurate two-diode model for photovoltaic modules

    Energy Technology Data Exchange (ETDEWEB)

    Ishaque, Kashif; Salam, Zainal; Taheri, Hamed [Faculty of Electrical Engineering, Universiti Teknologi Malaysia, UTM 81310, Skudai, Johor Bahru (Malaysia)

    2011-02-15

    This paper proposes an improved modeling approach for the two-diode model of photovoltaic (PV) module. The main contribution of this work is the simplification of the current equation, in which only four parameters are required, compared to six or more in the previously developed two-diode models. Furthermore the values of the series and parallel resistances are computed using a simple and fast iterative method. To validate the accuracy of the proposed model, six PV modules of different types (multi-crystalline, mono-crystalline and thin-film) from various manufacturers are tested. The performance of the model is evaluated against the popular single diode models. It is found that the proposed model is superior when subjected to irradiance and temperature variations. In particular the model matches very accurately for all important points of the I-V curves, i.e. the peak power, short-circuit current and open circuit voltage. The modeling method is useful for PV power converter designers and circuit simulator developers who require simple, fast yet accurate model for the PV module. (author)

  8. Engineering embedded systems physics, programs, circuits

    CERN Document Server

    Hintenaus, Peter

    2015-01-01

    This is a textbook for graduate and final-year-undergraduate computer-science and electrical-engineering students interested in the hardware and software aspects of embedded and cyberphysical systems design. It is comprehensive and self-contained, covering everything from the basics to case-study implementation. Emphasis is placed on the physical nature of the problem domain and of the devices used. The reader is assumed to be familiar on a theoretical level with mathematical tools like ordinary differential equation and Fourier transforms. In this book these tools will be put to practical use. Engineering Embedded Systems begins by addressing basic material on signals and systems, before introducing to electronics. Treatment of digital electronics accentuating synchronous circuits and including high-speed effects proceeds to micro-controllers, digital signal processors and programmable logic. Peripheral units and decentralized networks are given due weight. The properties of analog circuits and devices like ...

  9. Generator of pulses with the nanosecond duration and accurate amplitude using the digital control in the CAMAC standard

    International Nuclear Information System (INIS)

    Basiladze, S.G.; Nguen Kuang Min'

    1980-01-01

    A generator of square-wave fine-amplitude nanosecond pulses is described. The generator is primarily intended for checking the performances of fast electronics analog-to-digital units with the help of a computer. In addition to digital control the pulse amplitude can be controlled manually or by the external voltage. Basic circuits of main generator assemblies: a triggering circuit, transistor key and digital-to-analog converter are given. Output pulses produced by the generator have the following parameters: the amplitude from - 0.15 to - 10 V (smooth or gradual, with a minimum step of 5 mV), the rising and decay pulse times approximately 2 ns, the maximum repetition frequency 10 kHz, the control linearity at a pulse duration of more than 50 ns 0.15%. A double-width CAMAC cell accomodates two generators

  10. [Design of High Frequency Signal Detecting Circuit of Human Body Impedance Used for Ultrashort Wave Diathermy Apparatus].

    Science.gov (United States)

    Fan, Xu; Wang, Yunguang; Cheng, Haiping; Chong, Xiaochen

    2016-02-01

    The present circuit was designed to apply to human tissue impedance tuning and matching device in ultra-short wave treatment equipment. In order to judge if the optimum status of circuit parameter between energy emitter circuit and accepter circuit is in well syntony, we designed a high frequency envelope detect circuit to coordinate with automatic adjust device of accepter circuit, which would achieve the function of human tissue impedance matching and tuning. Using the sampling coil to receive the signal of amplitude-modulated wave, we compared the voltage signal of envelope detect circuit with electric current of energy emitter circuit. The result of experimental study was that the signal, which was transformed by the envelope detect circuit, was stable and could be recognized by low speed Analog to Digital Converter (ADC) and was proportional to the electric current signal of energy emitter circuit. It could be concluded that the voltage, transformed by envelope detect circuit can mirror the real circuit state of syntony and realize the function of human tissue impedance collecting.

  11. Eye Movements Reveal Optimal Strategies for Analogical Reasoning.

    Science.gov (United States)

    Vendetti, Michael S; Starr, Ariel; Johnson, Elizabeth L; Modavi, Kiana; Bunge, Silvia A

    2017-01-01

    Analogical reasoning refers to the process of drawing inferences on the basis of the relational similarity between two domains. Although this complex cognitive ability has been the focus of inquiry for many years, most models rely on measures that cannot capture individuals' thought processes moment by moment. In the present study, we used participants' eye movements to investigate reasoning strategies in real time while solving visual propositional analogy problems (A:B::C:D). We included both a semantic and a perceptual lure on every trial to determine how these types of distracting information influence reasoning strategies. Participants spent more time fixating the analogy terms and the target relative to the other response choices, and made more saccades between the A and B items than between any other items. Participants' eyes were initially drawn to perceptual lures when looking at response choices, but they nonetheless performed the task accurately. We used participants' gaze sequences to classify each trial as representing one of three classic analogy problem solving strategies and related strategy usage to analogical reasoning performance. A project-first strategy, in which participants first extrapolate the relation between the AB pair and then generalize that relation for the C item, was both the most commonly used strategy as well as the optimal strategy for solving visual analogy problems. These findings provide new insight into the role of strategic processing in analogical problem solving.

  12. Eye Movements Reveal Optimal Strategies for Analogical Reasoning

    Directory of Open Access Journals (Sweden)

    Michael S. Vendetti

    2017-06-01

    Full Text Available Analogical reasoning refers to the process of drawing inferences on the basis of the relational similarity between two domains. Although this complex cognitive ability has been the focus of inquiry for many years, most models rely on measures that cannot capture individuals' thought processes moment by moment. In the present study, we used participants' eye movements to investigate reasoning strategies in real time while solving visual propositional analogy problems (A:B::C:D. We included both a semantic and a perceptual lure on every trial to determine how these types of distracting information influence reasoning strategies. Participants spent more time fixating the analogy terms and the target relative to the other response choices, and made more saccades between the A and B items than between any other items. Participants' eyes were initially drawn to perceptual lures when looking at response choices, but they nonetheless performed the task accurately. We used participants' gaze sequences to classify each trial as representing one of three classic analogy problem solving strategies and related strategy usage to analogical reasoning performance. A project-first strategy, in which participants first extrapolate the relation between the AB pair and then generalize that relation for the C item, was both the most commonly used strategy as well as the optimal strategy for solving visual analogy problems. These findings provide new insight into the role of strategic processing in analogical problem solving.

  13. Excitation of graphene plasmons as an analogy with the two-level system

    International Nuclear Information System (INIS)

    Fu, Jiahui; Lv, Bo; Li, Rujiang; Ma, Ruyu; Chen, Wan; Meng, Fanyi

    2016-01-01

    The excitation of graphene plasmons (GPs) is presented as an interaction between the GPs and the incident electromagnetic field. In this Letter, the excitation of GPs in a plasmonic system is interpreted as an analogy with the two-level system by taking the two-coupled graphene-covered gratings as an example. Based on the equivalent circuit theory, the excitation of GPs in the graphene-covered grating is equivalent to the resonance of an oscillator. Thus, according to the governing equation, the electric currents at the resonant frequencies for two-coupled graphene-covered gratings correspond to the energy states in a two-level system. In addition, the excitation of GPs in different two-coupled graphene-covered gratings is numerically studied to validate our theoretical model. Our work provides an intuitive understanding of the excitation of GPs using an analogy with the two-level system. - Highlights: • The excitation of graphene plasmons (GPs) in graphene-covered grating is equivalent to the resonance of an oscillator. • We establish the equivalent circuit of two-level system to analyze the resonant character. • The excitation of GPs in different two-coupled graphene-covered gratings are numerically studied to validate our theoretical model.

  14. Excitation of graphene plasmons as an analogy with the two-level system

    Energy Technology Data Exchange (ETDEWEB)

    Fu, Jiahui [Microwave and Electromagnetic Laboratory, Harbin Institute of Technology, No. 92, Xidazhi Street, Nangang District, Harbin City, Heilongjiang Province (China); Lv, Bo, E-mail: lb19840313@126.com [Microwave and Electromagnetic Laboratory, Harbin Institute of Technology, No. 92, Xidazhi Street, Nangang District, Harbin City, Heilongjiang Province (China); Li, Rujiang [College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027 (China); Ma, Ruyu; Chen, Wan; Meng, Fanyi [Microwave and Electromagnetic Laboratory, Harbin Institute of Technology, No. 92, Xidazhi Street, Nangang District, Harbin City, Heilongjiang Province (China)

    2016-02-15

    The excitation of graphene plasmons (GPs) is presented as an interaction between the GPs and the incident electromagnetic field. In this Letter, the excitation of GPs in a plasmonic system is interpreted as an analogy with the two-level system by taking the two-coupled graphene-covered gratings as an example. Based on the equivalent circuit theory, the excitation of GPs in the graphene-covered grating is equivalent to the resonance of an oscillator. Thus, according to the governing equation, the electric currents at the resonant frequencies for two-coupled graphene-covered gratings correspond to the energy states in a two-level system. In addition, the excitation of GPs in different two-coupled graphene-covered gratings is numerically studied to validate our theoretical model. Our work provides an intuitive understanding of the excitation of GPs using an analogy with the two-level system. - Highlights: • The excitation of graphene plasmons (GPs) in graphene-covered grating is equivalent to the resonance of an oscillator. • We establish the equivalent circuit of two-level system to analyze the resonant character. • The excitation of GPs in different two-coupled graphene-covered gratings are numerically studied to validate our theoretical model.

  15. Error Mitigation for Short-Depth Quantum Circuits

    Science.gov (United States)

    Temme, Kristan; Bravyi, Sergey; Gambetta, Jay M.

    2017-11-01

    Two schemes are presented that mitigate the effect of errors and decoherence in short-depth quantum circuits. The size of the circuits for which these techniques can be applied is limited by the rate at which the errors in the computation are introduced. Near-term applications of early quantum devices, such as quantum simulations, rely on accurate estimates of expectation values to become relevant. Decoherence and gate errors lead to wrong estimates of the expectation values of observables used to evaluate the noisy circuit. The two schemes we discuss are deliberately simple and do not require additional qubit resources, so to be as practically relevant in current experiments as possible. The first method, extrapolation to the zero noise limit, subsequently cancels powers of the noise perturbations by an application of Richardson's deferred approach to the limit. The second method cancels errors by resampling randomized circuits according to a quasiprobability distribution.

  16. Lumped-parameters equivalent circuit for condenser microphones modeling.

    Science.gov (United States)

    Esteves, Josué; Rufer, Libor; Ekeom, Didace; Basrour, Skandar

    2017-10-01

    This work presents a lumped parameters equivalent model of condenser microphone based on analogies between acoustic, mechanical, fluidic, and electrical domains. Parameters of the model were determined mainly through analytical relations and/or finite element method (FEM) simulations. Special attention was paid to the air gap modeling and to the use of proper boundary condition. Corresponding lumped-parameters were obtained as results of FEM simulations. Because of its simplicity, the model allows a fast simulation and is readily usable for microphone design. This work shows the validation of the equivalent circuit on three real cases of capacitive microphones, including both traditional and Micro-Electro-Mechanical Systems structures. In all cases, it has been demonstrated that the sensitivity and other related data obtained from the equivalent circuit are in very good agreement with available measurement data.

  17. Optimization of Modulator and Circuits for Low Power Continuous-Time Delta-Sigma ADC

    DEFF Research Database (Denmark)

    Marker-Villumsen, Niels; Bruun, Erik

    2014-01-01

    This paper presents a new optimization method for achieving a minimum current consumption in a continuous-time Delta-Sigma analog-to-digital converter (ADC). The method is applied to a continuous-time modulator realised with active-RC integrators and with a folded-cascode operational transconduc...... levels are swept. Based on the results of the circuit analysis, for each modulator combination the summed current consumption of the 1st integrator and quantizer of the ADC is determined. By also sweeping the partitioning of the noise power for the different circuit parts, the optimum modulator...

  18. Self-Organizing Neural Circuits for Sensory-Guided Motor Control

    National Research Council Canada - National Science Library

    Grossberg, Stephen

    1999-01-01

    The reported projects developed mathematical models to explain how self-organizing neural circuits that operate under continuous or intermittent sensory guidance achieve flexible and accurate control of human movement...

  19. Designer's handbook of instrumentation and control circuits

    CERN Document Server

    Carr, Joseph J

    1991-01-01

    Here is a comprehensive, practical guide to the entire process of analog instrumentation and control, from sensor input to data conversion circuitry and final output. This readable handbook avoids complex mathematical treatments, instead taking an applications-oriented approach and presenting many sample circuits and concrete examples. It is an essential reference for engineers and high-level technicians in a variety of scientific and engineering fields--anywhere data is collected electronically and where such data is used to control physical processes.Key Features* Covers design o

  20. A universal gyroscope driving circuit with 70dB amplitude control range

    KAUST Repository

    Abdelghany, Mohamed A.

    2010-08-01

    A CMOS variable gain driving circuit with output signal amplitude control for gyroscopes with wide range of quality factors is presented. The driving circuit can be used for gyroscopes with Q values higher than 500. The circuit uses a current-commutating switching mixer to control the gyroscope driving signal level. Conventional driving circuits use automatic gain control (AGC) which suffers from limited linear range and the need for an off-chip capacitor for the peak detector and loop filter. Two stage variable gain amplifier is used in the proposed design to ensure enough gain for oscillation for such a wide range of quality factors. Analog and digital amplitude control methods are used to cover wide range of driving signal amplitude with enough accuracy to hit the maximum driving signal level without sacrificing gyroscope linearity. Due to the high DC gain of the amplifier chain, DC offset resulting from mismatches might saturate the amplifier output. DC offset correction is employed using a secondary negative feedback loop. The proposed driving circuit is being fabricated in 0.6μm CMOS technology. © 2010 IEEE.

  1. The Electron Runaround: Understanding Electric Circuit Basics Through a Classroom Activity

    Science.gov (United States)

    Singh, Vandana

    2010-05-01

    Several misconceptions abound among college students taking their first general physics course, and to some extent pre-engineering physics students, regarding the physics and applications of electric circuits. Analogies used in textbooks, such as those that liken an electric circuit to a piped closed loop of water driven by a water pump, do not completely resolve these misconceptions. Mazur and Knight,2 in particular, separately note that such misconceptions include the notion that electric current on either side of a light bulb in a circuit can be different. Other difficulties and confusions involve understanding why the current in a parallel circuit exceeds the current in a series circuit with the same components, and include the role of the battery (where students may assume wrongly that a dry cell battery is a fixed-current rather than a fixed-voltage device). A simple classroom activity that students can play as a game can resolve these misconceptions, providing an intellectual as well as a hands-on understanding. This paper describes the "Electron Runaround," first developed by the author to teach extremely bright 8-year-old home-schooled children the basics of electric circuits and subsequently altered (according to the required level of instruction) and used for various college physics courses.

  2. BPM ANALOG FRONT-END ELECTRONICS BASED ON THE AD8307 LOG AMPLIFIER

    International Nuclear Information System (INIS)

    R. SHURTER; ET AL

    2000-01-01

    Beam position monitor (BPM) signal-processing electronics utilizing the Analog Devices AD8307 logarithmic amplifier has been developed for the Low Energy Demonstration Accelerator (LEDA), part of the Accelerator Production of Tritium (APT) project at Los Alamos. The low-pass filtered 350 MHz fundamental signal from each of the four microstrip electrodes in a BPM is ''detected'' by an AD8307 log amp, amplified and scaled to accommodate the 0 to +5V input of an analog-to-digital (A/D) converter. The resultant four digitized signals represent a linear power relationship to the electrode signals, which are in turn related to beam current and position. As the AD8307 has a potential dynamic range of approximately 92 dB, much attention must be given to noise reduction, sources of which can be digital signals on the same board, power supplies, inter-channel coupling, stray RF and others. This paper will describe the operational experience of this particular analog front-end electronic circuit design

  3. Signals and Circuits in the Purkinje Neuron

    Directory of Open Access Journals (Sweden)

    Ze'ev R Abrams

    2011-09-01

    Full Text Available Purkinje neurons in the cerebellum have over 100,000 inputs organized in an orthogonal geometry, and a single output channel. As the sole output of the cerebellar cortex layer, their complex firing pattern has been associated with motor control and learning. As such they have been extensively modeled and measured using tools ranging from electrophysiology and neuroanatomy, to dynamic systems and artificial intelligence methods. However, there is an alternative approach to analyze and describe the neuronal output of these cells using concepts from Electrical Engineering, particularly signal processing and digital/analog circuits. By viewing the Purkinje neuron as an unknown circuit to be reverse-engineered, we can use the tools that provide the foundations of today’s integrated circuits and communication systems to analyze the Purkinje system at the circuit level. We use Fourier transforms to analyze and isolate the inherent frequency modes in the Purkinje neuron and define 3 unique frequency ranges associated with the cells’ output. Comparing the Purkinje neuron to a signal generator that can be externally modulated adds an entire level of complexity to the functional role of these neurons both in terms of data analysis and information processing, relying on Fourier analysis methods in place of statistical ones. We also re-describe some of the recent literature in the field, using the nomenclature of signal processing. Furthermore, by comparing the experimental data of the past decade with basic electronic circuitry, we can resolve the outstanding controversy in the field, by recognizing that the Purkinje neuron can act as a multivibrator circuit.

  4. A high speed, wide dynamic range digitizer circuit for photomultiplier tubes

    Energy Technology Data Exchange (ETDEWEB)

    Yarema, R.J.; Foster, G.W.; Knickerbocker, K.; Sarraj, M.; Tschirhart, R.; Whitmore, J.; Zimmerman, T. [Fermi National Accelerator Lab., Batavia, IL (United States); Lindgren, M. [Univ. of California, Los Angeles, CA (United States). Physics Dept.

    1994-06-01

    High energy physics experiments running at high interaction rates frequently require long record lengths for determining a level 1 trigger. The easiest way to provide a long event record is by digital means. In applications requiring wide dynamic range, however, digitization of an analog signal to obtain the digital record has been impossible due to lack of high speed, wide range FADCs. One such application is the readout of thousands of photomultiplier tubes in fixed target and colliding beam experiment calorimeters. A circuit has been designed for digitizing PMT signals over a wide dynamic range (17--18 bits) with 8 bits of resolution at rates up to 53 MHz. Output from the circuit is in a floating point format with a 4 bit exponent and an 8 bit mantissa. The heart of the circuit is a full custom integrated circuit called the QIE (Charge Integrator and Encoder). The design of the QIE and associated circuitry reported here permits operation over a 17 bit dynamic range. Tests of the circuit with a PMT input and a pulsed laser have provided respectable results with little off line correction. Performance of the circuit for demanding applications can be significantly enhanced with additional off line correction. Circuit design, packaging issues, and test results of a multirange device are presented for the first time.

  5. A high speed, wide dynamic range digitizer circuit for photomultiplier tubes

    International Nuclear Information System (INIS)

    Yarema, R.J.; Foster, G.W.; Knickerbocker, K.; Sarraj, M.; Tschirhart, R.; Whitmore, J.; Zimmerman, T.; Lindgren, M.

    1994-06-01

    High energy physics experiments running at high interaction rates frequently require long record lengths for determining a level 1 trigger. The easiest way to provide a long event record is by digital means. In applications requiring wide dynamic range, however, digitization of an analog signal to obtain the digital record has been impossible due to lack of high speed, wide range FADCs. One such application is the readout of thousands of photomultiplier tubes in fixed target and colliding beam experiment calorimeters. A circuit has been designed for digitizing PMT signals over a wide dynamic range (17--18 bits) with 8 bits of resolution at rates up to 53 MHz. Output from the circuit is in a floating point format with a 4 bit exponent and an 8 bit mantissa. The heart of the circuit is a full custom integrated circuit called the QIE (Charge Integrator and Encoder). The design of the QIE and associated circuitry reported here permits operation over a 17 bit dynamic range. Tests of the circuit with a PMT input and a pulsed laser have provided respectable results with little off line correction. Performance of the circuit for demanding applications can be significantly enhanced with additional off line correction. Circuit design, packaging issues, and test results of a multirange device are presented for the first time

  6. Detecting analogical resemblance without retrieving the source analogy.

    Science.gov (United States)

    Kostic, Bogdan; Cleary, Anne M; Severin, Kaye; Miller, Samuel W

    2010-06-01

    We examined whether people can detect analogical resemblance to an earlier experimental episode without being able to recall the experimental source of the analogical resemblance. We used four-word analogies (e.g., robin-nest/beaver-dam), in a variation of the recognition-without-cued-recall method (Cleary, 2004). Participants studied word pairs (e.g., robin-nest) and were shown new word pairs at test, half of which analogically related to studied word pairs (e.g., beaver-dam) and half of which did not. For each test pair, participants first attempted to recall an analogically similar pair from the study list. Then, regardless of whether successful recall occurred, participants were prompted to rate the familiarity of the test pair, which was said to indicate the likelihood that a pair that was analogically similar to the test pair had been studied. Across three experiments, participants demonstrated an ability to detect analogical resemblance without recalling the source analogy. Findings are discussed in terms of their potential relevance to the study of analogical reasoning and insight, as well as to the study of familiarity and recognition memory.

  7. Noise and Spurious Tones Management Techniques for Multi-GHz RF-CMOS Frequency Synthesizers Operating in Large Mixed Analog-Digital SOCs

    Directory of Open Access Journals (Sweden)

    Maxim Adrian

    2006-01-01

    Full Text Available This paper presents circuit techniques and power supply partitioning, filtering, and regulation methods aimed at reducing the phase noise and spurious tones in frequency synthesizers operating in large mixed analog-digital system-on-chip (SOC. The different noise and spur coupling mechanisms are presented together with solutions to minimize their impact on the overall PLL phase noise performance. Challenges specific to deep-submicron CMOS integration of multi-GHz PLLs are revealed, while new architectures that address these issues are presented. Layout techniques that help reducing the parasitic noise and spur coupling between digital and analog blocks are described. Combining system-level and circuit-level low noise design methods, low phase noise frequency synthesizers were achieved which are compatible with the demanding nowadays wireless communication standards.

  8. Diagnosis of Soft Spot Short Defects in Analog Circuits Considering the Thermal Behaviour of the Chip

    Directory of Open Access Journals (Sweden)

    Tadeusiewicz Michał

    2016-06-01

    Full Text Available The paper deals with fault diagnosis of nonlinear analogue integrated circuits. Soft spot short defects are analysed taking into account variations of the circuit parameters due to physical imperfections as well as self-heating of the chip. A method enabling to detect, locate and estimate the value of a spot defect has been developed. For this purpose an appropriate objective function was minimized using an optimization procedure based on the Fibonacci method. The proposed approach exploits DC measurements in the test phase, performed at a limited number of accessible points. For illustration three numerical examples are given.

  9. Implementing size-optimal discrete neural networks require analog circuitry

    Energy Technology Data Exchange (ETDEWEB)

    Beiu, V.

    1998-12-01

    This paper starts by overviewing results dealing with the approximation capabilities of neural networks, as well as bounds on the size of threshold gate circuits. Based on a constructive solution for Kolmogorov`s superpositions the authors show that implementing Boolean functions can be done using neurons having an identity transfer function. Because in this case the size of the network is minimized, it follows that size-optimal solutions for implementing Boolean functions can be obtained using analog circuitry. Conclusions and several comments on the required precision are ending the paper.

  10. 8-bit serial-parallel analog-to-digital converter for fast transient recorder

    International Nuclear Information System (INIS)

    Kulka, Z.; Nadachowski, M.; Zimek, Z.

    1990-08-01

    An 8-bit serial-parallel analog-to-digital converter with a sampling frequency 5 MHz is described. The most important circuits of the device are described and parameters are given. The converter is a central part of a transient recorder type TR-1 designed for recording pulse waveforms in measurements of the kinetics of chemical reactions which are radiation-induced using an electron linear accelerator. 9 refs., 9 figs. (author)

  11. Mixed Analog/Digital Matrix-Vector Multiplier for Neural Network Synapses

    DEFF Research Database (Denmark)

    Lehmann, Torsten; Bruun, Erik; Dietrich, Casper

    1996-01-01

    In this work we present a hardware efficient matrix-vector multiplier architecture for artificial neural networks with digitally stored synapse strengths. We present a novel technique for manipulating bipolar inputs based on an analog two's complements method and an accurate current rectifier...

  12. Pulse Detecting Genetic Circuit – A New Design Approach

    Science.gov (United States)

    Inniss, Mara; Iba, Hitoshi; Way, Jeffrey C.

    2016-01-01

    A robust cellular counter could enable synthetic biologists to design complex circuits with diverse behaviors. The existing synthetic-biological counters, responsive to the beginning of the pulse, are sensitive to the pulse duration. Here we present a pulse detecting circuit that responds only at the falling edge of a pulse–analogous to negative edge triggered electric circuits. As biological events do not follow precise timing, use of such a pulse detector would enable the design of robust asynchronous counters which can count the completion of events. This transcription-based pulse detecting circuit depends on the interaction of two co-expressed lambdoid phage-derived proteins: the first is unstable and inhibits the regulatory activity of the second, stable protein. At the end of the pulse the unstable inhibitor protein disappears from the cell and the second protein triggers the recording of the event completion. Using stochastic simulation we showed that the proposed design can detect the completion of the pulse irrespective to the pulse duration. In our simulation we also showed that fusing the pulse detector with a phage lambda memory element we can construct a counter which can be extended to count larger numbers. The proposed design principle is a new control mechanism for synthetic biology which can be integrated in different circuits for identifying the completion of an event. PMID:27907045

  13. Functional Disturbances Within Frontostriatal Circuits Across Multiple Childhood Psychopathologies

    Science.gov (United States)

    Marsh, Rachel; Maia, Tiago V.; Peterson, Bradley S.

    2009-01-01

    Objective Neuroimaging studies of healthy individuals inform us about the normative maturation of the frontostriatal circuits that subserve self-regulatory control processes. Findings from these studies can be used as a reference frame against which to compare the aberrant development of these processes in individuals across a wide range of childhood psychopathologies. Method The authors reviewed extensive neuroimaging evidence for the presence of abnormalities in frontostriatal circuits in children and adults with Tourette’s syndrome and obsessive-compulsive disorder (OCD) as well as a more limited number of imaging studies of adolescents and adults with anorexia nervosa or bulimia nervosa that, together, implicate dysregulation of frontostriatal control systems in the pathogenesis of these eating disorders. Results The presence of an impaired capacity for self-regulatory control that derives from abnormal development of frontostriatal circuits likely interacts in similar ways with normally occurring somatic sensations and motor urges, intrusive thoughts, sensations of hunger, and preoccupation with body shape and weight to contribute, respectively, to the development of the tics of Tourette’s syndrome, the obsessions of OCD, the binge eating behaviors of bulimia, and the self-starvation of anorexia. Conclusions Analogous brain mechanisms in parallel frontostriatal circuits, or even in differing portions of the same frontostriatal circuit, may underlie the differing behavioral disturbances in these multiple disorders, although further research is needed to confirm this hypothesis. PMID:19448188

  14. Magnetic force microscopy method and apparatus to detect and image currents in integrated circuits

    Science.gov (United States)

    Campbell, Ann. N.; Anderson, Richard E.; Cole, Jr., Edward I.

    1995-01-01

    A magnetic force microscopy method and improved magnetic tip for detecting and quantifying internal magnetic fields resulting from current of integrated circuits. Detection of the current is used for failure analysis, design verification, and model validation. The interaction of the current on the integrated chip with a magnetic field can be detected using a cantilevered magnetic tip. Enhanced sensitivity for both ac and dc current and voltage detection is achieved with voltage by an ac coupling or a heterodyne technique. The techniques can be used to extract information from analog circuits.

  15. Design of a High Linearity Four-Quadrant Analog Multiplier in Wideband Frequency Range

    Directory of Open Access Journals (Sweden)

    Abdul kareem Mokif Obais

    2017-05-01

    Full Text Available In this paper, a voltage mode four quadrant analog multiplier in the wideband frequency rangeis designed using a wideband operational amplifier (OPAMP and squaring circuits. The wideband OPAMP is designed using 10 identical NMOS transistorsand operated with supply voltages of ±12V. Two NMOS transistors and two wideband OPAMP are utilized in the design of the proposed squaring circuit. All the NMOS transistors are based on 0.35µm NMOStechnology. The multiplier has input and output voltage ranges of ±10 V, high range of linearity from -10 V to +10 V, and cutoff frequency of about 5 GHz. The proposed multiplier is designed on PSpice in Orcad 16.6

  16. Design and analysis of a dual mode CMOS field programmable analog array

    International Nuclear Information System (INIS)

    Cheng Xiaoyan; Yang Haigang; Yin Tao; Wu Qisong; Zhang Hongfeng; Liu Fei

    2014-01-01

    This paper presents a novel field-programmable analog array (FPAA) architecture featuring a dual mode including discrete-time (DT) and continuous-time (CT) operation modes, along with a highly routable connection boxes (CBs) based interconnection lattice. The dual mode circuit for the FPAA is capable of achieving targeted optimal performance in different applications. The architecture utilizes routing switches in a CB not only for the signal interconnection purpose but also for control of the electrical charge transfer required in switched-capacitor circuits. This way, the performance of the circuit in either mode shall not be hampered with adding of programmability. The proposed FPAA is designed and implemented in a 0.18 μm standard CMOS process with a 3.3 V supply voltage. The result from post-layout simulation shows that a maximum bandwidth of 265 MHz through the interconnection network is achieved. The measured results from demonstrated examples show that the maximum signal bandwidth of up to 2 MHz in CT mode is obtained with the spurious free dynamic range of 54 dB, while the signal processing precision in DT mode reaches 96.4%. (semiconductor integrated circuits)

  17. Thermal measurement a requirement for monolithic microwave integrated circuit design

    OpenAIRE

    Hopper, Richard; Oxley, C. H.

    2008-01-01

    The thermal management of structures such as Monolithic Microwave Integrated Circuits (MMICs) is important, given increased circuit packing densities and RF output powers. The paper will describe the IR measurement technology necessary to obtain accurate temperature profiles on the surface of semiconductor devices. The measurement procedure will be explained, including the device mounting arrangement and emissivity correction technique. The paper will show how the measurement technique has be...

  18. A Novel Realization of Low-Power and Low-Distortion Multiplier Circuit with Improved Dynamic Range

    Directory of Open Access Journals (Sweden)

    Ali Naderi Saatlo

    2017-01-01

    Full Text Available A novel topology of four-quadrant analog multiplier circuit is presented in this paper. The voltage mode technique is employed to design the circuit in CMOS technology. The dynamic input and output ranges of the circuit are improved owing to the fact that the circuit works in the saturation region not in weak inversion. Also the proposed multiplier is suitable for low voltage operation and its power consumption is relatively low. In order to verify the performance of the proposed circuit, performance of the circuit affected by second order effects including transistor mismatch and mobility reduction is analyzed in detail. It will be shown that any conceivable mismatch in the transistor parameters leads to second harmonic distortion. Additionally, the effect of mobility reduction in the third harmonic distortion will be computed. In order to simulate the circuit, Cadence and HSPICE software are used with TSMC level 49 (BSIM3v3 parameters for 0.18 μm CMOS technology, where under supply voltage of 1.5 V, total power consumption is 44 µW, the corresponding average nonlinearity remains as low as 1 %, and the input range of the circuit is ± 400 mV.

  19. Teleseism-based Relative Time Corrections for Modern Analyses of Digitized Analog Seismograms

    Science.gov (United States)

    Lee, T. A.; Ishii, M.

    2017-12-01

    With modern-day instruments and seismic networks timed by GPS systems, synchronization of data streams is all but a forgone conclusion. However, during the analog era, when each station had its own clock, comparing data timing from different stations was a far more daunting prospect. Today, with recently developed methods by which analog data can be digitized, having the ability to accurately reconcile the timings of two separate stations would open decades worth of data to modern analyses. For example, one possible and exciting application would be using noise interferometry with digitized analog data in order to investigate changing structural features (on a volcano for example) over a much longer timescale than was previously possible. With this in mind, we introduce a new approach to sync time between stations based on teleseismic arrivals. P-wave arrivals are identified at stations for pairs of earthquakes from the digital and analog eras that have nearly identical distances, locations, and depths. Assuming accurate timing of the modern data, relative time corrections between a pair of stations can then be inferred for the analog data. This method for time correction depends upon the analog stations having modern equivalents, and both having sufficiently long durations of operation to allow for recording of usable teleseismic events. The Hawaii Volcano Observatory (HVO) network is an especially ideal environment for this, as it not only has a large and well-preserved collection of analog seismograms, but also has a long operating history (1912 - present) with many of the older stations having modern equivalents. As such, the scope of this project is to calculate and apply relative time corrections to analog data from two HVO stations, HILB (1919-present) and UWE (1928-present)(HILB now part of Pacific Tsunami network). Further application of this method could be for investigation of the effects of relative clock-drift, that is, the determining factor for how

  20. A multi-channel integrated circuit for the readout of a microstrip gas chamber

    Energy Technology Data Exchange (ETDEWEB)

    Krummenacher, F.; Enz, C. (Smart Silicon Systems S.A., Lausanne (Switzerland)); Bellazzini, R. (Dipt. di Fisica, Pisa (Italy) INFN, Pisa (Italy))

    1992-03-15

    The design and test of an 8 channel integrated circuit for the readout of the microstrip gas chamber and other multielectrode detectors are described. The circuit is composed of 8 identical channels, each providing the amplification and the shaping of the signal delivered by the detector. The peaking time of the shaper is 25 ns and the overall amplifier gain is 8 mV/1000 e{sup -}. In addition to the analog output, each channel provides a TTL compatible digital output. The equivalent input noise is less than 700 e{sup -} rms and the total dc power consumption is about 5 mW/channel. To avoid a baseline shift due to the tail of the current issued from the detector, an adjustable pole-zero cancellation circuit has been included. (orig.).

  1. Ultra-broadband Nonlinear Microwave Monolithic Integrated Circuits in SiGe, GaAs and InP

    DEFF Research Database (Denmark)

    Krozer, Viktor; Johansen, Tom Keinicke; Djurhuus, Torsten

    2006-01-01

    .5 GHz and ≫ 10 GHz for SiGe BiCMOS and GaAs MMIC, respectively. Analysis of the frequency behaviour of frequency converting devices is presented for improved mixer design. Millimeter-wave front-end components for advanced microwave imaging and communications purposes have also been demonstrated......Analog MMIC circuits with ultra-wideband operation are discussed in view of their frequency limitation and different circuit topologies. Results for designed and fabricated frequency converters in SiGe, GaAs, and InP technologies are presented in the paper. RF type circuit topologies exhibit a flat...... conversion gain with a 3 dB bandwidth of 10 GHz for SiGe and in excess of 20 GHz for GaAs processes. The concurrent LO-IF isolation is better than -25 dB, without including the improvement due to the combiner circuit. The converter circuits exhibit similar instantaneous bandwidth at IF and RF ports of ≫ 7...

  2. Intrinsic Hardware Evolution for the Design and Reconfiguration of Analog Speed Controllers for a DC Motor

    Science.gov (United States)

    Gwaltney, David A.; Ferguson, Michael I.

    2003-01-01

    Evolvable hardware provides the capability to evolve analog circuits to produce amplifier and filter functions. Conventional analog controller designs employ these same functions. Analog controllers for the control of the shaft speed of a DC motor are evolved on an evolvable hardware platform utilizing a second generation Field Programmable Transistor Array (FPTA2). The performance of an evolved controller is compared to that of a conventional proportional-integral (PI) controller. It is shown that hardware evolution is able to create a compact design that provides good performance, while using considerably less functional electronic components than the conventional design. Additionally, the use of hardware evolution to provide fault tolerance by reconfiguring the design is explored. Experimental results are presented showing that significant recovery of capability can be made in the face of damaging induced faults.

  3. Robustizing Circuit Optimization using Huber Functions

    DEFF Research Database (Denmark)

    Bandler, John W.; Biernacki, Radek M.; Chen, Steve H.

    1993-01-01

    The authors introduce a novel approach to 'robustizing' microwave circuit optimization using Huber functions, both two-sided and one-sided. They compare Huber optimization with l/sub 1/, l/sub 2/, and minimax methods in the presence of faults, large and small measurement errors, bad starting poin......, a preliminary optimization by selecting a small number of dominant variables. It is demonstrated, through multiplexer optimization, that the one-sided Huber function can be more effective and efficient than minimax in overcoming a bad starting point.......The authors introduce a novel approach to 'robustizing' microwave circuit optimization using Huber functions, both two-sided and one-sided. They compare Huber optimization with l/sub 1/, l/sub 2/, and minimax methods in the presence of faults, large and small measurement errors, bad starting points......, and statistical uncertainties. They demonstrate FET statistical modeling, multiplexer optimization, analog fault location, and data fitting. They extend the Huber concept by introducing a 'one-sided' Huber function for large-scale optimization. For large-scale problems, the designer often attempts, by intuition...

  4. Ultra low-power biomedical signal processing: An analog wavelet filter approach for pacemakers

    OpenAIRE

    Pavlík Haddad, S.A.

    2006-01-01

    The purpose of this thesis is to describe novel signal processing methodologies and analog integrated circuit techniques for low-power biomedical systems. Physiological signals, such as the electrocardiogram (ECG), the electroencephalogram (EEG) and the electromyogram (EMG) are mostly non-stationary. The main difficulty in dealing with biomedical signal processing is that the information of interest is often a combination of features that are well localized temporally (e.g., spikes) and other...

  5. Design of a CMOS readout circuit on ultra-thin flexible silicon chip for printed strain gauges

    Directory of Open Access Journals (Sweden)

    M. Elsobky

    2017-09-01

    Full Text Available Flexible electronics represents an emerging technology with features enabling several new applications such as wearable electronics and bendable displays. Precise and high-performance sensors readout chips are crucial for high quality flexible electronic products. In this work, the design of a CMOS readout circuit for an array of printed strain gauges is presented. The ultra-thin readout chip and the printed sensors are combined on a thin Benzocyclobutene/Polyimide (BCB/PI substrate to form a Hybrid System-in-Foil (HySiF, which is used as an electronic skin for robotic applications. Each strain gauge utilizes a Wheatstone bridge circuit, where four Aerosol Jet® printed meander-shaped resistors form a full-bridge topology. The readout chip amplifies the output voltage difference (about 5 mV full-scale swing of the strain gauge. One challenge during the sensor interface circuit design is to compensate for the relatively large dc offset (about 30 mV at 1 mA in the bridge output voltage so that the amplified signal span matches the input range of an analog-to-digital converter (ADC. The circuit design uses the 0. 5 µm mixed-signal GATEFORESTTM technology. In order to achieve the mechanical flexibility, the chip fabrication is based on either back thinned wafers or the ChipFilmTM technology, which enables the manufacturing of silicon chips with a thickness of about 20 µm. The implemented readout chip uses a supply of 5 V and includes a 5-bit digital-to-analog converter (DAC, a differential difference amplifier (DDA, and a 10-bit successive approximation register (SAR ADC. The circuit is simulated across process, supply and temperature corners and the simulation results indicate excellent performance in terms of circuit stability and linearity.

  6. 10-bit rapid single flux quantum digital-to-analog converter for ac voltage standard

    International Nuclear Information System (INIS)

    Maezawa, M; Hirayama, F

    2008-01-01

    Digital-to-analog (D/A) converters based on rapid single flux quantum (RSFQ) technology are under development for ac voltage standard applications. We present design and test results on a prototype 10-bit version integrated on a single chip. The 10-bit chip includes over 6000 Josephson junctions and consumes a bias current exceeding 1 A. To reduce the effects of the high bias current on circuit operation, a custom design method was employed in part and large circuit blocks were divided into smaller ones. The 10-bit chips were fabricated and tested at low speed. The test results suggested that our design approach could manage large bias currents on the order of 1 A per chip

  7. Mixed signal custom integrated circuit development for physics instrumentation

    International Nuclear Information System (INIS)

    Britton, C.L. Jr.; Bryan, W.L.; Emery, M.S.

    1998-01-01

    The Monolithic Systems Development Group at the Oak Ridge National Laboratory has been greatly involved in custom mixed-mode integrated circuit development for the PHENIX detector at the Relativistic Heavy Ion collider (RHIC) at Brookhaven National Laboratory and position-sensitive germanium spectrometer front-ends for the Naval Research Laboratory (NRL). This paper will outline the work done for both PHENIX and the Naval Research Laboratory in the area of full-custom, mixed-signal CMOS integrated electronics. This paper presents the architectures chosen for the various PHENIX detectors which include position-sensitive silicon, capacitive pixel, and phototube detectors, and performance results for the subsystems as well as a system description of the NRL germanium strip system and its performance. The performance of the custom preamplifiers, discriminators, analog memories, analog-digital converters, and control circuitry for all systems will be presented

  8. Mixed signal custom integrated circuit development for physics instrumentation

    Energy Technology Data Exchange (ETDEWEB)

    Britton, C.L. Jr.; Bryan, W.L.; Emery, M.S. [and others

    1998-10-01

    The Monolithic Systems Development Group at the Oak Ridge National Laboratory has been greatly involved in custom mixed-mode integrated circuit development for the PHENIX detector at the Relativistic Heavy Ion collider (RHIC) at Brookhaven National Laboratory and position-sensitive germanium spectrometer front-ends for the Naval Research Laboratory (NRL). This paper will outline the work done for both PHENIX and the Naval Research Laboratory in the area of full-custom, mixed-signal CMOS integrated electronics. This paper presents the architectures chosen for the various PHENIX detectors which include position-sensitive silicon, capacitive pixel, and phototube detectors, and performance results for the subsystems as well as a system description of the NRL germanium strip system and its performance. The performance of the custom preamplifiers, discriminators, analog memories, analog-digital converters, and control circuitry for all systems will be presented.

  9. Fast collimated neutron flux measurement using stilbene scintillator and flashy analog-to-digital converter in JT-60U

    International Nuclear Information System (INIS)

    Ishikawa, M.; Itoga, T.; Okuji, T.; Nakhostin, M.; Shinohara, K.; Hayashi, T.; Sukegawa, A.; Baba, M.; Nishitani, T.

    2006-01-01

    A line-integrated neutron emission profile is routinely measured using the radial neutron collimator system in JT-60U tokamak. Stilbene neuron detectors (SNDs), which combine a stilbene organic crystal scintillation detector (SD) with an analog neutron-gamma pulse shape discrimination (PSD) circuit, have been used to measure collimated neutron flux. Although the SND has many advantages as a neutron detector, the maximum count rate is limited up to ∼1x10 5 counts/s due to the analog PSD circuit. To overcome this issue, a digital signal processing system (DSPS) using a flash analog-to-digital converter (Acqiris DC252, 8 GHz, 10 bits) has been developed at Cyclotron and Radioisotope Center in Tohoku University. In this system anode signals from photomultiplier of the SD are directory stored and digitized. Then, the PSD between neutrons and gamma rays is performed using software. The DSPS has been installed in the vertical neutron collimator system in JT-60U and applied to deuterium experiments. It is confirmed that the PSD is sufficiently performed and collimated neutron flux is successfully measured with count rate up to ∼5x10 5 counts/s without the effect of pileup of detected pulses. The performance of the DSPS as a neutron detector, which supersedes the SND, is demonstrated

  10. Analogical scaffolding: Making meaning in physics through representation and analogy

    Science.gov (United States)

    Podolefsky, Noah Solomon

    This work reviews the literature on analogy, introduces a new model of analogy, and presents a series of experiments that test and confirm the utility of this model to describe and predict student learning in physics with analogy. Pilot studies demonstrate that representations (e.g., diagrams) can play a key role in students' use of analogy. A new model of analogy, Analogical Scaffolding, is developed to explain these initial empirical results. This model will be described in detail, and then applied to describe and predict the outcomes of further experiments. Two large-scale (N>100) studies will demonstrate that: (1) students taught with analogies, according to the Analogical Scaffolding model, outperform students taught without analogies on pre-post assessments focused on electromagnetic waves; (2) the representational forms used to teach with analogy can play a significant role in student learning, with students in one treatment group outperforming students in other treatment groups by factors of two or three. It will be demonstrated that Analogical Scaffolding can be used to predict these results, as well as finer-grained results such as the types of distracters students choose in different treatment groups, and to describe and analyze student reasoning in interviews. Abstraction in physics is reconsidered using Analogical Scaffolding. An operational definition of abstraction is developed within the Analogical Scaffolding framework and employed to explain (a) why physicists consider some ideas more abstract than others in physics, and (b) how students conceptions of these ideas can be modeled. This new approach to abstraction suggests novel approaches to curriculum design in physics using Analogical Scaffolding.

  11. Atomic physics and quantum optics using superconducting circuits.

    Science.gov (United States)

    You, J Q; Nori, Franco

    2011-06-29

    Superconducting circuits based on Josephson junctions exhibit macroscopic quantum coherence and can behave like artificial atoms. Recent technological advances have made it possible to implement atomic-physics and quantum-optics experiments on a chip using these artificial atoms. This Review presents a brief overview of the progress achieved so far in this rapidly advancing field. We not only discuss phenomena analogous to those in atomic physics and quantum optics with natural atoms, but also highlight those not occurring in natural atoms. In addition, we summarize several prospective directions in this emerging interdisciplinary field.

  12. Analog quantum simulation of the Rabi model in the ultra-strong coupling regime.

    Science.gov (United States)

    Braumüller, Jochen; Marthaler, Michael; Schneider, Andre; Stehli, Alexander; Rotzinger, Hannes; Weides, Martin; Ustinov, Alexey V

    2017-10-03

    The quantum Rabi model describes the fundamental mechanism of light-matter interaction. It consists of a two-level atom or qubit coupled to a quantized harmonic mode via a transversal interaction. In the weak coupling regime, it reduces to the well-known Jaynes-Cummings model by applying a rotating wave approximation. The rotating wave approximation breaks down in the ultra-strong coupling regime, where the effective coupling strength g is comparable to the energy ω of the bosonic mode, and remarkable features in the system dynamics are revealed. Here we demonstrate an analog quantum simulation of an effective quantum Rabi model in the ultra-strong coupling regime, achieving a relative coupling ratio of g/ω ~ 0.6. The quantum hardware of the simulator is a superconducting circuit embedded in a cQED setup. We observe fast and periodic quantum state collapses and revivals of the initial qubit state, being the most distinct signature of the synthesized model.An analog quantum simulation scheme has been explored with a quantum hardware based on a superconducting circuit. Here the authors investigate the time evolution of the quantum Rabi model at ultra-strong coupling conditions, which is synthesized by slowing down the system dynamics in an effective frame.

  13. Monolithic circuits for barium fluoride detectors used in nuclear physics experiments. CRADA final report

    International Nuclear Information System (INIS)

    Varner, R.L.; Blankenship, J.L.; Beene, J.R.; Todd, R.A.

    1998-02-01

    Custom monolithic electronic circuits have been developed recently for large detector applications in high energy physics where subsystems require tens of thousands of channels of signal processing and data acquisition. In the design and construction of these enormous detectors, it has been found that monolithic circuits offer significant advantages over discrete implementations through increased performance, flexible packaging, lower power and reduced cost per channel. Much of the integrated circuit design for the high energy physics community is directly applicable to intermediate energy heavy-ion and electron physics. This STTR project conducted in collaboration with researchers at the Holifield Radioactive Ion Beam Facility (HRIBF) at Oak Ridge National Laboratory, sought to develop a new integrated circuit chip set for barium fluoride (BaF 2 ) detector arrays based upon existing CMOS monolithic circuit designs created for the high energy physics experiments. The work under the STTR Phase 1 demonstrated through the design, simulation, and testing of several prototype chips the feasibility of using custom CMOS integrated circuits for processing signals from BaF 2 detectors. Function blocks including charge-sensitive amplifiers, comparators, one shots, time-to-amplitude converters, analog memory circuits and buffer amplifiers were implemented during Phase 1 effort. Experimental results from bench testing and laboratory testing with sources were documented

  14. Effects of proprioceptive circuit exercise on knee joint pain and muscle function in patients with knee osteoarthritis.

    Science.gov (United States)

    Ju, Sung-Bum; Park, Gi Duck; Kim, Sang-Soo

    2015-08-01

    [Purpose] This study applied proprioceptive circuit exercise to patients with degenerative knee osteoarthritis and examined its effects on knee joint muscle function and the level of pain. [Subjects] In this study, 14 patients with knee osteoarthritis in two groups, a proprioceptive circuit exercise group (n = 7) and control group (n = 7), were examined. [Methods] IsoMed 2000 (D&R Ferstl GmbH, Hemau, Germany) was used to assess knee joint muscle function, and a Visual Analog Scale was used to measure pain level. [Results] In the proprioceptive circuit exercise group, knee joint muscle function and pain levels improved significantly, whereas in the control group, no significant improvement was observed. [Conclusion] A proprioceptive circuit exercise may be an effective way to strengthen knee joint muscle function and reduce pain in patients with knee osteoarthritis.

  15. In-service inspection of electronics components, circuits and nuclear radiation detectors

    International Nuclear Information System (INIS)

    Darbhe, M.D.

    2002-01-01

    A nuclear reactor is a complex process plant. Like a nuclear power plant, the research reactors also employ various nuclear and process systems, the scope and number of such systems being plant-specific. In-service inspection of these systems is an important requirement and is applied at various levels of their constituent units such as detectors, electronics components, circuits and integrated systems. The sensors used cover a wide range such as neutronic, radiation, process (pressure, temperature, flow, level) and many others. The present discussion is limited to neutronic and radiation detectors. The electronic components used normally consist of passive components like resistors, capacitors, semiconductor components like diodes, transistors, analog integrated circuits and digital integrated circuits and electromagnetic relays, to name a few. In order to have a comprehensive surveillance and ISI plan, over the entire plant life, it is necessary to understand various mechanisms, which degrade the performance of these systems. These are discussed initially and later various ISI methods that are used on component-circuit or system level, to ensure optimum system performance, are discussed. The computerised systems, because of hardware and software considerations, have to be given special attention, and the same are discussed briefly

  16. An updated program-controlled analog processor, model AP-006, for semiconductor detector spectrometers

    International Nuclear Information System (INIS)

    Shkola, N.F.; Shevchenko, Yu.A.

    1989-01-01

    An analog processor, model AP-006, is reported. The processor is a development of a series of spectrometric units based on a shaper of the type 'DL dif +TVS+gated ideal integrator'. Structural and circuits design features are described. The results of testing the processor in a setup with a Si(Li) detecting unit over an input count-rate range of up to 5x10 5 cps are presented. Processor applications are illustrated. (orig.)

  17. E-learning platform for automated testing of electronic circuits using signature analysis method

    Science.gov (United States)

    Gherghina, Cǎtǎlina; Bacivarov, Angelica; Bacivarov, Ioan C.; Petricǎ, Gabriel

    2016-12-01

    Dependability of electronic circuits can be ensured only through testing of circuit modules. This is done by generating test vectors and their application to the circuit. Testability should be viewed as a concerted effort to ensure maximum efficiency throughout the product life cycle, from conception and design stage, through production to repairs during products operating. In this paper, is presented the platform developed by authors for training for testability in electronics, in general and in using signature analysis method, in particular. The platform allows highlighting the two approaches in the field namely analog and digital signature of circuits. As a part of this e-learning platform, it has been developed a database for signatures of different electronic components meant to put into the spotlight different techniques implying fault detection, and from this there were also self-repairing techniques of the systems with this kind of components. An approach for realizing self-testing circuits based on MATLAB environment and using signature analysis method is proposed. This paper analyses the benefits of signature analysis method and simulates signature analyzer performance based on the use of pseudo-random sequences, too.

  18. Detecting analogies unconsciously

    Directory of Open Access Journals (Sweden)

    Thomas Peter Reber

    2014-01-01

    Full Text Available Analogies may arise from the conscious detection of similarities between a present and a past situation. In this functional magnetic resonance imaging study, we tested whether young volunteers would detect analogies unconsciously between a current supraliminal (visible and a past subliminal (invisible situation. The subliminal encoding of the past situation precludes awareness of analogy detection in the current situation. First, participants encoded subliminal pairs of unrelated words in either one or nine encoding trials. Later, they judged the semantic fit of supraliminally presented new words that either retained a previously encoded semantic relation (‘analog’ or not (‘broken analog’. Words in analogs versus broken analogs were judged closer semantically, which reflects unconscious analogy detection. Hippocampal activity associated with subliminal encoding correlated with the behavioral measure of unconscious analogy detection. Analogs versus broken analogs were processed with reduced prefrontal but enhanced medial temporal activity. We conclude that analogous episodes can be detected even unconsciously drawing on the episodic memory network.

  19. Computational aspects of feedback in neural circuits.

    Directory of Open Access Journals (Sweden)

    Wolfgang Maass

    2007-01-01

    Full Text Available It has previously been shown that generic cortical microcircuit models can perform complex real-time computations on continuous input streams, provided that these computations can be carried out with a rapidly fading memory. We investigate the computational capability of such circuits in the more realistic case where not only readout neurons, but in addition a few neurons within the circuit, have been trained for specific tasks. This is essentially equivalent to the case where the output of trained readout neurons is fed back into the circuit. We show that this new model overcomes the limitation of a rapidly fading memory. In fact, we prove that in the idealized case without noise it can carry out any conceivable digital or analog computation on time-varying inputs. But even with noise, the resulting computational model can perform a large class of biologically relevant real-time computations that require a nonfading memory. We demonstrate these computational implications of feedback both theoretically, and through computer simulations of detailed cortical microcircuit models that are subject to noise and have complex inherent dynamics. We show that the application of simple learning procedures (such as linear regression or perceptron learning to a few neurons enables such circuits to represent time over behaviorally relevant long time spans, to integrate evidence from incoming spike trains over longer periods of time, and to process new information contained in such spike trains in diverse ways according to the current internal state of the circuit. In particular we show that such generic cortical microcircuits with feedback provide a new model for working memory that is consistent with a large set of biological constraints. Although this article examines primarily the computational role of feedback in circuits of neurons, the mathematical principles on which its analysis is based apply to a variety of dynamical systems. Hence they may also

  20. An analog VLSI real time optical character recognition system based on a neural architecture

    International Nuclear Information System (INIS)

    Bo, G.; Caviglia, D.; Valle, M.

    1999-01-01

    In this paper a real time Optical Character Recognition system is presented: it is based on a feature extraction module and a neural network classifier which have been designed and fabricated in analog VLSI technology. Experimental results validate the circuit functionality. The results obtained from a validation based on a mixed approach (i.e., an approach based on both experimental and simulation results) confirm the soundness and reliability of the system

  1. An analog VLSI real time optical character recognition system based on a neural architecture

    Energy Technology Data Exchange (ETDEWEB)

    Bo, G.; Caviglia, D.; Valle, M. [Genoa Univ. (Italy). Dip. of Biophysical and Electronic Engineering

    1999-03-01

    In this paper a real time Optical Character Recognition system is presented: it is based on a feature extraction module and a neural network classifier which have been designed and fabricated in analog VLSI technology. Experimental results validate the circuit functionality. The results obtained from a validation based on a mixed approach (i.e., an approach based on both experimental and simulation results) confirm the soundness and reliability of the system.

  2. AMIC: an expandable integrated analog front-end for light distribution moments analysis

    Energy Technology Data Exchange (ETDEWEB)

    Spaggiari, M; Herrero, V; Lerche, C W; Aliaga, R; Monzo, J M; Gadea, R, E-mail: michele.spaggiari@gmail.com [Instituto de Instrumentacion para Imagen Molecular (I3M), Universidad Politecnica de Valencia, Camino de Vera, 46022, Valencia (Spain)

    2011-01-15

    In this article we introduce AMIC (Analog Moments Integrated Circuit), a novel analog Application Specific Integrated Circuit (ASIC) front-end for Positron Emission Tomography (PET) applications. Its working principle is based on mathematical analysis of light distribution through moments calculation. Each moment provides useful information about light distribution, such as energy, position, depth of interaction, skewness (deformation due to border effect) etc. A current buffer delivers a copy of each input current to several processing blocks. The current preamplifier is designed in order to achieve unconditional stability under high input capacitance, thus allowing the use of both Photo-Multiplier Tubes (PMT) and Silicon Photo-Multipliers (SiPM). Each processing block implements an analog current filtering by multiplying each input current by a programmable 8-bit coefficient. The latter is implemented through a high linear MOS current divider ladder, whose high sensitivity to variations in output voltages requires the integration of an extremely stable fully differential current collector. Output currents are then summed and sent to the output stage, that provides both a buffered output current and a linear rail-to-rail voltage for further digitalization. Since computation is purely additive, the 64 input channels of AMIC do not represent a limitation in the number of the detector's outputs. Current outputs of various AMIC structures can be combined as inputs of a final AMIC, thus providing a fully expandable structure. In this version of AMIC, 8 programmable blocks for moments calculation are integrated, as well as an I2C interface in order to program every coefficient. Extracted layout simulation results demonstrate that the information provided by moment calculation in AMIC helps to improve tridimensional positioning of the detected event. A two-detector test-bench is now being used for AMIC prototype characterization and preliminary results are presented.

  3. Do new anesthesia ventilators deliver small tidal volumes accurately during volume-controlled ventilation?

    Science.gov (United States)

    Bachiller, Patricia R; McDonough, Joseph M; Feldman, Jeffrey M

    2008-05-01

    During mechanical ventilation of infants and neonates, small changes in tidal volume may lead to hypo- or hyperventilation, barotrauma, or volutrauma. Partly because breathing circuit compliance and fresh gas flow affect tidal volume delivery by traditional anesthesia ventilators in volume-controlled ventilation (VCV) mode, pressure-controlled ventilation (PCV) using a circle breathing system has become a common approach to minimizing the risk of mechanical ventilation for small patients, although delivered tidal volume is not assured during PCV. A new generation of anesthesia machine ventilators addresses the problems of VCV by adjusting for fresh gas flow and for the compliance of the breathing circuit. In this study, we evaluated the accuracy of new anesthesia ventilators to deliver small tidal volumes. Four anesthesia ventilator systems were evaluated to determine the accuracy of volume delivery to the airway during VCV at tidal volume settings of 100, 200, and 500 mL under different conditions of breathing circuit compliance (fully extended and fully contracted circuits) and lung compliance. A mechanical test lung (adult and infant) was used to simulate lung compliances ranging from 0.0025 to 0.03 L/cm H(2)O. Volumes and pressures were measured using a calibrated screen pneumotachograph and custom software. We tested the Smartvent 7900, Avance, and Aisys anesthesia ventilator systems (GE Healthcare, Madison, WI) and the Apollo anesthesia ventilator (Draeger Medical, Telford, PA). The Smartvent 7900 and Avance ventilators use inspiratory flow sensors to control the volume delivered, whereas the Aisys and Apollo ventilators compensate for the compliance of the circuit. We found that the anesthesia ventilators that use compliance compensation (Aisys and Apollo) accurately delivered both large and small tidal volumes to the airway of the test lung under conditions of normal and low lung compliance during VCV (ranging from 95.5% to 106.2% of the set tidal volume

  4. The application of standardized control and interface circuits to three dc to dc power converters.

    Science.gov (United States)

    Yu, Y.; Biess, J. J.; Schoenfeld, A. D.; Lalli, V. R.

    1973-01-01

    Standardized control and interface circuits were applied to the three most commonly used dc to dc converters: the buck-boost converter, the series-switching buck regulator, and the pulse-modulated parallel inverter. The two-loop ASDTIC regulation control concept was implemented by using a common analog control signal processor and a novel digital control signal processor. This resulted in control circuit standardization and superior static and dynamic performance of the three dc-to-dc converters. Power components stress control, through active peak current limiting and recovery of switching losses, was applied to enhance reliability and converter efficiency.

  5. Short- circuit tests of circuit breakers

    OpenAIRE

    Chorovský, P.

    2015-01-01

    This paper deals with short-circuit tests of low voltage electrical devices. In the first part of this paper, there are described basic types of short- circuit tests and their principles. Direct and indirect (synthetic) tests with more details are described in the second part. Each test and principles are explained separately. Oscilogram is obtained from short-circuit tests of circuit breakers at laboratory. The aim of this research work is to propose a test circuit for performing indirect test.

  6. A 6 device SOI new technology for mixed analog-digital and rad-hard applications

    International Nuclear Information System (INIS)

    Blanc, J.P.; Bonaime, J.; Delevoye, E.; Pontcharra, J. de; Gautier, J.; Truche, R.

    1993-01-01

    DMILL technology is being developed for very rad-hard analog-digital applications, such as space and military circuits or as electronics for the future generation of high energy collider (LHC, CERN, Geneva). Both CMOS and junction (JFET and bipolar) transistors are needed. A new process has been integrated, based on a 1.2μm thick silicon film on insulator (SIMOX plus epitaxy), a complete dielectric isolation and low temperature process. The mean feature is that six different components are fabricated on the same wafer, taking into account the 12 volts supply voltage constraint for some analog applications. The first electrical characteristics are presented in this paper. The optimization capabilities of such a hardened CBi-CJ-CMOS technology are discussed

  7. VHDL Implementation of Sigma-Delta Analog To Digital Converter

    Science.gov (United States)

    Chavan, R. N.; Chougule, D. G.

    2010-11-01

    Sigma-Delta modulation techniques provide a range of opportunities in a signal processing system for both increasing performance and data path optimization along the silicon area axis in the design space. One of the most challenging tasks in Analog to Digital Converter (ADC) design is to adapt the circuitry to ever new CMOS process technology. For digital circuits the number of gates per square mm app. doubles per chip generation. Integration of analog parts in newer deep submicron technologies is much more tough and additionally complicated because the usable voltage ranges are decreasing with every new integration step. This paper shows an approach which only uses 2 resistors and 1 capacitor which are located outside a pure digital chip. So all integration advantages of pure digital chips are preserved, there is no design effort for a new chip generation and the ADC also can be used for FPGAs. Resolutions of up to 16 bit are achievable. Sample rates in the 1 MHz region are feasible so that the approach is also useful for ADCs for xDSL technologies.

  8. Active component modeling for analog integrated circuit design. Model parametrization and implementation in the SPICE-PAC circuit simulator; Modelisation de composants actifs pour la CAO de circuits integres analogiques. Parametrage et implantation de modeles dans le simulateur SPICE-PAC

    Energy Technology Data Exchange (ETDEWEB)

    Marchal, Xavier

    1992-06-19

    In order to use CAD efficiently in the analysis and design of electronic Integrated circuits, adequate modeling of active non-linear devices such as MOSFET transistors must be available to the designer. Many mathematical forms can be given to those models, such as explicit relations, or implicit equations to be solved. A major requirement in developing MOS transistor models for IC simulation is the availability of electrical characteristic curves over a wide range of channel width and length, including the sub-micrometer range. To account in a convenient way for bulk charge influence on I{sub DS} = f(V{sub DS}, V{sub GS}, v{sub BS}) device characteristics, all 3 standard SPICE MOS models use an empirical fitting parameter called the 'charge sharing factor'. Unfortunately, this formulation produces models which only describe correctly either some of the short channel phenomena, or some particular operating conditions (low injection, avalanche effect, etc.). We present here a cellular model (CDM = Charge Distributed Model) implemented in the open modular SPICE-PAC Simulator; this model is derived from the 4-terminal WANG charge controlled MOSFET model, using the charge sheet approximation. The CDM model describes device characteristics in ail operating regions without introducing drain current discontinuities and without requiring a 'charge sharing factor'. A usual problem to be faced by designers when they simulate MOS ICs is to find a reliable source of model parameters. Though most models have a physical basis, some of their parameters cannot be easily estimated from physical considerations. It can also happen that physically determined parameters values do not produce a good fit to measured device characteristics. Thus it is generally necessary to extract model parameters from measured transistor data, to ensure that model equations approximate measured curves accurately enough. Model parameters extraction can be done in 2 different ways, exposed in this thesis

  9. Neutron-induced soft errors in CMOS circuits

    International Nuclear Information System (INIS)

    Hazucha, P.

    1999-01-01

    The subject of this thesis is a systematic study of soft errors occurring in CMOS integrated circuits when being exposed to radiation. The vast majority of commercial circuits operate in the natural environment ranging from the sea level to aircraft flight altitudes (less than 20 km), where the errors are caused mainly by interaction of atmospheric neutrons with silicon. Initially, the soft error rate (SER) of a static memory was measured for supply voltages from 2V to 5V when irradiated by 14 MeV and 100 MeV neutrons. Increased error rate due to the decreased supply voltage has been identified as a potential hazard for operation of future low-voltage circuits. A novel methodology was proposed for accurate SER characterization of a manufacturing process and it was validated by measurements on a 0.6 μm process and 100 MeV neutrons. The methodology can be applied to the prediction of SER in the natural environment

  10. Intermittency-induced criticality in a resistor-inductor-diode circuit.

    Science.gov (United States)

    Potirakis, Stelios M; Contoyiannis, Yiannis; Diakonos, Fotios K; Hanias, Michael P

    2017-04-01

    The current fluctuations of a driven resistor-inductor-diode circuit are investigated here looking for signatures of critical behavior monitored by the driving frequency. The experimentally obtained time series of the voltage drop across the resistor (as directly proportional to the current flowing through the circuit) were analyzed by means of the method of critical fluctuations in analogy to thermal critical systems. Intermittent criticality was revealed for a critical frequency band signifying the transition between the normal rectifier phase in the low frequencies and a full-wave conducting, capacitorlike phase in the high frequencies. The transition possesses critical characteristics with a characteristic exponent p_{l}=1.65. A fractal analysis in terms of the rescale range (R/RSS) and detrended fluctuation analysis methods yielded results fully compatible with the critical dynamics analysis. Suggestions for the interpretation of the observed behavior in terms of p-n junction operation are discussed.

  11. A Cytomorphic Chip for Quantitative Modeling of Fundamental Bio-Molecular Circuits.

    Science.gov (United States)

    2015-08-01

    We describe a 0.35 μm BiCMOS silicon chip that quantitatively models fundamental molecular circuits via efficient log-domain cytomorphic transistor equivalents. These circuits include those for biochemical binding with automatic representation of non-modular and loading behavior, e.g., in cascade and fan-out topologies; for representing variable Hill-coefficient operation and cooperative binding; for representing inducer, transcription-factor, and DNA binding; for probabilistic gene transcription with analogic representations of log-linear and saturating operation; for gain, degradation, and dynamics of mRNA and protein variables in transcription and translation; and, for faithfully representing biological noise via tunable stochastic transistor circuits. The use of on-chip DACs and ADCs enables multiple chips to interact via incoming and outgoing molecular digital data packets and thus create scalable biochemical reaction networks. The use of off-chip digital processors and on-chip digital memory enables programmable connectivity and parameter storage. We show that published static and dynamic MATLAB models of synthetic biological circuits including repressilators, feed-forward loops, and feedback oscillators are in excellent quantitative agreement with those from transistor circuits on the chip. Computationally intensive stochastic Gillespie simulations of molecular production are also rapidly reproduced by the chip and can be reliably tuned over the range of signal-to-noise ratios observed in biological cells.

  12. A Novel Evolutionary Algorithm for Designing Robust Analog Filters

    Directory of Open Access Journals (Sweden)

    Shaobo Li

    2018-03-01

    Full Text Available Designing robust circuits that withstand environmental perturbation and device degradation is critical for many applications. Traditional robust circuit design is mainly done by tuning parameters to improve system robustness. However, the topological structure of a system may set a limit on the robustness achievable through parameter tuning. This paper proposes a new evolutionary algorithm for robust design that exploits the open-ended topological search capability of genetic programming (GP coupled with bond graph modeling. We applied our GP-based robust design (GPRD algorithm to evolve robust lowpass and highpass analog filters. Compared with a traditional robust design approach based on a state-of-the-art real-parameter genetic algorithm (GA, our GPRD algorithm with a fitness criterion rewarding robustness, with respect to parameter perturbations, can evolve more robust filters than what was achieved through parameter tuning alone. We also find that inappropriate GA tuning may mislead the search process and that multiple-simulation and perturbed fitness evaluation methods for evolving robustness have complementary behaviors with no absolute advantage of one over the other.

  13. Trap Healing for High-Performance Low-Voltage Polymer Transistors and Solution-Based Analog Amplifiers on Foil.

    Science.gov (United States)

    Pecunia, Vincenzo; Nikolka, Mark; Sou, Antony; Nasrallah, Iyad; Amin, Atefeh Y; McCulloch, Iain; Sirringhaus, Henning

    2017-06-01

    Solution-processed semiconductors such as conjugated polymers have great potential in large-area electronics. While extremely appealing due to their low-temperature and high-throughput deposition methods, their integration in high-performance circuits has been difficult. An important remaining challenge is the achievement of low-voltage circuit operation. The present study focuses on state-of-the-art polymer thin-film transistors based on poly(indacenodithiophene-benzothiadiazole) and shows that the general paradigm for low-voltage operation via an enhanced gate-to-channel capacitive coupling is unable to deliver high-performance device behavior. The order-of-magnitude longitudinal-field reduction demanded by low-voltage operation plays a fundamental role, enabling bulk trapping and leading to compromised contact properties. A trap-reduction technique based on small molecule additives, however, is capable of overcoming this effect, allowing low-voltage high-mobility operation. This approach is readily applicable to low-voltage circuit integration, as this work exemplifies by demonstrating high-performance analog differential amplifiers operating at a battery-compatible power supply voltage of 5 V with power dissipation of 11 µW, and attaining a voltage gain above 60 dB at a power supply voltage below 8 V. These findings constitute an important milestone in realizing low-voltage polymer transistors for solution-based analog electronics that meets performance and power-dissipation requirements for a range of battery-powered smart-sensing applications. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  14. Design and test of a capacitance detection circuit based on a transimpedance amplifier

    International Nuclear Information System (INIS)

    Mu Linfeng; Zhang Wendong; He Changde; Zhang Rui; Song Jinlong; Xue Chenyang

    2015-01-01

    This paper presents a transimpedance amplifier (TIA) capacitance detection circuit aimed at detecting micro-capacitance, which is caused by ultrasonic stimulation applied to the capacitive micro-machined ultrasonic transducer (CMUT). In the capacitance interface, a TIA is adopted to amplify the received signal with a center frequency of 400 kHz, and finally detect ultrasound pressure. The circuit has a strong anti-stray property and this paper also studies the calculation of compensation capacity in detail. To ensure high resolution, noise analysis is conducted. After optimization, the detected minimum ultrasound pressure is 2.1 Pa, which is two orders of magnitude higher than the former. The test results showed that the circuit was sensitive to changes in ultrasound pressure and the distance between the CMUT and stumbling block, which also successfully demonstrates the functionality of the developed TIA of the analog-front-end receiver. (paper)

  15. Design, Simulation and Characteristics Research of the Interface Circuit based on nano-polysilicon thin films pressure sensor

    Science.gov (United States)

    Zhao, Xiaosong; Zhao, Xiaofeng; Yin, Liang

    2018-03-01

    This paper presents a interface circuit for nano-polysilicon thin films pressure sensor. The interface circuit includes consist of instrument amplifier and Analog-to-Digital converter (ADC). The instrumentation amplifier with a high common mode rejection ratio (CMRR) is implemented by three stages current feedback structure. At the same time, in order to satisfy the high precision requirements of pressure sensor measure system, the 1/f noise corner of 26.5 mHz can be achieved through chopping technology at a noise density of 38.2 nV/sqrt(Hz).Ripple introduced by chopping technology adopt continuous ripple reduce circuit (RRL), which achieves the output ripple level is lower than noise. The ADC achieves 16 bits significant digit by adopting sigma-delta modulator with fourth-order single-bit structure and digital decimation filter, and finally achieves high precision integrated pressure sensor interface circuit.

  16. Characteristic modes and the transition to chaos of a resonant Josephson circuit

    Energy Technology Data Exchange (ETDEWEB)

    Marcus, P M; Imry, Y [IBM Watson Research Center, Yorktown Heights, NY (USA)

    1982-01-01

    The periodic modes of a voltage-driven resonant small-junction Josephson circuit are studied by accurate numerical methods starting from large dissipation. As dissipation decreases, sections of the average current vs. voltage characteristic become unstable and new branches develop on those sections, corresponding to new modes which are exact subharmonics of the old mode. For low enough dissipation chaotic ranges of voltage occur, i.e., ranges with no stable periodic modes. This circuit is a component of many experimental circuits, e.g., finite junctions, DC and RF squids, etc., and so the behavior found here should occur widely.

  17. Automatic activation of categorical and abstract analogical relations in analogical reasoning.

    Science.gov (United States)

    Green, Adam E; Fugelsang, Jonathan A; Dunbar, Kevin N

    2006-10-01

    We examined activation of concepts during analogical reasoning. Subjects made either analogical judgments or categorical judgments about four-word sets. After each four-word set, they named the ink color of a single word in a modified Stroop task. Words that referred to category relations were primed (as indicated by longer response times on Stroop color naming) subsequent to analogical judgments and categorical judgments. This finding suggests that activation of category concepts plays a fundamental role in analogical thinking. When colored words referred to analogical relations, priming occurred subsequent to analogical judgments, but not to categorical judgments, even though identical four-word stimuli were used for both types of judgments. This finding lends empirical support to the hypothesis that, when people comprehend the analogy between two items, they activate an abstract analogical relation that is distinct from the specific content items that compose the analogy.

  18. Stopping single photons in one-dimensional circuit quantum electrodynamics systems

    International Nuclear Information System (INIS)

    Shen, J.-T.; Povinelli, M. L.; Sandhu, Sunil; Fan Shanhui

    2007-01-01

    We propose a mechanism to stop and time reverse single photons in one-dimensional circuit quantum electrodynamics systems. As a concrete example, we exploit the large tunability of the superconducting charge quantum bit (charge qubit) to predict one-photon transport properties in multiple-qubit systems with dynamically controlled transition frequencies. In particular, two qubits coupled to a waveguide give rise to a single-photon transmission line shape that is analogous to electromagnetically induced transparency in atomic systems. Furthermore, by cascading double-qubit structures to form an array and dynamically controlling the qubit transition frequencies, a single photon can be stopped, stored, and time reversed. With a properly designed array, two photons can be stopped and stored in the system at the same time. Moreover, the unit cell of the array can be designed to be of deep subwavelength scale, miniaturizing the circuit

  19. Efficient quantum circuit implementation of quantum walks

    International Nuclear Information System (INIS)

    Douglas, B. L.; Wang, J. B.

    2009-01-01

    Quantum walks, being the quantum analog of classical random walks, are expected to provide a fruitful source of quantum algorithms. A few such algorithms have already been developed, including the 'glued trees' algorithm, which provides an exponential speedup over classical methods, relative to a particular quantum oracle. Here, we discuss the possibility of a quantum walk algorithm yielding such an exponential speedup over possible classical algorithms, without the use of an oracle. We provide examples of some highly symmetric graphs on which efficient quantum circuits implementing quantum walks can be constructed and discuss potential applications to quantum search for marked vertices along these graphs.

  20. A VLSI Implementation of Rank-Order Searching Circuit Employing a Time-Domain Technique

    Directory of Open Access Journals (Sweden)

    Trong-Tu Bui

    2013-01-01

    Full Text Available We present a compact and low-power rank-order searching (ROS circuit that can be used for building associative memories and rank-order filters (ROFs by employing time-domain computation and floating-gate MOS techniques. The architecture inherits the accuracy and programmability of digital implementations as well as the compactness and low-power consumption of analog ones. We aim to implement identification function as the first priority objective. Filtering function would be implemented once the location identification function has been carried out. The prototype circuit was designed and fabricated in a 0.18 μm CMOS technology. It consumes only 132.3 μW for an eight-input demonstration case.

  1. An fMRI investigation of cognitive stages in reasoning by analogy.

    Science.gov (United States)

    Krawczyk, Daniel C; McClelland, M Michelle; Donovan, Colin M; Tillman, Gail D; Maguire, Mandy J

    2010-06-25

    We compared reasoning about four-term analogy problems in the format (A:B::C: D) to semantic and perceptual control conditions that required matching without analogical mapping. We investigated distinct phases of the problem solving process divided into encoding, mapping/inference, and response. Using fMRI, we assessed the brain activation relevant to each of these phases with an emphasis on achieving a better understanding of analogical reasoning relative to these other matching conditions. We predicted that the analogical condition would involve the most cognitive effort in the encoding and mapping/inference phases, while the control conditions were expected to engage greater prefrontal cortex (PFC) activation at the response period. Results showed greater activation for the analogical condition relative to the control conditions at the encoding phase in several predominantly left lateralized and medial areas of the PFC. Similar results were observed for the mapping/inference phase, though this difference was limited to the left PFC and rostral PFC. The response phase resulted in the fastest and most accurate responses in the analogy condition relative to the control conditions. This was accompanied by greater processing within the left lateral and the medial PFC for the control conditions relative to the analogy condition, consistent with most of the cognitive processing of the analogy condition having occurred in the prior task phases. Overall we demonstrate that the left ventral and dorsal lateral, medial, and rostral PFC are important in both the encoding of relational information, mapping and inference processes, and verification of semantic and perceptual responses in four term analogical reasoning. Copyright 2010 Elsevier B.V. All rights reserved.

  2. Parameter space of experimental chaotic circuits with high-precision control parameters

    Energy Technology Data Exchange (ETDEWEB)

    Sousa, Francisco F. G. de; Rubinger, Rero M. [Instituto de Física e Química, Universidade Federal de Itajubá, Itajubá, MG (Brazil); Sartorelli, José C., E-mail: sartorelli@if.usp.br [Universidade de São Paulo, São Paulo, SP (Brazil); Albuquerque, Holokx A. [Departamento de Física, Universidade do Estado de Santa Catarina, Joinville, SC (Brazil); Baptista, Murilo S. [Institute of Complex Systems and Mathematical Biology, SUPA, University of Aberdeen, Aberdeen (United Kingdom)

    2016-08-15

    We report high-resolution measurements that experimentally confirm a spiral cascade structure and a scaling relationship of shrimps in the Chua's circuit. Circuits constructed using this component allow for a comprehensive characterization of the circuit behaviors through high resolution parameter spaces. To illustrate the power of our technological development for the creation and the study of chaotic circuits, we constructed a Chua circuit and study its high resolution parameter space. The reliability and stability of the designed component allowed us to obtain data for long periods of time (∼21 weeks), a data set from which an accurate estimation of Lyapunov exponents for the circuit characterization was possible. Moreover, this data, rigorously characterized by the Lyapunov exponents, allows us to reassure experimentally that the shrimps, stable islands embedded in a domain of chaos in the parameter spaces, can be observed in the laboratory. Finally, we confirm that their sizes decay exponentially with the period of the attractor, a result expected to be found in maps of the quadratic family.

  3. Analog computing

    CERN Document Server

    Ulmann, Bernd

    2013-01-01

    This book is a comprehensive introduction to analog computing. As most textbooks about this powerful computing paradigm date back to the 1960s and 1970s, it fills a void and forges a bridge from the early days of analog computing to future applications. The idea of analog computing is not new. In fact, this computing paradigm is nearly forgotten, although it offers a path to both high-speed and low-power computing, which are in even more demand now than they were back in the heyday of electronic analog computers.

  4. Biosignal integrated circuit with simultaneous acquisition of ECG and PPG for wearable healthcare applications.

    Science.gov (United States)

    Kim, Hyungseup; Park, Yunjong; Ko, Youngwoon; Mun, Yeongjin; Lee, Sangmin; Ko, Hyoungho

    2018-01-01

    Wearable healthcare systems require measurements from electrocardiograms (ECGs) and photoplethysmograms (PPGs), and the blood pressure of the user. The pulse transit time (PTT) can be calculated by measuring the ECG and PPG simultaneously. Continuous-time blood pressure without using an air cuff can be estimated by using the PTT. This paper presents a biosignal acquisition integrated circuit (IC) that can simultaneously measure the ECG and PPG for wearable healthcare applications. Included in this biosignal acquisition circuit are a voltage mode instrumentation amplifier (IA) for ECG acquisition and a current mode transimpedance amplifier for PPG acquisition. The analog outputs from the ECG and PPG channels are muxed and converted to digital signals using 12-bit successive approximation register (SAR) analog-to-digital converter (ADC). The proposed IC is fabricated by using a standard 0.18 μm CMOS process with an active area of 14.44 mm2. The total current consumption for the multichannel IC is 327 μA with a 3.3 V supply. The measured input referred noise of ECG readout channel is 1.3 μVRMS with a bandwidth of 0.5 Hz to 100 Hz. And the measured input referred current noise of the PPG readout channel is 0.122 nA/√Hz with a bandwidth of 0.5 Hz to 100 Hz. The proposed IC, which is implemented using various circuit techniques, can measure ECG and PPG signals simultaneously to calculate the PTT for wearable healthcare applications.

  5. Theory and Circuit Model for Lossy Coaxial Transmission Line

    Energy Technology Data Exchange (ETDEWEB)

    Genoni, T. C.; Anderson, C. N.; Clark, R. E.; Gansz-Torres, J.; Rose, D. V.; Welch, Dale Robert

    2017-04-01

    The theory of signal propagation in lossy coaxial transmission lines is revisited and new approximate analytic formulas for the line impedance and attenuation are derived. The accuracy of these formulas from DC to 100 GHz is demonstrated by comparison to numerical solutions of the exact field equations. Based on this analysis, a new circuit model is described which accurately reproduces the line response over the entire frequency range. Circuit model calculations are in excellent agreement with the numerical and analytic results, and with finite-difference-time-domain simulations which resolve the skindepths of the conducting walls.

  6. Commutation circuit for an HVDC circuit breaker

    Science.gov (United States)

    Premerlani, William J.

    1981-01-01

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components.

  7. A new approach to determine accurately minority-carrier lifetime

    International Nuclear Information System (INIS)

    Idali Oumhand, M.; Mir, Y.; Zazoui, M.

    2009-01-01

    Electron or proton irradiations introduce recombination centers, which tend to affect solar cell parameters by reducing the minority-carrier lifetime (MCLT). Because this MCLT plays a fundamental role in the performance degradation of solar cells, in this work we present a new approach that allows us to get accurate values of MCLT. The relationship between MCLT in p-region and n-region both before and after irradiation has been determined by the new method. The validity and accuracy of this approach are justified by the fact that the degradation parameters that fit the experimental data are the same for both short-circuit current and the open-circuit voltages. This method is applied to the p + /n-InGaP solar cell under 1 MeV electron irradiation

  8. Analysis of Electromagnetic Attractive Force : Examination by Magnetic Circuit, Finite Element Method and Experiment

    OpenAIRE

    薮野, 浩司; 大和田, 竜太郎; 青島, 伸治; Hiroshi, YABUNO; Ryotaro, OOWADA; Nobuharu, AOSHIMA; 筑波大学; 筑波大学院; 筑波大学

    1998-01-01

    This paper presents the limitation of the magnetic circuit method. The force between magnetic bodies can be approximated accurately by the magnetic circuit method. Therefore this method has been used widely for the estimation of magnetic force. However this method is limited by the magnetic leakage and can be not used in the case when the gap between the magnetic bodies is wide. It is very important to clarify the limitation of the magnetic circuit method. In this research, the force of an el...

  9. Assessment of Durable SiC JFET Technology for +600 C to -125 C Integrated Circuit Operation

    Science.gov (United States)

    Neudeck, P. G.; Krasowski, M. J.; Prokop, N. F.

    2011-01-01

    Electrical characteristics and circuit design considerations for prototype 6H-SiC JFET integrated circuits (ICs) operating over the broad temperature range of -125 C to +600 C are described. Strategic implementation of circuits with transistors and resistors in the same 6H-SiC n-channel layer enabled ICs with nearly temperature-independent functionality to be achieved. The frequency performance of the circuits declined at temperatures increasingly below or above room temperature, roughly corresponding to the change in 6H-SiC n-channel resistance arising from incomplete carrier ionization at low temperature and decreased electron mobility at high temperature. In addition to very broad temperature functionality, these simple digital and analog demonstration integrated circuits successfully operated with little change in functional characteristics over the course of thousands of hours at 500 C before experiencing interconnect-related failures. With appropriate further development, these initial results establish a new technology foundation for realizing durable 500 C ICs for combustion engine sensing and control, deep-well drilling, and other harsh-environment applications.

  10. Bio-inspired feedback-circuit implementation of discrete, free energy optimizing, winner-take-all computations.

    Science.gov (United States)

    Genewein, Tim; Braun, Daniel A

    2016-06-01

    Bayesian inference and bounded rational decision-making require the accumulation of evidence or utility, respectively, to transform a prior belief or strategy into a posterior probability distribution over hypotheses or actions. Crucially, this process cannot be simply realized by independent integrators, since the different hypotheses and actions also compete with each other. In continuous time, this competitive integration process can be described by a special case of the replicator equation. Here we investigate simple analog electric circuits that implement the underlying differential equation under the constraint that we only permit a limited set of building blocks that we regard as biologically interpretable, such as capacitors, resistors, voltage-dependent conductances and voltage- or current-controlled current and voltage sources. The appeal of these circuits is that they intrinsically perform normalization without requiring an explicit divisive normalization. However, even in idealized simulations, we find that these circuits are very sensitive to internal noise as they accumulate error over time. We discuss in how far neural circuits could implement these operations that might provide a generic competitive principle underlying both perception and action.

  11. SOI Fully complementary BI-JFET-MOS technology for analog-digital applications with vertical BJT's

    International Nuclear Information System (INIS)

    Delevoye, E.; Blanc, J.P.; Bonaime, J.; Pontcharra, J. de; Gautier, J.; Martin, F.; Truche, R.

    1993-01-01

    A silicon-on-insulator, fully complementary, Bi-JFET-MOS technology has been developed for realizing multi-megarad hardened mixed analog-digital circuits. The six different active components plus resistors and capacitors have been successfully integrated in a 25-mask process using SIMOX substrate and 1 μm thick epitaxial layer. Different constraints such as device compatibility, complexity not higher than BiCMOS technology and breakdown voltages suitable for analog applications have been considered. Several process splits have been realized and all the characteristics presented here have been measured on the same split. P + gate is used for PMOS transistor to get N and PMOST symmetrical characteristics. Both NPN and PNP vertical bipolar transistors with poly-emitters show f T > 5 GHz. 2-separated gate JFET's need no additional mask. (authors). 9 figs., 1 tab

  12. Estimation of the Diesel Particulate Filter Soot Load Based on an Equivalent Circuit Model

    Directory of Open Access Journals (Sweden)

    Yanting Du

    2018-02-01

    Full Text Available In order to estimate the diesel particulate filter (DPF soot load and improve the accuracy of regeneration timing, a novel method based on an equivalent circuit model is proposed based on the electric-fluid analogy. This proposed method can reduce the impact of the engine transient operation on the soot load, accurately calculate the flow resistance, and improve the estimation accuracy of the soot load. Firstly, the least square method is used to identify the flow resistance based on the World Harmonized Transient Cycle (WHTC test data, and the relationship between flow resistance, exhaust temperature and soot load is established. Secondly, the online estimation of the soot load is achieved by using the dual extended Kalman filter (DEKF. The results show that this method has good convergence and robustness with the maximal absolute error of 0.2 g/L at regeneration timing, which can meet engineering requirements. Additionally, this method can estimate the soot load under engine transient operating conditions and avoids a large number of experimental tests, extensive calibration and the analysis of complex chemical reactions required in traditional methods.

  13. Oscillator circuits

    CERN Document Server

    Graf, Rudolf F

    1996-01-01

    This series of circuits provides designers with a quick source for oscillator circuits. Why waste time paging through huge encyclopedias when you can choose the topic you need and select any of the specialized circuits sorted by application?This book in the series has 250-300 practical, ready-to-use circuit designs, with schematics and brief explanations of circuit operation. The original source for each circuit is listed in an appendix, making it easy to obtain additional information.Ready-to-use circuits.Grouped by application for easy look-up.Circuit source listing

  14. Measuring circuits

    CERN Document Server

    Graf, Rudolf F

    1996-01-01

    This series of circuits provides designers with a quick source for measuring circuits. Why waste time paging through huge encyclopedias when you can choose the topic you need and select any of the specialized circuits sorted by application?This book in the series has 250-300 practical, ready-to-use circuit designs, with schematics and brief explanations of circuit operation. The original source for each circuit is listed in an appendix, making it easy to obtain additional information.Ready-to-use circuits.Grouped by application for easy look-up.Circuit source listings

  15. SEM analysis of ionizing radiation effects in an analog to digital converter /AD571/

    Science.gov (United States)

    Gauthier, M. K.; Perret, J.; Evans, K. C.

    1981-01-01

    The considered investigation is concerned with the study of the total-dose degradation mechanisms in an IIL analog to digital (A/D) converter. The A/D converter is a 10 digit device having nine separate functional units on the chip which encompass several hundred transistors and circuit elements. It was the objective of the described research to find the radiation sensitive elements by a systematic search of the devices on the LSI chip. The employed technique using a scanning electron microscope to determine the functional blocks of an integrated circuit which are sensitive to ionizing radiation and then progressively zeroing in on the soft components within those blocks, proved extremely successful on the AD571. Four functional blocks were found to be sensitive to radiation, including the Voltage Reference, DAC, IIL Clock, and IIL SAR.

  16. Science Teachers' Analogical Reasoning

    Science.gov (United States)

    Mozzer, Nilmara Braga; Justi, Rosária

    2013-08-01

    Analogies can play a relevant role in students' learning. However, for the effective use of analogies, teachers should not only have a well-prepared repertoire of validated analogies, which could serve as bridges between the students' prior knowledge and the scientific knowledge they desire them to understand, but also know how to introduce analogies in their lessons. Both aspects have been discussed in the literature in the last few decades. However, almost nothing is known about how teachers draw their own analogies for instructional purposes or, in other words, about how they reason analogically when planning and conducting teaching. This is the focus of this paper. Six secondary teachers were individually interviewed; the aim was to characterize how they perform each of the analogical reasoning subprocesses, as well as to identify their views on analogies and their use in science teaching. The results were analyzed by considering elements of both theories about analogical reasoning: the structural mapping proposed by Gentner and the analogical mechanism described by Vosniadou. A comprehensive discussion of our results makes it evident that teachers' content knowledge on scientific topics and on analogies as well as their pedagogical content knowledge on the use of analogies influence all their analogical reasoning subprocesses. Our results also point to the need for improving teachers' knowledge about analogies and their ability to perform analogical reasoning.

  17. Synchronous long-term oscillations in a synthetic gene circuit.

    Science.gov (United States)

    Potvin-Trottier, Laurent; Lord, Nathan D; Vinnicombe, Glenn; Paulsson, Johan

    2016-10-27

    Synthetically engineered genetic circuits can perform a wide variety of tasks but are generally less accurate than natural systems. Here we revisit the first synthetic genetic oscillator, the repressilator, and modify it using principles from stochastic chemistry in single cells. Specifically, we sought to reduce error propagation and information losses, not by adding control loops, but by simply removing existing features. We show that this modification created highly regular and robust oscillations. Furthermore, some streamlined circuits kept 14 generation periods over a range of growth conditions and kept phase for hundreds of generations in single cells, allowing cells in flasks and colonies to oscillate synchronously without any coupling between them. Our results suggest that even the simplest synthetic genetic networks can achieve a precision that rivals natural systems, and emphasize the importance of noise analyses for circuit design in synthetic biology.

  18. Two multichannel integrated circuits for neural recording and signal processing.

    Science.gov (United States)

    Obeid, Iyad; Morizio, James C; Moxon, Karen A; Nicolelis, Miguel A L; Wolf, Patrick D

    2003-02-01

    We have developed, manufactured, and tested two analog CMOS integrated circuit "neurochips" for recording from arrays of densely packed neural electrodes. Device A is a 16-channel buffer consisting of parallel noninverting amplifiers with a gain of 2 V/V. Device B is a 16-channel two-stage analog signal processor with differential amplification and high-pass filtering. It features selectable gains of 250 and 500 V/V as well as reference channel selection. The resulting amplifiers on Device A had a mean gain of 1.99 V/V with an equivalent input noise of 10 microV(rms). Those on Device B had mean gains of 53.4 and 47.4 dB with a high-pass filter pole at 211 Hz and an equivalent input noise of 4.4 microV(rms). Both devices were tested in vivo with electrode arrays implanted in the somatosensory cortex.

  19. 76 FR 19174 - In the Matter of Circuit Systems, Inc., Global Energy Group, Inc., Integrated Medical Resources...

    Science.gov (United States)

    2011-04-06

    ... SECURITIES AND EXCHANGE COMMISSION File No. 500-1 In the Matter of Circuit Systems, Inc., Global Energy Group, Inc., Integrated Medical Resources, Inc., iNTELEFILM Corp., and Lot$off Corp.; Order of... lack of current and accurate information concerning the securities of Circuit Systems, Inc. because it...

  20. Demodulation Radio Frequency Interference Effects in Operational Amplifier Circuits

    Science.gov (United States)

    Sutu, Yue-Hong

    A series of investigations have been carried out to determine RFI effects in analog circuits using monolithic integrated operational amplifiers (op amps) as active devices. The specific RFI effect investigated is how amplitude-modulated (AM) RF signals are demodulated in op amp circuits to produce undesired low frequency responses at AM-modulation frequency. The undesired demodulation responses were shown to be characterized by a second-order nonlinear transfer function. Four representative op amp types investigated were the 741 bipolar op amp, the LM10 bipolar op amp, the LF355 JFET-Bipolar op amp, and the CA081 MOS-Bipolar op amp. Two op amp circuits were investigated. The first circuit was a noninverting unity voltage gain buffer circuit. The second circuit was an inverting op amp configuration. In the second circuit, the investigation includes the effects of an RFI suppression capacitor in the feedback path. Approximately 30 units of each op amp type were tested to determine the statistical variations of RFI demodulation effects in the two op amp circuits. The Nonlinear Circuit Analysis Program, NCAP, was used to simulate the demodulation RFI response. In the simulation, the op amp was replaced with its incremental macromodel. Values of macromodel parameters were obtained from previous investigations and manufacturer's data sheets. Some key results of this work are: (1) The RFI demodulation effects are 10 to 20 dB lower in CA081 and LF355 FET-bipolar op amp than in 741 and LM10 bipolar op amp except above 40 MHz where the LM10 RFI response begins to approach that of CA081. (2) The experimental mean values for 30 741 op amps show that RFI demodulation responses in the inverting amplifier with a 27 pF feedback capacitor were suppressed from 10 to 35 dB over the RF frequency range 0.1 to 150 MHz except at 0.15 MHz where only 3.5 dB suppression was observed. (3) The NCAP program can predict RFI demodulation responses in 741 and LF355 unity gain buffer circuits

  1. Review of Polynomial Chaos-Based Methods for Uncertainty Quantification in Modern Integrated Circuits

    Directory of Open Access Journals (Sweden)

    Arun Kaintura

    2018-02-01

    Full Text Available Advances in manufacturing process technology are key ensembles for the production of integrated circuits in the sub-micrometer region. It is of paramount importance to assess the effects of tolerances in the manufacturing process on the performance of modern integrated circuits. The polynomial chaos expansion has emerged as a suitable alternative to standard Monte Carlo-based methods that are accurate, but computationally cumbersome. This paper provides an overview of the most recent developments and challenges in the application of polynomial chaos-based techniques for uncertainty quantification in integrated circuits, with particular focus on high-dimensional problems.

  2. Fully Integrated Solar Energy Harvester and Sensor Interface Circuits for Energy-Efficient Wireless Sensing Applications

    Directory of Open Access Journals (Sweden)

    Maher Kayal

    2013-02-01

    Full Text Available This paper presents an energy-efficient solar energy harvesting and sensing microsystem that harvests solar energy from a micro-power photovoltaic module for autonomous operation of a gas sensor. A fully integrated solar energy harvester stores the harvested energy in a rechargeable NiMH microbattery. Hydrogen concentration and temperature are measured and converted to a digital value with 12-bit resolution using a fully integrated sensor interface circuit, and a wireless transceiver is used to transmit the measurement results to a base station. As the harvested solar energy varies considerably in different lighting conditions, in order to guarantee autonomous operation of the sensor, the proposed area- and energy-efficient circuit scales the power consumption and performance of the sensor. The power management circuit dynamically decreases the operating frequency of digital circuits and bias currents of analog circuits in the sensor interface circuit and increases the idle time of the transceiver under reduced light intensity. The proposed microsystem has been implemented in a 0.18 µm complementary metal-oxide-semiconductor (CMOS process and occupies a core area of only 0.25 mm2. This circuit features a low power consumption of 2.1 µW when operating at its highest performance. It operates with low power supply voltage in the 0.8V to 1.6 V range.

  3. Resonance circuits for adiabatic circuits

    Directory of Open Access Journals (Sweden)

    C. Schlachta

    2003-01-01

    Full Text Available One of the possible techniques to reduces the power consumption in digital CMOS circuits is to slow down the charge transport. This slowdown can be achieved by introducing an inductor in the charging path. Additionally, the inductor can act as an energy storage element, conserving the energy that is normally dissipated during discharging. Together with the parasitic capacitances from the circuit a LCresonant circuit is formed.

  4. MOSFET Switching Circuit Protects Shape Memory Alloy Actuators

    Science.gov (United States)

    Gummin, Mark A.

    2011-01-01

    A small-footprint, full surface-mount-component printed circuit board employs MOSFET (metal-oxide-semiconductor field-effect transistor) power switches to switch high currents from any input power supply from 3 to 30 V. High-force shape memory alloy (SMA) actuators generally require high current (up to 9 A at 28 V) to actuate. SMA wires (the driving element of the actuators) can be quickly overheated if power is not removed at the end of stroke, which can damage the wires. The new analog driver prevents overheating of the SMA wires in an actuator by momentarily removing power when the end limit switch is closed, thereby allowing complex control schemes to be adopted without concern for overheating. Either an integral pushbutton or microprocessor-controlled gate or control line inputs switch current to the actuator until the end switch line goes from logic high to logic low state. Power is then momentarily removed (switched off by the MOSFET). The analog driver is suited to use with nearly any SMA actuator.

  5. Report on application specific integrated circuits for relativistic heavy ion detectors

    International Nuclear Information System (INIS)

    Platner, E.D.

    1988-01-01

    Detector systems for RHIC experiments are invariably going to be large and complex. Thus it behooves the planners to incorporate elements that have little need for adjustment, calibration and correction to the produced data. For example, if power, size and cost considerations permit, time can be digitized directly (i.e. with counters, shift registers, etc.) where no adjustments, calibrations or corrections are required. The circuit either works correctly or not at all. This kind of circuit behavior is extremely valuable in detectors with 10 5 or more channel elements. In analog to digital conversion applications, direct conversion (i.e. flash ADC) may be prohibitive in cost, size and power. Here major effort must be given to minimize the magnitude of offset and conversion gain variance. Where possible self correction and adjustment should be applied at the subsystem level

  6. MIMIC For Millimeter Wave Integrated Circuit Radars

    Science.gov (United States)

    Seashore, C. R.

    1987-09-01

    A significant program is currently underway in the U.S. to investigate, develop and produce a variety of GaAs analog circuits for use in microwave and millimeter wave sensors and systems. This represents a "new wave" of RF technology which promises to significantly change system engineering thinking relative to RF Architectures. At millimeter wave frequencies, we look forward to a relatively high level of critical component integration based on MESFET and HEMT device implementations. These designs will spawn more compact RF front ends with colocated antenna/transceiver functions and innovative packaging concepts which will survive and function in a typical military operational environment which includes challenging temperature, shock and special handling requirements.

  7. 10 K gate I(2)L and 1 K component analog compatible bipolar VLSI technology - HIT-2

    Science.gov (United States)

    Washio, K.; Watanabe, T.; Okabe, T.; Horie, N.

    1985-02-01

    An advanced analog/digital bipolar VLSI technology that combines on the same chip 2-ns 10 K I(2)L gates with 1 K analog devices is proposed. The new technology, called high-density integration technology-2, is based on a new structure concept that consists of three major techniques: shallow grooved-isolation, I(2)L active layer etching, and I(2)L current gain increase. I(2)L circuits with 80-MHz maximum toggle frequency have developed compatibly with n-p-n transistors having a BV(CE0) of more than 10 V and an f(T) of 5 GHz, and lateral p-n-p transistors having an f(T) of 150 MHz.

  8. Continuum Modeling of Inductor Hysteresis and Eddy Current Loss Effects in Resonant Circuits

    Energy Technology Data Exchange (ETDEWEB)

    Pries, Jason L. [ORNL; Tang, Lixin [ORNL; Burress, Timothy A. [ORNL

    2017-10-01

    This paper presents experimental validation of a high-fidelity toroid inductor modeling technique. The aim of this research is to accurately model the instantaneous magnetization state and core losses in ferromagnetic materials. Quasi–static hysteresis effects are captured using a Preisach model. Eddy currents are included by coupling the associated quasi-static Everett function to a simple finite element model representing the inductor cross sectional area. The modeling technique is validated against the nonlinear frequency response from two different series RLC resonant circuits using inductors made of electrical steel and soft ferrite. The method is shown to accurately model shifts in resonant frequency and quality factor. The technique also successfully predicts a discontinuity in the frequency response of the ferrite inductor resonant circuit.

  9. Bilateral generic working memory circuit requires left-lateralized addition for verbal processing.

    Science.gov (United States)

    Ray, Manaan Kar; Mackay, Clare E; Harmer, Catherine J; Crow, Timothy J

    2008-06-01

    According to the Baddeley-Hitch model, phonological and visuospatial representations are separable components of working memory (WM) linked by a central executive. The traditional view that the separation reflects the relative contribution of the 2 hemispheres (verbal WM--left; spatial WM--right) has been challenged by the position that a common bilateral frontoparietal network subserves both domains. Here, we test the hypothesis that there is a generic WM circuit that recruits additional specialized regions for verbal and spatial processing. We designed a functional magnetic resonance imaging paradigm to elicit activation in the WM circuit for verbal and spatial information using identical stimuli and applied this in 33 healthy controls. We detected left-lateralized quantitative differences in the left frontal and temporal lobe for verbal > spatial WM but no areas of activation for spatial > verbal WM. We speculate that spatial WM is analogous to a "generic" bilateral frontoparietal WM circuit we inherited from our great ape ancestors that evolved, by recruitment of additional left-lateralized frontal and temporal regions, to accommodate language.

  10. Review of Polynomial Chaos-Based Methods for Uncertainty Quantification in Modern Integrated Circuits

    OpenAIRE

    Arun Kaintura; Tom Dhaene; Domenico Spina

    2018-01-01

    Advances in manufacturing process technology are key ensembles for the production of integrated circuits in the sub-micrometer region. It is of paramount importance to assess the effects of tolerances in the manufacturing process on the performance of modern integrated circuits. The polynomial chaos expansion has emerged as a suitable alternative to standard Monte Carlo-based methods that are accurate, but computationally cumbersome. This paper provides an overview of the most recent developm...

  11. Roles of epsilon-near-zero (ENZ) and mu-near-zero (MNZ) materials in optical metatronic circuit networks.

    Science.gov (United States)

    Abbasi, Fereshteh; Engheta, Nader

    2014-10-20

    The concept of metamaterial-inspired nanocircuits, dubbed metatronics, was introduced in [Science 317, 1698 (2007); Phys. Rev. Lett. 95, 095504 (2005)]. It was suggested how optical lumped elements (nanoelements) can be made using subwavelength plasmonic or non-plasmonic particles. As a result, the optical metatronic equivalents of a number of electronic circuits, such as frequency mixers and filters, were suggested. In this work we further expand the concept of electronic lumped element networks into optical metatronic circuits and suggest a conceptual model applicable to various metatronic passive networks. In particular, we differentiate between the series and parallel networks using epsilon-near-zero (ENZ) and mu-near-zero (MNZ) materials. We employ layered structures with subwavelength thicknesses for the nanoelements as the building blocks of collections of metatronic networks. Furthermore, we explore how by choosing the non-zero constitutive parameters of the materials with specific dispersions, either Drude or Lorentzian dispersion with suitable parameters, capacitive and inductive responses can be achieved in both series and parallel networks. Next, we proceed with the one-to-one analogy between electronic circuits and optical metatronic filter layered networks and justify our analogies by comparing the frequency response of the two paradigms. Finally, we examine the material dispersion of near-zero relative permittivity as well as other physically important material considerations such as losses.

  12. Multiple Soft Fault Diagnosis of Bjt Circuits

    Directory of Open Access Journals (Sweden)

    Tadeusiewicz Michał

    2014-12-01

    Full Text Available This paper deals with multiple soft fault diagnosis of nonlinear analog circuits comprising bipolar transistors characterized by the Ebers-Moll model. Resistances of the circuit and beta forward factor of a transistor are considered as potentially faulty parameters. The proposed diagnostic method exploits a strongly nonlinear set of algebraic type equations, which may possess multiple solutions, and is capable of finding different sets of the parameters values which meet the diagnostic test. The equations are written on the basis of node analysis and include DC voltages measured at accessible nodes, as well as some measured currents. The unknown variables are node voltages and the parameters which are considered as potentially faulty. The number of these parameters is larger than the number of the accessible nodes. To solve the set of equations the block relaxation method is used with different assignments of the variables to the blocks. Next, the solutions are corrected using the Newton-Raphson algorithm. As a result, one or more sets of the parameters values which satisfy the diagnostic test are obtained. The proposed approach is illustrated with a numerical example.

  13. Robust motion artefact resistant circuit for calculation of Mean Arterial Pressure from pulse transit time.

    Science.gov (United States)

    Bhattacharya, Tinish; Gupta, Ankesh; Singh, Salam ThoiThoi; Roy, Sitikantha; Prasad, Anamika

    2017-07-01

    Cuff-less and non-invasive methods of Blood Pressure (BP) monitoring have faced a lot of challenges like stability, noise, motion artefact and requirement for calibration. These factors are the major reasons why such devices do not get approval from the medical community easily. One such method is calculating Blood Pressure indirectly from pulse transit time (PTT) obtained from electrocardiogram (ECG) and Photoplethysmogram (PPG). In this paper we have proposed two novel analog signal conditioning circuits for ECG and PPG that increase stability, remove motion artefacts, remove the sinusoidal wavering of the ECG baseline due to respiration and provide consistent digital pulses corresponding to blood pulses/heart-beat. We have combined these two systems to obtain the PTT and then correlated it with the Mean Arterial Pressure (MAP). The aim was to perform major part of the processing in analog domain to decrease processing load over microcontroller so as to reduce cost and make it simple and robust. We have found from our experiments that the proposed circuits can calculate the Heart Rate (HR) with a maximum error of ~3.0% and MAP with a maximum error of ~2.4% at rest and ~4.6% in motion.

  14. Modeling of forced vibration phenomenon by making an electrical analogy with ANSYS finite element software

    Directory of Open Access Journals (Sweden)

    Myriam Rocío Pallares Muñoz

    2009-01-01

    Full Text Available Designing mechanical systems which are submitted to vibration requires calculation methods which are very different to those u-sed in other disciplines because, when this occurs, the magnitude of the forces becomes secondary and the frequency with which the force is repeated becomes the most important aspect. It must be taken care of, given that smaller periodic forces can prompt disasters than greater static forces. The article presents a representative problem regarding systems having forced vibration, the mathematical treatment of differential equations from an electrical and mechanical viewpoint, an electrical analogy, numerical modeling of circuits using ANSYS finite element software, analysis and comparison of numerical modeling results compared to test values, the post-processing of results and conclusions regarding electrical analogy methodology when analysing forced vibra-tion systems.

  15. Project Circuits in a Basic Electric Circuits Course

    Science.gov (United States)

    Becker, James P.; Plumb, Carolyn; Revia, Richard A.

    2014-01-01

    The use of project circuits (a photoplethysmograph circuit and a simple audio amplifier), introduced in a sophomore-level electric circuits course utilizing active learning and inquiry-based methods, is described. The development of the project circuits was initiated to promote enhanced engagement and deeper understanding of course content among…

  16. Nanofluidic Transistor Circuits

    Science.gov (United States)

    Chang, Hsueh-Chia; Cheng, Li-Jing; Yan, Yu; Slouka, Zdenek; Senapati, Satyajyoti

    2012-02-01

    Non-equilibrium ion/fluid transport physics across on-chip membranes/nanopores is used to construct rectifying, hysteretic, oscillatory, excitatory and inhibitory nanofluidic elements. Analogs to linear resistors, capacitors, inductors and constant-phase elements were reported earlier (Chang and Yossifon, BMF 2009). Nonlinear rectifier is designed by introducing intra-membrane conductivity gradient and by asymmetric external depletion with a reverse rectification (Yossifon and Chang, PRL, PRE, Europhys Lett 2009-2011). Gating phenomenon is introduced by functionalizing polyelectrolytes whose conformation is field/pH sensitive (Wang, Chang and Zhu, Macromolecules 2010). Surface ion depletion can drive Rubinstein's microvortex instability (Chang, Yossifon and Demekhin, Annual Rev of Fluid Mech, 2012) or Onsager-Wien's water dissociation phenomenon, leading to two distinct overlimiting I-V features. Bipolar membranes exhibit an S-hysteresis due to water dissociation (Cheng and Chang, BMF 2011). Coupling the hysteretic diode with some linear elements result in autonomous ion current oscillations, which undergo classical transitions to chaos. Our integrated nanofluidic circuits are used for molecular sensing, protein separation/concentration, electrospray etc.

  17. Low-voltage analog front-end processor design for ISFET-based sensor and H+ sensing applications

    Science.gov (United States)

    Chung, Wen-Yaw; Yang, Chung-Huang; Peng, Kang-Chu; Yeh, M. H.

    2003-04-01

    This paper presents a modular-based low-voltage analog-front-end processor design in a 0.5mm double-poly double-metal CMOS technology for Ion Sensitive Field Effect Transistor (ISFET)-based sensor and H+ sensing applications. To meet the potentiometric response of the ISFET that is proportional to various H+ concentrations, the constant-voltage and constant current (CVCS) testing configuration has been used. Low-voltage design skills such as bulk-driven input pair, folded-cascode amplifier, bootstrap switch control circuits have been designed and integrated for 1.5V supply and nearly rail-to-rail analog to digital signal processing. Core modules consist of an 8-bit two-step analog-digital converter and bulk-driven pre-amplifiers have been developed in this research. The experimental results show that the proposed circuitry has an acceptable linearity to 0.1 pH-H+ sensing conversions with the buffer solution in the range of pH2 to pH12. The processor has a potential usage in battery-operated and portable healthcare devices and environmental monitoring applications.

  18. An Equivalent Electrical Circuit Model of Proton Exchange Membrane Fuel Cells Based on Mathematical Modelling

    Directory of Open Access Journals (Sweden)

    Dinh An Nguyen

    2012-07-01

    Full Text Available Many of the Proton Exchange Membrane Fuel Cell (PEMFC models proposed in the literature consist of mathematical equations. However, they are not adequately practical for simulating power systems. The proposed model takes into account phenomena such as activation polarization, ohmic polarization, double layer capacitance and mass transport effects present in a PEM fuel cell. Using electrical analogies and a mathematical modeling of PEMFC, the circuit model is established. To evaluate the effectiveness of the circuit model, its static and dynamic performances under load step changes are simulated and compared to the numerical results obtained by solving the mathematical model. Finally, the applicability of our model is demonstrated by simulating a practical system.

  19. Non-Destructive Investigation on Short Circuit Capability of Wind-Turbine-Scale IGBT Power Modules

    DEFF Research Database (Denmark)

    Wu, Rui; Iannuzzo, Francesco; Wang, Huai

    2014-01-01

    This paper presents a comprehensive investigation on the short circuit capability of wind-turbine-scale IGBT power modules by means of a 6 kA/1.1 kV non-destructive testing system. A Field Programmable Gate Array (FPGA) supervising unit is adpoted to achieve an accurate time control for short...... circuit test, which enables to define the driving signals with an accuracy of 10 ns. Thanks to the capability and the effectiveness of the constructed setup, oscillations appearing during short circuits of the new-generation 1.7 kV/1 kA IGBT power modules have been evidenced and characterized under...

  20. Method for transmitting analog data over a fiber-optic link

    International Nuclear Information System (INIS)

    Dyer, G.R.

    1981-01-01

    The transmission of high-speed analog dat across an insulating break is a common requirement for present fusion experiments, and it will be a necessity for a reactor-like device. Presently available systems tend to be complex, slow, and expensive. A method is described for implementing a fiber-optic link with analog data input and output. Two realizations of the method are given. A medium-speed system using monolithic circuitry is capable of a dc to 20-KHz bandwidth with excellent linearity and a dynamic range of at least 60 dB. A higher-speed system uses some discrete circuitry to attain a 500-KHz bandwidth with at least a 40-dB dynamic range. Both systems use a relatively inexpensive digital optical link kit combined with a duty cycle modulation scheme for data tramsmission. This method achieves accurate reproduction of complex waveforms without introducing the quantization errors inherent in analog-to-digital conversion, offers bipolar response with low offset and drift, and maintains a constant bandwidth regardless of signal level

  1. A novel integrated circuit for semiconductor radiation detectors with sparse readout

    International Nuclear Information System (INIS)

    Zhang Yacong; Chen Zhognjian; Lu Wengao; Zhao Baoying; Ji Lijiu

    2008-01-01

    A novel fully integrated CMOS readout circuit for semiconductor radiation detector with sparse readout is presented. The new sparse scheme is: when one channel is being read out, the trigger signal from other channels is delayed and then processed. Therefore, the dead time is reduced and so is the error rate. Besides sparse readout, sequential readout is also allowed, which means the analog voltages and addresses of all the channels are read out sequentially once there is a channel triggered. The circuit comprises Charge Sensitive Amplifier (CSA), pulse shaper, peak detect and hold circuit, and digital logic. A test chip of four channels designed in a 0.5 μ DPTM CMOS technology has been taped out. The results of post simulation indicate that the gain is 79.3 mV/fC with a linearity of 99.92%. The power dissipation is 4 mW per channel. Theory analysis and calculation shows that the error probability is approximately 2.5%, which means a reduction of about 37% is obtained compared with the traditional scanning scheme, assuming a 16-channel system with a particle rate of 100 k/s per channel. (authors)

  2. Precise and accurate train run data: Approximation of actual arrival and departure times

    DEFF Research Database (Denmark)

    Richter, Troels; Landex, Alex; Andersen, Jonas Lohmann Elkjær

    with the approximated actual arrival and departure times. As a result, all future statistics can now either be based on track circuit data with high precision or approximated actual arrival times with a high accuracy. Consequently, performance analysis will be more accurate, punctuality statistics more correct, KPI...

  3. Rhetoric and analogies

    OpenAIRE

    Aragonès, Enriqueta; Gilboa, Itzhak; Postlewaite, Andrew; Schmeidler, David; Universitat Autònoma de Barcelona. Unitat de Fonaments de l'Anàlisi Econòmica; Universitat Autònoma de Barcelona. Institut d'Anàlisi Econòmica

    2013-01-01

    The art of rhetoric may be defined as changing other people's minds (opinions, beliefs) without providing them new information. One tech- nique heavily used by rhetoric employs analogies. Using analogies, one may draw the listener's attention to similarities between cases and to re-organize existing information in a way that highlights certain reg- ularities. In this paper we offer two models of analogies, discuss their theoretical equivalence, and show that finding good analogies is a com- p...

  4. Categories children find easy and difficult to process in figural analogies

    Directory of Open Access Journals (Sweden)

    Claire E Stevenson

    2014-08-01

    Full Text Available Analogical reasoning, the ability to learn about novel phenomena by relating it to structurally similar knowledge, develops with great variability in children. Furthermore, the development of analogical reasoning coincides with greater working memory efficiency and increasing knowledge of the objects and rules present in analogy problems. In figural matrices, a classical form of analogical reasoning assessment, some categories, such as color, appear easier for children to encode and infer than others, such as orientation. Yet, few studies have structurally examined differences in the difficulty of rule-types across different age-groups. This cross-sectional study of figural analogical reasoning examined which underlying rules in figural analogies were easier or more difficult for children to correctly process. School children (N=1422, M=7.0 years, SD=21 months, range 4.5-12.5 years were assessed in analogical reasoning using classical figural matrices and memory measures. The transformations the children had to induce and apply concerned the categories: animal, color, orientation, position, quantity and size. The role of age and memory span on the children’s ability to correctly process each type of transformation was examined using explanatory item response theory models. The results showed that with increasing age and/or greater memory span all transformations were processed more accurately. The what transformations animal, color, quantity and size were easiest, whereas the where transformations orientation and position were most difficult. However, animal, orientation and position became relatively easier with age and increased memory efficiency. The implications are discussed in terms of the development of visual processing in object recognition versus position and motion encoding, the ventral (what and dorsal (where pathways respectively.

  5. Organic printed photonics: From microring lasers to integrated circuits.

    Science.gov (United States)

    Zhang, Chuang; Zou, Chang-Ling; Zhao, Yan; Dong, Chun-Hua; Wei, Cong; Wang, Hanlin; Liu, Yunqi; Guo, Guang-Can; Yao, Jiannian; Zhao, Yong Sheng

    2015-09-01

    A photonic integrated circuit (PIC) is the optical analogy of an electronic loop in which photons are signal carriers with high transport speed and parallel processing capability. Besides the most frequently demonstrated silicon-based circuits, PICs require a variety of materials for light generation, processing, modulation, and detection. With their diversity and flexibility, organic molecular materials provide an alternative platform for photonics; however, the versatile fabrication of organic integrated circuits with the desired photonic performance remains a big challenge. The rapid development of flexible electronics has shown that a solution printing technique has considerable potential for the large-scale fabrication and integration of microsized/nanosized devices. We propose the idea of soft photonics and demonstrate the function-directed fabrication of high-quality organic photonic devices and circuits. We prepared size-tunable and reproducible polymer microring resonators on a wafer-scale transparent and flexible chip using a solution printing technique. The printed optical resonator showed a quality (Q) factor higher than 4 × 10(5), which is comparable to that of silicon-based resonators. The high material compatibility of this printed photonic chip enabled us to realize low-threshold microlasers by doping organic functional molecules into a typical photonic device. On an identical chip, this construction strategy allowed us to design a complex assembly of one-dimensional waveguide and resonator components for light signal filtering and optical storage toward the large-scale on-chip integration of microscopic photonic units. Thus, we have developed a scheme for soft photonic integration that may motivate further studies on organic photonic materials and devices.

  6. Modular Hybrid Energy Concept Employing a Novel Control Structure Based on a Simple Analog System

    Directory of Open Access Journals (Sweden)

    PETREUS, D.

    2016-05-01

    Full Text Available This paper proposes a novel control topology which enables the setup of a low cost analog system leading to the implementation of a modular energy conversion system. The modular concept is based on hybrid renewable energy (solar and wind and uses high voltage inverters already available on the market. An important feature of the proposed topology is a permanently active current loop, which assures short circuit protection and simplifies the control loops compensation. The innovative analogue solution of the control structure is based on a dedicated integrated circuit (IC for power factor correction (PFC circuits, used in a new configuration, to assure an efficient inverter start-up. The energy conversion system (control structure and maximum power point tracking algorithm is simulated using a new macromodel-based concept, which reduces the usual computational burden of the simulator and achieves high processing speed. The proposed novel system is presented in this article from concept, through the design and implementation stages, is verified through simulation and is validated by experimental results.

  7. Proceedings of the symposium on RHIC detector R ampersand D

    International Nuclear Information System (INIS)

    Makdisi, Y.; Stevens, A.J.

    1991-01-01

    This report contains papers on the following topics: Development of Analog Memories for RHIC Detector Front-end Electronic Systems; Monolithic Circuit Development for RHIC at Oak Ridge National Laboratory; Highly Integrated Electronics for the STAR TPC; Monolithic Readout Circuits for RHIC; New Methods for Trigger Electronics Development; Neurocomputing methods for Pattern Recognition in Nuclear Physics; The Development of a Silicon Multiplicity Detector System; A Transition Radiation Detector for RHIC Featuring Accurate

  8. A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit.

    Science.gov (United States)

    Chakrabarti, B; Lastras-Montaño, M A; Adam, G; Prezioso, M; Hoskins, B; Payvand, M; Madhavan, A; Ghofrani, A; Theogarajan, L; Cheng, K-T; Strukov, D B

    2017-02-14

    Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore's law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + "Molecular") architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit.

  9. Interrogating the topological robustness of gene regulatory circuits by randomization.

    Directory of Open Access Journals (Sweden)

    Bin Huang

    2017-03-01

    Full Text Available One of the most important roles of cells is performing their cellular tasks properly for survival. Cells usually achieve robust functionality, for example, cell-fate decision-making and signal transduction, through multiple layers of regulation involving many genes. Despite the combinatorial complexity of gene regulation, its quantitative behavior has been typically studied on the basis of experimentally verified core gene regulatory circuitry, composed of a small set of important elements. It is still unclear how such a core circuit operates in the presence of many other regulatory molecules and in a crowded and noisy cellular environment. Here we report a new computational method, named random circuit perturbation (RACIPE, for interrogating the robust dynamical behavior of a gene regulatory circuit even without accurate measurements of circuit kinetic parameters. RACIPE generates an ensemble of random kinetic models corresponding to a fixed circuit topology, and utilizes statistical tools to identify generic properties of the circuit. By applying RACIPE to simple toggle-switch-like motifs, we observed that the stable states of all models converge to experimentally observed gene state clusters even when the parameters are strongly perturbed. RACIPE was further applied to a proposed 22-gene network of the Epithelial-to-Mesenchymal Transition (EMT, from which we identified four experimentally observed gene states, including the states that are associated with two different types of hybrid Epithelial/Mesenchymal phenotypes. Our results suggest that dynamics of a gene circuit is mainly determined by its topology, not by detailed circuit parameters. Our work provides a theoretical foundation for circuit-based systems biology modeling. We anticipate RACIPE to be a powerful tool to predict and decode circuit design principles in an unbiased manner, and to quantitatively evaluate the robustness and heterogeneity of gene expression.

  10. T-gate aligned nanotube radio frequency transistors and circuits with superior performance.

    Science.gov (United States)

    Che, Yuchi; Lin, Yung-Chen; Kim, Pyojae; Zhou, Chongwu

    2013-05-28

    In this paper, we applied self-aligned T-gate design to aligned carbon nanotube array transistors and achieved an extrinsic current-gain cutoff frequency (ft) of 25 GHz, which is the best on-chip performance for nanotube radio frequency (RF) transistors reported to date. Meanwhile, an intrinsic current-gain cutoff frequency up to 102 GHz is obtained, comparable to the best value reported for nanotube RF transistors. Armed with the excellent extrinsic RF performance, we performed both single-tone and two-tone measurements for aligned nanotube transistors at a frequency up to 8 GHz. Furthermore, we utilized T-gate aligned nanotube transistors to construct mixing and frequency doubling analog circuits operated in gigahertz frequency regime. Our results confirm the great potential of nanotube-based circuit applications and indicate that nanotube transistors are promising building blocks in high-frequency electronics.

  11. A low-power high-sensitivity analog front-end for PPG sensor.

    Science.gov (United States)

    Binghui Lin; Atef, Mohamed; Guoxing Wang

    2017-07-01

    This paper presents a low-power analog front-end (AFE) photoplethysmography (PPG) sensor fabricated in 0.35 μm CMOS process. The AFE amplifies the weak photocurrent from the photodiode (PD) and converts it to a strong voltage at the output. In order to decrease the power consumption, the circuits are designed in subthreshold region; so the total biasing current of the AFE is 10 μ A. Since the large input DC photocurrent is a big issue for the PPG sensing circuit, we apply a DC photocurrent rejection technique by adding a DC current-cancellation loop to reject the large DC photocurrent up to 10 μA. In addition, a pseudo resistor is used to reduce the high-pass corner frequency below 0.5 Hz and Gm-C filter is adapted to reject the out-of-band noise higher than 16 Hz. For the whole sensor, the amplifier chain can achieve a total gain of 140 dBμ and an input integrated noise current of 68.87 pA rms up to 16 Hz.

  12. Using acoustic emission technique to monitor fractures on the analogous pressure pipes

    International Nuclear Information System (INIS)

    Zhang Lichen

    1989-01-01

    By using the acoustic emission technique to monitor the fractures on analogous pressure pipes of the primary circuit which has had cracks and loading with pressure was investigated. The dynamical process, from cracking to fracturing, was recorded by the acoustic emission technique. Comparing with the conventional method, this method gives more informations, such as pre-cracking, cracking growing, fast fracturing and the pressure values at different phases. During testing time a microcomputer was used for real-time data processing and locating the fracturing position. These data are useful for the mechanical analysis of the reactor components

  13. Study of recursive model for pole-zero cancellation circuit

    International Nuclear Information System (INIS)

    Zhou Jianbin; Zhou Wei; Hong Xu; Hu Yunchuan; Wan Xinfeng; Du Xin; Wang Renbo

    2014-01-01

    The output of charge sensitive amplifier (CSA) is a negative exponential signal with long decay time which will result in undershoot after C-R differentiator. Pole-zero cancellation (PZC) circuit is often applied to eliminate undershoot in many radiation detectors. However, it is difficult to use a zero created by PZC circuit to cancel a pole in CSA output signal accurately because of the influences of electronic components inherent error and environmental factors. A novel recursive model for PZC circuit is presented based on Kirchhoff's Current Law (KCL) in this paper. The model is established by numerical differentiation algorithm between the input and the output signal. Some simulation experiments for a negative exponential signal are carried out using Visual Basic for Application (VBA) program and a real x-ray signal is also tested. Simulated results show that the recursive model can reduce the time constant of input signal and eliminate undershoot. (authors)

  14. Report on the Minisession ''New developments in Flash ADC integrated circuits''

    International Nuclear Information System (INIS)

    Dhawan, S.K.

    1984-01-01

    New developments are taking place in the Flash Analog to Digital Converter marketplace. The big news is the digitization of VIDEO. It is expected to be a very large market and the merchant semiconductor and consumer electronics companies will be competing in selling these devices. The companies expect the initial selling price to be in the range of $ 7 - $15 for quantities of 10,000 units or more. This session was organized to expose the community to the new developments in FADC integrated circuits and the needs of physics instrumentation

  15. Incorrectness of conventional one-dimensional parallel thermal resistance circuit model for two-dimensional circular composite pipes

    International Nuclear Information System (INIS)

    Wong, K.-L.; Hsien, T.-L.; Chen, W.-L.; Yu, S.-J.

    2008-01-01

    This study is to prove that two-dimensional steady state heat transfer problems of composite circular pipes cannot be appropriately solved by the conventional one-dimensional parallel thermal resistance circuits (PTRC) model because its interface temperatures are not unique. Thus, the PTRC model is definitely different from its conventional recognized analogy, parallel electrical resistance circuits (PERC) model, which has unique node electric voltages. Two typical composite circular pipe examples are solved by CFD software, and the numerical results are compared with those obtained by the PTRC model. This shows that the PTRC model generates large error. Thus, this conventional model, introduced in most heat transfer text books, cannot be applied to two-dimensional composite circular pipes. On the contrary, an alternative one-dimensional separately series thermal resistance circuit (SSTRC) model is proposed and applied to a two-dimensional composite circular pipe with isothermal boundaries, and acceptable results are returned

  16. Fermion-fermion scattering in quantum field theory with superconducting circuits.

    Science.gov (United States)

    García-Álvarez, L; Casanova, J; Mezzacapo, A; Egusquiza, I L; Lamata, L; Romero, G; Solano, E

    2015-02-20

    We propose an analog-digital quantum simulation of fermion-fermion scattering mediated by a continuum of bosonic modes within a circuit quantum electrodynamics scenario. This quantum technology naturally provides strong coupling of superconducting qubits with a continuum of electromagnetic modes in an open transmission line. In this way, we propose qubits to efficiently simulate fermionic modes via digital techniques, while we consider the continuum complexity of an open transmission line to simulate the continuum complexity of bosonic modes in quantum field theories. Therefore, we believe that the complexity-simulating-complexity concept should become a leading paradigm in any effort towards scalable quantum simulations.

  17. Custom integrated front-end circuit for the CMS electromagnetic calorimeter

    CERN Document Server

    Walder, J P; Denes, P; Mathez, H; Pangaud, P

    2001-01-01

    A wide dynamic range multi-gain transimpedance amplifier custom integrated circuit has been developed for the readout of avalanche photodiode and vacuum photodiode in the CMS electromagnetic calorimeter for LHC experiment. The 92 db input dynamic range is divided into four ranges of 12 bits each in order to provide 40 MHz analog sampled data to a 12 bits ADC. This concept, which has been integrated in rad-hard full complementary bipolar technology, will be described. Experimental results obtained in lab and under irradiation will be presented along with test strategy being used for mass production. 6 Refs.

  18. High-speed and high-resolution analog-to-digital and digital-to-analog converters

    NARCIS (Netherlands)

    van de Plassche, R.J.

    1989-01-01

    Analog-to-digital and digital-to-analog converters are important building blocks connecting the analog world of transducers with the digital world of computing, signal processing and data acquisition systems. In chapter two the converter as part of a system is described. Requirements of analog

  19. Design and implementation of a reconfigurable mixed-signal SoC based on field programmable analog arrays

    Science.gov (United States)

    Liu, Lintao; Gao, Yuhan; Deng, Jun

    2017-11-01

    This work presents a reconfigurable mixed-signal system-on-chip (SoC), which integrates switched-capacitor-based field programmable analog arrays (FPAA), analog-to-digital converter (ADC), digital-to-analog converter, digital down converter , digital up converter, 32-bit reduced instruction-set computer central processing unit (CPU) and other digital IPs on a single chip with 0.18 μm CMOS technology. The FPAA intellectual property could be reconfigured as different function circuits, such as gain amplifier, divider, sine generator, and so on. This single-chip integrated mixed-signal system is a complete modern signal processing system, occupying a die area of 7 × 8 mm 2 and consuming 719 mW with a clock frequency of 150 MHz for CPU and 200 MHz for ADC/DAC. This SoC chip can help customers to shorten design cycles, save board area, reduce the system power consumption and depress the system integration risk, which would afford a big prospect of application for wireless communication. Project supported by the National High Technology and Development Program of China (No. 2012AA012303).

  20. Accurate evaluation of modulation transfer function using the Fourier shift theorem

    Science.gov (United States)

    Kim, Yong Gwon; Ryu, Yeunchul

    2017-12-01

    Accurate determination of the line spread function (LSF) on the basis of the edge processing algorithm in X-ray imaging systems is one of the most basic procedures for evaluating the performance of such systems. Extensive research has been focused on algorithms for the precise or fast measurement of the LSF in digital X-ray systems. Most of the standard methods for evaluating the performance of an imaging system are based on a fully digitalized radiographic system or a film-based system. However, images obtained by computed radiography (CR), which converts a captured analog signal into a digital image through an analog-to-digital converting scanner, show the combined characteristics of analog and digital imaging systems. Fundamentally, the characteristics of digital imaging systems differ substantially from those of film imaging systems because of their different methods of acquiring and displaying image data. In addition, a system with both analog and digital component has characteristics that differ from those of both digital and analog systems. In this research, we present a new modulation transfer function (MTF) that mimics the existing MTF in terms of measurement but satisfies existing standard protocols through modification of the hypothesis contents. In the case of the LSF and the point spread function measured with a CR system, the developed edge algorithm shows better performance than the conventional methods. We also demonstrate the usefulness of this method in an actual measurement with a CR digital X-ray imaging system.

  1. A new 12-bit spectroscopy analog-to-digital converter type SAA intended for CAMAC acquisition systems

    International Nuclear Information System (INIS)

    Borsuk, S.; Kulka, Z.

    1989-12-01

    A new 12-bit spectroscopy analog-to-digital converter (ADC) type SAA (Successive Approximation type with channel width Averaging) intended for CAMAC acquisition systems is decsribed. ADC type SAA initiates new series of spectroscopy ADC's based on a binary-approximation method in which differential nonlinearity is corrected by a statistical channel width averaging method. The structure and principle of operation, as well as some circuit realizations and specifications of the new converter are described. 41 refs., 5 figs. (author)

  2. Design of a low-power flash analog-to-digital converter chip for temperature sensors in 0.18 µm CMOS process

    Directory of Open Access Journals (Sweden)

    Al Al

    2015-01-01

    Full Text Available Current paper proposes a simple design of a 6-bit flash analog-to-digital converter (ADC by process in 0.18 μm CMOS. ADC is expected to be used within a temperature sensor which provides analog data output having a range of 360 mV to 560 mV. The complete system consisting of three main blocks, which are the threshold inverter quantization (TIQ-comparator, the encoder and the parallel input serial output (PISO register. The TIQ-comparator functions as quantization of the analog data to the thermometer code. The encoder converts this thermometer code to 6-bit binary code and the PISO register transforms the parallel data into a data series. The design aims to get a flash ADC on low power dissipation, small size and compatible with the temperature sensors. The method is proposed to set each of the transistor channel length to find out the threshold voltage difference of the inverter on the TIQ comparator. A portion design encoder and PISO registers circuit selected a simple circuit with the best performance from previous studies and adjusted to this system. The design has an input range of 285 to 600 mV and 6-bit resolution output. The chip area of the designed ADC is 844.48 x 764.77 µm2 and the power dissipation is 0.162 µW with 1.6 V supply voltage.

  3. GaAs integrated circuits and heterojunction devices

    Science.gov (United States)

    Fowlis, Colin

    1986-06-01

    The state of the art of GaAs technology in the U.S. as it applies to digital and analog integrated circuits is examined. In a market projection, it is noted that whereas analog ICs now largely dominate the market, in 1994 they will amount to only 39 percent vs. 57 percent for digital ICs. The military segment of the market will remain the largest (42 percent in 1994 vs. 70 percent today). ICs using depletion-mode-only FETs can be constructed in various forms, the closest to production being BFL or buffered FET logic. Schottky diode FET logic - a lower power approach - can reach higher complexities and strong efforts are being made in this direction. Enhancement type devices appear essential to reach LSI and VLSI complexity, but process control is still very difficult; strong efforts are under way, both in the U.S. and in Japan. Heterojunction devices appear very promising, although structures are fairly complex, and special fabrication techniques, such as molecular beam epitaxy and MOCVD, are necessary. High-electron-mobility-transistor (HEMT) devices show significant performance advantages over MESFETs at low temperatures. Initial results of heterojunction bipolar transistor devices show promise for high speed A/D converter applications.

  4. Fast and accurate calculation of the properties of water and steam for simulation

    International Nuclear Information System (INIS)

    Szegi, Zs.; Gacs, A.

    1990-01-01

    A basic principle simulator was developed at the CRIP, Budapest, for real time simulation of the transients of WWER-440 type nuclear power plants. Its integral part is the fast and accurate calculation of the thermodynamic properties of water and steam. To eliminate successive approximations, the model system of the secondary coolant circuit requires binary forms which are known as inverse functions, countinuous when crossing the saturation line, accurate and coherent for all argument combinations. A solution which reduces the computer memory and execution time demand is reported. (author) 36 refs.; 5 figs.; 3 tabs

  5. Electronic circuit encyclopedia 2

    Energy Technology Data Exchange (ETDEWEB)

    Park, Sun Ho

    1992-10-15

    This book is composed of 15 chapters, which are amplification of weak signal and measurement circuit audio control and power amplification circuit, data transmission and wireless system, forwarding and isolation, signal converting circuit, counter and comparator, discriminator circuit, oscillation circuit and synthesizer, digital and circuit on computer image processing circuit, sensor drive circuit temperature sensor circuit, magnetic control and application circuit, motor driver circuit, measuring instrument and check tool and power control and stability circuit.

  6. Electronic circuit encyclopedia 2

    International Nuclear Information System (INIS)

    Park, Sun Ho

    1992-10-01

    This book is composed of 15 chapters, which are amplification of weak signal and measurement circuit audio control and power amplification circuit, data transmission and wireless system, forwarding and isolation, signal converting circuit, counter and comparator, discriminator circuit, oscillation circuit and synthesizer, digital and circuit on computer image processing circuit, sensor drive circuit temperature sensor circuit, magnetic control and application circuit, motor driver circuit, measuring instrument and check tool and power control and stability circuit.

  7. Nonlinear analysis and analog simulation of a piezoelectric buckled beam with fractional derivative

    Science.gov (United States)

    Mokem Fokou, I. S.; Buckjohn, C. Nono Dueyou; Siewe Siewe, M.; Tchawoua, C.

    2017-08-01

    In this article, an analog circuit for implementing fractional-order derivative and a harmonic balance method for a vibration energy harvesting system under pure sinusoidal vibration source is proposed in order to predict the system response. The objective of this paper is to discuss the performance of the system with fractional derivative and nonlinear damping (μb). Bifurcation diagram, phase portrait and power spectral density (PSD) are provided to deeply characterize the dynamics of the system. These results are corroborated by the 0-1 test. The appearance of the chaotic vibrations reduces the instantaneous voltage. The pre-experimental investigation is carried out through appropriate software electronic circuit (Multisim). The corresponding electronic circuit is designed, exhibiting periodic and chaotic behavior, in accord with numerical simulations. The impact of fractional derivative and nonlinear damping is presented with detail on the output voltage and power of the system. The agreement between numerical and analytical results justifies the efficiency of the analytical technique used. In addition, by combining the harmonic excitation with the random force, the stochastic resonance phenomenon occurs and improves the harvested energy. It emerges from these results that the order of fractional derivative μ and nonlinear damping μb play an important role in the response of the system.

  8. Visual relations children find easy and difficult to process in figural analogies.

    Science.gov (United States)

    Stevenson, Claire E; Alberto, Rosa A; van den Boom, Max A; de Boeck, Paul A L

    2014-01-01

    Analogical reasoning, the ability to learn about novel phenomena by relating it to structurally similar knowledge, develops with great variability in children. Furthermore, the development of analogical reasoning coincides with greater working memory efficiency and increasing knowledge of the entities and relations present in analogy problems. In figural matrices, a classical form of analogical reasoning assessment, some features, such as color, appear easier for children to encode and infer than others, such as orientation. Yet, few studies have structurally examined differences in the difficulty of visual relations across different age-groups. This cross-sectional study of figural analogical reasoning examined which underlying rules in figural analogies were easier or more difficult for children to correctly process. School children (N = 1422, M = 7.0 years, SD = 21 months, range 4.5-12.5 years) were assessed in analogical reasoning using classical figural matrices and memory measures. The visual relations the children had to induce and apply concerned the features: animal, color, orientation, position, quantity and size. The role of age and memory span on the children's ability to correctly process each type of relation was examined using explanatory item response theory models. The results showed that with increasing age and/or greater memory span all visual relations were processed more accurately. The "what" visual relations animal, color, quantity and size were easiest, whereas the "where" relations orientation and position were most difficult. However, the "where" visual relations became relatively easier with age and increased memory efficiency. The implications are discussed in terms of the development of visual processing in object recognition vs. position and motion encoding in the ventral ("what") and dorsal ("where") pathways respectively.

  9. Structured Analog CMOS Design

    CERN Document Server

    Stefanovic, Danica

    2008-01-01

    Structured Analog CMOS Design describes a structured analog design approach that makes it possible to simplify complex analog design problems and develop a design strategy that can be used for the design of large number of analog cells. It intentionally avoids treating the analog design as a mathematical problem, developing a design procedure based on the understanding of device physics and approximations that give insight into parameter interdependences. The proposed transistor-level design procedure is based on the EKV modeling approach and relies on the device inversion level as a fundament

  10. Analog and hybrid computing

    CERN Document Server

    Hyndman, D E

    2013-01-01

    Analog and Hybrid Computing focuses on the operations of analog and hybrid computers. The book first outlines the history of computing devices that influenced the creation of analog and digital computers. The types of problems to be solved on computers, computing systems, and digital computers are discussed. The text looks at the theory and operation of electronic analog computers, including linear and non-linear computing units and use of analog computers as operational amplifiers. The monograph examines the preparation of problems to be deciphered on computers. Flow diagrams, methods of ampl

  11. Solid-state circuits

    CERN Document Server

    Pridham, G J

    2013-01-01

    Solid-State Circuits provides an introduction to the theory and practice underlying solid-state circuits, laying particular emphasis on field effect transistors and integrated circuits. Topics range from construction and characteristics of semiconductor devices to rectification and power supplies, low-frequency amplifiers, sine- and square-wave oscillators, and high-frequency effects and circuits. Black-box equivalent circuits of bipolar transistors, physical equivalent circuits of bipolar transistors, and equivalent circuits of field effect transistors are also covered. This volume is divided

  12. A VLSI front-end circuit for microstrip silicon detectors for medical imaging applications

    International Nuclear Information System (INIS)

    Beccherle, R.; Cisternino, A.; Guerra, A. Del; Folli, M.; Marchesini, R.; Bisogni, M.G.; Ceccopieri, A.; Rosso, V.; Stefanini, A.; Tripiccione, R.; Kipnis, I.

    1999-01-01

    An analog CMOS-Integrated Circuit has been developed as Front-End for a double-sided microstrip silicon detector. The IC processes and discriminates signals in the 5-30 keV energy range. Main features are low noise and precise timing information. Low noise is achieved by optimizing the cascoded integrator with the 8 pF detector capacitance and by using an inherently low noise 1.2 μm CMOS technology. Timing information is provided by a double discriminator architecture. The output of the circuit is a digital pulse. The leading edge is determined by a fixed threshold discriminator, while the trailing edge is provided by a zero crossing discriminator. In this paper we first describe the architecture of the Front-End chip. We then present the performance of the chip prototype in terms of noise, minimum discrimination threshold and time resolution

  13. A digital calibration technique for an ultra high-speed wide-bandwidth folding and interpolating analog-to-digital converter in 0.18-{mu}m CMOS technology

    Energy Technology Data Exchange (ETDEWEB)

    Yu Jinshan; Zhang Ruitao; Zhang Zhengping; Wang Yonglu; Zhu Can; Zhang Lei; Yu Zhou; Han Yong, E-mail: yujinshan@yeah.net [National Laboratory of Analog IC' s, Chongqing 400060 (China)

    2011-01-15

    A digital calibration technique for an ultra high-speed folding and interpolating analog-to-digital converter in 0.18-{mu}m CMOS technology is presented. The similar digital calibration techniques are taken for high 3-bit flash converter and low 5-bit folding and interpolating converter, which are based on well-designed calibration reference, calibration DAC and comparators. The spice simulation and the measured results show the ADC produces 5.9 ENOB with calibration disabled and 7.2 ENOB with calibration enabled for high-frequency wide-bandwidth analog input. (semiconductor integrated circuits)

  14. Analog-to-digital conversion

    CERN Document Server

    Pelgrom, Marcel J M

    2010-01-01

    The design of an analog-to-digital converter or digital-to-analog converter is one of the most fascinating tasks in micro-electronics. In a converter the analog world with all its intricacies meets the realm of the formal digital abstraction. Both disciplines must be understood for an optimum conversion solution. In a converter also system challenges meet technology opportunities. Modern systems rely on analog-to-digital converters as an essential part of the complex chain to access the physical world. And processors need the ultimate performance of digital-to-analog converters to present the results of their complex algorithms. The same progress in CMOS technology that enables these VLSI digital systems creates new challenges for analog-to-digital converters: lower signal swings, less power and variability issues. Last but not least, the analog-to-digital converter must follow the cost reduction trend. These changing boundary conditions require micro-electronics engineers to consider their design choices for...

  15. Collective of mechatronics circuit

    International Nuclear Information System (INIS)

    1987-02-01

    This book is composed of three parts, which deals with mechatronics system about sensor, circuit and motor. The contents of the first part are photo sensor of collector for output, locating detection circuit with photo interrupts, photo sensor circuit with CdS cell and lamp, interface circuit with logic and LED and temperature sensor circuit. The second part deals with oscillation circuit with crystal, C-R oscillation circuit, F-V converter, timer circuit, stability power circuit, DC amp and DC-DC converter. The last part is comprised of bridge server circuit, deformation bridge server, controlling circuit of DC motor, controlling circuit with IC for PLL and driver circuit of stepping motor and driver circuit of Brushless.

  16. Collective of mechatronics circuit

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1987-02-15

    This book is composed of three parts, which deals with mechatronics system about sensor, circuit and motor. The contents of the first part are photo sensor of collector for output, locating detection circuit with photo interrupts, photo sensor circuit with CdS cell and lamp, interface circuit with logic and LED and temperature sensor circuit. The second part deals with oscillation circuit with crystal, C-R oscillation circuit, F-V converter, timer circuit, stability power circuit, DC amp and DC-DC converter. The last part is comprised of bridge server circuit, deformation bridge server, controlling circuit of DC motor, controlling circuit with IC for PLL and driver circuit of stepping motor and driver circuit of Brushless.

  17. Microwave Photonic Architecture for Direction Finding of LPI Emitters: Front End Analog Circuit Design and Component Characterization

    Science.gov (United States)

    2016-09-01

    into two parts. The design, development, and testing efforts of the front-end microwave photonics circuit design and the system integration with the...miniature microwave - photonic phase-sampling DF technique is investigated in this thesis. This front-end design uses a combination of integrated optical...NAVAL POSTGRADUATE SCHOOL MONTEREY, CALIFORNIA THESIS Approved for public release. Distribution is unlimited. MICROWAVE

  18. Spectral analysis to detection of short circuit fault of solar photovoltaic modules in strings

    International Nuclear Information System (INIS)

    Sevilla-Camacho, P.Y.; Robles-Ocampo, J.B.; Zuñiga-Reyes, Marco A.

    2017-01-01

    This research work presents a method to detect the number of short circuit faulted solar photovoltaic modules in strings of a photovoltaic system by taking into account speed, safety, and non-use of sensors and specialized and expensive equipment. The method consists on apply the spectral analysis and statistical techniques to the alternating current output voltage of a string and detect the number of failed modules through the changes in the amplitude of the component frequency of 12 kHz. For that, the analyzed string is disconnected of the array; and a small pulsed voltage signal of frequency of 12 kHz introduces him under dark condition and controlled temperature. Previous to the analysis, the signal is analogic filtered in order to reduce the direct current signal component. The spectral analysis technique used is the Fast Fourier Transform. The obtained experimental results were validated through simulation of the alternating current equivalent circuit of a solar cell. In all experimental and simulated test, the method allowed to identify correctly the number of photovoltaic modules with short circuit in the analyzed string. (author)

  19. Experimental Device for Learning of Logical Circuit Design using Integrated Circuits

    OpenAIRE

    石橋, 孝昭

    2012-01-01

    This paper presents an experimental device for learning of logical circuit design using integrated circuits and breadboards. The experimental device can be made at a low cost and can be used for many subjects such as logical circuits, computer engineering, basic electricity, electrical circuits and electronic circuits. The proposed device is effective to learn the logical circuits than the usual lecture.

  20. The inaccuracy of conventional one-dimensional parallel thermal resistance circuit model for two-dimensional composite walls

    International Nuclear Information System (INIS)

    Wong, K.-L.; Hsien, T.-L.; Hsiao, M.-C.; Chen, W.-L.; Lin, K.-C.

    2008-01-01

    This investigation is to show that two-dimensional steady state heat transfer problems of composite walls should not be solved by the conventionally one-dimensional parallel thermal resistance circuits (PTRC) model because the interface temperatures are not unique. Thus PTRC model cannot be used like its conventional recognized analogy, parallel electrical resistance circuits (PERC) model which has the unique node electric voltage. Two typical composite wall examples, solved by CFD software, are used to demonstrate the incorrectness. The numerical results are compared with those obtained by PTRC model, and very large differences are observed between their results. This proves that the application of conventional heat transfer PTRC model to two-dimensional composite walls, introduced in most heat transfer text book, is totally incorrect. An alternative one-dimensional separately series thermal resistance circuit (SSTRC) model is proposed and applied to the two-dimensional composite walls with isothermal boundaries. Results with acceptable accuracy can be obtained by the new model

  1. Monolithically Integrated Flexible Black Phosphorus Complementary Inverter Circuits.

    Science.gov (United States)

    Liu, Yuanda; Ang, Kah-Wee

    2017-07-25

    Two-dimensional (2D) inverters are a fundamental building block for flexible logic circuits which have previously been realized by heterogeneously wiring transistors with two discrete channel materials. Here, we demonstrate a monolithically integrated complementary inverter made using a homogeneous black phosphorus (BP) nanosheet on flexible substrates. The digital logic inverter circuit is demonstrated via effective threshold voltage tuning within a single BP material, which offers both electron and hole dominated conducting channels with nearly symmetric pinch-off and current saturation. Controllable electron concentration is achieved by accurately modulating the aluminum (Al) donor doping, which realizes BP n-FET with a room-temperature on/off ratio >10 3 . Simultaneously, work function engineering is employed to obtain a low Schottky barrier contact electrode that facilities hole injection, thus enhancing the current density of the BP p-FET by 9.4 times. The flexible inverter circuit shows a clear digital logic voltage inversion operation along with a larger-than-unity direct current voltage gain, while exhibits alternating current dynamic signal switching at a record high frequency up to 100 kHz and remarkable electrical stability upon mechanical bending with a radii as small as 4 mm. Our study demonstrates a practical monolithic integration strategy for achieving functional logic circuits on one material platform, paving the way for future high-density flexible electronic applications.

  2. Data input from an analog-to-digital converter into the M-6000 computer

    International Nuclear Information System (INIS)

    Kalashnikov, A.M.; Sheremet'ev, A.K.

    1978-01-01

    A device for spectrometric data input from the ADC-4096 into the M-6000 computer memory operating in the information storage regime is described. The input device made on integrated circuits coordinates signal levels of the fast response analog-to-digital converter and computer with the help of resistors and inverters. Besides, the input forms a strobe to trigger an increment channel used to record information into the computer memory. The use of the input device permits to get rid of the intermediate information storage in the analyzer memory and ensures fast response of the devices

  3. Hierarchical hybrid control of manipulators: Artificial intelligence in large scale integrated circuits

    Science.gov (United States)

    Greene, P. H.

    1972-01-01

    Both in practical engineering and in control of muscular systems, low level subsystems automatically provide crude approximations to the proper response. Through low level tuning of these approximations, the proper response variant can emerge from standardized high level commands. Such systems are expressly suited to emerging large scale integrated circuit technology. A computer, using symbolic descriptions of subsystem responses, can select and shape responses of low level digital or analog microcircuits. A mathematical theory that reveals significant informational units in this style of control and software for realizing such information structures are formulated.

  4. Adhesion of volatile propofol to breathing circuit tubing.

    Science.gov (United States)

    Lorenz, Dominik; Maurer, Felix; Trautner, Katharina; Fink, Tobias; Hüppe, Tobias; Sessler, Daniel I; Baumbach, Jörg Ingo; Volk, Thomas; Kreuer, Sascha

    2017-08-21

    Propofol in exhaled breath can be measured and may provide a real-time estimate of plasma concentration. However, propofol is absorbed in plastic tubing, thus estimates may fail to reflect lung/blood concentration if expired gas is not extracted directly from the endotracheal tube. We evaluated exhaled propofol in five ventilated ICU patients who were sedated with propofol. Exhaled propofol was measured once per minute using ion mobility spectrometry. Exhaled air was sampled directly from the endotracheal tube and at the ventilator end of the expiratory side of the anesthetic circuit. The circuit was disconnected from the patient and propofol was washed out with a separate clean ventilator. Propofol molecules, which discharged from the expiratory portion of the breathing circuit, were measured for up to 60 h. We also determined whether propofol passes through the plastic of breathing circuits. A total of 984 data pairs (presented as median values, with 95% confidence interval), consisting of both concentrations were collected. The concentration of propofol sampled near the patient was always substantially higher, at 10.4 [10.25-10.55] versus 5.73 [5.66-5.88] ppb (p tubing was 4.58 [4.48-4.68] ppb, 3.46 [3.21-3.73] in the first hour, 4.05 [3.77-4.34] in the second hour, and 4.01 [3.36-4.40] in the third hour. Out-gassing propofol from the breathing circuit remained at 2.8 ppb after 60 h of washing out. Diffusion through the plastic was not observed. Volatile propofol binds or adsorbs to the plastic of a breathing circuit with saturation kinetics. The bond is reversible so propofol can be washed out from the plastic. Our data confirm earlier findings that accurate measurements of volatile propofol require exhaled air to be sampled as close as possible to the patient.

  5. Battery open-circuit voltage estimation by a method of statistical analysis

    NARCIS (Netherlands)

    Snihir, Iryna; Rey, William; Verbitskiy, Evgeny; Belfadhel-Ayeb, Afifa; Notten, Peter H.L.

    2006-01-01

    The basic task of a battery management system (BMS) is the optimal utilization of the stored energy and minimization of degradation effects. It is critical for a BMS that the state-of-charge (SoC) be accurately determined. Open-circuit voltage (OCV) is directly related to the state-of-charge of the

  6. Dependence of excitation frequency of resonant circuit on RF irradiation position of MRI equipment

    International Nuclear Information System (INIS)

    Shimizu, Masato; Yamada, Tsutomu; Takemura, Yasushi; Niwa, Touru; Inoue, Tomio

    2010-01-01

    Hyperthermia using implants is a cancer treatment in which cancer tissue is heated to over 42.5 deg C to selectively kill the cancer cells. In this study, a resonant circuit was used as an implant, and a weak magnetic field of radiofrequency (RF) pulses from a magnetic resonance imaging (MRI) device was used as an excitation source. We report here how the temperature of the resonant circuit was controlled by changing the excitation frequency of the MRI. As a result, the temperature rise of the resonant circuit was successfully found to depend on its position in the MRI device. This significant result indicates that the temperature of the resonant circuit can be controlled only by adjusting the excitation position. Accurate temperature control is therefore expected to be possible by combining this control technique with the temperature measurement function of MRI equipment. (author)

  7. Carbon Nanotube Self-Gating Diode and Application in Integrated Circuits.

    Science.gov (United States)

    Si, Jia; Liu, Lijun; Wang, Fanglin; Zhang, Zhiyong; Peng, Lian-Mao

    2016-07-26

    A nano self-gating diode (SGD) based on nanoscale semiconducting material is proposed, simulated, and realized on semiconducting carbon nanotubes (CNTs) through a doping-free fabrication process. The relationships between the performance and material/structural parameters of the SGD are explored through numerical simulation and verified by experiment results. Based on these results, performance optimization strategy is outlined, and high performance CNT SGDs are fabricated and demonstrated to surpass other published CNT diodes. In particular the CNT SGD exhibits high rectifier factor of up to 1.4 × 10(6) while retains large on-state current. Benefiting from high yield and stability, CNT SGDs are used for constructing logic and analog integrated circuits. Two kinds of basic digital gates (AND and OR) have been realized on chip through using CNT SGDs and on-chip Ti wire resistances, and a full wave rectifier circuit has been demonstrated through using two CNT SGDs. Although demonstrated here using CNT SGDs, this device structure may in principle be implemented using other semiconducting nanomaterials, to provide ideas and building blocks for electronic applications based on nanoscale materials.

  8. Color Coding of Circuit Quantities in Introductory Circuit Analysis Instruction

    Science.gov (United States)

    Reisslein, Jana; Johnson, Amy M.; Reisslein, Martin

    2015-01-01

    Learning the analysis of electrical circuits represented by circuit diagrams is often challenging for novice students. An open research question in electrical circuit analysis instruction is whether color coding of the mathematical symbols (variables) that denote electrical quantities can improve circuit analysis learning. The present study…

  9. Design of an improved RCD buffer circuit for full bridge circuit

    Science.gov (United States)

    Yang, Wenyan; Wei, Xueye; Du, Yongbo; Hu, Liang; Zhang, Liwei; Zhang, Ou

    2017-05-01

    In the full bridge inverter circuit, when the switch tube suddenly opened or closed, the inductor current changes rapidly. Due to the existence of parasitic inductance of the main circuit. Therefore, the surge voltage between drain and source of the switch tube can be generated, which will have an impact on the switch and the output voltage. In order to ab sorb the surge voltage. An improve RCD buffer circuit is proposed in the paper. The peak energy will be absorbed through the buffer capacitor of the circuit. The part energy feedback to the power supply, another part release through the resistor in the form of heat, and the circuit can absorb the voltage spikes. This paper analyzes the process of the improved RCD snubber circuit, According to the specific parameters of the main circuit, a reasonable formula for calculating the resistance capacitance is given. A simulation model will be modulated in Multisim, which compared the waveform of tube voltage and the output waveform of the circuit without snubber circuit with the improved RCD snubber circuit. By comparing and analyzing, it is proved that the improved buffer circuit can absorb surge voltage. Finally, experiments are demonstrated to validate that the correctness of the RC formula and the improved RCD snubber circuit.

  10. Analog earthquakes

    International Nuclear Information System (INIS)

    Hofmann, R.B.

    1995-01-01

    Analogs are used to understand complex or poorly understood phenomena for which little data may be available at the actual repository site. Earthquakes are complex phenomena, and they can have a large number of effects on the natural system, as well as on engineered structures. Instrumental data close to the source of large earthquakes are rarely obtained. The rare events for which measurements are available may be used, with modfications, as analogs for potential large earthquakes at sites where no earthquake data are available. In the following, several examples of nuclear reactor and liquified natural gas facility siting are discussed. A potential use of analog earthquakes is proposed for a high-level nuclear waste (HLW) repository

  11. An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras

    Energy Technology Data Exchange (ETDEWEB)

    Bolotnikov, A. E., E-mail: bolotnik@bnl.gov; Ackley, K.; Camarda, G. S.; Cherches, C.; Cui, Y.; De Geronimo, G.; Fried, J.; Hossain, A.; Mahler, G.; Maritato, M.; Roy, U.; Salwen, C.; Vernon, E.; Yang, G.; James, R. B. [Brookhaven National Laboratory, Upton, New York 11793 (United States); Hodges, D. [University of Texas at El Paso, El Paso, Texas 79968 (United States); Lee, W. [Korea University, Seoul 136-855 (Korea, Republic of); Petryk, M. [SUNY Binghamton, Vestal, New York 13902 (United States)

    2015-07-15

    We developed a robust and low-cost array of virtual Frisch-grid CdZnTe detectors coupled to a front-end readout application-specific integrated circuit (ASIC) for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6 × 6 × 15 mm{sup 3} detectors grouped into 3 × 3 sub-arrays of 2 × 2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays’ performance and reduction of their cost are possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.

  12. Thermoelectricity analogy method for computing the periodic heat transfer in external building envelopes

    International Nuclear Information System (INIS)

    Peng Changhai; Wu Zhishen

    2008-01-01

    Simple and effective computation methods are needed to calculate energy efficiency in buildings for building thermal comfort and HVAC system simulations. This paper, which is based upon the theory of thermoelectricity analogy, develops a new harmonic method, the thermoelectricity analogy method (TEAM), to compute the periodic heat transfer in external building envelopes (EBE). It presents, in detail, the principles and specific techniques of TEAM to calculate both the decay rates and time lags of EBE. First, a set of linear equations is established using the theory of thermoelectricity analogy. Second, the temperature of each node is calculated by solving the linear equations set. Finally, decay rates and time lags are found by solving simple mathematical expressions. Comparisons show that this method is highly accurate and efficient. Moreover, relative to the existing harmonic methods, which are based on the classical control theory and the method of separation of variables, TEAM does not require complicated derivation and is amenable to hand computation and programming

  13. Development of wide range charge integration application specified integrated circuit for photo-sensor

    Energy Technology Data Exchange (ETDEWEB)

    Katayose, Yusaku, E-mail: katayose@ynu.ac.jp [Department of Physics, Yokohama National University, 79-5 Tokiwadai, Hodogaya-ku, Yokohama, Kanagawa 240-8501 (Japan); Ikeda, Hirokazu [Institute of Space and Astronautical Science (ISAS)/Japan Aerospace Exploration Agency (JAXA), 3-1-1 Yoshinodai, Chuo-ku, Sagamihara, Kanagawa 252-5210 (Japan); Tanaka, Manobu [National Laboratory for High Energy Physics, KEK, 1-1 Oho, Tsukuba, Ibaraki 305-0801 (Japan); Shibata, Makio [Department of Physics, Yokohama National University, 79-5 Tokiwadai, Hodogaya-ku, Yokohama, Kanagawa 240-8501 (Japan)

    2013-01-21

    A front-end application specified integrated circuit (ASIC) is developed with a wide dynamic range amplifier (WDAMP) to read-out signals from a photo-sensor like a photodiode. The WDAMP ASIC consists of a charge sensitive preamplifier, four wave-shaping circuits with different amplification factors and Wilkinson-type analog-to-digital converter (ADC). To realize a wider range, the integrating capacitor in the preamplifier can be changed from 4 pF to 16 pF by a two-bit switch. The output of a preamplifier is shared by the four wave-shaping circuits with four gains of 1, 4, 16 and 64 to adapt the input range of ADC. A 0.25-μm CMOS process (of UMC electronics CO., LTD) is used to fabricate the ASIC with four-channels. The dynamic range of four orders of magnitude is achieved with the maximum range over 20 pC and the noise performance of 0.46 fC + 6.4×10{sup −4} fC/pF. -- Highlights: ► A front-end ASIC is developed with a wide dynamic range amplifier. ► The ASIC consists of a CSA, four wave-shaping circuits and pulse-height-to-time converters. ► The dynamic range of four orders of magnitude is achieved with the maximum range over 20 pC.

  14. Analysis and Evaluation of Statistical Models for Integrated Circuits Design

    Directory of Open Access Journals (Sweden)

    Sáenz-Noval J.J.

    2011-10-01

    Full Text Available Statistical models for integrated circuits (IC allow us to estimate the percentage of acceptable devices in the batch before fabrication. Actually, Pelgrom is the statistical model most accepted in the industry; however it was derived from a micrometer technology, which does not guarantee reliability in nanometric manufacturing processes. This work considers three of the most relevant statistical models in the industry and evaluates their limitations and advantages in analog design, so that the designer has a better criterion to make a choice. Moreover, it shows how several statistical models can be used for each one of the stages and design purposes.

  15. Automating analog design: Taming the shrew

    Science.gov (United States)

    Barlow, A.

    1990-01-01

    The pace of progress in the design of integrated circuits continues to amaze observers inside and outside of the industry. Three decades ago, a 50 transistor chip was a technological wonder. Fifteen year later, a 5000 transistor device would 'wow' the crowds. Today, 50,000 transistor chips will earn a 'not too bad' assessment, but it takes 500,000 to really leave an impression. In 1975 a typical ASIC device had 1000 transistors, took one year to first samples (and two years to production) and sold for about 5 cents per transistor. Today's 50,000 transistor gate array takes about 4 months from spec to silicon, works the first time, and sells for about 0.02 cents per transistor. Fifteen years ago, the single most laborious and error prone step in IC design was the physical layout. Today, most IC's never see the hand of a layout designer: and automatic place and route tool converts the engineer's computer captured schematic to a complete physical design using a gate array or a library of standard cells also created by software rather than by designers. CAD has also been a generous benefactor to the digital design process. The architect of today's digital systems creates the design using an RTL or other high level simulator. Then the designer pushes a button to invoke the logic synthesizer-optimizer tool. A fault analyzer checks the result for testability and suggests where scan based cells will improve test coverage. One obstinate holdout amidst this parade of progress is the automation of analog design and its reduction to semi-custom techniques. This paper investigates the application of CAD techniques to analog design.

  16. Reactor protection system design using application specific integrated circuits

    International Nuclear Information System (INIS)

    Battle, R.E.; Bryan, W.L.; Kisner, R.A.; Wilson, T.L. Jr.

    1992-01-01

    Implementing reactor protection systems (RPS) or other engineering safeguard systems with application specific integrated circuits (ASICs) offers significant advantages over conventional analog or software based RPSs. Conventional analog RPSs suffer from setpoints drifts and large numbers of discrete analog electronics, hardware logic, and relays which reduce reliability because of the large number of potential failures of components or interconnections. To resolve problems associated with conventional discrete RPSs and proposed software based RPS systems, a hybrid analog and digital RPS system implemented with custom ASICs is proposed. The actual design of the ASIC RPS resembles a software based RPS but the programmable software portion of each channel is implemented in a fixed digital logic design including any input variable computations. Set point drifts are zero as in proposed software systems, but the verification and validation of the computations is made easier since the computational logic an be exhaustively tested. The functionality is assured fixed because there can be no future changes to the ASIC without redesign and fabrication. Subtle error conditions caused by out of order evaluation or time dependent evaluation of system variables against protection criteria are eliminated by implementing all evaluation computations in parallel for simultaneous results. On- chip redundancy within each RPS channel and continuous self-testing of all channels provided enhanced assurance that a particular channel is available and faults are identified as soon as possible for corrective actions. The use of highly integrated ASICs to implement channel electronics rather than the use of discrete electronics greatly reduces the total number of components and interconnections in the RPS to further increase system reliability. A prototype ASIC RPS channel design and the design environment used for ASIC RPS systems design is discussed

  17. Optical analogy. Synthesis report

    International Nuclear Information System (INIS)

    1965-01-01

    The authors report the study of conditions under which light attenuation (reflection, diffusion, absorption) and the attenuation of some radiations (notably thermal neutrons) can be described with analogical calculations. The analogy between light physical properties and neutron properties is not searched for, but the analogy between their attenuation characteristics. After having discussed this possible analogy, they propose a mathematical formulation of neutron and optical phenomena which could theoretically justify the optical analogy. The second part reports a more practical study of optics problems such as the study of simple optics materials and illumination measurements, or more precisely the study of angular distributions of optical reflections, a determination of such angular distributions, and an experimental determination of the albedo

  18. An investigation of reasoning by analogy in schizophrenia and autism spectrum disorder.

    Science.gov (United States)

    Krawczyk, Daniel C; Kandalaft, Michelle R; Didehbani, Nyaz; Allen, Tandra T; McClelland, M Michelle; Tamminga, Carol A; Chapman, Sandra B

    2014-01-01

    Relational reasoning ability relies upon by both cognitive and social factors. We compared analogical reasoning performance in healthy controls (HC) to performance in individuals with Autism Spectrum Disorder (ASD), and individuals with schizophrenia (SZ). The experimental task required participants to find correspondences between drawings of scenes. Participants were asked to infer which item within one scene best matched a relational item within the second scene. We varied relational complexity, presence of distraction, and type of objects in the analogies (living or non-living items). We hypothesized that the cognitive differences present in SZ would reduce relational inferences relative to ASD and HC. We also hypothesized that both SZ and ASD would show lower performance on living item problems relative to HC due to lower social function scores. Overall accuracy was higher for HC relative to SZ, consistent with prior research. Across groups, higher relational complexity reduced analogical responding, as did the presence of non-living items. Separate group analyses revealed that the ASD group was less accurate at making relational inferences in problems that involved mainly non-living items and when distractors were present. The SZ group showed differences in problem type similar to the ASD group. Additionally, we found significant correlations between social cognitive ability and analogical reasoning, particularly for the SZ group. These results indicate that differences in cognitive and social abilities impact the ability to infer analogical correspondences along with numbers of relational elements and types of objects present in the problems.

  19. An investigation of reasoning by analogy in schizophrenia and autism spectrum disorder

    Science.gov (United States)

    Krawczyk, Daniel C.; Kandalaft, Michelle R.; Didehbani, Nyaz; Allen, Tandra T.; McClelland, M. Michelle; Tamminga, Carol A.; Chapman, Sandra B.

    2014-01-01

    Relational reasoning ability relies upon by both cognitive and social factors. We compared analogical reasoning performance in healthy controls (HC) to performance in individuals with Autism Spectrum Disorder (ASD), and individuals with schizophrenia (SZ). The experimental task required participants to find correspondences between drawings of scenes. Participants were asked to infer which item within one scene best matched a relational item within the second scene. We varied relational complexity, presence of distraction, and type of objects in the analogies (living or non-living items). We hypothesized that the cognitive differences present in SZ would reduce relational inferences relative to ASD and HC. We also hypothesized that both SZ and ASD would show lower performance on living item problems relative to HC due to lower social function scores. Overall accuracy was higher for HC relative to SZ, consistent with prior research. Across groups, higher relational complexity reduced analogical responding, as did the presence of non-living items. Separate group analyses revealed that the ASD group was less accurate at making relational inferences in problems that involved mainly non-living items and when distractors were present. The SZ group showed differences in problem type similar to the ASD group. Additionally, we found significant correlations between social cognitive ability and analogical reasoning, particularly for the SZ group. These results indicate that differences in cognitive and social abilities impact the ability to infer analogical correspondences along with numbers of relational elements and types of objects present in the problems. PMID:25191240

  20. A Reconfigurable Readout Integrated Circuit for Heterogeneous Display-Based Multi-Sensor Systems

    Directory of Open Access Journals (Sweden)

    Kyeonghwan Park

    2017-04-01

    Full Text Available This paper presents a reconfigurable multi-sensor interface and its readout integrated circuit (ROIC for display-based multi-sensor systems, which builds up multi-sensor functions by utilizing touch screen panels. In addition to inherent touch detection, physiological and environmental sensor interfaces are incorporated. The reconfigurable feature is effectively implemented by proposing two basis readout topologies of amplifier-based and oscillator-based circuits. For noise-immune design against various noises from inherent human-touch operations, an alternate-sampling error-correction scheme is proposed and integrated inside the ROIC, achieving a 12-bit resolution of successive approximation register (SAR of analog-to-digital conversion without additional calibrations. A ROIC prototype that includes the whole proposed functions and data converters was fabricated in a 0.18 μm complementary metal oxide semiconductor (CMOS process, and its feasibility was experimentally verified to support multiple heterogeneous sensing functions of touch, electrocardiogram, body impedance, and environmental sensors.

  1. Are all analogies created equal? Prefrontal cortical functioning may predict types of analogical reasoning.

    Science.gov (United States)

    Chrysikou, Evangelia G; Thompson-Schill, Sharon L

    2010-06-01

    Abstract The proposed theory can account for analogies based on learned relationships between elements in the source and target domains. However, its explanatory power regarding the discovery of new relationships during analogical reasoning is limited. We offer an alternative perspective for the role of PFC in analogical thought that may better address different types of analogical mappings.

  2. An Analog-Digital Mixed Measurement Method of Inductive Proximity Sensor

    Directory of Open Access Journals (Sweden)

    Yi-Xin Guo

    2015-12-01

    Full Text Available Inductive proximity sensors (IPSs are widely used in position detection given their unique advantages. To address the problem of temperature drift, this paper presents an analog-digital mixed measurement method based on the two-dimensional look-up table. The inductance and resistance components can be separated by processing the measurement data, thus reducing temperature drift and generating quantitative outputs. This study establishes and implements a two-dimensional look-up table that reduces the online computational complexity through structural modeling and by conducting an IPS operating principle analysis. This table is effectively compressed by considering the distribution characteristics of the sample data, thus simplifying the processing circuit. Moreover, power consumption is reduced. A real-time, built-in self-test (BIST function is also designed and achieved by analyzing abnormal sample data. Experiment results show that the proposed method obtains the advantages of both analog and digital measurements, which are stable, reliable, and taken in real time, without the use of floating-point arithmetic and process-control-based components. The quantitative output of displacement measurement accelerates and stabilizes the system control and detection process. The method is particularly suitable for meeting the high-performance requirements of the aviation and aerospace fields.

  3. The front-end analog and digital signal processing electronics for the drift chambers of the Stanford Large Detector

    International Nuclear Information System (INIS)

    Haller, G.M.; Freytag, D.R.; Fox, J.; Olsen, J.; Paffrath, L.; Yim, A.; Honma, A.

    1990-10-01

    The front-end signal processing electronics for the drift-chambers of the Stanford Large Detector (SLD) at the Stanford Linear Collider is described. The system is implemented with printed-circuit boards which are shaped for direct mounting on the detector. Typically, a motherboard comprises 64 channels of transimpedance amplification and analog waveform sampling, A/D conversion, and associated control and readout circuitry. The loaded motherboard thus forms a processor which records low-level wave forms from 64 detector channels and transforms the information into a 64 k-byte serial data stream. In addition, the package performs calibration functions, measures leakage currents on the wires, and generates wire hit patterns for triggering purposes. The construction and operation of the electronic circuits utilizing monolithic, hybridized, and programmable components are discussed

  4. Measuring ac losses in superconducting cables using a resonant circuit:Resonant current experiment (RESCUE)

    DEFF Research Database (Denmark)

    Däumling, Manfred; Olsen, Søren Krüger; Rasmussen, Carsten

    1998-01-01

    be recorded using, for example, a digital oscilloscope. The amplitude decay of the periodic voltage or current accurately reflects the power loss in the system. It consists of two components-an ohmic purely exponential one (from leads, contacts, etc.), and a nonexponential component originating from......A simple way to obtain true ac losses with a resonant circuit containing a superconductor, using the decay of the circuit current, is described. For the measurement a capacitor is short circuited with a superconducting cable. Energy in the circuit is provided by either charging up the capacitors...... with a certain voltage, or letting a de flow in the superconductor. When the oscillations are started-either by opening a switch in case a de is flowing or by closing a switch to connect the charged capacitors with the superconductor-the current (via a Rogowski coil) or the voltage on the capacitor can...

  5. A Physics-Based Engineering Methodology for Calculating Soft Error Rates of Bulk CMOS and SiGe Heterojunction Bipolar Transistor Integrated Circuits

    Science.gov (United States)

    Fulkerson, David E.

    2010-02-01

    This paper describes a new methodology for characterizing the electrical behavior and soft error rate (SER) of CMOS and SiGe HBT integrated circuits that are struck by ions. A typical engineering design problem is to calculate the SER of a critical path that commonly includes several circuits such as an input buffer, several logic gates, logic storage, clock tree circuitry, and an output buffer. Using multiple 3D TCAD simulations to solve this problem is too costly and time-consuming for general engineering use. The new and simple methodology handles the problem with ease by simple SPICE simulations. The methodology accurately predicts the measured threshold linear energy transfer (LET) of a bulk CMOS SRAM. It solves for circuit currents and voltage spikes that are close to those predicted by expensive 3D TCAD simulations. It accurately predicts the measured event cross-section vs. LET curve of an experimental SiGe HBT flip-flop. The experimental cross section vs. frequency behavior and other subtle effects are also accurately predicted.

  6. An Improved Zero Potential Circuit for Readout of a Two-Dimensional Resistive Sensor Array.

    Science.gov (United States)

    Wu, Jian-Feng; Wang, Feng; Wang, Qi; Li, Jian-Qing; Song, Ai-Guo

    2016-12-06

    With one operational amplifier (op-amp) in negative feedback, the traditional zero potential circuit could access one element in the two-dimensional (2-D) resistive sensor array with the shared row-column fashion but it suffered from the crosstalk problem for the non-scanned elements' bypass currents, which were injected into array's non-scanned electrodes from zero potential. Firstly, for suppressing the crosstalk problem, we designed a novel improved zero potential circuit with one more op-amp in negative feedback to sample the total bypass current and calculate the precision resistance of the element being tested (EBT) with it. The improved setting non-scanned-electrode zero potential circuit (S-NSE-ZPC) was given as an example for analyzing and verifying the performance of the improved zero potential circuit. Secondly, in the S-NSE-ZPC and the improved S-NSE-ZPC, the effects of different parameters of the resistive sensor arrays and their readout circuits on the EBT's measurement accuracy were simulated with the NI Multisim 12. Thirdly, part features of the improved circuit were verified with the experiments of a prototype circuit. Followed, the results were discussed and the conclusions were given. The experiment results show that the improved circuit, though it requires one more op-amp, one more resistor and one more sampling channel, can access the EBT in the 2-D resistive sensor array more accurately.

  7. Three-dimensional multi-terminal superconductive integrated circuit inductance extraction

    International Nuclear Information System (INIS)

    Fourie, Coenrad J; Wetzstein, Olaf; Kunert, Jürgen; Ortlepp, Thomas

    2011-01-01

    Accurate inductance calculations are critical for the design of both digital and analogue superconductive integrated circuits, and three-dimensional calculations are gaining importance with the advent of inductive biasing, inductive coupling and sky plane shielding for RSFQ cells. InductEx, an extraction programme based on the three-dimensional calculation software FastHenry, was proposed earlier. InductEx uses segmentation techniques designed to accurately model the geometries of superconductive integrated circuit structures. Inductance extraction for complex multi-terminal three-dimensional structures from current distributions calculated by FastHenry is discussed. Results for both a reflection plane modelling an infinite ground plane and a finite segmented ground plane that allows inductive elements to extend over holes in the ground plane are shown. Several SQUIDs were designed for and fabricated with IPHT's 1 kA cm −2 RSFQ1D niobium process. These SQUIDs implement a number of loop structures that span different layers, include vias, inductively coupled control lines and ground plane holes. We measured the loop inductance of these SQUIDs and show how the results are used to calibrate the layer parameters in InductEx and verify the extraction accuracy. We also show that, with proper modelling, FastHenry can be fast enough to be used for the extraction of typical RSFQ cell inductances.

  8. Processing and Prolonged 500 C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect

    Science.gov (United States)

    Spry, David J.; Neudeck, Philip G.; Chen, Liangyu; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.; Krasowski, Michael J.; Prokop, Norman F.

    2015-01-01

    Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype IC's with two levels of metal interconnect capable of prolonged operation at 500 C. Packaged functional circuits including 3- and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 C. A 3-stage oscillator functioned for over 3000 hours at 500 C in air ambient. Improved reproducibility remains to be accomplished.

  9. Coexistence of multiple attractors and crisis route to chaos in a novel memristive diode bidge-based Jerk circuit

    International Nuclear Information System (INIS)

    Njitacke, Z.T.; Kengne, J.; Fotsin, H.B.; Negou, A. Nguomkam; Tchiotsop, D.

    2016-01-01

    In the present paper, a new memristor based oscillator is obtained from the autonomous Jerk circuit [Kengne et al., Nonlinear Dynamics (2016) 83: 751̶765] by substituting the nonlinear element of the original circuit with a first order memristive diode bridge. The model is described by a continuous time four-dimensional autonomous system with smooth nonlinearities. Various nonlinear analysis tools such as phase portraits, time series, bifurcation diagrams, Poincaré section and the spectrum of Lyapunov exponents are exploited to characterize different scenarios to chaos in the novel circuit. It is found that the system experiences period doubling and crisis routes to chaos. One of the major results of this work is the finding of a window in the parameters’ space in which the circuit develops hysteretic behaviors characterized by the coexistence of four different (periodic and chaotic) attractors for the same values of the system parameters. Basins of attractions of various coexisting attractors are plotted showing complex basin boundaries. As far as the authors’ knowledge goes, the novel memristive jerk circuit represents one of the simplest electrical circuits (no analog multiplier chip is involved) capable of four disconnected coexisting attractors reported to date. Both PSpice simulations of the nonlinear dynamics of the oscillator and laboratory experimental measurements are carried out to validate the theoretical analysis.

  10. How to Implement an Experimental Course on Analog IC design in a Standard Semester Schedule

    DEFF Research Database (Denmark)

    Jørgensen, Ivan Harald Holger; Marker-Villumsen, Niels

    2013-01-01

    how the sequences of courses in integrated analog electronics at the Technical University of Denmark have been modified to enable this. It is outlined how a course can be designed using the three elements in constructive alignment: intended learning objectives, teaching activities and assessment....... As an example it is described in detail how a new course is designed. The course is the first of two new courses and the scope of the course is to teach the students the flow an IC designer has to go through when designing analog circuits. Additionally the course has a large focus on strengthening the generic...... engineering competences of the students. This is achieved by running the course as a project in a company with status meetings and a review meeting where the teacher acts as a manager. Finally, the course evaluation based on the Course Evaluation Questionnaire (CEQ) is presented and based on this future...

  11. Analogical Reasoning in Geometry Education

    Science.gov (United States)

    Magdas, Ioana

    2015-01-01

    The analogical reasoning isn't used only in mathematics but also in everyday life. In this article we approach the analogical reasoning in Geometry Education. The novelty of this article is a classification of geometrical analogies by reasoning type and their exemplification. Our classification includes: analogies for understanding and setting a…

  12. Defects influence on short circuit current density in p-i-n silicon solar cell

    International Nuclear Information System (INIS)

    Wagah F Mohamad; Alhan M Mustafa

    2006-01-01

    The admittance analysis method has been used to calculate the collection efficiency and the short circuit current density in a-Si:H p-i-n solar cell, as a function of the thickness of i-layer. Its is evident that the results of the short circuit current can be used to determine the optimal thickness of the i-layer of a cell, and it will be more accurate in comparison with the previous studies using a constant generation rate or an empirical exponential function for the generation of charge carriers throughout the i-layer

  13. Neuromimetic Circuits with Synaptic Devices Based on Strongly Correlated Electron Systems

    Science.gov (United States)

    Ha, Sieu D.; Shi, Jian; Meroz, Yasmine; Mahadevan, L.; Ramanathan, Shriram

    2014-12-01

    Strongly correlated electron systems such as the rare-earth nickelates (R NiO3 , R denotes a rare-earth element) can exhibit synapselike continuous long-term potentiation and depression when gated with ionic liquids; exploiting the extreme sensitivity of coupled charge, spin, orbital, and lattice degrees of freedom to stoichiometry. We present experimental real-time, device-level classical conditioning and unlearning using nickelate-based synaptic devices in an electronic circuit compatible with both excitatory and inhibitory neurons. We establish a physical model for the device behavior based on electric-field-driven coupled ionic-electronic diffusion that can be utilized for design of more complex systems. We use the model to simulate a variety of associate and nonassociative learning mechanisms, as well as a feedforward recurrent network for storing memory. Our circuit intuitively parallels biological neural architectures, and it can be readily generalized to other forms of cellular learning and extinction. The simulation of neural function with electronic device analogs may provide insight into biological processes such as decision making, learning, and adaptation, while facilitating advanced parallel information processing in hardware.

  14. Simulation and experimental study on lithium ion battery short circuit

    International Nuclear Information System (INIS)

    Zhao, Rui; Liu, Jie; Gu, Junjie

    2016-01-01

    Highlights: • Both external and internal short circuit tests were performed on Li-ion batteries. • An electrochemical–thermal model with an additional nail site heat source is presented. • The model can accurately simulate the temperature variations of non-venting batteries. • The model is reliable in predicting the occurrence and start time of thermal runaway. • A hydrogel cooling system proves its strength in preventing battery thermal runaway. - Abstract: Safety is the first priority in lithium ion (Li-ion) battery applications. A large portion of electrical and thermal hazards caused by Li-ion battery is associated with short circuit. In this paper, both external and internal short circuit tests are conducted. Li-ion batteries and battery packs of different capacities are used. The results indicate that external short circuit is worse for smaller size batteries due to their higher internal resistances, and this type of short can be well managed by assembling fuses. In internal short circuit tests, higher chance of failure is found on larger capacity batteries. A modified electrochemical–thermal model is proposed, which incorporates an additional heat source from nail site and proves to be successful in depicting temperature changes in batteries. Specifically, the model is able to estimate the occurrence and approximate start time of thermal runaway. Furthermore, the effectiveness of a hydrogel based thermal management system in suppressing thermal abuse and preventing thermal runaway propagation is verified through the external and internal short tests on batteries and battery packs.

  15. Heterostructure-based high-speed/high-frequency electronic circuit applications

    Science.gov (United States)

    Zampardi, P. J.; Runge, K.; Pierson, R. L.; Higgins, J. A.; Yu, R.; McDermott, B. T.; Pan, N.

    1999-08-01

    With the growth of wireless and lightwave technologies, heterostructure electronic devices are commodity items in the commercial marketplace [Browne J. Power-amplifier MMICs drive commercial circuits. Microwaves & RF, 1998. p. 116-24.]. In particular, HBTs are an attractive device for handset power amplifiers at 900 MHz and 1.9 GHz for CDMA applications [Lum E. GaAs technology rides the wireless wave. Proceedings of the 1997 GaAs IC Symposium, 1997. p. 11-13; "Rockwell Ramps Up". Compound Semiconductor, May/June 1997.]. At higher frequencies, both HBTs and p-HEMTs are expected to dominate the marketplace. For high-speed lightwave circuit applications, heterostructure based products on the market for OC-48 (2.5 Gb/s) and OC-192 (10 Gb/s) are emerging [http://www.nb.rockwell.com/platforms/network_access/nahome.html#5.; http://www.nortel.com/technology/opto/receivers/ptav2.html.]. Chips that operate at 40 Gb/ have been demonstrated in a number of research laboratories [Zampardi PJ, Pierson RL, Runge K, Yu R, Beccue SM, Yu J, Wang KC. hybrid digital/microwave HBTs for >30 Gb/s optical communications. IEDM Technical Digest, 1995. p. 803-6; Swahn T, Lewin T, Mokhtari M, Tenhunen H, Walden R, Stanchina W. 40 Gb/s 3 Volt InP HBT ICs for a fiber optic demonstrator system. Proceedings of the 1996 GaAs IC Symposium, 1996. p. 125-8; Suzuki H, Watanabe K, Ishikawa K, Masuda H, Ouchi K, Tanoue T, Takeyari R. InP/InGaAs HBT ICs for 40 Gbit/s optical transmission systems. Proceedings of the 1997 GaAs IC Symposium, 1997. p. 215-8]. In addition to these two markets, another area where heterostructure devices are having significant impact is for data conversion [Walden RH. Analog-to digital convertor technology comparison. Proceedings of the 1994 GaAs IC Symposium, 1994. p. 217-9; Poulton K, Knudsen K, Corcoran J, Wang KC, Nubling RB, Chang M-CF, Asbeck PM, Huang RT. A 6-b, 4 GSa/s GaAs HBT ADC. IEEE J Solid-State Circuits 1995;30:1109-18; Nary K, Nubling R, Beccue S, Colleran W

  16. Meat analog: a review.

    Science.gov (United States)

    Malav, O P; Talukder, S; Gokulakrishnan, P; Chand, S

    2015-01-01

    The health-conscious consumers are in search of nutritious and convenient food item which can be best suited in their busy life. The vegetarianism is the key for the search of such food which resembles the meat in respect of nutrition and sensory characters, but not of animal origin and contains vegetable or its modified form, this is the point when meat analog evolved out and gets shape. The consumers gets full satisfaction by consumption of meat analog due to its typical meaty texture, appearance and the flavor which are being imparted during the skilled production of meat analog. The supplement of protein in vegetarian diet through meat alike food can be fulfilled by incorporating protein-rich vegetative food grade materials in meat analog and by adopting proper technological process which can promote the proper fabrication of meat analog with acceptable meat like texture, appearance, flavor, etc. The easily available vegetables, cereals, and pulses in India have great advantages and prospects to be used in food products and it can improve the nutritional and functional characters of the food items. The various form and functional characters of food items are available world over and attracts the meat technologists and the food processors to bring some innovativeness in meat analog and its presentation and marketability so that the acceptability of meat analog can be overgrown by the consumers.

  17. Circuit analysis for dummies

    CERN Document Server

    Santiago, John

    2013-01-01

    Circuits overloaded from electric circuit analysis? Many universities require that students pursuing a degree in electrical or computer engineering take an Electric Circuit Analysis course to determine who will ""make the cut"" and continue in the degree program. Circuit Analysis For Dummies will help these students to better understand electric circuit analysis by presenting the information in an effective and straightforward manner. Circuit Analysis For Dummies gives you clear-cut information about the topics covered in an electric circuit analysis courses to help

  18. Multi-Objective Optimization in Physical Synthesis of Integrated Circuits

    CERN Document Server

    A Papa, David

    2013-01-01

    This book introduces techniques that advance the capabilities and strength of modern software tools for physical synthesis, with the ultimate goal to improve the quality of leading-edge semiconductor products.  It provides a comprehensive introduction to physical synthesis and takes the reader methodically from first principles through state-of-the-art optimizations used in cutting edge industrial tools. It explains how to integrate chip optimizations in novel ways to create powerful circuit transformations that help satisfy performance requirements. Broadens the scope of physical synthesis optimization to include accurate transformations operating between the global and local scales; Integrates groups of related transformations to break circular dependencies and increase the number of circuit elements that can be jointly optimized to escape local minima;  Derives several multi-objective optimizations from first observations through complete algorithms and experiments; Describes integrated optimization te...

  19. Digital and analog communication systems

    Science.gov (United States)

    Shanmugam, K. S.

    1979-01-01

    The book presents an introductory treatment of digital and analog communication systems with emphasis on digital systems. Attention is given to the following topics: systems and signal analysis, random signal theory, information and channel capacity, baseband data transmission, analog signal transmission, noise in analog communication systems, digital carrier modulation schemes, error control coding, and the digital transmission of analog signals.

  20. An Investigation of Reasoning by Analogy in Schizophrenia and Autism Spectrum Disorder

    Directory of Open Access Journals (Sweden)

    Daniel C Krawczyk

    2014-08-01

    Full Text Available Relational reasoning ability relies upon by both cognitive and social factors. We compared analogical reasoning performance in healthy controls (HC to performance in individuals with Autism Spectrum Disorder (ASD, and individuals with schizophrenia (SZ. The experimental task required participants to find correspondences between drawings of scenes. Participants were asked to infer which item within one scene best matched a relational item within the second scene. We varied relational complexity, presence of distraction, and type of objects in the analogies (living or non-living items. We hypothesized that the cognitive differences present in SZ would reduce relational inferences relative to ASD and HC. We also hypothesized that both SZ and ASD would show lower performance on living item problems relative to HC due to lower social function scores. Overall accuracy was higher for HC relative to SZ, consistent with prior research. Across groups, higher relational complexity reduced analogical responding, as did the presence of non-living items. Separate group analyses revealed that the ASD group was less accurate at making relational inferences in problems that involved mainly non-living items and when distractors were present. The SZ group showed differences in problem type similar to the ASD group. Additionally, we found significant correlations between social cognitive ability and analogical reasoning, particularly for the SZ group. These results indicate that differences in cognitive and social abilities impact the ability to infer analogical correspondences along with numbers of relational elements and types of objects present in the problems.

  1. Current limiter circuit system

    Science.gov (United States)

    Witcher, Joseph Brandon; Bredemann, Michael V.

    2017-09-05

    An apparatus comprising a steady state sensing circuit, a switching circuit, and a detection circuit. The steady state sensing circuit is connected to a first, a second and a third node. The first node is connected to a first device, the second node is connected to a second device, and the steady state sensing circuit causes a scaled current to flow at the third node. The scaled current is proportional to a voltage difference between the first and second node. The switching circuit limits an amount of current that flows between the first and second device. The detection circuit is connected to the third node and the switching circuit. The detection circuit monitors the scaled current at the third node and controls the switching circuit to limit the amount of the current that flows between the first and second device when the scaled current is greater than a desired level.

  2. The impact of semantic distance and induced stress on analogical reasoning: a neurocomputational account.

    Science.gov (United States)

    Vendetti, Michael; Knowlton, Barbara J; Holyoak, Keith J

    2012-12-01

    In a study of reasoning with four-term verbal analogy problems, we explored the relationship between the effects of an acute, mild stressor and the complexity of the reasoning process. Participants judged whether analogy problems in the form A:B :: C:D were valid or invalid, on the basis of whether the relation in the A:B term matched that in the C:D term. Half of the problems contained a C:D pair semantically near the A:B pair (e.g., NOSE:SCENT :: TONGUE:TASTE), and the other half contained ones semantically far from A:B (e.g., NOSE:SCENT :: ANTENNA:SIGNAL). After an initial block without stress, participants were randomly assigned to count backward by 13 s from 1,000 while being told to go faster, or to count forward by 1 s from 0. The stress-induced participants reported a significant increase in state anxiety as compared to controls immediately after the mental arithmetic task. Stressed participants performed less accurately (as measured by d') on both near and far analogy problems, mainly due to an increase in false alarms. We were able to model the influence of semantic distance using the "learning and inference with schemas and analogies" (LISA) model. Our findings indicated that even mild increases in stress impair analogical reasoning. However, the decrement does not seem to directly involve the integration of relations, but rather is due to a shift in decision strategy: Under stress, people show an increased tendency to endorse analogies as valid when the terms in the individual pairs are semantically related to each other, even if the overall analogical relationship is not valid.

  3. The voltage—current relationship and equivalent circuit implementation of parallel flux-controlled memristive circuits

    International Nuclear Information System (INIS)

    Bao Bo-Cheng; Feng Fei; Dong Wei; Pan Sai-Hu

    2013-01-01

    A flux-controlled memristor characterized by smooth cubic nonlinearity is taken as an example, upon which the voltage—current relationships (VCRs) between two parallel memristive circuits — a parallel memristor and capacitor circuit (the parallel MC circuit), and a parallel memristor and inductor circuit (the parallel ML circuit) — are investigated. The results indicate that the VCR between these two parallel memristive circuits is closely related to the circuit parameters, and the frequency and amplitude of the sinusoidal voltage stimulus. An equivalent circuit model of the memristor is built, upon which the circuit simulations and experimental measurements of both the parallel MC circuit and the parallel ML circuit are performed, and the results verify the theoretical analysis results

  4. Design and characterization of radiation resistant integrated circuits for the LHC particle detectors using deep sub-micron CMOS technologies

    International Nuclear Information System (INIS)

    Anelli, Giovanni Maria

    2000-01-01

    The electronic circuits associated with the particle detectors of the CERN Large Hadron Collider (LHC) have to work in a highly radioactive environment. This work proposes a methodology allowing the design of radiation resistant integrated circuits using the commercial sub-micron CMOS technology. This method uses the intrinsic radiation resistance of ultra-thin grid oxides, the technology of enclosed layout transistors (ELT), and the protection rings to avoid the radio-induced creation of leakage currents. In order to check the radiation tolerance level, several test structures have been designed and tested with different radiation sources. These tests have permitted to study the physical phenomena responsible for the damages induced by the radiations and the possible remedies. Then, the particular characteristics of ELT transistors and their influence on the design of complex integrated circuits has been explored. The modeling of the W/L ratio, the asymmetries (for instance in the output conductance) and the performance of ELT couplings have never been studied yet. The noise performance of the 0.25 μ CMOS technology, used in the design of several integrated circuits of the LHC detectors, has been characterized before and after irradiation. Finally, two integrated circuits designed using the proposed method are presented. The first one is an analogic memory and the other is a circuit used for the reading of the signals of one of the LHC detectors. Both circuits were irradiated and have endured very high doses practically without any sign of performance degradation. (J.S.)

  5. Children's Development of Analogical Reasoning: Insights from Scene Analogy Problems

    Science.gov (United States)

    Richland, Lindsey E.; Morrison, Robert G.; Holyoak, Keith J.

    2006-01-01

    We explored how relational complexity and featural distraction, as varied in scene analogy problems, affect children's analogical reasoning performance. Results with 3- and 4-year-olds, 6- and 7-year-olds, 9- to 11-year-olds, and 13- and 14-year-olds indicate that when children can identify the critical structural relations in a scene analogy…

  6. An Improved Zero Potential Circuit for Readout of a Two-Dimensional Resistive Sensor Array

    Directory of Open Access Journals (Sweden)

    Jian-Feng Wu

    2016-12-01

    Full Text Available With one operational amplifier (op-amp in negative feedback, the traditional zero potential circuit could access one element in the two-dimensional (2-D resistive sensor array with the shared row-column fashion but it suffered from the crosstalk problem for the non-scanned elements’ bypass currents, which were injected into array’s non-scanned electrodes from zero potential. Firstly, for suppressing the crosstalk problem, we designed a novel improved zero potential circuit with one more op-amp in negative feedback to sample the total bypass current and calculate the precision resistance of the element being tested (EBT with it. The improved setting non-scanned-electrode zero potential circuit (S-NSE-ZPC was given as an example for analyzing and verifying the performance of the improved zero potential circuit. Secondly, in the S-NSE-ZPC and the improved S-NSE-ZPC, the effects of different parameters of the resistive sensor arrays and their readout circuits on the EBT’s measurement accuracy were simulated with the NI Multisim 12. Thirdly, part features of the improved circuit were verified with the experiments of a prototype circuit. Followed, the results were discussed and the conclusions were given. The experiment results show that the improved circuit, though it requires one more op-amp, one more resistor and one more sampling channel, can access the EBT in the 2-D resistive sensor array more accurately.

  7. Voltage linear transformation circuit design

    Science.gov (United States)

    Sanchez, Lucas R. W.; Jin, Moon-Seob; Scott, R. Phillip; Luder, Ryan J.; Hart, Michael

    2017-09-01

    Many engineering projects require automated control of analog voltages over a specified range. We have developed a computer interface comprising custom hardware and MATLAB code to provide real-time control of a Thorlabs adaptive optics (AO) kit. The hardware interface includes an op amp cascade to linearly shift and scale a voltage range. With easy modifications, any linear transformation can be accommodated. In AO applications, the design is suitable to drive a range of different types of deformable and fast steering mirrors (FSM's). Our original motivation and application was to control an Optics in Motion (OIM) FSM which requires the customer to devise a unique interface to supply voltages to the mirror controller to set the mirror's angular deflection. The FSM is in an optical servo loop with a wave front sensor (WFS), which controls the dynamic behavior of the mirror's deflection. The code acquires wavefront data from the WFS and fits a plane, which is subsequently converted into its corresponding angular deflection. The FSM provides +/-3° optical angular deflection for a +/-10 V voltage swing. Voltages are applied to the mirror via a National Instruments digital-to-analog converter (DAC) followed by an op amp cascade circuit. This system has been integrated into our Thorlabs AO testbed which currently runs at 11 Hz, but with planned software upgrades, the system update rate is expected to improve to 500 Hz. To show that the FSM subsystem is ready for this speed, we conducted two different PID tuning runs at different step commands. Once 500 Hz is achieved, we plan to make the code and method for our interface solution freely available to the community.

  8. Spectral Mixing in Nervous Systems: Experimental Evidenceand Biologically Plausible Circuits

    Science.gov (United States)

    Kleinfeld, D.; Mehta, S. B.

    The ability to compute the difference frequency for two periodic signals depends on a nonlinear operation that mixes those signals. Behavioral and psychophysical evidence suggest that such mixing is likely to occur in the vertebrate nervous system as a means to compare rhythmic sensory signals, such as occurs in human audition, and as a means to lock an intrinsic rhythm to a sensory input. Electrophysiological data from electroreceptors in the immobilized electric fish and somatosensory cortex in the anesthetized rat yield direct evidence for such mixing, providing a neurological substrate for the modulation and demodulation of rhythmic neuronal signals. We consider an analytical model of spectral mixing that makes use of the threshold characteristics of neuronal firing and which has features consistent with the experimental observations. This model serves as a guide for constructing circuits that isolate given mixture components. In particular, such circuits can generate nearly pure difference tones from sinusoidal inputs without the use of band-pass filters, in analogy to an image-reject mixer in communications engineering. We speculate that such computations may play a role in coding of sensory input and feedback stabilization of motor output in nervous systems.

  9. 30 CFR 75.518 - Electric equipment and circuits; overload and short circuit protection.

    Science.gov (United States)

    2010-07-01

    ... short circuit protection. 75.518 Section 75.518 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... Equipment-General § 75.518 Electric equipment and circuits; overload and short circuit protection... installed so as to protect all electric equipment and circuits against short circuit and overloads. Three...

  10. Hydraulic Capacitor Analogy

    Science.gov (United States)

    Baser, Mustafa

    2007-01-01

    Students have difficulties in physics because of the abstract nature of concepts and principles. One of the effective methods for overcoming students' difficulties is the use of analogies to visualize abstract concepts to promote conceptual understanding. According to Iding, analogies are consistent with the tenets of constructivist learning…

  11. VHDL-AMS Simulation Framework for Molecular-FET Device-to-Circuit Modeling and Design

    Directory of Open Access Journals (Sweden)

    Mariagrazia Graziano

    2018-01-01

    Full Text Available We concentrate on Molecular-FET as a device and present a new modular framework based on VHDL-AMS. We have implemented different Molecular-FET models within the framework. The framework allows comparison between the models in terms of the capability to calculate accurate I-V characteristics. It also provides the option to analyze the impact of Molecular-FET and its implementation in the circuit with the extension of its use in an architecture based on the crossbar configuration. This analysis evidences the effect of choices of technological parameters, the ability of models to capture the impact of physical quantities, and the importance of considering defects at circuit fabrication level. The comparison tackles the computational efforts of different models and techniques and discusses the trade-off between accuracy and performance as a function of the circuit analysis final requirements. We prove this methodology using three different models and test them on a 16-bit tree adder included in Pentium 4 that, to the best of our knowledge, is the biggest circuits based on molecular device ever designed and analyzed.

  12. Analog fourier transform channelizer and OFDM receiver

    OpenAIRE

    2007-01-01

    An OFDM receiver having an analog multiplier based I-Q channelizing filter, samples and holds consecutive analog I-Q samples of an I-Q baseband, the I-Q basebands having OFDM sub-channels. A lattice of analog I-Q multipliers and analog I-Q summers concurrently receives the held analog I-Q samples, performs analog I-Q multiplications and analog I-Q additions to concurrently generate a plurality of analog I-Q output signals, representing an N-point discrete Fourier transform of the held analog ...

  13. CMOS analog baseband circuitry for an IEEE 802.11 b/g/n WLAN transceiver

    International Nuclear Information System (INIS)

    Gong Zheng; Chu Xiaojie; Shi Yin; Lei Qianqian; Lin Min

    2012-01-01

    An analog baseband circuit for a direct conversion wireless local area network (WLAN) transceiver in a standard 0.13-μm CMOS occupying 1.26 mm 2 is presented. The circuit consists of active-RC receiver (RX) 4th order elliptic lowpass filters(LPFs), transmit (PGAs) with DC offset cancellation (DCOC) servo loops, and on-chip output buffers. The RX baseband gain can be programmed in the range of −11 to 49 dB in 2 dB steps with 50–30.2 nV/√Hz input referred noise (IRN) and a 21 to −41 dBm in-band 3rd order interception point (IIP3). The RX/TX LPF cutoff frequencies can be switched between 5 MHz, 10 MHz, and 20 MHz to fulfill the multimode 802.11b/g/n requirements. The TX baseband gain of the I/Q paths are tuned separately from −1.6 to 0.9 dB in 0.1 dB steps to calibrate TX I/Q gain mismatches. By using an identical integrator based elliptic filter synthesis method together with global compensation applied to the LPF capacitor array, the power consumption of the RX LPF is considerably reduced and the proposed chip draws 26.8 mA/8 mA by the RX/TX baseband paths from a 1.2 V supply. (semiconductor integrated circuits)

  14. 30 CFR 77.506 - Electric equipment and circuits; overload and short-circuit protection.

    Science.gov (United States)

    2010-07-01

    ... short-circuit protection. 77.506 Section 77.506 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... circuits; overload and short-circuit protection. Automatic circuit-breaking devices or fuses of the correct type and capacity shall be installed so as to protect all electric equipment and circuits against short...

  15. A large dynamic range radiation-tolerant analog memory in a quarter- micron CMOS technology

    CERN Document Server

    Anelli, G; Rivetti, A

    2001-01-01

    An analog memory prototype containing 8*128 cells has been designed in a commercial quarter-micron CMOS process. The aim of this work is to investigate the possibility of designing large dynamic range mixed-mode switched capacitor circuits for high-energy physics (HEP) applications in deep submicron CMOS technologies. Special layout techniques have been used to make the circuit radiation tolerant. The memory cells employ gate-oxide capacitors for storage, permitting a very high density. A voltage write-voltage read architecture has been chosen to minimize the sensitivity to absolute capacitor values. The measured input voltage range is 2.3 V (the power supply voltage V/sub DD/ is equal to 2.5 V), with a linearity of almost 8 bits over 2 V. The dynamic range is more than 11 bits. The pedestal variation is +or-0.5 mV peak-to-peak. The noise measured, which is dominated by the noise of the measurement setup, is around 0.8 mV rms. The characteristics of the memory have been measured before irradiation and after 1...

  16. A large dynamic range radiation tolerant analog memory in a quarter micron CMOS technology

    CERN Document Server

    Anelli, G; Rivetti, A

    2000-01-01

    A 8*128 cell analog memory prototype has been designed in a commercial 0.25 jam CMOS process. The aim of this work was to investigate the possibility of designing large dynamic range mixed- mode switched capacitor circuits for High-Energy Physics (HEP) applications in deep submicron CMOS technologies. Special layout techniques have been used to make the circuit radiation tolerant left bracket 1 right bracket . The memory cells employ gate-oxide capacitors for storage, allowing for a very high density. A voltage write - voltage read architecture has been chosen to minimize the sensitivity to absolute capacitor values. The measured input voltage range is 2.3 V (V//D//D = 2.5 V), with a linearity of at least 7.5 bits over 2 V. The dynamic range is more than 11 bits. The pedestal variation is plus or minus 0.5 mV peak-to-peak. The noise measured, which is dominated by the noise of the measurement setup, is around 0.8 mV rms. The characteristics of the memory have been measured before irradiation and after lOMrd (...

  17. Compact electro-thermal modeling of a SiC MOSFET power module under short-circuit conditions

    DEFF Research Database (Denmark)

    Ceccarelli, Lorenzo; Reigosa, Paula Diaz; Bahman, Amir Sajjad

    2017-01-01

    A novel physics-based, electro-thermal model which is capable of estimating accurately the short-circuit behavior and thermal instabilities of silicon carbide MOSFET multi-chip power modules is proposed in this paper. The model has been implemented in PSpice and describes the internal structure.......2 kV breakdown voltage and about 300 A rated current. The short-circuit behavior of the module is investigated experimentally through a non-destructive test setup and the model is validated. The estimation of overcurrent and temperature distribution among the chips can provide useful information...

  18. Electrical characterization and an equivalent circuit model of a microhollow cathode discharge reactor

    International Nuclear Information System (INIS)

    Taylan, O.; Berberoglu, H.

    2014-01-01

    This paper reports the electrical characterization and an equivalent circuit of a microhollow cathode discharge (MHCD) reactor in the self-pulsing regime. A MHCD reactor was prototyped for air plasma generation, and its current-voltage characteristics were measured experimentally in the self-pulsing regime for applied voltages from 2000 to 3000 V. The reactor was modeled as a capacitor in parallel with a variable resistor. A stray capacitance was also introduced to the circuit model to represent the capacitance of the circuit elements in the experimental setup. The values of the resistor and capacitors were recovered from experimental data, and the proposed circuit model was validated with independent experiments. Experimental data showed that increasing the applied voltage increased the current, self-pulsing frequency and average power consumption of the reactor, while it decreased the peak voltage. The maximum and the minimum voltages obtained using the model were in agreement with the experimental data within 2.5%, whereas the differences between peak current values were less than 1%. At all applied voltages, the equivalent circuit model was able to accurately represent the peak and average power consumption as well as the self-pulsing frequency within the experimental uncertainty. Although the results shown in this paper was for atmospheric air pressures, the proposed equivalent circuit model of the MHCD reactor could be generalized for other gases at different pressures.

  19. Volumetric and chemical control auxiliary circuit for a PWR primary circuit

    International Nuclear Information System (INIS)

    Costes, D.

    1990-01-01

    The volumetric and chemical control circuit has an expansion tank with at least one water-steam chamber connected to the primary circuit by a sampling pipe and a reinjection pipe. The sampling pipe feeds jet pumps controlled by valves. An action on these valves and pumps regulates the volume of the water in the primary circuit. A safety pipe controlled by a flap automatically injects water from the chamber into the primary circuit in case of ruptures. The auxiliary circuit has also systems for purifying the water and controlling the boric acid and hydrogen content [fr

  20. A low-cost universal cumulative gating circuit for small and large animal clinical imaging

    Science.gov (United States)

    Gioux, Sylvain; Frangioni, John V.

    2008-02-01

    Image-assisted diagnosis and therapy is becoming more commonplace in medicine. However, most imaging techniques suffer from voluntary or involuntary motion artifacts, especially cardiac and respiratory motions, which degrade image quality. Current software solutions either induce computational overhead or reject out-of-focus images after acquisition. In this study we demonstrate a hardware-only gating circuit that accepts multiple, pseudo-periodic signals and produces a single TTL (0-5 V) imaging window of accurate phase and period. The electronic circuit Gerber files described in this article and the list of components are available online at www.frangionilab.org.