Efficient Algorithms for Optimal 4-Bit Reversible Logic System Synthesis
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Zhiqiang Li
2013-01-01
Full Text Available Owing to the exponential nature of the memory and run-time complexity, many methods can only synthesize 3-bit reversible circuits and cannot synthesize 4-bit reversible circuits well. We mainly absorb the ideas of our 3-bit synthesis algorithms based on hash table and present the efficient algorithms which can construct almost all optimal 4-bit reversible logic circuits with many types of gates and at mini-length cost based on constructing the shortest coding and the specific topological compression; thus, the lossless compression ratio of the space of n-bit circuits reaches near 2×n!. This paper presents the first work to create all 3120218828 optimal 4-bit reversible circuits with up to 8 gates for the CNT (Controlled-NOT gate, NOT gate, and Toffoli gate library, and it can quickly achieve 16 steps through specific cascading created circuits.
Optimization Approaches for Designing a Novel 4-Bit Reversible Comparator
Zhou, Ri-gui; Zhang, Man-qun; Wu, Qian; Li, Yan-cheng
2013-02-01
Reversible logic is a new rapidly developed research field in recent years, which has been receiving much attention for calculating with minimizing the energy consumption. This paper constructs a 4×4 new reversible gate called ZRQ gate to build quantum adder and subtraction. Meanwhile, a novel 1-bit reversible comparator by using the proposed ZRQC module on the basis of ZRQ gate is proposed as the minimum number of reversible gates and quantum costs. In addition, this paper presents a novel 4-bit reversible comparator based on the 1-bit reversible comparator. One of the vital important for optimizing reversible logic is to design reversible logic circuits with the minimum number of parameters. The proposed reversible comparators in this paper can obtain superiority in terms of the number of reversible gates, input constants, garbage outputs, unit delays and quantum costs compared with the existed circuits. Finally, MATLAB simulation software is used to test and verify the correctness of the proposed 4-bit reversible comparator.
Novel Parity-Preserving Designs of Reversible 4-Bit Comparator
Qi, Xue-mei; Chen, Fu-long; Wang, Hong-tao; Sun, Yun-xiang; Guo, Liang-min
2014-04-01
Reversible logic has attracted much attention in recent years especially when the calculation with minimum energy consumption is considered. This paper presents two novel approaches for designing reversible 4-bit comparator based on parity-preserving gates, which can detect any fault that affects no more than a single logic signal. In order to construct the comparator, three variable EX-OR gate (TVG), comparator gate (CPG), four variable EX-OR gate block (FVGB) and comparator gate block (CPGB) are designed, and they are parity-preserving and reversible. Their quantum equivalent implementations are also proposed. The design of two comparator circuits is completed by using existing reversible gates and the above new reversible circuits. All these comparators have been modeled and verified in Verilog hardware description language (Verilog HDL). The Quartus II simulation results indicate that their circuits' logic structures are correct. The comparative results are presented in terms of quantum cost, delay and garbage outputs.
Optimized 4-bit Quantum Reversible Arithmetic Logic Unit
Ayyoub, Slimani; Achour, Benslama
2017-08-01
Reversible logic has received a great attention in the recent years due to its ability to reduce the power dissipation. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. The arithmetic logic unit (ALU) is an important part of central processing unit (CPU) as the execution unit. This paper presents a complete design of a new reversible arithmetic logic unit (ALU) that can be part of a programmable reversible computing device such as a quantum computer. The proposed ALU based on a reversible low power control unit and small performance parameters full adder named double Peres gates. The presented ALU can produce the largest number (28) of arithmetic and logic functions and have the smallest number of quantum cost and delay compared with existing designs.
Reversible Logic Circuit Synthesis
Shende, V V; Markov, I L; Prasad, A K; Hayes, John P.; Markov, Igor L.; Prasad, Aditya K.; Shende, Vivek V.
2002-01-01
Reversible, or information-lossless, circuits have applications in digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requirement for quantum computation. We investigate the synthesis of reversible circuits that employ a minimum number of gates and contain no redundant input-output line-pairs (temporary storage channels). We propose new constructions for reversible circuits composed of NOT, Controlled-NOT, and TOFFOLI gates (the CNT gate library) based on permutation theory. A new algorithm is given to synthesize optimal reversible circuits using an arbitrary gate library. We also describe much faster heuristic algorithms. We also pursue applications of the proposed techniques to the synthesis of quantum circuits.
Sequential Polarity-Reversing Circuit
Labaw, Clayton C.
1994-01-01
Proposed circuit reverses polarity of electric power supplied to bidirectional dc motor, reversible electro-mechanical actuator, or other device operating in direction depending on polarity. Circuit reverses polarity each time power turned on, without need for additional polarity-reversing or direction signals and circuitry to process them.
Jiang, Homin; Yu, Chen-Yu; Kubo, Derek; Chen, Ming-Tang; Guzzino, Kim
2016-11-01
In this study, a 4 bit, 10 giga-samples-per-second analog-to-digital converter (ADC) printed circuit board assembly (PCBA) was designed, manufactured, and characterized for digitizing radio telescopes. For this purpose, an Adsantec ANST7120A-KMA flash ADC chip was used. Together with the field-programmable gate array platform, developed by the Collaboration for Astronomy Signal Processing and Electronics Research community, the PCBA enables data acquisition with a wide bandwidth and simplifies the intermediate frequency section. In the current version, the PCBA and the chip exhibit an analog bandwidth of 10 GHz (3 dB loss) and 20 GHz, respectively, which facilitates second, third, and even fourth Nyquist sampling. The following average performance parameters were obtained from the first and second Nyquist zones of the three boards: a spurious-free dynamic range of 31.35/30.45 dB, a signal-to-noise and distortion ratio of 22.95/21.83 dB, and an effective number of bits of 3.65/3.43, respectively.
一种4bit相位量化ADC电路分析%Study on a 4-bit Phase Quantization ADC Circuit
Institute of Scientific and Technical Information of China (English)
邹振杰; 陈明辉; 曲明
2011-01-01
The paper discusses and analyzes the difference between and the advantages of the various quantization modes of digital radio frequency memory （DRFM）, and introduces the architecture of a 4-bit phase quantization ADC. An implementation scheme of the main circuit modules of phase quantization ADC is presented and compared with the traditional method. Based on 0.13 um CMOS technology, the simulation indicates that this circuit can accomplish sampling and quantization at 1.2 GHz clock rate, the IBW is 250MHz, the phase accuracy is 0. 2LSB.%针对数字射频存储器（DRFM）量化方式的差异、优势和不同的应用范围，介绍相位量化模数转换器（ADC）的系统架构，提出相位量化ADC主要电路模块的一种实现方案，比较了该方案与传统方式的区别，并基于0．13pm互补型金属氧化物半导体场效应晶体管（CMOS）工艺模型进行仿真，仿真结果表明该芯片可在1．2GHz时钟速率下完成采样、量化，瞬时带宽可达250MHz，具有＋0．2LSB的相位精度。
Optimization of reversible sequential circuits
Sayem, Abu Sadat Md
2010-01-01
In recent years reversible logic has been considered as an important issue for designing low power digital circuits. It has voluminous applications in the present rising nanotechnology such as DNA computing, Quantum Computing, low power VLSI and quantum dot automata. In this paper we have proposed optimized design of reversible sequential circuits in terms of number of gates, delay and hardware complexity. We have designed the latches with a new reversible gate and reduced the required number of gates, garbage outputs, and delay and hardware complexity. As the number of gates and garbage outputs increase the complexity of reversible circuits, this design will significantly enhance the performance. We have proposed reversible D-latch and JK latch which are better than the existing designs available in literature.
Novel Design of a Nano-metric Fast 4*4 Reversible unsigned Wallace Multiplier Circuit
Directory of Open Access Journals (Sweden)
Ehsan PourAliAkbar
2015-12-01
Full Text Available One of the most promising technologies in designing low-power circuits is reversible computing. It is used in nanotechnology, quantum computing, quantum dot cellular automata (QCA, DNA computing, optical computing and in CMOS low-power designs. Since reversible logic is subject to certain restrictions (e.g. fan-out and feedback are not allowed, traditional synthesis methods are not applicable and specific methods have been developed. In this paper, we offer a Wallace 4*4 reversible multiplier circuits which have faster speed and lower complexity in comparison with the other multiplier circuits. This circuit performs better, regarding to the number of gates, garbage outputs and constant inputs work better than the same circuits. In this paper, Peres gate is used as HA and HNG gate is used as FA. We offer the best method to multiply two 4 bit numbers. These Nano-metric circuits can be used in very complex systems.
Delay Reduction in Optimized Reversible Multiplier Circuit
Directory of Open Access Journals (Sweden)
Mohammad Assarian
2012-01-01
Full Text Available In this study a novel reversible multiplier is presented. Reversible logic can play a significant role in computer domain. This logic can be applied in quantum computing, optical computing processing, DNA computing, and nanotechnology. One condition for reversibility of a computable model is that the number of input equate with the output. Reversible multiplier circuits are the circuits used frequently in computer system. For this reason, optimization in one reversible multiplier circuit can reduce its volume of hardware on one hand and increases the speed in a reversible system on the other hand. One of the important parameters that optimize a reversible circuit is reduction of delays in performance of the circuit. This paper investigates the performance characteristics of the gates, the circuits and methods of optimizing the performance of reversible multiplier circuits. Results showed that reduction of the reversible circuit layers has lead to improved performance due to the reduction of the propagation delay between input and output period. All the designs are in the nanometric scales.
An Approach to Simplify Reversible Logic Circuits
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Pabitra Roy
2012-09-01
Full Text Available Energy loss is one of the major problems in traditional irreversible circuits. For every bit of information loss kTln2 joules of heat is lost. In order to reduce the energy loss the concept of reversible logic circuits are introduced. Here we have described an algorithm for simplifying the reversible logic circuit and hence reduction of circuit cost and energy. The algorithm considers sub_circuit with respect to their number of lines and contiguous gates. The resulting sub_circuits are re-synthesized with smaller equivalent implementation. The process continues until circuit cost reaches good enough for Application or until a given computation budget has been exhausted. The circuit is constructed by NOT, CNOT and Toffoli gates only. By applying the algorithm and using the equivalent implementation we will get significant reduction of circuit cost and hence energy.
Rule-Based Optimization of Reversible Circuits
Arabzadeh, Mona; Zamani, Morteza Saheb
2010-01-01
Reversible logic has applications in various research areas including low-power design and quantum computation. In this paper, a rule-based optimization approach for reversible circuits is proposed which uses both negative and positive control Toffoli gates during the optimization. To this end, a set of rules for removing NOT gates and optimizing sub-circuits with common-target gates are proposed. To evaluate the proposed approach, the best-reported synthesized circuits and the results of a recent synthesis algorithm which uses both negative and positive controls are used. Our experiments reveal the potential of the proposed approach in optimizing synthesized circuits.
Depth-optimized reversible circuit synthesis
Arabzadeh, Mona; Saheb Zamani, Morteza; Sedighi, Mehdi; Saeedi, Mehdi
2013-04-01
In this paper, simultaneous reduction of circuit depth and synthesis cost of reversible circuits in quantum technologies with limited interaction is addressed. We developed a cycle-based synthesis algorithm which uses negative controls and limited distance between gate lines. To improve circuit depth, a new parallel structure is introduced in which before synthesis a set of disjoint cycles are extracted from the input specification and distributed into some subsets. The cycles of each subset are synthesized independently on different sets of ancillae. Accordingly, each disjoint set can be synthesized by different synthesis methods. Our analysis shows that the best worst-case synthesis cost of reversible circuits in the linear nearest neighbor architecture is improved by the proposed approach. Our experimental results reveal the effectiveness of the proposed approach to reduce cost and circuit depth for several benchmarks.
Synthesis of Fault Tolerant Reversible Logic Circuits
Islam, Md Saiful; Begum, Zerina; Hafiz, Mohd Zulfiquar; Mahmud, Abdullah Al; 10.1109/CAS-ICTD.2009.4960883
2010-01-01
Reversible logic is emerging as an important research area having its application in diverse fields such as low power CMOS design, digital signal processing, cryptography, quantum computing and optical information processing. This paper presents a new 4*4 universal reversible logic gate, IG. It is a parity preserving reversible logic gate, that is, the parity of the inputs matches the parity of the outputs. The proposed parity preserving reversible gate can be used to synthesize any arbitrary Boolean function. It allows any fault that affects no more than a single signal readily detectable at the circuit's primary outputs. Finally, it is shown how a fault tolerant reversible full adder circuit can be realized using only two IGs. It has also been demonstrated that the proposed design offers less hardware complexity and is efficient in terms of gate count, garbage outputs and constant inputs than the existing counterparts.
Transistor Level Implementation of Digital Reversible Circuits
Directory of Open Access Journals (Sweden)
K.Prudhvi Raj
2015-12-01
Full Text Available Now a days each and every electronic gadget is desi gning smartly and provides number of applications, so these designs dissipate high amount of power. Rever sible logic is becoming one of the best emerging de sign technologies having its applications in low power C MOS, Quantum computing and Nanotechnology. Reversible logic plays an important role in the des ign of energy efficient circuits. Adders and subtra ctors are the essential blocks of the computing systems. In this paper, reversible gates and circuits are de signed and implemented in CMOS and pass transistor logic u sing Mentor graphics backend tools. A four-bit ripp le carry adder/subtractor and an eight-bit reversible Carry Skip Adder are implemented and compared with the conventional circuits
Reversible and quantum circuits optimization and complexity analysis
Abdessaied, Nabila
2016-01-01
This book presents a new optimization flow for quantum circuits realization. At the reversible level, optimization algorithms are presented to reduce the quantum cost. Then, new mapping approaches to decompose reversible circuits to quantum circuits using different quantum libraries are described. Finally, optimization techniques to reduce the quantum cost or the delay are applied to the resulting quantum circuits. Furthermore, this book studies the complexity of reversible circuits and quantum circuits from a theoretical perspective.
Design of Reversible Sequential Circuit Using Reversible Logic Synthesis
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Md. Belayet Ali
2011-12-01
Full Text Available Reversible logic is one of the most vital issue at present time and it has different areas for its application,those are low power CMOS, quantum computing, nanotechnology, cryptography, optical computing, DNA computing, digital signal processing (DSP, quantum dot cellular auto meta, communication, computer graphics. It is not possible to realize quantum computing without implementation of reversible logic. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. In this paper, we have proposed a new reversible gate. And we have designed RS flip flop and D flip flop by using our proposed gate and Peres gate. The proposed designs are better than the existing proposed ones in terms of number of reversible gates and garbage outputs. So, this realization is more efficient and less costly than other realizations.
Design of Reversible Sequential Circuit Using Reversible Logic Synthesis
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Md. Mosharof Hossin
2012-01-01
Full Text Available Reversible logic is one of the most vital issue at present time and it has different areas for its application, those are low power CMOS, quantum computing, nanotechnology, cryptography, optical computing, DNA computing, digital signal processing (DSP, quantum dot cellular automata, communication, computer graphics. It is not possible to realize quantum computing without implementation of reversible logic. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. In this paper, we have proposed a new reversible gate. And we have designedRS flip flop and D flip flop by using our proposed gate and Peres gate. The proposed designs are better than the existing proposed ones in terms of number of reversible gates and garbage outputs. So, this realization is more efficient and less costly than other realizations.
Design of Asynchronous Sequential Circuits using Reversible Logic Gates
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Bahram Dehghan
2012-09-01
Full Text Available In recent literature, Reversible logic has become one of the promising arena in low power dissipating circuit design in the past few years and has found its applications in low power CMOS circuits ,optical information processing and nanotechnology. The reversible circuits form the basic building block of quantum computers as all quantum operations are reversible. This paper presents asynchronoussequential circuits and circuits without hazard effect using reversible logic gates. I illustrate that we can produce AND, OR, NAND, NOR, EXOR and EXNOR outputs in one design using reversible logic gates. Also, I will evaluate the proposed circuits. The results show that reversible logic can be used to design these circuits. In this paper, the number of gates and garbage outputs is considered.
Design of the Efficient Nanometric Reversible Subtractor Circuit
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Mozhgan Shiri
2012-11-01
Full Text Available Reversible logic has comprehensive applications in communications, quantum computing, low power VLSI design, computer graphics, cryptography, nanotechnology, and optical computing. It has received significant attention in low power dissipating circuit design in the past few years. While several researchers have inspected the design of reversible logic units, there is not much reported works on reversible subtractors. In this paper we proposed the quantum equivalent circuit for SRK gate and we have computed the quantum cost of SRK gate. We also showed that how SRK gate can work singly as a half-subtractor circuit. It is being tried to design the circuit optimal in terms of number of reversible gates, number of garbage outputs, number of constant inputs, and quantum cost with compared to the existing circuits. At last we proposed an implementation of the new full-subtractor circuit based on SRK gate. All the designs have nanometric scales.
A Novel Nanometric Fault Tolerant Reversible Subtractor Circuit
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Mozhgan Shiri
2012-11-01
Full Text Available Reversibility plays an important role when energy efficient computations are considered. Reversible logic circuits have received significant attention in quantum computing, low power CMOS design, optical information processing and nanotechnology in the recent years. This study proposes a new fault tolerant reversible half-subtractor and a new fault tolerant reversible full-subtractor circuit with nanometric scales. Also in this paper we demonstrate how the well-known and important, PERES gate and TR gate can be synthesized from parity preserving reversible gates. All the designs have nanometric scales.
Decting Errors in Reversible Circuits With Invariant Relationships
Alves, Nuno
2008-01-01
Reversible logic is experience renewed interest as we are approach the limits of CMOS technologies. While physical implementations of reversible gates have yet to materialize, it is safe to assume that they will rely on faulty individual components. In this work we present a present a method to provide fault tolerance to a reversible circuit based on invariant relationships.
Exploring Quantum Dot Cellular Automata Based Reversible Circuit
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Saroj Kumar Chandra
2012-03-01
Full Text Available Quantum-dot Cellular Automata (QCA is a new technology for development of logic circuits based on nanotechnology, and it is an one of the alternative for designing high performance computing over existing CMOS technology. The basic logic in QCA does not use voltage level for logic representation rather it represent binary state by polarization of electrons on the Quantum Cell which is basic building block of QCA. Extensive work is going on QCA for circuit design due to low power consumption and regularity in the circuit.. Clocking is used in QCA circuit to synchronize and control the information flow and to provide the power to run the circuit. Reversible logic design is a well-known paradigm in digital computation, and if circuit developed is reversible then it consumes very low power . Here, in this paper we are presenting a Reversible Universal Gate (RUG based on Quantum-dot Cellular Automata (QCA. The RUG implemented by QCA Designer tool and also its behavior is simulated by it.
Exploring Quantum Dot Cellular Automata Based Reversible Circuit
Directory of Open Access Journals (Sweden)
Saroj Kumar Chandra
2012-03-01
Full Text Available Quantum-dot Cellular Automata (QCA is a new technology for development of logic circuits based on nanotechnology, and it is an one of the alternative for designing high performance computing over existing CMOS technology. The basic logic in QCA does not use voltage level for logic representation rather it represent binary state by polarization of electrons on the Quantum Cell which is basic building block of QCA. Extensive work is going on QCA for circuit design due to low power consumption and regularity in the circuit.. Clocking is used in QCA circuit to synchronize and control the information flow and to provide the power to run the circuit. Reversible logic design is a well-known paradigm in digital computation, and if circuit developed is reversible then it consumes very low power. Here, in this paper we are presenting a Reversible Universal Gate (RUG based on Quantum-dot Cellular Automata (QCA. The RUG implemented by QCA Designer tool and also its behavior is simulated by it.
Exact Synthesis of Reversible Circuits Using A* Algorithm
Datta, K.; Rathi, G. K.; Sengupta, I.; Rahaman, H.
2014-07-01
With the growing emphasis on low-power design methodologies, and the result that theoretical zero power dissipation is possible only if computations are information lossless, design and synthesis of reversible logic circuits have become very important in recent years. Reversible logic circuits are also important in the context of quantum computing, where the basic operations are reversible in nature. Several synthesis methodologies for reversible circuits have been reported. Some of these methods are termed as exact, where the motivation is to get the minimum-gate realization for a given reversible function. These methods are computationally very intensive, and are able to synthesize only very small functions. There are other methods based on function transformations or higher-level representation of functions like binary decision diagrams or exclusive-or sum-of-products, that are able to handle much larger circuits without any guarantee of optimality or near-optimality. Design of exact synthesis algorithms is interesting in this context, because they set some kind of benchmarks against which other methods can be compared. This paper proposes an exact synthesis approach based on an iterative deepening version of the A* algorithm using the multiple-control Toffoli gate library. Experimental results are presented with comparisons with other exact and some heuristic based synthesis approaches.
4-bit digital to analog converter using R-2R ladder and binary weighted resistors
Diosanto, J.; Batac, M. L.; Pereda, K. J.; Caldo, R.
2017-06-01
The use of a 4-bit digital-to-analog converter using two methods; Binary Weighted Resistors and R-2R Ladder is designed and presented in this paper. The main components that were used in constructing both circuits were different resistor values, operational amplifier (LM741) and single pole double throw switches. Both circuits were designed using MULTISIM software to be able to test the circuit for its ideal application and FRITZING software for the layout designing and fabrication to the printed circuit board. The implementation of both systems in an actual circuit benefits in determining and comparing the advantages and disadvantages of each. It was realized that the binary weighted circuit is more efficient DAC, having lower percentage error of 0.267% compared to R-2R ladder circuit which has a minimum of percentage error of 4.16%.
Upper bounds for reversible circuits based on Young subgroups
DEFF Research Database (Denmark)
Abdessaied, Nabila; Soeken, Mathias; Thomsen, Michael Kirkedal;
2014-01-01
We present tighter upper bounds on the number of Toffoli gates needed in reversible circuits. Both multiple controlled Toffoli gates and mixed polarity Toffoli gates have been considered for this purpose. The calculation of the bounds is based on a synthesis approach based on Young subgroups that...... that results in circuits using a more generalized gate library. Starting from an upper bound for this library we derive new bounds which improve the existing bound by around 77%. © 2014 Elsevier B.V. All rights reserved....
Reversible circuit synthesis by genetic programming using dynamic gate libraries
Abubakar, Mustapha Y.; Jung, Low Tang; Zakaria, Nordin; Younes, Ahmed; Abdel-Aty, Abdel-Haleem
2017-06-01
We have defined a new method for automatic construction of reversible logic circuits by using the genetic programming approach. The choice of the gate library is 100% dynamic. The algorithm is capable of accepting all possible combinations of the following gate types: NOT TOFFOLI, NOT PERES, NOT CNOT TOFFOLI, NOT CNOT SWAP FREDKIN, NOT CNOT TOFFOLI SWAP FREDKIN, NOT CNOT PERES, NOT CNOT SWAP FREDKIN PERES, NOT CNOT TOFFOLI PERES and NOT CNOT TOFFOLI SWAP FREDKIN PERES. Our method produced near optimum circuits in some cases when a particular subset of gate types was used in the library. Meanwhile, in some cases, optimal circuits were produced due to the heuristic nature of the algorithm. We compared the outcomes of our method with several existing synthesis methods, and it was shown that our algorithm performed relatively well compared to the previous synthesis methods in terms of the output efficiency of the algorithm and execution time as well.
ARE THERE SIGNIFICANT DIFFERENCES BETWEEN DIRECT AND REVERSE GRINDING CIRCUITS?
Directory of Open Access Journals (Sweden)
Douglas Batista Mazzinghy
2014-12-01
Full Text Available The mining industry is famous for many paradigms regarding different flowsheet designs and the use of new technologies and equipment. In this context, a question often performed to process engineers is: what grinding circuit is more efficient, the direct or the reverse? A precise answer could only be given by experimental data and simulations. Simulations were performed using ModSimTM software considering parameters obtained by batch mill tests of an iron ore sample. The simulations, preliminarily, indicated no significant differences between the two circuit configurations for the sample tested. Subsequently, tests were conducted on a pilot scale with detailed measurement of all the variables necessary for a correct interpretation of the differences between the direct and reverse circuits. The test results confirmed the prediction obtained by simulation. This work provides the basis to test other ores and to understanding better the real differences between grinding circuit configurations. Thus, it is expected that some myths of the mineral industry, with respect to flowsheet choices, are overcome.
Interlocked DNA nanostructures controlled by a reversible logic circuit.
Li, Tao; Lohmann, Finn; Famulok, Michael
2014-09-17
DNA nanostructures constitute attractive devices for logic computing and nanomechanics. An emerging interest is to integrate these two fields and devise intelligent DNA nanorobots. Here we report a reversible logic circuit built on the programmable assembly of a double-stranded (ds) DNA [3]pseudocatenane that serves as a rigid scaffold to position two separate branched-out head-motifs, a bimolecular i-motif and a G-quadruplex. The G-quadruplex only forms when preceded by the assembly of the i-motif. The formation of the latter, in turn, requires acidic pH and unhindered mobility of the head-motif containing dsDNA nanorings with respect to the central ring to which they are interlocked, triggered by release oligodeoxynucleotides. We employ these features to convert the structural changes into Boolean operations with fluorescence labelling. The nanostructure behaves as a reversible logic circuit consisting of tandem YES and AND gates. Such reversible logic circuits integrated into functional nanodevices may guide future intelligent DNA nanorobots to manipulate cascade reactions in biological systems.
On Design of Parity Preserving Reversible Adder Circuits
Haghparast, Majid; Bolhassani, Ali
2016-12-01
In this paper novel parity preserving reversible logic blocks are presented and verified. Then, we present cost-effective parity preserving reversible implementations of Full Adder, 4:2 Compressor, Binary to BCD converter, and BCD adder using these blocks. The proposed parity preserving reversible BCD adder is designed by cascading the presented 4-digit parity preserving reversible Full Adder and a parity preserving reversible Binary to BCD Converter. In this design, instead of realizing the detection and correction unit, we design a Binary to BCD converter that its inputs are the output of parity preserving binary adder, and its output is a parity preserving BCD digit. In addition, several theorems on the numbers of garbage outputs, constant inputs, quantum cost and delay of the designs have been presented to show its optimality. In the presented circuits, the delay and the quantum cost are reduced by deriving designs based on the proposed parity preserving reversible blocks. The advantages of the proposed designs over the existing ones are quantitatively described and analysed. All the scales are in the Nano-metric area.
Josephson address control unit IC for a 4-bit microcomputer prototype
Energy Technology Data Exchange (ETDEWEB)
Kosaka, S.; Nakagawa, H.; Kawamura, H.; Okada, Y.; Hamazaki, Y.; Aoyagi, M.; Kurosawa, I.; Shoji, A.; Takada, S.
1989-03-01
This paper describes a design and operations of a Josephson address control unit IC (CTRU) used for controlling the instruction sequence of an experimental 4-bit Josephson microcomputer prototype system. The CTRU is composed of three sets of 7 to 10-bit wide registers and combinational logic circuits driven by a two-phase mono-polar power supply. 593 4-Junction-Logic (4JL) gates have been used in the circuit and fabricated by using 2.5um NbN/oxide/NbN junction technology with Mo resistors and SiO/sub 2/ insulations. Experimental operations of the circuit have been successfully tested for all the instructions which control the program sequence of the computer system.
Testing of Bridging Faults in AND-EXOR based Reversible Logic Circuits
Chakraborty, Avik
2010-01-01
Reversible circuits find applications in many areas of Computer Science including Quantum Computation. This paper examines the testability of an important subclass of reversible logic circuits that are composed of k-wire controlled NOT (k-CNOT with k >/- 1) gates. A reversible k-CNOT gate can be implemented using an irreversible k-input AND gate and an EXOR gate. A reversible k-CNOT circuit where each k-CNOT gate is realized using irreversible k-input AND and EXOR gate, has been considered. One of the most commonly used Single Bridging Fault model (both wired-AND and wired-OR) has been assumed to be type of fault for such circuits. It has been shown that an (n+p)-input AND-EXOR based reversible logic circuit with p observable outputs, can be tested for single bridging faults (SBF) using (3n + \\lefthalfcap log2p \\righthalfcap + 2) tests.
Hadjam, Fatima; Moraga, Claudio
2014-01-01
Quantum computers are considered as a future alternative to circumvent the heat dissipation problem of VLSI circuits. The synthesis of reversible circuits is a very promising area of study considering the expected further technological advances towards quantum computing. In this report, we propose a linear genetic programming system to design reversible circuits -RIMEP2-. The system has evolved reversible circuits starting from scratch without resorting to a pre-existing library. The results ...
Chaos and reverse bifurcation in a RCL circuit
Cascais, J.; Dilão, R.; da Costa, A. Noronha
1983-01-01
The bifurcation diagram and attractor of a driven non-linear oscillator are directly obtained. The system exhibits not only period doubling, chaotic band merging and noise-free windows like the logistic map, but also reverse flip bifurcations, i.e. period halving. A negative schwartzian derivative map is found also possessing reverse bifurcations.
Designing reversible arithmetic, logic circuit to implement micro-operation in quantum computation
Kalita, Gunajit; Saikia, Navajit
2016-10-01
The futuristic computing is desired to be more power full with low-power consumption. That is why quantum computing has been a key area of research for quite some time and is getting more and more attention. Quantum logic being reversible, a significant amount of contributions has been reported on reversible logic in recent times. Reversible circuits are essential parts of quantum computers, and hence their designs are of great importance. In this paper, designs of reversible circuits are proposed using a recently proposed reversible gate for arithmetic and logic operations to implement various micro-operations (simple add and subtract, add with carry, subtract with borrow, transfer, incrementing, decrementing etc., and logic operations like XOR, XNOR, complementing etc.) in a reversible computer like quantum computer. The two new reversible designs proposed here for half adder and full adders are also used in the presented reversible circuits to implement various microoperations. The quantum costs of these designs are comparable. Many of the implemented micro-operations are not seen in previous literatures. The performances of the proposed circuits are compared with existing designs wherever available.
Implementation of Optimized Reversible Sequential and Combinational Circuits for VLSI Applications
Directory of Open Access Journals (Sweden)
P. Mohan Krishna
2014-04-01
Full Text Available Reversible logic has emerged as one of the most important approaches for the power optimization with its application in low power VLSI design. They are also the fundamental requirement for the emerging field of the Quantum computing having with applications in the domains like Nano-technology, Digital signal processing, Cryptography, Communications. Implementing the reversible logic has the advantages of reducing gate counts, garbage outputs as well as constant inputs. In this project we present sequential and combinational circuit with reversible logic gates which are simulated in Xilinx ISE and by writing the code in VHDL . we have proposed a new design technique of BCD Adder using newly constructed reversible gates are based on CMOS with pass transistor gates . Here the total reversible Adder is designed using EDA tools. We will analyze the VLSI limitations like power consumption and area of designed circuits.
A Novel Reversible BCD Adder For Nanotechnology Based Systems
Directory of Open Access Journals (Sweden)
Majid Haghparast
2008-01-01
Full Text Available This paper proposes two reversible logic gates, HNFG and HNG. The first gate HNFG can be used as two Feynman Gates. It is suitable for a single copy of two bits with no garbage outputs. It can be used as Copying Circuit to increase fan-out because fan-out is not allowed in reversible circuits. The second gate HNG can implement all Boolean functions. It also can be used to design optimized adder architectures. This paper also proposes a novel reversible full adder. One of the prominent functionalities of the proposed HNG gate is that it can work singly as a reversible full adder unit. The proposed reversible full adder contains only one gate. We show that its hardware complexity is less than the existing reversible full adders. The proposed full adder is then applied to the design of a reversible 4-bit parallel adder. A reversible Binary Coded Decimal (BCD adder circuit is also proposed. The proposed circuit can add two 4-bit binary variables and it transforms the result into the appropriate BCD number using efficient error correction modules. We show that the proposed reversible BCD adder has lower hardware complexity and it is much better and optimized in terms of number of reversible gates and garbage outputs with compared to the existing counterparts.
VLSI Design of Low Power High Speed 4 Bit Resolution Pipeline ADC In Submicron CMOS Technology
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Rita M. Shende
2012-01-01
Full Text Available Analog-to-digital converters (ADCs are key design blocks and are currently adopted in many application fields to improve digital systems, which achieve superior performances with respect to analog solutions. Application such as wireless communication and digital audio and video have created the need for costeffective data converters that will achieve higher speed and resolution. Widespread usage confers great importance to the design activities, which nowadays largely contributes to the production cost in integrated circuit devices (ICs. Various examples of ADC applications can be found in data acquisition systems, measurement systems and digital communication systems also imaging, instrumentation systems. Since theADC has a continuous, infinite –valued signal as its input, the important analog points on the transfer curve x-axis for an ADC are the ones that corresponding to changes in the digital output word. These input transitions determine the amount of INL and DNL associated with the converter. Hence, we have to considered all the parameters and improving the associated performance may significantly reduce the industrial cost of an ADC manufacturing process and improved the resolution and design specially powerconsumption . The paper presents a design of 4 bit Pipeline ADC with low power dissipation implemented in <0.18µm.
A parity checker circuit based on microelectromechanical resonator logic elements
Hafiz, Md Abdullah Al; Li, Ren; Younis, Mohammad I.; Fariborzi, Hossein
2017-03-01
Micro/nano-electromechanical resonator based logic computation has attracted significant attention in recent years due to its dynamic mode of operation, ultra-low power consumption, and potential for reprogrammable and reversible computing. Here we demonstrate a 4-bit parity checker circuit by utilizing recently developed logic gates based on MEMS resonators. Toward this, resonance frequencies of shallow arch shaped micro-resonators are electrothermally tuned by the logic inputs to constitute the required logic gates for the proposed parity checker circuit. This study demonstrates that by utilizing MEMS resonator based logic elements, complex digital circuits can be realized.
A parity checker circuit based on microelectromechanical resonator logic elements
Hafiz, Md Abdullah Al
2017-01-11
Micro/nano-electromechanical resonator based logic computation has attracted significant attention in recent years due to its dynamic mode of operation, ultra-low power consumption, and potential for reprogrammable and reversible computing. Here we demonstrate a 4-bit parity checker circuit by utilizing recently developed logic gates based on MEMS resonators. Toward this, resonance frequencies of shallow arch shaped micro resonators are electrothermally tuned by the logic inputs to constitute the required logic gates for the proposed parity checker circuit. This study demonstrates that by utilizing MEMS resonator based logic elements, complex digital circuits can be realized.
The investigation of reverse traction current influence on tone track circuit modes
Directory of Open Access Journals (Sweden)
E.I.Jasсhuk
2012-12-01
Full Text Available Introduction: With the introduction of high-speed traffic there is an increased consumption of traction current by new types of rolling stock. This issue is important, as high levels of traction currents can have not only prevents, but also a dangerous impact on the equipment of railway automation devices. It is necessary to investigate the propagation of traction currents and potentials along the rails. Objective: Investigate the propagation of traction currents and potentials along the rails, the determination of critical currents, which not executed tone track circuits modes. Methods: In order to investigate the mathematical model, and the method of calculation tone track circuits modes was used. Results: By means of mathematical model, which includes being several rolling-stocks at the feeder zone, different rail resistance and isolation, the diagrams of currents and potentials propagations for DC and AC electric traction have been obtained. A comparative analysis of the experimental data and the results of the investigation has been realized. Based on received levels of reverse traction current their influence on track circuit modes has been investigated. Conclusions: The reverse traction current level near the substation and rolling-stock can be more than 600A. Great reverse traction current levels have an influence on tonal track circuit functioning, namely normal and shunt modes. When the traction current arrives 200 A there is a reduction criteria of tonal track circuits.
nLukac, Maarti; Kameyama, Michitaka
2011-01-01
It has been experimentally proven that realizing universal quantum gates using higher-radices logic is practically and technologically possible. We developed a Parallel Genetic Algorithm that synthesizes Boolean reversible circuits realized with a variety of quantum gates on qudits with various radices. In order to allow synthesizing circuits of medium sizes in the higher radix quantum space we performed the experiments using a GPU accelerated Genetic Algorithm. Using the accelerated GA we compare heuristic improvements to the mutation process based on cost minimization, on the adaptive cost of the primitives and improvements due to Baldwinian vs. Lamarckian GA. We also describe various fitness function formulations that allowed for various realizations of well known universal Boolean reversible or quantum-probabilistic circuits.
Reversible Circuit Synthesis Using a Cycle-Based Approach
Saeedi, Mehdi; Sedighi, Mehdi; Sasanian, Zahra
2010-01-01
Reversible logic has applications in various research areas including signal processing, cryptography and quantum computation. In this paper, direct NCT-based synthesis of a given $k$-cycle in a cycle-based synthesis scenario is examined. To this end, a set of seven building blocks is proposed that reveals the potential of direct synthesis of a given permutation to reduce both quantum cost and average runtime. To synthesize a given large cycle, we propose a decomposition algorithm to extract the suggested building blocks from the input specification. Then, a synthesis method is introduced which uses the building blocks and the decomposition algorithm. Finally, a hybrid synthesis framework is suggested which uses the proposed cycle-based synthesis method in conjunction with one of the recent NCT-based synthesis approaches which is based on Reed-Muller (RM) spectra. The time complexity and the effectiveness of the proposed synthesis approach are analyzed in detail. Our analyses show that the proposed hybrid fra...
Optimized Multiplier Using Reversible Multicontrol Input Toffoli Gates
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H R Bhagyalakshmi
2013-01-01
Full Text Available Reversible logic is an important area to carry the computation into the world of quantum computing. In thispaper a 4-bit multiplier using a new reversible logic gate called BVPPG gate is presented. BVPPG gate isa 5 x 5 reversible gate which is designed to generate partial products required to perform multiplicationand also duplication of operand bits is obtained. This reduces the total cost of the circuit. Toffoli gate isthe universal and also most flexible reversible logic gate. So we have used the Toffoli gates to construct thedesigned multiplier.
Variable Block Carry Skip Logic using Reversible Gates
Islam, Md Rafiqul; Karim, Muhammad Rezaul; Mahmud, Abdullah Al; Babu, Hafiz Md Hasan
2010-01-01
Reversible circuits have applications in digital signal processing, computer graphics, quantum computation and cryptography. In this paper, a generalized k*k reversible gate family is proposed and a 3*3 gate of the family is discussed. Inverter, AND, OR, NAND, NOR, and EXOR gates can be realized by this gate. Implementation of a full-adder circuit using two such 3*3 gates is given. This full-adder circuit contains only two reversible gates and produces no extra garbage outputs. The proposed full-adder circuit is efficient in terms of gate count, garbage outputs and quantum cost. A 4-bit carry skip adder is designed using this full-adder circuit and a variable block carry skip adder is discussed. Necessary equations required to evaluate these adder are presented.
Kumar, Santosh; Chauhan, Chanderkanta; Bedi, Amna
2016-12-01
In recent years, it has been shown that reversible logic can play an important role in power optimization for computer design. The various reversible logic gates such as Feynman, Fredkin, Peres, and Toffoli gates have been discussed by researchers, but very little work has been done on reversible sequential circuits. Design of reversible sequential circuits using lithium-niobate-based Mach-Zehnder interferometers is proposed. Here, flip-flops are designed with the help of basic reversible logic gates such as Feynman, Fredkin, and Peres gates. Theoretical descriptions along with mathematical formulation of the devices are provided. The devices are also analyzed through finite difference-beam propagation method and MATLAB® simulation.
Organic field-effect transistor circuits with electrode interconnections using reverse stamping
Choi, Sangmoo; Fuentes-Hernandez, Canek; Yun, Minseong; Dindar, Amir; Khan, Talha M.; Wang, Cheng-Yin; Kippelen, Bernard
2014-10-01
We discuss a non-vacuum low-cost reverse stamping method for the realization of circuits based on top-gate organic field-effect transistors (OFETs) with a bi-layer gate dielectric. This method allows for patterning of high-k inorganic dielectric films produced by atomic layer deposition and consequently of the bilayer gate dielectric layers used in our top-gate OFETs. We demonstrate the fabrication and operation of logic inverters and ring oscillators following this approach.
Korotkov, S V
2002-01-01
One generalized the results of investigation into the reverse-connected dynistors (RCD) designed for pulsed and conversion equipment high-power facilities. Paper describes the basic design principles for high-power RCD-switches and the base circuits of pulsed and high-frequency facilities based on RCD. Paper contains the results of tests of high-voltage microsecond and submicrosecond RCD-generators with 10 sup 8 -10 sup 1 sup 0 W pulse intensity and of high-frequency RCD-inverters with 10 sup 4 -10 sup 5 W average intensity
Novel Designs of Quantum Reversible Counters
Qi, Xuemei; Zhu, Haihong; Chen, Fulong; Zhu, Junru; Zhang, Ziyang
2016-11-01
Reversible logic, as an interesting and important issue, has been widely used in designing combinational and sequential circuits for low-power and high-speed computation. Though a significant number of works have been done on reversible combinational logic, the realization of reversible sequential circuit is still at premature stage. Reversible counter is not only an important part of the sequential circuit but also an essential part of the quantum circuit system. In this paper, we designed two kinds of novel reversible counters. In order to construct counter, the innovative reversible T Flip-flop Gate (TFG), T Flip-flop block (T_FF) and JK flip-flop block (JK_FF) are proposed. Based on the above blocks and some existing reversible gates, the 4-bit binary-coded decimal (BCD) counter and controlled Up/Down synchronous counter are designed. With the help of Verilog hardware description language (Verilog HDL), these counters above have been modeled and confirmed. According to the simulation results, our circuits' logic structures are validated. Compared to the existing ones in terms of quantum cost (QC), delay (DL) and garbage outputs (GBO), it can be concluded that our designs perform better than the others. There is no doubt that they can be used as a kind of important storage components to be applied in future low-power computing systems.
A novel reversible carry-selected adder with low latency
Li, Ming-Cui; Zhou, Ri-Gui
2016-07-01
Reversible logic is getting more and more attention in quantum computing, optical computing, nanotechnology and low-power complementary metal oxide semiconductor designs since reversible circuits do not loose information during computation and have only small energy dissipation. In this paper, a novel carry-selected reversible adder is proposed primarily optimised for low latency. A 4-bit reversible full adder with two kinds of outputs, minimum delay and optimal quantum cost is presented as the building block for ?-bit reversible adder. Three new reversible gates NPG (new Peres gate), TEPG (triple extension of Peres gate) and RMUX21 (reversible 2-to-1 multiplexer) are proposed and utilised to design efficient adder units. The secondary carry propagation chain is carefully designed to reduce the time consumption. The novelty of the proposed design is the consideration of low latency. The comparative study shows that the proposed adder achieves the improvement from 61.46% to 95.29% in delay over the existing designs.
Directory of Open Access Journals (Sweden)
D. V. Zakablukov
2014-01-01
Full Text Available The subject of study of this paper is reversible logic circuits. The irreversibility of computation can lead in the future to significant energy loss during the calculation process. Reversible circuits can be widely used in devices operating under conditions of limited computational resources.Presently, the problem of reversible logic synthesis is widely studied. The task a synthesis algorithm can face with is to reduce the gate complexity of synthesized circuit. One way to solve this problem is to use equivalent replacement tables for the gate compositions. The disadvantage of this approach is that it is necessary to build replacement tables, it takes a long time to find the replacement in the table, and there is no way to build an appropriate universal replacement table for arbitrary reversible circuit. The aim of this paper is to develop the solution for the problem of gate complexity reduction for the reversible circuits without using equivalent replacement tables for the gate compositions.This paper makes a generalization of the k-CNOT gate for the case of zero value at some of the gate control inputs. To describe such gates it suggests using a set of direct control inputs and a set of inverted ones. A definition of the independence of two reversible gates is introduced. Two independent gates standing next to each other in the circuit can be swapped without changing the circuit result transformation. Various conditions of the independence of two reversible gates are considered including conditions imposed to the set of direct control inputs and the set of inverted ones. It is proved that two gates are independent if there is, at least, one common control input, which differs only by the type (direct or inverted.Various equivalent replacements of two k-CNOT gates compositions and its conditions imposed to the set of direct control inputs and to the set of inverted ones are considered. The proof of correctness for such replacements is
Chao, Michael Y.; Komatsu, Hidetoshi; Fukuto, Hana S.; Dionne, Heather M.; Hart, Anne C.
2004-10-01
Serotonin (5-HT) modulates synaptic efficacy in the nervous system of vertebrates and invertebrates. In the nematode Caenorhabditis elegans, many behaviors are regulated by 5-HT levels, which are in turn regulated by the presence or absence of food. Here, we show that both food and 5-HT signaling modulate chemosensory avoidance response of octanol in C. elegans, and that this modulation is both rapid and reversible. Sensitivity to octanol is decreased when animals are off food or when 5-HT levels are decreased; conversely, sensitivity is increased when animals are on food or have increased 5-HT signaling. Laser microsurgery and behavioral experiments reveal that sensory input from different subsets of octanol-sensing neurons is selectively used, depending on stimulus strength, feeding status, and 5-HT levels. 5-HT directly targets at least one pair of sensory neurons, and 5-HT signaling requires the G protein GPA-11. Glutamatergic signaling is required for response to octanol, and the GLR-1 glutamate receptor plays an important role in behavioral response off food but not on food. Our results demonstrate that 5-HT modulation of neuronal activity via G protein signaling underlies behavioral plasticity by rapidly altering the functional circuitry of a chemosensory circuit.
Bhattachryya, Arunava; Kumar Gayen, Dilip; Chattopadhyay, Tanay
2013-04-01
All-optical 4-bit binary to binary coded decimal (BCD) converter has been proposed and described, with the help of semiconductor optical amplifier (SOA)-assisted Sagnac interferometric switches in this manuscript. The paper describes all-optical conversion scheme using a set of all-optical switches. BCD is common in computer systems that display numeric values, especially in those consisting solely of digital logic with no microprocessor. In many personal computers, the basic input/output system (BIOS) keep the date and time in BCD format. The operations of the circuit are studied theoretically and analyzed through numerical simulations. The model accounts for the SOA small signal gain, line-width enhancement factor and carrier lifetime, the switching pulse energy and width, and the Sagnac loop asymmetry. By undertaking a detailed numerical simulation the influence of these key parameters on the metrics that determine the quality of switching is thoroughly investigated.
DEFF Research Database (Denmark)
Rodes Lopez, Roberto; Wieckowski, Marcin; Pham, Tien Thang
2011-01-01
We experimental demonstrate successful performance of VCSEL-based WDM link supporting advanced 16-level carrierless amplitude/phase modulation up to 1.25 Gbps, over 26 km SSMF with spectral efficiency of 4 bit/s/Hz for application in high capacity PONs.......We experimental demonstrate successful performance of VCSEL-based WDM link supporting advanced 16-level carrierless amplitude/phase modulation up to 1.25 Gbps, over 26 km SSMF with spectral efficiency of 4 bit/s/Hz for application in high capacity PONs....
Gao, Bindong; Zhang, Fangzheng; Pan, Shilong
2017-01-01
Arbitrary waveform generation by a serial photonic digital-to-analog converter (PDAC) is demonstrated in this paper. To construct the PDAC, an intensity weighted, time and wavelength interleaved optical pulse train is first generated by phase modulation and fiber dispersion. Then, on-off keying modulation of the optical pulses is implemented according to the input serial digital bits. After proper dispersion compensation, a combined optical pulse is obtained with its total power proportional to the weighted sum of the input digital bits, and digital-to-analog conversion is achieved after optical-to-electronic conversion. By properly designing the input bits and using a low pass filter for signal smoothing, arbitrary waveforms can be generated. Performance of the PDAC is experimentally investigated by establishing a 2.5 GSa/s 4-bit PDAC. The established PDAC is found to have a good linear transfer function and the effective number of bits (ENOB) reaches as high as 3.49. Based on the constructed PDAC, generation of multiple waveforms including triangular, parabolic, square and sawtooth pulses are implemented with the generated waveforms very close to the ideal waveforms.
GPU Kernels for High-Speed 4-Bit Astrophysical Data Processing
Klages, Peter; Denman, Nolan; Recnik, Andre; Sievers, Jonathan; Vanderlinde, Keith
2015-01-01
Interferometric radio telescopes often rely on computationally expensive O(N^2) correlation calculations; fortunately these computations map well to massively parallel accelerators such as low-cost GPUs. This paper describes the OpenCL kernels developed for the GPU based X-engine of a new hybrid FX correlator. Channelized data from the F-engine is supplied to the GPUs as 4-bit, offset-encoded real and imaginary integers. Because of the low bit width of the data, two values may be packed into a 32-bit register, allowing multiplication and addition of more than one value with a single fused multiply-add instruction. With this data and calculation packing scheme, as many as 5.6 effective tera-operations per second (TOPS) can be executed on a 4.3 TOPS GPU. The kernel design allows correlations to scale to large numbers of input elements, limited only by maximum buffer sizes on the GPU. This code is currently working on-sky with the CHIME Pathfinder Correlator in BC, Canada.
Directory of Open Access Journals (Sweden)
Shih-Yu Li
2013-01-01
Full Text Available We expose the chaotic attractors of time-reversed nonlinear system, further implement its behavior on electronic circuit, and apply the pragmatical asymptotically stability theory to strictly prove that the adaptive synchronization of given master and slave systems with uncertain parameters can be achieved. In this paper, the variety chaotic motions of time-reversed Lorentz system are investigated through Lyapunov exponents, phase portraits, and bifurcation diagrams. For further applying the complex signal in secure communication and file encryption, we construct the circuit to show the similar chaotic signal of time-reversed Lorentz system. In addition, pragmatical asymptotically stability theorem and an assumption of equal probability for ergodic initial conditions (Ge et al., 1999, Ge and Yu, 2000, and Matsushima, 1972 are proposed to strictly prove that adaptive control can be accomplished successfully. The current scheme of adaptive control—by traditional Lyapunov stability theorem and Barbalat lemma, which are used to prove the error vector—approaches zero, as time approaches infinity. However, the core question—why the estimated or given parameters also approach to the uncertain parameters—remains without answer. By the new stability theory, those estimated parameters can be proved approaching the uncertain values strictly, and the simulation results are shown in this paper.
DEFF Research Database (Denmark)
Rodes Lopez, Roberto; Wieckowski, Marcin; Pham, Tien Thang
2011-01-01
We experimentally demonstrate successful performance of VCSEL-based WDM link supporting advanced 16-level carrierless amplitude/phase modulation up to 1.25 Gbps, over 26 km SSMF with spectral efficiency of 4 bit/s/Hz for application in high capacity PONs. © 2011 Optical Society of America....
Species conservation-based hybrid algorithm for reversible circuit synthesis%基于子种群保留的可逆电路合成混合算法
Institute of Scientific and Technical Information of China (English)
王潇潇; 焦李成; 李阳阳
2015-01-01
为了进一步降低4 bit以上中小规模可逆逻辑电路的量子代价，提出一种基于子种群保留的变长染色体编码混合算法。该算法在已有变长染色体编码混合算法的基础上，将子种群保留策略用于变长编码种群的进化，以保持种群多样性，避免陷入局部最优解；定义了变长编码染色体的近似度，以此作为种子提取和子种群划分的基础；提出了子种群重新启动策略和新的启发式子种群更新操作，克服变长编码种群进化过程中的遗传漂移，从而提高可行解率和解的质量。对4 bit以上常用标准可逆函数测试结果表明该算法能大大降低合成可逆电路的量子代价。%In order to decrease the quantum cost of small and medium‐sized reversible functions with more than 4 bit ,a species conservation‐based variable‐length encoding hybrid algorithm for reversible logic circuit synthesis was proposed based on an existing variable‐length encoding hybrid algorithm . Firstly ,the species conservation mechanism was customized and introduced into variable‐length enco‐ding population to maintain the diversity of the population .The similarity definition between chromo‐somes with different lengths was given ,based on which seeds subtraction and species differentiation were conducted .Then ,the species restart strategy and heuristic species update were proposed to a‐void the genetic draft of the population with variable‐length encoding .The experimental results show that the proposed algorithm can reduce the quantum cost of common reversible benchmarks and im‐prove the feasible ratio greatly .
Carrier Synchronization for 3-and 4-bit-per-Symbol Optical Transmission
Ip, Ezra; Kahn, Joseph M.
2005-12-01
We investigate carrier synchronization for coherent detection of optical signals encoding 3 and 4 bits/symbol. We consider the effects of laser phase noise and of additive white Gaussian noise (AWGN), which can arise from local oscillator (LO) shot noise or LO-spontaneous beat noise. We identify 8-and 16-ary quadrature amplitude modulation (QAM) schemes that perform well when the receiver phase-locked loop (PLL) tracks the instantaneous signal phase with moderate phase error. We propose implementations of 8-and 16-QAM transmitters using Mach-Zehnder (MZ) modulators. We outline a numerical method for computing the bit error rate (BER) of 8-and 16-QAM in the presence of AWGN and phase error. It is found that these schemes can tolerate phase-error standard deviations of 2.48° and 1.24°, respectively, for a power penalty of 0.5 dB at a BER of 10-9. We propose a suitable PLL design and analyze its performance, taking account of laser phase noise, AWGN, and propagation delay within the PLL. Our analysis shows that the phase error depends on the constellation penalty, which is the mean power of constellation symbols times the mean inverse power. We establish a procedure for finding the optimal PLL natural frequency, and determine tolerable laser linewidths and PLL propagation delays. For zero propagation delay, 8-and 16-QAM can tolerate linewidth-to-bit-rate ratios of 1.8 × 10-5 and 1.4 × 10-6, respectively, assuming a total penalty of 1.0 dB.
All-optical design for inherently energy-conserving reversible gates and circuits
Cohen, Eyal; Dolev, Shlomi; Rosenblit, Michael
2016-04-01
As energy efficiency becomes a paramount issue in this day and age, reversible computing may serve as a critical step towards energy conservation in information technology. The inputs of reversible computing elements define the outputs and vice versa. Some reversible gates such as the Fredkin gate are also universal; that is, they may be used to produce any logic operation. It is possible to find physical representations for the information, so that when processed with reversible logic, the energy of the output is equal to the energy of the input. It is suggested that there may be devices that will do that without applying any additional power. Here, we present a formalism that may be used to produce any reversible logic gate. We implement this method over an optical design of the Fredkin gate, which utilizes only optical elements that inherently conserve energy.
Reisslein, Jana; Atkinson, Robert K.; Seeling, Patrick; Reisslein, Martin
2006-01-01
This study examined the effectiveness of a computer-based environment employing three example-based instructional procedures (example-problem, problem-example, and fading) to teach series and parallel electrical circuit analysis to learners classified by two levels of prior knowledge (low and high). Although no differences between the…
Fiszer, Robert Adrian
As quantum computers edge closer to viability, it becomes necessary to create logic synthesis and minimization algorithms that take into account the particular aspects of quantum computers that differentiate them from classical computers. Since quantum computers can be functionally described as reversible computers with superposition and entanglement, both advances in reversible synthesis and increased utilization of superposition and entanglement in quantum algorithms will increase the power of quantum computing. One necessary component of any practical quantum computer is the computation of irreversible functions. However, very little work has been done on algorithms that synthesize and minimize irreversible functions into a reversible form. In this thesis, we present and implement a pair of algorithms that extend the best published solution to these problems by taking advantage of Product-Sum EXOR (PSE) gates, the reversible generalization of inhibition gates, which we have introduced in previous work [1,2]. We show that these gates, combined with our novel synthesis algorithms, result in much lower quantum costs over a wide variety of functions as compared to our competitors, especially on incompletely specified functions. Furthermore, this solution has applications for milti-valued and multi-output functions.
Tavousi, Alireza; Mansouri-Birjandi, Mohammad Ali; Saffari, Mehdi
2016-09-01
Implementing of photonic sampling and quantizing analog-to-digital converters (ADCs) enable us to extract a single binary word from optical signals without need for extra electronic assisting parts. This would enormously increase the sampling and quantizing time as well as decreasing the consumed power. To this end, based on the concept of successive approximation method, a 4-bit full-optical ADC that operates using the intensity-dependent Kerr-like nonlinearity in a two dimensional photonic crystal (2DPhC) platform is proposed. The Silicon (Si) nanocrystal is chosen because of the suitable nonlinear material characteristic. An optical limiter is used for the clamping and quantization of each successive levels that represent the ADC bits. In the proposal, an energy efficient optical ADC circuit is implemented by controlling the system parameters such as ring-to-waveguide coupling coefficients, the ring's nonlinear refractive index, and the ring's length. The performance of the ADC structure is verified by the simulation using finite difference time domain (FDTD) method.
Dahoumane, M; Bouvier, J; Lagorio, E; Hostachy, J Y; Gallin-Martel, L; Hostachy, J Y; Rossetto, O; Hu, Y; Ghazlane, H; Dallet, D
2007-01-01
A 4 bit very low power and low incoming signal analog to digital converter (ADC) using a double sampling switched capacitor technique, designed for use in CMOS monolithic active pixels sensor readout, has been implemented in 0.35μm CMOS technology. A non-resetting sample and hold stage is integrated to amplify the incoming signal by 4. This first stage compensates both the amplifier offset effect and the input common mode voltage fluctuations. The converter is composed of a 2.5 bit pipeline stage followed by a 2 bit flash stage. This prototype consists of 4 ADC double-channels; each one is sampling at 50MS/s and dissipates only 2.6mW at 3.3V supply voltage. A bias pulsing stage is integrated in the circuit. Therefore, the analog part is switched OFF or ON in less than 1μs. The size for the layout is 80μm*0.9mm. This corresponds to the pitch of 4 pixel columns, each one is 20μm wide.
Design of Reversible Metrologic Sensor Based on Hall-effect Circuit%基于霍尔电路设计的可逆计量传感器
Institute of Scientific and Technical Information of China (English)
李述香; 邱召运; 张文
2011-01-01
In order to recognize the rotary direction and catch the reversible count information, the contrast studies of the different sampling modes based on several Hall circuit design are performed, the characteristics of the output pulse time se-quence are analyzed, and a simple design method is proposed. The assembly of switch operation Hall chip and latch operation Hall chip is adopted in the new sampling method. The rotary direction and acquisition of reversible count signal are realized in combination with the bipolar rotating magnet sampling system. The sensor circuit is composed of only two Hall circuits, with-out any external circuit. All the advantages of He'll sensor are remained. The circuit design and detailed description of the working principle and impletation method are offered in yhis paper.%以识别转向和获取可逆计数信息为主要目的,对比研究了几种基于霍尔电路设计的不同取样方式,分析了它们的输出脉冲时序特征,提出一种简单的设计方案.新的取样方式采用开关型霍尔芯片和锁存型霍尔芯片组合,配合双极旋转磁体取样系统,实现了转向识别和可逆计数信号的采集.传感器电路仅由两片霍尔电路构成,无外围电路,保留了霍尔传感器的全部优点.给出了电路设计,并详细说明了工作原理和实现方法.
Pfeil, Thomas; Potjans, Tobias C; Schrader, Sven; Potjans, Wiebke; Schemmel, Johannes; Diesmann, Markus; Meier, Karlheinz
2012-01-01
Large-scale neuromorphic hardware systems typically bear the trade-off between detail level and required chip resources. Especially when implementing spike-timing dependent plasticity, reduction in resources leads to limitations as compared to floating point precision. By design, a natural modification that saves resources would be reducing synaptic weight resolution. In this study, we give an estimate for the impact of synaptic weight discretization on different levels, ranging from random walks of individual weights to computer simulations of spiking neural networks. The FACETS wafer-scale hardware system offers a 4-bit resolution of synaptic weights, which is shown to be sufficient within the scope of our network benchmark. Our findings indicate that increasing the resolution may not even be useful in light of further restrictions of customized mixed-signal synapses. In addition, variations due to production imperfections are investigated and shown to be uncritical in the context of the presented study. Our results represent a general framework for setting up and configuring hardware-constrained synapses. We suggest how weight discretization could be considered for other backends dedicated to large-scale simulations. Thus, our proposition of a good hardware verification practice may rise synergy effects between hardware developers and neuroscientists.
Directory of Open Access Journals (Sweden)
Ahmed Moustafa
2015-01-01
Full Text Available Quantum-dot cellular automata (QCA are nanoscale digital logic constructs that use electrons in arrays of quantum dots to carry out binary operations. In this paper, a basic building block for QCA will be proposed. The proposed basic building block can be customized to implement classical gates, such as XOR and XNOR gates, and reversible gates, such as CNOT and Toffoli gates, with less cell count and/or better latency than other proposed designs.
Moustafa, Ahmed; Younes, Ahmed; Hassan, Yasser F
2015-01-01
Quantum-dot cellular automata (QCA) are nanoscale digital logic constructs that use electrons in arrays of quantum dots to carry out binary operations. In this paper, a basic building block for QCA will be proposed. The proposed basic building block can be customized to implement classical gates, such as XOR and XNOR gates, and reversible gates, such as CNOT and Toffoli gates, with less cell count and/or better latency than other proposed designs.
Strong, G.H.; Faught, M.L.
1963-12-24
A device for safety rod counting in a nuclear reactor is described. A Wheatstone bridge circuit is adapted to prevent de-energizing the hopper coils of a ball backup system if safety rods, sufficient in total control effect, properly enter the reactor core to effect shut down. A plurality of resistances form one arm of the bridge, each resistance being associated with a particular safety rod and weighted in value according to the control effect of the particular safety rod. Switching means are used to switch each of the resistances in and out of the bridge circuit responsive to the presence of a particular safety rod in its effective position in the reactor core and responsive to the attainment of a predetermined velocity by a particular safety rod enroute to its effective position. The bridge is unbalanced in one direction during normal reactor operation prior to the generation of a scram signal and the switching means and resistances are adapted to unbalance the bridge in the opposite direction if the safety rods produce a predetermined amount of control effect in response to the scram signal. The bridge unbalance reversal is then utilized to prevent the actuation of the ball backup system, or, conversely, a failure of the safety rods to produce the predetermined effect produces no unbalance reversal and the ball backup system is actuated. (AEC)
A novel image encryption algorithm using chaos and reversible cellular automata
Wang, Xingyuan; Luan, Dapeng
2013-11-01
In this paper, a novel image encryption scheme is proposed based on reversible cellular automata (RCA) combining chaos. In this algorithm, an intertwining logistic map with complex behavior and periodic boundary reversible cellular automata are used. We split each pixel of image into units of 4 bits, then adopt pseudorandom key stream generated by the intertwining logistic map to permute these units in confusion stage. And in diffusion stage, two-dimensional reversible cellular automata which are discrete dynamical systems are applied to iterate many rounds to achieve diffusion on bit-level, in which we only consider the higher 4 bits in a pixel because the higher 4 bits carry almost the information of an image. Theoretical analysis and experimental results demonstrate the proposed algorithm achieves a high security level and processes good performance against common attacks like differential attack and statistical attack. This algorithm belongs to the class of symmetric systems.
Kumar, Santosh
2017-07-01
Binary to Binary coded decimal (BCD) converter is a basic building block for BCD processing. The last few decades have witnessed exponential rise in applications of binary coded data processing in the field of optical computing thus there is an eventual increase in demand of acceptable hardware platform for the same. Keeping this as an approach a novel design exploiting the preeminent feature of Mach-Zehnder Interferometer (MZI) is presented in this paper. Here, an optical 4-bit binary to binary coded decimal (BCD) converter utilizing the electro-optic effect of lithium niobate based MZI has been demonstrated. It exhibits the property of switching the optical signal from one port to the other, when a certain appropriate voltage is applied to its electrodes. The projected scheme is implemented using the combinations of cascaded electro-optic (EO) switches. Theoretical description along with mathematical formulation of the device is provided and the operation is analyzed through finite difference-Beam propagation method (FD-BPM). The fabrication techniques to develop the device are also discussed.
Spry, David J.; Neudeck, Philip G.; Chen, Liangyu; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.; Krasowski, Michael J.; Prokop, Norman F.
2015-01-01
Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype IC's with two levels of metal interconnect capable of prolonged operation at 500 C. Packaged functional circuits including 3- and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 C. A 3-stage oscillator functioned for over 3000 hours at 500 C in air ambient. Improved reproducibility remains to be accomplished.
Quantum reversible logic circuits synthesis based on genetic algorithm%基于遗传算法的量子可逆逻辑电路综合方法研究
Institute of Scientific and Technical Information of China (English)
吕洪君; 乐亮; 韩良顺; 解光军
2011-01-01
量子可逆逻辑电路综合主要是研究在给定的量子门和量子电路的约束条件及限制下,找到最小或较小的量子代价实现所需量子逻辑功能的电路.把量子逻辑门的功能用矩阵的数学模型表示,用遗传算法作全局搜索工具,将遗传算法应用于量子可逆逻辑电路综合,是一种全新的可逆逻辑电路综合方法,实现了合成、优化同步进行.四阶量子电路实验已取得了很好的效果,并进一步分析了此方法在高阶量子电路综合问题上的应用前景.%Reversible quantum logic synthesis is to study given quantum gates and quantum circuits of the constraints and limitations and find the smallest or smaller quantum cost to achieve the desired quantum logic circuits. The quantum logic gate functions of the matrix is indicated by the mathematical model. The synthesis and optimization are achieved simultaneously by the genetic algorithm as global search tool. Genetic algorithm is applied to quantum reversible logic synthesis. The fourth-order quantum circuit experiment has achieved good results, and further analysis of this method in high-level synthesis of quantum circuits and its application is completed.
Quantum noise in large-scale coherent nonlinear photonic circuits
Santori, Charles; Beausoleil, Raymond G; Tezak, Nikolas; Hamerly, Ryan; Mabuchi, Hideo
2014-01-01
A semiclassical simulation approach is presented for studying quantum noise in large-scale photonic circuits incorporating an ideal Kerr nonlinearity. A netlist-based circuit solver is used to generate matrices defining a set of stochastic differential equations, in which the resonator field variables represent random samplings of the Wigner quasi-probability distributions. Although the semiclassical approach involves making a large-photon-number approximation, tests on one- and two-resonator circuits indicate satisfactory agreement between the semiclassical and full-quantum simulation results in the parameter regime of interest. The semiclassical model is used to simulate random errors in a large-scale circuit that contains 88 resonators and hundreds of components in total, and functions as a 4-bit ripple counter. The error rate as a function of on-state photon number is examined, and it is observed that the quantum fluctuation amplitudes do not increase as signals propagate through the circuit, an important...
Test-Synthesis Method of Reversible Circuits Based on D Flip_Flop%基于扫描D触发器的可逆电路测试综合方法
Institute of Scientific and Technical Information of China (English)
胡靖; 温殿忠
2012-01-01
为了实现可逆逻辑电路的可测性设计,充分利用可逆逻辑电路中存在的输出引脚,提出一种可逆逻辑电路测试综合方法.通过定义可逆逻辑门的可观性值和可控性值的计算方法,对可逆逻辑电路的可测性进行建模；通过插入观察点,制定了可逆组合逻辑电路可测性实现方案；通过对现有的D触发器进行改造并构建全新的扫描D触发器,制定了可逆时序电路的可测性逻辑实现方案；最后分析了扫描D触发器的工作特点,规范了测试步骤,建立一种可逆逻辑电路的测试综合方法.实验结果表明,与现有方法相比,文中方法插入观察点代价平均增加不到1％,但电路的可观性平均能得到24％的改善.%A test-synthesis method of reversible circuits is proposed. Firstly, definition of measuring controllability and observability for reversible logic is given. Secondly, a new plan of Design-For-Test for reversible combinational and sequential circuits is worked out. Thirdly, a D Flip-Flops for reducing cost is built and a new scan-D Flip-Flops for constructing scan-chains is provided. Finally, utilizing the new scan-D Flip-Flops, a Test-Synthesis method for reversible circuits was presented. The proposed method was tested on a set of reversible benchmarks. In comparison with existing methods, costs increased less than 1 percent, while the improvement of testability has reached by 24 percent.
A Novel Nanometric Reversible Signed Divider with Overflow Checking Capability
Directory of Open Access Journals (Sweden)
Faraz Dastan
2012-03-01
Full Text Available One of the best approaches for designing future computers is that we use reversible logic. Reversible logic circuits have lower power consumption than the common circuits, used in computers nowadays. In this study we propose a new reversible division circuit. This reversible division circuit is signed divider and has an overflow checking capability. Among the designed and proposed reversible division circuits, our proposed division circuit is the first reversible signed divider with overflow checking capability which has been designed. In this circuit we use some reversible components like reversible parallel adder, reversible left-shift register, reversible multiplexer, reversible n-bit register and reversible n-bit register with parallel load line. In this paper all the scales are in the nanometric area.
Lloris Ruiz, Antonio; Parrilla Roure, Luis; García Ríos, Antonio
2014-01-01
This book presents a complete and accurate study of algebraic circuits, digital circuits whose performance can be associated with any algebraic structure. The authors distinguish between basic algebraic circuits, such as Linear Feedback Shift Registers (LFSRs) and cellular automata, and algebraic circuits, such as finite fields or Galois fields. The book includes a comprehensive review of representation systems, of arithmetic circuits implementing basic and more complex operations, and of the residue number systems (RNS). It presents a study of basic algebraic circuits such as LFSRs and cellular automata as well as a study of circuits related to Galois fields, including two real cryptographic applications of Galois fields.
Institute of Scientific and Technical Information of China (English)
苏人奇; 任国臣; 程海军
2016-01-01
Aiming at the problem of the instability of the battery charging current in the energy storage systemcaused bythe randomness and volatility of the photovoltaic power generation system, the theoretical basis and circuit structure of the supercapacitor and battery hybrid energy storage based on the current reversible chopper circuitisstudied. Firstly, the shortcomings of the existing hybrid energy storage system and the advantages of the current reversible chopper circuitareanalyzed in theory. This circuit can adjust the input voltage and control current direction by controlling the working state of thethyristorsto achieve theenergytransferbetweensupercapacitor and battery. Secondly, a reasonable simulation experimentisdesigned to verify the hybrid energy storage structure of the current reversible chopper circuit in the MATLAB, which can make the charge current and voltage of the lead acid battery more stable.%针对由于光伏发电系统出力的随机性和波动性而导致的储能系统中蓄电池充电电流不稳定的问题，研究了基于电流可逆斩波电路的超级电容器和蓄电池混合储能的理论依据和电路结构。首先在理论上分析了现有混合储能系统并联方式的不足以及电流可逆斩波电路的优势，该电路通过控制开关管的工作状态来调节输入侧的电压及控制电流方向，实现超级电容器和蓄电池之间能量的转移。其次，通过在 MATLAB 上建立电路模型，设计合理的仿真实验，验证了经电流可逆斩波电路并联的混合储能结构，能使铅酸蓄电池的充电电流和电压更稳定。
Institute of Scientific and Technical Information of China (English)
王友仁; 沈先坤; 周影辉
2014-01-01
可逆逻辑作为量子计算，纳米技术，低功耗设计等新兴技术的基础，近年来得到了越来越多的关注和研究。然而，大多数可逆逻辑综合方法对函数真值表表达形式的依赖使得综合电路规模受到了限制。决策图作为一种更加简洁的布尔函数表示方法，其为可逆逻辑综合提供了另一种途径。本文基于Kronecker函数决策图（KFDD ）提出了一种适合于综合大规模电路的综合方法。该方法利用KFDD描述功能函数，以局部最优的方式从三种节点分解方法中寻找最优分解方法，并根据Kronecker函数决策图中不同类型的节点构建相应的可逆逻辑电路模块，最后将各节点替换电路模块实现级联得到结果电路。以可逆基准电路为例，对该方法进行了验证。实验结果表明，该方法能以较低的代价实现对较大规模函数的可逆逻辑电路综合。%Reversible logic has obtained more and more attention and research as the basis for several emerging technologies such as quantum computing ,nanotechnologies and low-power design .However ,currently most synthesis algorithms for reversible circuits suffer from being restricted to deal with relatively small functions only ,since they rely on a truth table representation of the function to be synthesized .Decision Diagram serving as a more compact Boolean function description provides anther way to synthe-sis of reversible logic .Here ,a synthesis approach based on Kronecker Functional Decision Diagram (KFDD) is proposed ,that gen-erates KFDD for a logic function by means of choosing the local optimal one from three alternative node decomposition types .Final-ly ,the result circuit can be produced by substituting all nodes of the KFDD with circuit modules and cascading them .Verified by re-versible benchmarks ,experiments show the adaption of the proposed approach to large functions with better results .
A four-colour optical detector circuit
Yohannes, Israel; Assaad, Maher
2013-02-01
In this article, a new architecture for a four-colour optical detector circuit is presented. The proposed detector uses a photodiode as its basic light transducing element and a mixed signal readout circuit for signal processing and decision making. The readout circuit requires only two comparators, two multiplexers and a few logic gates to produce a digital 4 bit output that represents the right colour detected. The proposed detector is advantageous because the number of required components is fixed even if the number of detected colours is increased. The feature of having a fixed number of elements while increasing the number of detected colours is important especially in component count (i.e. low cost) and low power consumption. The proposed detector can be used as an autonomous and portable real-time pH monitoring applications. The objective of this article is to present a validation of a novel four colour sensor architecture using simulation and experiment as a proof of concept for a future implementation as a CMOS integrated circuit using the Austria Microsystems 350 nm technology.
Online Testable Decoder using Reversible Logic
Directory of Open Access Journals (Sweden)
Hemalatha. K. N. Manjula B. B. Girija. S
2012-02-01
Full Text Available The project proposes to design and test 2 to 4 reversible Decoder circuit with arbitrary number of gates to an online testable reversible one and is independent of the type of reversible gate used. The constructed circuit can detect any single bit errors and to convert a decoder circuit that is designed by reversible gates to an online testable reversible decoder circuit. Conventional digital circuits dissipate a significant amount of energy because bits of information are erased during the logic operations. Thus if logic gates are designed such that the information bits are not destroyed, the power consumption can be reduced. The information bits are not lost in case of a reversible computation. Reversible logic can be used to implement any Boolean logic function.
Resonance circuits for adiabatic circuits
Directory of Open Access Journals (Sweden)
C. Schlachta
2003-01-01
Full Text Available One of the possible techniques to reduces the power consumption in digital CMOS circuits is to slow down the charge transport. This slowdown can be achieved by introducing an inductor in the charging path. Additionally, the inductor can act as an energy storage element, conserving the energy that is normally dissipated during discharging. Together with the parasitic capacitances from the circuit a LCresonant circuit is formed.
Design of a High Performance Reversible Multiplier
Directory of Open Access Journals (Sweden)
Md.Belayet Ali
2011-11-01
Full Text Available Reversible logic circuits are increasingly used in power minimization having applications such as low power CMOS design, optical information processing, DNA computing, bioinformatics, quantum computing and nanotechnology. The problem of minimizing the number of garbage outputs is an important issue in reversible logic design. In this paper we propose a new 44 universal reversible logic gate. The proposed reversible gate can be used to synthesize any given Boolean functions. The proposed reversible gate also can be used as a full adder circuit. In this paper we have used Peres gate and the proposed Modified HNG (MHNG gate to construct the reversible fault tolerant multiplier circuit. We show that the proposed 44 reversible multiplier circuit has lower hardware complexity and it is much better and optimized in terms of number of reversible gates and number of garbage outputs with compared to the existing counterparts.
Optimized reversible binary-coded decimal adders
DEFF Research Database (Denmark)
Thomsen, Michael Kirkedal; Glück, Robert
2008-01-01
their design. The optimized 1-decimal BCD full-adder, a 13 × 13 reversible logic circuit, is faster, and has lower circuit cost and less garbage bits. It can be used to build a fast reversible m-decimal BCD full-adder that has a delay of only m + 17 low-power reversible CMOS gates. For a 32-decimal (128-bit...... in reversible logic design by drastically reducing the number of garbage bits. Specialized designs benefit from support by reversible logic synthesis. All circuit components required for optimizing the original design could also be synthesized successfully by an implementation of an existing synthesis algorithm...
Merrill, L.C.
1958-10-14
Control circuits for vacuum tubes are described, and a binary counter having an improved trigger circuit is reported. The salient feature of the binary counter is the application of the input signal to the cathode of each of two vacuum tubes through separate capacitors and the connection of each cathode to ground through separate diodes. The control of the binary counter is achieved in this manner without special pulse shaping of the input signal. A further advantage of the circuit is the simplicity and minimum nuruber of components required, making its use particularly desirable in computer machines.
Rate Control for MPEG-4 Bit Stream
Institute of Scientific and Technical Information of China (English)
王振洲; 李桂苓
2003-01-01
For a very long time video processing dealt exclusively with fixed-rate sequences of rectangular shaped images. However, interest has been recently moving toward a more flexible concept in which the subject of the processing and encoding operations is a set of visual elements organized in both time and space in a flexible and arbitrarily complex way. The moving picture experts group (MPEG-4) standard supports this concept and its verification model (VM) encoder has adopted scalable rate control (SRC) as the rate control scheme, which is based on the spatial domain and compatible with constant bit rate (CBR) and variable bit rate (VBR). In this paper,a new rate control algorithm based on the DCT domain instead of the pixel domain is presented. More-over, macroblock level rate control scheme to compute the quantization step for each macroblock has been adopted. The experimental results show that the new algorithm can achieve a much better result than the original one in both peak signal-to-noise ratio (PSNR) and the coding bits, and that the new algorithm is more flexible than test model 5 (TM5) rate control algorithm.
DEFF Research Database (Denmark)
2010-01-01
A switch-mode power circuit comprises a controllable element and a control unit. The controllable element is configured to control a current in response to a control signal supplied to the controllable element. The control unit is connected to the controllable element and provides the control...
Logic circuits from zero forcing
Burgarth, Daniel; Hogben, Leslie; Severini, Simone; Young, Michael
2011-01-01
We design logical circuits based on the notion of zero forcing on graphs; each gate of the circuits is a gadget in which zero forcing is performed. We show that such circuits can evaluate every monotone Boolean function. By using two vertices to encode each logical bit, we obtain universal computation. We also highlight a phenomenon of "back forcing" as a property of each function. Such a phenomenon occurs in a circuit when the input of gates which have been already used at a given time step is further modified by a computation actually performed at a later stage. Finally, we show that zero forcing can be also used to implement reversible computation. The model introduced here provides a potentially new tool in the analysis of Boolean functions, with particular attention to monotonicity.
Partial Reversible Gates(PRG) for Reversible BCD Arithmetic
Thapliyal, Himanshu; Bajpai, Rajnish; Sharma, Kamal K
2007-01-01
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard and a major enhancement to the standard is the addition of decimal format. Furthermore, in the recent years reversible logic has emerged as a promising computing paradigm having its applications in low power CMOS, quantum computing, nanotechnology, and optical computing. The major goal in reversible logic is to minimize the number of reversible gates and garbage outputs. Thus, this paper proposes the novel concept of partial reversible gates that will satisfy the reversibility criteria for specific cases in BCD arithmetic. The partial reversible gate is proposed to minimize the number of reversible gates and garbage outputs, while designing the reversible BCD arithmetic circuits.
Design of Low Power Vedic Multiplier Based on Reversible Logic
Directory of Open Access Journals (Sweden)
Sagar
2017-03-01
Full Text Available Reversible logic is a new technique to reduce the power dissipation. There is no loss of information in reversible logic and produces unique output for specified inputs and vice-versa. There is no loss of bits so the power dissipation is reduced. In this paper new design for high speed, low power and area efficient 8-bit Vedic multiplier using Urdhva Tiryakbhyam Sutra (ancient methodology of Indian mathematics is introduced and implemented using Reversible logic to generate products with low power dissipation. UT Sutra generates partial product and sum in single step with less number of adders unit when compare to conventional booth and array multipliers which will reduce the delay and area utilized, Reversible logic will reduce the power dissipation. An 8-bit Vedic multiplier is realized using a 4-bit Vedic multiplier and modified ripple carry adders. The proposed logic blocks are implemented using Verilog HDL programming language, simulation using Xilinx ISE software.
Fault Model for Testable Reversible Toffoli Gates
Directory of Open Access Journals (Sweden)
Yu Pang
2012-09-01
Full Text Available Techniques of reversible circuits can be used in low-power microchips and quantum communications. Current most works focuses on synthesis of reversible circuits but seldom for fault testing which is sure to be an important step in any robust implementation. In this study, we propose a Universal Toffoli Gate (UTG with four inputs which can realize all basic Boolean functions. The all single stuck-at faults are analyzed and a test-set with minimum test vectors is given. Using the proposed UTG, it is easy to implement a complex reversible circuit and test all stuck-at faults of the circuit. The experiments show that reversible circuits constructed by the UTGs have less quantum cost and test vectors compared to other works.
Design of High speed Low Power Reversible Vedic multiplier and Reversible Divider
Directory of Open Access Journals (Sweden)
Srikanth G Department of Electronics & Communication Engineerig, Indur Institute of Engineering & Technology, Siddipet, Medak, JNTUH University, Telangana, India.
2014-09-01
Full Text Available This paper bring out a 32X32 bit reversible Vedic multiplier using "Urdhva Tiryakabhayam" sutra meaning vertical and crosswise, is designed using reversible logic gates, which is the first of its kind. Also in this paper we propose a new reversible unsigned division circuit. This circuit is designed using reversible components like reversible parallel adder, reversible left-shift register, reversible multiplexer, reversible n-bit register with parallel load line. The reversible vedic multiplier and reversible divider modules have been written in Verilog HDL and then synthesized and simulated using Xilinx ISE 9.2i. This reversible vedic multiplier results shows less delay and less power consumption by comparing with array multiplier.
Tunable silica-on-silicon planar lightwave circuits for signal processing applications
Callender, Claire L.; Dumais, Patrick; Jacob, Sarkis; Blanchetière, Chantal; Ledderhof, Chris; Samadi, Payman; Kostko, Irina A.; Xia, Bing; Chen, Lawrence R.
2009-06-01
The development of silica planar lightwave circuits (PLCs) employing multiple phase-shifting elements to achieve optical signal processing is presented. Thermo-optic switching in Mach Zehnder interferometer (MZI) structures has been demonstrated with typical switching powers of 250-300 mW. 6-loop lattice-form MZI devices designed with specific filter responses have been fabricated, packaged, and tested. 10 GHz to 40 GHz pulse repetition rate multiplication has been achieved, and the tunability of the 6 phase control elements allows the generation of arbitrary 4-bit binary code patterns. Further improvements in complexity, power consumption, loss, and polarization sensitivity in these devices are discussed.
Chen, Wai-Kai
2009-01-01
Featuring hundreds of illustrations and references, this book provides the information on analog and VLSI circuits. It focuses on analog integrated circuits, presenting the knowledge on monolithic device models, analog circuit cells, high performance analog circuits, RF communication circuits, and PLL circuits.
1979-01-01
The U-shaped wire devices in the upper photo are Digi-Klipsm; aids to compact packaging of electrical and electronic devices. They serve as connectors linking the circuitry of one circuit board with another in multi-board systems. Digi-Klips were originally developed for Goddard Space Flight Center to meet a need for lightweight, reliable connectors to replace hand-wired connections formerly used in spacecraft. They are made of beryllium copper wire, noted for its excellent conductivity and its spring-like properties, which assure solid electrical contact over a long period of time.
Collective of mechatronics circuit
Energy Technology Data Exchange (ETDEWEB)
NONE
1987-02-15
This book is composed of three parts, which deals with mechatronics system about sensor, circuit and motor. The contents of the first part are photo sensor of collector for output, locating detection circuit with photo interrupts, photo sensor circuit with CdS cell and lamp, interface circuit with logic and LED and temperature sensor circuit. The second part deals with oscillation circuit with crystal, C-R oscillation circuit, F-V converter, timer circuit, stability power circuit, DC amp and DC-DC converter. The last part is comprised of bridge server circuit, deformation bridge server, controlling circuit of DC motor, controlling circuit with IC for PLL and driver circuit of stepping motor and driver circuit of Brushless.
Design of a novel quantum reversible ternary up-counter
Houshmand, Pouran; Haghparast, Majid
2015-08-01
Reversible logic has been recently considered as an interesting and important issue in designing combinational and sequential circuits. The combination of reversible logic and multi-valued logic can improve power dissipation, time and space utilization rate of designed circuits. Only few works have been reported about sequential reversible circuits and almost there are no paper exhibited about quantum ternary reversible counter. In this paper, first we designed 2-qutrit and 3-qutrit quantum reversible ternary up-counters using quantum ternary reversible T-flip-flop and quantum reversible ternary gates. Then we proposed generalized quantum reversible ternary n-qutrit up-counter. We also introduced a new approach for designing any type of n-qutrit ternary and reversible counter. According to the results, we can conclude that applying second approach quantum reversible ternary up-counter is better than the others.
Kulikova, Olga
2016-01-01
This thesis was focused on the analysis of the concept of reverse logistics and actual reverse processes which are implemented in mining industry and finding solutions for the optimization of reverse logistics in this sphere. The objective of this paper was the assessment of the development of reverse logistics in mining industry on the example of potash production. The theoretical part was based on reverse logistics and mining waste related literature and provided foundations for further...
Commutation circuit for an HVDC circuit breaker
Premerlani, William J.
1981-01-01
A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components.
Basic Reversible Logic Gates and It’s Qca Implementation
Directory of Open Access Journals (Sweden)
Papiya Biswas,
2014-06-01
Full Text Available Reversible logic has various applications in various field like in Nanotechnology, quantum computing, Low power CMOS, Optical computing and DNA computing, etc. Quantum computation is One of the most important applications of the reversible logic.Basically reversible circuits do not lose information & reversible computation is performed only when system comprises of reversible gates. The reversible logic is design,main purposes are - decrease quantum cost, depth of the circuits & the number of garbage output. This paper provides the basic‘s of reversible logic gates & its implementation in qca.
Logic circuits from zero forcing.
Burgarth, Daniel; Giovannetti, Vittorio; Hogben, Leslie; Severini, Simone; Young, Michael
We design logic circuits based on the notion of zero forcing on graphs; each gate of the circuits is a gadget in which zero forcing is performed. We show that such circuits can evaluate every monotone Boolean function. By using two vertices to encode each logical bit, we obtain universal computation. We also highlight a phenomenon of "back forcing" as a property of each function. Such a phenomenon occurs in a circuit when the input of gates which have been already used at a given time step is further modified by a computation actually performed at a later stage. Finally, we show that zero forcing can be also used to implement reversible computation. The model introduced here provides a potentially new tool in the analysis of Boolean functions, with particular attention to monotonicity. Moreover, in the light of applications of zero forcing in quantum mechanics, the link with Boolean functions may suggest a new directions in quantum control theory and in the study of engineered quantum spin systems. It is an open technical problem to verify whether there is a link between zero forcing and computation with contact circuits.
Analog circuit design designing dynamic circuit response
Feucht, Dennis
2010-01-01
This second volume, Designing Dynamic Circuit Response builds upon the first volume Designing Amplifier Circuits by extending coverage to include reactances and their time- and frequency-related behavioral consequences.
Reconfigurable Optical Directed-Logic Circuits
2015-11-20
and their switching delays do not accumulate. This is in contrast to conventional logic circuits where gate delays are cascaded, resulting in a...transistor logic circuits wherein gate delays are cascaded resulting in increased latencies with increased logic elements. Thus directed- logic ... reverse biased at -5 V ( logic ‘1’) and the transmission is high when the bias voltage is zero ( logic ‘0’). So the switch works in the block/pass mode
Analog circuit design designing waveform processing circuits
Feucht, Dennis
2010-01-01
The fourth volume in the set Designing Waveform-Processing Circuits builds on the previous 3 volumes and presents a variety of analog non-amplifier circuits, including voltage references, current sources, filters, hysteresis switches and oscilloscope trigger and sweep circuitry, function generation, absolute-value circuits, and peak detectors.
Parallelization of Reversible Ripple-carry Adders
DEFF Research Database (Denmark)
Thomsen, Michael Kirkedal; Axelsen, Holger Bock
2009-01-01
The design of fast arithmetic logic circuits is an important research topic for reversible and quantum computing. A special challenge in this setting is the computation of standard arithmetical functions without the generation of \\emph{garbage}. Here, we present a novel parallelization scheme...... wherein $m$ parallel $k$-bit reversible ripple-carry adders are combined to form a reversible $mk$-bit \\emph{ripple-block carry adder} with logic depth $\\mathcal{O}(m+k)$ for a \\emph{minimal} logic depth $\\mathcal{O}(\\sqrt{mk})$, thus improving on the $mk$-bit ripple-carry adder logic depth $\\mathcal......{O}(m\\cdot k)$. The underlying mechanisms of the parallelization scheme are formally proven correct. We also show designs for garbage-less reversible comparison circuits. We compare the circuit costs of the resulting ripple-block carry adder with known optimized reversible ripple-carry adders in measures...
Garbage-free reversible constant multipliers for arbitrary integers
DEFF Research Database (Denmark)
Mogensen, Torben Ægidius
2013-01-01
We present a method for constructing reversible circuitry for multiplying integers by arbitrary integer constants. The method is based on Mealy machines and gives circuits whose size are (in the worst case) linear in the size of the constant. This makes the method unsuitable for large constants......, but gives quite compact circuits for small constants. The circuits use no garbage or ancillary lines....
Parallel Optimization of a Reversible (Quantum) Ripple-Carry Adder
DEFF Research Database (Denmark)
Thomsen, Michael Kirkedal; Axelsen, Holger Bock
2008-01-01
The design of fast arithmetic logic circuits is an important research topic for reversible and quantum computing. A special challenge in this setting is the computation of standard arithmetical functions without the generation of garbage. The CDKM-adder is a recent garbage-less reversible (quantum......(mk). We also show designs for garbage-less reversible set-less-than circuits. We compare the circuit costs of the CDKM and parallel adder in measures of circuit delay, width, gate and transistor count, and find that the parallelized adder offers significant speedups at realistic word sizes with modest...
Guo, Xinjie; Merrikh-Bayat, Farnood; Gao, Ligang; Hoskins, Brian D; Alibart, Fabien; Linares-Barranco, Bernabe; Theogarajan, Luke; Teuscher, Christof; Strukov, Dmitri B
2015-01-01
The purpose of this work was to demonstrate the feasibility of building recurrent artificial neural networks with hybrid complementary metal oxide semiconductor (CMOS)/memristor circuits. To do so, we modeled a Hopfield network implementing an analog-to-digital converter (ADC) with up to 8 bits of precision. Major shortcomings affecting the ADC's precision, such as the non-ideal behavior of CMOS circuitry and the specific limitations of memristors, were investigated and an effective solution was proposed, capitalizing on the in-field programmability of memristors. The theoretical work was validated experimentally by demonstrating the successful operation of a 4-bit ADC circuit implemented with discrete Pt/TiO2- x /Pt memristors and CMOS integrated circuit components.
Low Cost Reversible Signed Comparator
Directory of Open Access Journals (Sweden)
Farah Sharmin
2013-10-01
Full Text Available Nowadays exponential advancement in reversible comp utation has lead to better fabrication and integration process. It has become very popular ove r the last few years since reversible logic circuit s dramatically reduce energy loss. It consumes less p ower by recovering bit loss from its unique input-o utput mapping. This paper presents two new gates called RC-I and RC-II to design an n-bit signed binary comparator where simulation results show that the p roposed circuit works correctly and gives significa ntly better performance than the existing counterparts. An algorithm has been presented in this paper for constructing an optimized reversible n-bit signed c omparator circuit. Moreover some lower bounds have been proposed on the quantum cost, the numbers of g ates used and the number of garbage outputs generated for designing a low cost reversible sign ed comparator. The comparative study shows that the proposed design exhibits superior performance consi dering all the efficiency parameters of reversible logic design which includes number of gates used, quantum cost, garbage output and constant inputs. This proposed design has certainly outperformed all the other existing approaches.
Pridham, G J
2013-01-01
Solid-State Circuits provides an introduction to the theory and practice underlying solid-state circuits, laying particular emphasis on field effect transistors and integrated circuits. Topics range from construction and characteristics of semiconductor devices to rectification and power supplies, low-frequency amplifiers, sine- and square-wave oscillators, and high-frequency effects and circuits. Black-box equivalent circuits of bipolar transistors, physical equivalent circuits of bipolar transistors, and equivalent circuits of field effect transistors are also covered. This volume is divided
Simple Autonomous Chaotic Circuits
Piper, Jessica; Sprott, J.
2010-03-01
Over the last several decades, numerous electronic circuits exhibiting chaos have been proposed. Non-autonomous circuits with as few as two components have been developed. However, the operation of such circuits relies on the non-ideal behavior of the devices used, and therefore the circuit equations can be quite complex. In this paper, we present two simple autonomous chaotic circuits using only opamps and linear passive components. The circuits each use one opamp as a comparator, to provide a signum nonlinearity. The chaotic behavior is robust, and independent of nonlinearities in the passive components. Moreover, the circuit equations are among the algebraically simplest chaotic systems yet constructed.
Santiago, John
2013-01-01
Circuits overloaded from electric circuit analysis? Many universities require that students pursuing a degree in electrical or computer engineering take an Electric Circuit Analysis course to determine who will ""make the cut"" and continue in the degree program. Circuit Analysis For Dummies will help these students to better understand electric circuit analysis by presenting the information in an effective and straightforward manner. Circuit Analysis For Dummies gives you clear-cut information about the topics covered in an electric circuit analysis courses to help
Current limiter circuit system
Energy Technology Data Exchange (ETDEWEB)
Witcher, Joseph Brandon; Bredemann, Michael V.
2017-09-05
An apparatus comprising a steady state sensing circuit, a switching circuit, and a detection circuit. The steady state sensing circuit is connected to a first, a second and a third node. The first node is connected to a first device, the second node is connected to a second device, and the steady state sensing circuit causes a scaled current to flow at the third node. The scaled current is proportional to a voltage difference between the first and second node. The switching circuit limits an amount of current that flows between the first and second device. The detection circuit is connected to the third node and the switching circuit. The detection circuit monitors the scaled current at the third node and controls the switching circuit to limit the amount of the current that flows between the first and second device when the scaled current is greater than a desired level.
Reversible logic gates on Physarum Polycephalum
Energy Technology Data Exchange (ETDEWEB)
Schumann, Andrew [University of Information Technology and Management, Sucharskiego 2, Rzeszow, 35-225 (Poland)
2015-03-10
In this paper, we consider possibilities how to implement asynchronous sequential logic gates and quantum-style reversible logic gates on Physarum polycephalum motions. We show that in asynchronous sequential logic gates we can erase information because of uncertainty in the direction of plasmodium propagation. Therefore quantum-style reversible logic gates are more preferable for designing logic circuits on Physarum polycephalum.
Simon, R. A.
1986-01-01
Electrical properties of solenoids imitated for tests of control circuits. Simulation circuit imitates voltage and current responses of two engine-controlling solenoids. Used in tests of programs of digital engine-control circuits, also provides electronic interface with circuits imitating electrical properties of pressure sensors and linear variable-differential transformers. Produces voltages, currents, delays, and discrete turnon and turnoff signals representing operation of solenoid in engine-control relay. Many such circuits used simulating overall engine circuitry.
Wire recycling for quantum circuit optimization
Paler, Alexandru; Wille, Robert; Devitt, Simon J.
2016-10-01
Quantum information processing is expressed using quantum bits (qubits) and quantum gates which are arranged in terms of quantum circuits. Here, each qubit is associated with a quantum circuit wire which is used to conduct the desired operations. Most of the existing quantum circuits allocate a single quantum circuit wire for each qubit and hence introduce significant overhead. In fact, qubits are usually not needed during the entire computation, only between their initialization and measurement. Before and after that, corresponding wires may be used by other qubits. In this work, we propose a solution which exploits this fact in order to optimize the design of quantum circuits with respect to the required wires. To this end, we introduce a representation of the lifetimes of all qubits which is used to analyze the respective need for wires. Based on this analysis, a method is proposed which "recycles" the available wires and, as a result, reduces the size of the resulting circuit. Numerical tests based on established reversible and fault-tolerant quantum circuits confirm that the proposed solution reduces the number of wires by more than 90% compared to unoptimized quantum circuits.
Novel designs of nanometric parity preserving reversible compressor
Shoaei, Soghra; Haghparast, Majid
2014-08-01
Reversible logic is a new field of study that has applications in optical information processing, low power CMOS design, DNA computing, bioinformatics, and nanotechnology. Low power consumption is a basic issue in VLSI circuits today. To prevent the distribution of errors in the quantum circuit, the reversible logic gates must be converted into fault-tolerant quantum operations. Parity preserving is used to realize fault tolerant in this circuits. This paper proposes a new parity preserving reversible gate. We named it NPPG gate. The most significant aspect of the NPPG gate is that it can be used to produce parity preserving reversible full adder circuit. The proposed parity preserving reversible full adder using NPPG gate is more efficient than the existing designs in term of quantum cost and it is optimized in terms of number of constant inputs and garbage outputs. Compressors are of importance in VLSI and digital signal processing applications. Effective VLSI compressors reduce the impact of carry propagation of arithmetic operations. They are built from the full adder blocks. We also proposed three new approaches of parity preservation reversible 4:2 compressor circuits. The third design is better than the previous two in terms of evaluation parameters. The important contributions have been made in the literature toward the design of reversible 4:2 compressor circuits; however, there are not efforts toward the design of parity preservation reversible 4:2 compressor circuits. All the scales are in the nanometric criteria.
Thermal rectification in nonlinear quantum circuits
DEFF Research Database (Denmark)
Ruokola, T.; Ojanen, T.; Jauho, Antti-Pekka
2009-01-01
We present a theoretical study of radiative heat transport in nonlinear solid-state quantum circuits. We give a detailed account of heat rectification effects, i.e., the asymmetry of heat current with respect to a reversal of the thermal gradient, in a system consisting of two reservoirs at finite...
Hidden circuits and argumentation
Leinonen, Risto; Kesonen, Mikko H. P.; Hirvonen, Pekka E.
2016-11-01
Despite the relevance of DC circuits in everyday life and schools, they have been shown to cause numerous learning difficulties at various school levels. In the course of this article, we present a flexible method for teaching DC circuits at lower secondary level. The method is labelled as hidden circuits, and the essential idea underlying hidden circuits is in hiding the actual wiring of DC circuits, but to make their behaviour evident for pupils. Pupils are expected to find out the wiring of the circuit which should enhance their learning of DC circuits. We present two possible ways to utilise hidden circuits in a classroom. First, they can be used to test and enhance pupils’ conceptual understanding when pupils are expected to find out which one of the offered circuit diagram options corresponds to the actual circuit shown. This method aims to get pupils to evaluate the circuits holistically rather than locally, and as a part of that aim this method highlights any learning difficulties of pupils. Second, hidden circuits can be used to enhance pupils’ argumentation skills with the aid of argumentation sheet that illustrates the main elements of an argument. Based on the findings from our co-operating teachers and our own experiences, hidden circuits offer a flexible and motivating way to supplement teaching of DC circuits.
Intuitive analog circuit design
Thompson, Marc
2013-01-01
Intuitive Analog Circuit Design outlines ways of thinking about analog circuits and systems that let you develop a feel for what a good, working analog circuit design should be. This book reflects author Marc Thompson's 30 years of experience designing analog and power electronics circuits and teaching graduate-level analog circuit design, and is the ideal reference for anyone who needs a straightforward introduction to the subject. In this book, Dr. Thompson describes intuitive and ""back-of-the-envelope"" techniques for designing and analyzing analog circuits, including transistor amplifi
The circuit designer's companion
Williams, Tim
2013-01-01
The Circuit Designer's Companion covers the theoretical aspects and practices in analogue and digital circuit design. Electronic circuit design involves designing a circuit that will fulfill its specified function and designing the same circuit so that every production model of it will fulfill its specified function, and no other undesired and unspecified function.This book is composed of nine chapters and starts with a review of the concept of grounding, wiring, and printed circuits. The subsequent chapters deal with the passive and active components of circuitry design. These topics are foll
M.P. de Brito (Marisa); S.D.P. Flapper; R. Dekker (Rommert)
2002-01-01
textabstractThis paper gives an overview of scientific literature that describes and discusses cases of reverse logistics activities in practice. Over sixty case studies are considered. Based on these studies we are able to indicate critical factors for the practice of reverse logistics. In addi
Evolving Quantum Circuits using Genetic Algorithms
Prashant
2005-01-01
This paper describes an application of genetic algorithm for evolving quantum computing circuits. The circuits use reversible one qubit and two qubit gates which are applied on a multi-qubit system having some initial state. The genetic algorithm automatically searches the space and comes out with the appropriate circuit design, which yields desired output state. The fitness function used matches the output with desired output and the search stops when it is found. The fitness value becomes higher if the output is close to the desired output. The paper briefly discusses the operation of a quantum gate over the multi-qubit system. The paper also demonstrates some examples of the evolved circuits using the algorithm.
Electrical Circuits and Water Analogies
Smith, Frederick A.; Wilson, Jerry D.
1974-01-01
Briefly describes water analogies for electrical circuits and presents plans for the construction of apparatus to demonstrate these analogies. Demonstrations include series circuits, parallel circuits, and capacitors. (GS)
Design of a 16 gray scales 320×240 pixels OLED-on-silicon driving circuit
Institute of Scientific and Technical Information of China (English)
Huang Ran; Wang Xiaohui; Wang Wenbo; Du Huan; Han Zhengsheng
2009-01-01
A 320×240 pixel organic-light-emitting-diode-on-silicon (OLEDoS) driving circuit is implemented using the standard 0.5 μm CMOS process of CSMC. It gives 16 gray scales with integrated 4 bit D/A converters. A three-transistor voltage-programmed OLED pixel driver is proposed, which can realize the very small current driving required for the OLEDoS microdisplay. Both the D/A converter and the pixel driver are implemented with pMOS devices. The pass-transistor and capacitance in the OLED pixel driver can be used to sample the output of the D/A converter. An additional pMOS is added to OLED pixel driver, which is used to control the D/A converter operating only when one row is on. This can reduce the circuit's power consumption. This driving circuit can work properly in a frame frequency of 50 Hz, and the final layout of this circuit is given. The pixel area is 28.4×28.4 μm2 and the display area is 10.7×8.0 mm2 (the diagonal is about 13 mm). The measured pixel gray scale voltage shows that the function of the driver circuit is correct, and the power consumption of the chip is about 350 mW.
DEFF Research Database (Denmark)
Hansen, Kristoffer Arnsfelt; Miltersen, Peter Bro; Vinay, V
2006-01-01
We consider the computational power of constant width polynomial size cylindrical circuits and nondeterministic branching programs. We show that every function computed by a Pi2 o MOD o AC0 circuit can also be computed by a constant width polynomial size cylindrical nondeterministic branching...... program (or cylindrical circuit) and that every function computed by a constant width polynomial size cylindrical circuit belongs to ACC0....
REA, Editors of
2012-01-01
REA's Essentials provide quick and easy access to critical information in a variety of different fields, ranging from the most basic to the most advanced. As its name implies, these concise, comprehensive study guides summarize the essentials of the field covered. Essentials are helpful when preparing for exams, doing homework and will remain a lasting reference source for students, teachers, and professionals. Electric Circuits I includes units, notation, resistive circuits, experimental laws, transient circuits, network theorems, techniques of circuit analysis, sinusoidal analysis, polyph
Treu, Jr., Charles A.
1999-08-31
A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes.
Louwsma, S.M.; Vertregt, Maarten
2010-01-01
A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital converte
Louwsma, S.M.; Vertregt, Maarten
2011-01-01
A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital converte
DEFF Research Database (Denmark)
2009-01-01
A load testing circuit a circuit tests the load impedance of a load connected to an amplifier. The load impedance includes a first terminal and a second terminal, the load testing circuit comprising a signal generator providing a test signal of a defined bandwidth to the first terminal of the load...
Bergstra, J.A.; Ponse, A.
2010-01-01
Short-circuit evaluation denotes the semantics of propositional connectives in which the second argument is only evaluated if the first argument does not suffice to determine the value of the expression. In programming, short-circuit evaluation is widely used. A short-circuit logic is a variant of p
Louwsma, Simon Minze; Vertregt, Maarten
2011-01-01
A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital converte
Louwsma, Simon Minze; Vertregt, Maarten
2010-01-01
A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital converte
Design of Digital Adder Using Reversible Logic
Directory of Open Access Journals (Sweden)
Gowthami P
2016-02-01
Full Text Available Reversible logic circuits have promising applications in Quantum computing, Low power VLSI design, Nanotechnology, optical computing, DNA computing and Quantum dot cellular automata. In spite of them another main prominent application of reversible logic is Quantum computers where the quantum devices are essential which are ideally operated at ultra high speed with less power dissipation must be built from reversible logic components. This makes the reversible logic as a one of the most promising research areas in the past few decades. In VLSI design the delay is the one of the major issue along with area and power. This paper presents the implementation of Ripple Carry Adder (RCA circuits using reversible logic gates are discussed.
Variable Block Carry Skip Logic using Reversible Gates
Islam, Md. Rafiqul; Islam, Md. Saiful; Karim, Muhammad Rezaul; Mahmud, Abdullah Al; Babu, Hafiz Md. Hasan
2010-01-01
Reversible circuits have applications in digital signal processing, computer graphics, quantum computation and cryptography. In this paper, a generalized k*k reversible gate family is proposed and a 3*3 gate of the family is discussed. Inverter, AND, OR, NAND, NOR, and EXOR gates can be realized by this gate. Implementation of a full-adder circuit using two such 3*3 gates is given. This full-adder circuit contains only two reversible gates and produces no extra garbage outputs. The proposed f...
DEFF Research Database (Denmark)
Hansen, Kristoffer Arnsfelt; Podolskii, Vladimir V.
2010-01-01
We initiate a systematic study of constant depth Boolean circuits built using exact threshold gates. We consider both unweighted and weighted exact threshold gates and introduce corresponding circuit classes. We next show that this gives a hierarchy of classes that seamlessly interleave with the ......We initiate a systematic study of constant depth Boolean circuits built using exact threshold gates. We consider both unweighted and weighted exact threshold gates and introduce corresponding circuit classes. We next show that this gives a hierarchy of classes that seamlessly interleave...... with the well-studied corresponding hierarchies defined using ordinary threshold gates. A major open problem in Boolean circuit complexity is to provide an explicit super-polynomial lower bound for depth two threshold circuits. We identify the class of depth two exact threshold circuits as a natural subclass...
Ochoa, Agustin
2016-01-01
This book describes a consistent and direct methodology to the analysis and design of analog circuits with particular application to circuits containing feedback. The analysis and design of circuits containing feedback is generally presented by either following a series of examples where each circuit is simplified through the use of insight or experience (someone else’s), or a complete nodal-matrix analysis generating lots of algebra. Neither of these approaches leads to gaining insight into the design process easily. The author develops a systematic approach to circuit analysis, the Driving Point Impedance and Signal Flow Graphs (DPI/SFG) method that does not require a-priori insight to the circuit being considered and results in factored analysis supporting the design function. This approach enables designers to account fully for loading and the bi-directional nature of elements both in the feedback path and in the amplifier itself, properties many times assumed negligible and ignored. Feedback circuits a...
Reversible thyristor converters of brushless synchronous compensators
Directory of Open Access Journals (Sweden)
А.М.Galynovskiy
2013-12-01
Full Text Available Behavior of models of three-phase-to-single-phase rotary reversible thyristor converters of brushless synchronous compensators in a circuit simulation system is analyzed. It is shown that combined control mode of opposite-connected thyristors may result in the exciter armature winding short circuits both at the thyristor feed-forward and lagging current delay angles. It must be taken into consideration when developing brushless compensator excitation systems.
Optimal design of APD biasing circuit
Institute of Scientific and Technical Information of China (English)
SUN Chun-sheng; QIN Shi-qiao; WANG Xing-shu; ZHU Dong-hua
2007-01-01
This paper proposes a control method for avalanche photodiode (APD) reverse bias with temperature compensation and load resistance compensation. The influence of background light and load resistance on APD detection circuit is analyzed in detail. A theoretical model of temperature compensation and load resistance compensation is established, which is used for APD biasing circuit designing. It is predicted that this control method is especially suitable for LD laser range finder used on vehicles. Experimental results confirm thatthe design proposed in this paper can considerablely improve the performance of range finder.
Highly Uniform Carbon Nanotube Field-Effect Transistors and Medium Scale Integrated Circuits.
Chen, Bingyan; Zhang, Panpan; Ding, Li; Han, Jie; Qiu, Song; Li, Qingwen; Zhang, Zhiyong; Peng, Lian-Mao
2016-08-10
Top-gated p-type field-effect transistors (FETs) have been fabricated in batch based on carbon nanotube (CNT) network thin films prepared from CNT solution and present high yield and highly uniform performance with small threshold voltage distribution with standard deviation of 34 mV. According to the property of FETs, various logical and arithmetical gates, shifters, and d-latch circuits were designed and demonstrated with rail-to-rail output. In particular, a 4-bit adder consisting of 140 p-type CNT FETs was demonstrated with higher packing density and lower supply voltage than other published integrated circuits based on CNT films, which indicates that CNT based integrated circuits can reach to medium scale. In addition, a 2-bit multiplier has been realized for the first time. Benefitted from the high uniformity and suitable threshold voltage of CNT FETs, all of the fabricated circuits based on CNT FETs can be driven by a single voltage as small as 2 V.
1980-02-01
will have been introduced. 9. Reversible celular autemata We shall assume the reader to have some familiarity with the concept of cel- lular...10003 Mr. Kin B. Thcmpson 1 copy Technical Director Information Systems Divisia.i Naval Research Laboratory (OP-91T) Technical Information Division
Regenerative feedback resonant circuit
Jones, A. Mark; Kelly, James F.; McCloy, John S.; McMakin, Douglas L.
2014-09-02
A regenerative feedback resonant circuit for measuring a transient response in a loop is disclosed. The circuit includes an amplifier for generating a signal in the loop. The circuit further includes a resonator having a resonant cavity and a material located within the cavity. The signal sent into the resonator produces a resonant frequency. A variation of the resonant frequency due to perturbations in electromagnetic properties of the material is measured.
Dobkin, Bob
2012-01-01
Analog circuit and system design today is more essential than ever before. With the growth of digital systems, wireless communications, complex industrial and automotive systems, designers are being challenged to develop sophisticated analog solutions. This comprehensive source book of circuit design solutions aids engineers with elegant and practical design techniques that focus on common analog challenges. The book's in-depth application examples provide insight into circuit design and application solutions that you can apply in today's demanding designs. <
Parallelizing quantum circuit synthesis
Di Matteo, Olivia; Mosca, Michele
2016-01-01
Quantum circuit synthesis is the process in which an arbitrary unitary operation is decomposed into a sequence of gates from a universal set, typically one which a quantum computer can implement both efficiently and fault-tolerantly. As physical implementations of quantum computers improve, the need is growing for tools which can effectively synthesize components of the circuits and algorithms they will run. Existing algorithms for exact, multi-qubit circuit synthesis scale exponentially in t...
Hickman, Ian
2013-01-01
Analog Circuits Cookbook presents articles about advanced circuit techniques, components and concepts, useful IC for analog signal processing in the audio range, direct digital synthesis, and ingenious video op-amp. The book also includes articles about amplitude measurements on RF signals, linear optical imager, power supplies and devices, and RF circuits and techniques. Professionals and students of electrical engineering will find the book informative and useful.
Electronic devices and circuits
Pridham, Gordon John
1968-01-01
Electronic Devices and Circuits, Volume 1 deals with the design and applications of electronic devices and circuits such as passive components, diodes, triodes and transistors, rectification and power supplies, amplifying circuits, electronic instruments, and oscillators. These topics are supported with introductory network theory and physics. This volume is comprised of nine chapters and begins by explaining the operation of resistive, inductive, and capacitive elements in direct and alternating current circuits. The theory for some of the expressions quoted in later chapters is presented. Th
Marston, R M
1995-01-01
CMOS Circuits Manual is a user's guide for CMOS. The book emphasizes the practical aspects of CMOS and provides circuits, tables, and graphs to further relate the fundamentals with the applications. The text first discusses the basic principles and characteristics of the CMOS devices. The succeeding chapters detail the types of CMOS IC, including simple inverter, gate and logic ICs and circuits, and complex counters and decoders. The last chapter presents a miscellaneous collection of two dozen useful CMOS circuits. The book will be useful to researchers and professionals who employ CMOS circu
Chen, Wai-Kai
2003-01-01
A bestseller in its first edition, The Circuits and Filters Handbook has been thoroughly updated to provide the most current, most comprehensive information available in both the classical and emerging fields of circuits and filters, both analog and digital. This edition contains 29 new chapters, with significant additions in the areas of computer-aided design, circuit simulation, VLSI circuits, design automation, and active and digital filters. It will undoubtedly take its place as the engineer's first choice in looking for solutions to problems encountered in the design, analysis, and behavi
Timergenerator circuits manual
Marston, R M
2013-01-01
Timer/Generator Circuits Manual is an 11-chapter text that deals mainly with waveform generator techniques and circuits. Each chapter starts with an explanation of the basic principles of its subject followed by a wide range of practical circuit designs. This work presents a total of over 300 practical circuits, diagrams, and tables.Chapter 1 outlines the basic principles and the different types of generator. Chapters 2 to 9 deal with a specific type of waveform generator, including sine, square, triangular, sawtooth, and special waveform generators pulse. These chapters also include pulse gen
Security electronics circuits manual
MARSTON, R M
1998-01-01
Security Electronics Circuits Manual is an invaluable guide for engineers and technicians in the security industry. It will also prove to be a useful guide for students and experimenters, as well as providing experienced amateurs and DIY enthusiasts with numerous ideas to protect their homes, businesses and properties.As with all Ray Marston's Circuits Manuals, the style is easy-to-read and non-mathematical, with the emphasis firmly on practical applications, circuits and design ideas. The ICs and other devices used in the practical circuits are modestly priced and readily available ty
Wolfendale, E
2013-01-01
MOS Integral Circuit Design aims to help in the design of integrated circuits, especially large-scale ones, using MOS Technology through teaching of techniques, practical applications, and examples. The book covers topics such as design equation and process parameters; MOS static and dynamic circuits; logic design techniques, system partitioning, and layout techniques. Also featured are computer aids such as logic simulation and mask layout, as well as examples on simple MOS design. The text is recommended for electrical engineers who would like to know how to use MOS for integral circuit desi
Printed circuit board industry.
LaDou, Joseph
2006-05-01
The printed circuit board is the platform upon which microelectronic components such as semiconductor chips and capacitors are mounted. It provides the electrical interconnections between components and is found in virtually all electronics products. Once considered low technology, the printed circuit board is evolving into a high-technology product. Printed circuit board manufacturing is highly complicated, requiring large equipment investments and over 50 process steps. Many of the high-speed, miniaturized printed circuit boards are now manufactured in cleanrooms with the same health and safety problems posed by other microelectronics manufacturing. Asia produces three-fourths of the world's printed circuit boards. In Asian countries, glycol ethers are the major solvents used in the printed circuit board industry. Large quantities of hazardous chemicals such as formaldehyde, dimethylformamide, and lead are used by the printed circuit board industry. For decades, chemically intensive and often sloppy manufacturing processes exposed tens of thousands of workers to a large number of chemicals that are now known to be reproductive toxicants and carcinogens. The printed circuit board industry has exposed workers to high doses of toxic metals, solvents, acids, and photolithographic chemicals. Only recently has there been any serious effort to diminish the quantity of lead distributed worldwide by the printed circuit board industry. Billions of electronics products have been discarded in every region of the world. This paper summarizes recent regulatory and enforcement efforts.
Implementation of Effective Code Converters using Reversible Logic Gates
Directory of Open Access Journals (Sweden)
Ponnuru Koteswara Rao
2016-05-01
Full Text Available aThe development in the field of nanometer technology leads to minimize the power consumption of logic circuits. Reversible logic design has been one of the promising technologies gaining greater interest due to less dissipation of heat and low power consumption. In the digital design, the code converters are widely used process. So, the reversible logic gates and reversible circuits for realizing code converters like as Binary to Gray code, Gray to Binary code, BCD to Excess 3 code, Excess 3 to BCD codes using reversible logic gates is proposed. Designing of reversible logic circuit is challenging task, since not enough number of gates are available for design. Reversible processor design needs its building blocks should be reversible in this view the designing of reversible code converters became essential one. In the digital domain, data or information is represented by a combination of 0’s and 1’s. A code is basically the pattern of these 0’s and 1’s used to represent the data. Code converters are a class of combinational digital circuits that are used to convert one type of code in to another. The proposed design leads to the reduction of power consumption compared with conventional logic circuits
Synchronizing Hyperchaotic Circuits
DEFF Research Database (Denmark)
Tamasevicius, Arunas; Cenys, Antanas; Namajunas, Audrius
1997-01-01
Regarding possible applications to secure communications the technique of synchronizing hyperchaotic circuits with a single dynamical variable is discussed. Several specific examples including the fourth-order circuits with two positive Lyapunov exponents as well as the oscillator with a delay line...... characterized by multiple positive Lyapunov exponents are reviewd....
Genetic circuit design automation.
Nielsen, Alec A K; Der, Bryan S; Shin, Jonghyeon; Vaidyanathan, Prashant; Paralanov, Vanya; Strychalski, Elizabeth A; Ross, David; Densmore, Douglas; Voigt, Christopher A
2016-04-01
Computation can be performed in living cells by DNA-encoded circuits that process sensory information and control biological functions. Their construction is time-intensive, requiring manual part assembly and balancing of regulator expression. We describe a design environment, Cello, in which a user writes Verilog code that is automatically transformed into a DNA sequence. Algorithms build a circuit diagram, assign and connect gates, and simulate performance. Reliable circuit design requires the insulation of gates from genetic context, so that they function identically when used in different circuits. We used Cello to design 60 circuits forEscherichia coli(880,000 base pairs of DNA), for which each DNA sequence was built as predicted by the software with no additional tuning. Of these, 45 circuits performed correctly in every output state (up to 10 regulators and 55 parts), and across all circuits 92% of the output states functioned as predicted. Design automation simplifies the incorporation of genetic circuits into biotechnology projects that require decision-making, control, sensing, or spatial organization.
Vick, Matthew E.
2010-01-01
The University of Colorado's Physics Education Technology (PhET) website offers free, high-quality simulations of many physics experiments that can be used in the classroom. The Circuit Construction Kit, for example, allows students to safely and constructively play with circuit components while learning the mathematics behind many circuit…
Efficient Reversible Montgomery Multiplier and Its Application to Hardware Cryptography
Directory of Open Access Journals (Sweden)
Noor M. Nayeem
2009-01-01
Full Text Available Problem Statement: Arithmetic Logic Unit (ALU of a crypto-processor and microchips leak information through power consumption. Although the cryptographic protocols are secured against mathematical attacks, the attackers can break the encryption by measuring the energy consumption. Approach: To thwart attacks, this study proposed the use of reversible logic for designing the ALU of a crypto-processor. Ideally, reversible circuits do not dissipate any energy. If reversible circuits are used, then the attacker would not be able to analyze the power consumption. In order to design the reversible ALU of a crypto-processor, reversible Carry Save Adder (CSA using Modified TSG (MTSG gates and architecture of Montgomery multiplier were proposed. For reversible implementation of Montgomery multiplier, efficient reversible multiplexers and sequential circuits such as reversible registers and shift registers were presented. Results: This study showed that modified designs perform better than the existing ones in terms of number of gates, number of garbage outputs and quantum cost. Lower bounds of the proposed designs were established by providing relevant theorems and lemmas. Conclusion: The application of reversible circuit is suitable to the field of hardware cryptography.
Reversibly Bistable Flexible Electronics
Alfaraj, Nasir
2015-05-01
Introducing the notion of transformational silicon electronics has paved the way for integrating various applications with silicon-based, modern, high-performance electronic circuits that are mechanically flexible and optically semitransparent. While maintaining large-scale production and prototyping rapidity, this flexible and translucent scheme demonstrates the potential to transform conventionally stiff electronic devices into thin and foldable ones without compromising long-term performance and reliability. In this work, we report on the fabrication and characterization of reversibly bistable flexible electronic switches that utilize flexible n-channel metal-oxide-semiconductor field-effect transistors. The transistors are fabricated initially on rigid (100) silicon substrates before they are peeled off. They can be used to control flexible batches of light-emitting diodes, demonstrating both the relative ease of scaling at minimum cost and maximum reliability and the feasibility of integration. The peeled-off silicon fabric is about 25 µm thick. The fabricated devices are transferred to a reversibly bistable flexible platform through which, for example, a flexible smartphone can be wrapped around a user’s wrist and can also be set back to its original mechanical position. Buckling and cyclic bending of such host platforms brings a completely new dimension to the development of flexible electronics, especially rollable displays.
Approximate circuits for increased reliability
Energy Technology Data Exchange (ETDEWEB)
Hamlet, Jason R.; Mayo, Jackson R.
2015-08-18
Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.
Approximate circuits for increased reliability
Energy Technology Data Exchange (ETDEWEB)
Hamlet, Jason R.; Mayo, Jackson R.
2015-12-22
Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.
Experimental Demonstration of a Quantum Circuit using Linear Optics Gates
Pittman, T B; Franson, J D
2004-01-01
Probabilistic quantum logic gates can be constructed using linear optical elements, ancilla photons, and post-selection based on the results of measurements. Here we describe an experimental demonstration of a simple quantum circuit that combines two exclusive-OR (XOR) logic gates of that kind. Although circuits using XOR gates are not reversible, they may still be useful in a variety of applications such as generating non-classical states of light.
Plasmonic Nanoguides and Circuits
Bozhevolnyi, Sergey
2008-01-01
Modern communication systems dealing with huge amounts of data at ever increasing speed try to utilize the best aspects of electronic and optical circuits. Electronic circuits are tiny but their operation speed is limited, whereas optical circuits are extremely fast but their sizes are limited by diffraction. Waveguide components utilizing surface plasmon (SP) modes were found to combine the huge optical bandwidth and compactness of electronics, and plasmonics thereby began to be considered as the next chip-scale technology. In this book, the authors concentrate on the SP waveguide configurati
Optoelectronics circuits manual
Marston, R M
2013-01-01
Optoelectronics Circuits Manual covers the basic principles and characteristics of the best known types of optoelectronic devices, as well as the practical applications of many of these optoelectronic devices. The book describes LED display circuits and LED dot- and bar-graph circuits and discusses the applications of seven-segment displays, light-sensitive devices, optocouplers, and a variety of brightness control techniques. The text also tackles infrared light-beam alarms and multichannel remote control systems. The book provides practical user information and circuitry and illustrations.
Circuit analysis with Multisim
Baez-Lopez, David
2011-01-01
This book is concerned with circuit simulation using National Instruments Multisim. It focuses on the use and comprehension of the working techniques for electrical and electronic circuit simulation. The first chapters are devoted to basic circuit analysis.It starts by describing in detail how to perform a DC analysis using only resistors and independent and controlled sources. Then, it introduces capacitors and inductors to make a transient analysis. In the case of transient analysis, it is possible to have an initial condition either in the capacitor voltage or in the inductor current, or bo
Marston, R M
2013-01-01
Modern TTL Circuits Manual provides an introduction to the basic principles of Transistor-Transistor Logic (TTL). This book outlines the major features of the 74 series of integrated circuits (ICs) and introduces the various sub-groups of the TTL family.Organized into seven chapters, this book begins with an overview of the basics of digital ICs. This text then examines the symbology and mathematics of digital logic. Other chapters consider a variety of topics, including waveform generator circuitry, clocked flip-flop and counter circuits, special counter/dividers, registers, data latches, com
Pragmatic circuits frequency domain
Eccles, William
2006-01-01
Pragmatic Circuits: Frequency Domain goes through the Laplace transform to get from the time domain to topics that include the s-plane, Bode diagrams, and the sinusoidal steady state. This second of three volumes ends with a-c power, which, although it is just a special case of the sinusoidal steady state, is an important topic with unique techniques and terminology. Pragmatic Circuits: Frequency Domain is focused on the frequency domain. In other words, time will no longer be the independent variable in our analysis. The two other volumes in the Pragmatic Circuits series include titles on DC
Gallium Arsenide Domino Circuit
Yang, Long; Long, Stephen I.
1990-01-01
Advantages include reduced power and high speed. Experimental gallium arsenide field-effect-transistor (FET) domino circuit replicated in large numbers for use in dynamic-logic systems. Name of circuit denotes mode of operation, which logic signals propagate from each stage to next when successive stages operated at slightly staggered clock cycles, in manner reminiscent of dominoes falling in a row. Building block of domino circuit includes input, inverter, and level-shifting substages. Combinational logic executed in input substage. During low half of clock cycle, result of logic operation transmitted to following stage.
Troubleshooting analog circuits
Pease, Robert A
1991-01-01
Troubleshooting Analog Circuits is a guidebook for solving product or process related problems in analog circuits. The book also provides advice in selecting equipment, preventing problems, and general tips. The coverage of the book includes the philosophy of troubleshooting; the modes of failure of various components; and preventive measures. The text also deals with the active components of analog circuits, including diodes and rectifiers, optically coupled devices, solar cells, and batteries. The book will be of great use to both students and practitioners of electronics engineering. Other
Monolithic microwave integrated circuits
Pucel, R. A.
Monolithic microwave integrated circuits (MMICs), a new microwave technology which is expected to exert a profound influence on microwave circuit designs for future military systems as well as for the commercial and consumer markets, is discussed. The book contains an historical discussion followed by a comprehensive review presenting the current status in the field. The general topics of the volume are: design considerations, materials and processing considerations, monolithic circuit applications, and CAD, measurement, and packaging techniques. All phases of MMIC technology are covered, from design to testing.
Novel Quaternary Quantum Decoder, Multiplexer and Demultiplexer Circuits
Haghparast, Majid; Monfared, Asma Taheri
2017-05-01
Multiple valued logic is a promising approach to reduce the width of the reversible or quantum circuits, moreover, quaternary logic is considered as being a good choice for future quantum computing technology hence it is very suitable for the encoded realization of binary logic functions through its grouping of 2-bits together into quaternary values. The Quaternary decoder, multiplexer, and demultiplexer are essential units of quaternary digital systems. In this paper, we have initially designed a quantum realization of the quaternary decoder circuit using quaternary 1-qudit gates and quaternary Muthukrishnan-Stroud gates. Then we have presented quantum realization of quaternary multiplexer and demultiplexer circuits using the constructed quaternary decoder circuit and quaternary controlled Feynman gates. The suggested circuits in this paper have a lower quantum cost and hardware complexity than the existing designs that are currently used in quaternary digital systems. All the scales applied in this paper are based on Nanometric area.
Novel Quaternary Quantum Decoder, Multiplexer and Demultiplexer Circuits
Haghparast, Majid; Monfared, Asma Taheri
2017-02-01
Multiple valued logic is a promising approach to reduce the width of the reversible or quantum circuits, moreover, quaternary logic is considered as being a good choice for future quantum computing technology hence it is very suitable for the encoded realization of binary logic functions through its grouping of 2-bits together into quaternary values. The Quaternary decoder, multiplexer, and demultiplexer are essential units of quaternary digital systems. In this paper, we have initially designed a quantum realization of the quaternary decoder circuit using quaternary 1-qudit gates and quaternary Muthukrishnan-Stroud gates. Then we have presented quantum realization of quaternary multiplexer and demultiplexer circuits using the constructed quaternary decoder circuit and quaternary controlled Feynman gates. The suggested circuits in this paper have a lower quantum cost and hardware complexity than the existing designs that are currently used in quaternary digital systems. All the scales applied in this paper are based on Nanometric area.
Rhee, Minsoung; Burns, Mark A
2009-11-07
We have developed pneumatic logic circuits and microprocessors built with microfluidic channels and valves in polydimethylsiloxane (PDMS). The pneumatic logic circuits perform various combinational and sequential logic calculations with binary pneumatic signals (atmosphere and vacuum), producing cascadable outputs based on Boolean operations. A complex microprocessor is constructed from combinations of various logic circuits and receives pneumatically encoded serial commands at a single input line. The device then decodes the temporal command sequence by spatial parallelization, computes necessary logic calculations between parallelized command bits, stores command information for signal transportation and maintenance, and finally executes the command for the target devices. Thus, such pneumatic microprocessors will function as a universal on-chip control platform to perform complex parallel operations for large-scale integrated microfluidic devices. To demonstrate the working principles, we have built 2-bit, 3-bit, 4-bit, and 8-bit microprocessors to control various target devices for applications such as four color dye mixing, and multiplexed channel fluidic control. By significantly reducing the need for external controllers, the digital pneumatic microprocessor can be used as a universal on-chip platform to autonomously manipulate microfluids in a high throughput manner.
Base drive circuit for a four-terminal power Darlington
Lee, Fred C.; Carter, Roy A.
1983-01-01
A high power switching circuit which utilizes a four-terminal Darlington transistor block to improve switching speed, particularly in rapid turn-off. Two independent reverse drive currents are utilized during turn off in order to expel the minority carriers of the Darlington pair at their own charge sweep-out rate. The reverse drive current may be provided by a current transformer, the secondary of which is tapped to the base terminal of the power stage of the Darlington block. In one application, the switching circuit is used in each power switching element in a chopper-inverter drive of an electric vehicle propulsion system.
Optimized design of BCD adder and Carry skip BCD adder using reversible logic gates
H.R.Bhagyalakshmi,; M K Venkatesha
2011-01-01
Reversible logic is very essential for the construction of low power, low loss computational structures which are very essential for the construction of arithmetic circuits used in quantum computation, nano technology and other low power digital circuits. In the present paper an optimized and low quantum cost one digit BCD adder and an optimized one digit carry skip BCD adder using new reversible logic gates are proposed. The proposed work is best compared to the other existing circuits.
DESIGN OF OPTIMAL CARRY SKIP ADDER AND CARRY SKIP BCD ADDER USING REVERSIBLE LOGIC GATES
Praveena Murugesan; Thanushkodi Keppanagounder
2014-01-01
Reversible logic circuits have the ability to produce zero power dissipation which has found its importance in quantum computing, optical computing and low power digital circuits. The study presents improved and efficient reversible logic circuits for carry skip adder and carry skip BCD adder. The performance of the proposed architecture is better than the existing works in terms of gate count, garbage outputs and constant inputs. This design forms the basis for different quantum ALU and embe...
Optimized design of Carry Skip BCD adder using new FHNG reversible logic gates
Directory of Open Access Journals (Sweden)
Md.Belayet Ali
2012-07-01
Full Text Available Reversible logic is very essential for the construction of low power, low loss computational structures which are very essential for the construction of arithmetic circuits used in quantum computation, nanotechnology and other low power digital circuits. In the present paper an optimized and low quantum cost one digit carry skip BCD adder using new reversible logic gates are proposed. The proposed work is best compared to the other existing circuits.
Optimized design of BCD adder and Carry skip BCD adder using reversible logic gates
Directory of Open Access Journals (Sweden)
H.R.Bhagyalakshmi,
2011-04-01
Full Text Available Reversible logic is very essential for the construction of low power, low loss computational structures which are very essential for the construction of arithmetic circuits used in quantum computation, nano technology and other low power digital circuits. In the present paper an optimized and low quantum cost one digit BCD adder and an optimized one digit carry skip BCD adder using new reversible logic gates are proposed. The proposed work is best compared to the other existing circuits.
Laurent Guiraud
1999-01-01
A printed circuit board made by scientists in the ATLAS collaboration for the transition radiaton tracker (TRT). This will read data produced when a high energy particle crosses the boundary between two materials with different electrical properties.
Latching overcurrent circuit breaker
Moore, M. L.
1970-01-01
Circuit breaker consists of a preset current amplitude sensor, and a lamp-photo-resistor combination in a feedback arrangement which energizes a power switching relay. The ac input power is removed from the load at predetermined current amplitudes.
High temperature circuit breaker
Edwards, R. N.; Travis, E. F.
1970-01-01
Alternating current circuit breaker is suitable for reliable long-term service at 1000 deg F in the vacuum conditions of outer space. Construction materials are resistant to nuclear radiation and vacuum welding. Service test conditions and results are given.
Experimental confirmation of a new reversed butterfly-shaped attractor
Institute of Scientific and Technical Information of China (English)
Liu Ling; Su Yan-Chen; Liu Chong-Xin
2007-01-01
This paper reports a new reverse butterfly-shaped chaotic attractor and its experimental confirmation. Some basic dynamical properties, and chaotic behaviours of this new reverse butterfly attractor are studied. Simulation results support brief theoretical derivations. Furthermore, the system is experimentally confirmed by a simple electronic circuit.
Overriding Faulty Circuit Breakers
Robbins, Richard L.; Pierson, Thomas E.
1987-01-01
Retainer keeps power on in emergency. Simple mechanical device attaches to failed aircraft-type push/pull circuit breaker to restore electrical power temporarily until breaker replaced. Device holds push/pull button in closed position; unnecessary for crewmember to hold button in position by continual finger pressure. Sleeve and plug hold button in, overriding mechanical failure in circuit breaker. Windows in sleeve show button position.
DEFF Research Database (Denmark)
Tryggestad, Kjell
2004-01-01
The study aims is to describe how the inclusion and exclusion of materials and calculative devices construct the boundaries and distinctions between statistical facts and artifacts in economics. My methodological approach is inspired by John Graunt's (1667) Political arithmetic and more recent work...... within constructivism and the field of Science and Technology Studies (STS). The result of this approach is here termed reversible statistics, reconstructing the findings of a statistical study within economics in three different ways. It is argued that all three accounts are quite normal, albeit...... in different ways. The presence and absence of diverse materials, both natural and political, is what distinguishes them from each other. Arguments are presented for a more symmetric relation between the scientific statistical text and the reader. I will argue that a more symmetric relation can be achieved...
Directory of Open Access Journals (Sweden)
Alexis De Vos
2011-06-01
Full Text Available Whereas quantum computing circuits follow the symmetries of the unitary Lie group, classical reversible computation circuits follow the symmetries of a finite group, i.e., the symmetric group. We confront the decomposition of an arbitrary classical reversible circuit with w bits and the decomposition of an arbitrary quantum circuit with w qubits. Both decompositions use the control gate as building block, i.e., a circuit transforming only one (qubit, the transformation being controlled by the other w−1 (qubits. We explain why the former circuit can be decomposed into 2w − 1 control gates, whereas the latter circuit needs 2w − 1 control gates. We investigate whether computer circuits, not based on the full unitary group but instead on a subgroup of the unitary group, may be decomposable either into 2w − 1 or into 2w − 1 control gates.
Heterogeneous photonic integrated circuits
Fang, Alexander W.; Fish, Gregory; Hall, Eric
2012-01-01
Photonic Integrated Circuits (PICs) have been dichotomized into circuits with high passive content (silica and silicon PLCs) and high active content (InP tunable lasers and transceivers) due to the trade-off in material characteristics used within these two classes. This has led to restrictions in the adoption of PICs to systems in which only one of the two classes of circuits are required to be made on a singular chip. Much work has been done to create convergence in these two classes by either engineering the materials to achieve the functionality of both device types on a single platform, or in epitaxial growth techniques to transfer one material to the next, but have yet to demonstrate performance equal to that of components fabricated in their native substrates. Advances in waferbonding techniques have led to a new class of heterogeneously integrated photonic circuits that allow for the concurrent use of active and passive materials within a photonic circuit, realizing components on a transferred substrate that have equivalent performance as their native substrate. In this talk, we review and compare advances made in heterogeneous integration along with demonstrations of components and circuits enabled by this technology.
Directory of Open Access Journals (Sweden)
Shiraz Afazal
2012-09-01
Full Text Available Recent development in the field of optical communication have increased the need for Opto Electronic Integrated circuit used for the high speed data transmission with low power consuming, high bandwidth and compact size. Presented is the OEIC chip with two metal layer waveguide and low power receiver circuit using standard CMOS technology. The silicon dioxide waveguide is composed of two metal layer reducing metal layer make OEIC cost effective , The silicon LED is fabricated using nwell/p-substrate with p+ octagonal rings, the p+/nwell forms the series pn junction to increase the light emitting area which operates in reverse bias mode. Photo detector is made of multiple PN junction to increase the depletion region width with n+ active implantation/n-well fabricated on the p substrate .the photocurrent receiver circuit is made of MOSFET to perform the function of photo detection and preamplification
Optimized parity preserving quantum reversible full adder/subtractor
Haghparast, Majid; Bolhassani, Ali
2016-07-01
Reversible logic is one of the indispensable aspects of emerging technologies for reducing physical entropy gain, since reversible circuits do not lose information in the form of internal heat during computation. This paper aimed to initiate constructing parity preserving reversible circuits. A novel parity preserving reversible block, HB is presented. Then a new design of a cost-effective parity preserving reversible full adder/subtractor (PPFA/S) is proposed. Next, we suggested a new parity preserving binary to BCD converter. Finally, we proposed new realization of parity preserving reversible BCD adder. The proposed designs are cost-effective in terms of quantum cost and delay. All the scales are in the NANO-metric area.
Circuit simulation: some humbling thoughts
Energy Technology Data Exchange (ETDEWEB)
Wendt, Manfred; /Fermilab
2006-01-01
A short, very personal note on circuit simulation is presented. It does neither include theoretical background on circuit simulation, nor offers an overview of available software, but just gives some general remarks for a discussion on circuit simulator needs in context to the design and development of accelerator beam instrumentation circuits and systems.
Describing and optimizing reversible logic using a functional language
DEFF Research Database (Denmark)
Thomsen, Michael Kirkedal
2012-01-01
This paper presents the design of a language for the description and optimisation of reversible logic circuits. The language is a combinator-style functional language designed to be close to the reversible logical gate-level. The combinators include high-level constructs such as ripples, but also...... the recognisable inversion combinator f^(-1), which defines the inverse function of f using an efficient semantics. It is important to ensure that all circuits descriptions are reversible, and furthermore we must require this to be done statically. This is en- sured by the type system, which also allows...... the description of arbitrary sized circuits. The combination of the functional language and the restricted reversible model results in many arithmetic laws, which provide more possibilities for term rewriting and, thus, the opportunity for good optimisation....
Reversible Logic Synthesis of Fault Tolerant Carry Skip BCD Adder
Islam, Md Saiful; 10.3329/jbas.v32i2.2431
2010-01-01
Reversible logic is emerging as an important research area having its application in diverse fields such as low power CMOS design, digital signal processing, cryptography, quantum computing and optical information processing. This paper presents a new 4*4 parity preserving reversible logic gate, IG. The proposed parity preserving reversible gate can be used to synthesize any arbitrary Boolean function. It allows any fault that affects no more than a single signal readily detectable at the circuit's primary outputs. It is shown that a fault tolerant reversible full adder circuit can be realized using only two IGs. The proposed fault tolerant full adder (FTFA) is used to design other arithmetic logic circuits for which it is used as the fundamental building block. It has also been demonstrated that the proposed design offers less hardware complexity and is efficient in terms of gate count, garbage outputs and constant inputs than the existing counterparts.
Low latency asynchronous interface circuits
Energy Technology Data Exchange (ETDEWEB)
Sadowski, Greg
2017-06-20
In one form, a logic circuit includes an asynchronous logic circuit, a synchronous logic circuit, and an interface circuit coupled between the asynchronous logic circuit and the synchronous logic circuit. The asynchronous logic circuit has a plurality of asynchronous outputs for providing a corresponding plurality of asynchronous signals. The synchronous logic circuit has a plurality of synchronous inputs corresponding to the plurality of asynchronous outputs, a stretch input for receiving a stretch signal, and a clock output for providing a clock signal. The synchronous logic circuit provides the clock signal as a periodic signal but prolongs a predetermined state of the clock signal while the stretch signal is active. The asynchronous interface detects whether metastability could occur when latching any of the plurality of the asynchronous outputs of the asynchronous logic circuit using said clock signal, and activates the stretch signal while the metastability could occur.
AN IMPROVED DESIGN OF A MULTIPLIER USING REVERSIBLE LOGIC GATES
Directory of Open Access Journals (Sweden)
H.R.BHAGYALAKSHMI
2010-08-01
Full Text Available Reversible logic gates are very much in demand for the future computing technologies as they are known to produce zero power dissipation under ideal conditions. This paper proposes an improved design of a multiplier using reversible logic gates. Multipliers are very essential for the construction of various computational units of a quantum computer. The quantum cost of a reversible logic circuit can be minimized by reducing the number of reversible logic gates. For this two 4*4 reversible logic gates called a DPG gate and a BVF gate are used.
A semiconductor laser excitation circuit
Energy Technology Data Exchange (ETDEWEB)
Kaadzunari, O.; Masaty, K.
1984-03-27
A semiconductor laser excitation circuit is patented that is designed for operation in a pulsed mode with a high pulse repetition frequency. This circuit includes, in addition to a semiconductor laser, a high speed photodetector, a reference voltage source, a comparator, and a pulse oscillator and modulator. If the circuit is built using standard silicon integrated circuits, its speed amounts to several hundred megahertz, if it is constructed using gallium arsenide integrated circuits, its speed is several gigahertz.
Entropy Flow in Near-Critical Quantum Circuits
Friedan, Daniel
2017-05-01
Near-critical quantum circuits close to equilibrium are ideal physical systems for asymptotically large-scale quantum computers, because their low energy collective excitations evolve reversibly, effectively isolated from microscopic environmental fluctuations by the renormalization group. Entropy flows in near-critical quantum circuits near equilibrium as a locally conserved quantum current, obeying circuit laws analogous to the electric circuit laws. These "Kirchhoff laws" for entropy flow are the fundamental design constraints for asymptotically large-scale quantum computers. A quantum circuit made from a near-critical system (of conventional type) is described by a relativistic 1+1 dimensional relativistic quantum field theory on the circuit. The quantum entropy current near equilibrium is just the energy current divided by the temperature. The universal properties of the energy-momentum tensor constrain the entropy flow characteristics of the circuit components: the entropic conductivity of the quantum wires and the entropic admittance of the quantum circuit junctions. For example, near-critical quantum wires are always resistanceless inductors for entropy. A universal formula is derived for the entropic conductivity: σ S(ω ) = iv2 S/ω T , where ω is the frequency, T the temperature, S the equilibrium entropy density and v the velocity of "light". The thermal conductivity is Re(Tσ S(ω ))=π v2 S δ (ω ). The thermal Drude weight is, universally, v2S. This gives a way to measure the entropy density directly.
Panigrahy, Rina
2012-01-01
There is a vast supply of prior art that study models for mental processes. Some studies in psychology and philosophy approach it from an inner perspective in terms of experiences and percepts. Others such as neurobiology or connectionist-machines approach it externally by viewing the mind as complex circuit of neurons where each neuron is a primitive binary circuit. In this paper, we also model the mind as a place where a circuit grows, starting as a collection of primitive components at birth and then builds up incrementally in a bottom up fashion. A new node is formed by a simple composition of prior nodes when we undergo a repeated experience that can be described by that composition. Unlike neural networks, however, these circuits take "concepts" or "percepts" as inputs and outputs. Thus the growing circuits can be likened to a growing collection of lambda expressions that are built on top of one another in an attempt to compress the sensory input as a heuristic to bound its Kolmogorov Complexity.
Quantum computer of wire circuit architecture
Moiseev, S A; Andrianov, S N
2010-01-01
First solid state quantum computer was built using transmons (cooper pair boxes). The operation of the computer is limited because of using a number of the rigit cooper boxes working with fixed frequency at temperatures of superconducting material. Here, we propose a novel architecture of quantum computer based on a flexible wire circuit of many coupled quantum nodes containing controlled atomic (molecular) ensembles. We demonstrate wide opportunities of the proposed computer. Firstly, we reveal a perfect storage of external photon qubits to multi-mode quantum memory node and demonstrate a reversible exchange of the qubits between any arbitrary nodes. We found optimal parameters of atoms in the circuit and self quantum modes for quantum processing. The predicted perfect storage has been observed experimentally for microwave radiation on the lithium phthalocyaninate molecule ensemble. Then also, for the first time we show a realization of the efficient basic two-qubit gate with direct coupling of two arbitrary...
Chaotic memristive circuit: equivalent circuit realization and dynamical analysis
Institute of Scientific and Technical Information of China (English)
Bao Bo-Cheng; Xu Jian-Ping; Zhou Guo-Hua; Ma Zheng-Hua; Zou Ling
2011-01-01
In this paper,a practical equivalent circuit of an active flux-controlled memristor characterized by smooth piecewise-quadratic nonlinearity is designed and an experimental chaotic memristive circuit is implemented.The chaotic memristive circuit has an equilibrium set and its stability is dependent on the initial state of the memristor.The initial state-dependent and the circuit parameter-dependent dynamics of the chaotic memristive circuit are investigated via phase portraits,bifurcation diagrams and Lyapunov exponents.Both experimental and simulation results validate the proposed equivalent circuit realization of the active flux-controlled memristor.
Nongrounded Common-Mode Equivalent Circuit for Brushless DC Motor Driven by PWM Inverter
Maetani, Tatsuo; Isomura, Yoshinori; Watanabe, Akihiko; Iimori, Kenichi; Morimoto, Shigeo
This paper describes nongrounded common-mode equivalent circuit for a motor driven by a voltage-source PWM inverter. When the capacitance of the rotor was small, the phenomenon that polarity of the common mode voltage and shaft voltage reversed was observed. In order to model this phenomenon, the bridge type equivalent circuit is proposed. It is verified with the calculation and experiment that shaft voltage values and polarity are accurately calculated with the proposed equivalent circuit.
Argyle, Andrew
2009-01-01
Step-by-step instructions for making your own PCBs at home. Making your own printed circuit board (PCB) might seem a daunting task, but once you master the steps, it's easy to attain professional-looking results. Printed circuit boards, which connect chips and other components, are what make almost all modern electronic devices possible. PCBs are made from sheets of fiberglass clad with copper, usually in multiplelayers. Cut a computer motherboard in two, for instance, and you'll often see five or more differently patterned layers. Making boards at home is relatively easy
Current Conveyor Equivalent Circuits
Directory of Open Access Journals (Sweden)
Tejmal S. Rathore
2012-02-01
Full Text Available An equivalence between a class of (current conveyor CC II+ and CC II- circuits is established. CC IIequivalent circuit uses one extra element. However, under certain condition, the extra element can be eliminated. As an illustration of the application of this equivalence, minimal first and second order all-pass filters are derived. Incertain cases, it is possible to compensate the effect of the input resistor of CC at port X. At the end, an open problem of realizing an Nth order (N > 2 minimal all-pass filter is stated.
Circuit design for reliability
Cao, Yu; Wirth, Gilson
2015-01-01
This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units. The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management. Provides comprehensive review on various reliability mechanisms at sub-45nm nodes; Describes practical modeling and characterization techniques for reliability; Includes thorough presentation of robust design techniques for major VLSI design units; Promotes physical understanding with first-principle simulations.
Inrush Current Control Circuit
Cole, Steven W. (Inventor)
2002-01-01
An inrush current control circuit having an input terminal connected to a DC power supply and an output terminal connected to a load capacitor limits the inrush current that charges up the load capacitor during power up of a system. When the DC power supply applies a DC voltage to the input terminal, the inrush current control circuit produces a voltage ramp at the load capacitor instead of an abrupt DC voltage. The voltage ramp results in a constant low level current to charge up the load capacitor, greatly reducing the current drain on the DC power supply.
Electronic circuits fundamentals & applications
Tooley, Mike
2015-01-01
Electronics explained in one volume, using both theoretical and practical applications.New chapter on Raspberry PiCompanion website contains free electronic tools to aid learning for students and a question bank for lecturersPractical investigations and questions within each chapter help reinforce learning Mike Tooley provides all the information required to get to grips with the fundamentals of electronics, detailing the underpinning knowledge necessary to appreciate the operation of a wide range of electronic circuits, including amplifiers, logic circuits, power supplies and oscillators. The
Organic reprogrammable circuits based on electrochemically formed diodes.
Liu, Jiang; Engquist, Isak; Berggren, Magnus
2014-08-13
We report a method to construct reprogrammable circuits based on organic electrochemical (EC) p-n junction diodes. The diodes are built up from the combination of the organic conjugated polymer poly[2-methoxy-5-(2-ethylhexyloxy)-1,4-phenylenevinylene] and a polymer electrolyte. The p-n diodes are defined by EC doping performed at 70 °C, and then stabilized at -30 °C. The reversible EC reaction allows for in situ reprogramming of the polarity of the organic p-n junction, thus enabling us to reconfigure diode circuits. By combining diodes of specific polarities dedicated circuits have been created, such as various logic gates, a voltage limiter and an AC/DC converter. Reversing the EC reaction allows in situ reprogramming of the p-n junction polarity, thus enabling reconfiguration of diode circuits, for example, from an AND gate to an OR gate. The reprogrammable circuits are based on p-n diodes defined from only two layers, the electrodes and then the active semiconductor:electrolyte composite material. Such simple device structures are promising for large-area and fully printed reconfigurable circuits manufactured using common printing tools. The structure of the reported p-n diodes mimics the architecture of and is based on identical materials used to construct light-emitting electrochemical cells (LEC). Our findings thus provide a robust signal routing technology that is easily integrated with traditional LECs.
The Smallest Transistor-Based Nonautonomous Chaotic Circuit
DEFF Research Database (Denmark)
Lindberg, Erik; Murali, K.; Tamasevicius, Arunas
2005-01-01
A nonautonomous chaotic circuit based on one transistor, two capacitors, and two resistors is described. The mechanism behind the chaotic performance is based on “disturbance of integration.” The forward part and the reverse part of the bipolar transistor are “fighting” about the charging...
Chopper amplifier circuit with CMOS switches and amplifier FETs
Huijsing, J.H.; Bakker, A.
1997-01-01
Abstract of NL 1001231 (C2) The input voltage is fed to the inputs of an operational amplifier via a chopping reversal switchThe CMOS operational amplifier has a current source and a current mirror. The operational amplifier output is fed to an output circuit. The possible offset voltage is supp
Reversible logic synthesis methodologies with application to quantum computing
Taha, Saleem Mohammed Ridha
2016-01-01
This book opens the door to a new interesting and ambitious world of reversible and quantum computing research. It presents the state of the art required to travel around that world safely. Top world universities, companies and government institutions are in a race of developing new methodologies, algorithms and circuits on reversible logic, quantum logic, reversible and quantum computing and nano-technologies. In this book, twelve reversible logic synthesis methodologies are presented for the first time in a single literature with some new proposals. Also, the sequential reversible logic circuitries are discussed for the first time in a book. Reversible logic plays an important role in quantum computing. Any progress in the domain of reversible logic can be directly applied to quantum logic. One of the goals of this book is to show the application of reversible logic in quantum computing. A new implementation of wavelet and multiwavelet transforms using quantum computing is performed for this purpose. Rese...
ESD analog circuits and design
Voldman, Steven H
2014-01-01
A comprehensive and in-depth review of analog circuit layout, schematic architecture, device, power network and ESD design This book will provide a balanced overview of analog circuit design layout, analog circuit schematic development, architecture of chips, and ESD design. It will start at an introductory level and will bring the reader right up to the state-of-the-art. Two critical design aspects for analog and power integrated circuits are combined. The first design aspect covers analog circuit design techniques to achieve the desired circuit performance. The second and main aspect pres
Bioluminescent bioreporter integrated circuit
Energy Technology Data Exchange (ETDEWEB)
Simpson, Michael L. (Knoxville, TN); Sayler, Gary S. (Blaine, TN); Paulus, Michael J. (Knoxville, TN)
2000-01-01
Disclosed are monolithic bioelectronic devices comprising a bioreporter and an OASIC. These bioluminescent bioreporter integrated circuit are useful in detecting substances such as pollutants, explosives, and heavy-metals residing in inhospitable areas such as groundwater, industrial process vessels, and battlefields. Also disclosed are methods and apparatus for environmental pollutant detection, oil exploration, drug discovery, industrial process control, and hazardous chemical monitoring.
Superconducting Quantum Circuits
Majer, J.B.
2002-01-01
This thesis describes a number of experiments with superconducting cir- cuits containing small Josephson junctions. The circuits are made out of aluminum islands which are interconnected with a very thin insulating alu- minum oxide layer. The connections form a Josephson junction. The current trough
Quantum secure circuit evaluation
Institute of Scientific and Technical Information of China (English)
CHEN Huanhuan; LI Bin; ZHUANG Zhenquan
2004-01-01
In order to solve the problem of classical secure circuit evaluation, this paper proposes a quantum approach. In this approach, the method of inserting redundant entangled particles and quantum signature has been employed to strengthen the security of the system. Theoretical analysis shows that our solution is secure against classical and quantum attacks.
Signals and Circuits in the Purkinje Neuron
Directory of Open Access Journals (Sweden)
Ze'ev R Abrams
2011-09-01
Full Text Available Purkinje neurons in the cerebellum have over 100,000 inputs organized in an orthogonal geometry, and a single output channel. As the sole output of the cerebellar cortex layer, their complex firing pattern has been associated with motor control and learning. As such they have been extensively modeled and measured using tools ranging from electrophysiology and neuroanatomy, to dynamic systems and artificial intelligence methods. However, there is an alternative approach to analyze and describe the neuronal output of these cells using concepts from Electrical Engineering, particularly signal processing and digital/analog circuits. By viewing the Purkinje neuron as an unknown circuit to be reverse-engineered, we can use the tools that provide the foundations of today’s integrated circuits and communication systems to analyze the Purkinje system at the circuit level. We use Fourier transforms to analyze and isolate the inherent frequency modes in the Purkinje neuron and define 3 unique frequency ranges associated with the cells’ output. Comparing the Purkinje neuron to a signal generator that can be externally modulated adds an entire level of complexity to the functional role of these neurons both in terms of data analysis and information processing, relying on Fourier analysis methods in place of statistical ones. We also re-describe some of the recent literature in the field, using the nomenclature of signal processing. Furthermore, by comparing the experimental data of the past decade with basic electronic circuitry, we can resolve the outstanding controversy in the field, by recognizing that the Purkinje neuron can act as a multivibrator circuit.
TRANSISTOR IMPLEMENTATION OF REVERSIBLE PRT GATES
Directory of Open Access Journals (Sweden)
RASHMI S.B,
2011-03-01
Full Text Available Reversible logic has emerged as one of the most important approaches for power optimization with its application in low power VLSI design. Reversible or information lossless circuits have applications in nanotechnology, digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requirement in the emerging field of quantum computing. In this paper, two newoptimized universal gates are proposed. One of them has an ability to operate as a reversible half adder and half subtractor imultaneously. Another one acts only as half adder with minimum transistor count. The reversible gates are evaluated in terms of number of transistor count, critical path, garbage outputs and one to one mapping. Here transistor implementation of the proposed gates is done by using Virtuoso tool of cadence. Based on the results of the analysis, some of the trade-offs are made in the design to improve the efficiency.
Heuristic Synthesis of Reversible Logic – A Comparative Study
Directory of Open Access Journals (Sweden)
Chua Shin Cheng
2014-01-01
Full Text Available Reversible logic circuits have been historically motivated by theoretical research in low-power, and recently attracted interest as components of the quantum algorithm, optical computing and nanotechnology. However due to the intrinsic property of reversible logic, traditional irreversible logic design and synthesis methods cannot be carried out. Thus a new set of algorithms are developed correctly to synthesize reversible logic circuit. This paper presents a comprehensive literature review with comparative study on heuristic based reversible logic synthesis. It reviews a range of heuristic based reversible logic synthesis techniques reported by researchers (BDD-based, cycle-based, search-based, non-search-based, rule-based, transformation-based, and ESOP-based. All techniques are described in detail and summarized in a table based on their features, limitation, library used and their consideration metric. Benchmark comparison of gate count and quantum cost are analysed for each synthesis technique. Comparing the synthesis algorithm outputs over the years, it can be observed that different approach has been used for the synthesis of reversible circuit. However, the improvements are not significant. Quantum cost and gate count has improved over the years, but arguments and debates are still on certain issues such as the issue of garbage outputs that remain the same. This paper provides the information of all heuristic based synthesis of reversible logic method proposed over the years. All techniques are explained in detail and thus informative for new reversible logic researchers and bridging the knowledge gap in this area.
Resistor Combinations for Parallel Circuits.
McTernan, James P.
1978-01-01
To help simplify both teaching and learning of parallel circuits, a high school electricity/electronics teacher presents and illustrates the use of tables of values for parallel resistive circuits in which total resistances are whole numbers. (MF)
Reversible computing fundamentals, quantum computing, and applications
De Vos, Alexis
2010-01-01
Written by one of the few top internationally recognized experts in the field, this book concentrates on those topics that will remain fundamental, such as low power computing, reversible programming languages, and applications in thermodynamics. It describes reversible computing from various points of view: Boolean algebra, group theory, logic circuits, low-power electronics, communication, software, quantum computing. It is this multidisciplinary approach that makes it unique.Backed by numerous examples, this is useful for all levels of the scientific and academic community, from undergr
1975-01-01
Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.
DEFF Research Database (Denmark)
Lindberg, Erik; Murali, K.; Tamacevicius, Arunas
2006-01-01
The state equations of the LMT circuit are modeled as a dedicated analogue computer circuit and solved by means of PSpice. The nonlinear part of the system is studied. Problems with the PSpice program are presented.......The state equations of the LMT circuit are modeled as a dedicated analogue computer circuit and solved by means of PSpice. The nonlinear part of the system is studied. Problems with the PSpice program are presented....
Behavioral synthesis of asynchronous circuits
DEFF Research Database (Denmark)
Nielsen, Sune Fallgaard
2005-01-01
This thesis presents a method for behavioral synthesis of asynchronous circuits, which aims at providing a synthesis flow which uses and tranfers methods from synchronous circuits to asynchronous circuits. We move the synchronous behavioral synthesis abstraction into the asynchronous handshake...... is idle. This reduces unnecessary switching activity in the individual functional units and therefore the energy consumption of the entire circuit. A collection of behavioral synthesis algorithms have been developed allowing the designer to perform time and power constrained design space exploration...
Diode, transistor & fet circuits manual
Marston, R M
2013-01-01
Diode, Transistor and FET Circuits Manual is a handbook of circuits based on discrete semiconductor components such as diodes, transistors, and FETS. The book also includes diagrams and practical circuits. The book describes basic and special diode characteristics, heat wave-rectifier circuits, transformers, filter capacitors, and rectifier ratings. The text also presents practical applications of associated devices, for example, zeners, varicaps, photodiodes, or LEDs, as well as it describes bipolar transistor characteristics. The transistor can be used in three basic amplifier configuration
Statistical circuit design for yield improvement in CMOS circuits
Kamath, H. J.; Purviance, J. E.; Whitaker, S. R.
1990-01-01
This paper addresses the statistical design of CMOS integrated circuits for improved parametric yield. The work uses the Monte Carlo technique of circuit simulation to obtain an unbiased estimation of the yield. A simple graphical analysis tool, the yield factor histogram, is presented. The yield factor histograms are generated by a new computer program called SPICENTER. Using the yield factor histograms, the most sensitive circuit parameters are noted, and their nominal values are changed to improve the yield. Two basic CMOS example circuits, one analog and one digital, are chosen and their designs are 'centered' to illustrate the use of the yield factor histograms for statistical circuit design.
Circuit Bodging: Atari Punk Console
Allen, B.
2009-01-01
Circuit bodging is back! Maxwell is proud to present small, simple, but ultimately lovable little circuits to build for your own, personal pleasure. In this edition we are featuring: The Atari Punk Console. The Atari Punk Console (or APC) is a 555 timer IC based noise maker circuit. The original was
Circuit Bodging: Atari Punk Console
Allen, B.
2009-01-01
Circuit bodging is back! Maxwell is proud to present small, simple, but ultimately lovable little circuits to build for your own, personal pleasure. In this edition we are featuring: The Atari Punk Console. The Atari Punk Console (or APC) is a 555 timer IC based noise maker circuit. The original was
Selective Manipulation of Neural Circuits.
Park, Hong Geun; Carmel, Jason B
2016-04-01
Unraveling the complex network of neural circuits that form the nervous system demands tools that can manipulate specific circuits. The recent evolution of genetic tools to target neural circuits allows an unprecedented precision in elucidating their function. Here we describe two general approaches for achieving circuit specificity. The first uses the genetic identity of a cell, such as a transcription factor unique to a circuit, to drive expression of a molecule that can manipulate cell function. The second uses the spatial connectivity of a circuit to achieve specificity: one genetic element is introduced at the origin of a circuit and the other at its termination. When the two genetic elements combine within a neuron, they can alter its function. These two general approaches can be combined to allow manipulation of neurons with a specific genetic identity by introducing a regulatory gene into the origin or termination of the circuit. We consider the advantages and disadvantages of both these general approaches with regard to specificity and efficacy of the manipulations. We also review the genetic techniques that allow gain- and loss-of-function within specific neural circuits. These approaches introduce light-sensitive channels (optogenetic) or drug sensitive channels (chemogenetic) into neurons that form specific circuits. We compare these tools with others developed for circuit-specific manipulation and describe the advantages of each. Finally, we discuss how these tools might be applied for identification of the neural circuits that mediate behavior and for repair of neural connections.
Sorting Network for Reversible Logic Synthesis
Islam, Md Saiful; Mahmud, Abdullah Al; karim, Muhammad Rezaul
2010-01-01
In this paper, we have introduced an algorithm to implement a sorting network for reversible logic synthesis based on swapping bit strings. The algorithm first constructs a network in terms of n*n Toffoli gates read from left to right. The number of gates in the circuit produced by our algorithm is then reduced by template matching and removing useless gates from the network. We have also compared the efficiency of the proposed method with the existing ones.
An Improved Structure Of Reversible Adder And Subtractor
Directory of Open Access Journals (Sweden)
Aakash Gupta
2013-03-01
Full Text Available In today’s world everyday a new technology which is faster, smaller and more complex than its predecessor is being developed. The increased number of transistors packed onto a chip of a conventional system results in increased power consumption that is why Reversible logic has drawn attention of Researchers due to its less heat dissipating characteristics. Reversible logic can be imposed over applications such as quantum computing, optical computing, quantum dot cellular automata, low power VLSI circuits, DNA computing. This paper presents the reversible combinational circuit of adder, subtractor and parity preserving subtractor. The suggested circuit in this paper are designed using Feynman, Double Feynman and MUX gates which are better than the existing one in literature in terms of Quantum cost, Garbage output and Total logical calculations.
Bossen, Olaf
2011-01-01
We present a new type of calorimeter in which we couple an unknown heat capacity with the aid of Peltier elements to an electrical circuit. The use of an electrical inductance and an amplifier in the circuit allows us to achieve autonomous oscillations, and the measurement of the corresponding resonance frequency makes it possible to accurately measure the heat capacity with an intrinsic statistical error that decreases as ~t^{-3/2} with measuring time t, as opposed to a corresponding error ~t^{-1/2} in the conventional alternating current (a.c.) method to measure heat capacities. We have built a demonstration experiment to show the feasibility of the new technique, and we have tested it on a gadolinium sample at its transition to the ferromagnetic state.
Neuromorphic silicon neuron circuits
Directory of Open Access Journals (Sweden)
Giacomo eIndiveri
2011-05-01
Full Text Available Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain-machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance based Hodgkin-Huxley models to bi-dimensional generalized adaptive Integrate and Fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips.
Cartography of serotonergic circuits.
Sparta, Dennis R; Stuber, Garret D
2014-08-06
Serotonin is an essential neuromodulator, but the precise circuit connectivity that regulates serotonergic neurons has not been well defined. Using rabies virus tracing strategies Weissbourd et al. (2014) and Pollak Dorocic et al. (2014) in this issue of Neuron and Ogawa et al. (2014) in Cell Reports provide a comprehensive map of the inputs to serotonergic neurons, highlighting the complexity and diversity of potential upstream cellular regulators. Copyright © 2014 Elsevier Inc. All rights reserved.
Inkjet deposited circuit components
Bidoki, S. M.; Nouri, J.; Heidari, A. A.
2010-05-01
All-printed electronics as a means of achieving ultra-low-cost electronic circuits has attracted great interest in recent years. Inkjet printing is one of the most promising techniques by which the circuit components can be ultimately drawn (i.e. printed) onto the substrate in one step. Here, the inkjet printing technique was used to chemically deposit silver nanoparticles (10-200 nm) simply by ejection of silver nitrate and reducing solutions onto different substrates such as paper, PET plastic film and textile fabrics. The silver patterns were tested for their functionality to work as circuit components like conductor, resistor, capacitor and inductor. Different levels of conductivity were achieved simply by changing the printing sequence, inks ratio and concentration. The highest level of conductivity achieved by an office thermal inkjet printer (300 dpi) was 5.54 × 105 S m-1 on paper. Inkjet deposited capacitors could exhibit a capacitance of more than 1.5 nF (parallel plate 45 × 45 mm2) and induction coils displayed an inductance of around 400 µH (planar coil 10 cm in diameter). Comparison of electronic performance of inkjet deposited components to the performance of conventionally etched items makes the technique highly promising for fabricating different printed electronic devices.
Polasek, P.; Halamik, J.
1984-05-01
The term semicustom designed integrated circuits denotes integrated circuits of an all purpose character in which the production of chips is completed by using one to three custom design stencil type exposure masks. This involves in most cases interconnecting masks that are used to devise the circuit function desired by the customer. Silicon plates with an all purpose gate matrix are produced up to the interconnection level and can be kept at this phase in storage, after which a customer's specific demands can be met very expediently. All purpose logic fields containing 200 logic gates on a chip and an all purpose chip to be expanded to 1,000 logic gates are discussed. The technology facilitates the devising of fast gates with a delay of approximately 5 ns and power dissipation of 1 mW. In assembly it will be possible to make use of the entire assortment of the currently used casings with 16, 18, 20, 24, 28 and 40 outlets. In addition to the development of the mentioned technology, a general methodology for design of the mentioned gate fields is currently under way.
Yang, Yingjun; Ding, Li; Han, Jie; Zhang, Zhiyong; Peng, Lian-Mao
2017-03-29
Solution-derived carbon nanotube (CNT) network films with high semiconducting purity are suitable materials for the wafer-scale fabrication of field-effect transistors (FETs) and integrated circuits (ICs). However, it is challenging to realize high-performance complementary metal-oxide semiconductor (CMOS) FETs with high yield and stability on such CNT network films, and this difficulty hinders the development of CNT-film-based ICs. In this work, we developed a doping-free process for the fabrication of CMOS FETs based on solution-processed CNT network films, in which the polarity of the FETs was controlled using Sc or Pd as the source/drain contacts to selectively inject carriers into the channels. The fabricated top-gated CMOS FETs showed high symmetry between the characteristics of n- and p-type devices and exhibited high-performance uniformity and excellent scalability down to a gate length of 1 μm. Many common types of CMOS ICs, including typical logic gates, sequential circuits, and arithmetic units, were constructed based on CNT films, and the fabricated ICs exhibited rail-to-rail outputs because of the high noise margin of CMOS circuits. In particular, 4-bit full adders consisting of 132 CMOS FETs were realized with 100% yield, thereby demonstrating that this CMOS technology shows the potential to advance the development of medium-scale CNT-network-film-based ICs.
Changes to the shuttle circuits
GS Department
2011-01-01
To fit with passengers expectation, there will be some changes to the shuttle circuits as from Monday 10 October. See details on http://cern.ch/ShuttleService (on line on 7 October). Circuit No. 5 is cancelled as circuit No. 1 also stops at Bldg. 33. In order to guarantee shorter travel times, circuit No. 1 will circulate on Meyrin site only and circuit No. 2, with departures from Bldg. 33 and 500, on Prévessin site only. Site Services Section
Power system with an integrated lubrication circuit
Hoff, Brian D.; Akasam, Sivaprasad; Algrain, Marcelo C.; Johnson, Kris W.; Lane, William H.
2009-11-10
A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.
Reversible Logic Based Concurrent Error Detection Methodology For Emerging Nanocircuits
Thapliyal, Himanshu
2011-01-01
Reversible logic has promising applications in emerging nanotechnologies, such as quantum computing, quantum dot cellular automata and optical computing, etc. Faults in reversible logic circuits that result in multi-bit error at the outputs are very tough to detect, and thus in literature, researchers have only addressed the problem of online testing of faults that result single-bit error at the outputs based on parity preserving logic. In this work, we propose a methodology for the concurrent error detection in reversible logic circuits to detect faults that can result in multi-bit error at the outputs. The methodology is based on the inverse property of reversible logic and is termed as 'inverse and compare' method. By using the inverse property of reversible logic, all the inputs can be regenerated at the outputs. Thus, by comparing the original inputs with the regenerated inputs, the faults in reversible circuits can be detected. Minimizing the garbage outputs is one of the main goals in reversible logic ...
Design of Timer Circuit for Dynamic Data System
Young, Nathaniel, III
2004-01-01
The Branch That I work in is in the Aero Electronic Test Branch, which is part of the Research and Testing Division. The Aero Electronic Test Branch deals with electronic control and instrumentation systems. This branch supports the research and test study of wind tunnels such as the l0x10,9x15, and 8x6. Wind tunnels are used in research to test certain parts of a jet, plane, shuttle or any other flying object in certain test conditions. My assignment is to design a programmable trigger circuit on a 19 standard rack mount that will allow the circuit to latch and hold for a predefined amount of time entered by the user when receiving a signal. It should then re-arm itself within 0.25 seconds after the time is finished. The time should be able to be seen on a display showing the time entered. The time range has to be from 0-600 seconds in 0.01 second increments (600.00). From the information given, counters will be needed to design and build this circuit. A counter, in it s simplest form, is a group of flip flops that can temporarily store bits of information put into the circuit. They can be constructed in many different ways, such as in 4 flip flops (4-bit counter) or 8 flip flops and even higher. Counters are usually cascaded with other counters to reach higher bits, such as 16 or 24 bit counters. The application in which I will use the counters will be to count down from any programmable number that I input either by a keyboard or a thumbwheel. Also, I will use counters that will be used specifically as a frequency divider to divide the pulses that enter the circuit through an input signal from a crystal clock. The pulses will need to be divided so that it will function as a 100Hz clock putting out 100 pulses per second. A switch will be used to load my inputs in and more than likely a button also so that I can stop and hold the count at any point of time. I will use 5 BCD up/down programmable counters, and a certain amount (depending on what kind of "divide by N
Design of 4:16 decoder using reversible logic gates
Directory of Open Access Journals (Sweden)
Santhi Chebiyyam
2016-04-01
Full Text Available Reversible logic has received great importance in the recent years because of its feature of reduction in power dissipation. It finds application in low power digital designs, quantum computing, nanotechnology, DNA computing etc. Large number of researches are currently ongoing on sequential and combinational circuits using reversible logic. Decoders are one of the most important circuits used in combinational logic. Different approaches have been proposed for their design. In this article, we have proposed a novel design of 4:16.
Design of a reversible single precision floating point subtractor.
Anantha Lakshmi, Av; Sudha, Gf
2014-01-04
In recent years, Reversible logic has emerged as a major area of research due to its ability to reduce the power dissipation which is the main requirement in the low power digital circuit design. It has wide applications like low power CMOS design, Nano-technology, Digital signal processing, Communication, DNA computing and Optical computing. Floating-point operations are needed very frequently in nearly all computing disciplines, and studies have shown floating-point addition/subtraction to be the most used floating-point operation. However, few designs exist on efficient reversible BCD subtractors but no work on reversible floating point subtractor. In this paper, it is proposed to present an efficient reversible single precision floating-point subtractor. The proposed design requires reversible designs of an 8-bit and a 24-bit comparator unit, an 8-bit and a 24-bit subtractor, and a normalization unit. For normalization, a 24-bit Reversible Leading Zero Detector and a 24-bit reversible shift register is implemented to shift the mantissas. To realize a reversible 1-bit comparator, in this paper, two new 3x3 reversible gates are proposed The proposed reversible 1-bit comparator is better and optimized in terms of the number of reversible gates used, the number of transistor count and the number of garbage outputs. The proposed work is analysed in terms of number of reversible gates, garbage outputs, constant inputs and quantum costs. Using these modules, an efficient design of a reversible single precision floating point subtractor is proposed. Proposed circuits have been simulated using Modelsim and synthesized using Xilinx Virtex5vlx30tff665-3. The total on-chip power consumed by the proposed 32-bit reversible floating point subtractor is 0.410 W.
Memristor based startup circuit for self biased circuits
Das, Mangal; Singh, Amit Kumar; Rathi, Amit; Singhal, Sonal
2016-04-01
This paper presents the design of a Memristor based startup circuit for self biased circuits. Memristor has many advantages over conventional CMOS devices such as low leakage current at nanometer scale, easy to manufacture. In this work the switching characteristics of memristor is utilized. First the theoretical equations describing the switching behavior of memristor are investigated. To prove the switching capability of Memristor, a startup circuit based on memristor is proposed which uses series combination of Memristor and capacitor. Proposed circuit is compared with the previously reported MOSFET based startup circuits. Comparison of different circuits was done to validate the results. Simulation results show that memristor based circuit can attain on (I = 12.94 µA) to off state (I = 1 .2 µA) in 25 ns while the MOSFET based startup circuits take on (I = 14.19 µA) to off state (I = 1.4 µA) in more than 90 ns. The benefit comes in terms of area because the number of components used in the circuit are lesser than the conventional startup circuits.
Managing Reverse Logistics or Reversing Logistics Management?
Brito, Marisa
2004-01-01
textabstractIn the past, supply chains were busy fine-tuning the logistics from raw material to the end customer. Today an increasing flow of products is going back in the chain. Thus, companies have to manage reverse logistics as well.This thesis contributes to a better understanding of reverse logistics. The thesis brings insights on reverse logistics decision-making and it lays down theoretical principles for reverse logistics as a research field.In particular it puts together a framework ...
Di Vincenzo, D P
1997-01-01
A historical review is given of the emergence of the idea of the quantum logic gate from the theory of reversible Boolean gates. I highlight the quantum XOR or controlled NOT as the fundamental two-bit gate for quantum computation. This gate plays a central role in networks for quantum error correction.
Singla, Pradeep
2012-01-01
This paper present the research work directed towards the design of reversible programmable logic array using very high speed integrated circuit hardware description language (VHDL). Reversible logic circuits have significant importance in bioinformatics, optical information processing, CMOS design etc. In this paper the authors propose the design of new RPLA using Feynman & MUX gate.VHDL based codes of reversible gates with simulating results are shown .This proposed RPLA may be further used to design any reversible logic function or Boolean function (Adder, subtractor etc.) which dissipate very low or ideally no heat.
Efficient Approaches for Designing Fault Tolerant Reversible Carry Look-Ahead and Carry-Skip Adders
Islam, Md Saiful; begum, Zerina; Hafiz, Mohd Zulfiquar
2010-01-01
Combinational or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its corresponding output vector. Reversible logic circuit implements only the functions having one-to-one mapping between its input and output vectors and therefore naturally takes care of heating. Reversible logic design becomes one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power CMOS design, digital signal processing and nanotechnology. This paper presents the efficient approaches for designing fault tolerant reversible fast adders that implement carry look-ahead and carry-skip logic. The proposed high speed reversible adders include MIG gates for the realization of its basic building block. The MIG gate is universal and parity preserving. It allows any fault that affects no more than a single signal readily detectable at the circuit's primary outputs...
Electric circuits problem solver
REA, Editors of
2012-01-01
Each Problem Solver is an insightful and essential study and solution guide chock-full of clear, concise problem-solving gems. All your questions can be found in one convenient source from one of the most trusted names in reference solution guides. More useful, more practical, and more informative, these study aids are the best review books and textbook companions available. Nothing remotely as comprehensive or as helpful exists in their subject anywhere. Perfect for undergraduate and graduate studies.Here in this highly useful reference is the finest overview of electric circuits currently av
Carr, Joseph
1996-01-01
The linear IC market is large and growing, as is the demand for well trained technicians and engineers who understand how these devices work and how to apply them. Linear Integrated Circuits provides in-depth coverage of the devices and their operation, but not at the expense of practical applications in which linear devices figure prominently. This book is written for a wide readership from FE and first degree students, to hobbyists and professionals.Chapter 1 offers a general introduction that will provide students with the foundations of linear IC technology. From chapter 2 onwa
Optoelectronics circuits manual
Marston, R M
1999-01-01
This manual is a useful single-volume guide specifically aimed at the practical design engineer, technician, and experimenter, as well as the electronics student and amateur. It deals with the subject in an easy to read, down to earth, and non-mathematical yet comprehensive manner, explaining the basic principles and characteristics of the best known devices, and presenting the reader with many practical applications and over 200 circuits. Most of the ICs and other devices used are inexpensive and readily available types, with universally recognised type numbers.The second edition
Nano integrated circuit process
Energy Technology Data Exchange (ETDEWEB)
Yoon, Yung Sup
2004-02-15
This book contains nine chapters, which are introduction of manufacture of semiconductor chip, oxidation such as Dry-oxidation, wet oxidation, oxidation model and oxide film, diffusion like diffusion process, diffusion equation, diffusion coefficient and diffusion system, ion implantation, including ion distribution, channeling, multiimplantation and masking and its system, sputtering such as CVD and PVD, lithography, wet etch and dry etch, interconnection and flattening like metal-silicon connection, silicide, multiple layer metal process and flattening, an integrated circuit process, including MOSFET and CMOS.
Krainak, Michael; Merritt, Scott
2016-01-01
Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.
Gibson, J
2013-01-01
Most branches of organizing utilize digital electronic systems. This book introduces the design of such systems using basic logic elements as the components. The material is presented in a straightforward manner suitable for students of electronic engineering and computer science. The book is also of use to engineers in related disciplines who require a clear introduction to logic circuits. This third edition has been revised to encompass the most recent advances in technology as well as the latest trends in components and notation. It includes a wide coverage of application specific integrate
Electronics circuits and systems
Bishop, Owen
2011-01-01
The material in Electronics - Circuits and Systems is a truly up-to-date textbook, with coverage carefully matched to the electronics units of the 2007 BTEC National Engineering and the latest AS and A Level specifications in Electronics from AQA, OCR and WJEC. The material has been organized with a logical learning progression, making it ideal for a wide range of pre-degree courses in electronics. The approach is student-centred and includes: numerous examples and activities; web research topics; Self Test features, highlighted key facts, formulae and definitions. Ea
Electronics circuits and systems
Bishop, Owen
2007-01-01
The material in Electronics - Circuits and Systems is a truly up-to-date textbook, with coverage carefully matched to the electronics units of the 2007 BTEC National Engineering and the latest AS and A Level specifications in Electronics from AQA, OCR and WJEC. The material has been organized with a logical learning progression, making it ideal for a wide range of pre-degree courses in electronics. The approach is student-centred and includes: numerous examples and activities; web research topics; Self Test features, highlighted key facts, formulae and definitions. Each chapter ends with a set
Sequential circuit design for radiation hardened multiple voltage integrated circuits
Clark, Lawrence T.; McIver, III, John K.
2009-11-24
The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.
Managing Reverse Logistics or Reversing Logistics Management?
M.P. de Brito (Marisa)
2004-01-01
textabstractIn the past, supply chains were busy fine-tuning the logistics from raw material to the end customer. Today an increasing flow of products is going back in the chain. Thus, companies have to manage reverse logistics as well.This thesis contributes to a better understanding of reverse
Managing Reverse Logistics or Reversing Logistics Management?
M.P. de Brito (Marisa)
2004-01-01
textabstractIn the past, supply chains were busy fine-tuning the logistics from raw material to the end customer. Today an increasing flow of products is going back in the chain. Thus, companies have to manage reverse logistics as well.This thesis contributes to a better understanding of reverse log
Quantum Cost Efficient Reversible BCD Adder for Nanotechnology Based Systems
Islam, Md Saiful; Begum, Zerina
2011-01-01
Reversible logic allows low power dissipating circuit design and founds its application in cryptography, digital signal processing, quantum and optical information processing. This paper presents a novel quantum cost efficient reversible BCD adder for nanotechnology based systems using PFAG gate. It has been demonstrated that the proposed design offers less hardware complexity and requires minimum number of garbage outputs than the existing counterparts. The remarkable property of the proposed designs is that its quantum realization is given in NMR technology.
49 CFR 236.13 - Spring switch; selection of signal control circuits through circuit controller.
2010-10-01
... circuits through circuit controller. 236.13 Section 236.13 Transportation Other Regulations Relating to...; selection of signal control circuits through circuit controller. The control circuits of signals governing... circuit controller, or through the contacts of relay repeating the position of such circuit...
Bradley, William; Bird, Ross; Eldred, Dennis; Zook, Jon; Knowles, Gareth
2013-01-01
This work involved developing spacequalifiable switch mode DC/DC power supplies that improve performance with fewer components, and result in elimination of digital components and reduction in magnetics. This design is for missions where systems may be operating under extreme conditions, especially at elevated temperature levels from 200 to 300 degC. Prior art for radiation-tolerant DC/DC converters has been accomplished utilizing classical magnetic-based switch mode converter topologies; however, this requires specific shielding and component de-rating to meet the high-reliability specifications. It requires complex measurement and feedback components, and will not enable automatic re-optimization for larger changes in voltage supply or electrical loading condition. The innovation is a switch mode DC/DC power supply that eliminates the need for processors and most magnetics. It can provide a well-regulated voltage supply with a gain of 1:100 step-up to 8:1 step down, tolerating an up to 30% fluctuation of the voltage supply parameters. The circuit incorporates a ceramic core transformer in a manner that enables it to provide a well-regulated voltage output without use of any processor components or magnetic transformers. The circuit adjusts its internal parameters to re-optimize its performance for changes in supply voltage, environmental conditions, or electrical loading at the output
Automated Design of Quantum Circuits
Williams, Colin P.; Gray, Alexander G.
2000-01-01
In order to design a quantum circuit that performs a desired quantum computation, it is necessary to find a decomposition of the unitary matrix that represents that computation in terms of a sequence of quantum gate operations. To date, such designs have either been found by hand or by exhaustive enumeration of all possible circuit topologies. In this paper we propose an automated approach to quantum circuit design using search heuristics based on principles abstracted from evolutionary genetics, i.e. using a genetic programming algorithm adapted specially for this problem. We demonstrate the method on the task of discovering quantum circuit designs for quantum teleportation. We show that to find a given known circuit design (one which was hand-crafted by a human), the method considers roughly an order of magnitude fewer designs than naive enumeration. In addition, the method finds novel circuit designs superior to those previously known.
Large-scale circuit simulation
Wei, Y. P.
1982-12-01
The simulation of VLSI (Very Large Scale Integration) circuits falls beyond the capabilities of conventional circuit simulators like SPICE. On the other hand, conventional logic simulators can only give the results of logic levels 1 and 0 with the attendent loss of detail in the waveforms. The aim of developing large-scale circuit simulation is to bridge the gap between conventional circuit simulation and logic simulation. This research is to investigate new approaches for fast and relatively accurate time-domain simulation of MOS (Metal Oxide Semiconductors), LSI (Large Scale Integration) and VLSI circuits. New techniques and new algorithms are studied in the following areas: (1) analysis sequencing (2) nonlinear iteration (3) modified Gauss-Seidel method (4) latency criteria and timestep control scheme. The developed methods have been implemented into a simulation program PREMOS which could be used as a design verification tool for MOS circuits.
Integrated circuit cooled turbine blade
Energy Technology Data Exchange (ETDEWEB)
Lee, Ching-Pang; Jiang, Nan; Um, Jae Y.; Holloman, Harry; Koester, Steven
2017-08-29
A turbine rotor blade includes at least two integrated cooling circuits that are formed within the blade that include a leading edge circuit having a first cavity and a second cavity and a trailing edge circuit that includes at least a third cavity located aft of the second cavity. The trailing edge circuit flows aft with at least two substantially 180-degree turns at the tip end and the root end of the blade providing at least a penultimate cavity and a last cavity. The last cavity is located along a trailing edge of the blade. A tip axial cooling channel connects to the first cavity of the leading edge circuit and the penultimate cavity of the trailing edge circuit. At least one crossover hole connects the penultimate cavity to the last cavity substantially near the tip end of the blade.
CMOS Nonlinear Signal Processing Circuits
2010-01-01
The chapter describes various nonlinear signal processing CMOS circuits, including a high reliable WTA/LTA, simple MED cell, and low-voltage arbitrary order extractor. We focus the discussion on CMOS analog circuit design with reliable, programmable capability, and low voltage operation. It is a practical problem when the multiple identical cells are required to match and realized within a single chip using a conventional process. Thus, the design of high-reliable circuit is indeed needed. Th...
Analog electronic neural network circuits
Energy Technology Data Exchange (ETDEWEB)
Graf, H.P.; Jackel, L.D. (AT and T Bell Labs., Holmdel, NJ (USA))
1989-07-01
The large interconnectivity and moderate precision required in neural network models present new opportunities for analog computing. This paper discusses analog circuits for a variety of problems such as pattern matching, optimization, and learning. Most of the circuits build so far are relatively small, exploratory designs. The most mature circuits are those for template matching. Chips performing this function are now being applied to pattern recognition problems.
Reversible Thermoset Adhesives
Mac Murray, Benjamin C. (Inventor); Tong, Tat H. (Inventor); Hreha, Richard D. (Inventor)
2016-01-01
Embodiments of a reversible thermoset adhesive formed by incorporating thermally-reversible cross-linking units and a method for making the reversible thermoset adhesive are provided. One approach to formulating reversible thermoset adhesives includes incorporating dienes, such as furans, and dienophiles, such as maleimides, into a polymer network as reversible covalent cross-links using Diels Alder cross-link formation between the diene and dienophile. The chemical components may be selected based on their compatibility with adhesive chemistry as well as their ability to undergo controlled, reversible cross-linking chemistry.
Transistor switching and sequential circuits
Sparkes, John J
1969-01-01
Transistor Switching and Sequential Circuits presents the basic ideas involved in the construction of computers, instrumentation, pulse communication systems, and automation. This book discusses the design procedure for sequential circuits. Organized into two parts encompassing eight chapters, this book begins with an overview of the ways on how to generate the types of waveforms needed in digital circuits, principally ramps, square waves, and delays. This text then considers the behavior of some simple circuits, including the inverter, the emitter follower, and the long-tailed pair. Other cha
Unstable oscillators based hyperchaotic circuit
DEFF Research Database (Denmark)
Murali, K.; Tamasevicius, A.; G. Mykolaitis, A.;
1999-01-01
A simple 4th order hyperchaotic circuit with unstable oscillators is described. The circuit contains two negative impedance converters, two inductors, two capacitors, a linear resistor and a diode. The Lyapunov exponents are presented to confirm hyperchaotic nature of the oscillations in the circ......A simple 4th order hyperchaotic circuit with unstable oscillators is described. The circuit contains two negative impedance converters, two inductors, two capacitors, a linear resistor and a diode. The Lyapunov exponents are presented to confirm hyperchaotic nature of the oscillations...
Reversible Logic Elements with Memory and Their Universality
Directory of Open Access Journals (Sweden)
Kenichi Morita
2013-09-01
Full Text Available Reversible computing is a paradigm of computation that reflects physical reversibility, one of the fundamental microscopic laws of Nature. In this survey, we discuss topics on reversible logic elements with memory (RLEM, which can be used to build reversible computing systems, and their universality. An RLEM is called universal, if any reversible sequential machine (RSM can be realized as a circuit composed only of it. Since a finite-state control and a tape cell of a reversible Turing machine (RTM are formalized as RSMs, any RTM can be constructed from a universal RLEM. Here, we investigate 2-state RLEMs, and show that infinitely many kinds of non-degenerate RLEMs are all universal besides only four exceptions. Non-universality of these exceptional RLEMs is also argued.
A Circuit to Demonstrate Phase Relationships in "RLC" Circuits
Sokol, P. E.; Warren, G.; Zheng, B.; Smith, P.
2013-01-01
We have developed a circuit to demonstrate the phase relationships between resistive and reactive elements in series "RLC" circuits. We utilize a differential amplifier to allow the phases of the three elements and the current to be simultaneously displayed on an inexpensive four channel oscilloscope. We have included a novel circuit…
Analysis and modeling of Fano resonances using equivalent circuit elements.
Lv, Bo; Li, Rujiang; Fu, Jiahui; Wu, Qun; Zhang, Kuang; Chen, Wan; Wang, Zhefei; Ma, Ruyu
2016-08-22
Fano resonance presents an asymmetric line shape formed by an interference of a continuum coupled with a discrete autoionized state. In this paper, we show several simple circuits for Fano resonances from the stable-input impedance mechanism, where the elements consisting of inductors and capacitors are formulated for various resonant modes, and the resistor represents the damping of the oscillators. By tuning the pole-zero of the input impedance, a simple circuit with only three passive components e.g. two inductors and one capacitor, can exhibit asymmetric resonance with arbitrary Q-factors flexiblely. Meanwhile, four passive components can exhibit various resonances including the Lorentz-like and reversely electromagnetically induced transparency (EIT) formations. Our work not only provides an intuitive understanding of Fano resonances, but also pave the way to realize Fano resonaces using simple circuit elements.
Boosting functionality of synthetic DNA circuits with tailored deactivation.
Montagne, Kevin; Gines, Guillaume; Fujii, Teruo; Rondelez, Yannick
2016-11-15
Molecular programming takes advantage of synthetic nucleic acid biochemistry to assemble networks of reactions, in vitro, with the double goal of better understanding cellular regulation and providing information-processing capabilities to man-made chemical systems. The function of molecular circuits is deeply related to their topological structure, but dynamical features (rate laws) also play a critical role. Here we introduce a mechanism to tune the nonlinearities associated with individual nodes of a synthetic network. This mechanism is based on programming deactivation laws using dedicated saturable pathways. We demonstrate this approach through the conversion of a single-node homoeostatic network into a bistable and reversible switch. Furthermore, we prove its generality by adding new functions to the library of reported man-made molecular devices: a system with three addressable bits of memory, and the first DNA-encoded excitable circuit. Specific saturable deactivation pathways thus greatly enrich the functional capability of a given circuit topology.
VLSI circuits implementing computational models of neocortical circuits.
Wijekoon, Jayawan H B; Dudek, Piotr
2012-09-15
This paper overviews the design and implementation of three neuromorphic integrated circuits developed for the COLAMN ("Novel Computing Architecture for Cognitive Systems based on the Laminar Microcircuitry of the Neocortex") project. The circuits are implemented in a standard 0.35 μm CMOS technology and include spiking and bursting neuron models, and synapses with short-term (facilitating/depressing) and long-term (STDP and dopamine-modulated STDP) dynamics. They enable execution of complex nonlinear models in accelerated-time, as compared with biology, and with low power consumption. The neural dynamics are implemented using analogue circuit techniques, with digital asynchronous event-based input and output. The circuits provide configurable hardware blocks that can be used to simulate a variety of neural networks. The paper presents experimental results obtained from the fabricated devices, and discusses the advantages and disadvantages of the analogue circuit approach to computational neural modelling.
Energy Technology Data Exchange (ETDEWEB)
Rohrer, Brandon Robinson; Rothganger, Fredrick H.; Verzi, Stephen J.; Xavier, Patrick Gordon
2010-09-01
The neocortex is perhaps the highest region of the human brain, where audio and visual perception takes place along with many important cognitive functions. An important research goal is to describe the mechanisms implemented by the neocortex. There is an apparent regularity in the structure of the neocortex [Brodmann 1909, Mountcastle 1957] which may help simplify this task. The work reported here addresses the problem of how to describe the putative repeated units ('cortical circuits') in a manner that is easily understood and manipulated, with the long-term goal of developing a mathematical and algorithmic description of their function. The approach is to reduce each algorithm to an enhanced perceptron-like structure and describe its computation using difference equations. We organize this algorithmic processing into larger structures based on physiological observations, and implement key modeling concepts in software which runs on parallel computing hardware.
Memristor Circuits and Systems
Zidan, Mohammed A.
2015-05-01
Current CMOS-based technologies are facing design challenges related to the continuous scaling down of the minimum feature size, according to Moore’s law. Moreover, conventional computing architecture is no longer an effective way of fulfilling modern applications demands, such as big data analysis, pattern recognition, and vector processing. Therefore, there is an exigent need to shift to new technologies, at both the architecture and the device levels. Recently, memristor devices and structures attracted attention for being promising candidates for this job. Memristor device adds a new dimension for designing novel circuits and systems. In addition, high-density memristor-based crossbar is widely considered to be the essential element for future memory and bio-inspired computing systems. However, numerous challenges need to be addressed before the memristor genuinely replaces current memory and computing technologies, which is the motivation behind this research effort. In order to address the technology challenges, we begin by fabricating and modeling the memristor device. The devices fabricated at our local clean room enriched our understanding of the memristive phenomenon and enabled the experimental testing for our memristor-based circuits. Moreover, our proposed mathematical modeling for memristor behavior is an essential element for the theoretical circuit design stage. Designing and addressing the challenges of memristor systems with practical complexity, however, requires an extra step, which takes the form of a reliable and modular simulation platform. We, therefore, built a new simulation platform for the resistive crossbar, which can simulate realistic size arrays filled with real memory data. In addition, this simulation platform includes various crossbar nonidealities in order to obtain accurate simulation results. Consequently, we were able to address the significant challenges facing the high density memristor crossbar, as the building block for
Rosaria Marraffino
2014-01-01
You have always been told that electronic devices fear water. However, at the Surface Mount Devices (SMD) Workshop here at CERN all the electronic assemblies are cleaned with a machine that looks like a… dishwasher. The circuit dishwasher. Credit: Clara Nellist. If you think the image above shows a dishwasher, you wouldn’t be completely wrong. Apart from the fact that the whole pumping system and the case itself are made entirely from stainless steel and chemical resistant materials, and the fact that it washes electrical boards instead of dishes… it works exactly like a dishwasher. It’s a professional machine (mainly used in the pharmaceutical industry) designed to clean everything that can be washed with a water-based chemical soap. This type of treatment increases the lifetime of the electronic boards and therefore the LHC's reliability by preventing corrosion problems in the severe radiation and ozone environment of the LHC tunn...
Buckley, P M
1980-01-01
In the past, the teaching of electricity and electronics has more often than not been carried out from a theoretical and often highly academic standpoint. Fundamentals and basic concepts have often been presented with no indication of their practical appli cations, and all too frequently they have been illustrated by artificially contrived laboratory experiments bearing little relationship to the outside world. The course comes in the form of fourteen fairly open-ended constructional experiments or projects. Each experiment has associated with it a construction exercise and an explanation. The basic idea behind this dual presentation is that the student can embark on each circuit following only the briefest possible instructions and that an open-ended approach is thereby not prejudiced by an initial lengthy encounter with the theory behind the project; this being a sure way to dampen enthusiasm at the outset. As the investigation progresses, questions inevitably arise. Descriptions of the phenomena encounte...
Diamond Integrated Optomechanical Circuits
Rath, Patrik; Nebel, Christoph; Wild, Christoph; Pernice, Wolfram H P
2013-01-01
Diamond offers unique material advantages for the realization of micro- and nanomechanical resonators due to its high Young's modulus, compatibility with harsh environments and superior thermal properties. At the same time, the wide electronic bandgap of 5.45eV makes diamond a suitable material for integrated optics because of broadband transparency and the absence of free-carrier absorption commonly encountered in silicon photonics. Here we take advantage of both to engineer full-scale optomechanical circuits in diamond thin films. We show that polycrystalline diamond films fabricated by chemical vapour deposition provide a convenient waferscale substrate for the realization of high quality nanophotonic devices. Using free-standing nanomechanical resonators embedded in on-chip Mach-Zehnder interferometers, we demonstrate efficient optomechanical transduction via gradient optical forces. Fabricated diamond resonators reproducibly show high mechanical quality factors up to 11,200. Our low cost, wideband, carri...
Reverse logistics - a framework
Brito, Marisa; Dekker, Rommert
2002-01-01
textabstractIn this paper we define and compare Reverse Logistics definitions. We start by giving an understanding framework of Reverse Logistics: the why-what-how. By this means, we put in context the driving forces for Reverse Logistics, a typology of return reasons, a classification of products, processes and actors. In addition we provide a decision framework for Reverse Logistics and we present it according to long, medium and short term decisions, i.e. strategic-tactic-operational decis...
Reverse cholesterol transport revisited
Institute of Scientific and Technical Information of China (English)
Astrid; E; van; der; Velde
2010-01-01
Reverse cholesterol transport was originally described as the high-density lipoprotein-mediated cholesterol flux from the periphery via the hepatobiliary tract to the intestinal lumen, leading to fecal excretion. Since the introduction of reverse cholesterol transport in the 1970s, this pathway has been intensively investigated. In this topic highlight, the classical reverse cholesterol transport concepts are discussed and the subject reverse cholesterol transport is revisited.
Reverse logistics - a framework
M.P. de Brito (Marisa); R. Dekker (Rommert)
2002-01-01
textabstractIn this paper we define and compare Reverse Logistics definitions. We start by giving an understanding framework of Reverse Logistics: the why-what-how. By this means, we put in context the driving forces for Reverse Logistics, a typology of return reasons, a classification of product
Comminution circuits for compact itabirites
Directory of Open Access Journals (Sweden)
Pedro Ferreira Pinto
Full Text Available Abstract In the beneficiation of compact Itabirites, crushing and grinding account for major operational and capital costs. As such, the study and development of comminution circuits have a fundamental importance for feasibility and optimization of compact Itabirite beneficiation. This work makes a comparison between comminution circuits for compact Itabirites from the Iron Quadrangle. The circuits developed are: a crushing and ball mill circuit (CB, a SAG mill and ball mill circuit (SAB and a single stage SAG mill circuit (SSSAG. For the SAB circuit, the use of pebble crushing is analyzed (SABC. An industrial circuit for 25 million tons of run of mine was developed for each route from tests on a pilot scale (grinding and industrial scale. The energy consumption obtained for grinding in the pilot tests was compared with that reported by Donda and Bond. The SSSAG route had the lowest energy consumption, 11.8kWh/t and the SAB route had the highest energy consumption, 15.8kWh/t. The CB and SABC routes had a similar energy consumption of 14.4 kWh/t and 14.5 kWh/t respectively.
Logic Circuit Design Selected Methods
Vingron, Shimon P
2012-01-01
In three main divisions the book covers combinational circuits, latches, and asynchronous sequential circuits. Combinational circuits have no memorising ability, while sequential circuits have such an ability to various degrees. Latches are the simplest sequential circuits, ones with the shortest memory. The presentation is decidedly non-standard. The design of combinational circuits is discussed in an orthodox manner using normal forms and in an unorthodox manner using set-theoretical evaluation formulas relying heavily on Karnaugh maps. The latter approach allows for a new design technique called composition. Latches are covered very extensively. Their memory functions are expressed mathematically in a time-independent manner allowing the use of (normal, non-temporal) Boolean logic in their calculation. The theory of latches is then used as the basis for calculating asynchronous circuits. Asynchronous circuits are specified in a tree-representation, eac...
Enhancement of Linear Circuit Program
DEFF Research Database (Denmark)
Gaunholt, Hans; Dabu, Mihaela; Beldiman, Octavian
1996-01-01
In this report a preliminary user friendly interface has been added to the LCP2 program making it possible to describe an electronic circuit by actually drawing the circuit on the screen. Component values and other options and parameters can easily be set by the aid of the interface. The interface...
Short-circuit impedance measurement
DEFF Research Database (Denmark)
Pedersen, Knud Ole Helgesen; Nielsen, Arne Hejde; Poulsen, Niels Kjølstad
2003-01-01
Methods for estimating the short-circuit impedance in the power grid are investigated for various voltage levels and situations. The short-circuit impedance is measured, preferably from naturally occurring load changes in the grid, and it is shown that such a measurement system faces different...
Goldfarb, Joseph M.
1995-01-01
The article presents a method for swimming teachers and coaches to stave off workout boredom in their students by using a circuit in the pool. After explaining how to set up a training circuit, the article describes sample stations and notes important safety precautions. (SM)
Enhancement of Linear Circuit Program
DEFF Research Database (Denmark)
Gaunholt, Hans; Dabu, Mihaela; Beldiman, Octavian
1996-01-01
In this report a preliminary user friendly interface has been added to the LCP2 program making it possible to describe an electronic circuit by actually drawing the circuit on the screen. Component values and other options and parameters can easily be set by the aid of the interface. The interfac...
Accurate Switched-Voltage voltage averaging circuit
金光, 一幸; 松本, 寛樹
2006-01-01
Abstract ###This paper proposes an accurate Switched-Voltage (SV) voltage averaging circuit. It is presented ###to compensated for NMOS missmatch error at MOS differential type voltage averaging circuit. ###The proposed circuit consists of a voltage averaging and a SV sample/hold (S/H) circuit. It can ###operate using nonoverlapping three phase clocks. Performance of this circuit is verified by PSpice ###simulations.
46 CFR 169.670 - Circuit breakers.
2010-10-01
... 46 Shipping 7 2010-10-01 2010-10-01 false Circuit breakers. 169.670 Section 169.670 Shipping COAST... Gross Tons § 169.670 Circuit breakers. Each circuit breaker must be of the manually reset type designed... the circuit without damage to the circuit breaker....
Circuit breakers for addiction.
Foy, A
2007-05-01
The phenomenon of addiction is complex, although its expression clinically is relatively straightforward. There is a series of neurophysiological changes that mediate changes in the mesolimbic and mesocortical systems which in turn lead to disturbances in reward mechanisms. These then act to perpetuate the cycle of intoxication and reinforcement, withdrawal, craving and compulsive use. As our understanding of the pathophysiology of this process has improved, new pharmacological agents have been developed with the potential to moderate or even reverse it. This article briefly reviews the treatment of addiction with particular reference to emerging pharmaceutical agents.
Photodiode circuits for retinal prostheses.
Loudin, J D; Cogan, S F; Mathieson, K; Sher, A; Palanker, D V
2011-10-01
Photodiode circuits show promise for the development of high-resolution retinal prostheses. While several of these systems have been constructed and some even implanted in humans, existing descriptions of the complex optoelectronic interaction between light, photodiode, and the electrode/electrolyte load are limited. This study examines this interaction in depth with theoretical calculations and experimental measurements. Actively biased photoconductive and passive photovoltaic circuits are investigated, with the photovoltaic circuits consisting of one or more diodes connected in series, and the photoconductive circuits consisting of a single diode in series with a pulsed bias voltage. Circuit behavior and charge injection levels were markedly different for platinum and sputtered iridium-oxide film (SIROF) electrodes. Photovoltaic circuits were able to deliver 0.038 mC/cm(2) (0.75 nC/phase) per photodiode with 50- μm platinum electrodes, and 0.54-mC/cm(2) (11 nC/phase) per photodiode with 50-μ m SIROF electrodes driven with 0.5-ms pulses of light at 25 Hz. The same pulses applied to photoconductive circuits with the same electrodes were able to deliver charge injections as high as 0.38 and 7.6 mC/cm(2) (7.5 and 150 nC/phase), respectively. We demonstrate photovoltaic stimulation of rabbit retina in-vitro, with 0.5-ms pulses of 905-nm light using peak irradiance of 1 mW/mm(2). Based on the experimental data, we derive electrochemical and optical safety limits for pixel density and charge injection in various circuits. While photoconductive circuits offer smaller pixels, photovoltaic systems do not require an external bias voltage. Both classes of circuits show promise for the development of high-resolution optoelectronic retinal prostheses.
Experimental Device for Learning of Logical Circuit Design using Integrated Circuits
石橋, 孝昭
2012-01-01
This paper presents an experimental device for learning of logical circuit design using integrated circuits and breadboards. The experimental device can be made at a low cost and can be used for many subjects such as logical circuits, computer engineering, basic electricity, electrical circuits and electronic circuits. The proposed device is effective to learn the logical circuits than the usual lecture.
30 CFR 75.800 - High-voltage circuits; circuit breakers.
2010-07-01
... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 75.800... § 75.800 High-voltage circuits; circuit breakers. High-voltage circuits entering the underground area of any coal mine shall be protected by suitable circuit breakers of adequate interrupting...
Performance analysis of electrical circuits /PANE/
Johnson, K. L.; Steinberg, L. L.
1968-01-01
Automated statistical and worst case computer program has been designed to perform dc and ac steady circuit analyses. The program determines the worst case circuit performance by solving circuit equations.
Institute of Scientific and Technical Information of China (English)
Jadav Chandra DAS; Debashis DE
2016-01-01
Quantum-dot cellular automata (QCA) is an emerging area of research in reversible computing. It can be used to design nanoscale circuits. In nanocommunication, the detection and correction of errors in a received message is a major factor. Besides, device density and power dissipation are the key issues in the nanocommunication architecture. For the first time, QCA-based designs of the reversible low-power odd parity generator and odd parity checker using the Feynman gate have been achieved in this study. Using the proposed parity generator and parity checker circuit, a nanocommunication architecture is pro-posed. The detection of errors in the received message during transmission is also explored. The proposed QCA Feynman gate outshines the existing ones in terms of area, cell count, and delay. The quantum costs of the proposed conventional reversible circuits and their QCA layouts are calculated and compared, which establishes that the proposed QCA circuits have very low quantum cost compared to conventional designs. The energy dissipation by the layouts is estimated, which ensures the possibility of QCA nano-device serving as an alternative platform for the implementation of reversible circuits. The stability of the proposed circuits under thermal randomness is analyzed, showing the operational efficiency of the circuits. The simulation results of the proposed design are tested with theoretical values, showing the accuracy of the circuits. The proposed circuits can be used to design more complex low-power nanoscale lossless nanocommunication architecture such as nano-transmitters and nano-receivers.
The GABAergic Anterior Paired Lateral Neurons Facilitate Olfactory Reversal Learning in "Drosophila"
Wu, Yanying; Ren, Qingzhong; Li, Hao; Guo, Aike
2012-01-01
Reversal learning has been widely used to probe the implementation of cognitive flexibility in the brain. Previous studies in monkeys identified an essential role of the orbitofrontal cortex (OFC) in reversal learning. However, the underlying circuits and molecular mechanisms are poorly understood. Here, we use the T-maze to investigate the neural…
The GABAergic Anterior Paired Lateral Neurons Facilitate Olfactory Reversal Learning in "Drosophila"
Wu, Yanying; Ren, Qingzhong; Li, Hao; Guo, Aike
2012-01-01
Reversal learning has been widely used to probe the implementation of cognitive flexibility in the brain. Previous studies in monkeys identified an essential role of the orbitofrontal cortex (OFC) in reversal learning. However, the underlying circuits and molecular mechanisms are poorly understood. Here, we use the T-maze to investigate the neural…
Synthesis of Reversible Functions Beyond Gate Count and Quantum Cost
Wille, Robert; Drechsler, Rolf
2010-01-01
Many synthesis approaches for reversible and quantum logic have been proposed so far. However, most of them generate circuits with respect to simple metrics, i.e. gate count or quantum cost. On the other hand, to physically realize reversible and quantum hardware, additional constraints exist. In this paper, we describe cost metrics beyond gate count and quantum cost that should be considered while synthesizing reversible and quantum logic for the respective target technologies. We show that the evaluation of a synthesis approach may differ if additional costs are applied. In addition, a new cost metric, namely Nearest Neighbor Cost (NNC) which is imposed by realistic physical quantum architectures, is considered in detail. We discuss how existing synthesis flows can be extended to generate optimal circuits with respect to NNC while still keeping the quantum cost small.
Variational integrators for electric circuits
Energy Technology Data Exchange (ETDEWEB)
Ober-Blöbaum, Sina, E-mail: sinaob@math.upb.de [Computational Dynamics and Optimal Control, University of Paderborn (Germany); Tao, Molei [Courant Institute of Mathematical Sciences, New York University (United States); Cheng, Mulin [Applied and Computational Mathematics, California Institute of Technology (United States); Owhadi, Houman; Marsden, Jerrold E. [Control and Dynamical Systems, California Institute of Technology (United States); Applied and Computational Mathematics, California Institute of Technology (United States)
2013-06-01
In this contribution, we develop a variational integrator for the simulation of (stochastic and multiscale) electric circuits. When considering the dynamics of an electric circuit, one is faced with three special situations: 1. The system involves external (control) forcing through external (controlled) voltage sources and resistors. 2. The system is constrained via the Kirchhoff current (KCL) and voltage laws (KVL). 3. The Lagrangian is degenerate. Based on a geometric setting, an appropriate variational formulation is presented to model the circuit from which the equations of motion are derived. A time-discrete variational formulation provides an iteration scheme for the simulation of the electric circuit. Dependent on the discretization, the intrinsic degeneracy of the system can be canceled for the discrete variational scheme. In this way, a variational integrator is constructed that gains several advantages compared to standard integration tools for circuits; in particular, a comparison to BDF methods (which are usually the method of choice for the simulation of electric circuits) shows that even for simple LCR circuits, a better energy behavior and frequency spectrum preservation can be observed using the developed variational integrator.
A Novel Design of Half Subtractor using Reversible Feynman Gate in Quantum Dot cellular Automata
Directory of Open Access Journals (Sweden)
Rubina Akter
2014-12-01
Full Text Available Quantum Dot cellular Automata (QCA is an emerging, promising alternative to CMOS technology that performs its task by encoding binary information on electronic charge configuration of a cell. All circuit based on QCA has an advantages of high speed, high parallel processing, high integrityand low power consumption. Reversible logic gates are the leading part in Quantum Dot cellular Automata. Reversible logic gates have an extensive feature that does not lose information. In this paper, we present a novel architecture of half subtractor gate design by reversible Feynman gate. This circuit is designedbased on QCA logic gates such as QCA majority voter gate, majority AND gate, majority OR gate and inverter gate. This circuit will provide an effective working efficiency on computational units of the digital circuit system.
Overpulse railgun energy recovery circuit
Energy Technology Data Exchange (ETDEWEB)
Honig, E.M.
1984-09-28
The invention presented relates to a high-power pulsing circuit and more particularly to a repetitive pulse inductive energy storage and transfer circuit for an electromagnetic launcher. In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, an overpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.
Counterpulse railgun energy recovery circuit
Energy Technology Data Exchange (ETDEWEB)
Honig, E.M.
1984-09-28
The invention presented relates to a high-power pulsing circuit and more particularly to a repetitive pulse inductive energy storage and transfer circuit for an electromagnetic launcher. In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, a counterpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.
The Maplin electronic circuits handbook
Tooley, Michael
2015-01-01
The Maplin Electronic Circuits Handbook provides pertinent data, formula, explanation, practical guidance, theory and practical guidance in the design, testing, and construction of electronic circuits. This book discusses the developments in electronics technology techniques.Organized into 11 chapters, this book begins with an overview of the common types of passive component. This text then provides the reader with sufficient information to make a correct selection of passive components for use in the circuits. Other chapters consider the various types of the most commonly used semiconductor
Secure integrated circuits and systems
Verbauwhede, Ingrid MR
2010-01-01
On any advanced integrated circuit or 'system-on-chip' there is a need for security. In many applications the actual implementation has become the weakest link in security rather than the algorithms or protocols. The purpose of the book is to give the integrated circuits and systems designer an insight into the basics of security and cryptography from the implementation point of view. As a designer of integrated circuits and systems it is important to know both the state-of-the-art attacks as well as the countermeasures. Optimizing for security is different from optimizations for speed, area,
Determining Covers in Combinational Circuits
Directory of Open Access Journals (Sweden)
Ljubomir Cvetkovic
2011-05-01
Full Text Available In this paper we propose a procedure for determining 0- or 1-cover of an arbitrary line in a combinational circuit. When determining a cover we do not need Boolean expression for the line; only the circuit structure is used. Within the proposed procedure we use the tools of the cube theory, in particular, some operations defined on cubes. The procedure can be applied for determining 0- and 1- covers of output lines in programmable logic devices. Basically, this procedure is a method for the analysis of a combinational circuit.
Reversible cortical blindness: posterior reversible encephalopathy syndrome.
Bandyopadhyay, Sabyasachi; Mondal, Kanchan Kumar; Das, Somnath; Gupta, Anindya; Biswas, Jaya; Bhattacharyya, Subir Kumar; Biswas, Gautam
2010-11-01
Cortical blindness is defined as visual failure with preserved pupillary reflexes in structurally intact eyes due to bilateral lesions affecting occipital cortex. Bilateral oedema and infarction of the posterior and middle cerebral arterial territory, trauma, glioma and meningioma of the occipital cortex are the main causes of cortical blindness. Posterior reversible encephalopathy syndrome (PRES) refers to the reversible subtype of cortical blindness and is usually associated with hypertension, diabetes, immunosuppression, puerperium with or without eclampsia. Here, 3 cases of PRES with complete or partial visual recovery following treatment in 6-month follow-up are reported.
Investigating Mesoscopic Non-linear Series Circuit with the Coherent Thermo State Representation
Wang, Xiu-Xia
2017-03-01
For the first time we considered the quantum effects of mesoscopic non-linear series circuit with the coherent thermo state representation | τ rangle . After introducing the representation |τ rangle , we derived the expression of the density matrix ρ and find that | ρ rangle T presents Gauss type with the representation | τ rangle . In addition, we derived the Wigner function and calculated the quantum fluctuation in the thermo vacuum state |0( β)>. It is shown that the circuit has the zero current fluctuation because the diode has the reverse saturation current, and the temperature affects the Wigner function of the circuit in thermo vacuum state deeply.
Introduction to reversible computing
Perumalla, Kalyan S
2013-01-01
Few books comprehensively cover the software and programming aspects of reversible computing. Filling this gap, Introduction to Reversible Computing offers an expanded view of the field that includes the traditional energy-motivated hardware viewpoint as well as the emerging application-motivated software approach. Collecting scattered knowledge into one coherent account, the book provides a compendium of both classical and recently developed results on reversible computing. It explores up-and-coming theories, techniques, and tools for the application of rever
CADAT integrated circuit mask analysis
1981-01-01
CADAT System Mask Analysis Program (MAPS2) is automated software tool for analyzing integrated-circuit mask design. Included in MAPS2 functions are artwork verification, device identification, nodal analysis, capacitance calculation, and logic equation generation.
Circuit design on plastic foils
Raiteri, Daniele; Roermund, Arthur H M
2015-01-01
This book illustrates a variety of circuit designs on plastic foils and provides all the information needed to undertake successful designs in large-area electronics. The authors demonstrate architectural, circuit, layout, and device solutions and explain the reasons and the creative process behind each. Readers will learn how to keep under control large-area technologies and achieve robust, reliable circuit designs that can face the challenges imposed by low-cost low-temperature high-throughput manufacturing. • Discusses implications of problems associated with large-area electronics and compares them to standard silicon; • Provides the basis for understanding physics and modeling of disordered material; • Includes guidelines to quickly setup the basic CAD tools enabling efficient and reliable designs; • Illustrates practical solutions to cope with hard/soft faults, variability, mismatch, aging and bias stress at architecture, circuit, layout, and device levels.
Chaos Control for Chua's Circuits
Tôrres, L. A. B.; Aguirre, L. A.; Palhares, R. M.; Mendes, E. M. A. M.
The practical implementation of Chua's circuit control methods is discussed in this chapter. In order to better address this subject, an inductorless Chua's circuit realization is first presented, followed by practical issues related to data analysis, mathematical modelling, and dynamical characterization associated to this electronic chaotic oscillator. As a consequence of the investigation of different control strategies applied to Chua's circuit, a tradeoff among control objective, control energy, and model complexity is devised, which quite naturally leads to a principle that seems to be of general nature: the Information Transmission Via Control (ITVC) for nonlinear oscillators. The main purpose of the present chapter is to serve as an introductory guide to the universe of Chua's circuit control, synchronization, and mathematical modelling.
Spinal sensory circuits in motion
2016-01-01
International audience; The role of sensory feedback in shaping locomotion has been long debated. Recent advances in genetics and behavior analysis revealed the importance of proprioceptive pathways in spinal circuits. The mechanisms underlying peripheral mechanosensation enabled to unravel the networks that feedback to spinal circuits in order to modulate locomotion. Sensory inputs to the vertebrate spinal cord were long thought to originate from the periphery. Recent studies challenge this ...
Optimizing Transmission Line Matching Circuits
Novak, S.
1996-01-01
When designing transmission line matching circuits, there exist often overlooked, additional, not much used, degree of choice in the selection of the transmission line impedance. In this work are presented results of CAD analysis for the two element transmission line matching networks, demonstrating that selecting matching circuits transmission lines with higher impedance, than usually used 50 or 75 ohms, can in most cases substantially decrease the physical dimension of the final matching ci...
Reverse Core Engine with Thrust Reverser
Suciu, Gabriel L. (Inventor); Chandler, Jesse M. (Inventor)
2017-01-01
An engine system has a gas generator, a bi-fi wall surrounding at least a portion of the gas generator, a casing surrounding a fan, and the casing having first and second thrust reverser doors which in a deployed position abut each other and the bi-fi wall.
Directory of Open Access Journals (Sweden)
Md. Fayad Hasan
2016-09-01
Full Text Available Neural circuits are responsible for the brain’s ability to process and store information. Reductionist approaches to understanding the brain include isolation of individual neurons for detailed characterization. When maintained in vitro for several days or weeks, dissociated neurons self-assemble into randomly connected networks that produce synchronized activity and are capable of learning. This review focuses on efforts to control neuronal connectivity in vitro and construct living neural circuits of increasing complexity and precision. Microfabrication-based methods have been developed to guide network self-assembly, accomplishing control over in vitro circuit size and connectivity. The ability to control neural connectivity and synchronized activity led to the implementation of logic functions using living neurons. Techniques to construct and control three-dimensional circuits have also been established. Advances in multiple electrode arrays as well as genetically encoded, optical activity sensors and transducers enabled highly specific interfaces to circuits composed of thousands of neurons. Further advances in on-chip neural circuits may lead to better understanding of the brain.
Design, Analysis, Implementation and Synthesis of 16 bit Reversible ALU by using Xilinx 12.2
Directory of Open Access Journals (Sweden)
S.Anusha
2014-04-01
Full Text Available In the modern world, Arithmetic Logic Unit (ALU is one of the most crucial components of any system and is used in many appliances like calculators, cell phones, and computers and so on. An arithmetic logic unit is a multi-functional circuit that conditionally performs one of several possible functions on two operands A and B depending on control inputs. This paper proposes the design of programmable reversible logic gate structures, targeted for the ALU implementation and their use in the realization of an efficient reversible ALU. Reversible or information-lossless circuits have applications in digital signal processing, communication, computer graphics and cryptography. This ALU consists of thirteen operations, 5 arithmetic, 4 logical operations and 4 shifting operations. All the modules are being designed using the basic reversible gates. Using reversible logic gates instead of traditional logic AND/OR gates, a reversible ALU whose function is the same as traditional ALU is constructed. Comparing with the number of input bits and the discarded bits of the traditional ALU, the reversible ALU significantly reduce the use and loss of information bits. The proposed reversible 16-bit ALU reduces the information bits use and loss by reusing the logic information bits logically and realizes the goal of lowering power consumption of logic circuits. Programmable reversible logic gates are realized in Verilog by using XILINX 12.2. Key words:
Quantum reverse hypercontractivity
Energy Technology Data Exchange (ETDEWEB)
Cubitt, Toby [Department of Computer Science, University College London, London, United Kingdom and Centre for Quantum Information and Foundations, DAMTP, University of Cambridge, Cambridge (United Kingdom); Kastoryano, Michael [NBIA, Niels Bohr Institute, University of Copenhagen, 2100 Copenhagen (Denmark); Montanaro, Ashley [School of Mathematics, University of Bristol, Bristol (United Kingdom); Temme, Kristan [Institute for Quantum Information and Matter, California Institute of Technology, Pasadena, California 91125 (United States)
2015-10-15
We develop reverse versions of hypercontractive inequalities for quantum channels. By generalizing classical techniques, we prove a reverse hypercontractive inequality for tensor products of qubit depolarizing channels. We apply this to obtain a rapid mixing result for depolarizing noise applied to large subspaces and to prove bounds on a quantum generalization of non-interactive correlation distillation.
Suciu, Gabriel L. (Inventor); Chandler, Jesse M. (Inventor)
2017-01-01
An aircraft includes a fuselage including a propulsion system supported within an aft portion. A thrust reverser is mounted proximate to the propulsion system for directing thrust in a direction to slow the aircraft. The thrust reverser directs thrust at an angle relative to a vertical plane to reduce interference on control surfaces and reduce generation of underbody lift.
Atrioventricular Pacemaker Lead Reversal
Directory of Open Access Journals (Sweden)
Mehmet K Aktas, MD
2007-01-01
Full Text Available During cardiac surgery temporary epicardial atrial and ventricular leads are placed in case cardiac pacing is required postoperatively. We present the first reported series of patients with reversal of atrioventricular electrodes in the temporary pacemaker without any consequent deleterious hemodynamic effect. We review the electrocardiographic findings and discuss the findings that lead to the discovery of atrioventricular lead reversal.
Reversible cerebral vasoconstriction syndrome
Directory of Open Access Journals (Sweden)
Saini Monica
2009-01-01
Full Text Available Reversible cerebral vasoconstriction syndromes (RCVS are a group of disorders that have in common an acute presentation with headache, reversible vasoconstriction of cerebral arteries, with or without neurological signs and symptoms. In contrast to primary central nervous system vasculitis, they have a relatively benign course. We describe here a patient who was diagnosed with RCVS.
Directory of Open Access Journals (Sweden)
Francesco Tiezzi
2014-06-01
Full Text Available In this work, we incorporate reversibility into structured communication-based programming, to allow parties of a session to automatically undo, in a rollback fashion, the effect of previously executed interactions. This permits taking different computation paths along the same session, as well as reverting the whole session and starting a new one. Our aim is to define a theoretical basis for examining the interplay in concurrent systems between reversible computation and session-based interaction. We thus enrich a session-based variant of pi-calculus with memory devices, dedicated to keep track of the computation history of sessions in order to reverse it. We discuss our initial investigation concerning the definition of a session type discipline for the proposed reversible calculus, and its practical advantages for static verification of safe composition in communication-centric distributed software performing reversible computations.
Difference-Equation/Flow-Graph Circuit Analysis
Mcvey, I. M.
1988-01-01
Numerical technique enables rapid, approximate analyses of electronic circuits containing linear and nonlinear elements. Practiced in variety of computer languages on large and small computers; for circuits simple enough, programmable hand calculators used. Although some combinations of circuit elements make numerical solutions diverge, enables quick identification of divergence and correction of circuit models to make solutions converge.
Multi-Layer E-Textile Circuits
Dunne, Lucy E.; Bibeau, Kaila; Mulligan, Lucie; Frith, Ashton; Simon, Cory
2012-01-01
Stitched e-textile circuits facilitate wearable, flexible, comfortable wearable technology. However, while stitched methods of e-textile circuits are common, multi-layer circuit creation remains a challenge. Here, we present methods of stitched multi-layer circuit creation using accessible tools and techniques.
30 CFR 56.6403 - Branch circuits.
2010-07-01
... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Branch circuits. 56.6403 Section 56.6403... Blasting § 56.6403 Branch circuits. (a) If electric blasting includes the use of branch circuits, each branch shall be equipped with a safety switch or equivalent method to isolate the circuits to be used....
Equivalence Checking of Hierarchical Combinational Circuits
DEFF Research Database (Denmark)
Williams, Poul Frederick; Hulgaard, Henrik; Andersen, Henrik Reif
1999-01-01
This paper presents a method for verifying that two hierarchical combinational circuits implement the same Boolean functions. The key new feature of the method is its ability to exploit the modularity of circuits to reuse results obtained from one part of the circuits in other parts. We demonstrate...... our method on large adder and multiplier circuits....
Comparison between four piezoelectric energy harvesting circuits
Institute of Scientific and Technical Information of China (English)
Jinhao QIU; Hao JIANG; Hongli JI; Kongjun ZHU
2009-01-01
This paper investigates and compares the efficiencies of four different interfaces for vibration-based energy harvesting systems. Among those four circuits, two circuits adopt the synchronous switching technique, in which the circuit is switched synchronously with the vibration. In this study, a simple source-less trigger circuit used to control the synchronized switch is proposed and two interface circuits of energy harvesting systems are designed based on the trigger circuit. To validate the effectiveness of the proposed circuits, an experimental system was established and the power harvested by those circuits from a vibration beam was measured. Experimental results show that the two new circuits can increase the harvested power by factors 2.6 and 7, respectively, without consuming extra power in the circuits.
Using Combinational Circuits for Control Purposes
Directory of Open Access Journals (Sweden)
Maher A. Nabulsi
2009-01-01
Full Text Available Problem statement: Combinational circuits are used in computers for generating binary control decisions and for providing digital components for data processing. Approach: The use of combinational circuits and logic gates to control other circuits was discussed. Different systems that use logic gates, multiplexers, decoders and encoders to control different circuits were presented. This study presented a design and implementation of some combinational circuits such as a decoder, an encoder, a multiplexer, a bus system and read/write memory operations. Results: When we connected some types of combinational circuits to the inputs/outputs of digital circuit, these combinational circuits can help us to manage and flow a different types of control signals through a large digital circuit. Conclusion: Many combinational circuits had a good function which can be used for controlling different parts of any digital system and they produce a suitable way to transfer a control signals between different digital components of any large digital system.
Instrumentation and test gear circuits manual
Marston, R M
2013-01-01
Instrumentation and Test Gear Circuits Manual provides diagrams, graphs, tables, and discussions of several types of practical circuits. The practical circuits covered in this book include attenuators, bridges, scope trace doublers, timebases, and digital frequency meters. Chapter 1 discusses the basic instrumentation and test gear principles. Chapter 2 deals with the design of passive attenuators, and Chapter 3 with passive and active filter circuits. The subsequent chapters tackle 'bridge' circuits, analogue and digital metering techniques and circuitry, signal and waveform generation, and p
30 CFR 75.601-1 - Short circuit protection; ratings and settings of circuit breakers.
2010-07-01
... of circuit breakers. 75.601-1 Section 75.601-1 Mineral Resources MINE SAFETY AND HEALTH... Trailing Cables § 75.601-1 Short circuit protection; ratings and settings of circuit breakers. Circuit breakers providing short circuit protection for trailing cables shall be set so as not to exceed...
49 CFR 236.5 - Design of control circuits on closed circuit principle.
2010-10-01
... 49 Transportation 4 2010-10-01 2010-10-01 false Design of control circuits on closed circuit..., AND APPLIANCES Rules and Instructions: All Systems General § 236.5 Design of control circuits on closed circuit principle. All control circuits the functioning of which affects safety of train...
30 CFR 77.506 - Electric equipment and circuits; overload and short-circuit protection.
2010-07-01
... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Electric equipment and circuits; overload and short-circuit protection. 77.506 Section 77.506 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... circuits; overload and short-circuit protection. Automatic circuit-breaking devices or fuses of the...
30 CFR 77.800 - High-voltage circuits; circuit breakers.
2010-07-01
... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 77.800... COAL MINES Surface High-Voltage Distribution § 77.800 High-voltage circuits; circuit breakers. High-voltage circuits supplying power to portable or mobile equipment shall be protected by suitable...
Introduction to lethal circuit transformations
Fišer, Petr; Schmidt, Jan
2015-12-01
Logic optimization is a process that takes a logic circuit description (Boolean network) as an input and tries to refine it, to reduce its size and/or depth. An ideal optimization process should be able to devise an optimum implementation of a network in a reasonable time, given any circuit structure at the input. However, there are cases where it completely fails to produce even near-optimum solutions. Such cases are typically induced by non-standard circuit structure modifications. Surprisingly enough, such deviated structures are frequently present in standard benchmark sets too. We may only wonder whether it is an intention of the benchmarks creators, or just an unlucky coincidence. Even though synthesis tools should be primarily well suited for practical circuits, there is no guarantee that, e.g., a higher-level synthesis process will not generate such unlucky structures. Here we present examples of circuit transformations that lead to failure of most of state-of-the-art logic synthesis and optimization processes, both academic and commercial, and suggest actions to mitigate the disturbing effects.
Dynamical compensation in physiological circuits.
Karin, Omer; Swisa, Avital; Glaser, Benjamin; Dor, Yuval; Alon, Uri
2016-11-08
Biological systems can maintain constant steady-state output despite variation in biochemical parameters, a property known as exact adaptation. Exact adaptation is achieved using integral feedback, an engineering strategy that ensures that the output of a system robustly tracks its desired value. However, it is unclear how physiological circuits also keep their output dynamics precise-including the amplitude and response time to a changing input. Such robustness is crucial for endocrine and neuronal homeostatic circuits because they need to provide a precise dynamic response in the face of wide variation in the physiological parameters of their target tissues; how such circuits compensate their dynamics for unavoidable natural fluctuations in parameters is unknown. Here, we present a design principle that provides the desired robustness, which we call dynamical compensation (DC). We present a class of circuits that show DC by means of a nonlinear feedback loop in which the regulated variable controls the functional mass of the controlling endocrine or neuronal tissue. This mechanism applies to the control of blood glucose by insulin and explains several experimental observations on insulin resistance. We provide evidence that this mechanism may also explain compensation and organ size control in other physiological circuits.
Modular construction of mammalian gene circuits using TALE transcriptional repressors.
Li, Yinqing; Jiang, Yun; Chen, He; Liao, Weixi; Li, Zhihua; Weiss, Ron; Xie, Zhen
2015-03-01
An important goal of synthetic biology is the rational design and predictable implementation of synthetic gene circuits using standardized and interchangeable parts. However, engineering of complex circuits in mammalian cells is currently limited by the availability of well-characterized and orthogonal transcriptional repressors. Here, we introduce a library of 26 reversible transcription activator-like effector repressors (TALERs) that bind newly designed hybrid promoters and exert transcriptional repression through steric hindrance of key transcriptional initiation elements. We demonstrate that using the input-output transfer curves of our TALERs enables accurate prediction of the behavior of modularly assembled TALER cascade and switch circuits. We also show that TALER switches using feedback regulation exhibit improved accuracy for microRNA-based HeLa cancer cell classification versus HEK293 cells. Our TALER library is a valuable toolkit for modular engineering of synthetic circuits, enabling programmable manipulation of mammalian cells and helping elucidate design principles of coupled transcriptional and microRNA-mediated post-transcriptional regulation.
Progress in understanding mood disorders: optogenetic dissection of neural circuits.
Lammel, S; Tye, K M; Warden, M R
2014-01-01
Major depression is characterized by a cluster of symptoms that includes hopelessness, low mood, feelings of worthlessness and inability to experience pleasure. The lifetime prevalence of major depression approaches 20%, yet current treatments are often inadequate both because of associated side effects and because they are ineffective for many people. In basic research, animal models are often used to study depression. Typically, experimental animals are exposed to acute or chronic stress to generate a variety of depression-like symptoms. Despite its clinical importance, very little is known about the cellular and neural circuits that mediate these symptoms. Recent advances in circuit-targeted approaches have provided new opportunities to study the neuropathology of mood disorders such as depression and anxiety. We review recent progress and highlight some studies that have begun tracing a functional neuronal circuit diagram that may prove essential in establishing novel treatment strategies in mood disorders. First, we shed light on the complexity of mesocorticolimbic dopamine (DA) responses to stress by discussing two recent studies reporting that optogenetic activation of midbrain DA neurons can induce or reverse depression-related behaviors. Second, we describe the role of the lateral habenula circuitry in the pathophysiology of depression. Finally, we discuss how the prefrontal cortex controls limbic and neuromodulatory circuits in mood disorders.
Performance analysis of reverse recovery minimization effects in DC/DC converter using PSpice
Energy Technology Data Exchange (ETDEWEB)
Yahaya, N.Z.; Heng, D.K.; Wen, L.H.; Ng, A. [Petronas Technological Univ., Tronoh, Perak Darul Ridzuan (Malaysia)
2007-07-01
Diodes play a significant role in many power electronic such as freewheeling and/or snubber components. In order to reduce the overall power loss of the circuit, many design features are required for the diode. Therefore, fast switching and fast recovery power diode have been developed for use the design. One of the circuit losses is due to reverse recovery current of the power diode, which affects performance of the power systems in terms of switching losses and noises. By reducing the reverse recovery current, the power loss of the power diode will also be reduced. In order to reduce the power loss in the circuit, this paper investigated the minimization of the reverse recovery effects in the power diode. An inductive chopper circuit using a CoolMOS power switch was set up to serve as the platform for investigation. The paper presented how the variations of the parameter's values in the inductive load chopper circuit affected the diode's reverse recovery characteristics. The parameters that were considered in the study included the gate drive, duty ratio, CoolMOS switching frequency, and operating temperature. In order to investigate the impact of each parameter on the reverse recovery effects, a PSpice device simulation model using a power diode was utilized. It was concluded that the switching frequency affected the total energy losses more significantly than factors of temperature, gate resistance and the duty ratio. 8 refs., 4 tabs., 10 figs.
Electronically Tunable Sinusoidal Oscillator Circuit
Directory of Open Access Journals (Sweden)
Sudhanshu Maheshwari
2012-01-01
Full Text Available This paper presents a novel electronically tunable third-order sinusoidal oscillator synthesized from a simple topology, employing current-mode blocks. The circuit is realized using the active element: Current Controlled Conveyors (CCCIIs and grounded passive components. The new circuit enjoys the advantages of noninteractive electronically tunable frequency of oscillation, use of grounded passive components, and the simultaneous availability of three sinusoidal voltage outputs. Bias current generation scheme is given for the active elements used. The circuit exhibits good high frequency performance. Nonideal and parasitic study has also been carried out. Wide range frequency tuning is shown with the bias current. The proposed theory is verified through extensive PSPICE simulations using 0.25 μm CMOS process parameters.
Chua's Circuit: Control and Synchronization
Irimiciuc, Stefan-Andrei; Vasilovici, Ovidiu; Dimitriu, Dan-Gheorghe
Chaos-based data encryption is one of the most reliable methods used in secure communications. This implies a good control of a chaotic system and a good synchronization between the involved systems. Here, experimental results are shown on the control and synchronization of Chua's circuits. The control of the chaotic circuit was achieved by using the switching method. The influence of the control signal characteristics (amplitude, frequency and shape) on the system's states was also investigated. The synchronization of two similar chaotic circuits was studied, emphasizing the importance of the chaotic state characteristics of the Master system in respect to those of Slave system. It was shown that the synchronization does not depend on the chaotic state type, neither on the dimension (x, y or z) used for synchronization.
Additive Manufacturing of Hybrid Circuits
Sarobol, Pylin; Cook, Adam; Clem, Paul G.; Keicher, David; Hirschfeld, Deidre; Hall, Aaron C.; Bell, Nelson S.
2016-07-01
There is a rising interest in developing functional electronics using additively manufactured components. Considerations in materials selection and pathways to forming hybrid circuits and devices must demonstrate useful electronic function; must enable integration; and must complement the complex shape, low cost, high volume, and high functionality of structural but generally electronically passive additively manufactured components. This article reviews several emerging technologies being used in industry and research/development to provide integration advantages of fabricating multilayer hybrid circuits or devices. First, we review a maskless, noncontact, direct write (DW) technology that excels in the deposition of metallic colloid inks for electrical interconnects. Second, we review a complementary technology, aerosol deposition (AD), which excels in the deposition of metallic and ceramic powder as consolidated, thick conformal coatings and is additionally patternable through masking. Finally, we show examples of hybrid circuits/devices integrated beyond 2-D planes, using combinations of DW or AD processes and conventional, established processes.
Vertically Integrated Circuits at Fermilab
Energy Technology Data Exchange (ETDEWEB)
Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom; /Fermilab
2009-01-01
The exploration of the vertically integrated circuits, also commonly known as 3D-IC technology, for applications in radiation detection started at Fermilab in 2006. This paper examines the opportunities that vertical integration offers by looking at various 3D designs that have been completed by Fermilab. The emphasis is on opportunities that are presented by through silicon vias (TSV), wafer and circuit thinning and finally fusion bonding techniques to replace conventional bump bonding. Early work by Fermilab has led to an international consortium for the development of 3D-IC circuits for High Energy Physics. The consortium has submitted over 25 different designs for the Fermilab organized MPW run organized for the first time.
Nuclear sensor signal processing circuit
Kallenbach, Gene A.; Noda, Frank T.; Mitchell, Dean J.; Etzkin, Joshua L.
2007-02-20
An apparatus and method are disclosed for a compact and temperature-insensitive nuclear sensor that can be calibrated with a non-hazardous radioactive sample. The nuclear sensor includes a gamma ray sensor that generates tail pulses from radioactive samples. An analog conditioning circuit conditions the tail-pulse signals from the gamma ray sensor, and a tail-pulse simulator circuit generates a plurality of simulated tail-pulse signals. A computer system processes the tail pulses from the gamma ray sensor and the simulated tail pulses from the tail-pulse simulator circuit. The nuclear sensor is calibrated under the control of the computer. The offset is adjusted using the simulated tail pulses. Since the offset is set to zero or near zero, the sensor gain can be adjusted with a non-hazardous radioactive source such as, for example, naturally occurring radiation and potassium chloride.
An algebra of reversible computation
2016-01-01
We design an axiomatization for reversible computation called reversible ACP (RACP). It has four extendible modules, basic reversible processes algebra (BRPA), algebra of reversible communicating processes (ARCP), recursion and abstraction. Just like process algebra ACP in classical computing, RACP can be treated as an axiomatization foundation for reversible computation.
An Algebra of Reversible Computation
Yong WANG
2014-01-01
We design an axiomatization for reversible computation called reversible ACP (RACP). It has four extendible modules, basic reversible processes algebra (BRPA), algebra of reversible communicating processes (ARCP), recursion and abstraction. Just like process algebra ACP in classical computing, RACP can be treated as an axiomatization foundation for reversible computation.
An algebra of reversible computation.
Wang, Yong
2016-01-01
We design an axiomatization for reversible computation called reversible ACP (RACP). It has four extendible modules: basic reversible processes algebra, algebra of reversible communicating processes, recursion and abstraction. Just like process algebra ACP in classical computing, RACP can be treated as an axiomatization foundation for reversible computation.
Reversible Data Hiding Techniques
Directory of Open Access Journals (Sweden)
Dhananjay Yadav
2012-03-01
Full Text Available Reversible data hiding is a technique that is used to hide data inside an image. The data is hidden in such a way that the exact or original data is not visible. The hidden data can be retrieved as and when required. There are several methods that are used in reversible data hiding techniques like Watermarking, Lossless embedding and encryption. In this paper we present a review of reversible watermarking techniques and show different methods that are used to get reversible data hiding technique with higher embedding capacity and invisible objects. Watermark need not be hidden. Watermarking can be applied to 1. Images, 2. Text, 3. Audio/video, 4. Software.
Reversible flowchart languages and the structured reversible program theorem
DEFF Research Database (Denmark)
Yokoyama, Tetsuo; Axelsen, Holger Bock; Glück, Robert
2008-01-01
Many irreversible computation models have reversible counterparts, but these are poorly understood at present. We introduce reversible flowcharts with an assertion operator and show that any reversible flowchart can be simulated by a structured reversible flowchart using only three control flow o...... justification for low-level machine code for reversible microprocessors as well as high-level block-structured reversible languages. We give examples for both such languages and illustrate them with a lossless encoder for permutations given by Dijkstra....
Novel designs for fault tolerant reversible binary coded decimal adders
Zhou, Ri-Gui; Li, Yan-Cheng; Zhang, Man-Qun
2014-10-01
Reversible logic circuits have received emerging attentions in recent years. Reversible logic is widely applied in some new technical fields, such as quantum computing, nanocomputing and optical computing and so on. In this paper, three fault tolerant gates are proposed, ZPL gate, ZQC gate and ZC gate. By using the proposed gates, fault tolerant quantum and reversible BCD adder and skip carry BCD adder are designed, which overcome the limitations of the existing methods. The proposed reversible BCD adders have also parity-preserving property. They are better than the existing counterparts, especially in the quantum cost. Proposed designs have been compared with existing designs with respect to the number of gates, number of garbage outputs and quantum cost.
Endogenous money, circuits and financialization
Malcolm Sawyer
2013-01-01
This paper locates the endogenous money approach in a circuitist framework. It argues for the significance of the credit creation process for the evolution of the economy and the absence of any notion of â€˜neutrality of moneyâ€™. Clearing banks are distinguished from other financial institutions as the providers of initial finance in a circuit whereas other financial institutions operate in a final finance circuit. Financialization is here viewed in terms of the growth of financial assets an...
Circuit modeling for electromagnetic compatibility
Darney, Ian B
2013-01-01
Very simply, electromagnetic interference (EMI) costs money, reduces profits, and generally wreaks havoc for circuit designers in all industries. This book shows how the analytic tools of circuit theory can be used to simulate the coupling of interference into, and out of, any signal link in the system being reviewed. The technique is simple, systematic and accurate. It enables the design of any equipment to be tailored to meet EMC requirements. Every electronic system consists of a number of functional modules interconnected by signal links and power supply lines. Electromagnetic interference
Simplified design of filter circuits
Lenk, John
1999-01-01
Simplified Design of Filter Circuits, the eighth book in this popular series, is a step-by-step guide to designing filters using off-the-shelf ICs. The book starts with the basic operating principles of filters and common applications, then moves on to describe how to design circuits by using and modifying chips available on the market today. Lenk's emphasis is on practical, simplified approaches to solving design problems.Contains practical designs using off-the-shelf ICsStraightforward, no-nonsense approachHighly illustrated with manufacturer's data sheets
Embedded systems circuits and programming
Sanchez, Julio
2012-01-01
During the development of an engineered product, developers often need to create an embedded system--a prototype--that demonstrates the operation/function of the device and proves its viability. Offering practical tools for the development and prototyping phases, Embedded Systems Circuits and Programming provides a tutorial on microcontroller programming and the basics of embedded design. The book focuses on several development tools and resources: Standard and off-the-shelf components, such as input/output devices, integrated circuits, motors, and programmable microcontrollers The implementat
Integrated circuits for multimedia applications
DEFF Research Database (Denmark)
Vandi, Luca
2007-01-01
This work presents several key aspects in the design of RF integrated circuits for portable multimedia devices. One chapter is dedicated to the application of negative-feedback topologies to receiver frontends. A novel feedback technique suitable for common multiplier-based mixers is described......, and it is applied to a broad-band dual-loop receiver architecture in order to boost the linearity performances of the stage. A simplified noise- and linearity analysis of the circuit is derived, and a comparison is provided with a more traditional dual-loop topology (a broad-band stage based on shunt...
Fermionic models with superconducting circuits
Energy Technology Data Exchange (ETDEWEB)
Las Heras, Urtzi; Garcia-Alvarez, Laura; Mezzacapo, Antonio; Lamata, Lucas [University of the Basque Country UPV/EHU, Department of Physical Chemistry, Bilbao (Spain); Solano, Enrique [University of the Basque Country UPV/EHU, Department of Physical Chemistry, Bilbao (Spain); IKERBASQUE, Basque Foundation for Science, Bilbao (Spain)
2015-12-01
We propose a method for the efficient quantum simulation of fermionic systems with superconducting circuits. It consists in the suitable use of Jordan-Wigner mapping, Trotter decomposition, and multiqubit gates, be with the use of a quantum bus or direct capacitive couplings. We apply our method to the paradigmatic cases of 1D and 2D Fermi-Hubbard models, involving couplings with nearest and next-nearest neighbours. Furthermore, we propose an optimal architecture for this model and discuss the benchmarking of the simulations in realistic circuit quantum electrodynamics setups. (orig.)
Circuit, Thermal and Cost Characteristics of Impulse Magnetizing Circuits
Institute of Scientific and Technical Information of China (English)
2000-01-01
This paper describes the development of circuit, thermal and cost model for a capacitor discharge impulse megnetizer and compares simulations to measurements from an actual system. We used a cost structure consisting of five major subsystems for cost modeling. Especially, we estimated the potential for cost reductions impulse magnetizer as a function of time using the learning curve.
Adaptive Pairing Reversible Watermarking.
Dragoi, Ioan-Catalin; Coltuc, Dinu
2016-05-01
This letter revisits the pairwise reversible watermarking scheme of Ou et al., 2013. An adaptive pixel pairing that considers only pixels with similar prediction errors is introduced. This adaptive approach provides an increased number of pixel pairs where both pixels are embedded and decreases the number of shifted pixels. The adaptive pairwise reversible watermarking outperforms the state-of-the-art low embedding bit-rate schemes proposed so far.
SIMULTANEOUS OPTIMIZATION OF STANDBY AND ACTIVE ENERGY FOR SUB-THRESHOLD CIRCUITS
Directory of Open Access Journals (Sweden)
M. R. Taha
2016-12-01
Full Text Available Increased downscaling of CMOS circuits with respect to feature size and threshold voltage has a result ofdramatically increasing in leakage current. So, leakage power reduction is an important design issue foractive and standby modes as long as the technology scaling increased. In this paper, a simultaneous activeand standby energy optimization methodology is proposed for 22 nm sub-threshold CMOS circuits. In thefirst phase, we investigate the dual threshold voltage design for active energy per cycleminimization. Aslack based genetic algorithm is proposed to find the optimal reverse body bias assignment to set of noncriticalpaths gates to ensure low active energy per cycle with the maximum allowable frequency at theoptimal supply voltage. The second phase, determine the optimal reverse body bias that can be applied toall gates for standby power optimization at the optimal supply voltage determined from the first phase.Therefore, there exist two sets of gates and two reverse body bias values for each set. The reverse body biasis switched between these two values in response to the mode of operation. Experimental results areobtained for some ISCAS-85 benchmark circuits such as 74L85, 74283, ALU74181, and 16 bit RCA. Theoptimized circuits show significant energy saving ranged (from 14.5% to 42.28% and standby power saving ranged (from 62.8% to 67%.
Relaxation Based Electrical Simulation for VLSI Circuits
Directory of Open Access Journals (Sweden)
S. Rajkumar
2012-06-01
Full Text Available Electrical circuit simulation was one of the first CAD tools developed for IC design. The conventional circuit simulators like SPICE and ASTAP were designed initially for the cost effective analysis of circuits containing a few hundred transistors or less. A number of approaches have been used to improve the performances of congenital circuit simulators for the analysis of large circuits. Thereafter relaxation methods was proposed to provide more accurate waveforms than standard circuit simulators with up to two orders of magnitude speed improvement for large circuits. In this paper we have tried to highlights recently used waveform and point relaxation techniques for simulation of VLSI circuits. We also propose a simple parallelization technique and experimentally demonstrate that we can solve digital circuits with tens of million transistors in a few hours.
Retropath: automated pipeline for embedded metabolic circuits.
Carbonell, Pablo; Parutto, Pierre; Baudier, Claire; Junot, Christophe; Faulon, Jean-Loup
2014-08-15
Metabolic circuits are a promising alternative to other conventional genetic circuits as modular parts implementing functionalities required for synthetic biology applications. To date, metabolic design has been mainly focused on production circuits. Emergent applications such as smart therapeutics, however, require circuits that enable sensing and regulation. Here, we present RetroPath, an automated pipeline for embedded metabolic circuits that explores the circuit design space from a given set of specifications and selects the best circuits to implement based on desired constraints. Synthetic biology circuits embedded in a chassis organism that are capable of controlling the production, processing, sensing, and the release of specific molecules were enumerated in the metabolic space through a standard procedure. In that way, design and implementation of applications such as therapeutic circuits that autonomously diagnose and treat disease, are enabled, and their optimization is streamlined.
Multilevel modulation of a sensory motor circuit during C. elegans sleep and arousal.
Cho, Julie Y; Sternberg, Paul W
2014-01-16
Sleep is characterized by behavioral quiescence, homeostasis, increased arousal threshold, and rapid reversibility. Understanding how these properties are encoded by a neuronal circuit has been difficult, and no single molecular or neuronal pathway has been shown to be responsible for the regulation of sleep. Taking advantage of the well-mapped neuronal connections of Caenorhabditis elegans and the sleep-like states in this animal, we demonstrate the changed properties of both sensory neurons and downstream interneurons that mediate sleep and arousal. The ASH sensory neuron displays reduced sensitivity to stimuli in the sleep-like state, and the activity of the corresponding interneurons in ASH's motor circuit becomes asynchronous. Restoration of interneuron synchrony is sufficient for arousal. The multilevel circuit depression revealed provides an elegant strategy to promote a robust decrease in arousal while allowing for rapid reversibility of the sleep state.
Design of a Ternary Reversible/Quantum Adder using Genetic Algorithm
Directory of Open Access Journals (Sweden)
Vitaly G. Deibuk
2015-08-01
Full Text Available —Typical methods of quantum/reversible synthesis are based on using the binary character of quantum computing. However, multi-valued logic is a promising choice for future computer technologies, given a set of advantages when comparing to binary circuits. In this work, we have developed a genetic algorithm-based synthesis of ternary reversible circuits using Muthukrishnan-Stroud gates. The method for chromosomes coding that we present, as well as a judicious choice of algorithm parameters, allowed obtaining circuits for half-adder and full adder which are better than other published methods in terms of cost, delay times and amount of input ancillary bits. A structure of the circuits is analyzed in details, based on their decomposition.
Clocking Scheme for Switched-Capacitor Circuits
DEFF Research Database (Denmark)
Steensgaard-Madsen, Jesper
1998-01-01
A novel clocking scheme for switched-capacitor (SC) circuits is presented. It can enhance the understanding of SC circuits and the errors caused by MOSFET (MOS) switches. Charge errors, and techniques to make SC circuits less sensitive to them are discussed.......A novel clocking scheme for switched-capacitor (SC) circuits is presented. It can enhance the understanding of SC circuits and the errors caused by MOSFET (MOS) switches. Charge errors, and techniques to make SC circuits less sensitive to them are discussed....
Digital circuit boards mach 1 GHz
Morrison, Ralph
2012-01-01
A unique, practical approach to the design of high-speed digital circuit boards The demand for ever-faster digital circuit designs is beginning to render the circuit theory used by engineers ineffective. Digital Circuit Boards presents an alternative to the circuit theory approach, emphasizing energy flow rather than just signal interconnection to explain logic circuit behavior. The book shows how treating design in terms of transmission lines will ensure that the logic will function, addressing both storage and movement of electrical energy on these lines. It cove
Advanced circuit simulation using Multisim workbench
Báez-López, David; Cervantes-Villagómez, Ofelia Delfina
2012-01-01
Multisim is now the de facto standard for circuit simulation. It is a SPICE-based circuit simulator which combines analog, discrete-time, and mixed-mode circuits. In addition, it is the only simulator which incorporates microcontroller simulation in the same environment. It also includes a tool for printed circuit board design.Advanced Circuit Simulation Using Multisim Workbench is a companion book to Circuit Analysis Using Multisim, published by Morgan & Claypool in 2011. This new book covers advanced analyses and the creation of models and subcircuits. It also includes coverage of transmissi
On thermodynamic and microscopic reversibility
Energy Technology Data Exchange (ETDEWEB)
Crooks, Gavin E.
2011-07-12
The word 'reversible' has two (apparently) distinct applications in statistical thermodynamics. A thermodynamically reversible process indicates an experimental protocol for which the entropy change is zero, whereas the principle of microscopic reversibility asserts that the probability of any trajectory of a system through phase space equals that of the time reversed trajectory. However, these two terms are actually synonymous: a thermodynamically reversible process is microscopically reversible, and vice versa.
A Low Noise Electronic Circuit
Annema, Anne J.; Leenaerts, Dominicus M.W.; de Vreede, Petrus W.H.
2002-01-01
An electronic circuit, which can be used as a Low Noise Amplifier (LNA), comprises two complementary Field Effect Transistors (M1, M2; M5, M6), each having a gate, a source and a drain. The gates are connected together as a common input terminal, and the drains are connected together as a
A circuit mechanism for neurodegeneration.
Roselli, Francesco; Caroni, Pico
2012-10-12
How deficiency in SMN1 selectively affects motoneurons in spinal muscular atrophy is poorly understood. Here, Imlach et al. and Lotti et al. show that aberrant splicing of Stasimon in cholinergic sensory neurons and interneurons leads to motoneuron degeneration, suggesting that altered circuit function may underlie the disorder.
Integrated Circuit Stellar Magnitude Simulator
Blackburn, James A.
1978-01-01
Describes an electronic circuit which can be used to demonstrate the stellar magnitude scale. Six rectangular light-emitting diodes with independently adjustable duty cycles represent stars of magnitudes 1 through 6. Experimentally verifies the logarithmic response of the eye. (Author/GA)
Structural Testing of RSFQ Circuits
Arun, A.J.; Kerkhoff, Hans G.; Flokstra, Jakob; Rogalla, Horst; Brinkman, Alexander
2005-01-01
The RSFQ family of logic circuits built in Niobium (Nb) tri-layer processes are being widely used for designs in Superconductor Electronics (SCE). But little information is available about the defects and fault mechanisms occurring in an RSFQ Nb process.
Dynamically Tunable Memory in Two-Component Gene Circuit
Energy Technology Data Exchange (ETDEWEB)
Ghim, C; Almaas, E
2008-09-05
Cell has the potential to remember the environmental conditions for many (10{sup 7}) generations but stochastic fluctuations set a fundamental limit on the stability of this memory. Here we explicitly take the binding-unbinding of macromolecules into account to propose a novel rationale for the protein-protein interaction in cell physiology. Based on the first-exit time and the corresponding deterministic characterization of various genetic circuits, we show that the reversible binding dynamics may stabilize non-genetically inherited cell states, providing a practical strategy for designing robust epigenetic memory.
Design of a reversible single precision floating point subtractor
Anantha Lakshmi, AV; Sudha, GF
2014-01-01
In recent years, Reversible logic has emerged as a major area of research due to its ability to reduce the power dissipation which is the main requirement in the low power digital circuit design. It has wide applications like low power CMOS design, Nano-technology, Digital signal processing, Communication, DNA computing and Optical computing. Floating-point operations are needed very frequently in nearly all computing disciplines, and studies have shown floating-point addition/subtraction to ...
Institute of Scientific and Technical Information of China (English)
Bao Bo-Cheng; Feng Fei; Dong Wei; Pan Sai-Hu
2013-01-01
A flux-controlled memristor characterized by smooth cubic nonlinearity is taken as an example,upon which the voltage-current relationships (VCRs) between two parallel memristive circuits-a parallel memristor and capacitor circuit (the parallel MC circuit),and a parallel memristor and inductor circuit (the parallel ML circuit)-are investigated.The results indicate that the VCR between these two parallel memristive circuits is closely related to the circuit parameters,and the frequency and amplitude of the sinusoidal voltage stimulus.An equivalent circuit model of the memristor is built,upon which the circuit simulations and experimental measurements of both the parallel MC circuit and the parallel ML circuit are performed,and the results verify the theoretical analysis results.
Reversible Communicating Processes
Directory of Open Access Journals (Sweden)
Geoffrey Brown
2016-02-01
Full Text Available Reversible distributed programs have the ability to abort unproductive computation paths and backtrack, while unwinding communication that occurred in the aborted paths. While it is natural to assume that reversibility implies full state recovery (as with traditional roll-back recovery protocols, an interesting alternative is to separate backtracking from local state recovery. For example, such a model could be used to create complex transactions out of nested compensable transactions where a programmer-supplied compensation defines the work required to "unwind" a transaction. Reversible distributed computing has received considerable theoretical attention, but little reduction to practice; the few published implementations of languages supporting reversibility depend upon a high degree of central control. The objective of this paper is to demonstrate that a practical reversible distributed language can be efficiently implemented in a fully distributed manner. We discuss such a language, supporting CSP-style synchronous communication, embedded in Scala. While this language provided the motivation for the work described in this paper, our focus is upon the distributed implementation. In particular, we demonstrate that a "high-level" semantic model can be implemented using a simple point-to-point protocol.
Study of Reversible Logic Synthesis with Application in SOC: A Review
Sharma, Chinmay; Pahuja, Hitesh; Dadhwal, Mandeep; Singh, Balwinder
2017-08-01
The prime concern in today’s SOC designs is the power dissipation which increases with technology scaling. The reversible logic possesses very high potential in reducing power dissipation in these designs. It finds its application in latest research fields such as DNA computing, quantum computing, ultra-low power CMOS design and nanotechnology. The reversible circuits can be easily designed using the conventional CMOS technology at a cost of a garbage output which maintains the reversibility. The purpose of this paper is to provide an overview of the developments that have occurred till date in this concept and how the new reversible logic gates are used to design the logic functions.
Genetic Synthesis of New Reversible/Quantum Ternary Comparator
Directory of Open Access Journals (Sweden)
DEIBUK, V.
2015-08-01
Full Text Available Methods of quantum/reversible logic synthesis are based on the use of the binary nature of quantum computing. However, multiple-valued logic is a promising choice for future quantum computer technology due to a number of advantages over binary circuits. In this paper we have developed a synthesis of ternary reversible circuits based on Muthukrishnan-Stroud gates using a genetic algorithm. The method of coding chromosome is presented, and well-grounded choice of algorithm parameters allowed obtaining better circuit schemes of one- and n-qutrit ternary comparators compared with other methods. These parameters are quantum cost of received reversible devices, delay time and number of constant input (ancilla lines. Proposed implementation of the genetic algorithm has led to reducing of the device delay time and the number of ancilla qutrits to 1 and 2n-1 for one- and n-qutrits full comparators, respectively. For designing of n-qutrit comparator we have introduced a complementary device which compares output functions of 1-qutrit comparators.
Low voltage logic circuits exploiting gate level dynamic body biasing in 28 nm UTBB FD-SOI
Taco, Ramiro; Levi, Itamar; Lanuzza, Marco; Fish, Alexander
2016-03-01
In this paper, the recently proposed gate level body bias (GLBB) technique is evaluated for low voltage logic design in state-of-the-art 28 nm ultra-thin body and box (UTBB) fully-depleted silicon-on-insulator (FD-SOI) technology. The inherent benefits of the low-granularity body-bias control, provided by the GLBB approach, are emphasized by the efficiency of forward body bias (FBB) in the FD-SOI technology. In addition, the possibility to integrate PMOS and NMOS devices into a single common well configuration allows significant area reduction, as compared to an equivalent triple well implementation. Some arithmetic circuits were designed using GLBB approach and compared to their conventional CMOS and DTMOS counterparts under different running conditions at low voltage regime. Simulation results shows that, for 300 mV of supply voltage, a 4 × 4-bit GLBB Baugh Wooley multiplier allows performance improvement of about 30% and area reduction of about 35%, while maintaining low energy consumption as compared to the conventional CMOS ⧹ DTMOS solutions. Performance and energy benefits are maintained over a wide range of process-voltage-temperature (PVT) variations.
Developing a Domain Model for Relay Circuits
DEFF Research Database (Denmark)
Haxthausen, Anne Elisabeth
2009-01-01
the statics as well as the dynamics of relay circuits, i.e. how a relay circuit can be composed legally from electrical components as well as how the components may change state over time. Finally the circuit model is transformed into an executable model, and we show how a concrete circuit can be defined......In this paper we stepwise develop a domain model for relay circuits as used in railway control systems. First we provide an abstract, property-oriented model of networks consisting of components that can be glued together with connectors. This model is strongly inspired by a network model...... for railways madeby Bjørner et.al., however our model is more general: the components can be of any kind and can later be refined to e.g. railway components or circuit components. Then we show how the abstract network model can be refined into an explicit model for relay circuits. The circuit model describes...
Driver circuit for solid state light sources
Energy Technology Data Exchange (ETDEWEB)
Palmer, Fred; Denvir, Kerry; Allen, Steven
2016-02-16
A driver circuit for a light source including one or more solid state light sources, a luminaire including the same, and a method of so driving the solid state light sources are provided. The driver circuit includes a rectifier circuit that receives an alternating current (AC) input voltage and provides a rectified AC voltage. The driver circuit also includes a switching converter circuit coupled to the light source. The switching converter circuit provides a direct current (DC) output to the light source in response to the rectified AC voltage. The driver circuit also includes a mixing circuit, coupled to the light source, to switch current through at least one solid state light source of the light source in response to each of a plurality of consecutive half-waves of the rectified AC voltage.
Fabric circuits and method of manufacturing fabric circuits
Chu, Andrew W. (Inventor); Dobbins, Justin A. (Inventor); Scully, Robert C. (Inventor); Trevino, Robert C. (Inventor); Lin, Greg Y. (Inventor); Fink, Patrick W. (Inventor)
2011-01-01
A flexible, fabric-based circuit comprises a non-conductive flexible layer of fabric and a conductive flexible layer of fabric adjacent thereto. A non-conductive thread, an adhesive, and/or other means may be used for attaching the conductive layer to the non-conductive layer. In some embodiments, the layers are attached by a computer-driven embroidery machine at pre-determined portions or locations in accordance with a pre-determined attachment layout before automated cutting. In some other embodiments, an automated milling machine or a computer-driven laser using a pre-designed circuit trace as a template cuts the conductive layer so as to separate an undesired portion of the conductive layer from a desired portion of the conductive layer. Additional layers of conductive fabric may be attached in some embodiments to form a multi-layer construct.
Brain-machine interface circuits and systems
Zjajo, Amir
2016-01-01
This book provides a complete overview of significant design challenges in respect to circuit miniaturization and power reduction of the neural recording system, along with circuit topologies, architecture trends, and (post-silicon) circuit optimization algorithms. The introduced novel circuits for signal conditioning, quantization, and classification, as well as system configurations focus on optimized power-per-area performance, from the spatial resolution (i.e. number of channels), feasible wireless data bandwidth and information quality to the delivered power of implantable system.
DC operating points of transistor circuits
Trajkovic, Ljiljana
Finding a circuit's dc operating points is an essential step in its design and involves solving systems of nonlinear algebraic equations. Of particular research and practical interests are dc analysis and simulation of electronic circuits consisting of bipolar junction and field-effect transistors (BJTs and FETs), which are building blocks of modern electronic circuits. In this paper, we survey main theoretical results related to dc operating points of transistor circuits and discuss numerical methods for their calculation.
An Improved Squaring Circuit for Binary Numbers
Directory of Open Access Journals (Sweden)
Kabiraj Sethi
2012-02-01
Full Text Available In this paper, a high speed squaring circuit for binary numbers is proposed. High speed Vedic multiplier is used for design of the proposed squaring circuit. The key to our success is that only one Vedic multiplier is used instead of four multipliers reported in the literature. In addition, one squaring circuit is used twice. Our proposed Squaring Circuit seems to have better performance in terms of speed.
Solid-State dc Circuit Breaker
Harvey, P.
1983-01-01
Circuit breaker with no moving parts protects direct-current (dc) loads. Current which circuit breaker opens (trip current) is adjustable and so is time delay before breaker trips. Forward voltage drop rises from 0.6 to 1.2 V as current rises to trip point. Breaker has two terminals, like fuse, therefore replaces fuse in dc circuit. Powered by circuit it protects and reset by either turning off power source or disconnecting load.
Dual Biochemical Oscillators May Control Cellular Reversals in Myxococcus xanthus
Eckhert, Erik; Rangamani, Padmini; Davis, Annie E.; Oster, George; Berleman, James E.
2014-01-01
Myxococcus xanthus is a Gram-negative, soil-dwelling bacterium that glides on surfaces, reversing direction approximately once every 6 min. Motility in M. xanthus is governed by the Che-like Frz pathway and the Ras-like Mgl pathway, which together cause the cell to oscillate back and forth. Previously, Igoshin et al. (2004) suggested that the cellular oscillations are caused by cyclic changes in concentration of active Frz proteins that govern motility. In this study, we present a computational model that integrates both the Frz and Mgl pathways, and whose downstream components can be read as motor activity governing cellular reversals. This model faithfully reproduces wildtype and mutant behaviors by simulating individual protein knockouts. In addition, the model can be used to examine the impact of contact stimuli on cellular reversals. The basic model construction relies on the presence of two nested feedback circuits, which prompted us to reexamine the behavior of M. xanthus cells. We performed experiments to test the model, and this cell analysis challenges previous assumptions of 30 to 60 min reversal periods in frzCD, frzF, frzE, and frzZ mutants. We demonstrate that this average reversal period is an artifact of the method employed to record reversal data, and that in the absence of signal from the Frz pathway, Mgl components can occasionally reverse the cell near wildtype periodicity, but frz- cells are otherwise in a long nonoscillating state. PMID:25468349
Radiation controlling reversible window
Energy Technology Data Exchange (ETDEWEB)
Gell, H.A. Jr.
1980-01-01
A coated glass glazing system is presented including a transparent glass substrate having one surface coated with a radiation absorptive film which is overcoated with a radiation reflective film by a technique which renders the radiation reflective film radiation absorptive at the surface contracting the radiating absorptive film. The coated glass system is used as glazing for storm windows which are adapted to be reversible so that the radiation reflective surface may be exposed to the outside of the dwelling during the warm seasons to prevent excessive solar radiation from entering a dwelling and reversed during cold seasons to absorb solar radiation and utilize it to aid in keeping the dwelling interior warm.
Enhancement of Time-Reversal Subwavelength Wireless Transmission Using Pulse Shaping
Ding, Shuai; Zou, Lianfeng; Wang, Bingzhong; Caloz, Christophe
2014-01-01
A novel time-reversal subwavelength transmission technique, based on pulse shaping circuits (PSCs), is proposed. Compared to previously reported approaches, this technique removes the need for complex or electrically large electromagnetic structures by generating channel diversity via pulse shaping instead of angular spectrum transformation. Moreover, the pulse shaping circuits (PSCs) are based on Radio Analog Signal Processing (R-ASP), and therefore do not suffer from the well-known issues of digital signal processing in ultrafast regimes. The proposed PSC time-reversal systems is mathematically shown to offer high channel discrimination under appropriate PSC design conditions, and is experimentally demonstrated for the case of two receivers.
49 CFR 236.721 - Circuit, control.
2010-10-01
... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, control. 236.721 Section 236.721..., MAINTENANCE, AND REPAIR OF SIGNAL AND TRAIN CONTROL SYSTEMS, DEVICES, AND APPLIANCES Definitions § 236.721 Circuit, control. An electrical circuit between a source of electric energy and a device which it operates....
New Logic Circuit with DC Parametric Excitation
Sugahara, Masanori; Kaneda, Hisayoshi
1982-12-01
It is shown that dc parametric excitation is possible in a circuit named JUDO, which is composed of two resistively-connected Josephson junctions. Simulation study proves that the circuit has large gain and properties suitable for the construction of small, high-speed logic circuits.
An eigenvalue study of the MLC circuit
DEFF Research Database (Denmark)
Lindberg, Erik; Murali, K.
1998-01-01
The MLC (Murali-Lakshmanan-Chua) circuit is the simplest non-autonomous chaotic circuit. Insight in the behaviour of the circuit is obtained by means of a study of the eigenvalues of the linearized Jacobian of the nonlinear differential equations. The trajectories of the eigenvalues as functions...
Controllability/observability analysis of digital circuits
Energy Technology Data Exchange (ETDEWEB)
Goldstein, L.H.
1978-11-01
The testability of a digital circuit is directy related to the difficulty of controlling and observing the logical values of internal nodes from circuit inputs and outputs, respectively. A method for analyzing digital circuits in terms of six functions which characterize combinational and sequential controllability and observability is presented.
Controllability/observability analysis of digital circuits
Energy Technology Data Exchange (ETDEWEB)
Goldstein, L.H.
1979-01-01
The testability of a digital circuit is directly related to the difficulty of controlling and observing the logical values of internal nodes from circuit inputs and outputs, respectively. A method for analyzing digital circuits in terms of six functions which characterize combinational and sequential controllability and observability is presented.
Controllability/observability analysis of digital circuits
Energy Technology Data Exchange (ETDEWEB)
Goldstein, L.H.
1979-09-01
The testability of a digital circuit is directly related to the difficulty of controlling and observing the logical values of internal nodes from circuit inputs and outputs, respectively. A method for analyzing digital circuits in terms of six functions which characterize combinational and sequential controllability and observability is presented.
An Equivalent Circuit for Landau Damping
DEFF Research Database (Denmark)
Pécseli, Hans
1976-01-01
An equivalent circuit simulating the effect of Landau damping in a stable plasma‐loaded parallel‐plate capacitor is presented. The circuit contains a double infinity of LC components. The transition from stable to unstable plasmas is simulated by the introduction of active elements into the circuit....
30 CFR 75.1323 - Blasting circuits.
2010-07-01
... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Blasting circuits. 75.1323 Section 75.1323... MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Explosives and Blasting § 75.1323 Blasting circuits. (a) Blasting circuits shall be protected from sources of stray electric current. (b) Detonators made...
30 CFR 57.6403 - Branch circuits.
2010-07-01
... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Branch circuits. 57.6403 Section 57.6403... Blasting-Surface and Underground § 57.6403 Branch circuits. (a) If electric blasting includes the use of branch circuits, each branch shall be equipped with a safety switch or equivalent method to isolate...
49 CFR 234.203 - Control circuits.
2010-10-01
... 49 Transportation 4 2010-10-01 2010-10-01 false Control circuits. 234.203 Section 234.203 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION..., Inspection, and Testing Maintenance Standards § 234.203 Control circuits. All control circuits that...
Nanoelectronic circuit design and test
Simsir, Muzaffer Orkun
Controlling power consumption in CMOS integrated circuits (ICs) during normal mode of operation is becoming one of the limiting factors to further scaling. In addition, it is a well known fact that during testing of a complex IC, power consumption can far exceed the values reached during its normal operation. High power consumption, combined with limited cooling support, leads to overheating of ICs. This can cause permanent damage to the chip or can invalidate test results due to the fact that extreme temperature variations lead to changes in path delays. Therefore, even good chips can fail the test. For these reasons, thermal problems during test need to be identified to prevent the loss of yield in CMOS ICs. In this thesis, we propose a methodology for thermally characterizing circuits under test. Using this methodology, it is possible to simulate the thermal profiles of the chips during test and prevent possible yield loss because of thermal problems. In addition to the problems associated with power and temperature, a more important barrier is the scaling limitations of the CMOS technology. It has been predicted that in next decade, it will not be possible to scale it further. In the near future, rather than a transition to a completely new technology, extensions to CMOS seem to be more realistic. Double-gate CMOS technology is one of the most promising alternatives that offers a simple extension to CMOS. The transistors of this technology are formed by adding a second gate across the conventional CMOS transistor gate. Designing circuits using this technology has attracted a lot of attention. However, as circuit design methods mature, there is a need to identify how these circuits can be tested. From a circuit testing viewpoint, it is unclear if CMOS fault models are comprehensive enough to model all defects in double-gate CMOS circuits. Therefore, fault models of this technology need to be defined to enable manufacturing-time testing. In this thesis, we
30 CFR 75.518 - Electric equipment and circuits; overload and short circuit protection.
2010-07-01
... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Electric equipment and circuits; overload and short circuit protection. 75.518 Section 75.518 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... Equipment-General § 75.518 Electric equipment and circuits; overload and short circuit protection....
Delay locked loop integrated circuit.
Energy Technology Data Exchange (ETDEWEB)
Brocato, Robert Wesley
2007-10-01
This report gives a description of the development of a Delay Locked Loop (DLL) integrated circuit (IC). The DLL was developed and tested as a stand-alone IC test chip to be integrated into a larger application specific integrated circuit (ASIC), the Quadrature Digital Waveform Synthesizer (QDWS). The purpose of the DLL is to provide a digitally programmable delay to enable synchronization between an internal system clock and external peripherals with unknown clock skew. The DLL was designed and fabricated in the IBM 8RF process, a 0.13 {micro}m CMOS process. It was designed to operate with a 300MHz clock and has been tested up to 500MHz.
Optogenetic Investigation of Arousal Circuits.
Tyree, Susan M; de Lecea, Luis
2017-08-15
Modulation between sleep and wake states is controlled by a number of heterogeneous neuron populations. Due to the topological proximity and genetic co-localization of the neurons underlying sleep-wake state modulation optogenetic methods offer a significant improvement in the ability to benefit from both the precision of genetic targeting and millisecond temporal control. Beginning with an overview of the neuron populations mediating arousal, this review outlines the progress that has been made in the investigation of arousal circuits since the incorporation of optogenetic techniques and the first in vivo application of optogenetic stimulation in hypocretin neurons in the lateral hypothalamus. This overview is followed by a discussion of the future progress that can be made by incorporating more recent technological developments into the research of neural circuits.
Relativistic causality and clockless circuits
Matherat, Philippe; 10.1145/2043643.2043650
2011-01-01
Time plays a crucial role in the performance of computing systems. The accurate modelling of logical devices, and of their physical implementations, requires an appropriate representation of time and of all properties that depend on this notion. The need for a proper model, particularly acute in the design of clockless delay-insensitive (DI) circuits, leads one to reconsider the classical descriptions of time and of the resulting order and causal relations satisfied by logical operations. This questioning meets the criticisms of classical spacetime formulated by Einstein when founding relativity theory and is answered by relativistic conceptions of time and causality. Applying this approach to clockless circuits and considering the trace formalism, we rewrite Udding's rules which characterize communications between DI components. We exhibit their intrinsic relation with relativistic causality. For that purpose, we introduce relativistic generalizations of traces, called R-traces, which provide a pertinent des...
Phonon waveguides for electromechanical circuits
Hatanaka, D.; Mahboob, I.; Onomitsu, K.; Yamaguchi, H.
2014-07-01
Nanoelectromechanical systems (NEMS), utilizing localized mechanical vibrations, have found application in sensors, signal processors and in the study of macroscopic quantum mechanics. The integration of multiple mechanical elements via electrical or optical means remains a challenge in the realization of NEMS circuits. Here, we develop a phonon waveguide using a one-dimensional array of suspended membranes that offers purely mechanical means to integrate isolated NEMS resonators. We demonstrate that the phonon waveguide can support and guide mechanical vibrations and that the periodic membrane arrangement also creates a phonon bandgap that enables control of the phonon propagation velocity. Furthermore, embedding a phonon cavity into the phonon waveguide allows mobile mechanical vibrations to be dynamically switched or transferred from the waveguide to the cavity, thereby illustrating the viability of waveguide-resonator coupling. These highly functional traits of the phonon waveguide architecture exhibit all the components necessary to permit the realization of all-phononic NEMS circuits.
Handbook of microwave integrated circuits
Hoffmann, Reinmut K.
The design and operation of ICs for use in the 0.5-20-GHz range are described in an introductory and reference work for industrial engineers. Chapters are devoted to an overview of microwave IC (MIC) technology, general stripline characteristics, microwave transmission line (MTL) parameters for microstrips with isotropic dielectric substrates, higher-order modes on a microstrip, the effects of metallic enclosure on MTL transmission parameters, losses in microstrips, the measurement of MTL parameters, and MTLs on anisotropic dielectric substrates. Consideration is given to coupled microstrips on dielectric substrates, microstrip discontinuities, radiation from microstrip circuits, MTL variations, coplanar MTLs, slotlines, and spurious modes in MTL circuits. Diagrams, drawings, graphs, and a glossary of symbols are provided.
Advanced Microwave Circuits and Systems
DEFF Research Database (Denmark)
This book is based on recent research work conducted by the authors dealing with the design and development of active and passive microwave components, integrated circuits and systems. It is divided into seven parts. In the first part comprising the first two chapters, alternative concepts...... and equations for multiport network analysis and characterization are provided. A thru-only de-embedding technique for accurate on-wafer characterization is introduced. The second part of the book corresponds to the analysis and design of ultra-wideband low-noise amplifiers (LNA). The LNA is the most critical...... as sufficient gain in a wide frequency range of operation, which is very difficult to achieve. Most circuits demonstrated are not stable across the frequency band, which makes these amplifiers prone to self-oscillations and therefore limit their applicability. The trade-off between noise figure, gain, linearity...
Foundations for microstrip circuit design
Edwards, Terry
2016-01-01
Building on the success of the previous three editions, Foundations for Microstrip Circuit Design offers extensive new, updated and revised material based upon the latest research. Strongly design-oriented, this fourth edition provides the reader with a fundamental understanding of this fast expanding field making it a definitive source for professional engineers and researchers and an indispensable reference for senior students in electronic engineering. Topics new to this edition: microwave substrates, multilayer transmission line structures, modern EM tools and techniques, microstrip and planar transmision line design, transmission line theory, substrates for planar transmission lines, Vias, wirebonds, 3D integrated interposer structures, computer-aided design, microstrip and power-dependent effects, circuit models, microwave network analysis, microstrip passive elements, and slotline design fundamentals.
Ultra-low power integrated circuit design circuits, systems, and applications
Li, Dongmei; Wang, Zhihua
2014-01-01
This book describes the design of CMOS circuits for ultra-low power consumption including analog, radio frequency (RF), and digital signal processing circuits (DSP). The book addresses issues from circuit and system design to production design, and applies the ultra-low power circuits described to systems for digital hearing aids and capsule endoscope devices. Provides a valuable introduction to ultra-low power circuit design, aimed at practicing design engineers; Describes all key building blocks of ultra-low power circuits, from a systems perspective; Applies circuits and systems described to real product examples such as hearing aids and capsule endoscopes.
Directory of Open Access Journals (Sweden)
Shefali Mamataj
2016-07-01
Full Text Available In today‟s world everyday a new technology which is faster, smaller and more complex than its predecessor is being developed. Reversible computation is a research area characterized by having only computational models that is both forward and backward deterministic. Reversible Logic is gaining significant consideration as the potential logic design style for implementation in modern nanotechnology and quantum computing with minimal impact on physical entropy. It has become very popular over the last few years since reversible logic circuits dramatically reduce energy loss. It consumes less power by recovering bit loss from its unique input-output mapping. This paper represents the implementation of conventional Boolean functions for basic digital gate by using COG reversible gate. This paper also represents a multi logic function generator circuit for generating multiple logical function simultaneously using COG gates. And also represents a controlled multi logic function generator circuit for generating any specified output in a controlled way.
Counterpulse railgun energy recovery circuit
Energy Technology Data Exchange (ETDEWEB)
Honig, Emanuel M. (Los Alamos, NM)
1986-01-01
In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, a counterpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.
Overpulse railgun energy recovery circuit
Energy Technology Data Exchange (ETDEWEB)
Honig, Emanuel M. (Los Alamos, NM)
1989-01-01
In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, an overpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.
Monolithic readout circuits for RHIC
Energy Technology Data Exchange (ETDEWEB)
O`Connor, P.; Harder, J. [Brookhaven National Laboratory, Upton, NY (United States)
1991-12-31
Several CMOS ASICs have been developed for a proposed RHIC experiment. This paper discusses why ASIC implementation was chosen for certain functions, circuit specifications and the design techniques used to meet them, and results of simulations and early prototypes. By working closely together from an early stage in the planning process, in-house ASIC designers and detector and data acquisition experimenters can achieve optimal use of this important technology.
Monolithic readout circuits for RHIC
Energy Technology Data Exchange (ETDEWEB)
O`Connor, P.; Harder, J. [Brookhaven National Laboratory, Upton, NY (United States)
1991-12-31
Several CMOS ASICs have been developed for a proposed RHIC experiment. This paper discusses why ASIC implementation was chosen for certain functions, circuit specifications and the design techniques used to meet them, and results of simulations and early prototypes. By working closely together from an early stage in the planning process, in-house ASIC designers and detector and data acquisition experimenters can achieve optimal use of this important technology.
Optimization of Bootstrapping in Circuits
Benhamouda, Fabrice; Lepoint, Tancrède; Mathieu, Claire; Zhou, Hang
2016-01-01
In 2009, Gentry proposed the first Fully Homomorphic Encryption (FHE) scheme, an extremely powerful cryptographic primitive that enables to perform computations, i.e., to evaluate circuits, on encrypted data without decrypting them first. This has many applications, in particular in cloud computing. In all currently known FHE schemes, encryptions are associated to some (non-negative integer) noise level, and at each evaluation of an AND gate, the noise level increases. This is problematic bec...
Coulomb drag in quantum circuits
Levchenko, Alex; Kamenev, Alex
2008-01-01
We study drag effect in a system of two electrically isolated quantum point contacts (QPC), coupled by Coulomb interactions. Drag current exhibits maxima as a function of QPC gate voltages when the latter are tuned to the transitions between quantized conductance plateaus. In the linear regime this behavior is due to enhanced electron-hole asymmetry near an opening of a new conductance channel. In the non-linear regime the drag current is proportional to the shot noise of the driving circuit,...
Behavioral synthesis of asynchronous circuits
DEFF Research Database (Denmark)
Nielsen, Sune Fallgaard
2005-01-01
domain by introducing a computation model, which resembles the synchronous datapath and control architecture, but which is completely asynchronous. The model contains the possibility for isolating some or all of the functional units by locking their respective inputs and outputs while the functional unit....... The datapath and control architecture is then expressed in the Balsa-language, and using syntax directed compilation a corresponding handshake circuit implementation (and eventually a layout) is produced....
Time reversal communication system
Candy, James V.; Meyer, Alan W.
2008-12-02
A system of transmitting a signal through a channel medium comprises digitizing the signal, time-reversing the digitized signal, and transmitting the signal through the channel medium. The channel medium may be air, earth, water, tissue, metal, and/or non-metal.
Engineering Encounters: Reverse Engineering
McGowan, Veronica Cassone; Ventura, Marcia; Bell, Philip
2017-01-01
This column presents ideas and techniques to enhance your science teaching. This month's issue shares information on how students' everyday experiences can support science learning through engineering design. In this article, the authors outline a reverse-engineering model of instruction and describe one example of how it looked in our fifth-grade…
García-Patrón, Raúl; Pirandola, Stefano; Lloyd, Seth; Shapiro, Jeffrey H.
2009-05-01
In this Letter we define a family of entanglement distribution protocols assisted by feedback classical communication that gives an operational interpretation to reverse coherent information, i.e., the symmetric counterpart of the well-known coherent information. This leads to the definition of a new entanglement distribution capacity that exceeds the unassisted capacity for some interesting channels.
DEFF Research Database (Denmark)
Nielsen, Jens Kromann; Rasmussen, Henrik K.
2008-01-01
Afilament stretching rheometer (FSR) was used for measuring the start-up of uni-axial elongational flow followed by reversed bi-axial flow, both with a constant elongational rate. A narrow molecular mass distribution linear polystyrene with a molecular weight of 145 kg / mole wis subjected to the...
Directory of Open Access Journals (Sweden)
Tomasz DOMAGAŁA
2013-10-01
Full Text Available The paper focuses on the presentation of the reverse supply chain, of which the role in the modern business grows along with the increasing number of environmental regulations and possibilities of reducing an operating cost. The paper also describes main problems in developing the profitable chain and possibilities to take an action in order to overcome them.
Mossel, Elchanan; Sen, Arnab
2011-01-01
We study the notion of reverse hypercontractivity. We show that reverse hypercontractive inequalities are implied by standard hypercontractive inequalities as well as by the modified log-Sobolev inequality. Our proof is based on a new comparison lemma for Dirichlet forms and an extension of the Strook-Varapolos inequality. A consequence of our analysis is that {\\em all} simple operators $L=Id-\\E$ as well as their tensors satisfy uniform reverse hypercontractive inequalities. That is, for all $q
reverse hypercontractive inequalities established here imply new mixing and isoperimetric results for short random walks in product spaces, for certain card-shufflings, for Glauber dynamics in high-temperat...
Reversing Discrimination: A Perspective
Pati, Gopal; Reilly, Charles W.
1977-01-01
Examines the debate over affirmative action and reverse discrimination, and discusses how and why the present dilemma has developed. Suggests that organizations can best address the problem through an honest, in-depth analysis of their organizational structure and management practices. (JG)
Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits
Mukhopadhyay, Saibal; Roy, Kaushik
2011-01-01
In nanometer scaled CMOS devices significant increase in the subthreshold, the gate and the reverse biased junction band-to-band-tunneling (BTBT) leakage, results in the large increase of total leakage power in a logic circuit. Leakage components interact with each other in device level (through device geometry, doping profile) and also in the circuit level (through node voltages). Due to the circuit level interaction of the different leakage components, the leakage of a logic gate strongly depends on the circuit topology i.e. number and nature of the other logic gates connected to its input and output. In this paper, for the first time, we have analyzed loading effect on leakage and proposed a method to accurately estimate the total leakage in a logic circuit, from its logic level description considering the impact of loading and transistor stacking.
CMOS circuit design, layout and simulation
Baker, R Jacob
2010-01-01
The Third Edition of CMOS Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and much more. Regardless of one's integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples.
Self arbitrated VLSI asynchronous sequential circuits
Whitaker, S.; Maki, G.
1990-01-01
A new class of asynchronous sequential circuits is introduced in this paper. The new design procedures are oriented towards producing asynchronous sequential circuits that are implemented with CMOS VLSI and take advantage of pass transistor technology. The first design algorithm utilizes a standard Single Transition Time (STT) state assignment. The second method introduces a new class of self synchronizing asynchronous circuits which eliminates the need for critical race free state assignments. These circuits arbitrate the transition path action by forcing the circuit to sequence through proper unstable states. These methods result in near minimum hardware since only the transition paths associated with state variable changes need to be implemented with pass transistor networks.
Design of analog circuits through symbolic analysis
Fakhfakh, Mourad; V Fernández, Francisco
2012-01-01
Symbolic analyzers have the potential to offer knowledge to sophomores as well as practitioners of analog circuit design. Actually, they are an essential complement to numerical simulators, since they provide insight into circuit behavior which numerical analyzers do not provide. Symbolic analysis of electronic circuits addresses the generation of symbolic expressions for the parameters that describe the performance of linear and nonlinear circuits in three domains: DC, AC and time; some or all the circuit parameters can be kept as symbols. Due to the fact that these expressions remain va
Model Order Reduction for Electronic Circuits:
DEFF Research Database (Denmark)
Hjorth, Poul G.; Shontz, Suzanne
Electronic circuits are ubiquitous; they are used in numerous industries including: the semiconductor, communication, robotics, auto, and music industries (among many others). As products become more and more complicated, their electronic circuits also grow in size and complexity. This increased...... the need for circuit simulators to evaluate potential designs before fabrication, as integrated circuit prototypes are expensive to build, and troubleshooting is diﬃcult. In this report, we focus on the simulation of printed circuit boards (PCB’s) and interconnects both of which are of great importance...
Time- and Site-Resolved Dynamics in a Topological Circuit
Directory of Open Access Journals (Sweden)
Jia Ningyuan
2015-06-01
Full Text Available From studies of exotic quantum many-body phenomena to applications in spintronics and quantum information processing, topological materials are poised to revolutionize the condensed-matter frontier and the landscape of modern materials science. Accordingly, there is a broad effort to realize topologically nontrivial electronic and photonic materials for fundamental science as well as practical applications. In this work, we demonstrate the first simultaneous site- and time-resolved measurements of a time-reversal-invariant topological band structure, which we realize in a radio-frequency photonic circuit. We control band-structure topology via local permutation of a traveling-wave capacitor-inductor network, increasing robustness by going beyond the tight-binding limit. We observe a gapped density of states consistent with a modified Hofstadter spectrum at a flux per plaquette of ϕ=π/2. In situ probes of the band gaps reveal spatially localized bulk states and delocalized edge states. Time-resolved measurements reveal dynamical separation of localized edge excitations into spin-polarized currents. The radio-frequency circuit paradigm is naturally compatible with nonlocal coupling schemes, allowing us to implement a Möbius strip topology inaccessible in conventional systems. This room-temperature experiment illuminates the origins of topology in band structure, and when combined with circuit quantum electrodynamics techniques, it provides a direct path to topologically ordered quantum matter.
Time- and Site-Resolved Dynamics in a Topological Circuit
Ningyuan, Jia; Owens, Clai; Sommer, Ariel; Schuster, David; Simon, Jonathan
2015-04-01
From studies of exotic quantum many-body phenomena to applications in spintronics and quantum information processing, topological materials are poised to revolutionize the condensed-matter frontier and the landscape of modern materials science. Accordingly, there is a broad effort to realize topologically nontrivial electronic and photonic materials for fundamental science as well as practical applications. In this work, we demonstrate the first simultaneous site- and time-resolved measurements of a time-reversal-invariant topological band structure, which we realize in a radio-frequency photonic circuit. We control band-structure topology via local permutation of a traveling-wave capacitor-inductor network, increasing robustness by going beyond the tight-binding limit. We observe a gapped density of states consistent with a modified Hofstadter spectrum at a flux per plaquette of ϕ =π /2 . In situ probes of the band gaps reveal spatially localized bulk states and delocalized edge states. Time-resolved measurements reveal dynamical separation of localized edge excitations into spin-polarized currents. The radio-frequency circuit paradigm is naturally compatible with nonlocal coupling schemes, allowing us to implement a Möbius strip topology inaccessible in conventional systems. This room-temperature experiment illuminates the origins of topology in band structure, and when combined with circuit quantum electrodynamics techniques, it provides a direct path to topologically ordered quantum matter.
Leakage Current Estimation of CMOS Circuit with Stack Effect
Institute of Scientific and Technical Information of China (English)
Yong-Jun Xu; Zu-Ying Luo; Xiao-Wei Li; Li-Jian Li; Xian-Long Hong
2004-01-01
Leakage current of CMOS circuit increases dramatically with the technology scaling down and has become a critical issue of high performance system. Subthreshold, gate and reverse biased junction band-to-band tunneling (BTBT) leakages are considered three main determinants of total leakage current. Up to now, how to accurately estimate leakage current of large-scale circuits within endurable time remains unsolved, even though accurate leakage models have been widely discussed. In this paper, the authors first dip into the stack effect of CMOS technology and propose a new simple gate-level leakage current model. Then, a table-lookup based total leakage current simulator is built up according to the model. To validate the simulator, accurate leakage current is simulated at circuit level using popular simulator HSPICE for comparison. Some further studies such as maximum leakage current estimation, minimum leakage current generation and a high-level average leakage current macromodel are introduced in detail. Experiments on ISCAS85 and ISCAS89 benchmarks demonstrate that the two proposed leakage current estimation methods are very accurate and efficient.
Design Multipurpose Circuits with Minimum Garbage Outputs Using CMVMIN Gate
Directory of Open Access Journals (Sweden)
Bahram Dehghan
2014-01-01
Full Text Available Quantum-dot cellular automata (QCA suggest an emerging computing paradigm for nanotechnology. The QCA offers novel approach in electronics for information processing and communication. QCA have recently become the focus of interest in the field of low power nanocomputing and nanotechnology. The fundamental logic elements of this technology are the majority voter (MV and the inverter (INV. This paper presents a novel design with less garbage output and minimum quantum cost in nanotechnology. In the paper we show how to create multipurpose reversible gates. By development of suitable gates in logic circuits as an example, we can combine MFA and HS in one design using CMVMIN gate. We offer CMVMIN gate implementations to be used in multipurpose circuit. We can produce concurrent half adder/subtractor and one bit comparator in one design using reversible logic gates and CMVMIN gates. Also, a 2×4 decoder from recent architecture has been shown independently. We investigate the result of the proposed design using truth table. A significant improvement in quality of the calculated parameters and variety of required outputs has been achieved.
A reversible optical to microwave quantum interface
Barzanjeh, Sh; Milburn, G J; Tombesi, P; Vitali, D
2011-01-01
Quantum technology, like many mature classical technologies, will ultimately integrate distinct modules to achieve a function that transcends the capability of any one of them. We describe a reversible quantum interface between an optical and a microwave photon using a hybrid device based on the common interaction of microwave and optical fields with a nano-mechanical resonator in a superconducting circuit, which is one of the major challenges in the field. The scheme provides a path for generating a traveling microwave field strongly entangled with an optical mode, thus bridging the gap between quantum optical and solid state implementations of quantum information. This is an effective source of (bright) two-mode squeezing with an optical idler (signal) and a microwave signal (idler) and as such enables a continuous variable teleportation protocol.
Testing of Diode-Clamping in an Inductive Pulsed Plasma Thruster Circuit
Toftul, Alexandra; Polzin, Kurt A.; Martin, Adam K.; Hudgins, Jerry L.
2014-01-01
Testing of a 5.5 kV silicon (Si) diode and 5.8 kV prototype silicon carbide (SiC) diode in an inductive pulsed plasma thruster (IPPT) circuit was performed to obtain a comparison of the resulting circuit recapture efficiency,eta(sub r), defined as the percentage of the initial charge energy remaining on the capacitor bank after the diode interrupts the current. The diode was placed in a pulsed circuit in series with a silicon controlled rectifier (SCR) switch, and the voltages across different components and current waveforms were collected over a range of capacitor charge voltages. Reverse recovery parameters, including turn-off time and peak reverse recovery current, were measured and capacitor voltage waveforms were used to determine the recapture efficiency for each case. The Si fast recovery diode in the circuit was shown to yield a recapture efficiency of up to 20% for the conditions tested, while the SiC diode further increased recapture efficiency to nearly 30%. The data presented show that fast recovery diodes operate on a timescale that permits them to clamp the discharge quickly after the first half cycle, supporting the idea that diode-clamping in IPPT circuit reduces energy dissipation that occurs after the first half cycle
Design of superconductor frame compression circuits
Sakurai, T.; Miyaho, N.; Miyahara, K.
2007-10-01
We proposed previously a novel interface circuit which was used between semiconductor data-input circuits and superconductor high-speed routers. The frame length of data packets is compressed in the interface circuit. Our proposed interface circuit has rather narrow timing margin. The problem was that our control circuit of the interface circuit could allow only very small timing delay. In this paper we propose a modified control circuit. We have improved the timing margin of the control circuit using RS-flip flop (RS-FF), where two shift registers and one control circuit are driven by clock pulses provided from a master clock-pulse generator. In this circuit, we have assumed fixed frame length packets. Our final target of master clock frequency is 100 GHz which will be realized with the device-parameter set of future advanced process. As the first step of realizing this target value, we aimed at 40 GHz clock operation with the conventional device-parameter set of NECs standard I process. The behavior of the whole frame compression circuit was simulated by a computer, and it was confirmed that it operated properly up to the master clock frequency of 23 GHz.
Fractional linear systems and electrical circuits
Kaczorek, Tadeusz
2015-01-01
This monograph covers some selected problems of positive and fractional electrical circuits composed of resistors, coils, capacitors and voltage (current) sources. The book consists of 8 chapters, 4 appendices and a list of references. Chapter 1 is devoted to fractional standard and positive continuous-time and discrete-time linear systems without and with delays. In chapter 2 the standard and positive fractional electrical circuits are considered and the fractional electrical circuits in transient states are analyzed. Descriptor linear electrical circuits and their properties are investigated in chapter 3, while chapter 4 is devoted to the stability of fractional standard and positive linear electrical circuits. The reachability, observability and reconstructability of fractional positive electrical circuits and their decoupling zeros are analyzed in chapter 5. The fractional linear electrical circuits with feedbacks are considered in chapter 6. In chapter 7 solutions of minimum energy control for standa...
Graphene radio frequency receiver integrated circuit.
Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A; Haensch, Wilfried
2014-01-01
Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.
A Library-Based Synthesis Methodology for Reversible Logic
Saeedi, Mehdi; Zamani, Morteza Saheb; 10.1016/j.mejo.2010.02.002
2010-01-01
In this paper, a library-based synthesis methodology for reversible circuits is proposed where a reversible specification is considered as a permutation comprising a set of cycles. To this end, a pre-synthesis optimization step is introduced to construct a reversible specification from an irreversible function. In addition, a cycle-based representation model is presented to be used as an intermediate format in the proposed synthesis methodology. The selected intermediate format serves as a focal point for all potential representation models. In order to synthesize a given function, a library containing seven building blocks is used where each building block is a cycle of length less than 6. To synthesize large cycles, we also propose a decomposition algorithm which produces all possible minimal and inequivalent factorizations for a given cycle of length greater than 5. All decompositions contain the maximum number of disjoint cycles. The generated decompositions are used in conjunction with a novel cycle assi...
Directory of Open Access Journals (Sweden)
A. Yu. Zhuravlev
2016-02-01
Full Text Available Purpose. The work is intended to investigate the electromagnetic processes in impedance bond in order to improve noise immunity of track circuits (TC for safe railway operation. Methodology. To achieve this purpose the methods of scientific analysis, mathematical modelling, experimental study, a large-scale simulation were used. Findings. The work examined the interference affecting the normal performance of track circuits. To a large extent, part of track circuit damages account for failures in track circuit equipment. Track circuit equipment is connected directly to the track line susceptible to traction current interference, which causes changes in its electrical characteristics and electromagnetic properties. Normal operability, performance of the main operating modes of the track circuit is determined by previous calculation of its performance and compilation of regulatory tables. The classical method for determination of track circuit parameters was analysed. The classical calculation method assumes representation of individual sections of the electrical track circuit using the quadripole network with known coefficients, usually in the A-form. Determining the coefficients of linear element circuit creates no metrological or mathematical difficulties. However, in circuits containing nonlinear ferromagnets (FM, obtaining the coefficients on the entire induction change range in the cores is quite a difficult task because the classical methods of idling (I and short circuit (SC are not acceptable. This leads to complicated methods for determining both the module and the arguments of quadripole network coefficients. Instead of the classical method, the work proposed the method for calculating the track circuit dependent on nonlinear properties of ferromagnets. Originality. The article examines a new approach to the calculation of TC taking into account the losses in ferromagnets (FM, without determination of equivalent circuit quadripole
46 CFR 111.54-1 - Circuit breakers.
2010-10-01
... 46 Shipping 4 2010-10-01 2010-10-01 false Circuit breakers. 111.54-1 Section 111.54-1 Shipping... REQUIREMENTS Circuit Breakers § 111.54-1 Circuit breakers. (a) Each Circuit breaker must— (1) Meet the general... circuit breaker frame. (e) Each circuit breaker located in an engineroom, boilerroom, or machinery......
14 CFR 23.1357 - Circuit protective devices.
2010-01-01
... circuit breakers, must be installed in all electrical circuits other than— (1) Main circuits of starter... circuit breaker or replace a fuse is essential to safety in flight, that circuit breaker or fuse must be... 14 Aeronautics and Space 1 2010-01-01 2010-01-01 false Circuit protective devices. 23.1357...
Lower Bounds for Tropical Circuits and Dynamic Programs
Jukna, Stasys
2014-01-01
Tropical circuits are circuits with Min and Plus, or Max and Plus operations as gates. Their importance stems from their intimate relation to dynamic programming algorithms. The power of tropical circuits lies somewhere between that of monotone boolean circuits and monotone arithmetic circuits. In this paper we present some lower bounds arguments for tropical circuits, and hence, for dynamic programs.
Circuit-breakers: optical technologies for probing neural signals and systems.
Zhang, Feng; Aravanis, Alexander M; Adamantidis, Antoine; de Lecea, Luis; Deisseroth, Karl
2007-08-01
Neuropsychiatric disorders, which arise from a combination of genetic, epigenetic and environmental influences, epitomize the challenges faced in understanding the mammalian brain. Elucidation and treatment of these diseases will benefit from understanding how specific brain cell types are interconnected and signal in neural circuits. Newly developed neuroengineering tools based on two microbial opsins, channelrhodopsin-2 (ChR2) and halorhodopsin (NpHR), enable the investigation of neural circuit function with cell-type-specific, temporally accurate and reversible neuromodulation. These tools could lead to the development of precise neuromodulation technologies for animal models of disease and clinical neuropsychiatry.
Reversible quantum cellular automata
Schumacher, B
2004-01-01
We define quantum cellular automata as infinite quantum lattice systems with discrete time dynamics, such that the time step commutes with lattice translations and has strictly finite propagation speed. In contrast to earlier definitions this allows us to give an explicit characterization of all local rules generating such automata. The same local rules also generate the global time step for automata with periodic boundary conditions. Our main structure theorem asserts that any quantum cellular automaton is structurally reversible, i.e., that it can be obtained by applying two blockwise unitary operations in a generalized Margolus partitioning scheme. This implies that, in contrast to the classical case, the inverse of a nearest neighbor quantum cellular automaton is again a nearest neighbor automaton. We present several construction methods for quantum cellular automata, based on unitaries commuting with their translates, on the quantization of (arbitrary) reversible classical cellular automata, on quantum c...
Unified model and reverse recovery nonlinearities of the driven diode resonator.
de Moraes, Renato Mariz; Anlage, Steven M
2003-08-01
We study the origins of period doubling and chaos in the driven series resistor-inductor-varactor diode (RLD) nonlinear resonant circuit. We find that resonators driven at frequencies much higher than the diode reverse recovery rate do not show period doubling. Models of chaos based on the nonlinear capacitance of the varactor diode display a reverse-recovery-like effect, and this effect strongly resembles reverse recovery of real diodes. We find for the first time that in addition to the known dependence of the reverse recovery time on past current maxima, there are also important nonlinear dependencies on pulse frequency, duty cycle, and dc voltage bias. Similar nonlinearities are present in the nonlinear capacitance models of these diodes. We conclude that a history-dependent and nonlinear reverse-recovery time is an essential ingredient for chaotic behavior of this circuit, and demonstrate for the first time that all major competing models have this effect, either explicitly or implicitly. Besides unifying the two major models of RLD chaos, our work reveals that the nonlinearities of the reverse-recovery time must be included for a complete understanding of period doubling and chaos in this circuit.
Reversible hysteresis loop tuning
Berger, A.; Binek, Ch.; Margulies, D. T.; Moser, A.; Fullerton, E. E.
2006-02-01
We utilize antiferromagnetically coupled bilayer structures to magnetically tune hysteresis loop properties. Key element of this approach is the non-overlapping switching field distribution of the two magnetic layers that make up the system: a hard magnetic CoPtCrB layer (HL) and a soft magnetic CoCr layer (SL). Both layers are coupled antiferromagnetically through an only 0.6-nm-thick Ru interlayer. The non-overlapping switching field distribution allows the measurement of magnetization reversal in the SL at low fields while keeping the magnetization state of the HL unperturbed. Applying an appropriate high field or high field sequence changes the magnetic state of the HL, which then influences the SL magnetization reversal due to the interlayer coupling. In this way, the position and shape of the SL hysteresis loop can be changed or tuned in a fully reversible and highly effective manner. Here, we study specifically how the SL hysteresis loop characteristics change as we move the HL through an entire high field hysteresis loop sequence.
Reversible multi-head finite automata characterize reversible logarithmic space
DEFF Research Database (Denmark)
Axelsen, Holger Bock
2012-01-01
Deterministic and non-deterministic multi-head finite automata are known to characterize the deterministic and non- deterministic logarithmic space complexity classes, respectively. Recently, Morita introduced reversible multi-head finite automata (RMFAs), and posed the question of whether RMFAs...... characterize reversible logarithmic space as well. Here, we resolve the question affirmatively, by exhibiting a clean RMFA simulation of logarithmic space reversible Turing machines. Indirectly, this also proves that reversible and deterministic multi-head finite automata recognize the same languages....
Tashiro, Kunio
2011-08-01
It is widely accepted that the Babinski reflex is the most well-known and important pathological reflex in clinical neurology. Among many other pathological reflexes that elicit an upgoing great toe, such as Chaddock, Oppenheim, Gordon, Schaefer, and Stransky, only the Chaddock reflex is said to be as sensitive as the Babinski reflex. The optimal receptive fields of the Babinski and Chaddock reflexes are the lateral plantar surface and the external inframalleolar area of the dorsum, respectively. It has been said that the Babinski reflex, obtained by stroking the sole, is by far the best and most reliable method of eliciting an upgoing great toe. However, the Chaddock reflex, the external malleolar sign, is also considered sensitive and reliable according to the literature and everyday neurological practice. The major problems in eliciting the Babinski reflex by stroking the lateral part of the sole are false positive or negative responses due to foot withdrawal, tonic foot response, or some equivocal movements. On the other hand, according to my clinical experience, the external inframalleolar area, which is the receptive field of the Chaddock reflex, is definitely suitable for eliciting the upgoing great toe. In fact, the newly proposed method to stimulate the dorsum of the foot from the medial to the lateral side, which I term the "reversed Chaddock method," is equally sensitive to demonstrate pyramidal tract involvement. With the "reversed Chaddock method", the receptive field of the Chaddock reflex may be postulated to be in the territory of the sural nerve, which could be supported by the better response obtained on stimulation of the postero-lateral calf than the anterior shin. With regard to the receptive fields of the Babinski and Chaddock reflexes, the first sacral dermatome (S1) is also considered a reflexogenous zone, but since the dermatome shows marked overlapping, the zones vary among individuals. As upgoing toe responses are consistently observed in
Quantum Memristors with Superconducting Circuits
Salmilehto, J.; Deppe, F.; di Ventra, M.; Sanz, M.; Solano, E.
2017-02-01
Memristors are resistive elements retaining information of their past dynamics. They have garnered substantial interest due to their potential for representing a paradigm change in electronics, information processing and unconventional computing. Given the advent of quantum technologies, a design for a quantum memristor with superconducting circuits may be envisaged. Along these lines, we introduce such a quantum device whose memristive behavior arises from quasiparticle-induced tunneling when supercurrents are cancelled. For realistic parameters, we find that the relevant hysteretic behavior may be observed using current state-of-the-art measurements of the phase-driven tunneling current. Finally, we develop suitable methods to quantify memory retention in the system.
Circuit considerations for repetitive railguns
Energy Technology Data Exchange (ETDEWEB)
Honih, E.M.
1986-01-01
Railgun electromagnetic launchers have significant military and scientific potential. They provide direct conversion of electrical energy to projectile kinetic energy, and they offer the hope of achieving projectile velocities greatly exceeding the limits of conventional guns. With over 10 km/sec already demonstrated, railguns are attracting attention for tactical and strategic weapons systems and for scientific equation-of-state research. The full utilization of railguns will require significant improvements in every aspect of system design - projectile, barrel, and power source - to achieve operation on a large scale. This paper will review fundamental aspects of railguns, with emphasis on circuit considerations and repetitive operation.
Circuit for Driving Piezoelectric Transducers
Randall, David P.; Chapsky, Jacob
2009-01-01
The figure schematically depicts an oscillator circuit for driving a piezoelectric transducer to excite vibrations in a mechanical structure. The circuit was designed and built to satisfy application-specific requirements to drive a selected one of 16 such transducers at a regulated amplitude and frequency chosen to optimize the amount of work performed by the transducer and to compensate for both (1) temporal variations of the resonance frequency and damping time of each transducer and (2) initially unknown differences among the resonance frequencies and damping times of different transducers. In other words, the circuit is designed to adjust itself to optimize the performance of whichever transducer is selected at any given time. The basic design concept may be adaptable to other applications that involve the use of piezoelectric transducers in ultrasonic cleaners and other apparatuses in which high-frequency mechanical drives are utilized. This circuit includes three resistor-capacitor networks that, together with the selected piezoelectric transducer, constitute a band-pass filter having a peak response at a frequency of about 2 kHz, which is approximately the resonance frequency of the piezoelectric transducers. Gain for generating oscillations is provided by a power hybrid operational amplifier (U1). A junction field-effect transistor (Q1) in combination with a resistor (R4) is used as a voltage-variable resistor to control the magnitude of the oscillation. The voltage-variable resistor is part of a feedback control loop: Part of the output of the oscillator is rectified and filtered for use as a slow negative feedback to the gate of Q1 to keep the output amplitude constant. The response of this control loop is much slower than 2 kHz and, therefore, does not introduce significant distortion of the oscillator output, which is a fairly clean sine wave. The positive AC feedback needed to sustain oscillations is derived from sampling the current through the
Pragmatic circuits signals and filters
Eccles, William
2006-01-01
Pragmatic Circuits: Signals and Filters is built around the processing of signals. Topics include spectra, a short introduction to the Fourier series, design of filters, and the properties of the Fourier transform. The focus is on signals rather than power. But the treatment is still pragmatic. For example, the author accepts the work of Butterworth and uses his results to design filters in a fairly methodical fashion. This third of three volumes finishes with a look at spectra by showing how to get a spectrum even if a signal is not periodic. The Fourier transform provides a way of dealing wi
Circuit Breakers and Market Runs
Sarah Draus; Mark Van Achter
2012-01-01
This paper analyzes whether the application of a “circuit breaker” to a financial market (i.e. a mechanism that interrupts trading for a predetermined period when the price moves beyond a predetermined level) reaches its intended goals of increased market stability and overall welfare. Our framework of analysis is a model in which investors can trade at several dates and might face a liquidity shock forcing them to sell immediately when the shock occurs. This setting potentially induces a “ma...
Recursive Optimization of Digital Circuits
1990-12-14
capability will become increasingly important as the application-specific integrated circuit (ASIC) market continues to meet its rapid growth projections... market (ASIC) continues to grow (18). The recursive optimization system presented in this thesis was developed to inves- tigate a new approach to global...f)) (narg (bar arg)) (fO (divide f narg)) (f1 (divide f arg)) (gO (divide g narg)) (gi (divide g arg)) ( productO (mult fO gO)) (producti (mult fl gl
Model reduction for circuit simulation
Hinze, Michael; Maten, E Jan W Ter
2011-01-01
Simulation based on mathematical models plays a major role in computer aided design of integrated circuits (ICs). Decreasing structure sizes, increasing packing densities and driving frequencies require the use of refined mathematical models, and to take into account secondary, parasitic effects. This leads to very high dimensional problems which nowadays require simulation times too large for the short time-to-market demands in industry. Modern Model Order Reduction (MOR) techniques present a way out of this dilemma in providing surrogate models which keep the main characteristics of the devi
Quantum Memristors with Superconducting Circuits
Salmilehto, J.; Deppe, F.; Di Ventra, M.; Sanz, M.; Solano, E.
2017-01-01
Memristors are resistive elements retaining information of their past dynamics. They have garnered substantial interest due to their potential for representing a paradigm change in electronics, information processing and unconventional computing. Given the advent of quantum technologies, a design for a quantum memristor with superconducting circuits may be envisaged. Along these lines, we introduce such a quantum device whose memristive behavior arises from quasiparticle-induced tunneling when supercurrents are cancelled. For realistic parameters, we find that the relevant hysteretic behavior may be observed using current state-of-the-art measurements of the phase-driven tunneling current. Finally, we develop suitable methods to quantify memory retention in the system. PMID:28195193
Circuit QED with transmon qubits
Energy Technology Data Exchange (ETDEWEB)
Wulschner, Karl Friedrich; Puertas, Javier; Baust, Alexander; Eder, Peter; Fischer, Michael; Goetz, Jan; Haeberlein, Max; Schwarz, Manuel; Xie, Edwar; Zhong, Ling; Deppe, Frank; Fedorov, Kirill; Marx, Achim; Menzel, Edwin; Gross, Rudolf [Walther-Meissner-Institut, Bayerische Akademie der Wissenschaften, Garching (Germany); Physik-Department, TU Muenchen, Garching (Germany); Nanosystems Initiative Munich (NIM), Muenchen (Germany); Huebl, Hans [Walther-Meissner-Institut, Bayerische Akademie der Wissenschaften, Garching (Germany); Nanosystems Initiative Munich (NIM), Muenchen (Germany); Weides, Martin [Karlsruhe Institute of Technology (KIT), Karlsruhe (Germany)
2015-07-01
Superconducting quantum bits are basic building blocks for circuit QED systems. Applications in the fields of quantum computation and quantum simulation require long coherence times. We have fabricated and characterized superconducting transmon qubits which are designed to operate at a high ratio of Josephson energy and charging energy. Due to their low sensitivity to charge noise transmon qubits show good coherence properties. We couple transmon qubits to coplanar waveguide resonators and coplanar slotline resonators and characterize the devices at mK-temperatures. From the experimental data we derive the qubit-resonator coupling strength, the qubit relaxation time and calibrate the photon number in the resonator via Stark shifts.
Radio frequency integrated circuit design
Rogers, John W M
2010-01-01
This newly revised and expanded edition of the 2003 Artech House classic, Radio Frequency Integrated Circuit Design, serves as an up-to-date, practical reference for complete RFIC know-how. The second edition includes numerous updates, including greater coverage of CMOS PA design, RFIC design with on-chip components, and more worked examples with simulation results. By emphasizing working designs, this book practically transports you into the authors' own RFIC lab so you can fully understand the function of each design detailed in this book. Among the RFIC designs examined are RF integrated LC
Sabin, William
1998-01-01
A comprehensive reference for the design of high frequency communications systems and equipment. This revised edition is loaded with practical data, much of which cannot be found in other reference books. Its approach to the subject follows the needs of an engineer from system definition and performance requirements down to the individual circuit elements that make up radio transmitters and receivers. The accompanying disk contains updated software on filters, matching networks and receiver analysis. SciTech Publishing also provides many other products related to Communication Systems Design.
18k Channels single photon counting readout circuit for hybrid pixel detector
Maj, P.; Grybos, P.; Szczygiel, R.; Zoladz, M.; Sakumura, T.; Tsuji, Y.
2013-01-01
We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm×20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96×192 pixels with 100 μm×100 μm pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 μW/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 μV/e- and the equivalent noise charge is 168 e- rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.
18k Channels single photon counting readout circuit for hybrid pixel detector
Energy Technology Data Exchange (ETDEWEB)
Maj, P., E-mail: piotr.maj@agh.edu.pl [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Grybos, P.; Szczygiel, R.; Zoladz, M. [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Sakumura, T.; Tsuji, Y. [X-ray Analysis Division, Rigaku Corporation, Matsubara, Akishima, Tokyo 196-8666 (Japan)
2013-01-01
We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm Multiplication-Sign 20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96 Multiplication-Sign 192 pixels with 100 {mu}m Multiplication-Sign 100 {mu}m pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 {mu}W/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 {mu}V/e{sup -} and the equivalent noise charge is 168 e{sup -} rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.
Analog VLSI neural network integrated circuits
Kub, F. J.; Moon, K. K.; Just, E. A.
1991-01-01
Two analog very large scale integration (VLSI) vector matrix multiplier integrated circuit chips were designed, fabricated, and partially tested. They can perform both vector-matrix and matrix-matrix multiplication operations at high speeds. The 32 by 32 vector-matrix multiplier chip and the 128 by 64 vector-matrix multiplier chip were designed to perform 300 million and 3 billion multiplications per second, respectively. An additional circuit that has been developed is a continuous-time adaptive learning circuit. The performance achieved thus far for this circuit is an adaptivity of 28 dB at 300 KHz and 11 dB at 15 MHz. This circuit has demonstrated greater than two orders of magnitude higher frequency of operation than any previous adaptive learning circuit.
Physical synthesis of quantum circuits using templates
Mirkhani, Zahra; Mohammadzadeh, Naser
2016-10-01
Similar to traditional CMOS circuits, quantum circuit design flow is divided into two main processes: logic synthesis and physical design. Addressing the limitations imposed on optimization of the quantum circuit metrics because of no information sharing between logic synthesis and physical design processes, the concept of " physical synthesis" was introduced for quantum circuit flow, and a few techniques were proposed for it. Following that concept, in this paper a new approach for physical synthesis inspired by template matching idea in quantum logic synthesis is proposed to improve the latency of quantum circuits. Experiments show that by using template matching as a physical synthesis approach, the latency of quantum circuits can be improved by more than 23.55 % on average.
A concise guide to chaotic electronic circuits
Buscarino, Arturo; Frasca, Mattia; Sciuto, Gregorio
2014-01-01
This brief provides a source of instruction from which students can be taught about the practicalities of designing and using chaotic circuits. The text provides information on suitable materials, circuit design and schemes for design realization. Readers are then shown how to reproduce experiments on chaos and to design new ones. The text guides the reader easily from the basic idea of chaos to the laboratory test providing an experimental basis that can be developed for such applications as secure communications. This brief provides introductory information on sample chaotic circuits, includes coverage of their development, and the “gallery” section provides information on a wide range of circuits. Concise Guide to Chaotic Electronic Circuits will be useful to anyone running a laboratory class involving chaotic circuits and to students wishing to learn about them.
GLITCH ANALYSIS AND REDUCTION IN DIGITAL CIRCUITS
Directory of Open Access Journals (Sweden)
Ronak Shah
2016-08-01
Full Text Available Hazard in digital circuits is unnecessary transitions due to gate propagation delay in that circuit. Hazards occur due to uneven delay offered in the path of the various ongoing signals. One of the important reasons for power dissipation in CMOS circuits is the switching activity .This include activities such as spurious pulses, called glitches. Power optimization techniques that concentrate on the reduction of switching power dissipation of a given circuit are called glitch reduction techniques. In this paper, we analyse various Glitch reduction techniques such as Hazard filtering Technique, Balanced Path Technique, Multiple Threshold Technique and Gate Freezing Technique. We also measure the parameters such as noise and delay of the circuits on application of various techniques to check the reliability of different circuits in various situations.
A Singularity in the Kirchhoff's Circuit Equations
Harsha, N R Sree
2016-01-01
Students often have difficulty in understanding qualitatively the behaviour of simple electric circuits. In particular, as different studies have shown, they find multiple batteries connected in multiple loops difficult to analyse. In a recent paper [Phys. Educ. 50 568 (2015)], we showed such an electric circuit, which consists of ideal batteries connected in parallel, that couldn't be solved by the existing circuit analysis methods. In this paper, we shall introduce a new mathematical method of solving simple electric circuits from the solutions of more general circuits and show that the currents, in this particular circuit, take the indeterminate 0/0 form. We shall also present some of the implications of teaching the method. We believe that the description presented in this paper should help the instructors in teaching the behaviour of multiple batteries connected in parallel.
Development of larval motor circuits in Drosophila.
Kohsaka, Hiroshi; Okusawa, Satoko; Itakura, Yuki; Fushiki, Akira; Nose, Akinao
2012-04-01
How are functional neural circuits formed during development? Despite recent advances in our understanding of the development of individual neurons, little is known about how complex circuits are assembled to generate specific behaviors. Here, we describe the ways in which Drosophila motor circuits serve as an excellent model system to tackle this problem. We first summarize what has been learned during the past decades on the connectivity and development of component neurons, in particular motor neurons and sensory feedback neurons. We then review recent progress in our understanding of the development of the circuits as well as studies that apply optogenetics and other innovative techniques to dissect the circuit diagram. New approaches using Drosophila as a model system are now making it possible to search for developmental rules that regulate the construction of neural circuits.
Reverse Engineering of RFID devices
Bokslag, Wouter
2015-01-01
This paper discusses the relevance and potential impact of both RFID and reverse engineering of RFID technology, followed by a discussion of common protocols and internals of RFID technology. The focus of the paper is on providing an overview of the different approaches to reverse engineering RFID technology and possible countermeasures that could limit the potential of such reverse engineering attempts.
Energy dissipation dataset for reversible logic gates in quantum dot-cellular automata.
Bahar, Ali Newaz; Rahman, Mohammad Maksudur; Nahid, Nur Mohammad; Hassan, Md Kamrul
2017-02-01
This paper presents an energy dissipation dataset of different reversible logic gates in quantum-dot cellular automata. The proposed circuits have been designed and verified using QCADesigner simulator. Besides, the energy dissipation has been calculated under three different tunneling energy level at temperature T=2 K. For estimating the energy dissipation of proposed gates; QCAPro tool has been employed.
Efficient FM Algorithm for VLSI Circuit Partitioning
Directory of Open Access Journals (Sweden)
M.RAJESH
2013-04-01
Full Text Available In FM algorithm initial partitioning matrix of the given circuit is assigned randomly, as a result for larger circuit having hundred or more nodes will take long time to arrive at the final partition if theinitial partitioning matrix is close to the final partitioning then the computation time (iteration required is small . Here we have proposed novel approach to arrive at initial partitioning by using spectralfactorization method the results was verified using several circuits.
Nonsmooth Modeling and Simulation for Switched Circuits
Acary, Vincent; Brogliato, Bernard
2011-01-01
"Nonsmooth Modeling and Simulation for Switched Circuits" concerns the modeling and the numerical simulation of switched circuits with the nonsmooth dynamical systems (NSDS) approach, using piecewise-linear and multivalued models of electronic devices like diodes, transistors, switches. Numerous examples (ranging from introductory academic circuits to various types of power converters) are analyzed and many simulation results obtained with the INRIA open-source SICONOS software package are presented. Comparisons with SPICE and hybrid methods demonstrate the power of the NSDS approach
Integrated capacitors for conductive lithographic film circuits
Harrey, PM; Evans, PSA; Harrison, DJ
2001-01-01
This paper reports on fabrication of low-value embedded capacitors in conductive lithographic film (CLF) circuit boards. The CLF process is a low-cost and high speed manufacturing technique for flexible circuits and systems. We report on the construction and electrical characteristics of CLF capacitor structures printed onto flexible substrates. These components comprise a single polyester dielectric layer, which separates the printed electrode films. Multilayer circuit boards with printed co...
The analysis and design of linear circuits
Thomas, Roland E; Toussaint, Gregory J
2009-01-01
The Analysis and Design of Linear Circuits, 6e gives the reader the opportunity to not only analyze, but also design and evaluate linear circuits as early as possible. The text's abundance of problems, applications, pedagogical tools, and realistic examples helps engineers develop the skills needed to solve problems, design practical alternatives, and choose the best design from several competing solutions. Engineers searching for an accessible introduction to resistance circuits will benefit from this book that emphasizes the early development of engineering judgment.
Monitoring transients in low inductance circuits
Guilford, R.P.; Rosborough, J.R.
1985-10-21
The instant invention relates to methods of and apparatus for monitoring transients in low inductance circuits and to a probe utilized to practice said method and apparatus. More particularly, the instant invention relates to methods of and apparatus for monitoring low inductance circuits, wherein the low inductance circuits include a pair of flat cable transmission lines. The instant invention is further directed to a probe for use in monitoring pairs of flat cable transmission lines.
Long-wavelength silicon photonic integrated circuits
2014-01-01
In this paper we elaborate on our development of silicon photonic integrated circuits operating at wavelengths beyond the telecommunication wavelength window. Silicon-on-insulator waveguide circuits up to 3.8 mu m wavelength are demonstrated as well as germanium-on-silicon waveguide circuits operating in the 5-5 mu m wavelength range. The heterogeneous integration of III-V semiconductors and IV-VI semiconductors on this platform is described for the integration of lasers and photodetectors op...
Computer-Aided Pneumatic Circuit Design
TEKİNER, Zafer; KORKUT, İhsan
2001-01-01
In this study, a user-interactive computer program was developed for computer-aided pneumatic circuit design. The pneumatic circuit elements were selected and designed by the determination of the main principles that are in accordance with the aim the user is going to specify. A database was established by forming IGES files for pneumatic circuit elements. In addition to this database, lists displaying the connection nodes of each element were prepared. The coordinates will be conne...
MESOSCOPIC ELECTRIC CIRCUITS WITH CHARGE DISCRETIZATION
2004-01-01
MESOSCOPIC ELECTRIC CIRCUITS WITH CHARGE DISCRETIZATION Nanoscience is a modern aspect of electronic engineering with significant projections for applications on new devices. This project allowed presenting an innovative language and a rigorous vision on aspects of nanoscience. The theory of quantum electrical circuits with discrete charge corresponds to the description (in simple terms) of some aspects of nanoscience. Our results gather aspects of quantum mechanics, electrical circuit...
Electronic circuits for communications systems: A compilation
1972-01-01
The compilation of electronic circuits for communications systems is divided into thirteen basic categories, each representing an area of circuit design and application. The compilation items are moderately complex and, as such, would appeal to the applications engineer. However, the rationale for the selection criteria was tailored so that the circuits would reflect fundamental design principles and applications, with an additional requirement for simplicity whenever possible.
Combinational Circuit Obfuscation Through Power Signature Manipulation
2011-06-01
hardware descrip- tion files such as VHDL , SPICE netlist are needed for the SPICE-like simulation tools; however, the SID just needs a simple circuit...Time Interval) Figure 3.12: The Summary of Procedure for SPICE Simulation CORGI 3.0 XML Exporter Truth Table Exporter GraphML Exporter VHDL Exporter...encryption system developed by Falkinburg [4]. For installing the obfuscated version of a circuit into the test-bed, the circuit is described in VHDL format
Logarithmic current-measuring transistor circuits
DEFF Research Database (Denmark)
Højberg, Kristian Søe
1967-01-01
Describes two transistorized circuits for the logarithmic measurement of small currents suitable for nuclear reactor instrumentation. The logarithmic element is applied in the feedback path of an amplifier, and only one dual transistor is used as logarithmic diode and temperature compensating...... transistor. A simple one-amplifier circuit is compared with a two-amplifier system. The circuits presented have been developed in connexion with an amplifier using a dual m.o.s. transistor input stage with diode-protected gates....
Radix-independent, efficient arrays for multi-level n-qudit quantum and reversible computation
Mohammadi, Majid
2015-08-01
Multiple-valued quantum logic allows the designers to reduce the number of cells while obtaining more functionality in the quantum circuits. Large r-valued reversible or quantum gates ( r stands for radix and is more than 2) cannot be directly realized in the current quantum technology. Therefore, we are interested in designing the large reversible and quantum controlled gates using the arrays of one-quantum digit (qudit) or two-qudit gates. In our previous work, we proposed quantum arrays to implement the r-valued quantum circuits. In this paper, we propose novel efficient structures and arrays, for r-valued quantum logic gates. The quantum costs of the developed quantum arrays are independent of the radix of calculations in the quantum circuit.
Reverse Engineering Malicious Applications
Directory of Open Access Journals (Sweden)
Ioan Cristian Iacob
2015-06-01
Full Text Available Detecting new and unknown malware is a major challenge in today’s software. Security profession. A lot of approaches for the detection of malware using data mining techniques have already been proposed. Majority of the works used static features of malware. However, static detection methods fall short of detecting present day complex malware. Although some researchers proposed dynamic detection methods, the methods did not use all the malware features. In this work, an approach for the detection of new and unknown malware was proposed and implemented. Each sample was reverse engineered for analyzing its effect on the operating environment and to extract the static and behavioral features.
Efficient Scheme for Optimizing Quantum Fourier Circuits
Institute of Scientific and Technical Information of China (English)
JIANG Min; ZHANG Zengke; Tzyh-Jong Tarn
2008-01-01
In quantum circuits, importing of additional qubits can reduce the operation time and prevent de-coherence induced by the environment. However, excessive qubits may make the quantum system vulner-able. This paper describes how to relax existing qubits without additional qubits to significantly reduce the operation time of the quantum Fourier circuit compared to a circuit without optimization. The results indicate that this scheme makes full use of the qubits relaxation. The concepts can be applied to improve similar quantum circuits and guide the physical implementations of quantum algorithms or devices.
The emergy analysis of loop circuit.
Cao, Kai; Feng, Xiao
2008-12-01
Emergy analysis can analyze the resource utilization and environmental performance of a system. Loop circuit is a common structure in the process industry, but when emergy analysis is carried out to such structure, mistakes such as emergy double counting often occur. To avoid emergy double counting, two types of loop circuit-direct loop circuit and indirect loop circuit-are theoretically distinguished, and the methods to avoid such mistake are proposed. Finally, PVC production and vinyl acetate production are adopted to demonstrate the methods.
Model Order Reduction for Electronic Circuits:
DEFF Research Database (Denmark)
Hjorth, Poul G.; Shontz, Suzanne
Electronic circuits are ubiquitous; they are used in numerous industries including: the semiconductor, communication, robotics, auto, and music industries (among many others). As products become more and more complicated, their electronic circuits also grow in size and complexity. This increased ...... in the semiconductor industry. Circuit simulation proceeds by using Maxwell’s equations to create a mathematical model of the circuit. The boundary element method is then used to discretize the equations, and the variational form of the equations are then solved on the graph network....
Electric circuit theory applied electricity and electronics
Yorke, R
1981-01-01
Electric Circuit Theory provides a concise coverage of the framework of electrical engineering. Comprised of six chapters, this book emphasizes the physical process of electrical engineering rather than abstract mathematics. Chapter 1 deals with files, circuits, and parameters, while Chapter 2 covers the natural and forced response of simple circuit. Chapter 3 talks about the sinusoidal steady state, and Chapter 4 discusses the circuit analysis. The fifth chapter tackles frequency response of networks, and the last chapter covers polyphase systems. This book will be of great help to electrical
High Speed Solid State Circuit Breaker
Podlesak, Thomas F.
1993-01-01
The U.S. Army Research Laboratory, Fort Monmouth, NJ, has developed and is installing two 3.3 MW high speed solid state circuit breakers at the Army's Pulse Power Center. These circuit breakers will interrupt 4160V three phase power mains in no more than 300 microseconds, two orders of magnitude faster than conventional mechanical contact type circuit breakers. These circuit breakers utilize Gate Turnoff Thyristors (GTO's) and are currently utility type devices using air cooling in an air conditioned enclosure. Future refinements include liquid cooling, either water or two phase organic coolant, and more advanced semiconductors. Each of these refinements promises a more compact, more reliable unit.
Wafer-scale graphene integrated circuit.
Lin, Yu-Ming; Valdes-Garcia, Alberto; Han, Shu-Jen; Farmer, Damon B; Meric, Inanc; Sun, Yanning; Wu, Yanqing; Dimitrakopoulos, Christos; Grill, Alfred; Avouris, Phaedon; Jenkins, Keith A
2011-06-10
A wafer-scale graphene circuit was demonstrated in which all circuit components, including graphene field-effect transistor and inductors, were monolithically integrated on a single silicon carbide wafer. The integrated circuit operates as a broadband radio-frequency mixer at frequencies up to 10 gigahertz. These graphene circuits exhibit outstanding thermal stability with little reduction in performance (less than 1 decibel) between 300 and 400 kelvin. These results open up possibilities of achieving practical graphene technology with more complex functionality and performance.
Circuit For Control Of Electromechanical Prosthetic Hand
Bozeman, Richard J., Jr.
1995-01-01
Proposed circuit for control of electromechanical prosthetic hand derives electrical control signals from shoulder movements. Updated, electronic version of prosthesis, that includes two hooklike fingers actuated via cables from shoulder harness. Circuit built around favored shoulder harness, provides more dexterous movement, without incurring complexity of computer-controlled "bionic" or hydraulically actuated devices. Additional harness and potentiometer connected to similar control circuit mounted on other shoulder. Used to control stepping motor rotating hand about prosthetic wrist to one of number of angles consistent with number of digital outputs. Finger-control signals developed by circuit connected to first shoulder harness transmitted to prosthetic hand via sliprings at prosthetic wrist joint.
Analog circuit design art, science, and personalities
Williams, Jim
1991-01-01
Analog Circuit Design: Art, Science, and Personalities discusses the many approaches and styles in the practice of analog circuit design. The book is written in an informal yet informative manner, making it easily understandable to those new in the field. The selection covers the definition, history, current practice, and future direction of analog design; the practice proper; and the styles in analog circuit design. The book also includes the problems usually encountered in analog circuit design; approach to feedback loop design; and other different techniques and applications. The text is
Matrosova, A. Yu.; Kirienko, I. E.; Tomkov, V. V.; Miryutov, A. A.
2016-12-01
Reliability of physical systems is provided by reliability of their parts including logical ones. Insertion of malicious subcircuits that can destroy logical circuit or cause leakage of confidential information from a system necessitates the detection of such subcircuits followed by their masking if possible. We suggest a method of finding a set of sequential circuit nodes in which Trojan Circuits can be inserted. The method is based on random estimations of controllability and observability of combinational nodes calculated using a description of sequential circuit working area and an evidence of existence of a transfer sequence for the proper set of internal states without finding the sequence itself. The method allows cutting calculations using operations on Reduced Ordered Binary Decision Diagrams (ROBDDs) that can depend only on the state variables of the circuit. The approach, unlike traditional ones, does not require preliminary sequential circuit simulation but can use its results. It can be used when malicious circuits cannot be detected during sequential circuit verification.
Ding, Shuai; Zang, Rui; Zou, Lianfeng; Wang, Bing-Zhong; Caloz, Christophe
2014-01-01
A novel time-reversal subwavelength transmission technique, based on pulse shaping circuits (PSCs), is proposed. This technique removes the need for complex or electrically large electromagnetic structures by generating channel diversity via pulse shaping instead of angular spectrum transformation. It is shown that, compared to our previous time-reversal system based on chirped delay lines, the PSC approach offers greater flexibility and larger possible numbers of channels, i.e. ultimately higher transmission throughput. The PSC based time-reversal system is also demonstrated experimentally.
Enhanced architectures for room-temperature reversible logic gates in graphene
Dragoman, Daniela; Dragoman, Mircea
2014-09-01
We show that reversible two- and three-input logic gates, such as the universal Toffoli gate, can be implemented with three tilted gate electrodes patterned on a monolayer graphene flake. These reversible gates are based on the unique properties of ballistic charge carriers in graphene, which induce bandgaps in transmission for properly chosen potential barriers. The enhanced architectures for reversible logic gate implementation proposed in this paper offer a remarkable design simplification compared to standard approaches based on field-effect transistor circuits, as well as potential high-frequency operation.
The ringer - An efficient, high repetition rate circuit for electromagnetic launchers
Giorgi, D.; Helava, H.; Lindner, K.; Long, J.; Zucker, O.
1989-01-01
The Meatgrinder is an efficient, current-multiplying circuit which can be used to optimize the energy transfer to various electromagnetic gun configurations. The authors present a simple variant of the Meatgrinder circuit which permits a first-order current profiling into the gun and recovery of the inductive energy in the barrel at a high repetition rate. The circuit is basically a one-stage Meatgrinder which utilizes the ringing of the energy storage capacitor (less than 40 percent reversal) to perform the opening switch function and a solid-state diode as the crowbar switch between the two mutually coupled inductors. With resonant charging, this results in a completely passive, high-repetiton-rate electromagnetic-gun power supply. Since most of the barrel energy is recovered, a railgun with negligible muzzle flash can be realized.
Solid state multi-ensemble quantum computer in waveguide circuit model
Moiseev, Sergey A; Gubaidullin, Firdus F
2010-01-01
The first realization of solid state quantum computer was demonstrated recently by using artificial atoms -- transmons in superconducting resonator. Here, we propose a novel architecture of flexible and scalable quantum computer based on a waveguide circuit coupling many quantum nodes of controlled atomic ensembles. For the first time, we found the optimal practically attainable parameters of the atoms and circuit for 100{%} efficiency of quantum memory for multi qubit photon fields and confirmed experimentally the predicted perfect storage. Then we revealed self modes for reversible transfer of qubits between the quantum memory node and arbitrary other nodes. We found a realization of iSWAP gate via direct coupling of two arbitrary nodes with a processing rate accelerated proportionally to number of atoms in the node. A large number of the two-qubit gates can be simultaneously realized in the circuit for implementation of parallel quantum processing. Dynamic coherent elimination procedure of excess quantum s...
Quaternary Galois field adder based all-optical multivalued logic circuits.
Chattopadhyay, Tanay; Taraphdar, Chinmoy; Roy, Jitendra Nath
2009-08-01
Galois field (GF) algebraic expressions have been found to be promising choices for reversible and quantum implementation of multivalued logic. For the first time to our knowledge, we developed GF(4) adder multivalued (four valued) logic circuits in an all-optical domain. The principle and possibilities of an all-optical GF(4) adder circuit are described. The theoretical model is presented and verified through numerical simulation. The quaternary inverter, successor, clockwise cycle, and counterclockwise cycle gates are proposed with the help of the all-optical GF(4) adder circuit. In this scheme different quaternary logical states are represented by different polarized light. A terahertz optical asymmetric demultiplexer interferometric switch plays an important role in this scheme.
Institute of Scientific and Technical Information of China (English)
JIA Jin-zhang
2008-01-01
The occurrence of local circulating ventilation can be caused by many factors,such as the airflow reversion during mine fire, the improper arrangement of local fan or underground fan station and the man-made error input of raw data before network solving.Once circulating ventilations occur, the corresponding branches in the ventilation network corresponding to the relevant airways in ventilation system form circuits, and all the directions of the branches in the circuits are identical, which is the unidirectional problem in ventilation network. Based on the properties of node adjacent matrix, a serial of mathematical computation to node adjacent matrix were performed, and a mathematical model for determining unidirectional circuits based on node adjacent matrix was put forward.
Fundamentals of reversible flowchart languages
DEFF Research Database (Denmark)
Yokoyama, Tetsuo; Axelsen, Holger Bock; Glück, Robert
2016-01-01
. Although reversible flowcharts are superficially similar to classical flowcharts, there are crucial differences: atomic steps are limited to locally invertible operations, and join points require an explicit orthogonalizing conditional expression. Despite these constraints, we show that reversible......Abstract This paper presents the fundamentals of reversible flowcharts. They are intended to naturally represent the structure and control flow of reversible (imperative) programming languages in a simple computation model, in the same way classical flowcharts do for conventional languages......, structured reversible flowcharts are as expressive as unstructured ones, as shown by a reversible version of the classic Structured Program Theorem. We illustrate how reversible flowcharts can be concretized with two example programming languages, complete with syntax and semantics: a low-level unstructured...
Electrical circuit theory and technology
Bird, John
2014-01-01
This much-loved textbook explains the principles of electrical circuit theory and technology so that students of electrical and mechanical engineering can master the subject. Real-world situations and engineering examples put the theory into context. The inclusion of worked problems with solutions help you to learn and further problems then allow you to test and confirm you have fully understood each subject. In total the book contains 800 worked problems, 1000 further problems and 14 revision tests with answers online. This an ideal text for foundation and undergraduate degree students and those on upper level vocational engineering courses, in particular electrical and mechanical. It provides a sound understanding of the knowledge required by technicians in fields such as electrical engineering, electronics and telecommunications. This edition has been updated with developments in key areas such as semiconductors, transistors, and fuel cells, along with brand new material on ABCD parameters and Fourier's An...
Microtubule as nanobioelectronic nonlinear circuit
Directory of Open Access Journals (Sweden)
Sekulić Dalibor L.
2012-01-01
Full Text Available In recent years, the use of biological molecules has offered exciting alternatives to conventional synthetic methods. Specific methods use various biological templates to direct the deposition and patterning of inorganic materials. Here we have established a new electrical model of microtubules as a biological nanoscale circuit based on polyelectrolyte features of cylindrical biopolymers. Our working hypothesis is that microtubules play an active role in sub-cellular computation and signaling via electronic and protonic conductivity and can thus be made useful in hybrid materials that offer novel electronic characteristics. We verify these hypotheses both computationally and analytically through a quantitative model based on the atomic resolution structures of the key functional proteins.
TIME CALIBRATED OSCILLOSCOPE SWEEP CIRCUIT
Smith, V.L.; Carstensen, H.K.
1959-11-24
An improved time calibrated sweep circuit is presented, which extends the range of usefulness of conventional oscilloscopes as utilized for time calibrated display applications in accordance with U. S. Patent No. 2,832,002. Principal novelty resides in the provision of a pair of separate signal paths, each of which is phase and amplitude adjustable, to connect a high-frequency calibration oscillator to the output of a sawtooth generator also connected to the respective horizontal deflection plates of an oscilloscope cathode ray tube. The amplitude and phase of the calibration oscillator signals in the two signal paths are adjusted to balance out feedthrough currents capacitively coupled at high frequencies of the calibration oscillator from each horizontal deflection plate to the vertical plates of the cathode ray tube.