Efficient Algorithms for Optimal 4-Bit Reversible Logic System Synthesis
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Zhiqiang Li
2013-01-01
Full Text Available Owing to the exponential nature of the memory and run-time complexity, many methods can only synthesize 3-bit reversible circuits and cannot synthesize 4-bit reversible circuits well. We mainly absorb the ideas of our 3-bit synthesis algorithms based on hash table and present the efficient algorithms which can construct almost all optimal 4-bit reversible logic circuits with many types of gates and at mini-length cost based on constructing the shortest coding and the specific topological compression; thus, the lossless compression ratio of the space of n-bit circuits reaches near 2×n!. This paper presents the first work to create all 3120218828 optimal 4-bit reversible circuits with up to 8 gates for the CNT (Controlled-NOT gate, NOT gate, and Toffoli gate library, and it can quickly achieve 16 steps through specific cascading created circuits.
Novel Parity-Preserving Designs of Reversible 4-Bit Comparator
Qi, Xue-mei; Chen, Fu-long; Wang, Hong-tao; Sun, Yun-xiang; Guo, Liang-min
2014-04-01
Reversible logic has attracted much attention in recent years especially when the calculation with minimum energy consumption is considered. This paper presents two novel approaches for designing reversible 4-bit comparator based on parity-preserving gates, which can detect any fault that affects no more than a single logic signal. In order to construct the comparator, three variable EX-OR gate (TVG), comparator gate (CPG), four variable EX-OR gate block (FVGB) and comparator gate block (CPGB) are designed, and they are parity-preserving and reversible. Their quantum equivalent implementations are also proposed. The design of two comparator circuits is completed by using existing reversible gates and the above new reversible circuits. All these comparators have been modeled and verified in Verilog hardware description language (Verilog HDL). The Quartus II simulation results indicate that their circuits' logic structures are correct. The comparative results are presented in terms of quantum cost, delay and garbage outputs.
Designing Parity Preserving Reversible Circuits
Paul, Goutam; Chattopadhyay, Anupam; Chandak, Chander
2013-01-01
Making a reversible circuit fault-tolerant is much more difficult than classical circuit and there have been only a few works in the area of parity-preserving reversible logic design. Moreover, all of these designs are ad hoc, based on some pre-defined parity preserving reversible gates as building blocks. In this paper, we for the first time propose a novel and systematic approach towards parity preserving reversible circuits design. We provide some related theoretical results and give two a...
Fault Testing for Reversible Circuits
Patel, K N; Markov, I L; Patel, Ketan N.; Hayes, John P.; Markov, Igor L.
2004-01-01
Applications of reversible circuits can be found in the fields of low-power computation, cryptography, communications, digital signal processing, and the emerging field of quantum computation. Furthermore, prototype circuits for low-power applications are already being fabricated in CMOS. Regardless of the eventual technology adopted, testing is sure to be an important component in any robust implementation. We consider the test set generation problem. Reversibility affects the testing problem in fundamental ways, making it significantly simpler than for the irreversible case. For example, we show that any test set that detects all single stuck-at faults in a reversible circuit also detects all multiple stuck-at faults. We present efficient test set constructions for the standard stuck-at fault model as well as the usually intractable cell-fault model. We also give a practical test set generation algorithm, based on an integer linear programming formulation, that yields test sets approximately half the size o...
A finite alternation result for reversible boolean circuits
Selinger, Peter
2016-01-01
We say that a reversible boolean function on n bits has alternation depth d if it can be written as the sequential composition of d reversible boolean functions, each of which acts only on the top n-1 bits or on the bottom n-1 bits. We show that every reversible boolean function of n >= 4 bits has alternation depth 9.
Delay Reduction in Optimized Reversible Multiplier Circuit
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Mohammad Assarian
2012-01-01
Full Text Available In this study a novel reversible multiplier is presented. Reversible logic can play a significant role in computer domain. This logic can be applied in quantum computing, optical computing processing, DNA computing, and nanotechnology. One condition for reversibility of a computable model is that the number of input equate with the output. Reversible multiplier circuits are the circuits used frequently in computer system. For this reason, optimization in one reversible multiplier circuit can reduce its volume of hardware on one hand and increases the speed in a reversible system on the other hand. One of the important parameters that optimize a reversible circuit is reduction of delays in performance of the circuit. This paper investigates the performance characteristics of the gates, the circuits and methods of optimizing the performance of reversible multiplier circuits. Results showed that reduction of the reversible circuit layers has lead to improved performance due to the reduction of the propagation delay between input and output period. All the designs are in the nanometric scales.
An Approach to Simplify Reversible Logic Circuits
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Pabitra Roy
2012-09-01
Full Text Available Energy loss is one of the major problems in traditional irreversible circuits. For every bit of information loss kTln2 joules of heat is lost. In order to reduce the energy loss the concept of reversible logic circuits are introduced. Here we have described an algorithm for simplifying the reversible logic circuit and hence reduction of circuit cost and energy. The algorithm considers sub_circuit with respect to their number of lines and contiguous gates. The resulting sub_circuits are re-synthesized with smaller equivalent implementation. The process continues until circuit cost reaches good enough for Application or until a given computation budget has been exhausted. The circuit is constructed by NOT, CNOT and Toffoli gates only. By applying the algorithm and using the equivalent implementation we will get significant reduction of circuit cost and hence energy.
Efficient Synthesis of Linear Reversible Circuits
Patel, K N; Hayes, J P
2003-01-01
In this paper we consider circuit synthesis for n-wire linear reversible circuits using the C-NOT gate library. These circuits are an important class of reversible circuits with applications to quantum computation. Previous algorithms, based on Gaussian elimination and LU-decomposition, yield circuits with O(n^2) gates in the worst-case. However, an information theoretic bound suggests that it may be possible to reduce this to as few as O(n^2/log n) gates. We present an algorithm that is optimal up to a multiplicative constant, as well as Theta(log n) times faster than previous methods. While our results are primarily asymptotic, simulation results show that even for relatively small n our algorithm is faster and yields more efficient circuits than the standard method. Generically our algorithm can be interpreted as a matrix decomposition algorithm, yielding an asymptotically efficient decomposition of a binary matrix into a product of elementary matrices.
Transistor Level Implementation of Digital Reversible Circuits
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K.Prudhvi Raj
2015-12-01
Full Text Available Now a days each and every electronic gadget is desi gning smartly and provides number of applications, so these designs dissipate high amount of power. Rever sible logic is becoming one of the best emerging de sign technologies having its applications in low power C MOS, Quantum computing and Nanotechnology. Reversible logic plays an important role in the des ign of energy efficient circuits. Adders and subtra ctors are the essential blocks of the computing systems. In this paper, reversible gates and circuits are de signed and implemented in CMOS and pass transistor logic u sing Mentor graphics backend tools. A four-bit ripp le carry adder/subtractor and an eight-bit reversible Carry Skip Adder are implemented and compared with the conventional circuits
Reversible and quantum circuits optimization and complexity analysis
Abdessaied, Nabila
2016-01-01
This book presents a new optimization flow for quantum circuits realization. At the reversible level, optimization algorithms are presented to reduce the quantum cost. Then, new mapping approaches to decompose reversible circuits to quantum circuits using different quantum libraries are described. Finally, optimization techniques to reduce the quantum cost or the delay are applied to the resulting quantum circuits. Furthermore, this book studies the complexity of reversible circuits and quantum circuits from a theoretical perspective.
Design of Reversible Sequential Circuit Using Reversible Logic Synthesis
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Md. Mosharof Hossin
2012-01-01
Full Text Available Reversible logic is one of the most vital issue at present time and it has different areas for its application, those are low power CMOS, quantum computing, nanotechnology, cryptography, optical computing, DNA computing, digital signal processing (DSP, quantum dot cellular automata, communication, computer graphics. It is not possible to realize quantum computing without implementation of reversible logic. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. In this paper, we have proposed a new reversible gate. And we have designedRS flip flop and D flip flop by using our proposed gate and Peres gate. The proposed designs are better than the existing proposed ones in terms of number of reversible gates and garbage outputs. So, this realization is more efficient and less costly than other realizations.
Design of Reversible Sequential Circuit Using Reversible Logic Synthesis
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Md. Belayet Ali
2011-12-01
Full Text Available Reversible logic is one of the most vital issue at present time and it has different areas for its application,those are low power CMOS, quantum computing, nanotechnology, cryptography, optical computing, DNA computing, digital signal processing (DSP, quantum dot cellular auto meta, communication, computer graphics. It is not possible to realize quantum computing without implementation of reversible logic. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. In this paper, we have proposed a new reversible gate. And we have designed RS flip flop and D flip flop by using our proposed gate and Peres gate. The proposed designs are better than the existing proposed ones in terms of number of reversible gates and garbage outputs. So, this realization is more efficient and less costly than other realizations.
Curtis, Fred
2001-01-01
Existing planar map encodings neglect maps with loops. The presented scheme encodes any connected planar map in 4 bits/edge. Encoding and decoding time is O(edges). Implicit face/edge/vertex orderings and canonical encodings are discussed.
A beginning in the reversible logic synthesis of sequential circuits
Thapliyal, Himanshu; Srinivas, M. B; Zwolinski, Mark
2005-01-01
This paper provides the initial threshold to building of more complex system having reversible sequential circuits as a primitive component and which can execute more complicated operations using quantum computers. The reversible circuits form the basic building block of quantum computers as all quantum operations are reversible. The important reversible gates used for reversible logic synthesis are Feynman Gate, New Gate and Fredkin gate. The novelty of the paper is the reversible designs of...
Design of the Efficient Nanometric Reversible Subtractor Circuit
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Mozhgan Shiri
2012-11-01
Full Text Available Reversible logic has comprehensive applications in communications, quantum computing, low power VLSI design, computer graphics, cryptography, nanotechnology, and optical computing. It has received significant attention in low power dissipating circuit design in the past few years. While several researchers have inspected the design of reversible logic units, there is not much reported works on reversible subtractors. In this paper we proposed the quantum equivalent circuit for SRK gate and we have computed the quantum cost of SRK gate. We also showed that how SRK gate can work singly as a half-subtractor circuit. It is being tried to design the circuit optimal in terms of number of reversible gates, number of garbage outputs, number of constant inputs, and quantum cost with compared to the existing circuits. At last we proposed an implementation of the new full-subtractor circuit based on SRK gate. All the designs have nanometric scales.
A Novel Nanometric Fault Tolerant Reversible Subtractor Circuit
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Mozhgan Shiri
2012-11-01
Full Text Available Reversibility plays an important role when energy efficient computations are considered. Reversible logic circuits have received significant attention in quantum computing, low power CMOS design, optical information processing and nanotechnology in the recent years. This study proposes a new fault tolerant reversible half-subtractor and a new fault tolerant reversible full-subtractor circuit with nanometric scales. Also in this paper we demonstrate how the well-known and important, PERES gate and TR gate can be synthesized from parity preserving reversible gates. All the designs have nanometric scales.
Decting Errors in Reversible Circuits With Invariant Relationships
Alves, Nuno
2008-01-01
Reversible logic is experience renewed interest as we are approach the limits of CMOS technologies. While physical implementations of reversible gates have yet to materialize, it is safe to assume that they will rely on faulty individual components. In this work we present a present a method to provide fault tolerance to a reversible circuit based on invariant relationships.
Exploring Quantum Dot Cellular Automata Based Reversible Circuit
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Saroj Kumar Chandra
2012-03-01
Full Text Available Quantum-dot Cellular Automata (QCA is a new technology for development of logic circuits based on nanotechnology, and it is an one of the alternative for designing high performance computing over existing CMOS technology. The basic logic in QCA does not use voltage level for logic representation rather it represent binary state by polarization of electrons on the Quantum Cell which is basic building block of QCA. Extensive work is going on QCA for circuit design due to low power consumption and regularity in the circuit.. Clocking is used in QCA circuit to synchronize and control the information flow and to provide the power to run the circuit. Reversible logic design is a well-known paradigm in digital computation, and if circuit developed is reversible then it consumes very low power . Here, in this paper we are presenting a Reversible Universal Gate (RUG based on Quantum-dot Cellular Automata (QCA. The RUG implemented by QCA Designer tool and also its behavior is simulated by it.
The decomposition of an arbitrary reversible logic circuit
DeVos, Alexis; Van Rentergem, Yvan; DeKeyser, Koen
2006-05-01
The (2w)! reversible logic circuits of width w, i.e. reversible logic circuits with w inputs and w outputs, together with the action of cascading, form a group G, isomorphic to the symmetric group {\\bf S}_{2^w} . We define two conjugate subgroups G1 and G2. Together they partition the group G into 2w-1 + 1 double cosets. These allow us to decompose an arbitrary member of G into a cascade of three simpler members. This decomposition is a far relative of the well-known LU decomposition of a square matrix.
The decomposition of an arbitrary reversible logic circuit
International Nuclear Information System (INIS)
The (2w)! reversible logic circuits of width w, i.e. reversible logic circuits with w inputs and w outputs, together with the action of cascading, form a group G, isomorphic to the symmetric group S2w. We define two conjugate subgroups G1 and G2. Together they partition the group G into 2w-1 + 1 double cosets. These allow us to decompose an arbitrary member of G into a cascade of three simpler members. This decomposition is a far relative of the well-known LU decomposition of a square matrix
Upper bounds for reversible circuits based on Young subgroups
DEFF Research Database (Denmark)
Abdessaied, Nabila; Soeken, Mathias; Thomsen, Michael Kirkedal; Drechsler, Rolf
2014-01-01
We present tighter upper bounds on the number of Toffoli gates needed in reversible circuits. Both multiple controlled Toffoli gates and mixed polarity Toffoli gates have been considered for this purpose. The calculation of the bounds is based on a synthesis approach based on Young subgroups that...
49 CFR 234.237 - Reverse switch cut-out circuit.
2010-10-01
... 49 Transportation 4 2010-10-01 2010-10-01 false Reverse switch cut-out circuit. 234.237 Section... Maintenance, Inspection, and Testing Maintenance Standards § 234.237 Reverse switch cut-out circuit. A switch, when equipped with a switch circuit controller connected to the point and interconnected with...
Implementation of Optimized Reversible Sequential and Combinational Circuits for VLSI Applications
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P. Mohan Krishna
2014-04-01
Full Text Available Reversible logic has emerged as one of the most important approaches for the power optimization with its application in low power VLSI design. They are also the fundamental requirement for the emerging field of the Quantum computing having with applications in the domains like Nano-technology, Digital signal processing, Cryptography, Communications. Implementing the reversible logic has the advantages of reducing gate counts, garbage outputs as well as constant inputs. In this project we present sequential and combinational circuit with reversible logic gates which are simulated in Xilinx ISE and by writing the code in VHDL . we have proposed a new design technique of BCD Adder using newly constructed reversible gates are based on CMOS with pass transistor gates . Here the total reversible Adder is designed using EDA tools. We will analyze the VLSI limitations like power consumption and area of designed circuits.
VLSI Design of Low Power High Speed 4 Bit Resolution Pipeline ADC In Submicron CMOS Technology
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Rita M. Shende
2012-01-01
Full Text Available Analog-to-digital converters (ADCs are key design blocks and are currently adopted in many application fields to improve digital systems, which achieve superior performances with respect to analog solutions. Application such as wireless communication and digital audio and video have created the need for costeffective data converters that will achieve higher speed and resolution. Widespread usage confers great importance to the design activities, which nowadays largely contributes to the production cost in integrated circuit devices (ICs. Various examples of ADC applications can be found in data acquisition systems, measurement systems and digital communication systems also imaging, instrumentation systems. Since theADC has a continuous, infinite –valued signal as its input, the important analog points on the transfer curve x-axis for an ADC are the ones that corresponding to changes in the digital output word. These input transitions determine the amount of INL and DNL associated with the converter. Hence, we have to considered all the parameters and improving the associated performance may significantly reduce the industrial cost of an ADC manufacturing process and improved the resolution and design specially powerconsumption . The paper presents a design of 4 bit Pipeline ADC with low power dissipation implemented in <0.18µm.
Optimized Multiplier Using Reversible Multicontrol Input Toffoli Gates
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H R Bhagyalakshmi
2013-01-01
Full Text Available Reversible logic is an important area to carry the computation into the world of quantum computing. In thispaper a 4-bit multiplier using a new reversible logic gate called BVPPG gate is presented. BVPPG gate isa 5 x 5 reversible gate which is designed to generate partial products required to perform multiplicationand also duplication of operand bits is obtained. This reduces the total cost of the circuit. Toffoli gate isthe universal and also most flexible reversible logic gate. So we have used the Toffoli gates to construct thedesigned multiplier.
Variable Block Carry Skip Logic using Reversible Gates
Islam, Md Rafiqul; Karim, Muhammad Rezaul; Mahmud, Abdullah Al; Babu, Hafiz Md Hasan
2010-01-01
Reversible circuits have applications in digital signal processing, computer graphics, quantum computation and cryptography. In this paper, a generalized k*k reversible gate family is proposed and a 3*3 gate of the family is discussed. Inverter, AND, OR, NAND, NOR, and EXOR gates can be realized by this gate. Implementation of a full-adder circuit using two such 3*3 gates is given. This full-adder circuit contains only two reversible gates and produces no extra garbage outputs. The proposed full-adder circuit is efficient in terms of gate count, garbage outputs and quantum cost. A 4-bit carry skip adder is designed using this full-adder circuit and a variable block carry skip adder is discussed. Necessary equations required to evaluate these adder are presented.
International Nuclear Information System (INIS)
One generalized the results of investigation into the reverse-connected dynistors (RCD) designed for pulsed and conversion equipment high-power facilities. Paper describes the basic design principles for high-power RCD-switches and the base circuits of pulsed and high-frequency facilities based on RCD. Paper contains the results of tests of high-voltage microsecond and submicrosecond RCD-generators with 108-1010 W pulse intensity and of high-frequency RCD-inverters with 104-105 W average intensity
Deeprose Subedi; Eugene John
2012-01-01
In this paper, we performed the comparative analysis of stand-by leakage (when the circuit is idle), delay and dynamic power (when the circuit switches) of the three different parallel digital multiplier circuits implemented with two adder modules and Self Adjustable Voltage level circuit (SVL). The adder modules chosen were 28 transistor-conventional CMOS adder and 10 transistor- Static Energy Recovery CMOS adder (SERF) circuits. The multiplier modules chosen were 4Bits Array, 4 bits Carry S...
Tsenes, Petros; Uzunoglu, Nikolaos
2003-01-01
Based on a conventional flash architecture a 4-bit GaAs analog to digital (A/D) converter has been designed using OMMIC-Philips GaAs foundry and particularly its commercial enhancement/depletion mode 0.18 µm pHEMT technology process. The ADC operates at 7.5 GHz sampling rate with full power analog input bandwidth from DC to Nyquist frequency. Differential source coupled FET logic (SCFL) was used and the complexity of the whole chip is more than 1900 active devices. The converter can be used i...
Low-power 4-bit flash analogue to digital converter for ranging applications
Torfs, Guy; Li, Zhisheng; Bauwelinck, Johan; Yin, Xin; Plas, G. Van Der; Vandewege, Jan
2011-01-01
A 4-bit 700 MS/s flash ADC is presented in 0.18 mu m CMOS. By lowering the kickback noise of the individual comparators it was possible to reduce the power consumption to 4.43 mW. Improved calibration capabilities resulted in an INL and DNL smaller than 0.25 LSB. These low nonlinearities give rise to 3.77 effective number of bits at the Nyquist input frequency and this in turn yields an overall figure of merit of 0.46 pJ per conversion step, the lowest figure of merit reported for ADCs with s...
Directory of Open Access Journals (Sweden)
Shih-Yu Li
2013-01-01
Full Text Available We expose the chaotic attractors of time-reversed nonlinear system, further implement its behavior on electronic circuit, and apply the pragmatical asymptotically stability theory to strictly prove that the adaptive synchronization of given master and slave systems with uncertain parameters can be achieved. In this paper, the variety chaotic motions of time-reversed Lorentz system are investigated through Lyapunov exponents, phase portraits, and bifurcation diagrams. For further applying the complex signal in secure communication and file encryption, we construct the circuit to show the similar chaotic signal of time-reversed Lorentz system. In addition, pragmatical asymptotically stability theorem and an assumption of equal probability for ergodic initial conditions (Ge et al., 1999, Ge and Yu, 2000, and Matsushima, 1972 are proposed to strictly prove that adaptive control can be accomplished successfully. The current scheme of adaptive control—by traditional Lyapunov stability theorem and Barbalat lemma, which are used to prove the error vector—approaches zero, as time approaches infinity. However, the core question—why the estimated or given parameters also approach to the uncertain parameters—remains without answer. By the new stability theory, those estimated parameters can be proved approaching the uncertain values strictly, and the simulation results are shown in this paper.
All-optical design for inherently energy-conserving reversible gates and circuits.
Cohen, Eyal; Dolev, Shlomi; Rosenblit, Michael
2016-01-01
As energy efficiency becomes a paramount issue in this day and age, reversible computing may serve as a critical step towards energy conservation in information technology. The inputs of reversible computing elements define the outputs and vice versa. Some reversible gates such as the Fredkin gate are also universal; that is, they may be used to produce any logic operation. It is possible to find physical representations for the information, so that when processed with reversible logic, the energy of the output is equal to the energy of the input. It is suggested that there may be devices that will do that without applying any additional power. Here, we present a formalism that may be used to produce any reversible logic gate. We implement this method over an optical design of the Fredkin gate, which utilizes only optical elements that inherently conserve energy. PMID:27113510
All-optical design for inherently energy-conserving reversible gates and circuits
Cohen, Eyal; Dolev, Shlomi; Rosenblit, Michael
2016-04-01
As energy efficiency becomes a paramount issue in this day and age, reversible computing may serve as a critical step towards energy conservation in information technology. The inputs of reversible computing elements define the outputs and vice versa. Some reversible gates such as the Fredkin gate are also universal; that is, they may be used to produce any logic operation. It is possible to find physical representations for the information, so that when processed with reversible logic, the energy of the output is equal to the energy of the input. It is suggested that there may be devices that will do that without applying any additional power. Here, we present a formalism that may be used to produce any reversible logic gate. We implement this method over an optical design of the Fredkin gate, which utilizes only optical elements that inherently conserve energy.
GPU Kernels for High-Speed 4-Bit Astrophysical Data Processing
Klages, Peter; Denman, Nolan; Recnik, Andre; Sievers, Jonathan; Vanderlinde, Keith
2015-01-01
Interferometric radio telescopes often rely on computationally expensive O(N^2) correlation calculations; fortunately these computations map well to massively parallel accelerators such as low-cost GPUs. This paper describes the OpenCL kernels developed for the GPU based X-engine of a new hybrid FX correlator. Channelized data from the F-engine is supplied to the GPUs as 4-bit, offset-encoded real and imaginary integers. Because of the low bit width of the data, two values may be packed into a 32-bit register, allowing multiplication and addition of more than one value with a single fused multiply-add instruction. With this data and calculation packing scheme, as many as 5.6 effective tera-operations per second (TOPS) can be executed on a 4.3 TOPS GPU. The kernel design allows correlations to scale to large numbers of input elements, limited only by maximum buffer sizes on the GPU. This code is currently working on-sky with the CHIME Pathfinder Correlator in BC, Canada.
Dahoumane, M; Bouvier, J; Lagorio, E; Hostachy, J Y; Gallin-Martel, L; Hostachy, J Y; Rossetto, O; Hu, Y; Ghazlane, H; Dallet, D
2007-01-01
A 4 bit very low power and low incoming signal analog to digital converter (ADC) using a double sampling switched capacitor technique, designed for use in CMOS monolithic active pixels sensor readout, has been implemented in 0.35μm CMOS technology. A non-resetting sample and hold stage is integrated to amplify the incoming signal by 4. This first stage compensates both the amplifier offset effect and the input common mode voltage fluctuations. The converter is composed of a 2.5 bit pipeline stage followed by a 2 bit flash stage. This prototype consists of 4 ADC double-channels; each one is sampling at 50MS/s and dissipates only 2.6mW at 3.3V supply voltage. A bias pulsing stage is integrated in the circuit. Therefore, the analog part is switched OFF or ON in less than 1μs. The size for the layout is 80μm*0.9mm. This corresponds to the pitch of 4 pixel columns, each one is 20μm wide.
International Nuclear Information System (INIS)
A 4 bit very low power and low incoming signal analog to digital converter (ADC) using a double sampling switched capacitor technique, designed for use in CMOS monolithic active pixels sensor readout, has been implemented in 0.35μm CMOS technology. A non-resetting sample and hold stage is integrated to amplify the incoming signal by 4. This first stage compensates both the amplifier offset effect and the input common mode voltage fluctuations. The converter is composed of a 2.5 bit pipeline stage followed by a 2 bit flash stage. This prototype consists of 4 ADC double-channels; each one is sampling at 50MS/s and dissipates only 2.6mW at 3.3V supply voltage. A bias pulsing stage is integrated in the circuit. Therefore, the analog part is switched OFF or ON in less than 1μs. The size for the layout is 80μm*0.9mm. This corresponds to the pitch of 4 pixel columns, each one is 20μm wide
Tavousi, Alireza; Mansouri-Birjandi, Mohammad Ali; Saffari, Mehdi
2016-09-01
Implementing of photonic sampling and quantizing analog-to-digital converters (ADCs) enable us to extract a single binary word from optical signals without need for extra electronic assisting parts. This would enormously increase the sampling and quantizing time as well as decreasing the consumed power. To this end, based on the concept of successive approximation method, a 4-bit full-optical ADC that operates using the intensity-dependent Kerr-like nonlinearity in a two dimensional photonic crystal (2DPhC) platform is proposed. The Silicon (Si) nanocrystal is chosen because of the suitable nonlinear material characteristic. An optical limiter is used for the clamping and quantization of each successive levels that represent the ADC bits. In the proposal, an energy efficient optical ADC circuit is implemented by controlling the system parameters such as ring-to-waveguide coupling coefficients, the ring's nonlinear refractive index, and the ring's length. The performance of the ADC structure is verified by the simulation using finite difference time domain (FDTD) method.
International Nuclear Information System (INIS)
Highlights: ► We experimental study the defrosting performance on a multi-circuit outdoor coil unit in an ASHP unit. ► We find that defrosting is quicker on the airside of upper circuits than that on the lower circuits. ► We discuss the effects of downwards flowing of the melted frost along the outdoor coil surface on defrosting performance. -- Abstract: When an air source heat pump (ASHP) unit operates in heating mode, frost can be accumulated on the surface of its finned outdoor coil which normally has multiple parallel circuits on its refrigerant side for minimized refrigerant pressure loss and enhanced heat transfer efficiency. On its airside, however, there is usually no segmentation corresponding to the number of refrigerant circuit. Frosting deteriorates the operation and energy efficiency of the ASHP unit and periodic defrosting becomes necessary. Currently the most widely used standard defrosting method for ASHPs is reverse cycle defrost. This paper, the first part of a two-part series, reports on the experimental part of a study of the reverse cycle defrosting performance on a multi-circuit outdoor coil unit in an experimental 6.5 kW heating capacity residential ASHP unit. Firstly the experimental ASHP unit is described and experimental procedures detailed. Secondly, the experimental results are reported. This is followed by the discussion on the effects of downwards flowing of the melted frost along a multi-circuit outdoor coil surface on defrosting performance. Finally, the evaluation of the defrosting efficiency for the experimental ASHP unit is provided. In the second part of the series, a modeling analysis on the effects of downwards flowing of the melted frost along the multi-circuit outdoor coil surface on defrosting performance of the experimental ASHP unit will be presented.
Power and area efficient 4-bit column-level ADC in a CMOS pixel sensor for the ILD vertex detector
Zhang, L.; Morel, F.; Hu-Guo, Ch; Hu, Y.
2013-01-01
A 48 × 64 pixels prototype CMOS pixel sensor (CPS) integrated with 4-bit column-level, self triggered ADCs for the outer layers of the ILD vertex detector (VTX) was developed and fabricated in a 0.35 μm CMOS process with a pixel pitch of 35 μm. The pixel concept combines in-pixel amplification with a correlated double sampling (CDS) operation. The ADCs accommodating the pixel read out in a rolling shutter mode complete the conversion by performing a multi-bit/step approximation. The design was optimised for power saving at sampling frequency. The prototype sensor is currently at the stage of being started testing and evaluation. So what is described is based on post simulation results rather than test data. This 4-bit ADC dissipates, at a 3-V supply and 6.25-MS/s sampling rate, 486 μW in its inactive mode, which is by far the most frequent. This value rises to 714 μW in case of the active mode. Its footprint amounts to 35 × 545 μm2.
Power and area efficient 4-bit column-level ADC in a CMOS pixel sensor for the ILD vertex detector
International Nuclear Information System (INIS)
A 48 × 64 pixels prototype CMOS pixel sensor (CPS) integrated with 4-bit column-level, self triggered ADCs for the outer layers of the ILD vertex detector (VTX) was developed and fabricated in a 0.35 μm CMOS process with a pixel pitch of 35 μm. The pixel concept combines in-pixel amplification with a correlated double sampling (CDS) operation. The ADCs accommodating the pixel read out in a rolling shutter mode complete the conversion by performing a multi-bit/step approximation. The design was optimised for power saving at sampling frequency. The prototype sensor is currently at the stage of being started testing and evaluation. So what is described is based on post simulation results rather than test data. This 4-bit ADC dissipates, at a 3-V supply and 6.25-MS/s sampling rate, 486 μW in its inactive mode, which is by far the most frequent. This value rises to 714 μW in case of the active mode. Its footprint amounts to 35 × 545 μm2.
Directory of Open Access Journals (Sweden)
Deeprose Subedi
2012-10-01
Full Text Available In this paper, we performed the comparative analysis of stand-by leakage (when the circuit is idle, delay and dynamic power (when the circuit switches of the three different parallel digital multiplier circuits implemented with two adder modules and Self Adjustable Voltage level circuit (SVL. The adder modules chosen were 28 transistor-conventional CMOS adder and 10 transistor- Static Energy Recovery CMOS adder (SERF circuits. The multiplier modules chosen were 4Bits Array, 4 bits Carry Save and 4 Bits Baugh Wooley multipliers. At first, the circuits were simulated with adder modules without applying the SVL circuit. And secondly, SVL circuit was incorporated in the adder modules for simulation. In all the multiplier architectures chosen, less standby leakage power was observed being consumed by the SERF adder based multipliers applied with SVL circuit. The stand-by leakage power dissipation is 1.16µwatts in Bits array multiplier with SERF Adder applied with SVL vs. 1.39µwatts in the same multiplier with CMOS28T Adder applied with SVL circuit. It is 1.16µwatts in Carry Save multiplier with SERF Adder applied with SVL vs. 1.4µwatts in the same multiplier with CMOS 28T Adder applied with SVL circuit. It is 1.67µwatts in Baugh Wooley multiplier with SERF Adder applied with SVl circuit vs. 2.74µwatts in the same multiplier with CMOS 28T Adder applied with SVL circuit.
Directory of Open Access Journals (Sweden)
Deeprose Subedi
2012-11-01
Full Text Available In this paper, we performed the comparative analysis of stand-by leakage (when the circuit is idle, delay and dynamic power (when the circuit switches of the three different parallel digital multiplier circuits implemented with two adder modules and Self Adjustable Voltage level circuit (SVL. The adder modules chosen were 28 transistor-conventional CMOS adder and 10 transistor- Static Energy Recovery CMOS adder (SERF circuits. The multiplier modules chosen were 4Bits Array, 4bits Carry Save and 4Bits Baugh Wooley multipliers. At first, the circuits were simulated with adder modules without applying the SVL circuit. And secondly, SVL circuit was incorporated in the adder modules for simulation. In all the multiplier architectures chosen, less standby leakage power was observed being consumed by the SERF adder based multipliers applied with SVL circuit. The stand-by leakage power dissipation is 1.16µwatts in Bits array multiplier with SERF Adder applied with SVL vs. 1.39µwatts in the same multiplier with CMOS28T Adder applied with SVL circuit. It is 1.16µwatts in Carry Save multiplier with SERF Adder applied with SVL vs. 1.4µwatts in the same multiplier with CMOS 28T Adder applied with SVL circuit. It is 1.67µwatts in Baugh Wooley multiplier with SERF Adder applied with SVl circuit vs. 2.74µwatts in the same multiplier with CMOS 28T Adder applied with SVL circuit.
Moustafa, Ahmed; Younes, Ahmed; Hassan, Yasser F.
2015-01-01
Quantum-dot cellular automata (QCA) are nanoscale digital logic constructs that use electrons in arrays of quantum dots to carry out binary operations. In this paper, a basic building block for QCA will be proposed. The proposed basic building block can be customized to implement classical gates, such as XOR and XNOR gates, and reversible gates, such as CNOT and Toffoli gates, with less cell count and/or better latency than other proposed designs. PMID:26345412
A Novel Nanometric Reversible Signed Divider with Overflow Checking Capability
Faraz Dastan; Majid Haghparast
2012-01-01
One of the best approaches for designing future computers is that we use reversible logic. Reversible logic circuits have lower power consumption than the common circuits, used in computers nowadays. In this study we propose a new reversible division circuit. This reversible division circuit is signed divider and has an overflow checking capability. Among the designed and proposed reversible division circuits, our proposed division circuit is the first reversible signed divider with overflow ...
Otfinowski, Piotr; Grybos, Pawel
2015-11-01
We report on the design of a 4-bit flash ADC with dynamic offset correction dedicated to measurement systems based on a pixel architecture. The presented converter was manufactured in two CMOS technologies: widespread and economical 180 nm and modern 40 nm process. The designs are optimized for the lowest area occupancy resulting in chip areas of 160×55 μm2 and 35×25 μm2. The experimental results indicate integral nonlinearity of +0.35/-0.21 LSB and +0.28/-0.25 LSB and power consumption of 52 μW and 17 μW at 5 MS/s for the prototypes in 180 nm and 40 nm technologies respectively.
Strong, G.H.; Faught, M.L.
1963-12-24
A device for safety rod counting in a nuclear reactor is described. A Wheatstone bridge circuit is adapted to prevent de-energizing the hopper coils of a ball backup system if safety rods, sufficient in total control effect, properly enter the reactor core to effect shut down. A plurality of resistances form one arm of the bridge, each resistance being associated with a particular safety rod and weighted in value according to the control effect of the particular safety rod. Switching means are used to switch each of the resistances in and out of the bridge circuit responsive to the presence of a particular safety rod in its effective position in the reactor core and responsive to the attainment of a predetermined velocity by a particular safety rod enroute to its effective position. The bridge is unbalanced in one direction during normal reactor operation prior to the generation of a scram signal and the switching means and resistances are adapted to unbalance the bridge in the opposite direction if the safety rods produce a predetermined amount of control effect in response to the scram signal. The bridge unbalance reversal is then utilized to prevent the actuation of the ball backup system, or, conversely, a failure of the safety rods to produce the predetermined effect produces no unbalance reversal and the ball backup system is actuated. (AEC)
Institute of Scientific and Technical Information of China (English)
Zhao Yi; Wang Shenjie; Qin Yajie; Hong Zhiliang
2011-01-01
A sub-sampling 4-bit 1.056-GS/s flash ADC with a novel track and hold amplifier (THA) in 0.13 μm CMOS for an impulse radio ultra-wideband (IR-UWB) receiver is presented.The challenge is in implementing a sub-sampling ADC with ultra-high input signal that further exceeds the Nyquist frequency.This paper presents,to our knowledge for the second time,a sub-sampling ADC with input signals above 4 GHz operating at a sampling rate of 1.056 GHz.In this design,a novel THA is proposed to solve the degradation in amplitude and improve the linearity of signal with frequency increasing to giga Hz.A resistive averaging technique is carefully analyzed to relieve noise aliasing.A low-offset latch using a zero-static power dynamic offset cancellation technique is further optimized to realize the requirements of speed,power consumption and noise aliasing.The measurement results reveal that the spurious free dynamic range of the ADC is 30.1 dB even if the input signal is 4.2 GHz sampled at 1.056 GS/s.The core power of the ADC is 30 mW,excluding all of the buffers,and the active area is 0.6 mm2.The ADC achieves a figure of merit of 3.75 p J/conversion-step.
Design of High speed Low Power Reversible Vedic multiplier and Reversible Divider
Srikanth G Department of Electronics & Communication Engineerig, Indur Institute of Engineering & Technology, Siddipet, Medak, JNTUH University, Telangana, India.; Nasam Sai Kumar
2014-01-01
This paper bring out a 32X32 bit reversible Vedic multiplier using "Urdhva Tiryakabhayam" sutra meaning vertical and crosswise, is designed using reversible logic gates, which is the first of its kind. Also in this paper we propose a new reversible unsigned division circuit. This circuit is designed using reversible components like reversible parallel adder, reversible left-shift register, reversible multiplexer, reversible n-bit register with parallel load line. The reversibl...
Spry, David J.; Neudeck, Philip G.; Chen, Liangyu; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.; Krasowski, Michael J.; Prokop, Norman F.
2015-01-01
Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype IC's with two levels of metal interconnect capable of prolonged operation at 500 C. Packaged functional circuits including 3- and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 C. A 3-stage oscillator functioned for over 3000 hours at 500 C in air ambient. Improved reproducibility remains to be accomplished.
A high speed, wide dynamic range digitizer circuit for photomultiplier tubes
International Nuclear Information System (INIS)
A circuit has been designed for digitizing PMT signals over a wide dynamic range (17-18 bits) with 8 bits of resolution at rates up to 53 MHz. Output from the circuit is in a floating point format with a 4 bit exponent and an 8 bit mantissa. The heart of the circuit is a full custom integrated circuit called the QIE (Charge Integrator and Encoder). The design of the QIE and associated circuitry reported here permits operation over a 17 bit dynamic range. Test results of a multirange device are presented for the first time. (orig.)
Graf, Rudolf F
1996-01-01
This series of circuits provides designers with a quick source for measuring circuits. Why waste time paging through huge encyclopedias when you can choose the topic you need and select any of the specialized circuits sorted by application?This book in the series has 250-300 practical, ready-to-use circuit designs, with schematics and brief explanations of circuit operation. The original source for each circuit is listed in an appendix, making it easy to obtain additional information.Ready-to-use circuits.Grouped by application for easy look-up.Circuit source listings
International Nuclear Information System (INIS)
This book is divided into fourteen chapters, which deals with circuit theory of basis, sinusoidal alternating current on cycle and frequency, basics current circuit about R.L, C circuit and resonant circuit, current power, general linear circuit, inductive coupling circuit and vector locus on an alternating current bridge and mutual inductance and coupling coefficient, multiphase alternating current and method of symmetrical coordinates, non-sinusoidal alternating current, two terminal network, four terminal network, transient of circuits, distributed line circuit constant, frequency characteristic and a filter and Laplace transformation.
Development of RSFQ Logic Circuits and Delay Time Considerations in Circuit Design
International Nuclear Information System (INIS)
Due to high speed operations and ultra low power consumptions RSFQ logic circuit is a very good candidate for future electronic device. The focus of the RSFQ circuit development has been on the advancement of analog-to-digital converters and microprocessors. Recent works on RSFQ ALU development showed the successful operation of an 1-bit block of ALU at 40 GHz. Recently, the study of an RSFQ analog-to-digital converter has been extended to the development of a single chip RF digital receiver. Compared to the voltage logic circuits, RSFQ circuits operate based on the pulse logic. This naturally leads the circuit structure of RSFQ circuit to be pipelined. Delay time on each pipelined stage determines the ultimate operating speed of the circuit. In simulations, a two junction Josephson transmission line's delay time was about 10 ps, a splitter's 14.5 ps, a switch's 13 ps, a half adder's 67 ps. Optimization of the 4-bit ALU circuit has been made with delay time consideration to operate comfortably at 10 GHz or above.
Fast Equivalence-checking for Quantum Circuits
Yamashita, Shigeru
2009-01-01
We perform formal verification of quantum circuits by integrating several techniques specialized to particular classes of circuits. Our verification methodology is based on the new notion of a reversible miter that allows one to leverage existing techniques for circuit simplification of quantum circuits. For reversible circuits which arise as runtime bottlenecks of key quantum algorithms, we develop several verification techniques and empirically compare them. We also combine existing quantum verification tools with the use of SAT-solvers. Experiments with circuits for Shor's number-factoring algorithm, containing thousands of gates, show improvements in efficiency by four orders of magnitude.
A Functional Language for Describing Reversible Logic
DEFF Research Database (Denmark)
Carøe, Michael Kirkedal
2012-01-01
. Reversibility of descriptions is guaranteed with a type system based on linear types. The language is applied to three examples of reversible computations (ALU, linear cosine transformation, and binary adder). The paper also outlines a design flow that ensures garbage- free translation to reversible logic......Reversible logic is a computational model where all gates are logically reversible and combined in circuits such that no values are lost or duplicated. This paper presents a novel functional language that is designed to describe only reversible logic circuits. The language includes high...... circuits. The flow relies on a reversible combinator language as an intermediate language....
Md. Selim Al Mamun; B. K. Karmaker
2014-01-01
This article presents a research work on the design and synthesis of sequential circuits and flip-flops that are available in digital arena; and describes a new synthesis design of reversible counter that is optimized in terms of quantum cost, delay and garbage outputs compared to the existing designs. We proposed a new model of reversible T flip-flop in designing reversible counter.
International Nuclear Information System (INIS)
Highlights: • A special experimental rig was built and its details are reported. • The negative effects of downwards flowing of the melted frost were shown. • Defrosting duration was shortened after installing water collecting trays. • Temperature of melted frost decreased after installing trays. - Abstract: When the surface temperature of the outdoor coil in an air source heat pump (ASHP) unit is lower than both freezing point of water and the air dew point, frost can be formed and accumulated over outdoor coil surface. Frosting affects the energy efficiency, and periodic defrosting therefore is necessary. Reverse cycle defrosting is currently the most widely used defrosting method. A previous related study has indicated that during reverse cycle defrosting, downwards flow of the melted frost over a multi-circuit outdoor coil could affect the defrosting performance, without however giving detailed quantitative analysis of the effects. Therefore an experimental study on the effects has been carried out and a quantitative analysis conducted using the experimental data. In this paper, the detailed description of an experimental ASHP unit which was specifically built up is firstly reported. This is followed by presenting experimental results. Result analysis and conclusions are finally given
Online Testable Decoder using Reversible Logic
Directory of Open Access Journals (Sweden)
Hemalatha. K. N. Manjula B. B. Girija. S
2012-02-01
Full Text Available The project proposes to design and test 2 to 4 reversible Decoder circuit with arbitrary number of gates to an online testable reversible one and is independent of the type of reversible gate used. The constructed circuit can detect any single bit errors and to convert a decoder circuit that is designed by reversible gates to an online testable reversible decoder circuit. Conventional digital circuits dissipate a significant amount of energy because bits of information are erased during the logic operations. Thus if logic gates are designed such that the information bits are not destroyed, the power consumption can be reduced. The information bits are not lost in case of a reversible computation. Reversible logic can be used to implement any Boolean logic function.
Design of a High Performance Reversible Multiplier
Directory of Open Access Journals (Sweden)
Md.Belayet Ali
2011-11-01
Full Text Available Reversible logic circuits are increasingly used in power minimization having applications such as low power CMOS design, optical information processing, DNA computing, bioinformatics, quantum computing and nanotechnology. The problem of minimizing the number of garbage outputs is an important issue in reversible logic design. In this paper we propose a new 44 universal reversible logic gate. The proposed reversible gate can be used to synthesize any given Boolean functions. The proposed reversible gate also can be used as a full adder circuit. In this paper we have used Peres gate and the proposed Modified HNG (MHNG gate to construct the reversible fault tolerant multiplier circuit. We show that the proposed 44 reversible multiplier circuit has lower hardware complexity and it is much better and optimized in terms of number of reversible gates and number of garbage outputs with compared to the existing counterparts.
Optimized Reversible Binary-Coded Decimal Adders
DEFF Research Database (Denmark)
Thomsen, Michael Kirkedal; Glück, Robert
2008-01-01
their design. The optimized 1-decimal BCD full-adder, a 13 × 13 reversible logic circuit, is faster, and has lower circuit cost and less garbage bits. It can be used to build a fast reversible m-decimal BCD full-adder that has a delay of only m + 17 low-power reversible CMOS gates. For a 32-decimal (128...... in reversible logic design by drastically reducing the number of garbage bits. Specialized designs benefit from support by reversible logic synthesis. All circuit components required for optimizing the original design could also be synthesized successfully by an implementation of an existing...
Basic Reversible Logic Gates and It’s Qca Implementation
Papiya Biswas; Namit Gupta
2014-01-01
Reversible logic has various applications in various field like in Nanotechnology, quantum computing, Low power CMOS, Optical computing and DNA computing, etc. Quantum computation is One of the most important applications of the reversible logic.Basically reversible circuits do not lose information & reversible computation is performed only when system comprises of reversible gates. The reversible logic is design,main purposes are - decrease quantum cost, depth of the circuits...
Technology of field reversed pinch
International Nuclear Information System (INIS)
This paper presents a review of field-reversed pinch technology. It covers the basic design requirements for various components involved in a field-reversed pinch device, such as circuit, switch, triggering system, transmission line, load assembly and power supply. Precautions against electric interferences are also mentioned
Analog Nonvolatile Computer Memory Circuits
MacLeod, Todd
2007-01-01
, between the positive and negative FFET saturation values. This signal value would represent a numerical value of interest corresponding to multiple bits: for example, if the memory circuit were designed to distinguish among 16 different analog values, then each cell could store 4 bits. Simultaneously with writing the signal value in the storage FFET, a negative saturation signal value would be stored in the control FFET. The decay of this control-FFET signal from the saturation value would serve as a model of the decay, for use in regenerating the numerical value of interest from its decaying analog signal value. The memory circuit would include addressing, reading, and writing circuitry that would have features in common with the corresponding parts of other memory circuits, but would also have several distinctive features. The writing circuitry would include a digital-to-analog converter (DAC); the reading circuitry would include an analog-to-digital converter (ADC). For writing a numerical value of interest in a given cell, that cell would be addressed, the saturation value would be written in the control FFET in that cell, and the non-saturation analog value representing the numerical value of interest would be generated by use of the DAC and stored in the storage FFET in that cell. For reading the numerical value of interest stored in a given cell, the cell would be addressed, the ADC would convert the decaying control and storage analog signal values to digital values, and an associated fast digital processing circuit would regenerate the numerical value from digital values.
DEFF Research Database (Denmark)
2010-01-01
A switch-mode power circuit comprises a controllable element and a control unit. The controllable element is configured to control a current in response to a control signal supplied to the controllable element. The control unit is connected to the controllable element and provides the control...
Design of High speed Low Power Reversible Vedic multiplier and Reversible Divider
Directory of Open Access Journals (Sweden)
Srikanth G Department of Electronics & Communication Engineerig, Indur Institute of Engineering & Technology, Siddipet, Medak, JNTUH University, Telangana, India.
2014-09-01
Full Text Available This paper bring out a 32X32 bit reversible Vedic multiplier using "Urdhva Tiryakabhayam" sutra meaning vertical and crosswise, is designed using reversible logic gates, which is the first of its kind. Also in this paper we propose a new reversible unsigned division circuit. This circuit is designed using reversible components like reversible parallel adder, reversible left-shift register, reversible multiplexer, reversible n-bit register with parallel load line. The reversible vedic multiplier and reversible divider modules have been written in Verilog HDL and then synthesized and simulated using Xilinx ISE 9.2i. This reversible vedic multiplier results shows less delay and less power consumption by comparing with array multiplier.
Rate Control for MPEG-4 Bit Stream
Institute of Scientific and Technical Information of China (English)
王振洲; 李桂苓
2003-01-01
For a very long time video processing dealt exclusively with fixed-rate sequences of rectangular shaped images. However, interest has been recently moving toward a more flexible concept in which the subject of the processing and encoding operations is a set of visual elements organized in both time and space in a flexible and arbitrarily complex way. The moving picture experts group (MPEG-4) standard supports this concept and its verification model (VM) encoder has adopted scalable rate control (SRC) as the rate control scheme, which is based on the spatial domain and compatible with constant bit rate (CBR) and variable bit rate (VBR). In this paper,a new rate control algorithm based on the DCT domain instead of the pixel domain is presented. More-over, macroblock level rate control scheme to compute the quantization step for each macroblock has been adopted. The experimental results show that the new algorithm can achieve a much better result than the original one in both peak signal-to-noise ratio (PSNR) and the coding bits, and that the new algorithm is more flexible than test model 5 (TM5) rate control algorithm.
Parallelization of Reversible Ripple-carry Adders
DEFF Research Database (Denmark)
Thomsen, Michael Kirkedal; Axelsen, Holger Bock
2009-01-01
The design of fast arithmetic logic circuits is an important research topic for reversible and quantum computing. A special challenge in this setting is the computation of standard arithmetical functions without the generation of \\emph{garbage}. Here, we present a novel parallelization scheme......{O}(m\\cdot k)$. The underlying mechanisms of the parallelization scheme are formally proven correct. We also show designs for garbage-less reversible comparison circuits. We compare the circuit costs of the resulting ripple-block carry adder with known optimized reversible ripple-carry adders in measures of...
International Nuclear Information System (INIS)
EDA technique is used for circuit simulation. The circuit simulation and the analysis are made for a gate circuit one-shot multivibrator. The result shows: EDA circuit simulation is very useful technique
Chen, Wai-Kai
2009-01-01
Featuring hundreds of illustrations and references, this book provides the information on analog and VLSI circuits. It focuses on analog integrated circuits, presenting the knowledge on monolithic device models, analog circuit cells, high performance analog circuits, RF communication circuits, and PLL circuits.
Dubuisson-Quellier, Sophie
2015-01-01
Si la notion de circuit court est aujourd’hui largement reprise par les médias comme un phénomène assez typique de la fin du 20ème siècle, il convient de considérer que la vente directe est aussi ancienne que l’agriculture elle-même. Au tournant des années 2000, elle est surtout devenu un moyen, pour ceux qui la promeuvent de souligner que les distances tant géographiques qu’organisationnelles entre ceux qui produisent et ceux qui consomment sont devenus trop longues et doivent être raccourci...
Fast magnetization reversal of nanoclusters in resonator
Yukalov, V. I.; Yukalova, E. P.
2012-01-01
An effective method for ultrafast magnetization reversal of nanoclusters is suggested. The method is based on coupling a nanocluster to a resonant electric circuit. This coupling causes the appearance of a magnetic feedback field acting on the cluster, which drastically shortens the magnetization reversal time. The influence of the resonator properties, nanocluster parameters, and external fields on the magnetization dynamics and reversal time is analyzed. The magnetization reversal time can ...
Basic Reversible Logic Gates and It’s Qca Implementation
Directory of Open Access Journals (Sweden)
Papiya Biswas,
2014-06-01
Full Text Available Reversible logic has various applications in various field like in Nanotechnology, quantum computing, Low power CMOS, Optical computing and DNA computing, etc. Quantum computation is One of the most important applications of the reversible logic.Basically reversible circuits do not lose information & reversible computation is performed only when system comprises of reversible gates. The reversible logic is design,main purposes are - decrease quantum cost, depth of the circuits & the number of garbage output. This paper provides the basic‘s of reversible logic gates & its implementation in qca.
Solid state circuit controls direction, speed, and braking of dc motor
Hanna, M. F.
1966-01-01
Full-wave bridge rectifier circuit controls the direction, speed, and braking of a dc motor. Gating in the circuit of Silicon Controlled Rectifiers /SCRS/ controls output polarity and braking is provided by an SCR that is gated to short circuit the reverse voltage generated by reversal of motor rotation.
Short- circuit tests of circuit breakers
Chorovský, P.
2015-01-01
This paper deals with short-circuit tests of low voltage electrical devices. In the first part of this paper, there are described basic types of short- circuit tests and their principles. Direct and indirect (synthetic) tests with more details are described in the second part. Each test and principles are explained separately. Oscilogram is obtained from short-circuit tests of circuit breakers at laboratory. The aim of this research work is to propose a test circuit for performing indirect test.
Collective of mechatronics circuit
International Nuclear Information System (INIS)
This book is composed of three parts, which deals with mechatronics system about sensor, circuit and motor. The contents of the first part are photo sensor of collector for output, locating detection circuit with photo interrupts, photo sensor circuit with CdS cell and lamp, interface circuit with logic and LED and temperature sensor circuit. The second part deals with oscillation circuit with crystal, C-R oscillation circuit, F-V converter, timer circuit, stability power circuit, DC amp and DC-DC converter. The last part is comprised of bridge server circuit, deformation bridge server, controlling circuit of DC motor, controlling circuit with IC for PLL and driver circuit of stepping motor and driver circuit of Brushless.
Analog circuit design designing dynamic circuit response
Feucht, Dennis
2010-01-01
This second volume, Designing Dynamic Circuit Response builds upon the first volume Designing Amplifier Circuits by extending coverage to include reactances and their time- and frequency-related behavioral consequences.
Photomultiplier blanking circuit
Mcclenahan, J. O.
1972-01-01
Circuit for protecting photomultiplier equipment from current surges which occur when exposed to brilliant illumination is discussed. Components of circuit and details of operation are provided. Circuit diagram to show action of blanking pulse on zener diode is included.
Analog circuit design designing waveform processing circuits
Feucht, Dennis
2010-01-01
The fourth volume in the set Designing Waveform-Processing Circuits builds on the previous 3 volumes and presents a variety of analog non-amplifier circuits, including voltage references, current sources, filters, hysteresis switches and oscilloscope trigger and sweep circuitry, function generation, absolute-value circuits, and peak detectors.
A high speed, wide dynamic range digitizer circuit for photomultiplier tubes
International Nuclear Information System (INIS)
High energy physics experiments running at high interaction rates frequently require long record lengths for determining a level 1 trigger. The easiest way to provide a long event record is by digital means. In applications requiring wide dynamic range, however, digitization of an analog signal to obtain the digital record has been impossible due to lack of high speed, wide range FADCs. One such application is the readout of thousands of photomultiplier tubes in fixed target and colliding beam experiment calorimeters. A circuit has been designed for digitizing PMT signals over a wide dynamic range (17--18 bits) with 8 bits of resolution at rates up to 53 MHz. Output from the circuit is in a floating point format with a 4 bit exponent and an 8 bit mantissa. The heart of the circuit is a full custom integrated circuit called the QIE (Charge Integrator and Encoder). The design of the QIE and associated circuitry reported here permits operation over a 17 bit dynamic range. Tests of the circuit with a PMT input and a pulsed laser have provided respectable results with little off line correction. Performance of the circuit for demanding applications can be significantly enhanced with additional off line correction. Circuit design, packaging issues, and test results of a multirange device are presented for the first time
Garbage-free reversible constant multipliers for arbitrary integers
DEFF Research Database (Denmark)
Mogensen, Torben Ægidius
2013-01-01
We present a method for constructing reversible circuitry for multiplying integers by arbitrary integer constants. The method is based on Mealy machines and gives circuits whose size are (in the worst case) linear in the size of the constant. This makes the method unsuitable for large constants, ......, but gives quite compact circuits for small constants. The circuits use no garbage or ancillary lines....
Low Cost Reversible Signed Comparator
Directory of Open Access Journals (Sweden)
Farah Sharmin
2013-10-01
Full Text Available Nowadays exponential advancement in reversible comp utation has lead to better fabrication and integration process. It has become very popular ove r the last few years since reversible logic circuit s dramatically reduce energy loss. It consumes less p ower by recovering bit loss from its unique input-o utput mapping. This paper presents two new gates called RC-I and RC-II to design an n-bit signed binary comparator where simulation results show that the p roposed circuit works correctly and gives significa ntly better performance than the existing counterparts. An algorithm has been presented in this paper for constructing an optimized reversible n-bit signed c omparator circuit. Moreover some lower bounds have been proposed on the quantum cost, the numbers of g ates used and the number of garbage outputs generated for designing a low cost reversible sign ed comparator. The comparative study shows that the proposed design exhibits superior performance consi dering all the efficiency parameters of reversible logic design which includes number of gates used, quantum cost, garbage output and constant inputs. This proposed design has certainly outperformed all the other existing approaches.
Reversible logic gates on Physarum Polycephalum
Energy Technology Data Exchange (ETDEWEB)
Schumann, Andrew [University of Information Technology and Management, Sucharskiego 2, Rzeszow, 35-225 (Poland)
2015-03-10
In this paper, we consider possibilities how to implement asynchronous sequential logic gates and quantum-style reversible logic gates on Physarum polycephalum motions. We show that in asynchronous sequential logic gates we can erase information because of uncertainty in the direction of plasmodium propagation. Therefore quantum-style reversible logic gates are more preferable for designing logic circuits on Physarum polycephalum.
Reversible logic gates on Physarum Polycephalum
International Nuclear Information System (INIS)
In this paper, we consider possibilities how to implement asynchronous sequential logic gates and quantum-style reversible logic gates on Physarum polycephalum motions. We show that in asynchronous sequential logic gates we can erase information because of uncertainty in the direction of plasmodium propagation. Therefore quantum-style reversible logic gates are more preferable for designing logic circuits on Physarum polycephalum
International Nuclear Information System (INIS)
This book gives descriptions of reverse engineering with principle and structure of it, including what reverse engineering is, prospect and concerned laws, basic knowledge for reverse engineering like manual and back to user mode, using tool such as IDA installation, dependency walker and dump bin, network monitoring and universal extractor. It indicates analysis of malignant code, giving explanations of file virus, spy ware, an infection way of malignant code, anti debugging like Find window.
Utility design of electronic circuit
International Nuclear Information System (INIS)
This is comprised of eleven chapters about electronic circuit design and utility circuit for electronics, which includes the point of design on electronic circuit like logical circuit, sensor circuit and power circuit, acoustic system, image system, communication system like FSK demodulation circuit, measurement and control system, appliance, operating amplifier, conversion device, counter and timer, sensor circuit, motor control such as DC motor control circuit and stepping motor drive circuit and power device like electric current control circuit.
Santiago, John
2013-01-01
Circuits overloaded from electric circuit analysis? Many universities require that students pursuing a degree in electrical or computer engineering take an Electric Circuit Analysis course to determine who will ""make the cut"" and continue in the degree program. Circuit Analysis For Dummies will help these students to better understand electric circuit analysis by presenting the information in an effective and straightforward manner. Circuit Analysis For Dummies gives you clear-cut information about the topics covered in an electric circuit analysis courses to help
Pridham, G J
2013-01-01
Solid-State Circuits provides an introduction to the theory and practice underlying solid-state circuits, laying particular emphasis on field effect transistors and integrated circuits. Topics range from construction and characteristics of semiconductor devices to rectification and power supplies, low-frequency amplifiers, sine- and square-wave oscillators, and high-frequency effects and circuits. Black-box equivalent circuits of bipolar transistors, physical equivalent circuits of bipolar transistors, and equivalent circuits of field effect transistors are also covered. This volume is divided
Reversible Logic to Cryptographic Hardware: A New Paradigm
Thapliyal, Himanshu; Zwolinski, Mark
2006-01-01
Differential Power Analysis (DPA) presents a major challenge to mathematically-secure cryptographic protocols. Attackers can break the encryption by measuring the energy consumed in the working digital circuit. To prevent this type of attack, this paper proposes the use of reversible logic for designing the ALU of a cryptosystem. Ideally, reversible circuits dissipate zero energy. Thus, it would be of great significance to apply reversible logic to designing secure cryptosystems. As far as is...
Directory of Open Access Journals (Sweden)
Xinjie eGuo
2015-12-01
Full Text Available The purpose of this work was to demonstrate the feasibility of building recurrent artificial neural networks with hybrid complementary metal oxide semiconductor (CMOS/memristor circuits. To do so, we modeled a Hopfield network implementing an analog-to-digital converter (ADC with up to 8 bits of precision. Major shortcomings affecting the ADC’s precision, such as the non-ideal behavior of CMOS circuitry and the specific limitations of memristors, were investigated and an effective solution was proposed, capitalizing on the in-field programmability of memristors. The theoretical work was validated experimentally by demonstrating the successful operation of a 4-bit ADC circuit implemented with discrete Pt/TiO2-x/Pt memristors and CMOS integrated circuit components.
Guo, Xinjie; Merrikh-Bayat, Farnood; Gao, Ligang; Hoskins, Brian D; Alibart, Fabien; Linares-Barranco, Bernabe; Theogarajan, Luke; Teuscher, Christof; Strukov, Dmitri B
2015-01-01
The purpose of this work was to demonstrate the feasibility of building recurrent artificial neural networks with hybrid complementary metal oxide semiconductor (CMOS)/memristor circuits. To do so, we modeled a Hopfield network implementing an analog-to-digital converter (ADC) with up to 8 bits of precision. Major shortcomings affecting the ADC's precision, such as the non-ideal behavior of CMOS circuitry and the specific limitations of memristors, were investigated and an effective solution was proposed, capitalizing on the in-field programmability of memristors. The theoretical work was validated experimentally by demonstrating the successful operation of a 4-bit ADC circuit implemented with discrete Pt/TiO2- x /Pt memristors and CMOS integrated circuit components. PMID:26732664
Readout integrated circuit for microbolometer with an analog non-uniformity correction
Hwang, C. H.; Woo, D. H.; Lee, Y. S.; Lee, H. C.
2005-10-01
We have developed a microbolometer readout integrated circuit (ROIC) that corrects the non-uniformity in analog operation and acts in both normal mode and edge detection mode. A capacitive transimpedance amplifier (CTIA) has been employed as the input circuit of the microbolometer. Generally, when fabricating microbolometer focal plane arrays (FPAs), offset-error and gain-error in the inter-microbolometer are induced by fabrication error. They are shown as fixed pattern noise (FPN) in the infrared image. In the present study, a circuit correcting the offset-error and the gain-error in the normal mode by controlling the bias and the integration capacitance of the CTIA is proposed. This circuit does not require an additional DSP chip, and the non-uniformity is corrected before the analog to digital conversion (ADC). Thus, it can utilize 3-4 bits lower ADC compared to the conventional readout circuit. In the edge detection mode, after correcting the gain-error in two adjacent pixels, edge detection can be realized by subtracting their signal without the DSP. We have designed the suggested circuit to output a 10bit level effective infrared signal using 0.35um 2-poly 3-metal CMOS technology.
Ionization tube simmer current circuit
Steinkraus, Jr., Robert F.
1994-01-01
A highly efficient flash lamp simmer current circuit utilizes a fifty percent duty cycle square wave pulse generator to pass a current over a current limiting inductor to a full wave rectifier. The DC output of the rectifier is then passed over a voltage smoothing capacitor through a reverse current blocking diode to a flash lamp tube to sustain ionization in the tube between discharges via a small simmer current. An alternate embodiment of the circuit combines the pulse generator and inductor in the form of an FET off line square wave generator with an impedance limited step up output transformer which is then applied to the full wave rectifier as before to yield a similar simmer current.
Thermal rectification in nonlinear quantum circuits
DEFF Research Database (Denmark)
Ruokola, T.; Ojanen, T.; Jauho, Antti-Pekka
2009-01-01
We present a theoretical study of radiative heat transport in nonlinear solid-state quantum circuits. We give a detailed account of heat rectification effects, i.e., the asymmetry of heat current with respect to a reversal of the thermal gradient, in a system consisting of two reservoirs at finite...
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Largey, Gale
1977-01-01
Notes that difficult questions arise concerning the use of sterilization for alleged eugenic and euthenic purposes. Thus, how reversible sterilization will be used with relation to the poor, mentally ill, mentally retarded, criminals, and minors, is questioned. (Author/AM)
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Electronic devices and circuits
Pridham, Gordon John
1972-01-01
Electronic Devices and Circuits, Volume 3 provides a comprehensive account on electronic devices and circuits and includes introductory network theory and physics. The physics of semiconductor devices is described, along with field effect transistors, small-signal equivalent circuits of bipolar transistors, and integrated circuits. Linear and non-linear circuits as well as logic circuits are also considered. This volume is comprised of 12 chapters and begins with an analysis of the use of Laplace transforms for analysis of filter networks, followed by a discussion on the physical properties of
The circuit designer's companion
Williams, Tim
2013-01-01
The Circuit Designer's Companion covers the theoretical aspects and practices in analogue and digital circuit design. Electronic circuit design involves designing a circuit that will fulfill its specified function and designing the same circuit so that every production model of it will fulfill its specified function, and no other undesired and unspecified function.This book is composed of nine chapters and starts with a review of the concept of grounding, wiring, and printed circuits. The subsequent chapters deal with the passive and active components of circuitry design. These topics are foll
Intuitive analog circuit design
Thompson, Marc
2013-01-01
Intuitive Analog Circuit Design outlines ways of thinking about analog circuits and systems that let you develop a feel for what a good, working analog circuit design should be. This book reflects author Marc Thompson's 30 years of experience designing analog and power electronics circuits and teaching graduate-level analog circuit design, and is the ideal reference for anyone who needs a straightforward introduction to the subject. In this book, Dr. Thompson describes intuitive and ""back-of-the-envelope"" techniques for designing and analyzing analog circuits, including transistor amplifi
Design of Digital Adder Using Reversible Logic
Directory of Open Access Journals (Sweden)
Gowthami P
2016-02-01
Full Text Available Reversible logic circuits have promising applications in Quantum computing, Low power VLSI design, Nanotechnology, optical computing, DNA computing and Quantum dot cellular automata. In spite of them another main prominent application of reversible logic is Quantum computers where the quantum devices are essential which are ideally operated at ultra high speed with less power dissipation must be built from reversible logic components. This makes the reversible logic as a one of the most promising research areas in the past few decades. In VLSI design the delay is the one of the major issue along with area and power. This paper presents the implementation of Ripple Carry Adder (RCA circuits using reversible logic gates are discussed.
Young, T.
This book is intended to be used as a textbook in a one-semester course at a variety of levels. Because of self-study features incorporated, it may also be used by practicing electronic engineers as a formal and thorough introduction to the subject. The distinction between linear and digital integrated circuits is discussed, taking into account digital and linear signal characteristics, linear and digital integrated circuit characteristics, the definitions for linear and digital circuits, applications of digital and linear integrated circuits, aspects of fabrication, packaging, and classification and numbering. Operational amplifiers are considered along with linear integrated circuit (LIC) power requirements and power supplies, voltage and current regulators, linear amplifiers, linear integrated circuit oscillators, wave-shaping circuits, active filters, DA and AD converters, demodulators, comparators, instrument amplifiers, current difference amplifiers, analog circuits and devices, and aspects of troubleshooting.
Electrical Circuits and Water Analogies
Smith, Frederick A.; Wilson, Jerry D.
1974-01-01
Briefly describes water analogies for electrical circuits and presents plans for the construction of apparatus to demonstrate these analogies. Demonstrations include series circuits, parallel circuits, and capacitors. (GS)
DEFF Research Database (Denmark)
Hansen, Kristoffer Arnsfelt; Miltersen, Peter Bro; Vinay, V
2006-01-01
We consider the computational power of constant width polynomial size cylindrical circuits and nondeterministic branching programs. We show that every function computed by a Pi2 o MOD o AC0 circuit can also be computed by a constant width polynomial size cylindrical nondeterministic branching...... program (or cylindrical circuit) and that every function computed by a constant width polynomial size cylindrical circuit belongs to ACC0....
REA, Editors of
2012-01-01
REA's Essentials provide quick and easy access to critical information in a variety of different fields, ranging from the most basic to the most advanced. As its name implies, these concise, comprehensive study guides summarize the essentials of the field covered. Essentials are helpful when preparing for exams, doing homework and will remain a lasting reference source for students, teachers, and professionals. Electric Circuits I includes units, notation, resistive circuits, experimental laws, transient circuits, network theorems, techniques of circuit analysis, sinusoidal analysis, polyph
The negative differential resistance characteristics of an RC-IGBT and its equivalent circuit model
International Nuclear Information System (INIS)
A simple equivalent circuit model is proposed according to the device structure of reverse conducting insulated gate bipolar transistors (RC-IGBT). Mathematical derivation and circuit simulations indicate that this model can explain the snap-back effect (including primary snap-back effect, secondary snap-back effect, and reverse snap-back effect) and hysteresis effect perfectly. (semiconductor devices)
The negative differential resistance characteristics of an RC-IGBT and its equivalent circuit model
Wenliang, Zhang; Yangjun, Zhu; Shuojin, Lu; Xiaoli, Tian
2014-02-01
A simple equivalent circuit model is proposed according to the device structure of reverse conducting insulated gate bipolar transistors (RC-IGBT). Mathematical derivation and circuit simulations indicate that this model can explain the snap-back effect (including primary snap-back effect, secondary snap-back effect, and reverse snap-back effect) and hysteresis effect perfectly.
DEFF Research Database (Denmark)
2009-01-01
A load testing circuit a circuit tests the load impedance of a load connected to an amplifier. The load impedance includes a first terminal and a second terminal, the load testing circuit comprising a signal generator providing a test signal of a defined bandwidth to the first terminal of the load...
Treu, Jr., Charles A.
1999-08-31
A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes.
Louwsma, Simon Minze; Vertregt, Maarten
2010-01-01
A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital converte
Louwsma, Simon Minze; Vertregt, Maarten
2011-01-01
A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital converte
Reversible thyristor converters of brushless synchronous compensators
А.М. Galynovskiy; E.М.Dubchak; E.А. Lenskaya
2013-01-01
Behavior of models of three-phase-to-single-phase rotary reversible thyristor converters of brushless synchronous compensators in a circuit simulation system is analyzed. It is shown that combined control mode of opposite-connected thyristors may result in the exciter armature winding short circuits both at the thyristor feed-forward and lagging current delay angles. It must be taken into consideration when developing brushless compensator excitation systems.
Reversible thyristor converters of brushless synchronous compensators
Directory of Open Access Journals (Sweden)
А.М.Galynovskiy
2013-12-01
Full Text Available Behavior of models of three-phase-to-single-phase rotary reversible thyristor converters of brushless synchronous compensators in a circuit simulation system is analyzed. It is shown that combined control mode of opposite-connected thyristors may result in the exciter armature winding short circuits both at the thyristor feed-forward and lagging current delay angles. It must be taken into consideration when developing brushless compensator excitation systems.
Maas, Stephen A
2014-01-01
This book differentiates itself by presenting microwave and RF technology from a circuit design viewpoint, rather than a set of electromagnetic problems. The emphasis is on gaining a practical understanding of often overlooked but vital physical processes.This resource provides microwave circuit engineers with analytical techniques for understanding and designing high-frequency circuits almost entirely from a circuit point of view. Electromagnetic concepts are not avoided, but they are employed only as necessary to support circuit-theoretical ones or to describe phenomena such as radiation and
Ochoa, Agustin
2016-01-01
This book describes a consistent and direct methodology to the analysis and design of analog circuits with particular application to circuits containing feedback. The analysis and design of circuits containing feedback is generally presented by either following a series of examples where each circuit is simplified through the use of insight or experience (someone else’s), or a complete nodal-matrix analysis generating lots of algebra. Neither of these approaches leads to gaining insight into the design process easily. The author develops a systematic approach to circuit analysis, the Driving Point Impedance and Signal Flow Graphs (DPI/SFG) method that does not require a-priori insight to the circuit being considered and results in factored analysis supporting the design function. This approach enables designers to account fully for loading and the bi-directional nature of elements both in the feedback path and in the amplifier itself, properties many times assumed negligible and ignored. Feedback circuits a...
Optimal design of APD biasing circuit
Institute of Scientific and Technical Information of China (English)
SUN Chun-sheng; QIN Shi-qiao; WANG Xing-shu; ZHU Dong-hua
2007-01-01
This paper proposes a control method for avalanche photodiode (APD) reverse bias with temperature compensation and load resistance compensation. The influence of background light and load resistance on APD detection circuit is analyzed in detail. A theoretical model of temperature compensation and load resistance compensation is established, which is used for APD biasing circuit designing. It is predicted that this control method is especially suitable for LD laser range finder used on vehicles. Experimental results confirm thatthe design proposed in this paper can considerablely improve the performance of range finder.
Tripathi, Manjari; Vibha, Deepti
2009-01-01
In recent years, more attention has been given to the early diagnostic evaluation of patients with dementia which is essential to identify patients with cognitive symptoms who may have treatable conditions. Guidelines suggest that all patients presenting with dementia or cognitive symptoms should be evaluated with a range of laboratory tests, and with structural brain imaging with computed tomography (CT) or magnetic resonance imaging (MRI). While many of the disorders reported as ‘reversible...
Cell circuit design and test of a high power solid state modulator
International Nuclear Information System (INIS)
The cell circuit design and test of a high power solid state modulator for linac application are presented in the paper. The 3.3 kV IGBT and large dimension nanocrystalline core are used in the cell circuit design. The driving, protection, reverse energy absorbing and bias circuit are also presented. Dynamic magnetic performance of the core and the waveforms of the cell circuit are measured. (authors)
Automated Method for Building CNOT Based Quantum Circuits for Boolean Functions
Younes, A; Younes, Ahmed; Miller, Julian
2003-01-01
In this paper we discuss an efficient technique that can implement any given Boolean function as a quantum circuit. The method converts a truth table of a Boolean function to the corresponding quantum circuit using a minimal number of auxiliary qubits. We give examples of some circuits synthesized with this technique. A direct result that follows from the technique is a new way to convert any classical digital circuit to its classical reversible form.
DEFF Research Database (Denmark)
Hansen, Kristoffer Arnsfelt; Podolskii, Vladimir V.
2010-01-01
We initiate a systematic study of constant depth Boolean circuits built using exact threshold gates. We consider both unweighted and weighted exact threshold gates and introduce corresponding circuit classes. We next show that this gives a hierarchy of classes that seamlessly interleave with the...... well-studied corresponding hierarchies defined using ordinary threshold gates. A major open problem in Boolean circuit complexity is to provide an explicit super-polynomial lower bound for depth two threshold circuits. We identify the class of depth two exact threshold circuits as a natural subclass of...... these where also no explicit lower bounds are known. Many of our results can be seen as evidence that this class is a strict subclass of depth two threshold circuits - thus we argue that efforts in proving lower bounds should be directed towards this class....
Design of Universal Shift Register Using Reversible Logic
Directory of Open Access Journals (Sweden)
Md. Hasanuzzaman
2012-09-01
Full Text Available Reversible sequential circuits are considered the significant memory block for their ultra-low power consumption. Universal shift register is an important memory element of the sequential circuit family. In this paper we proposed efficient design of reversible universal shift register that is optimized in terms of quantum cost, delay and garbage outputs. Appropriate theorems and lemmas are presented to clarify the proposed designs and establish its efficiency.
Design of Universal Shift Register Using Reversible Logic
Md. Hasanuzzaman; Indrani Manda; Md. Selim Al Mamun
2012-01-01
Reversible sequential circuits are considered the significant memory block for their ultra-low power consumption. Universal shift register is an important memory element of the sequential circuit family. In this paper we proposed efficient design of reversible universal shift register that is optimized in terms of quantum cost, delay and garbage outputs. Appropriate theorems and lemmas are presented to clarify the proposed designs and establish its efficiency.
Hickman, Ian
2013-01-01
Analog Circuits Cookbook presents articles about advanced circuit techniques, components and concepts, useful IC for analog signal processing in the audio range, direct digital synthesis, and ingenious video op-amp. The book also includes articles about amplitude measurements on RF signals, linear optical imager, power supplies and devices, and RF circuits and techniques. Professionals and students of electrical engineering will find the book informative and useful.
Dobkin, Bob
2012-01-01
Analog circuit and system design today is more essential than ever before. With the growth of digital systems, wireless communications, complex industrial and automotive systems, designers are being challenged to develop sophisticated analog solutions. This comprehensive source book of circuit design solutions aids engineers with elegant and practical design techniques that focus on common analog challenges. The book's in-depth application examples provide insight into circuit design and application solutions that you can apply in today's demanding designs. <
Stochastic Switching Circuit Synthesis
Wilhelm, Daniel; Bruck, Jehoshua
2009-01-01
Shannon in his 1938 Masterpsilas Thesis demonstrated that any Boolean function can be realized by a switching relay circuit, leading to the development of deterministic digital logic. Here, we replace each classical switch with a probabilistic switch (pswitch). We present algorithms for synthesizing circuits closed with a desired probability, including an algorithm that generates optimal size circuits for any binary fraction. We also introduce a new duality property for series-parallel stocha...
Electronic devices and circuits
Pridham, Gordon John
1968-01-01
Electronic Devices and Circuits, Volume 1 deals with the design and applications of electronic devices and circuits such as passive components, diodes, triodes and transistors, rectification and power supplies, amplifying circuits, electronic instruments, and oscillators. These topics are supported with introductory network theory and physics. This volume is comprised of nine chapters and begins by explaining the operation of resistive, inductive, and capacitive elements in direct and alternating current circuits. The theory for some of the expressions quoted in later chapters is presented. Th
Wolfendale, E
2013-01-01
MOS Integral Circuit Design aims to help in the design of integrated circuits, especially large-scale ones, using MOS Technology through teaching of techniques, practical applications, and examples. The book covers topics such as design equation and process parameters; MOS static and dynamic circuits; logic design techniques, system partitioning, and layout techniques. Also featured are computer aids such as logic simulation and mask layout, as well as examples on simple MOS design. The text is recommended for electrical engineers who would like to know how to use MOS for integral circuit desi
Marston, R M
1995-01-01
CMOS Circuits Manual is a user's guide for CMOS. The book emphasizes the practical aspects of CMOS and provides circuits, tables, and graphs to further relate the fundamentals with the applications. The text first discusses the basic principles and characteristics of the CMOS devices. The succeeding chapters detail the types of CMOS IC, including simple inverter, gate and logic ICs and circuits, and complex counters and decoders. The last chapter presents a miscellaneous collection of two dozen useful CMOS circuits. The book will be useful to researchers and professionals who employ CMOS circu
Chen, Wai-Kai
2003-01-01
A bestseller in its first edition, The Circuits and Filters Handbook has been thoroughly updated to provide the most current, most comprehensive information available in both the classical and emerging fields of circuits and filters, both analog and digital. This edition contains 29 new chapters, with significant additions in the areas of computer-aided design, circuit simulation, VLSI circuits, design automation, and active and digital filters. It will undoubtedly take its place as the engineer's first choice in looking for solutions to problems encountered in the design, analysis, and behavi
Timergenerator circuits manual
Marston, R M
2013-01-01
Timer/Generator Circuits Manual is an 11-chapter text that deals mainly with waveform generator techniques and circuits. Each chapter starts with an explanation of the basic principles of its subject followed by a wide range of practical circuit designs. This work presents a total of over 300 practical circuits, diagrams, and tables.Chapter 1 outlines the basic principles and the different types of generator. Chapters 2 to 9 deal with a specific type of waveform generator, including sine, square, triangular, sawtooth, and special waveform generators pulse. These chapters also include pulse gen
International Nuclear Information System (INIS)
This book contains eight chapters, which are introduction of computer like history of computer, integrated circuit, micro processor and micro computer, number system and binary code such as complement and parity bit, boolean algebra and logic circuit like karnaugh map, Quine-Mclusky, and prime implicant, integrated logic circuit such as adder, subtractor, carry propagation and magnitude comparator, order logic circuit and memory like flip-flop, serial binary adder and counter, IC logic gate such as IC logic level and ECL, development of structure of micro processor and instruction and addressing mode.
Security electronics circuits manual
MARSTON, R M
1998-01-01
Security Electronics Circuits Manual is an invaluable guide for engineers and technicians in the security industry. It will also prove to be a useful guide for students and experimenters, as well as providing experienced amateurs and DIY enthusiasts with numerous ideas to protect their homes, businesses and properties.As with all Ray Marston's Circuits Manuals, the style is easy-to-read and non-mathematical, with the emphasis firmly on practical applications, circuits and design ideas. The ICs and other devices used in the practical circuits are modestly priced and readily available ty
Louwsma, Simon Minze; Vertregt, Maarten
2011-01-01
A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital converter via a respective output switch. The output switch of each channel opens for a tracking time period when the track-and-hold circuit is in a tracking mode for sampling the signal, and closes for a ...
Efficient Reversible Montgomery Multiplier and Its Application to Hardware Cryptography
Directory of Open Access Journals (Sweden)
Noor M. Nayeem
2009-01-01
Full Text Available Problem Statement: Arithmetic Logic Unit (ALU of a crypto-processor and microchips leak information through power consumption. Although the cryptographic protocols are secured against mathematical attacks, the attackers can break the encryption by measuring the energy consumption. Approach: To thwart attacks, this study proposed the use of reversible logic for designing the ALU of a crypto-processor. Ideally, reversible circuits do not dissipate any energy. If reversible circuits are used, then the attacker would not be able to analyze the power consumption. In order to design the reversible ALU of a crypto-processor, reversible Carry Save Adder (CSA using Modified TSG (MTSG gates and architecture of Montgomery multiplier were proposed. For reversible implementation of Montgomery multiplier, efficient reversible multiplexers and sequential circuits such as reversible registers and shift registers were presented. Results: This study showed that modified designs perform better than the existing ones in terms of number of gates, number of garbage outputs and quantum cost. Lower bounds of the proposed designs were established by providing relevant theorems and lemmas. Conclusion: The application of reversible circuit is suitable to the field of hardware cryptography.
Reversibly Bistable Flexible Electronics
Alfaraj, Nasir
2015-05-01
Introducing the notion of transformational silicon electronics has paved the way for integrating various applications with silicon-based, modern, high-performance electronic circuits that are mechanically flexible and optically semitransparent. While maintaining large-scale production and prototyping rapidity, this flexible and translucent scheme demonstrates the potential to transform conventionally stiff electronic devices into thin and foldable ones without compromising long-term performance and reliability. In this work, we report on the fabrication and characterization of reversibly bistable flexible electronic switches that utilize flexible n-channel metal-oxide-semiconductor field-effect transistors. The transistors are fabricated initially on rigid (100) silicon substrates before they are peeled off. They can be used to control flexible batches of light-emitting diodes, demonstrating both the relative ease of scaling at minimum cost and maximum reliability and the feasibility of integration. The peeled-off silicon fabric is about 25 µm thick. The fabricated devices are transferred to a reversibly bistable flexible platform through which, for example, a flexible smartphone can be wrapped around a user’s wrist and can also be set back to its original mechanical position. Buckling and cyclic bending of such host platforms brings a completely new dimension to the development of flexible electronics, especially rollable displays.
Synchronizing Hyperchaotic Circuits
DEFF Research Database (Denmark)
Tamasevicius, Arunas; Cenys, Antanas; Namajunas, Audrius;
1997-01-01
Regarding possible applications to secure communications the technique of synchronizing hyperchaotic circuits with a single dynamical variable is discussed. Several specific examples including the fourth-order circuits with two positive Lyapunov exponents as well as the oscillator with a delay line...
Vick, Matthew E.
2010-01-01
The University of Colorado's Physics Education Technology (PhET) website offers free, high-quality simulations of many physics experiments that can be used in the classroom. The Circuit Construction Kit, for example, allows students to safely and constructively play with circuit components while learning the mathematics behind many circuit…
Synchronizing Hyperchaotic Circuits
DEFF Research Database (Denmark)
Tamasevicius, Arunas; Cenys, Antanas; Namajunas, Audrius; Mykolaitis, Gytis; Lindberg, Erik
1997-01-01
Regarding possible applications to secure communications the technique of synchronizing hyperchaotic circuits with a single dynamical variable is discussed. Several specific examples including the fourth-order circuits with two positive Lyapunov exponents as well as the oscillator with a delay line...... characterized by multiple positive Lyapunov exponents are reviewd....
Genetic circuit design automation.
Nielsen, Alec A K; Der, Bryan S; Shin, Jonghyeon; Vaidyanathan, Prashant; Paralanov, Vanya; Strychalski, Elizabeth A; Ross, David; Densmore, Douglas; Voigt, Christopher A
2016-04-01
Computation can be performed in living cells by DNA-encoded circuits that process sensory information and control biological functions. Their construction is time-intensive, requiring manual part assembly and balancing of regulator expression. We describe a design environment, Cello, in which a user writes Verilog code that is automatically transformed into a DNA sequence. Algorithms build a circuit diagram, assign and connect gates, and simulate performance. Reliable circuit design requires the insulation of gates from genetic context, so that they function identically when used in different circuits. We used Cello to design 60 circuits forEscherichia coli(880,000 base pairs of DNA), for which each DNA sequence was built as predicted by the software with no additional tuning. Of these, 45 circuits performed correctly in every output state (up to 10 regulators and 55 parts), and across all circuits 92% of the output states functioned as predicted. Design automation simplifies the incorporation of genetic circuits into biotechnology projects that require decision-making, control, sensing, or spatial organization. PMID:27034378
Sturman, J.
1968-01-01
Stable input stage was designed for the use with a integrated circuit operational amplifier to provide improved performance as an instrumentation-type amplifier. The circuit provides high input impedance, stable gain, good common mode rejection, very low drift, and low output impedance.
Analog Genetic Encoding for the Evolution of Circuits and Networks
Mattiussi, Claudio; Floreano, Dario
2007-01-01
This paper describes a new kind of genetic representation called analog genetic encoding (AGE). The representation is aimed at the evolutionary synthesis and reverse engineering of circuits and networks such as analog electronic circuits, neural networks, and genetic regulatory networks. AGE permits the simultaneous evolution of the topology and sizing of the networks. The establishment of the links between the devices that form the network is based on an implicit definition of the interactio...
DEFF Research Database (Denmark)
Tryggestad, Kjell
2004-01-01
The study aims is to describe how the inclusion and exclusion of materials and calculative devices construct the boundaries and distinctions between statistical facts and artifacts in economics. My methodological approach is inspired by John Graunt's (1667) Political arithmetic and more recent work...... within constructivism and the field of Science and Technology Studies (STS). The result of this approach is here termed reversible statistics, reconstructing the findings of a statistical study within economics in three different ways. It is argued that all three accounts are quite normal, albeit in...... different ways. The presence and absence of diverse materials, both natural and political, is what distinguishes them from each other. Arguments are presented for a more symmetric relation between the scientific statistical text and the reader. I will argue that a more symmetric relation can be achieved by...
Improved AC pixel electrode circuit for active matrix of organic light-emitting display
Si, Yujuan; Lang, Liuqi; Chen, Wanzhong; Liu, Shiyong
2004-05-01
In this paper, a modified four-transistor pixel circuit for active-matrix organic light-emitting displays (AMOLED) was developed to improve the performance of OLED device. This modified pixel circuit can provide an AC driving mode to make the OLED working in a reversed-biased voltage during the certain cycle. The optimized values of the reversed-biased voltage and the characteristics of the pixel circuit were investigated using AIM-SPICE. The simulated results reveal that this circuit can provide a suitable output current and voltage characteristic, and little change was made in luminance current.
Experimental confirmation of a new reversed butterfly-shaped attractor
Institute of Scientific and Technical Information of China (English)
Liu Ling; Su Yan-Chen; Liu Chong-Xin
2007-01-01
This paper reports a new reverse butterfly-shaped chaotic attractor and its experimental confirmation. Some basic dynamical properties, and chaotic behaviours of this new reverse butterfly attractor are studied. Simulation results support brief theoretical derivations. Furthermore, the system is experimentally confirmed by a simple electronic circuit.
Approximate circuits for increased reliability
Energy Technology Data Exchange (ETDEWEB)
Hamlet, Jason R.; Mayo, Jackson R.
2015-08-18
Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.
Approximate circuits for increased reliability
Energy Technology Data Exchange (ETDEWEB)
Hamlet, Jason R.; Mayo, Jackson R.
2015-12-22
Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.
Optimized design of BCD adder and Carry skip BCD adder using reversible logic gates
Directory of Open Access Journals (Sweden)
H.R.Bhagyalakshmi,
2011-04-01
Full Text Available Reversible logic is very essential for the construction of low power, low loss computational structures which are very essential for the construction of arithmetic circuits used in quantum computation, nano technology and other low power digital circuits. In the present paper an optimized and low quantum cost one digit BCD adder and an optimized one digit carry skip BCD adder using new reversible logic gates are proposed. The proposed work is best compared to the other existing circuits.
Optimized design of Carry Skip BCD adder using new FHNG reversible logic gates
Directory of Open Access Journals (Sweden)
Md.Belayet Ali
2012-07-01
Full Text Available Reversible logic is very essential for the construction of low power, low loss computational structures which are very essential for the construction of arithmetic circuits used in quantum computation, nanotechnology and other low power digital circuits. In the present paper an optimized and low quantum cost one digit carry skip BCD adder using new reversible logic gates are proposed. The proposed work is best compared to the other existing circuits.
Circuit analysis with Multisim
Baez-Lopez, David
2011-01-01
This book is concerned with circuit simulation using National Instruments Multisim. It focuses on the use and comprehension of the working techniques for electrical and electronic circuit simulation. The first chapters are devoted to basic circuit analysis.It starts by describing in detail how to perform a DC analysis using only resistors and independent and controlled sources. Then, it introduces capacitors and inductors to make a transient analysis. In the case of transient analysis, it is possible to have an initial condition either in the capacitor voltage or in the inductor current, or bo
Troubleshooting analog circuits
Pease, Robert A
1991-01-01
Troubleshooting Analog Circuits is a guidebook for solving product or process related problems in analog circuits. The book also provides advice in selecting equipment, preventing problems, and general tips. The coverage of the book includes the philosophy of troubleshooting; the modes of failure of various components; and preventive measures. The text also deals with the active components of analog circuits, including diodes and rectifiers, optically coupled devices, solar cells, and batteries. The book will be of great use to both students and practitioners of electronics engineering. Other
Plasmonic Nanoguides and Circuits
Bozhevolnyi, Sergey
2008-01-01
Modern communication systems dealing with huge amounts of data at ever increasing speed try to utilize the best aspects of electronic and optical circuits. Electronic circuits are tiny but their operation speed is limited, whereas optical circuits are extremely fast but their sizes are limited by diffraction. Waveguide components utilizing surface plasmon (SP) modes were found to combine the huge optical bandwidth and compactness of electronics, and plasmonics thereby began to be considered as the next chip-scale technology. In this book, the authors concentrate on the SP waveguide configurati
Nonlinear dynamics in circuits
Carroll, TL
1995-01-01
This volume describes the use of simple analog circuits to study nonlinear dynamics, chaos and stochastic resonance. The circuit experiments that are described are mostly easy and inexpensive to reproduce, and yet these experiments come from the forefront of nonlinear dynamics research. The individual chapters describe why analog circuits are so useful for studying nonlinear dynamics, and include theoretical as well as experimental results from some of the leading researchers in the field. Most of the articles contain some tutorial sections for the less experienced readers.The audience for thi
Counting rate logarithmic circuits
International Nuclear Information System (INIS)
This paper describes the basic circuit and the design method for a multidecade logarithmic counting ratemeter. The method is based on the charging and discharging of several RC time constants. An F.E.T. switch is used and the drain current is converted into a proportional voltage by a current to voltage converter. The logarithmic linearity was estimated for 4 decades starting from 50 cps. This circuit can be used in several nuclear instruments like survey meters and counting systems. This circuits has been developed as part of campbell channel instrumentation. (author)
Optoelectronics circuits manual
Marston, R M
2013-01-01
Optoelectronics Circuits Manual covers the basic principles and characteristics of the best known types of optoelectronic devices, as well as the practical applications of many of these optoelectronic devices. The book describes LED display circuits and LED dot- and bar-graph circuits and discusses the applications of seven-segment displays, light-sensitive devices, optocouplers, and a variety of brightness control techniques. The text also tackles infrared light-beam alarms and multichannel remote control systems. The book provides practical user information and circuitry and illustrations.
Marston, R M
2013-01-01
Modern TTL Circuits Manual provides an introduction to the basic principles of Transistor-Transistor Logic (TTL). This book outlines the major features of the 74 series of integrated circuits (ICs) and introduces the various sub-groups of the TTL family.Organized into seven chapters, this book begins with an overview of the basics of digital ICs. This text then examines the symbology and mathematics of digital logic. Other chapters consider a variety of topics, including waveform generator circuitry, clocked flip-flop and counter circuits, special counter/dividers, registers, data latches, com
Optimized parity preserving quantum reversible full adder/subtractor
Haghparast, Majid; Bolhassani, Ali
2016-07-01
Reversible logic is one of the indispensable aspects of emerging technologies for reducing physical entropy gain, since reversible circuits do not lose information in the form of internal heat during computation. This paper aimed to initiate constructing parity preserving reversible circuits. A novel parity preserving reversible block, HB is presented. Then a new design of a cost-effective parity preserving reversible full adder/subtractor (PPFA/S) is proposed. Next, we suggested a new parity preserving binary to BCD converter. Finally, we proposed new realization of parity preserving reversible BCD adder. The proposed designs are cost-effective in terms of quantum cost and delay. All the scales are in the NANO-metric area.
AN IMPROVED DESIGN OF A MULTIPLIER USING REVERSIBLE LOGIC GATES
Directory of Open Access Journals (Sweden)
H.R.BHAGYALAKSHMI
2010-08-01
Full Text Available Reversible logic gates are very much in demand for the future computing technologies as they are known to produce zero power dissipation under ideal conditions. This paper proposes an improved design of a multiplier using reversible logic gates. Multipliers are very essential for the construction of various computational units of a quantum computer. The quantum cost of a reversible logic circuit can be minimized by reducing the number of reversible logic gates. For this two 4*4 reversible logic gates called a DPG gate and a BVF gate are used.
Directory of Open Access Journals (Sweden)
Alexis De Vos
2011-06-01
Full Text Available Whereas quantum computing circuits follow the symmetries of the unitary Lie group, classical reversible computation circuits follow the symmetries of a finite group, i.e., the symmetric group. We confront the decomposition of an arbitrary classical reversible circuit with w bits and the decomposition of an arbitrary quantum circuit with w qubits. Both decompositions use the control gate as building block, i.e., a circuit transforming only one (qubit, the transformation being controlled by the other w−1 (qubits. We explain why the former circuit can be decomposed into 2w − 1 control gates, whereas the latter circuit needs 2w − 1 control gates. We investigate whether computer circuits, not based on the full unitary group but instead on a subgroup of the unitary group, may be decomposable either into 2w − 1 or into 2w − 1 control gates.
Laurent Guiraud
1999-01-01
A printed circuit board made by scientists in the ATLAS collaboration for the transition radiaton tracker (TRT). This will read data produced when a high energy particle crosses the boundary between two materials with different electrical properties.
High temperature circuit breaker
Edwards, R. N.; Travis, E. F.
1970-01-01
Alternating current circuit breaker is suitable for reliable long-term service at 1000 deg F in the vacuum conditions of outer space. Construction materials are resistant to nuclear radiation and vacuum welding. Service test conditions and results are given.
Latching overcurrent circuit breaker
Moore, M. L.
1970-01-01
Circuit breaker consists of a preset current amplitude sensor, and a lamp-photo-resistor combination in a feedback arrangement which energizes a power switching relay. The ac input power is removed from the load at predetermined current amplitudes.
Hockenberry, Adam J.; Jewett, Michael C.
2012-01-01
Inspired by advances in the ability to construct programmable circuits in living organisms, in vitro circuits are emerging as a viable platform for designing, understanding, and exploiting dynamic biochemical circuitry. In vitro systems allow researchers to directly access and manipulate biomolecular parts without the unwieldy complexity and intertwined dependencies that often exist in vivo. Experimental and computational foundations in DNA, DNA/RNA, and DNA/RNA/protein based circuitry have g...
Overriding Faulty Circuit Breakers
Robbins, Richard L.; Pierson, Thomas E.
1987-01-01
Retainer keeps power on in emergency. Simple mechanical device attaches to failed aircraft-type push/pull circuit breaker to restore electrical power temporarily until breaker replaced. Device holds push/pull button in closed position; unnecessary for crewmember to hold button in position by continual finger pressure. Sleeve and plug hold button in, overriding mechanical failure in circuit breaker. Windows in sleeve show button position.
Describing and Optimizing Reversible Logic using a Functional Language
DEFF Research Database (Denmark)
Thomsen, Michael Kirkedal
2012-01-01
This paper presents the design of a language for the description and optimisation of reversible logic circuits. The language is a combinator-style functional language designed to be close to the reversible logical gate-level. The combinators include high-level constructs such as ripples, but also...... allows the description of arbitrary sized circuits. The combination of the functional language and the restricted reversible model results in many arithmetic laws, which provide more possibilities for term rewriting and, thus, the opportunity for good optimisation....... the recognisable inversion combinator f^(-1), which defines the inverse function of f using an efficient semantics. It is important to ensure that all circuits descriptions are reversible, and furthermore we must require this to be done statically. This is en- sured by the type system, which also...
Reversible Logic Synthesis of Fault Tolerant Carry Skip BCD Adder
Islam, Md Saiful; 10.3329/jbas.v32i2.2431
2010-01-01
Reversible logic is emerging as an important research area having its application in diverse fields such as low power CMOS design, digital signal processing, cryptography, quantum computing and optical information processing. This paper presents a new 4*4 parity preserving reversible logic gate, IG. The proposed parity preserving reversible gate can be used to synthesize any arbitrary Boolean function. It allows any fault that affects no more than a single signal readily detectable at the circuit's primary outputs. It is shown that a fault tolerant reversible full adder circuit can be realized using only two IGs. The proposed fault tolerant full adder (FTFA) is used to design other arithmetic logic circuits for which it is used as the fundamental building block. It has also been demonstrated that the proposed design offers less hardware complexity and is efficient in terms of gate count, garbage outputs and constant inputs than the existing counterparts.
International Nuclear Information System (INIS)
The peak reading detector circuit serves for picking up the instants during which peaks of a given polarity occur in sequences of signals in which the extreme values, their time intervals, and the curve shape of the signals vary. The signal sequences appear in measuring the foetal heart beat frequence from amplitude-modulated ultrasonic, electrocardiagram, and blood pressure signals. In order to prevent undesired emission of output signals from, e. g., disturbing intermediate extreme values, the circuit consists of the series connections of a circuit to simulate an ideal diode, a strong unit, a discriminator for the direction of charging current, a time-delay circuit, and an electronic switch lying in the decharging circuit of the storage unit. The time-delay circuit thereby causes storing of a preliminary maximum value being used only after a certain time delay for the emission of the output signal. If a larger extreme value occurs during the delay time the preliminary maximum value is cleared and the delay time starts running anew. (DG/PB)
Directory of Open Access Journals (Sweden)
Shiraz Afazal
2012-09-01
Full Text Available Recent development in the field of optical communication have increased the need for Opto Electronic Integrated circuit used for the high speed data transmission with low power consuming, high bandwidth and compact size. Presented is the OEIC chip with two metal layer waveguide and low power receiver circuit using standard CMOS technology. The silicon dioxide waveguide is composed of two metal layer reducing metal layer make OEIC cost effective , The silicon LED is fabricated using nwell/p-substrate with p+ octagonal rings, the p+/nwell forms the series pn junction to increase the light emitting area which operates in reverse bias mode. Photo detector is made of multiple PN junction to increase the depletion region width with n+ active implantation/n-well fabricated on the p substrate .the photocurrent receiver circuit is made of MOSFET to perform the function of photo detection and preamplification
Reversible logic synthesis methodologies with application to quantum computing
Taha, Saleem Mohammed Ridha
2016-01-01
This book opens the door to a new interesting and ambitious world of reversible and quantum computing research. It presents the state of the art required to travel around that world safely. Top world universities, companies and government institutions are in a race of developing new methodologies, algorithms and circuits on reversible logic, quantum logic, reversible and quantum computing and nano-technologies. In this book, twelve reversible logic synthesis methodologies are presented for the first time in a single literature with some new proposals. Also, the sequential reversible logic circuitries are discussed for the first time in a book. Reversible logic plays an important role in quantum computing. Any progress in the domain of reversible logic can be directly applied to quantum logic. One of the goals of this book is to show the application of reversible logic in quantum computing. A new implementation of wavelet and multiwavelet transforms using quantum computing is performed for this purpose. Rese...
Reversed field pinch experiments on HIT-1
International Nuclear Information System (INIS)
HIT-1 (Hiroshima Torus-1) is constructed to elucidate the basic physical phenomena in the reversed field pinch (RFP) plasma. Design of HIT-1 system started in April 1983 and construction of its major parts finished in December 1983. Computational analyses are performed to calculate the magnetic field distributions in the torus, the load current and voltage on the poloidal and toroidal circuits of HIT-1. The analytic methods and calculated results for the magnetic fields and the poloidal and toroidal circuits are described in detail. (author)
Panigrahy, Rina
2012-01-01
There is a vast supply of prior art that study models for mental processes. Some studies in psychology and philosophy approach it from an inner perspective in terms of experiences and percepts. Others such as neurobiology or connectionist-machines approach it externally by viewing the mind as complex circuit of neurons where each neuron is a primitive binary circuit. In this paper, we also model the mind as a place where a circuit grows, starting as a collection of primitive components at birth and then builds up incrementally in a bottom up fashion. A new node is formed by a simple composition of prior nodes when we undergo a repeated experience that can be described by that composition. Unlike neural networks, however, these circuits take "concepts" or "percepts" as inputs and outputs. Thus the growing circuits can be likened to a growing collection of lambda expressions that are built on top of one another in an attempt to compress the sensory input as a heuristic to bound its Kolmogorov Complexity.
Electric circuit element in type 2 superconductive material
International Nuclear Information System (INIS)
The present invention describes the fabrication process of an electric circuit element in a multi-layer orientated texture type 2 superconductor, in reversible magnetization field conditions. Element great axis is orthogonal to the c cristallographic axis of the superconductive phase, with electrical input and output contacts on each layer. 5 refs., 6 figs
The Smallest Transistor-Based Nonautonomous Chaotic Circuit
DEFF Research Database (Denmark)
Lindberg, Erik; Murali, K.; Tamasevicius, Arunas
2005-01-01
A nonautonomous chaotic circuit based on one transistor, two capacitors, and two resistors is described. The mechanism behind the chaotic performance is based on “disturbance of integration.” The forward part and the reverse part of the bipolar transistor are “fighting” about the charging of a...
Nongrounded Common-Mode Equivalent Circuit for Brushless DC Motor Driven by PWM Inverter
Maetani, Tatsuo; Isomura, Yoshinori; Watanabe, Akihiko; Iimori, Kenichi; Morimoto, Shigeo
This paper describes nongrounded common-mode equivalent circuit for a motor driven by a voltage-source PWM inverter. When the capacitance of the rotor was small, the phenomenon that polarity of the common mode voltage and shaft voltage reversed was observed. In order to model this phenomenon, the bridge type equivalent circuit is proposed. It is verified with the calculation and experiment that shaft voltage values and polarity are accurately calculated with the proposed equivalent circuit.
Heuristic Synthesis of Reversible Logic – A Comparative Study
Directory of Open Access Journals (Sweden)
Chua Shin Cheng
2014-01-01
Full Text Available Reversible logic circuits have been historically motivated by theoretical research in low-power, and recently attracted interest as components of the quantum algorithm, optical computing and nanotechnology. However due to the intrinsic property of reversible logic, traditional irreversible logic design and synthesis methods cannot be carried out. Thus a new set of algorithms are developed correctly to synthesize reversible logic circuit. This paper presents a comprehensive literature review with comparative study on heuristic based reversible logic synthesis. It reviews a range of heuristic based reversible logic synthesis techniques reported by researchers (BDD-based, cycle-based, search-based, non-search-based, rule-based, transformation-based, and ESOP-based. All techniques are described in detail and summarized in a table based on their features, limitation, library used and their consideration metric. Benchmark comparison of gate count and quantum cost are analysed for each synthesis technique. Comparing the synthesis algorithm outputs over the years, it can be observed that different approach has been used for the synthesis of reversible circuit. However, the improvements are not significant. Quantum cost and gate count has improved over the years, but arguments and debates are still on certain issues such as the issue of garbage outputs that remain the same. This paper provides the information of all heuristic based synthesis of reversible logic method proposed over the years. All techniques are explained in detail and thus informative for new reversible logic researchers and bridging the knowledge gap in this area.
Semiconductor circuits worked examples
Abrahams, J R; Hiller, N
1966-01-01
Semiconductor Circuits: Worked Examples is a companion volume to Semiconductor Circuits: Theory, Design and Experiment. This book is a presentation of many questions at the undergraduate and technical level centering on the transistor. The problems concern basic physical theories of energy bands, covalent bond, and crystal lattice. Questions regarding the intrinsic property and impurity of semiconductors are also asked after the book presents a brief discussion of semiconductors. This book addresses the physical principles of semiconductor devices by presenting questions and worked examples o
Circuit Quantum Electrodynamics
Bishop, Lev S
2010-01-01
Circuit Quantum Electrodynamics (cQED), the study of the interaction between superconducting circuits behaving as artificial atoms and 1-dimensional transmission-line resonators, has shown much promise for quantum information processing tasks. For the purposes of quantum computing it is usual to approximate the artificial atoms as 2-level qubits, and much effort has been expended on attempts to isolate these qubits from the environment and to invent ever more sophisticated control and measurement schemes. Rather than focussing on these technological aspects of the field, this thesis investigates the opportunities for using these carefully engineered systems for answering questions of fundamental physics.
Argyle, Andrew
2009-01-01
Step-by-step instructions for making your own PCBs at home. Making your own printed circuit board (PCB) might seem a daunting task, but once you master the steps, it's easy to attain professional-looking results. Printed circuit boards, which connect chips and other components, are what make almost all modern electronic devices possible. PCBs are made from sheets of fiberglass clad with copper, usually in multiplelayers. Cut a computer motherboard in two, for instance, and you'll often see five or more differently patterned layers. Making boards at home is relatively easy
Compound semiconductor integrated circuits
Vu, Tho T
2003-01-01
This is the book version of a special issue of the International Journal of High Speed Electronics and Systems , reviewing recent work in the field of compound semiconductor integrated circuits. There are fourteen invited papers covering a wide range of applications, frequencies and materials. These papers deal with digital, analog, microwave and millimeter-wave technologies, devices and integrated circuits for wireline fiber-optic lightwave transmissions, and wireless radio-frequency microwave and millimeter-wave communications. In each case, the market is young and experiencing rapid growth
Electronic circuits fundamentals & applications
Tooley, Mike
2015-01-01
Electronics explained in one volume, using both theoretical and practical applications.New chapter on Raspberry PiCompanion website contains free electronic tools to aid learning for students and a question bank for lecturersPractical investigations and questions within each chapter help reinforce learning Mike Tooley provides all the information required to get to grips with the fundamentals of electronics, detailing the underpinning knowledge necessary to appreciate the operation of a wide range of electronic circuits, including amplifiers, logic circuits, power supplies and oscillators. The
Circuit design for reliability
Cao, Yu; Wirth, Gilson
2015-01-01
This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units. The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management. Provides comprehensive review on various reliability mechanisms at sub-45nm nodes; Describes practical modeling and characterization techniques for reliability; Includes thorough presentation of robust design techniques for major VLSI design units; Promotes physical understanding with first-principle simulations.
Kishore, K Lal
2008-01-01
Second Edition of the book Electronic Circuit Analysis is brought out with certain new Topics and reorganization of text matter into eight units. With addition of new topics, syllabi of many universities in this subject can be covered. Besides this, the book can also meet the requirements of M.Sc (Electronics), AMIETE, AMIE (Electronics) courses. Text matter is improved thoroughly. New topics like frequency effects in multistage amplifiers, amplifier circuit analysis, design of high frequency amplifiers, switching regulators, voltage multipliers, Uninterrupted Power Supplies (UPS), and Switchi
Chaotic memristive circuit: equivalent circuit realization and dynamical analysis
Institute of Scientific and Technical Information of China (English)
Bao Bo-Cheng; Xu Jian-Ping; Zhou Guo-Hua; Ma Zheng-Hua; Zou Ling
2011-01-01
In this paper,a practical equivalent circuit of an active flux-controlled memristor characterized by smooth piecewise-quadratic nonlinearity is designed and an experimental chaotic memristive circuit is implemented.The chaotic memristive circuit has an equilibrium set and its stability is dependent on the initial state of the memristor.The initial state-dependent and the circuit parameter-dependent dynamics of the chaotic memristive circuit are investigated via phase portraits,bifurcation diagrams and Lyapunov exponents.Both experimental and simulation results validate the proposed equivalent circuit realization of the active flux-controlled memristor.
Energy Technology Data Exchange (ETDEWEB)
Tournier, R.; Sulpice, A.; Lejay, P.; Chaminade, J.P.
1991-07-12
The present invention describes the fabrication process of an electric circuit element in a multi-layer orientated texture type 2 superconductor, in reversible magnetization field conditions. Element great axis is orthogonal to the c cristallographic axis of the superconductive phase, with electrical input and output contacts on each layer. 5 refs., 6 figs.
Institute of Scientific and Technical Information of China (English)
吴奕波
2012-01-01
The paper described an example of a single-stage arrangement and two-stage arrangement of reverse osmosis systems in printed circuit boards wastewater reuse,through the comparison of the two groups under the same conditions,the results showed that： in water the TDS ≤500 mg？L-1 conditions,system recovery between 75 % and 80 %,the temperature ≤30 ℃,the quality of water could meet the conductivity ≤100 μs？cm-1 reuse requirements.Single-stage arrangement of the system energy consumption,and the salt rate was higher than the two-stage,but due to the short process cycle design,the chemical cleaning cycle was more longer;if the replacement cycle of membrane components could be extended,the design might be more economical;As for what kind of design was more economical,should be combined analysis of the replacement cycle of poor and water quality requirements and other factors.%文章介绍了单段式排列和二段式排列反渗透系统在印制线路板废水回用的实例,通过两组系统在同等条件下的对比,结果表明：在进水TDS≤500 mg.L-1,系统回收率介于75%~80%,温度≤30℃的条件下,系统产水水质均能满足电导率≤100μs.cm-1的回用要求。单段式排列在能耗、透盐率方面比二段式高,但由于采用了短流程大循环设计,化学清洗周期长;如果能延长膜元件的更换周期,单段式的设计可能会更为经济;至于何种设计更为经济,应综合分析更换周期差和水质需求等因素。
ESD analog circuits and design
Voldman, Steven H
2014-01-01
A comprehensive and in-depth review of analog circuit layout, schematic architecture, device, power network and ESD design This book will provide a balanced overview of analog circuit design layout, analog circuit schematic development, architecture of chips, and ESD design. It will start at an introductory level and will bring the reader right up to the state-of-the-art. Two critical design aspects for analog and power integrated circuits are combined. The first design aspect covers analog circuit design techniques to achieve the desired circuit performance. The second and main aspect pres
A high precision CMOS weak current readout circuit
International Nuclear Information System (INIS)
This paper presents a high precision CMOS weak current readout circuit. This circuit is capable of converting a weak current into a frequency signal for amperometric measurements with high precision and further delivering a 10-bit digital output. A fast stabilization-enhanced potentiostat has been proposed in the design, which is used to maintain a constant bias potential for amperometric biochemical sensors. A technique based on source voltage shifting that reduces the leakage current of the MOS transistor to the reverse diode leakage level at room temperature was employed in the circuit. The chip was fabricated in the 0.35 μm chartered CMOS process, with a single 3.3 V power supply. The interface circuit maintains a dynamic range of more than 100 dB. Currents from 1 pA to 300 nA can be detected with a maximum nonlinearity of 0.3% over the full scale.
Equivalent circuit model of semiconductor nanowire diode by SPICE.
Lee, SeHan; Yu, YunSeop; Hwang, SungWoo; Ahn, Doyeol
2007-11-01
An equivalent circuit model of nanowire diodes is introduced. Because nanowire diodes inevitably involve a metal-semiconductor-metal structure, they consist of two metal-semiconductor contacts and one resistor in between these contacts. Our equivalent circuit consists of two Schottky diodes and one resistor. The current through the reverse-biased Schottky diode is calculated from the thermionic field emission (TFE) theory and that of the forward-biased Schottky diode is obtained from the classical thermionic emission (TE) equation. Our model is integrated into the conventional circuit simulator SPICE by a sub-circuit with TFE and TE routines. The results simulated with our model by SPICE are in good agreement with various, previously reported experimental results. PMID:18047126
Sorting Network for Reversible Logic Synthesis
Islam, Md Saiful; Mahmud, Abdullah Al; karim, Muhammad Rezaul
2010-01-01
In this paper, we have introduced an algorithm to implement a sorting network for reversible logic synthesis based on swapping bit strings. The algorithm first constructs a network in terms of n*n Toffoli gates read from left to right. The number of gates in the circuit produced by our algorithm is then reduced by template matching and removing useless gates from the network. We have also compared the efficiency of the proposed method with the existing ones.
Circuit Theory for SPICE of Spintronic Integrated Circuits
Manipatruni, Sasikanth; Nikonov, Dmitri E.; Young, Ian A.
2011-01-01
We present a theoretical and a numerical formalism for analysis and design of spintronic integrated circuits (SPINICs). The formalism encompasses a generalized circuit theory for spintronic integrated circuits based on nanomagnetic dynamics and spin transport. We propose an extension to the Modified Nodal Analysis technique for the analysis of spin circuits based on the recently developed spin conduction matrices. We demonstrate the applicability of the framework using an example spin logic c...
An Improved Structure Of Reversible Adder And Subtractor
Directory of Open Access Journals (Sweden)
Aakash Gupta
2013-03-01
Full Text Available In today’s world everyday a new technology which is faster, smaller and more complex than its predecessor is being developed. The increased number of transistors packed onto a chip of a conventional system results in increased power consumption that is why Reversible logic has drawn attention of Researchers due to its less heat dissipating characteristics. Reversible logic can be imposed over applications such as quantum computing, optical computing, quantum dot cellular automata, low power VLSI circuits, DNA computing. This paper presents the reversible combinational circuit of adder, subtractor and parity preserving subtractor. The suggested circuit in this paper are designed using Feynman, Double Feynman and MUX gates which are better than the existing one in literature in terms of Quantum cost, Garbage output and Total logical calculations.
Application of Permutation Group Theory in Reversible Logic Synthesis
Zakablukov, Dmitry V.
2015-01-01
The paper discusses various applications of permutation group theory in the synthesis of reversible logic circuits consisting of Toffoli gates with negative control lines. An asymptotically optimal synthesis algorithm for circuits consisting of gates from the NCT library is described. An algorithm for gate complexity reduction, based on equivalent replacements of gates compositions, is introduced. A new approach for combining a group-theory-based synthesis algorithm with a Reed-Muller-spectra...
Reducing energy with asynchronous circuits
Rivas Barragan, Daniel
2012-01-01
Reducing energy consumption using asynchronous circuits. The elastic clocks approach has been implemented along with a closed-feedback loop in order to achieve a lower energy consumption along with more reliability in integrated circuits.
1975-01-01
Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.
Reversible arithmetic logic unit
zhou, Rigui; Shi, Yang; Zhang, Manqun
2011-01-01
Quantum computer requires quantum arithmetic. The sophisticated design of a reversible arithmetic logic unit (reversible ALU) for quantum arithmetic has been investigated in this letter. We provide explicit construction of reversible ALU effecting basic arithmetic operations. By provided the corresponding control unit, the proposed reversible ALU can combine the classical arithmetic and logic operation in a reversible integrated system. This letter provides actual evidence to prove the possib...
Unstable oscillators based hyperchaotic circuit
DEFF Research Database (Denmark)
Murali, K.; Tamasevicius, A.; G. Mykolaitis, A.;
1999-01-01
A simple 4th order hyperchaotic circuit with unstable oscillators is described. The circuit contains two negative impedance converters, two inductors, two capacitors, a linear resistor and a diode. The Lyapunov exponents are presented to confirm hyperchaotic nature of the oscillations in the...... circuit. The performance of the circuit is investigated by means of numerical integration of appropriate differential equations, PSPICE simulations, and hardware experiment....
DEFF Research Database (Denmark)
Lindberg, Erik; Murali, K.; Tamacevicius, Arunas
2006-01-01
The state equations of the LMT circuit are modeled as a dedicated analogue computer circuit and solved by means of PSpice. The nonlinear part of the system is studied. Problems with the PSpice program are presented.......The state equations of the LMT circuit are modeled as a dedicated analogue computer circuit and solved by means of PSpice. The nonlinear part of the system is studied. Problems with the PSpice program are presented....
Value Constraint and Monotone circuit
Kobayashi, Koji
2012-01-01
This paper talks about that monotone circuit is P-Complete. Decision problem that include P-Complete is mapping that classify input with a similar property. Therefore equivalence relation of input value is important for computation. But monotone circuit cannot compute the equivalence relation of the value because monotone circuit can compute only monotone function. Therefore, I make the value constraint explicitly in the input and monotone circuit can compute equivalence relation. As a result...
Neurotrophins and spinal circuit function
Lorne M. Mendell
2014-01-01
Work early in the last century emphasized the stereotyped activity of spinal circuits based on studies of reflexes. However, the last several decades have focused on the plasticity of these spinal circuits. These considerations began with studies of the effects of monoamines on descending and reflex circuits. In recent years new classes of compounds called growth factors that are found in peripheral nerves and the spinal cord have been shown to affect circuit behavior in the spinal cord. In t...
Dynamical models of cortical circuits.
Wolf, Fred; Engelken, Rainer; Puelma-Touzel, Maximilian; Weidinger, Juan Daniel Flórez; Neef, Andreas
2014-01-01
Cortical neurons operate within recurrent neuronal circuits. Dissecting their operation is key to understanding information processing in the cortex and requires transparent and adequate dynamical models of circuit function. Convergent evidence from experimental and theoretical studies indicates that strong feedback inhibition shapes the operating regime of cortical circuits. For circuits operating in inhibition-dominated regimes, mathematical and computational studies over the past several y...
Diode, transistor & fet circuits manual
Marston, R M
2013-01-01
Diode, Transistor and FET Circuits Manual is a handbook of circuits based on discrete semiconductor components such as diodes, transistors, and FETS. The book also includes diagrams and practical circuits. The book describes basic and special diode characteristics, heat wave-rectifier circuits, transformers, filter capacitors, and rectifier ratings. The text also presents practical applications of associated devices, for example, zeners, varicaps, photodiodes, or LEDs, as well as it describes bipolar transistor characteristics. The transistor can be used in three basic amplifier configuration
Static Switching Dynamic Buffer Circuit
Pandey, A. K.; R. A. Mishra; R. K. Nagaria
2013-01-01
We proposed footless domino logic buffer circuit. It minimizes redundant switching at the dynamic and the output nodes. The proposed circuit avoids propagation of precharge pulse to the output node and allows the dynamic node which saves power consumption. Simulation is done using 0.18 µm CMOS technology. We have calculated the power consumption, delay, and power delay product of the proposed circuit and compared the results with the existing circuits for different logic function, loading co...
Neuromorphic silicon neuron circuits
Directory of Open Access Journals (Sweden)
GiacomoIndiveri
2011-05-01
Full Text Available Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain-machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance based Hodgkin-Huxley models to bi-dimensional generalized adaptive Integrate and Fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips.
Bossen, Olaf
2011-01-01
We present a new type of calorimeter in which we couple an unknown heat capacity with the aid of Peltier elements to an electrical circuit. The use of an electrical inductance and an amplifier in the circuit allows us to achieve autonomous oscillations, and the measurement of the corresponding resonance frequency makes it possible to accurately measure the heat capacity with an intrinsic statistical error that decreases as ~t^{-3/2} with measuring time t, as opposed to a corresponding error ~t^{-1/2} in the conventional alternating current (a.c.) method to measure heat capacities. We have built a demonstration experiment to show the feasibility of the new technique, and we have tested it on a gadolinium sample at its transition to the ferromagnetic state.
Sarpeshkar, Rahul; Watts, Lloyd; Mead, Carver
1992-01-01
Neural networks typically use an abstraction of the behaviour of a biological neuron, in which the continuously varying mean firing rate of the neuron is presumed to carry information about the neuron's time-varying state of excitation. However, the detailed timing of action potentials is known to be important in many biological systems. To build electronic models of such systems, one must have well-characterized neuron circuits that capture the essential behaviour of real neur...
Electronic devices and circuits
Kishore, K Lal
2008-01-01
This book is written in a simple lucid Language along with derivation of equations and supported by numerous solved problems to help the student to understand the concepts clearly.Advances in Miniaturization of Electronic Systems by ever increasing packaging densities on Integrated Circuits has made it very essential for thorough Knowledge of the concepts, phenomenon, characteristics and behaviour of semiconductor Devices for students and professionals.
PARTICLE BEAM TRACKING CIRCUIT
Anderson, O.A.
1959-05-01
>A particle-beam tracking and correcting circuit is described. Beam induction electrodes are placed on either side of the beam, and potentials induced by the beam are compared in a voltage comparator or discriminator. This comparison produces an error signal which modifies the fm curve at the voltage applied to the drift tube, thereby returning the orbit to the preferred position. The arrangement serves also to synchronize accelerating frequency and magnetic field growth. (T.R.H.)
Engineering prokaryotic gene circuits
Michalodimitrakis, Konstantinos; Isalan, Mark
2009-01-01
Engineering of synthetic gene circuits is a rapidly growing discipline, currently dominated by prokaryotic transcription networks, which can be easily rearranged or rewired to give different output behaviours. In this review, we examine both a rational and a combinatorial design of such networks and discuss progress on using in vitro evolution techniques to obtain functional systems. Moving beyond pure transcription networks, more and more networks are being implemented at the level of RNA, t...
Sketoe, J. G.; Clark, Anthony
2000-01-01
This paper presents a DOD E3 program overview on integrated circuit immunity. The topics include: 1) EMI Immunity Testing; 2) Threshold Definition; 3) Bias Tee Function; 4) Bias Tee Calibration Set-Up; 5) EDM Test Figure; 6) EMI Immunity Levels; 7) NAND vs. and Gate Immunity; 8) TTL vs. LS Immunity Levels; 9) TP vs. OC Immunity Levels; 10) 7805 Volt Reg Immunity; and 11) Seventies Chip Set. This paper is presented in viewgraph form.
Fundamental Atomtronic Circuit Elements
Lee, Jeffrey; McIlvain, Brian; Lobb, Christopher; Hill, Wendell T., III
2012-06-01
Recent experiments with neutral superfluid gases have shown that it is possible to create atomtronic circuits analogous to existing superconducting circuits. The goals of these experiments are to create complex systems such as Josephson junctions. In addition, there are theoretical models for active atomtronic components analogous to diodes, transistors and oscillators. In order for any of these devices to function, an understanding of the more fundamental atomtronic elements is needed. Here we describe the first experimental realization of these more fundamental elements. We have created an atomtronic capacitor that is discharged through a resistance and inductance. We will discuss a theoretical description of the system that allows us to determine values for the capacitance, resistance and inductance. The resistance is shown to be analogous to the Sharvin resistance, and the inductance analogous to kinetic inductance in electronics. This atomtronic circuit is implemented with a thermal sample of laser cooled rubidium atoms. The atoms are confined using what we call free-space atom chips, a novel optical dipole trap produced using a generalized phase-contrast imaging technique. We will also discuss progress toward implementing this atomtronic system in a degenerate Bose gas.
Semiconductor integrated circuits
International Nuclear Information System (INIS)
An improved method involving ion implantation to form non-epitaxial semiconductor integrated circuits. These are made by forming a silicon substrate of one conductivity type with a recessed silicon dioxide region extending into the substrate and enclosing a portion of the silicon substrate. A beam of ions of opposite conductivity type impurity is directed at the substrate at an energy and dosage level sufficient to form a first region of opposite conductivity within the silicon dioxide region. This impurity having a concentration peak below the surface of the substrate forms a region of the one conductivity type which extends from the substrate surface into the first opposite type region to a depth between the concentration peak and the surface and forms a second region of opposite conductivity type. The method, materials and ion beam conditions are detailed. Vertical bipolar integrated circuits can be made this way when the first opposite type conductivity region will function as a collector. Also circuits with inverted bipolar devices when this first region functions as a 'buried'' emitter region. (U.K.)
Is the Ninth Circuit Too Large? A Statistical Study of Judicial Quality.
Posner, Richard A.
2000-01-01
This paper provides an empirical test of the claim that the U.S. Court of Appeals for the Ninth Circuit has too many judges to be able to do a good job. Reversals (especially summary reversals) by the Supreme Court and citations are used as proxies for quality of judicial output. The overall conclusion is that (1) adding judgeships tends to reduce the quality of a court's output and (2) the Ninth Circuit's uniquely high rate of being summarily reversed by the Supreme Court (a) is probably not...
Changes to the shuttle circuits
GS Department
2011-01-01
To fit with passengers expectation, there will be some changes to the shuttle circuits as from Monday 10 October. See details on http://cern.ch/ShuttleService (on line on 7 October). Circuit No. 5 is cancelled as circuit No. 1 also stops at Bldg. 33. In order to guarantee shorter travel times, circuit No. 1 will circulate on Meyrin site only and circuit No. 2, with departures from Bldg. 33 and 500, on Prévessin site only. Site Services Section
Experimental determination of circuit equations
Shulman, Jason; Widjaja, Matthew; Gunaratne, Gemunu H
2013-01-01
Kirchhoff's laws offer a general, straightforward approach to circuit analysis. Unfortunately, use of the laws becomes impractical for all but the simplest of circuits. This work presents a novel method of analyzing direct current resistor circuits. It is based on an approach developed to model complex networks, making it appropriate for use on large, complicated circuits. It is unique in that it is not an analytic method. It is based on experiment, yet the approach produces the same circuit equations obtained by more traditional means.
Power system with an integrated lubrication circuit
Hoff, Brian D.; Akasam, Sivaprasad; Algrain, Marcelo C.; Johnson, Kris W.; Lane, William H.
2009-11-10
A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.
Efficient Approaches for Designing Fault Tolerant Reversible Carry Look-Ahead and Carry-Skip Adders
Islam, Md Saiful; begum, Zerina; Hafiz, Mohd Zulfiquar
2010-01-01
Combinational or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its corresponding output vector. Reversible logic circuit implements only the functions having one-to-one mapping between its input and output vectors and therefore naturally takes care of heating. Reversible logic design becomes one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power CMOS design, digital signal processing and nanotechnology. This paper presents the efficient approaches for designing fault tolerant reversible fast adders that implement carry look-ahead and carry-skip logic. The proposed high speed reversible adders include MIG gates for the realization of its basic building block. The MIG gate is universal and parity preserving. It allows any fault that affects no more than a single signal readily detectable at the circuit's primary outputs...
Integrated coherent matter wave circuits
International Nuclear Information System (INIS)
An integrated coherent matter wave circuit is a single device, analogous to an integrated optical circuit, in which coherent de Broglie waves are created and then launched into waveguides where they can be switched, divided, recombined, and detected as they propagate. Applications of such circuits include guided atom interferometers, atomtronic circuits, and precisely controlled delivery of atoms. We report experiments demonstrating integrated circuits for guided coherent matter waves. The circuit elements are created with the painted potential technique, a form of time-averaged optical dipole potential in which a rapidly moving, tightly focused laser beam exerts forces on atoms through their electric polarizability. Moreover, the source of coherent matter waves is a Bose-Einstein condensate (BEC). Finally, we launch BECs into painted waveguides that guide them around bends and form switches, phase coherent beamsplitters, and closed circuits. These are the basic elements that are needed to engineer arbitrarily complex matter wave circuitry
Memristor based startup circuit for self biased circuits
Das, Mangal; Singh, Amit Kumar; Rathi, Amit; Singhal, Sonal
2016-04-01
This paper presents the design of a Memristor based startup circuit for self biased circuits. Memristor has many advantages over conventional CMOS devices such as low leakage current at nanometer scale, easy to manufacture. In this work the switching characteristics of memristor is utilized. First the theoretical equations describing the switching behavior of memristor are investigated. To prove the switching capability of Memristor, a startup circuit based on memristor is proposed which uses series combination of Memristor and capacitor. Proposed circuit is compared with the previously reported MOSFET based startup circuits. Comparison of different circuits was done to validate the results. Simulation results show that memristor based circuit can attain on (I = 12.94 µA) to off state (I = 1 .2 µA) in 25 ns while the MOSFET based startup circuits take on (I = 14.19 µA) to off state (I = 1.4 µA) in more than 90 ns. The benefit comes in terms of area because the number of components used in the circuit are lesser than the conventional startup circuits.
Full Text Available ... you can use for reverse shoulder replacement. The standard delto-pectoral approach, or the superior approach, which ... that are different between a reverse and a standard total is, first of all, we don't ...
Full Text Available ... the height perfectly to get anatomic head tuberosity relationships. If you're doing a reverse for a ... less limited with the superior reverse versus the traditional. And I assume the question means the approach: ...
Electronics circuits and systems
Bishop, Owen
2007-01-01
The material in Electronics - Circuits and Systems is a truly up-to-date textbook, with coverage carefully matched to the electronics units of the 2007 BTEC National Engineering and the latest AS and A Level specifications in Electronics from AQA, OCR and WJEC. The material has been organized with a logical learning progression, making it ideal for a wide range of pre-degree courses in electronics. The approach is student-centred and includes: numerous examples and activities; web research topics; Self Test features, highlighted key facts, formulae and definitions. Each chapter ends with a set
Gibson, J
2013-01-01
Most branches of organizing utilize digital electronic systems. This book introduces the design of such systems using basic logic elements as the components. The material is presented in a straightforward manner suitable for students of electronic engineering and computer science. The book is also of use to engineers in related disciplines who require a clear introduction to logic circuits. This third edition has been revised to encompass the most recent advances in technology as well as the latest trends in components and notation. It includes a wide coverage of application specific integrate
Merritt, Scott; Krainak, Michael
2016-01-01
Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.
International Nuclear Information System (INIS)
This book is about digital logic circuit test, which lists the digital basic theory, basic gate like and, or And Not gate, NAND/NOR gate such as NAND gate, NOR gate, AND and OR, logic function, EX-OR gate, adder and subtractor, decoder and encoder, multiplexer, demultiplexer, flip-flop, counter such as up/down counter modulus N counter and Reset type counter, shift register, D/A and A/D converter and two supplements list of using components and TTL manual and CMOS manual.
Biophotonic integrated circuits
Cohen, Daniel A.; Nolde, Jill A.; Wang, Chad S.; Skogen, Erik J.; Rivlin, A.; Coldren, Larry A.
2004-12-01
Biosensors rely on optical techniques to obtain high sensitivity and speed, but almost all biochips still require external light sources, optics, and detectors, which limits the widespread use of these devices. The optoelectronics technology base now allows monolithic integration of versatile optical sources, novel sensing geometries, filters, spectrometers, and detectors, enabling highly integrated chip-scale sensors. We discuss biophotonic integrated circuits built on both GaAs and InP substrates, incorporating widely tunable lasers, novel evanescent field sensing waveguides, heterodyne spectrometers, and waveguide photodetectors, suitable for high sensitivity transduction of affinity assays.
Electric circuits problem solver
REA, Editors of
2012-01-01
Each Problem Solver is an insightful and essential study and solution guide chock-full of clear, concise problem-solving gems. All your questions can be found in one convenient source from one of the most trusted names in reference solution guides. More useful, more practical, and more informative, these study aids are the best review books and textbook companions available. Nothing remotely as comprehensive or as helpful exists in their subject anywhere. Perfect for undergraduate and graduate studies.Here in this highly useful reference is the finest overview of electric circuits currently av
Optoelectronics circuits manual
Marston, R M
1999-01-01
This manual is a useful single-volume guide specifically aimed at the practical design engineer, technician, and experimenter, as well as the electronics student and amateur. It deals with the subject in an easy to read, down to earth, and non-mathematical yet comprehensive manner, explaining the basic principles and characteristics of the best known devices, and presenting the reader with many practical applications and over 200 circuits. Most of the ICs and other devices used are inexpensive and readily available types, with universally recognised type numbers.The second edition
Closed Circuit Videoinstallationen
DEFF Research Database (Denmark)
Kacunko, Slavko
and 650 artists. This and the notes on further reading and viewing will enable deeper explorations of the material in a way not unlike the open “hyper-text”- structure. Video technique makes it possible to simultaneously record and reproduce images, sound and sequences of motion; that potential can...... and at the same time general investigations. The research project, ‘Closed-Circuit-Video Installations. A Study on the History and Theory of Media Art’, is being supported by the Fritz-Thyssen Foundation, Cologne....
Electronics circuits and systems
Bishop, Owen
2011-01-01
The material in Electronics - Circuits and Systems is a truly up-to-date textbook, with coverage carefully matched to the electronics units of the 2007 BTEC National Engineering and the latest AS and A Level specifications in Electronics from AQA, OCR and WJEC. The material has been organized with a logical learning progression, making it ideal for a wide range of pre-degree courses in electronics. The approach is student-centred and includes: numerous examples and activities; web research topics; Self Test features, highlighted key facts, formulae and definitions. Ea
Integrated circuit cell library
Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor)
2005-01-01
According to the invention, an ASIC cell library for use in creation of custom integrated circuits is disclosed. The ASIC cell library includes some first cells and some second cells. Each of the second cells includes two or more kernel cells. The ASIC cell library is at least 5% comprised of second cells. In various embodiments, the ASIC cell library could be 10% or more, 20% or more, 30% or more, 40% or more, 50% or more, 60% or more, 70% or more, 80% or more, 90% or more, or 95% or more comprised of second cells.
Carr, Joseph
1996-01-01
The linear IC market is large and growing, as is the demand for well trained technicians and engineers who understand how these devices work and how to apply them. Linear Integrated Circuits provides in-depth coverage of the devices and their operation, but not at the expense of practical applications in which linear devices figure prominently. This book is written for a wide readership from FE and first degree students, to hobbyists and professionals.Chapter 1 offers a general introduction that will provide students with the foundations of linear IC technology. From chapter 2 onwa
Reverse cholesterol transport revisited
Institute of Scientific and Technical Information of China (English)
Astrid; E; van; der; Velde
2010-01-01
Reverse cholesterol transport was originally described as the high-density lipoprotein-mediated cholesterol flux from the periphery via the hepatobiliary tract to the intestinal lumen, leading to fecal excretion. Since the introduction of reverse cholesterol transport in the 1970s, this pathway has been intensively investigated. In this topic highlight, the classical reverse cholesterol transport concepts are discussed and the subject reverse cholesterol transport is revisited.
Optically controllable molecular logic circuits
International Nuclear Information System (INIS)
Molecular logic circuits represent a promising technology for observation and manipulation of biological systems at the molecular level. However, the implementation of molecular logic circuits for temporal and programmable operation remains challenging. In this paper, we demonstrate an optically controllable logic circuit that uses fluorescence resonance energy transfer (FRET) for signaling. The FRET-based signaling process is modulated by both molecular and optical inputs. Based on the distance dependence of FRET, the FRET pathways required to execute molecular logic operations are formed on a DNA nanostructure as a circuit based on its molecular inputs. In addition, the FRET pathways on the DNA nanostructure are controlled optically, using photoswitching fluorescent molecules to instruct the execution of the desired operation and the related timings. The behavior of the circuit can thus be controlled using external optical signals. As an example, a molecular logic circuit capable of executing two different logic operations was studied. The circuit contains functional DNAs and a DNA scaffold to construct two FRET routes for executing Input 1 AND Input 2 and Input 1 AND NOT Input 3 operations on molecular inputs. The circuit produced the correct outputs with all possible combinations of the inputs by following the light signals. Moreover, the operation execution timings were controlled based on light irradiation and the circuit responded to time-dependent inputs. The experimental results demonstrate that the circuit changes the output for the required operations following the input of temporal light signals
Optically controllable molecular logic circuits
Energy Technology Data Exchange (ETDEWEB)
Nishimura, Takahiro, E-mail: t-nishimura@ist.osaka-u.ac.jp; Fujii, Ryo; Ogura, Yusuke; Tanida, Jun [Graduate School of Information Science and Technology, Osaka University, 1-5 Yamadaoka, Suita, Osaka 565-0871 (Japan)
2015-07-06
Molecular logic circuits represent a promising technology for observation and manipulation of biological systems at the molecular level. However, the implementation of molecular logic circuits for temporal and programmable operation remains challenging. In this paper, we demonstrate an optically controllable logic circuit that uses fluorescence resonance energy transfer (FRET) for signaling. The FRET-based signaling process is modulated by both molecular and optical inputs. Based on the distance dependence of FRET, the FRET pathways required to execute molecular logic operations are formed on a DNA nanostructure as a circuit based on its molecular inputs. In addition, the FRET pathways on the DNA nanostructure are controlled optically, using photoswitching fluorescent molecules to instruct the execution of the desired operation and the related timings. The behavior of the circuit can thus be controlled using external optical signals. As an example, a molecular logic circuit capable of executing two different logic operations was studied. The circuit contains functional DNAs and a DNA scaffold to construct two FRET routes for executing Input 1 AND Input 2 and Input 1 AND NOT Input 3 operations on molecular inputs. The circuit produced the correct outputs with all possible combinations of the inputs by following the light signals. Moreover, the operation execution timings were controlled based on light irradiation and the circuit responded to time-dependent inputs. The experimental results demonstrate that the circuit changes the output for the required operations following the input of temporal light signals.
Sequential circuit design for radiation hardened multiple voltage integrated circuits
Clark, Lawrence T.; McIver, III, John K.
2009-11-24
The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.
Johnson, Steven D.; Byers, Jerry W.; Martin, James A.
2012-01-01
A method has been developed for continuous cell voltage balancing for rechargeable batteries (e.g. lithium ion batteries). A resistor divider chain is provided that generates a set of voltages representing the ideal cell voltage (the voltage of each cell should be as if the cells were perfectly balanced). An operational amplifier circuit with an added current buffer stage generates the ideal voltage with a very high degree of accuracy, using the concept of negative feedback. The ideal voltages are each connected to the corresponding cell through a current- limiting resistance. Over time, having the cell connected to the ideal voltage provides a balancing current that moves the cell voltage very close to that ideal level. In effect, it adjusts the current of each cell during charging, discharging, and standby periods to force the cell voltages to be equal to the ideal voltages generated by the resistor divider. The device also includes solid-state switches that disconnect the circuit from the battery so that it will not discharge the battery during storage. This solution requires relatively few parts and is, therefore, of lower cost and of increased reliability due to the fewer failure modes. Additionally, this design uses very little power. A preliminary model predicts a power usage of 0.18 W for an 8-cell battery. This approach is applicable to a wide range of battery capacities and voltages.
Bradley, William; Bird, Ross; Eldred, Dennis; Zook, Jon; Knowles, Gareth
2013-01-01
This work involved developing spacequalifiable switch mode DC/DC power supplies that improve performance with fewer components, and result in elimination of digital components and reduction in magnetics. This design is for missions where systems may be operating under extreme conditions, especially at elevated temperature levels from 200 to 300 degC. Prior art for radiation-tolerant DC/DC converters has been accomplished utilizing classical magnetic-based switch mode converter topologies; however, this requires specific shielding and component de-rating to meet the high-reliability specifications. It requires complex measurement and feedback components, and will not enable automatic re-optimization for larger changes in voltage supply or electrical loading condition. The innovation is a switch mode DC/DC power supply that eliminates the need for processors and most magnetics. It can provide a well-regulated voltage supply with a gain of 1:100 step-up to 8:1 step down, tolerating an up to 30% fluctuation of the voltage supply parameters. The circuit incorporates a ceramic core transformer in a manner that enables it to provide a well-regulated voltage output without use of any processor components or magnetic transformers. The circuit adjusts its internal parameters to re-optimize its performance for changes in supply voltage, environmental conditions, or electrical loading at the output
A bit serial sequential circuit
Hu, S.; Whitaker, S.
1990-01-01
Normally a sequential circuit with n state variables consists of n unique hardware realizations, one for each state variable. All variables are processed in parallel. This paper introduces a new sequential circuit architecture that allows the state variables to be realized in a serial manner using only one next state logic circuit. The action of processing the state variables in a serial manner has never been addressed before. This paper presents a general design procedure for circuit construction and initialization. Utilizing pass transistors to form the combinational next state forming logic in synchronous sequential machines, a bit serial state machine can be realized with a single NMOS pass transistor network connected to shift registers. The bit serial state machine occupies less area than other realizations which perform parallel operations. Moreover, the logical circuit of the bit serial state machine can be modified by simply changing the circuit input matrix to develop an adaptive state machine.
Synthetic Biology: Integrated Gene Circuits
Nandagopal, Nagarajan; Michael B Elowitz
2011-01-01
A major goal of synthetic biology is to develop a deeper understanding of biological design principles from the bottom up, by building circuits and studying their behavior in cells. Investigators initially sought to design circuits “from scratch” that functioned as independently as possible from the underlying cellular system. More recently, researchers have begun to develop a new generation of synthetic circuits that integrate more closely with endogenous cellular processes. These approaches...
Quantum Circuits with Mixed States
Aharonov, Dorit; Kitaev, Alexei; Nisan, Noam
1998-01-01
We define the model of quantum circuits with density matrices, where non-unitary gates are allowed. Measurements in the middle of the computation, noise and decoherence are implemented in a natural way in this model, which is shown to be equivalent in computational power to standard quantum circuits. The main result in this paper is a solution for the subroutine problem: The general function that a quantum circuit outputs is a probabilistic function, but using pure state language, such a func...
Microwatt Switched Capacitor Circuit Design
Vittoz, E.
1982-01-01
The micropower CMOS implementation of the three basic components of switched capacitor circuits is discussed. Switches must be carefully designed to allow low voltage operation and compensation of clock feed-through by dummy transistors. Matched capacitors can be implemented in single polysilicon technologies primarily designed for digital micropower circuits. Excellent micropower amplifiers are realized by using simple one-stage circuits which take advantage of the special behaviour of MOS t...
CMOS Nonlinear Signal Processing Circuits
Hung,; Yu-Cherng,
2010-01-01
The chapter describes various nonlinear signal processing CMOS circuits, including a high reliable WTA/LTA, simple MED cell, and low-voltage arbitrary order extractor. We focus the discussion on CMOS analog circuit design with reliable, programmable capability, and low voltage operation. It is a practical problem when the multiple identical cells are required to match and realized within a single chip using a conventional process. Thus, the design of high-reliable circuit is indeed needed. Th...
49 CFR 236.13 - Spring switch; selection of signal control circuits through circuit controller.
2010-10-01
... circuits through circuit controller. 236.13 Section 236.13 Transportation Other Regulations Relating to...; selection of signal control circuits through circuit controller. The control circuits of signals governing... circuit controller, or through the contacts of relay repeating the position of such circuit...
Crespo Yepes, Albert; Martín Martínez, Javier; de Rothschild, A.; Rodríguez Martínez, Rosana; Nafría i Maqueda, Montserrat; Aymerich Humet, Xavier
2010-01-01
The reversibility of the gate dielectric breakdown in ultra-thin high-k dielectric stacks is reported and analyzed. The electrical performance of MOSFETs after the dielectric recovery is modeled and introduced in a circuit simulator. The simulation of several digital circuits shows that their functionality can be restored after the BD recovery.
A Circuit to Demonstrate Phase Relationships in "RLC" Circuits
Sokol, P. E.; Warren, G.; Zheng, B.; Smith, P.
2013-01-01
We have developed a circuit to demonstrate the phase relationships between resistive and reactive elements in series "RLC" circuits. We utilize a differential amplifier to allow the phases of the three elements and the current to be simultaneously displayed on an inexpensive four channel oscilloscope. We have included a novel circuit…
Buckley, P M
1980-01-01
In the past, the teaching of electricity and electronics has more often than not been carried out from a theoretical and often highly academic standpoint. Fundamentals and basic concepts have often been presented with no indication of their practical appli cations, and all too frequently they have been illustrated by artificially contrived laboratory experiments bearing little relationship to the outside world. The course comes in the form of fourteen fairly open-ended constructional experiments or projects. Each experiment has associated with it a construction exercise and an explanation. The basic idea behind this dual presentation is that the student can embark on each circuit following only the briefest possible instructions and that an open-ended approach is thereby not prejudiced by an initial lengthy encounter with the theory behind the project; this being a sure way to dampen enthusiasm at the outset. As the investigation progresses, questions inevitably arise. Descriptions of the phenomena encounte...
Rosaria Marraffino
2014-01-01
You have always been told that electronic devices fear water. However, at the Surface Mount Devices (SMD) Workshop here at CERN all the electronic assemblies are cleaned with a machine that looks like a… dishwasher. The circuit dishwasher. Credit: Clara Nellist. If you think the image above shows a dishwasher, you wouldn’t be completely wrong. Apart from the fact that the whole pumping system and the case itself are made entirely from stainless steel and chemical resistant materials, and the fact that it washes electrical boards instead of dishes… it works exactly like a dishwasher. It’s a professional machine (mainly used in the pharmaceutical industry) designed to clean everything that can be washed with a water-based chemical soap. This type of treatment increases the lifetime of the electronic boards and therefore the LHC's reliability by preventing corrosion problems in the severe radiation and ozone environment of the LHC tunn...
Memristor Circuits and Systems
Zidan, Mohammed A.
2015-05-01
Current CMOS-based technologies are facing design challenges related to the continuous scaling down of the minimum feature size, according to Moore’s law. Moreover, conventional computing architecture is no longer an effective way of fulfilling modern applications demands, such as big data analysis, pattern recognition, and vector processing. Therefore, there is an exigent need to shift to new technologies, at both the architecture and the device levels. Recently, memristor devices and structures attracted attention for being promising candidates for this job. Memristor device adds a new dimension for designing novel circuits and systems. In addition, high-density memristor-based crossbar is widely considered to be the essential element for future memory and bio-inspired computing systems. However, numerous challenges need to be addressed before the memristor genuinely replaces current memory and computing technologies, which is the motivation behind this research effort. In order to address the technology challenges, we begin by fabricating and modeling the memristor device. The devices fabricated at our local clean room enriched our understanding of the memristive phenomenon and enabled the experimental testing for our memristor-based circuits. Moreover, our proposed mathematical modeling for memristor behavior is an essential element for the theoretical circuit design stage. Designing and addressing the challenges of memristor systems with practical complexity, however, requires an extra step, which takes the form of a reliable and modular simulation platform. We, therefore, built a new simulation platform for the resistive crossbar, which can simulate realistic size arrays filled with real memory data. In addition, this simulation platform includes various crossbar nonidealities in order to obtain accurate simulation results. Consequently, we were able to address the significant challenges facing the high density memristor crossbar, as the building block for
Energy Technology Data Exchange (ETDEWEB)
Rohrer, Brandon Robinson; Rothganger, Fredrick H.; Verzi, Stephen J.; Xavier, Patrick Gordon
2010-09-01
The neocortex is perhaps the highest region of the human brain, where audio and visual perception takes place along with many important cognitive functions. An important research goal is to describe the mechanisms implemented by the neocortex. There is an apparent regularity in the structure of the neocortex [Brodmann 1909, Mountcastle 1957] which may help simplify this task. The work reported here addresses the problem of how to describe the putative repeated units ('cortical circuits') in a manner that is easily understood and manipulated, with the long-term goal of developing a mathematical and algorithmic description of their function. The approach is to reduce each algorithm to an enhanced perceptron-like structure and describe its computation using difference equations. We organize this algorithmic processing into larger structures based on physiological observations, and implement key modeling concepts in software which runs on parallel computing hardware.
VLSI circuits implementing computational models of neocortical circuits.
Wijekoon, Jayawan H B; Dudek, Piotr
2012-09-15
This paper overviews the design and implementation of three neuromorphic integrated circuits developed for the COLAMN ("Novel Computing Architecture for Cognitive Systems based on the Laminar Microcircuitry of the Neocortex") project. The circuits are implemented in a standard 0.35 μm CMOS technology and include spiking and bursting neuron models, and synapses with short-term (facilitating/depressing) and long-term (STDP and dopamine-modulated STDP) dynamics. They enable execution of complex nonlinear models in accelerated-time, as compared with biology, and with low power consumption. The neural dynamics are implemented using analogue circuit techniques, with digital asynchronous event-based input and output. The circuits provide configurable hardware blocks that can be used to simulate a variety of neural networks. The paper presents experimental results obtained from the fabricated devices, and discusses the advantages and disadvantages of the analogue circuit approach to computational neural modelling. PMID:22342970
Circuit breakers for addiction.
Foy, A
2007-05-01
The phenomenon of addiction is complex, although its expression clinically is relatively straightforward. There is a series of neurophysiological changes that mediate changes in the mesolimbic and mesocortical systems which in turn lead to disturbances in reward mechanisms. These then act to perpetuate the cycle of intoxication and reinforcement, withdrawal, craving and compulsive use. As our understanding of the pathophysiology of this process has improved, new pharmacological agents have been developed with the potential to moderate or even reverse it. This article briefly reviews the treatment of addiction with particular reference to emerging pharmaceutical agents. PMID:17504280
Feasible Methodology for Optimization of a Novel Reversible Binary Compressor
Directory of Open Access Journals (Sweden)
Neeraj Kumar Misra
2015-08-01
Full Text Available Now a day’s reversible logic is an attractive research area due to its low power consumption in the area of VLSI circuit design. The reversible logic gate is utilized to optimize power consumption by a feature of retrieving input logic from an output logic because of bijective mapping between input and output. In this manuscript, we design 4:2 and 5:2 reversible compressor circuits using a new type of reversible gate. In addition, we propose new gate, named as inventive0 gate for optimizing a compressor circuit. The utility of the inventive0 gate is that it can be used as full adder and full subtraction with low value of garbage outputs and quantum cost. An algorithm is shown for designing a compressor structure. The comparative study shows that the proposed compressor structure outperforms the existing ones in terms of garbage outputs, number of gates and quantum cost. The compressor can reduce the effect of carry (Produce from full adder of the arithmetic frame design. In addition, we implement a basic reversible gate of MOS transistor with less number of MOS transistor count
The GABAergic Anterior Paired Lateral Neurons Facilitate Olfactory Reversal Learning in "Drosophila"
Wu, Yanying; Ren, Qingzhong; Li, Hao; Guo, Aike
2012-01-01
Reversal learning has been widely used to probe the implementation of cognitive flexibility in the brain. Previous studies in monkeys identified an essential role of the orbitofrontal cortex (OFC) in reversal learning. However, the underlying circuits and molecular mechanisms are poorly understood. Here, we use the T-maze to investigate the neural…
Demonstrations with an "LCR" Circuit
Kraftmakher, Yaakov
2011-01-01
The "LCR" circuit is an important topic in the course of electricity and magnetism. Papers in this field consider mainly the forced oscillations and resonance. Our aim is to show how to demonstrate the free and self-excited oscillations in an "LCR" circuit. (Contains 4 figures.)
Enhancement of Linear Circuit Program
DEFF Research Database (Denmark)
Gaunholt, Hans; Dabu, Mihaela; Beldiman, Octavian
1996-01-01
In this report a preliminary user friendly interface has been added to the LCP2 program making it possible to describe an electronic circuit by actually drawing the circuit on the screen. Component values and other options and parameters can easily be set by the aid of the interface. The interfac...
Improved simulation of stabilizer circuits
International Nuclear Information System (INIS)
The Gottesman-Knill theorem says that a stabilizer circuit - that is, a quantum circuit consisting solely of controlled-NOT (CNOT), Hadamard, and phase gates - can be simulated efficiently on a classical computer. This paper improves that theorem in several directions. First, by removing the need for Gaussian elimination, we make the simulation algorithm much faster at the cost of a factor of 2 increase in the number of bits needed to represent a state. We have implemented the improved algorithm in a freely available program called CHP (CNOT-Hadamard-phase), which can handle thousands of qubits easily. Second, we show that the problem of simulating stabilizer circuits is complete for the classical complexity class +L, which means that stabilizer circuits are probably not even universal for classical computation. Third, we give efficient algorithms for computing the inner product between two stabilizer states, putting any n-qubit stabilizer circuit into a 'canonical form' that requires at most O(n2/log n) gates, and other useful tasks. Fourth, we extend our simulation algorithm to circuits acting on mixed states, circuits containing a limited number of nonstabilizer gates, and circuits acting on general tensor-product initial states but containing only a limited number of measurements
Pharmacokinetics and "RC" Circuit Concepts
De Cock, Mieke; Janssen, Paul
2013-01-01
Most introductory physics courses include a chapter on "RC" circuits in which the differential equations for the charging and discharging of a capacitor are derived. A number of papers in this journal describe lab experiments dealing with the measurement of different parameters in such "RC" circuits. In this contribution, we…
Postirradiation Effects In Integrated Circuits
Shaw, David C.; Barnes, Charles E.
1993-01-01
Two reports discuss postirradiation effects in integrated circuits. Presents examples of postirradiation measurements of performances of integrated circuits of five different types: dual complementary metal oxide/semiconductor (CMOS) flip-flop; CMOS analog multiplier; two CMOS multiplying digital-to-analog converters; electrically erasable programmable read-only memory; and semiconductor/oxide/semiconductor octal buffer driver.
Demultiplexer circuit for neural stimulation
Wessendorf, Kurt O; Okandan, Murat; Pearson, Sean
2012-10-09
A demultiplexer circuit is disclosed which can be used with a conventional neural stimulator to extend the number of electrodes which can be activated. The demultiplexer circuit, which is formed on a semiconductor substrate containing a power supply that provides all the dc electrical power for operation of the circuit, includes digital latches that receive and store addressing information from the neural stimulator one bit at a time. This addressing information is used to program one or more 1:2.sup.N demultiplexers in the demultiplexer circuit which then route neural stimulation signals from the neural stimulator to an electrode array which is connected to the outputs of the 1:2.sup.N demultiplexer. The demultiplexer circuit allows the number of individual electrodes in the electrode array to be increased by a factor of 2.sup.N with N generally being in a range of 2-4.
Electronic design with integrated circuits
Comer, D. J.
The book is concerned with the application of integrated circuits and presents the material actually needed by the system designer to do an effective job. The operational amplifier (op amp) is discussed, taking into account the electronic amplifier, the basic op amp, the practical op amp, analog applications, and digital applications. Digital components are considered along with combinational logic, digital subsystems, the microprocessor, special circuits, communications, and integrated circuit building blocks. Attention is given to logic gates, logic families, multivibrators, the digital computer, digital methods, communicating with a computer, computer organization, register and timing circuits for data transfer, arithmetic circuits, memories, the microprocessor chip, the control unit, communicating with the microprocessor, examples of microprocessor architecture, programming a microprocessor, the voltage-controlled oscillator, the phase-locked loop, analog-to-digital conversion, amplitude modulation, frequency modulation, pulse and digital transmission, the semiconductor diode, the bipolar transistor, and the field-effect transistor.
"Reverse" Nested Lottery Contests
Qiang Fu; Jingfeng Lu; Zhewei Wang
2013-01-01
This paper proposes a multi-prize "reverse" nested lottery contest model, which can be viewed as the "mirror image" of the conventional nested lottery contest of Clark and Riis (1996a). The reverse-lottery contest model determines winners by selecting losers based on contestants' one-shot effort through a hypothetical sequence of lotteries. We provide a microfoundation for the reverse-lottery contest from a perspective of (simultaneous) noisy performance ranking and establish that the model i...
49 CFR 236.728 - Circuit, trap.
2010-10-01
... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, trap. 236.728 Section 236.728... Circuit, trap. A term applied to a circuit used where it is desirable to provide a track circuit but where it is impracticable to maintain a track circuit....
Posterior Reversible Encephalopathy Syndrome
J Gordon Millichap
2013-01-01
Investigators at Children's Hospital of Montefiore, Albert Einstein College of Medicine, NY, determined the incidence of posterior reversible encephalopathy syndrome (PRES) in a pediatric critical care unit.
Reversible optical-to-microwave quantum interface.
Barzanjeh, Sh; Abdi, M; Milburn, G J; Tombesi, P; Vitali, D
2012-09-28
We describe a reversible quantum interface between an optical and a microwave field using a hybrid device based on their common interaction with a micromechanical resonator in a superconducting circuit. We show that, by employing state-of-the-art optoelectromechanical devices, one can realize an effective source of (bright) two-mode squeezing with an optical idler (signal) and a microwave signal, which can be used for high-fidelity transfer of quantum states between optical and microwave fields by means of continuous variable teleportation. PMID:23030075
From Boolean Network Model to Continuous Model Helps in Design of Functional Circuits
Bin Shao; Xiang Liu; Dongliang Zhang; Jiayi Wu; Qi Ouyang
2015-01-01
Computational circuit design with desired functions in a living cell is a challenging task in synthetic biology. To achieve this task, numerous methods that either focus on small scale networks or use evolutionary algorithms have been developed. Here, we propose a two-step approach to facilitate the design of functional circuits. In the first step, the search space of possible topologies for target functions is reduced by reverse engineering using a Boolean network model. In the second step, ...
Design-for-delay-testability techniques for high-speed digital circuits
Vermaak, Hermanus Jacobus
2005-01-01
The importance of delay faults is enhanced by the ever increasing clock rates and decreasing geometry sizes of nowadays' circuits. This thesis focuses on the development of Design-for-Delay-Testability (DfDT) techniques for high-speed circuits and embedded cores. The rising costs of IC testing and in particular the costs of Automatic Test Equipment are major concerns for the semiconductor industry. To reverse the trend of rising testing costs, DfDT is getting more and more important.
Improvement of driver to gate coupling circuits for SiC MOSFETS
Balcells Sendra, Josep; Mon González, Juan; Lamich Arocas, Manuel; Laguna, Alberto
2014-01-01
This work presents a study of the influence of different gate driver circuits on the switching behavior of SiC MOSFET devices used in a buck converter. The paper is based on several tests performed to determine the switching times and switching losses, using different reverse bias VGS voltage levels and different passive RCD (Resistance Capacitor Diode) circuits to interface the driver to the SiC MOSFET gate. Peer Reviewed
Reverse logistics as a means of organizational instrumentalization of sustainable development
Avero, Sharinne Allanne de Jesus; Senhoras, Eloi Martins
2014-01-01
The reverse, reverse or green logistics is an area of growing importance in business administration as it related to a logic behind forward in the management of physical flows of products and packaging, from the consumption points towards the production sites in order to implement a systemic logic of recycling, reuse and waste materials in their own supply chain. Based on these discussions, the book "Reverse logistics and sustainability" addresses the supply chain from a closed circuit, in...
Variational integrators for electric circuits
International Nuclear Information System (INIS)
In this contribution, we develop a variational integrator for the simulation of (stochastic and multiscale) electric circuits. When considering the dynamics of an electric circuit, one is faced with three special situations: 1. The system involves external (control) forcing through external (controlled) voltage sources and resistors. 2. The system is constrained via the Kirchhoff current (KCL) and voltage laws (KVL). 3. The Lagrangian is degenerate. Based on a geometric setting, an appropriate variational formulation is presented to model the circuit from which the equations of motion are derived. A time-discrete variational formulation provides an iteration scheme for the simulation of the electric circuit. Dependent on the discretization, the intrinsic degeneracy of the system can be canceled for the discrete variational scheme. In this way, a variational integrator is constructed that gains several advantages compared to standard integration tools for circuits; in particular, a comparison to BDF methods (which are usually the method of choice for the simulation of electric circuits) shows that even for simple LCR circuits, a better energy behavior and frequency spectrum preservation can be observed using the developed variational integrator
30 CFR 75.800 - High-voltage circuits; circuit breakers.
2010-07-01
... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 75.800... § 75.800 High-voltage circuits; circuit breakers. High-voltage circuits entering the underground area of any coal mine shall be protected by suitable circuit breakers of adequate interrupting...
Reversible cerebral vasoconstriction syndrome
Directory of Open Access Journals (Sweden)
Saini Monica
2009-01-01
Full Text Available Reversible cerebral vasoconstriction syndromes (RCVS are a group of disorders that have in common an acute presentation with headache, reversible vasoconstriction of cerebral arteries, with or without neurological signs and symptoms. In contrast to primary central nervous system vasculitis, they have a relatively benign course. We describe here a patient who was diagnosed with RCVS.
Quantum reverse hypercontractivity
Energy Technology Data Exchange (ETDEWEB)
Cubitt, Toby [Department of Computer Science, University College London, London, United Kingdom and Centre for Quantum Information and Foundations, DAMTP, University of Cambridge, Cambridge (United Kingdom); Kastoryano, Michael [NBIA, Niels Bohr Institute, University of Copenhagen, 2100 Copenhagen (Denmark); Montanaro, Ashley [School of Mathematics, University of Bristol, Bristol (United Kingdom); Temme, Kristan [Institute for Quantum Information and Matter, California Institute of Technology, Pasadena, California 91125 (United States)
2015-10-15
We develop reverse versions of hypercontractive inequalities for quantum channels. By generalizing classical techniques, we prove a reverse hypercontractive inequality for tensor products of qubit depolarizing channels. We apply this to obtain a rapid mixing result for depolarizing noise applied to large subspaces and to prove bounds on a quantum generalization of non-interactive correlation distillation.
Spectral Purity Enhancement via Polyphase Multipath Circuits
Mensink, Eisse; Klumperink, Eric; Nauta, Bram
2004-01-01
The central question of this paper is: can we enhance the spectral purity of nonlinear circuits by using polyphase multipath circuits? The basic idea behind polyphase multipath circuits is to split the nonlinear circuits into two or more paths and exploit phase differences between these paths to cancel undesired distortion products. It turns out that it is very well possible to use polyphase multipath circuits to cancel distortion products produced by a nonlinear circuit. Unfortunately, there...
The Maplin electronic circuits handbook
Tooley, Michael
2015-01-01
The Maplin Electronic Circuits Handbook provides pertinent data, formula, explanation, practical guidance, theory and practical guidance in the design, testing, and construction of electronic circuits. This book discusses the developments in electronics technology techniques.Organized into 11 chapters, this book begins with an overview of the common types of passive component. This text then provides the reader with sufficient information to make a correct selection of passive components for use in the circuits. Other chapters consider the various types of the most commonly used semiconductor
Design, Analysis, Implementation and Synthesis of 16 bit Reversible ALU by using Xilinx 12.2
Directory of Open Access Journals (Sweden)
S.Anusha
2014-04-01
Full Text Available In the modern world, Arithmetic Logic Unit (ALU is one of the most crucial components of any system and is used in many appliances like calculators, cell phones, and computers and so on. An arithmetic logic unit is a multi-functional circuit that conditionally performs one of several possible functions on two operands A and B depending on control inputs. This paper proposes the design of programmable reversible logic gate structures, targeted for the ALU implementation and their use in the realization of an efficient reversible ALU. Reversible or information-lossless circuits have applications in digital signal processing, communication, computer graphics and cryptography. This ALU consists of thirteen operations, 5 arithmetic, 4 logical operations and 4 shifting operations. All the modules are being designed using the basic reversible gates. Using reversible logic gates instead of traditional logic AND/OR gates, a reversible ALU whose function is the same as traditional ALU is constructed. Comparing with the number of input bits and the discarded bits of the traditional ALU, the reversible ALU significantly reduce the use and loss of information bits. The proposed reversible 16-bit ALU reduces the information bits use and loss by reusing the logic information bits logically and realizes the goal of lowering power consumption of logic circuits. Programmable reversible logic gates are realized in Verilog by using XILINX 12.2. Key words:
A design of digital processing circuit for the duo-lateral PSD
Zhou, Weixiang; Liang, Yanbing; Wang, Xiaoyang
2015-10-01
Beam pointing stability control technology detecting the vibration of the optical platform by detectors, using the fast steering mirror compensated the vibration displacement, thereby maintaining a stable beam. Position Sensitive Detector (PSD) as a sensitive position detection system components, its performance significantly affect the overall accuracy of the test system. This article selects Sitek's two-dimensional duo-lateral PSD: 2L20_CP7. By analyzing the measurement principle of the PSD, we designed a reverse bias circuit, I-V converted circuit, A / D converted circuit and control circuit which FPGA as a controller, testing the output current value to verify the reasonableness of the circuit design, and calculate the location information according to formula. We also made a measured grid chart diagram and distortion based on the application of computer, so dose error analysis. We concluded that the linearity of this PSD is better, and it can be applied in the high-precision systems.
Wireless communications circuits and systems
Sun, Yichuang
2004-01-01
This new book examines integrated circuits, systems and transceivers for wireless and mobile communications. It covers the most recent developments in key RF, IF, analogue, mixed-signal components and single-chip transceivers in CMOS technology.
Discharge quenching circuit for counters
International Nuclear Information System (INIS)
A circuit for quenching discharges in gas-discharge detectors with working voltage of 3-5 kV based on transistors operating in the avalanche mode is described. The quenching circuit consists of a coordinating emitter follower, amplifier-shaper for avalanche key cascade control which changes potential on the counter electrodes and a shaper of discharge quenching duration. The emitter follower is assembled according to a widely used flowsheet with two transistors. The circuit permits to obtain a rectangular quenching pulse with front of 100 ns and an amplitude of up to 3.2 kV at duration of 500 μm-8 ms. Application of the quenching circuit described permits to obtain countering characteristics with the slope less than or equal to 0.02%/V and plateau extent greater than or equal to 300 V
International Nuclear Information System (INIS)
After more than a decade of research in single flux quantum (SFQ) circuits, a high level of understanding the requirements for designing them with high-Tc superconductors (HTS) has been gained. Recently, the fabrication processes are being developed to be more and more in accordance with practical requirements for the design of real digital circuits. The contribution describes the complex relationship of desired high operation temperature and required low bit-error probability on a quantitative level. Suitable guidelines for circuit dimensioning are given. The discussion is oriented at one of the contemporary technological approaches. It is concluded that, despite some previous estimations, HTS SFQ circuits can work stable theoretically also at a relatively high operation temperature
Extensional Uniformity for Boolean Circuits
McKenzie, Pierre; Vollmer, Heribert
2008-01-01
Imposing an extensional uniformity condition on a non-uniform circuit complexity class C means simply intersecting C with a uniform class L. By contrast, the usual intensional uniformity conditions require that a resource-bounded machine be able to exhibit the circuits in the circuit family defining C. We say that (C,L) has the "Uniformity Duality Property" if the extensionally uniform class C \\cap L can be captured intensionally by means of adding so-called "L-numerical predicates" to the first-order descriptive complexity apparatus describing the connection language of the circuit family defining C. This paper exhibits positive instances and negative instances of the Uniformity Duality Property.
Circuit design on plastic foils
Raiteri, Daniele; Roermund, Arthur H M
2015-01-01
This book illustrates a variety of circuit designs on plastic foils and provides all the information needed to undertake successful designs in large-area electronics. The authors demonstrate architectural, circuit, layout, and device solutions and explain the reasons and the creative process behind each. Readers will learn how to keep under control large-area technologies and achieve robust, reliable circuit designs that can face the challenges imposed by low-cost low-temperature high-throughput manufacturing. • Discusses implications of problems associated with large-area electronics and compares them to standard silicon; • Provides the basis for understanding physics and modeling of disordered material; • Includes guidelines to quickly setup the basic CAD tools enabling efficient and reliable designs; • Illustrates practical solutions to cope with hard/soft faults, variability, mismatch, aging and bias stress at architecture, circuit, layout, and device levels.
Practical circuits with Physarum Wires
Whiting, James G. H.; Mayne, Richard; Moody, Nadine; Costello, Ben de Lacy; Adamatzky, Andrew
2015-01-01
Purpose: Protoplasmic tubes of Physarum polycephalum, also know as Physarum Wires (PW), have been previously suggested as novel bio- electronic components. Until recently, practical examples of electronic circuits using PWs have been limited. These PWs have been shown to be self repairing, offering significant advantage over traditional electronic components. This article documents work performed to produce practical circuits using PWs. Method: We have demonstrated through manufacture and tes...
An Algebra of Reversible Computation
Wang, Yong
2014-01-01
We design an axiomatization for reversible computation called reversible ACP (RACP). It has four extendible modules, basic reversible processes algebra (BRPA), algebra of reversible communicating processes (ARCP), recursion and abstraction. Just like process algebra ACP in classical computing, RACP can be treated as an axiomatization foundation for reversible computation.
Receiver Gain Modulation Circuit
Jones, Hollis; Racette, Paul; Walker, David; Gu, Dazhen
2011-01-01
A receiver gain modulation circuit (RGMC) was developed that modulates the power gain of the output of a radiometer receiver with a test signal. As the radiometer receiver switches between calibration noise references, the test signal is mixed with the calibrated noise and thus produces an ensemble set of measurements from which ensemble statistical analysis can be used to extract statistical information about the test signal. The RGMC is an enabling technology of the ensemble detector. As a key component for achieving ensemble detection and analysis, the RGMC has broad aeronautical and space applications. The RGMC can be used to test and develop new calibration algorithms, for example, to detect gain anomalies, and/or correct for slow drifts that affect climate-quality measurements over an accelerated time scale. A generalized approach to analyzing radiometer system designs yields a mathematical treatment of noise reference measurements in calibration algorithms. By treating the measurements from the different noise references as ensemble samples of the receiver state, i.e. receiver gain, a quantitative description of the non-stationary properties of the underlying receiver fluctuations can be derived. Excellent agreement has been obtained between model calculations and radiometric measurements. The mathematical formulation is equivalent to modulating the gain of a stable receiver with an externally generated signal and is the basis for ensemble detection and analysis (EDA). The concept of generating ensemble data sets using an ensemble detector is similar to the ensemble data sets generated as part of ensemble empirical mode decomposition (EEMD) with exception of a key distinguishing factor. EEMD adds noise to the signal under study whereas EDA mixes the signal with calibrated noise. It is mixing with calibrated noise that permits the measurement of temporal-functional variability of uncertainty in the underlying process. The RGMC permits the evaluation of EDA by
On the construction of reversible automata for reversible languages
Lombardy, Sylvain
2002-01-01
International audience Reversible languages occur in many different domains. Although the decision for the membership of reversible languages was solved in 1992 by Pin, an effective construction of a reversible automaton for a reversible language was still unknown. We give in this paper a method to compute a reversible automaton from the minimal automaton of a reversible language. With this intention, we use the universal automaton of the language that can be obtained from the minimal auto...
Reversible flowchart languages and the structured reversible program theorem
DEFF Research Database (Denmark)
Yokoyama, Tetsuo; Axelsen, Holger Bock; Glück, Robert
2008-01-01
Many irreversible computation models have reversible counterparts, but these are poorly understood at present. We introduce reversible flowcharts with an assertion operator and show that any reversible flowchart can be simulated by a structured reversible flowchart using only three control flow o...... justification for low-level machine code for reversible microprocessors as well as high-level block-structured reversible languages. We give examples for both such languages and illustrate them with a lossless encoder for permutations given by Dijkstra....
Full Text Available ... stability and soft tissue envelope. In the early days of reverse arthroplasty, it used to be said ... often we'll drain these patients for a day to try to prevent hematoma formation, especially in ...
Purchasing As Reverse Marketing
Blenkhorn, D L; Banting, P M
1989-01-01
This paper describes a new concept called reverse marketing, which is changing the conventional buyer-seller relationship and has important implications for the traditional role of the industrial marketer.
Full Text Available ... replacement. There are two basic approaches you can use for reverse shoulder replacement. The standard delto-pectoral ... surgery or a deltoid defect because you can use the same incision and repair any deltoid defects ...
Full Text Available ... the reverse allow patients to play tennis or sports where the arm swings backward. Our experience has ... who simply wants to be stronger or play sports better. But in terms of the patients that ...
Full Text Available ... with an intact cuff, we would consider a traditional shoulder replacement. There are two basic approaches you ... less limited with the superior reverse versus the traditional. And I assume the question means the approach: ...
Full Text Available ... in the United States. The indications are a patient with painful arthritis, absent rotator cuff, a less ... reverse arthroplasty is indicated for that type of patient. In a younger patient with an intact cuff, ...
Full Text Available ... reverse shoulder arthroplasty for cuff deficient arthritis. You should be aware that I helped design the system ... the delto- pectoral approach. The three features you should watch for in this video are the things ...
Full Text Available ... the height perfectly to get anatomic head tuberosity relationships. If you're doing a reverse for a ... able to start some gentle mobility of the body and the arm, and have better pain relief. ...
Full Text Available ... a friction bite that if you try to work it around the corner, you can get an ... stability and soft tissue envelope. In the early days of reverse arthroplasty, it used to be said ...
Full Text Available ... We usually lay this just at the inner table of the biceps groove next to the lesser ... is, does the reverse allow patients to play tennis or sports where the arm swings backward. Our ...
Full Text Available ... is essentially a culture medium. So, I use antibiotic-impregnated cement when I do the reverses. I ... minimal. At our institution we keep them on antibiotics for 24 hours. And hopefully the drain output ...
Full Text Available ... case of reverse shoulder arthroplasty for cuff deficient arthritis. You should be aware that I helped design ... in the last decade for cuff deficient shoulder arthritis in the United States. The indications are a ...
Full Text Available ... dislocations, although it's also reported to have a higher rate of getting the components in not perfect ... about infection and other things. There is a higher rate of infection with reverse replacement, probably because ...
Full Text Available ... here in New York to bring you a video of a recent case of reverse shoulder arthroplasty ... helped design the system that's shown in this video, so I receive royalties and therefore have a ...
Full Text Available ... residents and do receive compensation for that, as well. Now, reverse shoulder arthroplasty is a new option ... t see the neck of the humerus as well, but on the other hand, you have a ...
Full Text Available ... terminal range. The other thing to keep in mind is there's a fairly large dead space between ... the height perfectly to get anatomic head tuberosity relationships. If you're doing a reverse for a ...
Full Text Available ... their arm up but they can't do it actively. And the reverse arthroplasty is indicated for ... those. The advantage of a superior approach is it's especially useful if you've had previous open ...
Reverse vending machine update
Energy Technology Data Exchange (ETDEWEB)
Rypins, S.; Papke, C.
1986-02-01
The document discusses reverse vending machines. Placed outdoors in supermarket parking lots or indoors in the lobby of the grocery market, these hightech machines exchange aluminum cans (or other containers in more specialized machines) for cash, coupons or redeemable receipts. The placement of reverse venders (RV) in or near supermarkets has made recycling more visible and more convenient, although the machines have yet to fully reach industry goals.
PROCESSING REVERSE LOGISTICS INVENTORIES
Bajor, Ivona; Novačko, Luka; Ogrizović, Dario
2014-01-01
Developed logistics systems have organized reverse logistics flows and are continuously analyzing product returns, tending to detect patterns in oscillations of returning products in certain time periods. Inventory management in reverse logistics systems depends on different criteria, regarding goods categories, formed contracts between subjects of supply chains, uncertainty in manufacturer’s quantities of DOA (dead on arrival) products, etc. The developing logistics systems, such as the Croa...
Bernie, Aaron M.; Osterberg, E Charles; Stahl, Peter J.; Ramasamy, Ranjith; Goldstein, Marc
2012-01-01
Vasectomy is the most common urological procedure in the United States with 18% of men having a vasectomy before age 45. A significant proportion of vasectomized men ultimately request vasectomy reversal, usually due to divorce and/or remarriage. Vasectomy reversal is a commonly practiced but technically demanding microsurgical procedure that restores patency of the male excurrent ductal system in 80–99.5% of cases and enables unassisted pregnancy in 40–80% of couples. The discrepancy between...
46 CFR 169.670 - Circuit breakers.
2010-10-01
... 46 Shipping 7 2010-10-01 2010-10-01 false Circuit breakers. 169.670 Section 169.670 Shipping COAST... Gross Tons § 169.670 Circuit breakers. Each circuit breaker must be of the manually reset type designed for— (a) Inverse time delay; (b) Instantaneous short circuit protection; and (c) Repeated opening...
Tunable circuit for tunable capacitor devices
Rivkina, Tatiana; Ginley, David S.
2006-09-19
A tunable circuit (10) for a capacitively tunable capacitor device (12) is provided. The tunable circuit (10) comprises a tunable circuit element (14) and a non-tunable dielectric element (16) coupled to the tunable circuit element (16). A tunable capacitor device (12) and a method for increasing the figure of merit in a tunable capacitor device (12) are also provided.
Equivalence Checking of Hierarchical Combinational Circuits
DEFF Research Database (Denmark)
Williams, Poul Frederick; Hulgaard, Henrik; Andersen, Henrik Reif
1999-01-01
This paper presents a method for verifying that two hierarchical combinational circuits implement the same Boolean functions. The key new feature of the method is its ability to exploit the modularity of circuits to reuse results obtained from one part of the circuits in other parts. We demonstrate...... our method on large adder and multiplier circuits....
Multi-Layer E-Textile Circuits
Dunne, Lucy E.; Bibeau, Kaila; Mulligan, Lucie; Frith, Ashton; Simon, Cory
2012-01-01
Stitched e-textile circuits facilitate wearable, flexible, comfortable wearable technology. However, while stitched methods of e-textile circuits are common, multi-layer circuit creation remains a challenge. Here, we present methods of stitched multi-layer circuit creation using accessible tools and techniques.
On thermodynamic and microscopic reversibility
Energy Technology Data Exchange (ETDEWEB)
Crooks, Gavin E.
2011-07-12
The word 'reversible' has two (apparently) distinct applications in statistical thermodynamics. A thermodynamically reversible process indicates an experimental protocol for which the entropy change is zero, whereas the principle of microscopic reversibility asserts that the probability of any trajectory of a system through phase space equals that of the time reversed trajectory. However, these two terms are actually synonymous: a thermodynamically reversible process is microscopically reversible, and vice versa.
Comparison between four piezoelectric energy harvesting circuits
Institute of Scientific and Technical Information of China (English)
Jinhao QIU; Hao JIANG; Hongli JI; Kongjun ZHU
2009-01-01
This paper investigates and compares the efficiencies of four different interfaces for vibration-based energy harvesting systems. Among those four circuits, two circuits adopt the synchronous switching technique, in which the circuit is switched synchronously with the vibration. In this study, a simple source-less trigger circuit used to control the synchronized switch is proposed and two interface circuits of energy harvesting systems are designed based on the trigger circuit. To validate the effectiveness of the proposed circuits, an experimental system was established and the power harvested by those circuits from a vibration beam was measured. Experimental results show that the two new circuits can increase the harvested power by factors 2.6 and 7, respectively, without consuming extra power in the circuits.
Improved Simulation of Stabilizer Circuits
Aaronson, S; Aaronson, Scott; Gottesman, Daniel
2004-01-01
The Gottesman-Knill theorem says that a stabilizer circuit -- that is, a quantum circuit consisting solely of CNOT, Hadamard, and phase gates -- can be simulated efficiently on a classical computer. This paper improves that theorem in several directions. * By removing the need for Gaussian elimination, we make the simulation algorithm much faster at the cost of a factor-2 increase in the number of bits needed to represent a state. We have implemented the improved algorithm in a freely-available program called CHP (CNOT-Hadamard-Phase), which can handle thousands of qubits easily. * We show that the problem of simulating stabilizer circuits is complete for the classical complexity class ParityL, which means that stabilizer circuits are probably not even universal for classical computation. * We give efficient algorithms for computing the inner product between two stabilizer states, putting any n-qubit stabilizer circuit into a "canonical form" that requires at most O(n^2/log n) gates, and other useful tasks. *...
A New Method for Constructing Circuit Codes
Byrnes, Kevin M.
2016-01-01
Circuit codes are constructed from induced cycles in the graph of the $n$ dimensional hypercube. They are both theoretically and practically important, as circuit codes can be used as error correcting codes. When constructing circuit codes, the length of the cycle determines its accuracy and a parameter called the spread determines how many errors it can detect. We present a new method for constructing a circuit code of spread $k+1$ from a circuit code of spread $k$. This method leads to reco...
Distortion Cancellation via Polyphase Multipath Circuits
Mensink, Eisse; Klumperink, Eric A.M.; Nauta, Bram
2004-01-01
The central question of this paper is: can we enhance the spectral purity of nonlinear circuits with the help of polyphase multipath circuits. Polyphase multipath circuits are circuits with two or more paths that exploit phase differences between the paths to cancel unwanted signals. It turns out that it is very well possible to cancel distortion products produced by a nonlinear circuit. Unfortunately, there are also some spectral components that cannot be cancelled with the polyphase multipa...
Instrumentation and test gear circuits manual
Marston, R M
2013-01-01
Instrumentation and Test Gear Circuits Manual provides diagrams, graphs, tables, and discussions of several types of practical circuits. The practical circuits covered in this book include attenuators, bridges, scope trace doublers, timebases, and digital frequency meters. Chapter 1 discusses the basic instrumentation and test gear principles. Chapter 2 deals with the design of passive attenuators, and Chapter 3 with passive and active filter circuits. The subsequent chapters tackle 'bridge' circuits, analogue and digital metering techniques and circuitry, signal and waveform generation, and p
30 CFR 77.800 - High-voltage circuits; circuit breakers.
2010-07-01
... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 77.800... COAL MINES Surface High-Voltage Distribution § 77.800 High-voltage circuits; circuit breakers. High-voltage circuits supplying power to portable or mobile equipment shall be protected by suitable...
30 CFR 77.506 - Electric equipment and circuits; overload and short-circuit protection.
2010-07-01
... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Electric equipment and circuits; overload and short-circuit protection. 77.506 Section 77.506 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... circuits; overload and short-circuit protection. Automatic circuit-breaking devices or fuses of the...
49 CFR 236.5 - Design of control circuits on closed circuit principle.
2010-10-01
... 49 Transportation 4 2010-10-01 2010-10-01 false Design of control circuits on closed circuit..., AND APPLIANCES Rules and Instructions: All Systems General § 236.5 Design of control circuits on closed circuit principle. All control circuits the functioning of which affects safety of train...
Multiplication circuit for particle identification
International Nuclear Information System (INIS)
After having commented some characteristics of the particles present in a cyclotron, and their interactions, this report addresses the development and the implementation of a method and a device for selecting and counting particles. The author presents the principle and existing techniques of selection. In comparison with an existing device, the proportional counter and the scintillator are replaced by junctions: a surface barrier type junction (a silicon N layer with a very thin oxygen layer playing the role of the P layer), and lithium-based junction (a silicon P type layer made intrinsic by migration of lithium). The author then describes the developed circuit and assembly (background of the choice of a multiplication circuit), and their operation. In the next part, he presents the performed tests and discuses the obtained results. He finally outlines the benefits of the herein presented circuit
Vertically Integrated Circuits at Fermilab
Energy Technology Data Exchange (ETDEWEB)
Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom; /Fermilab
2009-01-01
The exploration of the vertically integrated circuits, also commonly known as 3D-IC technology, for applications in radiation detection started at Fermilab in 2006. This paper examines the opportunities that vertical integration offers by looking at various 3D designs that have been completed by Fermilab. The emphasis is on opportunities that are presented by through silicon vias (TSV), wafer and circuit thinning and finally fusion bonding techniques to replace conventional bump bonding. Early work by Fermilab has led to an international consortium for the development of 3D-IC circuits for High Energy Physics. The consortium has submitted over 25 different designs for the Fermilab organized MPW run organized for the first time.
Additive Manufacturing of Hybrid Circuits
Sarobol, Pylin; Cook, Adam; Clem, Paul G.; Keicher, David; Hirschfeld, Deidre; Hall, Aaron C.; Bell, Nelson S.
2016-07-01
There is a rising interest in developing functional electronics using additively manufactured components. Considerations in materials selection and pathways to forming hybrid circuits and devices must demonstrate useful electronic function; must enable integration; and must complement the complex shape, low cost, high volume, and high functionality of structural but generally electronically passive additively manufactured components. This article reviews several emerging technologies being used in industry and research/development to provide integration advantages of fabricating multilayer hybrid circuits or devices. First, we review a maskless, noncontact, direct write (DW) technology that excels in the deposition of metallic colloid inks for electrical interconnects. Second, we review a complementary technology, aerosol deposition (AD), which excels in the deposition of metallic and ceramic powder as consolidated, thick conformal coatings and is additionally patternable through masking. Finally, we show examples of hybrid circuits/devices integrated beyond 2-D planes, using combinations of DW or AD processes and conventional, established processes.
Design automation for integrated circuits
Newell, S. B.; de Geus, A. J.; Rohrer, R. A.
1983-04-01
Consideration is given to the development status of the use of computers in automated integrated circuit design methods, which promise the minimization of both design time and design error incidence. Integrated circuit design encompasses two major tasks: error specification, in which the goal is a logic diagram that accurately represents the desired electronic function, and physical specification, in which the goal is an exact description of the physical locations of all circuit elements and their interconnections on the chip. Design automation not only saves money by reducing design and fabrication time, but also helps the community of systems and logic designers to work more innovatively. Attention is given to established design automation methodologies, programmable logic arrays, and design shortcuts.
Nuclear sensor signal processing circuit
Kallenbach, Gene A.; Noda, Frank T.; Mitchell, Dean J.; Etzkin, Joshua L.
2007-02-20
An apparatus and method are disclosed for a compact and temperature-insensitive nuclear sensor that can be calibrated with a non-hazardous radioactive sample. The nuclear sensor includes a gamma ray sensor that generates tail pulses from radioactive samples. An analog conditioning circuit conditions the tail-pulse signals from the gamma ray sensor, and a tail-pulse simulator circuit generates a plurality of simulated tail-pulse signals. A computer system processes the tail pulses from the gamma ray sensor and the simulated tail pulses from the tail-pulse simulator circuit. The nuclear sensor is calibrated under the control of the computer. The offset is adjusted using the simulated tail pulses. Since the offset is set to zero or near zero, the sensor gain can be adjusted with a non-hazardous radioactive source such as, for example, naturally occurring radiation and potassium chloride.
Circuit model of Rimfire switch
International Nuclear Information System (INIS)
A cascade gaps circuit model for Rimfire switch has been developed. The circuit model includes all stray capacitances and spark channel on-state conduction characteristics. It can not only describe the behavior of Rimfire switch, but also allow analysis of the time varying voltage and current at each part of the switch, describing the internal characters of the switch. PSpice was used to implement the cascade gaps circuit model and simulate a 700 kV Rimfire switch. The simulation shows that, the voltage of the whole switch will be higher than 700 kV when the laser triggered section has broken down but all cascade gaps keep dielectric, and the voltage of all gaps attenuates with high frequency oscillation. (authors)
Irradiation device for electronic circuits
International Nuclear Information System (INIS)
The device includes a radiation-tight vessel, a mobile carriage for a radioactive source, a vertically mobile plate carrying a circuit to be tested and an irradiation detector. It includes also a cover related to the vacuum vessel which prevents the source from emitting for a certain source position. It includes also means which prevents irradiation when the vessel is not assembled and which prevents the dismantling when the source is radiating. It includes also a device allowing to disconnect the translation displacement controls of the circuit and of the radiation detector when the source is radiating
Electronic circuits fundamentals and applications
Tooley, Mike
2009-01-01
The essential textbook for students following pre-degree level courses, technician engineers, and all who need to access a straightforwardly written reference covering all the major areas of 21st century electronics.Mike Tooley's classic reference texts Electronic Circuits Handbook and Electronics Circuits Students Handbook have long offered a unique coverage of analog and digital electronics and applications in a single volume. The two versions of this title have now been combined to produce a major textbook which combines comprehensive coverage of principles and applications with readability
Short-circuit impedance measurement
DEFF Research Database (Denmark)
Pedersen, Knud Ole Helgesen; Nielsen, Arne Hejde; Poulsen, Niels Kjølstad
2003-01-01
Methods for estimating the short-circuit impedance in the power grid are investigated for various voltage levels and situations. The short-circuit impedance is measured, preferably from naturally occurring load changes in the grid, and it is shown that such a measurement system faces different...... kinds of problems at different locations in the grid. This means that the best measurement methodology changes depending on the location in the grid. Three typical examples with different measurement problems at 400 kV, 132 kV and 400 V voltage level are discussed....
Embedded systems circuits and programming
Sanchez, Julio
2012-01-01
During the development of an engineered product, developers often need to create an embedded system--a prototype--that demonstrates the operation/function of the device and proves its viability. Offering practical tools for the development and prototyping phases, Embedded Systems Circuits and Programming provides a tutorial on microcontroller programming and the basics of embedded design. The book focuses on several development tools and resources: Standard and off-the-shelf components, such as input/output devices, integrated circuits, motors, and programmable microcontrollers The implementat
Simplified design of filter circuits
Lenk, John
1999-01-01
Simplified Design of Filter Circuits, the eighth book in this popular series, is a step-by-step guide to designing filters using off-the-shelf ICs. The book starts with the basic operating principles of filters and common applications, then moves on to describe how to design circuits by using and modifying chips available on the market today. Lenk's emphasis is on practical, simplified approaches to solving design problems.Contains practical designs using off-the-shelf ICsStraightforward, no-nonsense approachHighly illustrated with manufacturer's data sheets
Fermionic models with superconducting circuits
Energy Technology Data Exchange (ETDEWEB)
Las Heras, Urtzi; Garcia-Alvarez, Laura; Mezzacapo, Antonio; Lamata, Lucas [University of the Basque Country UPV/EHU, Department of Physical Chemistry, Bilbao (Spain); Solano, Enrique [University of the Basque Country UPV/EHU, Department of Physical Chemistry, Bilbao (Spain); IKERBASQUE, Basque Foundation for Science, Bilbao (Spain)
2015-12-01
We propose a method for the efficient quantum simulation of fermionic systems with superconducting circuits. It consists in the suitable use of Jordan-Wigner mapping, Trotter decomposition, and multiqubit gates, be with the use of a quantum bus or direct capacitive couplings. We apply our method to the paradigmatic cases of 1D and 2D Fermi-Hubbard models, involving couplings with nearest and next-nearest neighbours. Furthermore, we propose an optimal architecture for this model and discuss the benchmarking of the simulations in realistic circuit quantum electrodynamics setups. (orig.)
Circuit, Thermal and Cost Characteristics of Impulse Magnetizing Circuits
Institute of Scientific and Technical Information of China (English)
2000-01-01
This paper describes the development of circuit, thermal and cost model for a capacitor discharge impulse megnetizer and compares simulations to measurements from an actual system. We used a cost structure consisting of five major subsystems for cost modeling. Especially, we estimated the potential for cost reductions impulse magnetizer as a function of time using the learning curve.
Efficient Design of Reversible Code Converters Using Quantum Dot Cellular Automata
Directory of Open Access Journals (Sweden)
Javeed Iqbal Reshi
2016-06-01
Full Text Available Quantum dot Cellular Automata (QCA is an attractive field of nano-technology which offers the various advantages over existing CMOS technology for the development of logic circuits. Contradictory to other technologies which use the voltage levels for logic representation, QCA utilizes the polarization of electrons for representing the binary states in the QCA Cell. Conventional logic circuits are not energy efficient as they are not reversible in nature and hence lead to energy dissipation. Thus there is a need of a serious effort that will provide an efficient paradigm for designing the circuits which does not dissipation the energy and hence will preserve the information. This paper offers the efficient design of various QCA reversible code converters which prove to be efficient in term of cell Area, cell count, total area, latency and complexity. All the proposed reversible code converter designs were simulated and their credibility was successfully verified with the QCADesigner tool
Logical Reversibility and Physical Reversibility in Quantum Measurement
Ueda, Masahito
1997-01-01
A quantum measurement is logically reversible if the premeasurement density operator of the measured system can be calculated from the postmeasurement density operator and from the outcome of the measurement. This paper analyzes why many quantum measurements are logically irreversible, shows how to make them logically reversible, and discusses reversing measurement that returns the postmeasurement state to the premeasurement state by another measurement (physical reversibility). Reversing mea...
International Nuclear Information System (INIS)
Estimations of the Norwegian hydropower production and various reversion models' market value have been made. The value of the Norwegian hydropower production until 01.01.2007 is estimated to about Nok 289 billion after taxes, or about 2,42 Nok/kWh medium production, given an expected future electricity price of around 0,25 Nok/kWh and a discount rate at 6,5 percent in nominal terms after taxes. The estimate is slightly above the level of prices for Norwegian hydropower plants in the last 8-10 years. The value of reversion in private plants which today have a limited licence time is estimated to Nok 5,5 billion. The value of reversion in public-owned Norwegian hydropower plants are about Nok 21 billion with a 60 year licence period from 01.01.2007, and about 12 billion for 75 years (ml)
DEFF Research Database (Denmark)
Nielsen, Jens Kromann; Rasmussen, Henrik K.
2008-01-01
Afilament stretching rheometer (FSR) was used for measuring the start-up of uni-axial elongational flow followed by reversed bi-axial flow, both with a constant elongational rate. A narrow molecular mass distribution linear polystyrene with a molecular weight of 145 kg / mole wis subjected to the...... start-up of elongation for three Hencky strain units and subsequently the reversed flow. The integral molecular stress function formulation within the 'interchain pressure' concept agrees with the experiments. In the experiments the Hencky strain at which the str~ss becomes zero (the recovery strain) in...... the reversed flow has been identified. The recovery strain is found to increase with elongational rate, and has a maximum value of approximately 1.45. The Doi Edwards model using any stretch evolution equation is not able to predict the correct level of the recovery strain....
Relaxation Based Electrical Simulation for VLSI Circuits
Directory of Open Access Journals (Sweden)
S. Rajkumar
2012-06-01
Full Text Available Electrical circuit simulation was one of the first CAD tools developed for IC design. The conventional circuit simulators like SPICE and ASTAP were designed initially for the cost effective analysis of circuits containing a few hundred transistors or less. A number of approaches have been used to improve the performances of congenital circuit simulators for the analysis of large circuits. Thereafter relaxation methods was proposed to provide more accurate waveforms than standard circuit simulators with up to two orders of magnitude speed improvement for large circuits. In this paper we have tried to highlights recently used waveform and point relaxation techniques for simulation of VLSI circuits. We also propose a simple parallelization technique and experimentally demonstrate that we can solve digital circuits with tens of million transistors in a few hours.
International Nuclear Information System (INIS)
This presentation, given by the national agency of radioactive waste management (ANDRA) at the meeting of October 8, 2009 of the high committee for the nuclear safety transparency and information (HCTISN), describes the concept of deep reversible disposal for high level/long living radioactive wastes, as considered by the ANDRA in the framework of the program law of June 28, 2006 about the sustainable management of radioactive materials and wastes. The document presents the social and political reasons of reversibility, the technical means considered (containers, disposal cavities, monitoring system, test facilities and industrial prototypes), the decisional process (progressive development and blocked off of the facility, public information and debate). (J.S.)
Dynamically Tunable Memory in Two-Component Gene Circuit
Energy Technology Data Exchange (ETDEWEB)
Ghim, C; Almaas, E
2008-09-05
Cell has the potential to remember the environmental conditions for many (10{sup 7}) generations but stochastic fluctuations set a fundamental limit on the stability of this memory. Here we explicitly take the binding-unbinding of macromolecules into account to propose a novel rationale for the protein-protein interaction in cell physiology. Based on the first-exit time and the corresponding deterministic characterization of various genetic circuits, we show that the reversible binding dynamics may stabilize non-genetically inherited cell states, providing a practical strategy for designing robust epigenetic memory.
Efficient Design of Reversible Code Converters Using Quantum Dot Cellular Automata
Javeed Iqbal Reshi; M. Tariq Banday
2016-01-01
Quantum dot Cellular Automata (QCA) is an attractive field of nano-technology which offers the various advantages over existing CMOS technology for the development of logic circuits. Contradictory to other technologies which use the voltage levels for logic representation, QCA utilizes the polarization of electrons for representing the binary states in the QCA Cell. Conventional logic circuits are not energy efficient as they are not reversible in nature and hence lead to energy dissipation. ...
Circuit design for RF transceivers
Leenaerts, Domine; Vaucher, Cicero S
2007-01-01
Second edition of this successful 2001 RF Circuit Design book, has been updated, latest technology reviews have been added as well as several actual case studies. Due to the authors being active in industry as well as academia, this should prove to be an essential guide on RF Transceiver Design for students and engineers.
MOS integrated circuit fault modeling
Sievers, M.
1985-01-01
Three digital simulation techniques for MOS integrated circuit faults were examined. These techniques embody a hierarchy of complexity bracketing the range of simulation levels. The digital approaches are: transistor-level, connector-switch-attenuator level, and gate level. The advantages and disadvantages are discussed. Failure characteristics are also described.
Unbalanced Neuronal Circuits in Addiction
Volkow, Nora D; Wang, Gen-Jack; Tomasi, Dardo; Baler, Ruben D.
2013-01-01
Through sequential waves of drug-induced neurochemical stimulation, addiction co-opts the brain's neuronal circuits that mediate reward, motivation, , to behavioral inflexibility and a severe disruption of self-control and compulsive drug intake. Brain imaging technologies have allowed neuroscientists to map out the neural landscape of addiction in the human brain and to understand how drugs modify it.
Testing Superconductor Logic Integrated Circuits
Joseph, Arun A.; Kerkhoff, Hans G.
2005-01-01
Superconductor logic has the potential of extremely low-power consumption and ultra-fast digital signal processing. Unfortunately, the obtained yield of the present processes is low and specific faults occur. This paper deals with fault-modelling, Design-for-Test structures, and ATPG for these integrated circuits.
Integrated Circuit Stellar Magnitude Simulator
Blackburn, James A.
1978-01-01
Describes an electronic circuit which can be used to demonstrate the stellar magnitude scale. Six rectangular light-emitting diodes with independently adjustable duty cycles represent stars of magnitudes 1 through 6. Experimentally verifies the logarithmic response of the eye. (Author/GA)
Low-frequency attenuator circuit
Cash, W. H., Jr.; Polyhemus, J. T.
1979-01-01
Circuit uses only single operational amplifier and few passive components to remove background noise from miniature "wristwatch" pulse detector. It can be applied to other systems where background noise is slowly varying, such as ultrasonics, strain-gage sensors, and accelerometers.
Separating OR, SUM, and XOR Circuits
Find, Magnus; Göös, Mika; Järvisalo, Matti; Kaski, Petteri; Koivisto, Mikko; Korhonen, Janne H.
2013-01-01
Given a boolean n by n matrix A we consider arithmetic circuits for computing the transformation x->Ax over different semirings. Namely, we study three circuit models: monotone OR-circuits, monotone SUM-circuits (addition of non-negative integers), and non-monotone XOR-circuits (addition modulo 2). Our focus is on \\emph{separating} these models in terms of their circuit complexities. We give three results towards this goal: (1) We prove a direct sum type theorem on the monotone complexity of ...
Clocking Scheme for Switched-Capacitor Circuits
DEFF Research Database (Denmark)
Steensgaard-Madsen, Jesper
A novel clocking scheme for switched-capacitor (SC) circuits is presented. It can enhance the understanding of SC circuits and the errors caused by MOSFET (MOS) switches. Charge errors, and techniques to make SC circuits less sensitive to them are discussed.......A novel clocking scheme for switched-capacitor (SC) circuits is presented. It can enhance the understanding of SC circuits and the errors caused by MOSFET (MOS) switches. Charge errors, and techniques to make SC circuits less sensitive to them are discussed....
Advanced circuit simulation using Multisim workbench
Báez-López, David; Cervantes-Villagómez, Ofelia Delfina
2012-01-01
Multisim is now the de facto standard for circuit simulation. It is a SPICE-based circuit simulator which combines analog, discrete-time, and mixed-mode circuits. In addition, it is the only simulator which incorporates microcontroller simulation in the same environment. It also includes a tool for printed circuit board design.Advanced Circuit Simulation Using Multisim Workbench is a companion book to Circuit Analysis Using Multisim, published by Morgan & Claypool in 2011. This new book covers advanced analyses and the creation of models and subcircuits. It also includes coverage of transmissi
Digital circuit boards mach 1 GHz
Morrison, Ralph
2012-01-01
A unique, practical approach to the design of high-speed digital circuit boards The demand for ever-faster digital circuit designs is beginning to render the circuit theory used by engineers ineffective. Digital Circuit Boards presents an alternative to the circuit theory approach, emphasizing energy flow rather than just signal interconnection to explain logic circuit behavior. The book shows how treating design in terms of transmission lines will ensure that the logic will function, addressing both storage and movement of electrical energy on these lines. It cove
Clocking Scheme for Switched-Capacitor Circuits
DEFF Research Database (Denmark)
Steensgaard-Madsen, Jesper
1998-01-01
A novel clocking scheme for switched-capacitor (SC) circuits is presented. It can enhance the understanding of SC circuits and the errors caused by MOSFET (MOS) switches. Charge errors, and techniques to make SC circuits less sensitive to them are discussed.......A novel clocking scheme for switched-capacitor (SC) circuits is presented. It can enhance the understanding of SC circuits and the errors caused by MOSFET (MOS) switches. Charge errors, and techniques to make SC circuits less sensitive to them are discussed....
Characterization of hereditarily reversible posets
Kukieła, Michał
2013-01-01
A poset P is called reversible if every order preserving bijective self map of P is an order automorphism. P is called hereditarily reversible if every subposet of P is reversible. We give a complete characterization of hereditarily reversible posets in terms of forbidden subsets. A similar result is stated also for preordered sets. As a corollary we extend the list of known examples of hereditarily reversible topological spaces.
Highly modular bow-tie gene circuits with programmable dynamic behaviour.
Prochazka, Laura; Angelici, Bartolomeo; Haefliger, Benjamin; Benenson, Yaakov
2014-01-01
Synthetic gene circuits often require extensive mutual optimization of their components for successful operation, while modular and programmable design platforms are rare. A possible solution lies in the 'bow-tie' architecture, which stipulates a focal component-a 'knot'-uncoupling circuits' inputs and outputs, simplifying component swapping, and introducing additional layer of control. Here we construct, in cultured human cells, synthetic bow-tie circuits that transduce microRNA inputs into protein outputs with independently programmable logical and dynamic behaviour. The latter is adjusted via two different knot configurations: a transcriptional activator causing the outputs to track input changes reversibly, and a recombinase-based cascade, converting transient inputs into permanent actuation. We characterize the circuits in HEK293 cells, confirming their modularity and scalability, and validate them using endogenous microRNA inputs in additional cell lines. This platform can be used for biotechnological and biomedical applications in vitro, in vivo and potentially in human therapy. PMID:25311543
Time reversal communication system
Candy, James V.; Meyer, Alan W.
2008-12-02
A system of transmitting a signal through a channel medium comprises digitizing the signal, time-reversing the digitized signal, and transmitting the signal through the channel medium. The channel medium may be air, earth, water, tissue, metal, and/or non-metal.
Reversing insect pollinator decline
Potts, Simon; Wentworth, Jonathan
2013-01-01
Pollination by insects enables the reproduction of flowering plants and is critical to UK agriculture.1 Insect pollinators have declined globally, with implications for food security and wild habitats. This POSTnote summarises the causes for the recent trends, gaps in knowledge and possible strategies for reversing pollinator decline.
DEFF Research Database (Denmark)
Husted, Steen; Verheugt, Freek; Comuth, Willemijn
2015-01-01
, coagulation factor concentrates or NOAC-specific antidotes could be used. Coagulation factor concentrates can be used in patients with haemophilia and to reverse the effect of VKAs but, in NOAC-treated patients, results are inconsistent and these agents could potentially have pro-thrombotic effects. Specific...
Reversible focal splenial lesions
Energy Technology Data Exchange (ETDEWEB)
Gallucci, Massimo; Limbucci, Nicola [University of L' Aquila, Department of Radiology, S. Salvatore Hospital, L' Aquila (Italy); Paonessa, Amalia [Loreto Nuovo Hospital, Department of Neuroradiology, Napoli (Italy); Caranci, Ferdinando [Federico II University, Department of Neurological Sciences, Napoli (Italy)
2007-07-15
Reversible focal lesions in the splenium of the corpus callosum (SCC) have recently been reported.They are circumscribed and located in the median aspect of the SCC. On MRI, they are hyperintense on T2-W and iso-hypointense on T1-W sequences, with no contrast enhancement. On DWI, SCC lesions are hyperintense with low ADC values, reflecting restricted diffusion due to cytotoxic edema. The common element is the disappearance of imaging abnormalities with time, including normalization of DWI. Clinical improvement is often reported. The most established and frequent causes of reversible focal lesions of the SCC are viral encephalitis, antiepileptic drug toxicity/withdrawal and hypoglycemic encephalopathy. Many other causes have been reported, including traumatic axonal injury. The similar clinical and imaging features suggest a common mechanism induced by different pathological events leading to the same results. Edema and diffusion restriction in focal reversible lesions of the SCC have been attributed to excitotoxic mechanisms that can result from different mechanisms; no unifying relationship has been found to explain all the pathologies associated with SCC lesions. In our opinion, the similar imaging, clinical and prognostic aspects of these lesions depend on a high vulnerability of the SCC to excitotoxic edema and are less dependent on the underlying pathology. In this review, the relevant literature concerning reversible focal lesions in the SCC is analyzed and hypotheses about their pathogenesis are proposed. (orig.)
García-Patrón, Raúl; Pirandola, Stefano; Lloyd, Seth; Shapiro, Jeffrey H.
2009-05-01
In this Letter we define a family of entanglement distribution protocols assisted by feedback classical communication that gives an operational interpretation to reverse coherent information, i.e., the symmetric counterpart of the well-known coherent information. This leads to the definition of a new entanglement distribution capacity that exceeds the unassisted capacity for some interesting channels.
Full Text Available Reverse Shoulder Arthroplasty Zimmer, Inc. New York City, New York March 17, 2010 Welcome to this OR Live presentation, brought to you by Zimmer. Hi. I'm ... my partner, Brad Parsons. We're here in New York to bring you a video of a ...
García-Patrón, Raúl; Pirandola, Stefano; Lloyd, Seth; Shapiro, Jeffrey H.
2008-01-01
In this letter we define a family of entanglement distribution protocols assisted by feedback classical communication that gives an operational interpretation to reverse coherent information, i.e., the symmetric counterpart of the well known coherent information. This lead to the definition of a new entanglement distribution capacity that exceeds the unassisted capacity for some interesting channels.
Design of fast Josephson arithmetic circuits
International Nuclear Information System (INIS)
This paper reports on a Josephson 2-bit full adder and a 4-bit parallel multiplier designed using an advanced design with speed optimization of function direct coupled logic (ADCL). wide margins EXOR, Majority 2/3 and Delay gates implemented with picosecond junctions (RNC = 2ps) are presented and their performances are analyzed. The adder consists of 10 gates with 90 Josephson junctions and dissipates 30μW. The propagation time along the critical path is 10ps/bit near threshold bias. It rises only at 20ps/bit in the adder at 80% of the maximum bias. The multiplier consists of 60 gates and dissipates 180μW. The propagation times along the critical path near threshold bias and at 80% of maximum bias are respectively 60 ps/bit and 100 ps/bit
Institute of Scientific and Technical Information of China (English)
Bao Bo-Cheng; Feng Fei; Dong Wei; Pan Sai-Hu
2013-01-01
A flux-controlled memristor characterized by smooth cubic nonlinearity is taken as an example,upon which the voltage-current relationships (VCRs) between two parallel memristive circuits-a parallel memristor and capacitor circuit (the parallel MC circuit),and a parallel memristor and inductor circuit (the parallel ML circuit)-are investigated.The results indicate that the VCR between these two parallel memristive circuits is closely related to the circuit parameters,and the frequency and amplitude of the sinusoidal voltage stimulus.An equivalent circuit model of the memristor is built,upon which the circuit simulations and experimental measurements of both the parallel MC circuit and the parallel ML circuit are performed,and the results verify the theoretical analysis results.
Directory of Open Access Journals (Sweden)
Shefali Mamataj
2016-07-01
Full Text Available In today‟s world everyday a new technology which is faster, smaller and more complex than its predecessor is being developed. Reversible computation is a research area characterized by having only computational models that is both forward and backward deterministic. Reversible Logic is gaining significant consideration as the potential logic design style for implementation in modern nanotechnology and quantum computing with minimal impact on physical entropy. It has become very popular over the last few years since reversible logic circuits dramatically reduce energy loss. It consumes less power by recovering bit loss from its unique input-output mapping. This paper represents the implementation of conventional Boolean functions for basic digital gate by using COG reversible gate. This paper also represents a multi logic function generator circuit for generating multiple logical function simultaneously using COG gates. And also represents a controlled multi logic function generator circuit for generating any specified output in a controlled way.
Terahertz backward wave oscillator circuits
Oviedo Vela, Guillermo Antonio
This work focuses on increasing the electric field mode-electron beam interaction in terahertz backward-wave oscillators through increasing the interaction impedance of the slow wave circuit. In a backward wave oscillator (BWO) or a traveling wave tube (TWT), the electric field traveling in the waveguide interacts with an electron beam grazing or piercing the electric field of a slow wave circuit and transfers energy from the beam to the circuit mode. The mechanism of this interaction is analyzed and the traditional model is adapted to provide one that is scalable to terahertz frequencies. The efficiency of the BWO can be enhanced by improving the interaction between the beam and the circuit modes, utilizing beam sources with greater current densities and using larger magnetic fields. This work presents the results on the modeling, fabrication and performance of the mode-piercing and mode-grazing slow wave circuits studied. Meandering folded waveguides and interdigital lines were modeled to evaluate their interaction impedance and electron beam requirements at terahertz frequencies. The models were verified against published results. Because of their low interaction impedance, terahertz meandering waveguides would need to be excited with large current density electron beams which in turn would require large magnets for their control. Interdigital lines were found to be the slow-wave circuit of choice in this work because their high interaction impedance and their ability to operate with low voltage, and low current density electron beams. Finite element numerical calculations were used to design, optimize and scale a terahertz free interdigital line (FIDL) circuit. The designed free interdigital line was fabricated using microfabrication technologies. Characterization of a free interdigital line (FIDL) circuit was performed in a tube body with a dispenser cathode and a three-anode Pierce gun. The FIDL measured output was compared with the calculated result and its
Changing Views of Basal Ganglia Circuits and Circuit Disorders
DeLong, Mahlon; Wichmann, Thomas
2010-01-01
The basal ganglia (BG) have long been considered to play an important role in the control of movement and the pathophysiology of movement disorders, such as Parkinson’s disease (PD). Studies over the past decades have considerably broadened this view, indicating that the BG participate in multiple, parallel, largely segregated, cortico-subcortical reentrant pathways involving motor, associative and limbic functions. Research has shown that dysfunction within individual circuits is associated ...
Plug-in integrated/hybrid circuit
Stringer, E. J.
1974-01-01
Hybrid circuitry can be installed into standard round bayonet connectors, to eliminate wiring from connector to circuit. Circuits can be connected directly into either section of connector pair, eliminating need for hard wiring to that section.
Driver circuit for solid state light sources
Palmer, Fred; Denvir, Kerry; Allen, Steven
2016-02-16
A driver circuit for a light source including one or more solid state light sources, a luminaire including the same, and a method of so driving the solid state light sources are provided. The driver circuit includes a rectifier circuit that receives an alternating current (AC) input voltage and provides a rectified AC voltage. The driver circuit also includes a switching converter circuit coupled to the light source. The switching converter circuit provides a direct current (DC) output to the light source in response to the rectified AC voltage. The driver circuit also includes a mixing circuit, coupled to the light source, to switch current through at least one solid state light source of the light source in response to each of a plurality of consecutive half-waves of the rectified AC voltage.
Low voltage logic circuits exploiting gate level dynamic body biasing in 28 nm UTBB FD-SOI
Taco, Ramiro; Levi, Itamar; Lanuzza, Marco; Fish, Alexander
2016-03-01
In this paper, the recently proposed gate level body bias (GLBB) technique is evaluated for low voltage logic design in state-of-the-art 28 nm ultra-thin body and box (UTBB) fully-depleted silicon-on-insulator (FD-SOI) technology. The inherent benefits of the low-granularity body-bias control, provided by the GLBB approach, are emphasized by the efficiency of forward body bias (FBB) in the FD-SOI technology. In addition, the possibility to integrate PMOS and NMOS devices into a single common well configuration allows significant area reduction, as compared to an equivalent triple well implementation. Some arithmetic circuits were designed using GLBB approach and compared to their conventional CMOS and DTMOS counterparts under different running conditions at low voltage regime. Simulation results shows that, for 300 mV of supply voltage, a 4 × 4-bit GLBB Baugh Wooley multiplier allows performance improvement of about 30% and area reduction of about 35%, while maintaining low energy consumption as compared to the conventional CMOS ⧹ DTMOS solutions. Performance and energy benefits are maintained over a wide range of process-voltage-temperature (PVT) variations.
A reversible optical to microwave quantum interface
Barzanjeh, Sh; Milburn, G J; Tombesi, P; Vitali, D
2011-01-01
Quantum technology, like many mature classical technologies, will ultimately integrate distinct modules to achieve a function that transcends the capability of any one of them. We describe a reversible quantum interface between an optical and a microwave photon using a hybrid device based on the common interaction of microwave and optical fields with a nano-mechanical resonator in a superconducting circuit, which is one of the major challenges in the field. The scheme provides a path for generating a traveling microwave field strongly entangled with an optical mode, thus bridging the gap between quantum optical and solid state implementations of quantum information. This is an effective source of (bright) two-mode squeezing with an optical idler (signal) and a microwave signal (idler) and as such enables a continuous variable teleportation protocol.
Black hole qubit correspondence from quantum circuits
Prudencio, Thiago; Silva, Edilberto O; Belich, Humberto
2014-01-01
We propose a black hole qubit correspondence (BHQC) from quantum circuits, taking into account the BHQC formulations of wrapped brane qubits. With base on BHQC, we implement the corresponding gate operations to realize any given quantum circuit. In particular, we implement cases of the generation of Bell states, quantum teleportation and GHZ states circuits. Finally, we give an interpretation of the BHQC from quantum circuits with base on the BHQC classification of entanglement classes.
Brain-machine interface circuits and systems
Zjajo, Amir
2016-01-01
This book provides a complete overview of significant design challenges in respect to circuit miniaturization and power reduction of the neural recording system, along with circuit topologies, architecture trends, and (post-silicon) circuit optimization algorithms. The introduced novel circuits for signal conditioning, quantization, and classification, as well as system configurations focus on optimized power-per-area performance, from the spatial resolution (i.e. number of channels), feasible wireless data bandwidth and information quality to the delivered power of implantable system.
Solid-State dc Circuit Breaker
Harvey, P.
1983-01-01
Circuit breaker with no moving parts protects direct-current (dc) loads. Current which circuit breaker opens (trip current) is adjustable and so is time delay before breaker trips. Forward voltage drop rises from 0.6 to 1.2 V as current rises to trip point. Breaker has two terminals, like fuse, therefore replaces fuse in dc circuit. Powered by circuit it protects and reset by either turning off power source or disconnecting load.
What's new about generator circuit breakers
International Nuclear Information System (INIS)
The need for updating ANSI C37 Standards for AC high-voltage circuit breakers has become necessary because of the increased interest in power circuit breakers for generator application. These circuit breakers, which have continuous current ratings and rated short-circuit currents that are much higher than those presently covered by existing C37 Standards, take on added importance because they are being installed in critical AC power supplies at nuclear power stations
Trip electrical circuit of the gyrotion
International Nuclear Information System (INIS)
The electron cyclotron resonance heating system of INPE/LAP is shown and the trip electrical circuit of the gyrotron is described, together with its fundamental aspects. The trip electrical circuit consists basically of a series regulator circuit which regulates the output voltage level and controls the pulse width time. Besides that, a protection circuit for both tubes, regulator and gyrotron, against faults in the system. (author)
49 CFR 236.731 - Controller, circuit.
2010-10-01
... 49 Transportation 4 2010-10-01 2010-10-01 false Controller, circuit. 236.731 Section 236.731 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Controller, circuit. A device for opening and closing electric circuits....
A Current-mode Logarithmic Function Circuit
Osama Oglah Faris; Muhammad Taher Abuelma'atti
2004-01-01
A new current-mode analog circuit configuration that implements the function ln (x/y) is proposed. The circuit uses bipolar transistors and resistors and is suitable for integration. In the proposed circuit the ratio (x/y) can be larger or smaller than unity. Simulation results are included.
47 CFR 32.2232 - Circuit equipment.
2010-10-01
... 47 Telecommunication 2 2010-10-01 2010-10-01 false Circuit equipment. 32.2232 Section 32.2232... FOR TELECOMMUNICATIONS COMPANIES Instructions for Balance Sheet Accounts § 32.2232 Circuit equipment... which is used for the amplification, modulation, regeneration, circuit patching, balancing or control...
49 CFR 236.726 - Circuit, track.
2010-10-01
... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, track. 236.726 Section 236.726 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, track. An electrical circuit of which the rails of the track form a part....
49 CFR 236.721 - Circuit, control.
2010-10-01
... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, control. 236.721 Section 236.721 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, control. An electrical circuit between a source of electric energy and a device which it operates....
30 CFR 56.6407 - Circuit testing.
2010-07-01
... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Circuit testing. 56.6407 Section 56.6407... Blasting § 56.6407 Circuit testing. A blasting galvanometer or other instrument designed for testing blasting circuits shall be used to test each of the following: (a) Continuity of each electric detonator...
An eigenvalue study of the MLC circuit
DEFF Research Database (Denmark)
Lindberg, Erik; Murali, K.
1998-01-01
The MLC (Murali-Lakshmanan-Chua) circuit is the simplest non-autonomous chaotic circuit. Insight in the behaviour of the circuit is obtained by means of a study of the eigenvalues of the linearized Jacobian of the nonlinear differential equations. The trajectories of the eigenvalues as functions of...
30 CFR 57.6407 - Circuit testing.
2010-07-01
... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Circuit testing. 57.6407 Section 57.6407... Blasting-Surface and Underground § 57.6407 Circuit testing. A blasting galvanometer or other instrument designed for testing blasting circuits shall be used to test the following: (a) In surface operations—...
The dc power circuits: A compilation
1972-01-01
A compilation of reports concerning power circuits is presented for the dissemination of aerospace information to the general public as part of the NASA Technology Utilization Program. The descriptions for the electronic circuits are grouped as follows: dc power supplies, power converters, current-voltage power supply regulators, overload protection circuits, and dc constant current power supplies.
An Equivalent Circuit for Landau Damping
DEFF Research Database (Denmark)
Pécseli, Hans
1976-01-01
An equivalent circuit simulating the effect of Landau damping in a stable plasma‐loaded parallel‐plate capacitor is presented. The circuit contains a double infinity of LC components. The transition from stable to unstable plasmas is simulated by the introduction of active elements into the circuit....
30 CFR 75.1323 - Blasting circuits.
2010-07-01
... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Blasting circuits. 75.1323 Section 75.1323... MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Explosives and Blasting § 75.1323 Blasting circuits. (a) Blasting circuits shall be protected from sources of stray electric current. (b) Detonators made...
Gridded electron reversal ionizer
Chutjian, Ara (Inventor)
1993-01-01
A gridded electron reversal ionizer forms a three dimensional cloud of zero or near-zero energy electrons in a cavity within a filament structure surrounding a central electrode having holes through which the sample gas, at reduced pressure, enters an elongated reversal volume. The resultant negative ion stream is applied to a mass analyzer. The reduced electron and ion space-charge limitations of this configuration enhances detection sensitivity for material to be detected by electron attachment, such as narcotic and explosive vapors. Positive ions may be generated by generating electrons having a higher energy, sufficient to ionize the target gas and pulsing the grid negative to stop the electron flow and pulsing the extraction aperture positive to draw out the positive ions.
Delay locked loop integrated circuit.
Energy Technology Data Exchange (ETDEWEB)
Brocato, Robert Wesley
2007-10-01
This report gives a description of the development of a Delay Locked Loop (DLL) integrated circuit (IC). The DLL was developed and tested as a stand-alone IC test chip to be integrated into a larger application specific integrated circuit (ASIC), the Quadrature Digital Waveform Synthesizer (QDWS). The purpose of the DLL is to provide a digitally programmable delay to enable synchronization between an internal system clock and external peripherals with unknown clock skew. The DLL was designed and fabricated in the IBM 8RF process, a 0.13 {micro}m CMOS process. It was designed to operate with a 300MHz clock and has been tested up to 500MHz.
Integrated circuits for multimedia applications
DEFF Research Database (Denmark)
Vandi, Luca
2007-01-01
This work presents several key aspects in the design of RF integrated circuits for portable multimedia devices. One chapter is dedicated to the application of negative-feedback topologies to receiver frontends. A novel feedback technique suitable for common multiplier-based mixers is described, and...... it is applied to a broad-band dual-loop receiver architecture in order to boost the linearity performances of the stage. A simplified noise- and linearity analysis of the circuit is derived, and a comparison is provided with a more traditional dual-loop topology (a broad-band stage based on shunt...... for the performances of the stage. Semi-ideal models are used in simulations to validate the derived calculations, and the fundamental limits of the basic structure are discussed. The design of a current-mode base-band output stage implemented in a 0.13um technology is presented: the amplifier draws...
Planar Multilayer Circuit Quantum Electrodynamics
Minev, Z. K.; Serniak, K.; Pop, I. M.; Leghtas, Z.; Sliwa, K.; Hatridge, M.; Frunzio, L.; Schoelkopf, R. J.; Devoret, M. H.
2016-04-01
Experimental quantum information processing with superconducting circuits is rapidly advancing, driven by innovation in two classes of devices, one involving planar microfabricated (2D) resonators, and the other involving machined three-dimensional (3D) cavities. We demonstrate that circuit quantum electrodynamics can be implemented in a multilayer superconducting structure that combines 2D and 3D advantages. We employ standard microfabrication techniques to pattern each layer, and rely on a vacuum gap between the layers to store the electromagnetic energy. Planar qubits are lithographically defined as an aperture in a conducting boundary of the resonators. We demonstrate the aperture concept by implementing an integrated, two-cavity-mode, one-transmon-qubit system.
Reverse engineering software ecosystems
Lungu, Mircea F.; Lanza, Michele
2009-01-01
Reverse engineering is an active area of research concerned with the development of techniques and tools that support the understanding of software systems. All the techniques that were pro- posed until now study individual systems in isolation. However, software systems are seldom developed in isolation; instead, they are developed together with other projects in the wider context of an organization. We call the collection of projects that are developed in such a con- text a software ...
Monolithic readout circuits for RHIC
International Nuclear Information System (INIS)
Several CMOS ASICs have been developed for a proposed RHIC experiment. This paper discusses why ASIC implementation was chosen for certain functions, circuit specifications and the design techniques used to meet them, and results of simulations and early prototypes. By working closely together from an early stage in the planning process, in-house ASIC designers and detector and data acquisition experimenters can achieve optimal use of this important technology
Synthetic circuits, devices and modules
Zhang, Hong; Jiang, Taijiao
2010-01-01
The aim of synthetic biology is to design artificial biological systems for novel applications. From an engineering perspective, construction of biological systems of defined functionality in a hierarchical way is fundamental to this emerging field. Here, we highlight some current advances on design of several basic building blocks in synthetic biology including the artificial gene control elements, synthetic circuits and their assemblies into devices and modules. Such engineered basic buildi...
?Immunetworks?, intersecting circuits and dynamics
Demongeot, Jacques; Elena, Adrien; Noual, Mathilde; Sené, Sylvain; Thuderoz, Florence
2011-01-01
Abstract This paper proposes a study of biological regulatory networks based on a multi-level strategy. Given a network, the first structural level of this strategy consists in analysing the architecture of the network interactions in order to describe it. The second dynamical level consists in relating the patterns found in the architecture to the possible dynamical behaviours of the network. It is known that circuits are the patterns that play the most important part in the dynam...
Parallelism through Digital Circuit Design
O'Donnell, John
2008-01-01
Two ways to exploit chips with a very large number of transistors are multicore processors and programmable logic chips. Some data parallel algorithms can be executed efficiently on ordinary parallel computers, including multicores. A class of data parallel algorithms is identified which have characteristics that make implementation on multiprocessors inefficient, but they are well suited for direct design as digital circuits. This leads to a programming model called c...
Equivalent circuit analysis of sled
International Nuclear Information System (INIS)
A direct application of equivalent circuit concepts leads to: (1) confirmation of Perry Wilson's SLED (SLAC Linac Energy Doubler) equation; (2) an equation that applies to a SLED device with input and output waveguides of different characteristic impedances; and (3) an equation that results if we demand that no power be lost by reflection from SLED. If the incident voltage is tailored as prescribed by this equation, the cavity voltage tracks the incident voltage and the reflected voltage is zero
An Interpreter for Quantum Circuits
Lucas Helms; Ruben Gamboa
2013-01-01
This paper describes an ACL2 interpreter for "netlists" describing quantum circuits. Several quantum gates are implemented, including the Hadamard gate H, which rotates vectors by 45 degrees, necessitating the use of irrational numbers, at least at the logical level. Quantum measurement presents an especially difficult challenge, because it requires precise comparisons of irrational numbers and the use of random numbers. This paper does not address computation with irrational numbers or the g...
Monolithic readout circuits for RHIC
Energy Technology Data Exchange (ETDEWEB)
O`Connor, P.; Harder, J. [Brookhaven National Laboratory, Upton, NY (United States)
1991-12-31
Several CMOS ASICs have been developed for a proposed RHIC experiment. This paper discusses why ASIC implementation was chosen for certain functions, circuit specifications and the design techniques used to meet them, and results of simulations and early prototypes. By working closely together from an early stage in the planning process, in-house ASIC designers and detector and data acquisition experimenters can achieve optimal use of this important technology.
Root finding with threshold circuits
Czech Academy of Sciences Publication Activity Database
Jeřábek, Emil
2012-01-01
Roč. 462, Nov 30 (2012), s. 59-69. ISSN 0304-3975 R&D Projects: GA AV ČR IAA100190902; GA MŠk(CZ) 1M0545 Institutional support: RVO:67985840 Keywords : root finding * threshold circuit * power series Subject RIV: BA - General Mathematics Impact factor: 0.489, year: 2012 http://www.sciencedirect.com/science/article/pii/S0304397512008006#
Chemistry of the secondary circuit
International Nuclear Information System (INIS)
Study of the various possibilities to prevent the corrosion phenomena in the different parts of the secondary circuit (condenser, water facility, steam lines, turbines and vapor generators): choice of a volatile conditioning with ammonia or morpholine and not with phosphate which concentration in the vapor generators may induce local corrosion, and search for a low oxidizing medium by restriction of the air admission and addition of hydrazine
Chen, Guanrong
2002-01-01
In this volume, leading experts present current achievements in the forefront of research in the challenging field of chaos in circuits and systems, with emphasis on engineering perspectives, methodologies, circuitry design techniques, and potential applications of chaos and bifurcation. A combination of overview, tutorial and technical articles, the book describes state-of-the-art research on significant problems in this field. It is suitable for readers ranging from graduate students, university professors, laboratory researchers and industrial practitioners to applied mathematicians and phy
Microcontroller based Integrated Circuit Tester
Yousif Taha Yousif Elamin; Abdelrasoul Jabar Alzubaidi
2015-01-01
The digital integrated circuit (IC) tester is implemented by using the ATmega32 microcontroller . The microcontroller processes the inputs and outputs and displays the results on a Liquid Crystal Display (LCD). The basic function of the digital IC tester is to test a digital IC for correct logical functioning as described in the truth table and/or function table. The designed model can test digital ICs having 14 pins. Since it is programmable, any number of ICs can be tested . Thi...
Circuit analysis of quantum measurement
Kurotani, Yuji; Ueda, Masahito
2006-01-01
We develop a circuit theory that enables us to analyze quantum measurements on a two-level system and on a continuous-variable system on an equal footing. As a measurement scheme applicable to both systems, we discuss a swapping state measurement which exchanges quantum states between the system and the measuring apparatus before the apparatus meter is read out. This swapping state measurement has an advantage in gravitational-wave detection over contractive state measurement in that the post...
CIRCUIT SWITCHING VERSUS PACKET SWITCHING
Sneps-Sneppe, Manfred
2015-01-01
Communication specialists around the world are facing the same problem: shifting from circuit switching (CS) to packet switching (CS). Communication service providers are favoring “All-over-IP” technologies hoping to boost their profits by providing multimedia services. The main stakeholder in this field of the paradigm shift is the industry itself: packet switching hardware manufacturers are going to earn billions of dollars and thus pay engineers and journalists many millions for the promot...
Energy Technology Data Exchange (ETDEWEB)
Fink, Mathias [Laboratoire Ondes et Acoustique, Ecole Superieure de Physique et de Chimie Industrielle de la Ville de Paris, Universite Denis Diderot, UMR CNRS 7587, 10 Rue Vauquelin, 75005 Paris (France)], E-mail: mathias.fink@espci.fr
2008-10-15
Time-reversal mirrors (TRMs) refocus an incident acoustic field to the position of the original source regardless of the complexity of the propagation medium. TRM's have now been implemented in a variety of physical scenarios from MHz ultrasonics with order centimeter aperture size to hundreds/thousands of Hz in ocean acoustics with order hundred meter aperture size. Common to this broad range of scales is a remarkable robustness exemplified by observations at all scales that the more complex the medium between the probe source and the TRM, the sharper the focus. The relation between the medium complexity and the size of the focal spot is studied in this paper. It is certainly the most exciting property of TRM compared to standard focusing devices. A TRM acts as an antenna that uses complex environments to appears wider than it is, resulting for a broadband pulse in a refocusing quality that does not depend of the TRM aperture. In this paper, we investigate the time-reversal approach in various media of increasing complexity and we discuss the link existing between time-reversal approach and local helioseismology where Green's functions can be extracted from diffusive noise.
30 CFR 75.601-1 - Short circuit protection; ratings and settings of circuit breakers.
2010-07-01
... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Short circuit protection; ratings and settings of circuit breakers. 75.601-1 Section 75.601-1 Mineral Resources MINE SAFETY AND HEALTH... Trailing Cables § 75.601-1 Short circuit protection; ratings and settings of circuit breakers....
30 CFR 75.518 - Electric equipment and circuits; overload and short circuit protection.
2010-07-01
... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Electric equipment and circuits; overload and short circuit protection. 75.518 Section 75.518 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... Equipment-General § 75.518 Electric equipment and circuits; overload and short circuit protection....
Quantum Circuits with Mixed States
Aharonov, D; Nisan, N; Aharonov, Dorit; Kitaev, Alexei; Nisan, Noam
1998-01-01
We define the model of quantum circuits with density matrices, where non-unitary gates are allowed. Measurements in the middle of the computation, noise and decoherence are implemented in a natural way in this model, which is shown to be equivalent in computational power to standard quantum circuits. The main result in this paper is a solution for the subroutine problem: The general function that a quantum circuit outputs is a probabilistic function, but using pure state language, such a function can not be used as a black box in other computations. We give a natural definition of using general subroutines, and analyze their computational power. We suggest convenient metrics for quantum computing with mixed states. For density matrices we analyze the so called ``trace metric'', and using this metric, we define and discuss the ``diamond metric'' on superoperators. These metrics enable a formal discussion of errors in the computation. Using a ``causality'' lemma for density matrices, we also prove a simple lowe...
Testing of Diode-Clamping in an Inductive Pulsed Plasma Thruster Circuit
Toftul, Alexandra; Polzin, Kurt A.; Martin, Adam K.; Hudgins, Jerry L.
2014-01-01
Testing of a 5.5 kV silicon (Si) diode and 5.8 kV prototype silicon carbide (SiC) diode in an inductive pulsed plasma thruster (IPPT) circuit was performed to obtain a comparison of the resulting circuit recapture efficiency,eta(sub r), defined as the percentage of the initial charge energy remaining on the capacitor bank after the diode interrupts the current. The diode was placed in a pulsed circuit in series with a silicon controlled rectifier (SCR) switch, and the voltages across different components and current waveforms were collected over a range of capacitor charge voltages. Reverse recovery parameters, including turn-off time and peak reverse recovery current, were measured and capacitor voltage waveforms were used to determine the recapture efficiency for each case. The Si fast recovery diode in the circuit was shown to yield a recapture efficiency of up to 20% for the conditions tested, while the SiC diode further increased recapture efficiency to nearly 30%. The data presented show that fast recovery diodes operate on a timescale that permits them to clamp the discharge quickly after the first half cycle, supporting the idea that diode-clamping in IPPT circuit reduces energy dissipation that occurs after the first half cycle
Model Order Reduction for Electronic Circuits:
DEFF Research Database (Denmark)
Hjorth, Poul G.; Shontz, Suzanne
Electronic circuits are ubiquitous; they are used in numerous industries including: the semiconductor, communication, robotics, auto, and music industries (among many others). As products become more and more complicated, their electronic circuits also grow in size and complexity. This increased...... the need for circuit simulators to evaluate potential designs before fabrication, as integrated circuit prototypes are expensive to build, and troubleshooting is diﬃcult. In this report, we focus on the simulation of printed circuit boards (PCB’s) and interconnects both of which are of great importance...
Design of analog circuits through symbolic analysis
Fakhfakh, Mourad; V Fernández, Francisco
2012-01-01
Symbolic analyzers have the potential to offer knowledge to sophomores as well as practitioners of analog circuit design. Actually, they are an essential complement to numerical simulators, since they provide insight into circuit behavior which numerical analyzers do not provide. Symbolic analysis of electronic circuits addresses the generation of symbolic expressions for the parameters that describe the performance of linear and nonlinear circuits in three domains: DC, AC and time; some or all the circuit parameters can be kept as symbols. Due to the fact that these expressions remain va
CMOS circuit design, layout and simulation
Baker, R Jacob
2010-01-01
The Third Edition of CMOS Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and much more. Regardless of one's integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples.
Reddy, Dhananjaya
2011-01-01
In the competitive world of manufacturing, companies are often searching for new ways to improve their process, customer satisfaction and stay ahead in the game with their competitors. Reverse logistics has been considered a strategy to bring these things to life for the past decade or so. This thesis work tries to shed some light on the basics of reverse logistics and how reverse logistics can be used as a management strategy. This paper points out the fundamentals of reverse logistics and l...
Method and Circuit for Injecting a Precise Amount of Charge onto a Circuit Node
Hancock, Bruce R. (Inventor)
2016-01-01
A method and circuit for injecting charge into a circuit node, comprising (a) resetting a capacitor's voltage through a first transistor; (b) after the resetting, pre-charging the capacitor through the first transistor; and (c) after the pre-charging, further charging the capacitor through a second transistor, wherein the second transistor is connected between the capacitor and a circuit node, and the further charging draws charge through the second transistor from the circuit node, thereby injecting charge into the circuit node.
Faster Evolution of More Multifunctional Logic Circuits
Stoica, Adrian; Zebulum, Ricardo
2005-01-01
A modification in a method of automated evolutionary synthesis of voltage-controlled multifunctional logic circuits makes it possible to synthesize more circuits in less time. Prior to the modification, the computations for synthesizing a four-function logic circuit by this method took about 10 hours. Using the method as modified, it is possible to synthesize a six-function circuit in less than half an hour. The concepts of automated evolutionary synthesis and voltage-controlled multifunctional logic circuits were described in a number of prior NASA Tech Briefs articles. To recapitulate: A circuit is designed to perform one of several different logic functions, depending on the value of an applied control voltage. The circuit design is synthesized following an automated evolutionary approach that is so named because it is modeled partly after the repetitive trial-and-error process of biological evolution. In this process, random populations of integer strings that encode electronic circuits play a role analogous to that of chromosomes. An evolved circuit is tested by computational simulation (prior to testing in real hardware to verify a final design). Then, in a fitness-evaluation step, responses of the circuit are compared with specifications of target responses and circuits are ranked according to how close they come to satisfying specifications. The results of the evaluation provide guidance for refining designs through further iteration.
Reverse Engineering of RFID devices
Bokslag, Wouter
2015-01-01
This paper discusses the relevance and potential impact of both RFID and reverse engineering of RFID technology, followed by a discussion of common protocols and internals of RFID technology. The focus of the paper is on providing an overview of the different approaches to reverse engineering RFID technology and possible countermeasures that could limit the potential of such reverse engineering attempts.
Auto-programmable impulse neural circuits
Watula, D.; Meador, J.
1990-01-01
Impulse neural networks use pulse trains to communicate neuron activation levels. Impulse neural circuits emulate natural neurons at a more detailed level than that typically employed by contemporary neural network implementation methods. An impulse neural circuit which realizes short term memory dynamics is presented. The operation of that circuit is then characterized in terms of pulse frequency modulated signals. Both fixed and programmable synapse circuits for realizing long term memory are also described. The implementation of a simple and useful unsupervised learning law is then presented. The implementation of a differential Hebbian learning rule for a specific mean-frequency signal interpretation is shown to have a straightforward implementation using digital combinational logic with a variation of a previously developed programmable synapse circuit. This circuit is expected to be exploited for simple and straightforward implementation of future auto-adaptive neural circuits.
Circuit-breakers: optical technologies for probing neural signals and systems.
Zhang, Feng; Aravanis, Alexander M; Adamantidis, Antoine; de Lecea, Luis; Deisseroth, Karl
2007-08-01
Neuropsychiatric disorders, which arise from a combination of genetic, epigenetic and environmental influences, epitomize the challenges faced in understanding the mammalian brain. Elucidation and treatment of these diseases will benefit from understanding how specific brain cell types are interconnected and signal in neural circuits. Newly developed neuroengineering tools based on two microbial opsins, channelrhodopsin-2 (ChR2) and halorhodopsin (NpHR), enable the investigation of neural circuit function with cell-type-specific, temporally accurate and reversible neuromodulation. These tools could lead to the development of precise neuromodulation technologies for animal models of disease and clinical neuropsychiatry. PMID:17643087
Directory of Open Access Journals (Sweden)
A. Yu. Zhuravlev
2016-04-01
Full Text Available Purpose. The work is intended to investigate the electromagnetic processes in impedance bond in order to improve noise immunity of track circuits (TC for safe railway operation. Methodology. To achieve this purpose the methods of scientific analysis, mathematical modelling, experimental study, a large-scale simulation were used. Findings. The work examined the interference affecting the normal performance of track circuits. To a large extent, part of track circuit damages account for failures in track circuit equipment. Track circuit equipment is connected directly to the track line susceptible to traction current interference, which causes changes in its electrical characteristics and electromagnetic properties. Normal operability, performance of the main operating modes of the track circuit is determined by previous calculation of its performance and compilation of regulatory tables. The classical method for determination of track circuit parameters was analysed. The classical calculation method assumes representation of individual sections of the electrical track circuit using the quadripole network with known coefficients, usually in the A-form. Determining the coefficients of linear element circuit creates no metrological or mathematical difficulties. However, in circuits containing nonlinear ferromagnets (FM, obtaining the coefficients on the entire induction change range in the cores is quite a difficult task because the classical methods of idling (I and short circuit (SC are not acceptable. This leads to complicated methods for determining both the module and the arguments of quadripole network coefficients. Instead of the classical method, the work proposed the method for calculating the track circuit dependent on nonlinear properties of ferromagnets. Originality. The article examines a new approach to the calculation of TC taking into account the losses in ferromagnets (FM, without determination of equivalent circuit quadripole
Pierce, Jim D.; Stephens, John J.; Walker, Charles A.
1999-01-01
A method of reversibly brazing surfaces together. An interface is affixed to each surface. The interfaces can be affixed by processes such as mechanical joining, welding, or brazing. The two interfaces are then brazed together using a brazing process that does not defeat the surface to interface joint. Interfaces of materials such as Ni-200 can be affixed to metallic surfaces by welding or by brazing with a first braze alloy. The Ni-200 interfaces can then be brazed together using a second braze alloy. The second braze alloy can be chosen so that it minimally alters the properties of the interfaces to allow multiple braze, heat and disassemble, rebraze cycles.
Reverse engineering SPARQL queries
Arenas, M; Diaz, GI; Kostylev, E
2016-01-01
Semantic Web systems provide open interfaces for end-users to access data via a powerful high-level query language, SPARQL. But users unfamiliar with either the details of SPARQL or properties of the target dataset may find it easier to query by example — give examples of the information they want (or examples of both what they want and what they do not want) and let the system reverse engineer the desired query from the examples. This approach has been heavily used in th...
Reverse Engineering Malicious Applications
Directory of Open Access Journals (Sweden)
Ioan Cristian Iacob
2015-06-01
Full Text Available Detecting new and unknown malware is a major challenge in today’s software. Security profession. A lot of approaches for the detection of malware using data mining techniques have already been proposed. Majority of the works used static features of malware. However, static detection methods fall short of detecting present day complex malware. Although some researchers proposed dynamic detection methods, the methods did not use all the malware features. In this work, an approach for the detection of new and unknown malware was proposed and implemented. Each sample was reverse engineered for analyzing its effect on the operating environment and to extract the static and behavioral features.
46 CFR 28.860 - Overcurrent protection and switched circuits.
2010-10-01
... circuits having fused disconnect switches or circuit breakers so that only the appropriate navigation... breaker or fuse at the connection to the switchboard or distribution panel bus. (d) Each circuit breaker... steering circuit, each circuit must be protected against both overload and short circuit. Each...
14 CFR 23.1357 - Circuit protective devices.
2010-01-01
... circuit breakers, must be installed in all electrical circuits other than— (1) Main circuits of starter... circuit breaker or replace a fuse is essential to safety in flight, that circuit breaker or fuse must be... 14 Aeronautics and Space 1 2010-01-01 2010-01-01 false Circuit protective devices. 23.1357...
Radio frequency integrated circuit design
Rogers, John W M
2010-01-01
This newly revised and expanded edition of the 2003 Artech House classic, Radio Frequency Integrated Circuit Design, serves as an up-to-date, practical reference for complete RFIC know-how. The second edition includes numerous updates, including greater coverage of CMOS PA design, RFIC design with on-chip components, and more worked examples with simulation results. By emphasizing working designs, this book practically transports you into the authors' own RFIC lab so you can fully understand the function of each design detailed in this book. Among the RFIC designs examined are RF integrated LC
Circuit for Driving Piezoelectric Transducers
Randall, David P.; Chapsky, Jacob
2009-01-01
The figure schematically depicts an oscillator circuit for driving a piezoelectric transducer to excite vibrations in a mechanical structure. The circuit was designed and built to satisfy application-specific requirements to drive a selected one of 16 such transducers at a regulated amplitude and frequency chosen to optimize the amount of work performed by the transducer and to compensate for both (1) temporal variations of the resonance frequency and damping time of each transducer and (2) initially unknown differences among the resonance frequencies and damping times of different transducers. In other words, the circuit is designed to adjust itself to optimize the performance of whichever transducer is selected at any given time. The basic design concept may be adaptable to other applications that involve the use of piezoelectric transducers in ultrasonic cleaners and other apparatuses in which high-frequency mechanical drives are utilized. This circuit includes three resistor-capacitor networks that, together with the selected piezoelectric transducer, constitute a band-pass filter having a peak response at a frequency of about 2 kHz, which is approximately the resonance frequency of the piezoelectric transducers. Gain for generating oscillations is provided by a power hybrid operational amplifier (U1). A junction field-effect transistor (Q1) in combination with a resistor (R4) is used as a voltage-variable resistor to control the magnitude of the oscillation. The voltage-variable resistor is part of a feedback control loop: Part of the output of the oscillator is rectified and filtered for use as a slow negative feedback to the gate of Q1 to keep the output amplitude constant. The response of this control loop is much slower than 2 kHz and, therefore, does not introduce significant distortion of the oscillator output, which is a fairly clean sine wave. The positive AC feedback needed to sustain oscillations is derived from sampling the current through the
Circuit considerations for repetitive railguns
Energy Technology Data Exchange (ETDEWEB)
Honih, E.M.
1986-01-01
Railgun electromagnetic launchers have significant military and scientific potential. They provide direct conversion of electrical energy to projectile kinetic energy, and they offer the hope of achieving projectile velocities greatly exceeding the limits of conventional guns. With over 10 km/sec already demonstrated, railguns are attracting attention for tactical and strategic weapons systems and for scientific equation-of-state research. The full utilization of railguns will require significant improvements in every aspect of system design - projectile, barrel, and power source - to achieve operation on a large scale. This paper will review fundamental aspects of railguns, with emphasis on circuit considerations and repetitive operation.
Model reduction for circuit simulation
Hinze, Michael; Maten, E Jan W Ter
2011-01-01
Simulation based on mathematical models plays a major role in computer aided design of integrated circuits (ICs). Decreasing structure sizes, increasing packing densities and driving frequencies require the use of refined mathematical models, and to take into account secondary, parasitic effects. This leads to very high dimensional problems which nowadays require simulation times too large for the short time-to-market demands in industry. Modern Model Order Reduction (MOR) techniques present a way out of this dilemma in providing surrogate models which keep the main characteristics of the devi
Sabin, William
1998-01-01
A comprehensive reference for the design of high frequency communications systems and equipment. This revised edition is loaded with practical data, much of which cannot be found in other reference books. Its approach to the subject follows the needs of an engineer from system definition and performance requirements down to the individual circuit elements that make up radio transmitters and receivers. The accompanying disk contains updated software on filters, matching networks and receiver analysis. SciTech Publishing also provides many other products related to Communication Systems Design.
Pragmatic circuits signals and filters
Eccles, William
2006-01-01
Pragmatic Circuits: Signals and Filters is built around the processing of signals. Topics include spectra, a short introduction to the Fourier series, design of filters, and the properties of the Fourier transform. The focus is on signals rather than power. But the treatment is still pragmatic. For example, the author accepts the work of Butterworth and uses his results to design filters in a fairly methodical fashion. This third of three volumes finishes with a look at spectra by showing how to get a spectrum even if a signal is not periodic. The Fourier transform provides a way of dealing wi
MicroPower - Towards Low-power Microprocessors with Reversible Computing
DEFF Research Database (Denmark)
Axelsen, Holger Bock; Glück, Robert; De Vos, Alexis; Thomsen, Michael Kirkedal
2009-01-01
. In the new MicroPower project, the Department of Computer Science at the University of Copenhagen is collaborating with the University of Ghent and the hearing-aid company Oticon, to advance the theory and practice of reversible computing at the language, logic and circuit level....
What Do Reversible Programs Compute?
DEFF Research Database (Denmark)
Axelsen, Holger Bock; Glück, Robert
2011-01-01
Reversible computing is the study of computation models that exhibit both forward and backward determinism. Understanding the fundamental properties of such models is not only relevant for reversible programming, but has also been found important in other fields, e.g., bidirectional model...... transformation, program transformations such as inversion, and general static prediction of program properties. Historically, work on reversible computing has focussed on reversible simulations of irreversible computations. Here, we take the viewpoint that the property of reversibility itself should be the...... starting point of a computational theory of reversible computing. We provide a novel semantics-based approach to such a theory, using reversible Turing machines (RTMs) as the underlying computation model. We show that the RTMs can compute exactly all injective, computable functions. We find that the RTMs...
Boyd, Jeffrey
2010-02-01
As preposterous as it might sound, if quantum waves travel in the reverse direction from subatomic particles, then most of quantum physics can be explained without quantum weirdness or Schr"odinger's cat. Quantum mathematics is unchanged. The diffraction pattern on the screen of the double slit experiment is the same. This proposal is not refuted by the Innsbruck experiments; this is NOT a hidden local variable theory. Research evidence will be presented that is consistent with the idea waves travel in the opposite direction as neutrons. If one's thinking shifts from forwards to backwards quantum waves, the world changes so drastically it is almost unimaginable. Quantum waves move from the mathematical to the real world, multiply in number, and reverse in direction. Wave-particle duality is undone. In the double slit experiment every part of the target screen is emitting such quantum waves in all directions. Some pass through the two slits. Interference occurs on the opposite side of the barrier than is usually imagined. They impinge on ``S'' and an electron is released at random. Because of the interference it is more likely to follow some waves than others. It follows one and only one wave backward; hitting the screen where it's wave originated. )
Development, integration and testing of automated triggering circuit for hybrid DC circuit breaker
International Nuclear Information System (INIS)
A novel concept of Hybrid DC circuit breaker having combination of mechanical switch and static switch provides arc-less current commutation into the dump resistor during quench in superconducting magnet operation. The triggering of mechanical and static switches in Hybrid DC breaker can be automatized which can effectively reduce the overall current commutation time of hybrid DC circuit breaker and make the operation independent of opening time of mechanical switch. With this view, a dedicated control circuit (auto-triggering circuit) has been developed which can decide the timing and pulse duration for mechanical switch as well as static switch from the operating parameters. This circuit has been tested with dummy parameters and thereafter integrated with the actual test set up of hybrid DC circuit breaker. This paper deals with the conceptual design of the auto-triggering circuit, its control logic and operation. The test results of Hybrid DC circuit breaker using this circuit have also been discussed. (author)
Digital Circuits Implementation On Rpga Simulator
Israni, Pankaj Kumar; Jain, S C
2013-01-01
For Reversible computing, Target technology is yet to become available. Adequate tools are not yet developed for reversible technology. Simulation is still under development. Classical logic synthesis methods and simulation tools can not be used in reversible computing. Because these work on irreversible logic blocks but in reversible computing reversible logic blocks are used for design and implementation. So, we need a simulation platform to analysis and development in this area. So, we wor...
Full bridge circuit based on pentacene schottky diodes fabricated on plastic substrates
International Nuclear Information System (INIS)
In this work, we demonstrate a full bridge diode (FBD) circuit compatible and fabricated on flexible polyethylene naphthalene (PEN) substrate. The fabrication was carried out using photolithography-based processes and pentacene Schottky diodes as the active circuit components. The individual pentacene diodes show the on/off current ratio of 105, with reverse and forward bias current densities of 10−4 and 102 A cm−2, respectively. Diodes and the full bridge configuration were measured in the range of −10 to +10 V. Discrete diodes fabricated in the same substrate show similar behavior to those integrated in the FBD circuit. The frequency response was evaluated using an ac signal and voltage ranging from 1 to 5 MHz and −10 to +10V, respectively. The dc output voltage under these conditions was 7–8.5 V for individual diodes and 3–5.5 V for the FBD circuit. The resulting FBD circuits show full wave rectification for ac signals up to ±10 V in the frequency regime tested. The circuit demonstrated could be used for ac-related energy harvesting requiring rectification. One of such energy harvesting approaches could be power generated from micro-cantilevers. (paper)
Radix-independent, efficient arrays for multi-level n-qudit quantum and reversible computation
Mohammadi, Majid
2015-08-01
Multiple-valued quantum logic allows the designers to reduce the number of cells while obtaining more functionality in the quantum circuits. Large r-valued reversible or quantum gates ( r stands for radix and is more than 2) cannot be directly realized in the current quantum technology. Therefore, we are interested in designing the large reversible and quantum controlled gates using the arrays of one-quantum digit (qudit) or two-qudit gates. In our previous work, we proposed quantum arrays to implement the r-valued quantum circuits. In this paper, we propose novel efficient structures and arrays, for r-valued quantum logic gates. The quantum costs of the developed quantum arrays are independent of the radix of calculations in the quantum circuit.
Analog circuit design scalable analog circuit design, high speed D/A converters, RF power amplifiers
Huijsing, Johan
2007-01-01
Preface. Part I: Scalable Analog Circuit Design. Introduction. Scalable High-Speed Analog Circuit Design; M. Vertregt, P. Scholtens. Scalable High Resolution Mixed Mode Circuit Design; R.J. Brewer. Scalable 'High Voltages' Integrated Circuit Design for XDSL Type of Applications; D. Rossi. Scalability of Wire-Line Analog Front-Ends; K. Bult. Reusable IP Analog Circuit Design; J. Hauptmann, A. Wiesbauer, H. Weinberger. Process Migration Tools for Analog and Digital Circuits; K. Francken, G. Gielen. Part II: High-Speed D/A Converters. Introduction. Introduction to High-Speed Digital-to-Analog Con
Reversible posterior leukoencephalopathy syndrome
Energy Technology Data Exchange (ETDEWEB)
Lee, Eun Ja; Yu, Won Jong; Ahn, Kook Jin; Jung, So Lyung; Lee, Yeon Soo; Kim, Ji Chang; Kang, Si Won [The Catholic Univ. of Korea, Taejon (Korea, Republic of); Song, Chang Joon [Chungnam National Univ. School of Medicine, Cheonju (Korea, Republic of); Song, Soon-Young; Koo, Ja Hong [Kwandong Univ. College of Medicine, Myungji Hospital, Seoul (Korea, Republic of); Kim, Man Deuk [College of Medicine Pochon CHA Univ., Seoul (Korea, Republic of)
2001-10-01
To review reversible posterior leukoencephalopathy syndrome. We reviewed 22 patients (M:F=3:19; age, 17-46 years) with the characteristic clinical and imaging features of reversible posterior leukoencephalopathy syndrome. All underwent brain MRI, and in three cases both CT and MRI were performed. In one, MRA was obtained, and in eleven, follow-up MR images were obtained. We evaluated the causes of this syndrome, its clinical manifestations, and MR findings including the locations of lesions, the presence or absence of contrast enhancement, and the changes seen at follow-up MRI. Of the 22 patients, 13 had eclampsia (six during pregnancy and seven during puerperium). Four were receiving immunosuppressive therapy (three, cyclosporine ; one, FK 506). Four suffered renal failure and one had complicated migraine. The clinical manifestations included headache (n=12), visual disturbance (n=13), seizure (n=15), focal neurologic sign (n=3), and altered mental status (n=2). Fifteen patients had hypertension and the others normotension. MRI revealed that lesions were bilateral (n=20) or unilateral (n=2). In all patients the lesion was found in the cortical and subcortical areas of the parieto-occipital lobes ; other locations were the basal ganglia (n=9), posterior temporal lobe (n=8), frontal lobe (n=5), cerebellum (n=5), pons (n=2), and thalamus (n=1). All lesions were of high signal intensity on T2-weighted images, and of iso to low intensity on T1-weighted images. One was combined with acute hematoma in the left basal ganglia. In eight of 11 patients who underwent postcontrast T1-weighted MRI, there was no definite enhancement ; in one, enhancement was mild, and in tow, patchy. CT studies showed low attenuation, and MRA revealed mild vasospasm. The symptoms of all patients improved. Follow-up MRI in nine of 11 patients depicted complete resolution of the lesions ; in two, small infarctions remained but the extent of the lesions had decreased. Reversible posterior
Reversible posterior leukoencephalopathy syndrome
International Nuclear Information System (INIS)
To review reversible posterior leukoencephalopathy syndrome. We reviewed 22 patients (M:F=3:19; age, 17-46 years) with the characteristic clinical and imaging features of reversible posterior leukoencephalopathy syndrome. All underwent brain MRI, and in three cases both CT and MRI were performed. In one, MRA was obtained, and in eleven, follow-up MR images were obtained. We evaluated the causes of this syndrome, its clinical manifestations, and MR findings including the locations of lesions, the presence or absence of contrast enhancement, and the changes seen at follow-up MRI. Of the 22 patients, 13 had eclampsia (six during pregnancy and seven during puerperium). Four were receiving immunosuppressive therapy (three, cyclosporine ; one, FK 506). Four suffered renal failure and one had complicated migraine. The clinical manifestations included headache (n=12), visual disturbance (n=13), seizure (n=15), focal neurologic sign (n=3), and altered mental status (n=2). Fifteen patients had hypertension and the others normotension. MRI revealed that lesions were bilateral (n=20) or unilateral (n=2). In all patients the lesion was found in the cortical and subcortical areas of the parieto-occipital lobes ; other locations were the basal ganglia (n=9), posterior temporal lobe (n=8), frontal lobe (n=5), cerebellum (n=5), pons (n=2), and thalamus (n=1). All lesions were of high signal intensity on T2-weighted images, and of iso to low intensity on T1-weighted images. One was combined with acute hematoma in the left basal ganglia. In eight of 11 patients who underwent postcontrast T1-weighted MRI, there was no definite enhancement ; in one, enhancement was mild, and in tow, patchy. CT studies showed low attenuation, and MRA revealed mild vasospasm. The symptoms of all patients improved. Follow-up MRI in nine of 11 patients depicted complete resolution of the lesions ; in two, small infarctions remained but the extent of the lesions had decreased. Reversible posterior
Partial Reversible Gates(PRG) for Reversible BCD Arithmetic
Thapliyal, Himanshu; Arabnia, Hamid R; Bajpai, Rajnish; Sharma, Kamal K
2007-01-01
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard and a major enhancement to the standard is the addition of decimal format. Furthermore, in the recent years reversible logic has emerged as a promising computing paradigm having its applications in low power CMOS, quantum computing, nanotechnology, and optical computing. The major goal in reversible logic is to minimize the number of reversible gates and garbage outputs. Thus, this paper proposes the novel concept of pa...
Physical synthesis of quantum circuits using templates
Mirkhani, Zahra; Mohammadzadeh, Naser
2016-06-01
Similar to traditional CMOS circuits, quantum circuit design flow is divided into two main processes: logic synthesis and physical design. Addressing the limitations imposed on optimization of the quantum circuit metrics because of no information sharing between logic synthesis and physical design processes, the concept of "physical synthesis" was introduced for quantum circuit flow, and a few techniques were proposed for it. Following that concept, in this paper a new approach for physical synthesis inspired by template matching idea in quantum logic synthesis is proposed to improve the latency of quantum circuits. Experiments show that by using template matching as a physical synthesis approach, the latency of quantum circuits can be improved by more than 23.55 % on average.
Magnet excitation circuits for DESY II
International Nuclear Information System (INIS)
In contrast to the existing synchrotron, DESY II will, since it is a separated function machine, have 5 independent magnet circuits: 1 for dipoles, 2 for quadrupoles and 2 for sextupoles. Moreover the repetition frequency will be 12.5 Hz instead of 50 Hz. The present White circuit allows the resonance frequency to be changed by a factor of 4 and will be used for the dipoles. The other 4 resonant circuits will be built from new elements and the magnet impedances are chosen such that all the magnets of one circuit can be connected in series. The dipole circuit will be operated with the existing dc-power supply and a new ac-power source of 12 pulse cycloconverter type without circulating current will be installed. The quadrupole and sextupole circuits will be excited by combined ac- and dc-power supplies of the type used for the FNL booster synchrotron
A concise guide to chaotic electronic circuits
Buscarino, Arturo; Frasca, Mattia; Sciuto, Gregorio
2014-01-01
This brief provides a source of instruction from which students can be taught about the practicalities of designing and using chaotic circuits. The text provides information on suitable materials, circuit design and schemes for design realization. Readers are then shown how to reproduce experiments on chaos and to design new ones. The text guides the reader easily from the basic idea of chaos to the laboratory test providing an experimental basis that can be developed for such applications as secure communications. This brief provides introductory information on sample chaotic circuits, includes coverage of their development, and the “gallery” section provides information on a wide range of circuits. Concise Guide to Chaotic Electronic Circuits will be useful to anyone running a laboratory class involving chaotic circuits and to students wishing to learn about them.
A Singularity in the Kirchhoff's Circuit Equations
Harsha, N R Sree
2016-01-01
Students often have difficulty in understanding qualitatively the behaviour of simple electric circuits. In particular, as different studies have shown, they find multiple batteries connected in multiple loops difficult to analyse. In a recent paper [Phys. Educ. 50 568 (2015)], we showed such an electric circuit, which consists of ideal batteries connected in parallel, that couldn't be solved by the existing circuit analysis methods. In this paper, we shall introduce a new mathematical method of solving simple electric circuits from the solutions of more general circuits and show that the currents, in this particular circuit, take the indeterminate 0/0 form. We shall also present some of the implications of teaching the method. We believe that the description presented in this paper should help the instructors in teaching the behaviour of multiple batteries connected in parallel.
Analog VLSI neural network integrated circuits
Kub, F. J.; Moon, K. K.; Just, E. A.
1991-01-01
Two analog very large scale integration (VLSI) vector matrix multiplier integrated circuit chips were designed, fabricated, and partially tested. They can perform both vector-matrix and matrix-matrix multiplication operations at high speeds. The 32 by 32 vector-matrix multiplier chip and the 128 by 64 vector-matrix multiplier chip were designed to perform 300 million and 3 billion multiplications per second, respectively. An additional circuit that has been developed is a continuous-time adaptive learning circuit. The performance achieved thus far for this circuit is an adaptivity of 28 dB at 300 KHz and 11 dB at 15 MHz. This circuit has demonstrated greater than two orders of magnitude higher frequency of operation than any previous adaptive learning circuit.
18k Channels single photon counting readout circuit for hybrid pixel detector
International Nuclear Information System (INIS)
We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm×20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96×192 pixels with 100 μm×100 μm pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 μW/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 μV/e− and the equivalent noise charge is 168 e− rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.
Energy Technology Data Exchange (ETDEWEB)
None
2013-08-01
This technology evaluation was prepared by Pacific Northwest National Laboratory on behalf of the U.S. Department of Energy’s Federal Energy Management Program (FEMP). The technology evaluation assesses techniques for optimizing reverse osmosis (RO) systems to increase RO system performance and water efficiency. This evaluation provides a general description of RO systems, the influence of RO systems on water use, and key areas where RO systems can be optimized to reduce water and energy consumption. The evaluation is intended to help facility managers at Federal sites understand the basic concepts of the RO process and system optimization options, enabling them to make informed decisions during the system design process for either new projects or recommissioning of existing equipment. This evaluation is focused on commercial-sized RO systems generally treating more than 80 gallons per hour.
Energy Technology Data Exchange (ETDEWEB)
McMordie Stoughton, Kate; Duan, Xiaoli; Wendel, Emily M.
2013-08-26
This technology evaluation was prepared by Pacific Northwest National Laboratory on behalf of the U.S. Department of Energy’s Federal Energy Management Program (FEMP). ¬The technology evaluation assesses techniques for optimizing reverse osmosis (RO) systems to increase RO system performance and water efficiency. This evaluation provides a general description of RO systems, the influence of RO systems on water use, and key areas where RO systems can be optimized to reduce water and energy consumption. The evaluation is intended to help facility managers at Federal sites understand the basic concepts of the RO process and system optimization options, enabling them to make informed decisions during the system design process for either new projects or recommissioning of existing equipment. This evaluation is focused on commercial-sized RO systems generally treating more than 80 gallons per hour.¬
Multiple stimulus reversible hydrogels
Gutowska, Anna; Krzyminski, Karol J.
2006-04-25
A polymeric solution capable of gelling upon exposure to a critical minimum value of a plurality of environmental stimuli is disclosed. The polymeric solution may be an aqueous solution utilized in vivo and capable of having the gelation reversed if at least one of the stimuli fall below, or outside the range of, the critical minimum value. The aqueous polymeric solution can be used either in industrial or pharmaceutical environments. In the medical environment, the aqueous polymeric solution is provided with either a chemical or radioisotopic therapeutic agent for delivery to a specific body part. The primary advantage of the process is that exposure to one environmental stimuli alone will not cause gelation, thereby enabling the therapeutic agent to be conducted through the body for relatively long distances without gelation occurring.
Reverse photoacoustic standoff spectroscopy
Van Neste, Charles W.; Senesac, Lawrence R.; Thundat, Thomas G.
2011-04-12
A system and method are disclosed for generating a reversed photoacoustic spectrum at a greater distance. A source may emit a beam to a target and a detector measures signals generated as a result of the beam being emitted on the target. By emitting a chopped/pulsed light beam to the target, it may be possible to determine the target's optical absorbance by monitoring the intensity of light collected at the detector at different wavelengths. As the wavelength of light is changed, the target may absorb or reject each optical frequency. Rejection may increase the intensity at the sensing element and absorption may decrease the intensity. Accordingly, an identifying spectrum of the target may be made with the intensity variation of the detector as a function of illuminating wavelength.
Reverse osmosis application studies
International Nuclear Information System (INIS)
To assess the feasibility of applying reverse osmosis (RO) and ultrafiltration (UF) for effective treatment of process and waste streams from operations at Ontario Hydro's thermal and nuclear stations, an extensive literature survey has been carried out. It is concluded that RO is not at present economic for pretreatment of Great Lakes water prior to ion exchange demineralization for boiler makeup. Using both conventional and novel commercial membrane modules, RO pilot studies are recommended for treatment of boiler cleaning wastes, fly ash leachates, and flue gas desulphurization scrubber discharges for removal of heavy metals. Volume reduction and decontamination of nuclear station low-level active liquid waste streams by RO/UF also appear promising. Research programmes are proposed
Worst Asymmetrical Short-Circuit Current
DEFF Research Database (Denmark)
Arana Aristi, Iván; Holmstrøm, O; Grastrup, L;
2010-01-01
In a typical power plant, the production scenario and the short-circuit time were found for the worst asymmetrical short-circuit current. Then, a sensitivity analysis on the missing generator values was realized in order to minimize the uncertainty of the results. Afterward the worst asymmetrical...... short-circuit current was analyzed in order to compare the results with the allowable DC current component based in the IEC. Finally the normal operating condition for the power plant was modeled....
A Survey of Memristive Threshold Logic Circuits
Maan, Akshay Kumar; Jayadevi, Deepthi Anirudhan; James, Alex Pappachen
2016-01-01
In this paper, we review the different memristive threshold logic (MTL) circuits that are inspired from the synaptic action of flow of neurotransmitters in the biological brain. Brain like generalisation ability and area minimisation of these threshold logic circuits aim towards crossing the Moores law boundaries at device, circuits and systems levels.Fast switching memory, signal processing, control systems, programmable logic, image processing, reconfigurable computing, and pattern recognit...
Logarithmic current-measuring transistor circuits
DEFF Research Database (Denmark)
Højberg, Kristian Søe
1967-01-01
Describes two transistorized circuits for the logarithmic measurement of small currents suitable for nuclear reactor instrumentation. The logarithmic element is applied in the feedback path of an amplifier, and only one dual transistor is used as logarithmic diode and temperature compensating...... transistor. A simple one-amplifier circuit is compared with a two-amplifier system. The circuits presented have been developed in connexion with an amplifier using a dual m.o.s. transistor input stage with diode-protected gates....
Integrated-Circuit Pseudorandom-Number Generator
Steelman, James E.; Beasley, Jeff; Aragon, Michael; Ramirez, Francisco; Summers, Kenneth L.; Knoebel, Arthur
1992-01-01
Integrated circuit produces 8-bit pseudorandom numbers from specified probability distribution, at rate of 10 MHz. Use of Boolean logic, circuit implements pseudorandom-number-generating algorithm. Circuit includes eight 12-bit pseudorandom-number generators, outputs are uniformly distributed. 8-bit pseudorandom numbers satisfying specified nonuniform probability distribution are generated by processing uniformly distributed outputs of eight 12-bit pseudorandom-number generators through "pipeline" of D flip-flops, comparators, and memories implementing conditional probabilities on zeros and ones.
Theory of circuit block switch-off
S. Henzler; J. Berthold; G. Georgakos; Schmitt-Landsiedel, D.
2005-01-01
Switching-off unused circuit blocks is a promising approach to supress static leakage currents in ultra deep sub-micron CMOS digital systems. Basic performance parameters of Circuit Block Switch-Off (CBSO) schemes are defined and their dependence on basic circuit parameters is estimated. Therefore the design trade-off between strong leakage suppression in idle mode and adequate dynamic performance in active mode can be supported by simple analytic investigations. Additionally, a guideline for...
Hyperchaotic circuit with damped harmonic oscillators
DEFF Research Database (Denmark)
Lindberg, Erik; Murali, K.; Tamasevicius, A.
2001-01-01
A simple fourth-order hyperchaotic circuit with damped harmonic oscillators is described. ANP3 and PSpice simulations including an eigenvalue study of the linearized Jacobian are presented together with a hardware implementation. The circuit contains two inductors with series resistance, two ideal...... capacitors and one nonlinear active conductor. The Lyapunov exponents are presented to confirm the hyperchaotic nature of the oscillations of the circuit. The nonlinear conductor is realized with a diode. A negative impedance converter and a linear resistor. The performance of the circuit is investigated by...
Analog circuit design art, science, and personalities
Williams, Jim
1991-01-01
Analog Circuit Design: Art, Science, and Personalities discusses the many approaches and styles in the practice of analog circuit design. The book is written in an informal yet informative manner, making it easily understandable to those new in the field. The selection covers the definition, history, current practice, and future direction of analog design; the practice proper; and the styles in analog circuit design. The book also includes the problems usually encountered in analog circuit design; approach to feedback loop design; and other different techniques and applications. The text is
Modeling of transformers using circuit simulators
Energy Technology Data Exchange (ETDEWEB)
Archer, W.E.; Deveney, M.F.; Nagel, R.L.
1994-07-01
Transformers of two different designs; and unencapsulated pot core and an encapsulated toroidal core have been modeled for circuit analysis with circuit simulation tools. We selected MicroSim`s PSPICE and Anology`s SABER as the simulation tools and used experimental BH Loop and network analyzer measurements to generate the needed input data. The models are compared for accuracy and convergence using the circuit simulators. Results are presented which demonstrate the effects on circuit performance from magnetic core losses, eddy currents, and mechanical stress on the magnetic cores.
High Speed Solid State Circuit Breaker
Podlesak, Thomas F.
1993-01-01
The U.S. Army Research Laboratory, Fort Monmouth, NJ, has developed and is installing two 3.3 MW high speed solid state circuit breakers at the Army's Pulse Power Center. These circuit breakers will interrupt 4160V three phase power mains in no more than 300 microseconds, two orders of magnitude faster than conventional mechanical contact type circuit breakers. These circuit breakers utilize Gate Turnoff Thyristors (GTO's) and are currently utility type devices using air cooling in an air conditioned enclosure. Future refinements include liquid cooling, either water or two phase organic coolant, and more advanced semiconductors. Each of these refinements promises a more compact, more reliable unit.
Power two-step dc circuit breaker
International Nuclear Information System (INIS)
A two-step circuit breaker with replaceable current-conducting elements is described. It is designed for a breakjng capacity of 6x109 W (the maximum current is 150 kA) with the 80-100 μs time of current transfer from inductive storage to the load and thermal stability of 1011 A2xs. A pneumatic circuit breaker with replaceable elements is used as the first step, and exploding-wire circuit breaker as the second one. The circuit breaker measures 1650x1360x1495 mm and weighs 1 t
Electric circuit theory applied electricity and electronics
Yorke, R
1981-01-01
Electric Circuit Theory provides a concise coverage of the framework of electrical engineering. Comprised of six chapters, this book emphasizes the physical process of electrical engineering rather than abstract mathematics. Chapter 1 deals with files, circuits, and parameters, while Chapter 2 covers the natural and forced response of simple circuit. Chapter 3 talks about the sinusoidal steady state, and Chapter 4 discusses the circuit analysis. The fifth chapter tackles frequency response of networks, and the last chapter covers polyphase systems. This book will be of great help to electrical
Circuit breaker maintenance, sentinels on guard
Energy Technology Data Exchange (ETDEWEB)
Tanguay, F.
2003-07-01
Circuit breakers are essential components of every type and size of power system, and their maintenance is a matter of prime importance. This article provides a list of typical circuit breaker maintenance routines for each type of insulating medium and each type of breaker mechanism, and offers a number of useful tips to ensure the success of a circuit breaker maintenance program. It also suggests sources of information about maintenance programs for circuit breakers such as the National Electrical Testing Association's Maintenance Specifications, and companies that specialize in this type of service. 3 tabs.
An Algebra of Reversible Quantum Computing
Wang, Yong
2015-01-01
Based on the axiomatization of reversible computing RACP, we generalize it to quantum reversible computing which is called qRACP. By use of the framework of quantum configuration, we show that structural reversibility and quantum state reversibility must be satisfied simultaneously in quantum reversible computation. RACP and qRACP has the same axiomatization modulo the so-called quantum forward-reverse bisimularity, that is, classical reversible computing and quantum reversible computing are ...
Towards a Reversible Functional Language
DEFF Research Database (Denmark)
Yokoyama, Tetsuo; Axelsen, Holger Bock; Glück, Robert
2011-01-01
/equality operator also simplifies inverse computation and program inversion. We discuss the advantages of a reversible functional language using example programs, including run-length encoding. Program inversion is seen to be as lightweight as for imperative reversible languages and realized by recursive descent......We identify concepts of reversibility for a functional language by means of a set of semantic rules with specific properties. These properties include injectivity along with local backward determinism, an important operational property for an efficient reversible language. We define a concise...... reversible first-order functional language in which access to the backward semantics is provided to the programmer by inverse function calls. Reversibility guarantees that in this language a backward run (inverse interpretation) is as fast as the corresponding forward run itself. By adopting a symmetric...
Solid state multi-ensemble quantum computer in waveguide circuit model
Moiseev, Sergey A; Gubaidullin, Firdus F
2010-01-01
The first realization of solid state quantum computer was demonstrated recently by using artificial atoms -- transmons in superconducting resonator. Here, we propose a novel architecture of flexible and scalable quantum computer based on a waveguide circuit coupling many quantum nodes of controlled atomic ensembles. For the first time, we found the optimal practically attainable parameters of the atoms and circuit for 100{%} efficiency of quantum memory for multi qubit photon fields and confirmed experimentally the predicted perfect storage. Then we revealed self modes for reversible transfer of qubits between the quantum memory node and arbitrary other nodes. We found a realization of iSWAP gate via direct coupling of two arbitrary nodes with a processing rate accelerated proportionally to number of atoms in the node. A large number of the two-qubit gates can be simultaneously realized in the circuit for implementation of parallel quantum processing. Dynamic coherent elimination procedure of excess quantum s...
Company policy toward reverse logistics
Klapalová Alena; Králová Maria
2012-01-01
The paper deals with the results of questionnaire survey examining the character of companies’ policies towards management of reverse flows logistics, namely innovativeness of policy related to the reasons of involvement to manage reverse flows and to the planning system of reverse logistics. Answers from the informants and respondents from 150 Czech companies were analysed with the employment of statistical methods (frequencies, contingency tables and Man – Whitney test) to explore the poten...
Geomagnetic Reversals during the Phanerozoic.
McElhinny, M W
1971-04-01
An antalysis of worldwide paleomagnetic measurements suggests a periodicity of 350 x 10(6) years in the polarity of the geomagnetic field. During the Mesozoic it is predominantly normal, whereas during the Upper Paleozoic it is predominantly reversed. Although geomagnetic reversals occur at different rates throughout the Phanerozoic, there appeaars to be no clear correlation between biological evolutionary rates and reversal frequency. PMID:17735224
Magnetic reversals and mass extinctions
Raup, D. M.
1985-01-01
The results of a study of reversals of the earth's magnetic field over the past 165 Myr are presented. A stationary periodicity of 30 Myr emerges which predicts pulses of increased reversal activity centered at 10, 40, 70, . . . Myr before the present. The correlation between the reversal intensity and biological extinctions is examined, and a nontrivial discrepancy is found between the magnetic and extinction periodicity.
Magnetic Reversal on Vicinal Surfaces
Hyman, R. A.; Zangwill, A.; Stiles, M. D.
1998-01-01
We present a theoretical study of in-plane magnetization reversal for vicinal ultrathin films using a one-dimensional micromagnetic model with nearest-neighbor exchange, four-fold anisotropy at all sites, and two-fold anisotropy at step edges. A detailed "phase diagram" is presented that catalogs the possible shapes of hysteresis loops and reversal mechanisms as a function of step anisotropy strength and vicinal terrace length. The steps generically nucleate magnetization reversal and pin the...
Multilevel modulation of a sensory motor circuit during C. elegans sleep and arousal
Cho, Julie Y.; Paul W Sternberg
2014-01-01
Sleep is characterized by behavioral quiescence, homeostasis, increased arousal threshold, and rapid reversibility. Understanding how these properties are encoded by a neuronal circuit has been difficult, and no single molecular or neuronal pathway has been shown to be responsible for the regulation of sleep. Taking advantage of the well-mapped neuronal connections of Caenorhabditis elegans and the sleep-like states in this animal, we demonstrate the changed properties of both sensory neurons...
2010-10-01
... 49 Transportation 4 2010-10-01 2010-10-01 false Reverse gear. 230.89 Section 230.89 Transportation... Reversing Gear § 230.89 Reverse gear. (a) General provisions. Reverse gear, reverse levers, and quadrants... quadrant. Proper counterbalance shall be provided for the valve gear. (b) Air-operated power reverse...
A Survey of Fast Analog Circuit Analysis Algorithm using SPICE
T.Murugajothi
2014-01-01
is paper presents a fast analog circuit analysis algorithm, fundamental circuit-based circuit analysis, for circuits being repeatedly modified and verified in product development. The algorithm reuses previous circuit simulation result on successive changed circuit analysis to achieve simulation operation reduction. The algorithm is implemented with SPICE simulator on linear and nonlinear circuit applications with the proposed device delta models. The experiments show that t...
Towards programmable plant genetic circuits.
Medford, June I; Prasad, Ashok
2016-07-01
Synthetic biology enables the construction of genetic circuits with predictable gene functions in plants. Detailed quantitative descriptions of the transfer function or input-output function for genetic parts (promoters, 5' and 3' untranslated regions, etc.) are collected. These data are then used in computational simulations to determine their robustness and desired properties, thereby enabling the best components to be selected for experimental testing in plants. In addition, the process forms an iterative workflow which allows vast improvement to validated elements with sub-optimal function. These processes enable computational functions such as digital logic in living plants and follow the pathway of technological advances which took us from vacuum tubes to cell phones. PMID:27297052
Advanced Microwave Circuits and Systems
DEFF Research Database (Denmark)
This book is based on recent research work conducted by the authors dealing with the design and development of active and passive microwave components, integrated circuits and systems. It is divided into seven parts. In the first part comprising the first two chapters, alternative concepts and...... equations for multiport network analysis and characterization are provided. A thru-only de-embedding technique for accurate on-wafer characterization is introduced. The second part of the book corresponds to the analysis and design of ultra-wideband low-noise amplifiers (LNA). The LNA is the most critical...... component in a receiving system. Its performance determines the overall system sensitivity because it is the first block to amplify the received signal from the antenna. Hence, for the achievement of high receiver performance, the LNA is required to have a low noise figure with good input matching as well...
Electrical circuit theory and technology
Bird, John
2014-01-01
This much-loved textbook explains the principles of electrical circuit theory and technology so that students of electrical and mechanical engineering can master the subject. Real-world situations and engineering examples put the theory into context. The inclusion of worked problems with solutions help you to learn and further problems then allow you to test and confirm you have fully understood each subject. In total the book contains 800 worked problems, 1000 further problems and 14 revision tests with answers online. This an ideal text for foundation and undergraduate degree students and those on upper level vocational engineering courses, in particular electrical and mechanical. It provides a sound understanding of the knowledge required by technicians in fields such as electrical engineering, electronics and telecommunications. This edition has been updated with developments in key areas such as semiconductors, transistors, and fuel cells, along with brand new material on ABCD parameters and Fourier's An...
Beta-gamma discriminator circuit
International Nuclear Information System (INIS)
The major difficulty encountered in the determination of beta-ray dose in field conditions is generally the presence of a relatively high gamma-ray component. Conventional dosimetry instruments use a shield on the detector to estimate the gamma-ray component in comparison with the beta-ray component. More accurate dosimetry information can be obtained from the measured beta spectrum itself. At Los Alamos, a detector and discriminator circuit suitable for use in a portable spectrometer have been developed. This instrument will discriminate between gammas and betas in a mixed field. The portable package includes a 256-channel MCA which can be programmed to give a variety of outputs, including a spectral display, and may be programmed to read dose directly
TIME CALIBRATED OSCILLOSCOPE SWEEP CIRCUIT
Smith, V.L.; Carstensen, H.K.
1959-11-24
An improved time calibrated sweep circuit is presented, which extends the range of usefulness of conventional oscilloscopes as utilized for time calibrated display applications in accordance with U. S. Patent No. 2,832,002. Principal novelty resides in the provision of a pair of separate signal paths, each of which is phase and amplitude adjustable, to connect a high-frequency calibration oscillator to the output of a sawtooth generator also connected to the respective horizontal deflection plates of an oscilloscope cathode ray tube. The amplitude and phase of the calibration oscillator signals in the two signal paths are adjusted to balance out feedthrough currents capacitively coupled at high frequencies of the calibration oscillator from each horizontal deflection plate to the vertical plates of the cathode ray tube.
Microtubule as nanobioelectronic nonlinear circuit
Directory of Open Access Journals (Sweden)
Sekulić Dalibor L.
2012-01-01
Full Text Available In recent years, the use of biological molecules has offered exciting alternatives to conventional synthetic methods. Specific methods use various biological templates to direct the deposition and patterning of inorganic materials. Here we have established a new electrical model of microtubules as a biological nanoscale circuit based on polyelectrolyte features of cylindrical biopolymers. Our working hypothesis is that microtubules play an active role in sub-cellular computation and signaling via electronic and protonic conductivity and can thus be made useful in hybrid materials that offer novel electronic characteristics. We verify these hypotheses both computationally and analytically through a quantitative model based on the atomic resolution structures of the key functional proteins.
ASYMMETRIC SOLAR POLAR FIELD REVERSALS
International Nuclear Information System (INIS)
The solar polar fields reverse because magnetic flux from decaying sunspots moves toward the poles, with a preponderance of flux from the trailing spots. If there is a strong asymmetry, in the sense that most activity is in the northern hemisphere, then that excess flux will move toward the north pole and reverse that pole first. If there is more activity in the south later on, then that flux will help to reverse the south pole. In this way, two humps in the solar activity and a corresponding difference in the time of reversals develop (in the ideal case). Such a difference was originally noted in the very first observation of polar field reversal just after the maximum of the strongly asymmetric solar cycle 19, when the southern hemisphere was most active before sunspot maximum and the south pole duly reversed first, followed by the northern hemisphere more than a year later, when that hemisphere became most active. Solar cycles since then have had the opposite asymmetry, with the northern hemisphere being most active before solar maximum. We show that polar field reversals for these cycles have all happened in the north first, as expected. This is especially noteworthy for the present solar cycle 24. We suggest that the association of two or more peaks of solar activity when separated by hemispheres with correspondingly different times of polar field reversals is a general feature of the cycle, and that asymmetric polar field reversals are simply a consequence of the asymmetry of solar activity.
Initiation of HIV Reverse Transcription
Directory of Open Access Journals (Sweden)
Roland Marquet
2010-01-01
Full Text Available Reverse transcription of retroviral genomes into double stranded DNA is a key event for viral replication. The very first stage of HIV reverse transcription, the initiation step, involves viral and cellular partners that are selectively packaged into the viral particle, leading to an RNA/protein complex with very specific structural and functional features, some of which being, in the case of HIV-1, linked to particular isolates. Recent understanding of the tight spatio-temporal regulation of reverse transcription and its importance for viral infectivity further points toward reverse transcription and potentially its initiation step as an important drug target.
Integrated Circuit Electromagnetic Immunity Handbook
Sketoe, J. G.
2000-08-01
This handbook presents the results of the Boeing Company effort for NASA under contract NAS8-98217. Immunity level data for certain integrated circuit parts are discussed herein, along with analytical techniques for applying the data to electronics systems. This handbook is built heavily on the one produced in the seventies by McDonnell Douglas Astronautics Company (MDAC, MDC Report E1929 of 1 August 1978, entitled Integrated Circuit Electromagnetic Susceptibility Handbook, known commonly as the ICES Handbook, which has served countless systems designers for over 20 years). Sections 2 and 3 supplement the device susceptibility data presented in section 4 by presenting information on related material required to use the IC susceptibility information. Section 2 concerns itself with electromagnetic susceptibility analysis and serves as a guide in using the information contained in the rest of the handbook. A suggested system hardening requirements is presented in this chapter. Section 3 briefly discusses coupling and shielding considerations. For conservatism and simplicity, a worst case approach is advocated to determine the maximum amount of RF power picked up from a given field. This handbook expands the scope of the immunity data in this Handbook is to of 10 MHz to 10 GHz. However, the analytical techniques provided are applicable to much higher frequencies as well. It is expected however, that the upper frequency limit of concern is near 10 GHz. This is due to two factors; the pickup of microwave energy on system cables and wiring falls off as the square of the wavelength, and component response falls off at a rapid rate due to the effects of parasitic shunt paths for the RF energy. It should be noted also that the pickup on wires and cables does not approach infinity as the frequency decreases (as would be expected by extrapolating the square law dependence of the high frequency roll-off to lower frequencies) but levels off due to mismatch effects.
Schütt, Matthias
2016-01-01
The subject of this thesis was to observe the short-circuit currents at electrical distribution boards. The purpose was to investigate different methods of protecting switchgears from dam-ages caused by short-circuit currents. Manufactures of switchgears need to indicate the rated short-circuit withstand current of their assembly. This thesis is presenting methods of defining the right value of the short-circuit withstand current. This thesis presents theoretical information about the cau...
A Reversible Processor Architecture and its Reversible Logic Design
DEFF Research Database (Denmark)
Thomsen, Michael Kirkedal; Axelsen, Holger Bock; Glück, Robert
2012-01-01
We describe the design of a purely reversible computing architecture, Bob, and its instruction set, BobISA. The special features of the design include a simple, yet expressive, locally-invertible instruction set, and fully reversible control logic and address calculation. We have designed an arch...
Field reversal experiments (FRX)
International Nuclear Information System (INIS)
The equilibrium, confinement, and stability properties of the reversed-field configuration (RFC) are being studied in two theta-pinch facilities. The RFC is an elongated toroidal plasma confined in a purely poloidal field geometry. The open field lines of the linear theta pinch support the closed-field RFC much like the vertical field centers the toroidal plasma in a tokamak. Depending on stability and confinement properties, the RFC might be used to greatly reduce the axial losses in linear fusion devices such as mirrors, theta pinches, and liners. The FRX systems produce RFC's with a major radius R = 2-6 cm, minor radius a approximately 2 cm, and a total length l approximately 35 cm. The observed temperatures are T/sub e/ approximately 100 eV and T/sub i/ = 150-350 eV with a peak density n approximately 2 x 1015 cm-3. After the plasma reaches equilibrium, the RFC remains stable for up to 30 μs followed by the rapid growth of the rotational m = 2 instability, which terminates the confinement. During the stable equilibrium, the particle and energy confinement times are more than 10 times longer than in an open-field system. The behavior of the m = 2 mode qualitatively agrees with the theoretically predicted instability for rotational velocities exceeding some critical value
International Nuclear Information System (INIS)
We describe the use of TILLING in Lotus japonicus and the development of deletion (De)-TILLING in Medicago truncatula. The evolution of RevGenUK has been driven by the development of reverse genetics technologies in these two model legumes and Brassica rapa, which functions as a translational species for brassica crops. TILLING and De-TILLING, are underpinned by populations of plants mutagenised with either EMS (that causes point mutations) or fast neutrons (that cause deletions) respectively. They permit the isolation of either allelic series of mutants or knockouts. Mutation detection will be developed from a number of independent gel-based systems to be carried out on a single platform - capillary electrophoresis. We are currently TILLING in both model legumes, but these developments will be applied to all three species. The resource will develop an open source database-driven system to support laboratory information management, analysis and the cataloguing of mutants in a genome context across all the species. (author)
Field reversal experiments (FRX)
International Nuclear Information System (INIS)
The equilibrium, confinement, and stability properties of the reversed-field configuration (RFC) are being studied in two theta-pinch facilities. The RFC is an elongated toroidal plasma confined in a purely poloidal field geometry. The open field lines of the linear theta pinch support the closed-field RFC much like the vertical field centres the toroidal plasma in a tokamak. Depending on stability and confinement properties, the RFC might be used to greatly reduce the axial losses in linear fusion devices such as mirrors, theta pinches, and liners. The FRX systems produce RFCs with a major radius R=2-6cm, a minor radius a approximately 2cm, and a total length l approximately 35cm. The observed temperatures are Tsub(e) approximately 100eV and Tsub(i)=150-350eV with a peak density n approximately 2x1015cm-3. After the plasma has reached equilibrium, the RFC remains stable for up to 30μs, followed by the rapid growth of the rotational m=2 instability, which terminates the confinement. During the stable equilibrium, the particle and energy confinement times are more than 10 times longer than in an open-field system. The behaviour of the m=2 mode agrees qualitatively with the theoretically predicted instability for rotational velocities exceeding some critical value. (author)
Reversible micromachining locator
Salzer, L.J.; Foreman, L.R.
1999-08-31
This invention provides a device which includes a locator, a kinematic mount positioned on a conventional tooling machine, a part carrier disposed on the locator and a retainer ring. The locator has disposed therein a plurality of steel balls, placed in an equidistant position circumferentially around the locator. The kinematic mount includes a plurality of magnets which are in registry with the steel balls on the locator. In operation, a blank part to be machined is placed between a surface of a locator and the retainer ring (fitting within the part carrier). When the locator (with a blank part to be machined) is coupled to the kinematic mount, the part is thus exposed for the desired machining process. Because the locator is removably attachable to the kinematic mount, it can easily be removed from the mount, reversed, and reinserted onto the mount for additional machining. Further, the locator can likewise be removed from the mount and placed onto another tooling machine having a properly aligned kinematic mount. Because of the unique design and use of magnetic forces of the present invention, positioning errors of less than 0.25 micrometer for each machining process can be achieved. 7 figs.
International Nuclear Information System (INIS)
We describe the use of TILLING in Lotus japonicus and the development of deletion (De)-TILLING in Medicago truncatula. The evolution of RevGen UK has been driven by the development of reverse genetics technologies in these two model legumes and Brassica rapa, which functions as a translational species for brassica crops. TILLING and De-TILLING are underpinned by populations of plants mutagenized with either EMS (that causes point mutations) or fast neutrons (that cause deletions), respectively. They permit the isolation of either allelic series of mutants or knockouts. Mutation detection will be developed from a number of independent gel-based systems to be carried out on a single platform - capillary electrophoresis. We are currently TILLING in both model legumes, but these developments will be applied to all three species. The resource will develop an open source database-driven system to support laboratory information management, analysis and the cataloguing of mutants in a genome context across all the species. (author)
Ion chromatography in the manufacture of multilayer circuit boards
Smith, Robert E.
1990-09-01
Ion chromatography (IC) has proven useful in analyzing chemical solutions used in the manufacture of multilayer circuit boards. The manufacturing process is described briefly and previously published IC methods are reviewed. Then, methods are described for determining chlorate and chlorite in a brown oxide solution; salicylic acid in an epoxy cure agent; formate, sulfate, and tartrate in an electroless copper bath; anionic detergents in a tin-lead brightener and in a cleaning solution; and aqueous photoresist and nonionic brightener in a tin-lead bath. Anion exchange, reverse phase HPLC on a poly(styrene/divinylbenzene), PS/DVB, column and 2-D liquid chromatography also are described. Chemically suppressed conductivity and photometric detection are used.
Reversible and efficient conversion between microwave and optical light
Andrews, R W; Purdy, T P; Cicak, K; Simmonds, R W; Regal, C A; Lehnert, K W
2013-01-01
Converting low-frequency electrical signals into much higher frequency optical signals has enabled modern communications networks to leverage both the strengths of microfabricated electrical circuits and optical fiber transmission, allowing information networks to grow in size and complexity. A microwave-to-optical converter in a quantum information network could provide similar gains by linking quantum processors via low-loss optical fibers and enabling a large-scale quantum network. However, no current technology can convert low-frequency microwave signals into high-frequency optical signals while preserving their fragile quantum state. For this demanding application, a converter must provide a near-unitary transformation between different frequencies; that is, the ideal transformation is reversible, coherent, and lossless. Here we demonstrate a converter that reversibly, coherently, and efficiently links the microwave and optical portions of the electromagnetic spectrum. We use our converter to transfer cl...
Active components for integrated plasmonic circuits
DEFF Research Database (Denmark)
Krasavin, A.V.; Bolger, P.M.; Zayats, A.V.;
2009-01-01
We present a comprehensive study of highly efficient and compact passive and active components for integrated plasmonic circuit based on dielectric-loaded surface plasmon polariton waveguides.......We present a comprehensive study of highly efficient and compact passive and active components for integrated plasmonic circuit based on dielectric-loaded surface plasmon polariton waveguides....
Textbook Error: Short Circuiting on Electrochemical Cell
Bonicamp, Judith M.; Clark, Roy W.
2007-01-01
Short circuiting an electrochemical cell is an unreported but persistent error in the electrochemistry textbooks. It is suggested that diagrams depicting a cell delivering usable current to a load be postponed, the theory of open-circuit galvanic cells is explained, the voltages from the tables of standard reduction potentials is calculated and…
The Circuit Ideal of a Vector Configuration
DEFF Research Database (Denmark)
Jensen, Anders Nedergaard; Bogart, Tristram; Thomas, Rekha
The circuit ideal, $\\ica$, of a configuration $\\A = \\{\\a_1, ..., \\a_n\\} \\subset \\Z^d$ is the ideal generated by the binomials ${\\x}^{\\cc^+} - {\\x}^{\\cc^-} \\in \\k[x_1, ..., x_n]$ as $\\cc = \\cc^+ - \\cc^- \\in \\Z^n$ varies over the circuits of $\\A$. This ideal is contained in the toric ideal, $\\ia$, ...
IMPORTANT NOTICE: Cancellation of shuttle Circuit 3
2013-01-01
Circuit 3 of the CERN Shuttle Service (Point 5), which has served CMS since the start of LS1, will be cancelled with effect from Tuesday 16 April. This decision has been taken in consultation with CMS, as the circuit was seldom used. In response to increasing demand for Circuit 1 - Meyrin and feedback from passengers, the two Circuit 3 journeys will be switched to Circuit 1 – Meyrin (see new timetable below): Mornings: Four journeys instead of three. Circuit 1 now starts at 8:10 (instead of 8:19 a.m.) and runs until 9:27 a.m. (instead of 9:16 a.m.). Lunchtimes: Five journeys in place between 12:10 p.m. and 1:47 p.m. Evenings: Circuit starts at 5:23 p.m. (instead of 5:03 p.m.) and ends at 6:20 p.m. at Building 33. Please note that the circuit will depart from Building 13 instead of Building 33.
Sustainability issues in circuit board recycling
DEFF Research Database (Denmark)
Legarth, Jens Brøbech; Alting, Leo; Baldo, Gian Luca
1995-01-01
The resource recovery and environmental impact issues of printed circuit board recycling by secondary copper smelters are discussed. Guidelines concerning material selection for circuit board manufacture and concerning the recycling processes are given to enhance recovery efficiency and to lower...... the impacts on the external environment from recycling...
Water quality control program in experimental circuits
International Nuclear Information System (INIS)
The Water Quality Control Program of the Experimental Circuits visualizes studying the water chemistry of the cooling in the primary and secondary circuits, monitoring the corrosion of the systems and studying the mechanism of the corrosion products transport in the systems. (author)
HOW TO MAINTAIN SF6 CIRCUIT BREAKER
Snigdha Sharma, Hemant bharadwaj,
2012-01-01
India’s growing economy needs an efficient powertransmission system to meet the increasing demand forreliable and affordable power. Circuit breakers play animportant role in protection system of electrical powertransmission networks. A circuit breaker is anautomatically operated electrical switch which detects afault condition and interrupt immediately todiscontinue electrical flow. So its maintenance deservesspecial considerations in order to prevent theequipments an...