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Sample records for 4-bit reversible circuits

  1. Efficient Algorithms for Optimal 4-Bit Reversible Logic System Synthesis

    Directory of Open Access Journals (Sweden)

    Zhiqiang Li

    2013-01-01

    Full Text Available Owing to the exponential nature of the memory and run-time complexity, many methods can only synthesize 3-bit reversible circuits and cannot synthesize 4-bit reversible circuits well. We mainly absorb the ideas of our 3-bit synthesis algorithms based on hash table and present the efficient algorithms which can construct almost all optimal 4-bit reversible logic circuits with many types of gates and at mini-length cost based on constructing the shortest coding and the specific topological compression; thus, the lossless compression ratio of the space of n-bit circuits reaches near 2×n!. This paper presents the first work to create all 3120218828 optimal 4-bit reversible circuits with up to 8 gates for the CNT (Controlled-NOT gate, NOT gate, and Toffoli gate library, and it can quickly achieve 16 steps through specific cascading created circuits.

  2. Designing Parity Preserving Reversible Circuits

    OpenAIRE

    Paul, Goutam; Chattopadhyay, Anupam; Chandak, Chander

    2013-01-01

    Making a reversible circuit fault-tolerant is much more difficult than classical circuit and there have been only a few works in the area of parity-preserving reversible logic design. Moreover, all of these designs are ad hoc, based on some pre-defined parity preserving reversible gates as building blocks. In this paper, we for the first time propose a novel and systematic approach towards parity preserving reversible circuits design. We provide some related theoretical results and give two a...

  3. A Low-cost 4 Bit, 10 Giga-samples-per-second Analog-to-digital Converter Printed Circuit Board Assembly for FPGA-based Backends

    Science.gov (United States)

    Jiang, Homin; Yu, Chen-Yu; Kubo, Derek; Chen, Ming-Tang; Guzzino, Kim

    2016-11-01

    In this study, a 4 bit, 10 giga-samples-per-second analog-to-digital converter (ADC) printed circuit board assembly (PCBA) was designed, manufactured, and characterized for digitizing radio telescopes. For this purpose, an Adsantec ANST7120A-KMA flash ADC chip was used. Together with the field-programmable gate array platform, developed by the Collaboration for Astronomy Signal Processing and Electronics Research community, the PCBA enables data acquisition with a wide bandwidth and simplifies the intermediate frequency section. In the current version, the PCBA and the chip exhibit an analog bandwidth of 10 GHz (3 dB loss) and 20 GHz, respectively, which facilitates second, third, and even fourth Nyquist sampling. The following average performance parameters were obtained from the first and second Nyquist zones of the three boards: a spurious-free dynamic range of 31.35/30.45 dB, a signal-to-noise and distortion ratio of 22.95/21.83 dB, and an effective number of bits of 3.65/3.43, respectively.

  4. Fault Testing for Reversible Circuits

    CERN Document Server

    Patel, K N; Markov, I L; Patel, Ketan N.; Hayes, John P.; Markov, Igor L.

    2004-01-01

    Applications of reversible circuits can be found in the fields of low-power computation, cryptography, communications, digital signal processing, and the emerging field of quantum computation. Furthermore, prototype circuits for low-power applications are already being fabricated in CMOS. Regardless of the eventual technology adopted, testing is sure to be an important component in any robust implementation. We consider the test set generation problem. Reversibility affects the testing problem in fundamental ways, making it significantly simpler than for the irreversible case. For example, we show that any test set that detects all single stuck-at faults in a reversible circuit also detects all multiple stuck-at faults. We present efficient test set constructions for the standard stuck-at fault model as well as the usually intractable cell-fault model. We also give a practical test set generation algorithm, based on an integer linear programming formulation, that yields test sets approximately half the size o...

  5. Novel Design of a Nano-metric Fast 4*4 Reversible unsigned Wallace Multiplier Circuit

    Directory of Open Access Journals (Sweden)

    Ehsan PourAliAkbar

    2015-12-01

    Full Text Available One of the most promising technologies in designing low-power circuits is reversible computing. It is used in nanotechnology, quantum computing, quantum dot cellular automata (QCA, DNA computing, optical computing and in CMOS low-power designs. Since reversible logic is subject to certain restrictions (e.g. fan-out and feedback are not allowed, traditional synthesis methods are not applicable and specific methods have been developed. In this paper, we offer a Wallace 4*4 reversible multiplier circuits which have faster speed and lower complexity in comparison with the other multiplier circuits. This circuit performs better, regarding to the number of gates, garbage outputs and constant inputs work better than the same circuits. In this paper, Peres gate is used as HA and HNG gate is used as FA. We offer the best method to multiply two 4 bit numbers. These Nano-metric circuits can be used in very complex systems.

  6. A finite alternation result for reversible boolean circuits

    OpenAIRE

    Selinger, Peter

    2016-01-01

    We say that a reversible boolean function on n bits has alternation depth d if it can be written as the sequential composition of d reversible boolean functions, each of which acts only on the top n-1 bits or on the bottom n-1 bits. We show that every reversible boolean function of n >= 4 bits has alternation depth 9.

  7. Delay Reduction in Optimized Reversible Multiplier Circuit

    Directory of Open Access Journals (Sweden)

    Mohammad Assarian

    2012-01-01

    Full Text Available In this study a novel reversible multiplier is presented. Reversible logic can play a significant role in computer domain. This logic can be applied in quantum computing, optical computing processing, DNA computing, and nanotechnology. One condition for reversibility of a computable model is that the number of input equate with the output. Reversible multiplier circuits are the circuits used frequently in computer system. For this reason, optimization in one reversible multiplier circuit can reduce its volume of hardware on one hand and increases the speed in a reversible system on the other hand. One of the important parameters that optimize a reversible circuit is reduction of delays in performance of the circuit. This paper investigates the performance characteristics of the gates, the circuits and methods of optimizing the performance of reversible multiplier circuits. Results showed that reduction of the reversible circuit layers has lead to improved performance due to the reduction of the propagation delay between input and output period. All the designs are in the nanometric scales.

  8. An Approach to Simplify Reversible Logic Circuits

    Directory of Open Access Journals (Sweden)

    Pabitra Roy

    2012-09-01

    Full Text Available Energy loss is one of the major problems in traditional irreversible circuits. For every bit of information loss kTln2 joules of heat is lost. In order to reduce the energy loss the concept of reversible logic circuits are introduced. Here we have described an algorithm for simplifying the reversible logic circuit and hence reduction of circuit cost and energy. The algorithm considers sub_circuit with respect to their number of lines and contiguous gates. The resulting sub_circuits are re-synthesized with smaller equivalent implementation. The process continues until circuit cost reaches good enough for Application or until a given computation budget has been exhausted. The circuit is constructed by NOT, CNOT and Toffoli gates only. By applying the algorithm and using the equivalent implementation we will get significant reduction of circuit cost and hence energy.

  9. Depth-optimized reversible circuit synthesis

    Science.gov (United States)

    Arabzadeh, Mona; Saheb Zamani, Morteza; Sedighi, Mehdi; Saeedi, Mehdi

    2013-04-01

    In this paper, simultaneous reduction of circuit depth and synthesis cost of reversible circuits in quantum technologies with limited interaction is addressed. We developed a cycle-based synthesis algorithm which uses negative controls and limited distance between gate lines. To improve circuit depth, a new parallel structure is introduced in which before synthesis a set of disjoint cycles are extracted from the input specification and distributed into some subsets. The cycles of each subset are synthesized independently on different sets of ancillae. Accordingly, each disjoint set can be synthesized by different synthesis methods. Our analysis shows that the best worst-case synthesis cost of reversible circuits in the linear nearest neighbor architecture is improved by the proposed approach. Our experimental results reveal the effectiveness of the proposed approach to reduce cost and circuit depth for several benchmarks.

  10. Transistor Level Implementation of Digital Reversible Circuits

    Directory of Open Access Journals (Sweden)

    K.Prudhvi Raj

    2015-12-01

    Full Text Available Now a days each and every electronic gadget is desi gning smartly and provides number of applications, so these designs dissipate high amount of power. Rever sible logic is becoming one of the best emerging de sign technologies having its applications in low power C MOS, Quantum computing and Nanotechnology. Reversible logic plays an important role in the des ign of energy efficient circuits. Adders and subtra ctors are the essential blocks of the computing systems. In this paper, reversible gates and circuits are de signed and implemented in CMOS and pass transistor logic u sing Mentor graphics backend tools. A four-bit ripp le carry adder/subtractor and an eight-bit reversible Carry Skip Adder are implemented and compared with the conventional circuits

  11. Reversible and quantum circuits optimization and complexity analysis

    CERN Document Server

    Abdessaied, Nabila

    2016-01-01

    This book presents a new optimization flow for quantum circuits realization. At the reversible level, optimization algorithms are presented to reduce the quantum cost. Then, new mapping approaches to decompose reversible circuits to quantum circuits using different quantum libraries are described. Finally, optimization techniques to reduce the quantum cost or the delay are applied to the resulting quantum circuits. Furthermore, this book studies the complexity of reversible circuits and quantum circuits from a theoretical perspective.

  12. Design of Reversible Sequential Circuit Using Reversible Logic Synthesis

    Directory of Open Access Journals (Sweden)

    Md. Mosharof Hossin

    2012-01-01

    Full Text Available Reversible logic is one of the most vital issue at present time and it has different areas for its application, those are low power CMOS, quantum computing, nanotechnology, cryptography, optical computing, DNA computing, digital signal processing (DSP, quantum dot cellular automata, communication, computer graphics. It is not possible to realize quantum computing without implementation of reversible logic. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. In this paper, we have proposed a new reversible gate. And we have designedRS flip flop and D flip flop by using our proposed gate and Peres gate. The proposed designs are better than the existing proposed ones in terms of number of reversible gates and garbage outputs. So, this realization is more efficient and less costly than other realizations.

  13. Design of Reversible Sequential Circuit Using Reversible Logic Synthesis

    Directory of Open Access Journals (Sweden)

    Md. Belayet Ali

    2011-12-01

    Full Text Available Reversible logic is one of the most vital issue at present time and it has different areas for its application,those are low power CMOS, quantum computing, nanotechnology, cryptography, optical computing, DNA computing, digital signal processing (DSP, quantum dot cellular auto meta, communication, computer graphics. It is not possible to realize quantum computing without implementation of reversible logic. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. In this paper, we have proposed a new reversible gate. And we have designed RS flip flop and D flip flop by using our proposed gate and Peres gate. The proposed designs are better than the existing proposed ones in terms of number of reversible gates and garbage outputs. So, this realization is more efficient and less costly than other realizations.

  14. A beginning in the reversible logic synthesis of sequential circuits

    OpenAIRE

    Thapliyal, Himanshu; Srinivas, M. B; Zwolinski, Mark

    2005-01-01

    This paper provides the initial threshold to building of more complex system having reversible sequential circuits as a primitive component and which can execute more complicated operations using quantum computers. The reversible circuits form the basic building block of quantum computers as all quantum operations are reversible. The important reversible gates used for reversible logic synthesis are Feynman Gate, New Gate and Fredkin gate. The novelty of the paper is the reversible designs of...

  15. Design of the Efficient Nanometric Reversible Subtractor Circuit

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    Mozhgan Shiri

    2012-11-01

    Full Text Available Reversible logic has comprehensive applications in communications, quantum computing, low power VLSI design, computer graphics, cryptography, nanotechnology, and optical computing. It has received significant attention in low power dissipating circuit design in the past few years. While several researchers have inspected the design of reversible logic units, there is not much reported works on reversible subtractors. In this paper we proposed the quantum equivalent circuit for SRK gate and we have computed the quantum cost of SRK gate. We also showed that how SRK gate can work singly as a half-subtractor circuit. It is being tried to design the circuit optimal in terms of number of reversible gates, number of garbage outputs, number of constant inputs, and quantum cost with compared to the existing circuits. At last we proposed an implementation of the new full-subtractor circuit based on SRK gate. All the designs have nanometric scales.

  16. A Novel Nanometric Fault Tolerant Reversible Subtractor Circuit

    Directory of Open Access Journals (Sweden)

    Mozhgan Shiri

    2012-11-01

    Full Text Available Reversibility plays an important role when energy efficient computations are considered. Reversible logic circuits have received significant attention in quantum computing, low power CMOS design, optical information processing and nanotechnology in the recent years. This study proposes a new fault tolerant reversible half-subtractor and a new fault tolerant reversible full-subtractor circuit with nanometric scales. Also in this paper we demonstrate how the well-known and important, PERES gate and TR gate can be synthesized from parity preserving reversible gates. All the designs have nanometric scales.

  17. Decting Errors in Reversible Circuits With Invariant Relationships

    OpenAIRE

    Alves, Nuno

    2008-01-01

    Reversible logic is experience renewed interest as we are approach the limits of CMOS technologies. While physical implementations of reversible gates have yet to materialize, it is safe to assume that they will rely on faulty individual components. In this work we present a present a method to provide fault tolerance to a reversible circuit based on invariant relationships.

  18. Exploring Quantum Dot Cellular Automata Based Reversible Circuit

    Directory of Open Access Journals (Sweden)

    Saroj Kumar Chandra

    2012-03-01

    Full Text Available Quantum-dot Cellular Automata (QCA is a new technology for development of logic circuits based on nanotechnology, and it is an one of the alternative for designing high performance computing over existing CMOS technology. The basic logic in QCA does not use voltage level for logic representation rather it represent binary state by polarization of electrons on the Quantum Cell which is basic building block of QCA. Extensive work is going on QCA for circuit design due to low power consumption and regularity in the circuit.. Clocking is used in QCA circuit to synchronize and control the information flow and to provide the power to run the circuit. Reversible logic design is a well-known paradigm in digital computation, and if circuit developed is reversible then it consumes very low power . Here, in this paper we are presenting a Reversible Universal Gate (RUG based on Quantum-dot Cellular Automata (QCA. The RUG implemented by QCA Designer tool and also its behavior is simulated by it.

  19. Upper bounds for reversible circuits based on Young subgroups

    DEFF Research Database (Denmark)

    Abdessaied, Nabila; Soeken, Mathias; Thomsen, Michael Kirkedal;

    2014-01-01

    We present tighter upper bounds on the number of Toffoli gates needed in reversible circuits. Both multiple controlled Toffoli gates and mixed polarity Toffoli gates have been considered for this purpose. The calculation of the bounds is based on a synthesis approach based on Young subgroups that...... that results in circuits using a more generalized gate library. Starting from an upper bound for this library we derive new bounds which improve the existing bound by around 77%. © 2014 Elsevier B.V. All rights reserved....

  20. Breaking time reversal symmetry in a circuit topological insulator

    Science.gov (United States)

    Owens, Clai; Jia, Ningyuan; Sommer, Ariel; Schuster, David; Simon, Jonathan

    2014-05-01

    Materials exhibiting knotted band-structures provide a unique window on interplay between topology and quantum mechanics under well-controlled conditions. The main difficulty is engineering a strong background gauge field for the electrically neutral ``particles'' that comprise such materials. In cold atom systems, the leading candidates include Raman couplings, lattice modulation, and optical flux lattices; however no scalable approach has yet been demonstrated. Meta-materials have seen substantial success, both in coupled optical waveguides, and circuit networks. Here we describe progress towards time reversal breaking in a circuit, to split up- and down- spin Chern bands. This work is essential for studies of fractional quantum hall physics, where spin-flip collisions effectively reverse the magnetic field and destroy the many-body state. We present the design of a 1D transmission line that breaks time reversal symmetry via periodic capacitance modulation. We extend this approach to a 2D geometry, realizing a Floquet topological insulator with an isolated ground Chern-band. These tools are compatible with circuit quantum electrodynamics techniques, and thus provide an exciting route to studies of topologically ordered phases of matter.

  1. Interlocked DNA nanostructures controlled by a reversible logic circuit.

    Science.gov (United States)

    Li, Tao; Lohmann, Finn; Famulok, Michael

    2014-09-17

    DNA nanostructures constitute attractive devices for logic computing and nanomechanics. An emerging interest is to integrate these two fields and devise intelligent DNA nanorobots. Here we report a reversible logic circuit built on the programmable assembly of a double-stranded (ds) DNA [3]pseudocatenane that serves as a rigid scaffold to position two separate branched-out head-motifs, a bimolecular i-motif and a G-quadruplex. The G-quadruplex only forms when preceded by the assembly of the i-motif. The formation of the latter, in turn, requires acidic pH and unhindered mobility of the head-motif containing dsDNA nanorings with respect to the central ring to which they are interlocked, triggered by release oligodeoxynucleotides. We employ these features to convert the structural changes into Boolean operations with fluorescence labelling. The nanostructure behaves as a reversible logic circuit consisting of tandem YES and AND gates. Such reversible logic circuits integrated into functional nanodevices may guide future intelligent DNA nanorobots to manipulate cascade reactions in biological systems.

  2. 49 CFR 234.237 - Reverse switch cut-out circuit.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Reverse switch cut-out circuit. 234.237 Section... Maintenance, Inspection, and Testing Maintenance Standards § 234.237 Reverse switch cut-out circuit. A switch, when equipped with a switch circuit controller connected to the point and interconnected with...

  3. Josephson address control unit IC for a 4-bit microcomputer prototype

    Energy Technology Data Exchange (ETDEWEB)

    Kosaka, S.; Nakagawa, H.; Kawamura, H.; Okada, Y.; Hamazaki, Y.; Aoyagi, M.; Kurosawa, I.; Shoji, A.; Takada, S.

    1989-03-01

    This paper describes a design and operations of a Josephson address control unit IC (CTRU) used for controlling the instruction sequence of an experimental 4-bit Josephson microcomputer prototype system. The CTRU is composed of three sets of 7 to 10-bit wide registers and combinational logic circuits driven by a two-phase mono-polar power supply. 593 4-Junction-Logic (4JL) gates have been used in the circuit and fabricated by using 2.5um NbN/oxide/NbN junction technology with Mo resistors and SiO/sub 2/ insulations. Experimental operations of the circuit have been successfully tested for all the instructions which control the program sequence of the computer system.

  4. Reversible plasticity of fear memory-encoding amygdala synaptic circuits even after fear memory consolidation.

    Directory of Open Access Journals (Sweden)

    Ingie Hong

    Full Text Available It is generally believed that after memory consolidation, memory-encoding synaptic circuits are persistently modified and become less plastic. This, however, may hinder the remaining capacity of information storage in a given neural circuit. Here we consider the hypothesis that memory-encoding synaptic circuits still retain reversible plasticity even after memory consolidation. To test this, we employed a protocol of auditory fear conditioning which recruited the vast majority of the thalamic input synaptic circuit to the lateral amygdala (T-LA synaptic circuit; a storage site for fear memory with fear conditioning-induced synaptic plasticity. Subsequently the fear memory-encoding synaptic circuits were challenged with fear extinction and re-conditioning to determine whether these circuits exhibit reversible plasticity. We found that fear memory-encoding T-LA synaptic circuit exhibited dynamic efficacy changes in tight correlation with fear memory strength even after fear memory consolidation. Initial conditioning or re-conditioning brought T-LA synaptic circuit near the ceiling of their modification range (occluding LTP and enhancing depotentiation in brain slices prepared from conditioned or re-conditioned rats, while extinction reversed this change (reinstating LTP and occluding depotentiation in brain slices prepared from extinguished rats. Consistently, fear conditioning-induced synaptic potentiation at T-LA synapses was functionally reversed by extinction and reinstated by subsequent re-conditioning. These results suggest reversible plasticity of fear memory-encoding circuits even after fear memory consolidation. This reversible plasticity of memory-encoding synapses may be involved in updating the contents of original memory even after memory consolidation.

  5. Chaos and reverse bifurcation in a RCL circuit

    Science.gov (United States)

    Cascais, J.; Dilão, R.; da Costa, A. Noronha

    1983-01-01

    The bifurcation diagram and attractor of a driven non-linear oscillator are directly obtained. The system exhibits not only period doubling, chaotic band merging and noise-free windows like the logistic map, but also reverse flip bifurcations, i.e. period halving. A negative schwartzian derivative map is found also possessing reverse bifurcations.

  6. A Novel Reversible BCD Adder For Nanotechnology Based Systems

    Directory of Open Access Journals (Sweden)

    Majid Haghparast

    2008-01-01

    Full Text Available This paper proposes two reversible logic gates, HNFG and HNG. The first gate HNFG can be used as two Feynman Gates. It is suitable for a single copy of two bits with no garbage outputs. It can be used as “Copying Circuit” to increase fan-out because fan-out is not allowed in reversible circuits. The second gate HNG can implement all Boolean functions. It also can be used to design optimized adder architectures. This paper also proposes a novel reversible full adder. One of the prominent functionalities of the proposed HNG gate is that it can work singly as a reversible full adder unit. The proposed reversible full adder contains only one gate. We show that its hardware complexity is less than the existing reversible full adders. The proposed full adder is then applied to the design of a reversible 4-bit parallel adder. A reversible Binary Coded Decimal (BCD adder circuit is also proposed. The proposed circuit can add two 4-bit binary variables and it transforms the result into the appropriate BCD number using efficient error correction modules. We show that the proposed reversible BCD adder has lower hardware complexity and it is much better and optimized in terms of number of reversible gates and garbage outputs with compared to the existing counterparts.

  7. Implementation of Optimized Reversible Sequential and Combinational Circuits for VLSI Applications

    Directory of Open Access Journals (Sweden)

    P. Mohan Krishna

    2014-04-01

    Full Text Available Reversible logic has emerged as one of the most important approaches for the power optimization with its application in low power VLSI design. They are also the fundamental requirement for the emerging field of the Quantum computing having with applications in the domains like Nano-technology, Digital signal processing, Cryptography, Communications. Implementing the reversible logic has the advantages of reducing gate counts, garbage outputs as well as constant inputs. In this project we present sequential and combinational circuit with reversible logic gates which are simulated in Xilinx ISE and by writing the code in VHDL . we have proposed a new design technique of BCD Adder using newly constructed reversible gates are based on CMOS with pass transistor gates . Here the total reversible Adder is designed using EDA tools. We will analyze the VLSI limitations like power consumption and area of designed circuits.

  8. VLSI Design of Low Power High Speed 4 Bit Resolution Pipeline ADC In Submicron CMOS Technology

    Directory of Open Access Journals (Sweden)

    Rita M. Shende

    2012-01-01

    Full Text Available Analog-to-digital converters (ADCs are key design blocks and are currently adopted in many application fields to improve digital systems, which achieve superior performances with respect to analog solutions. Application such as wireless communication and digital audio and video have created the need for costeffective data converters that will achieve higher speed and resolution. Widespread usage confers great importance to the design activities, which nowadays largely contributes to the production cost in integrated circuit devices (ICs. Various examples of ADC applications can be found in data acquisition systems, measurement systems and digital communication systems also imaging, instrumentation systems. Since theADC has a continuous, infinite –valued signal as its input, the important analog points on the transfer curve x-axis for an ADC are the ones that corresponding to changes in the digital output word. These input transitions determine the amount of INL and DNL associated with the converter. Hence, we have to considered all the parameters and improving the associated performance may significantly reduce the industrial cost of an ADC manufacturing process and improved the resolution and design specially powerconsumption . The paper presents a design of 4 bit Pipeline ADC with low power dissipation implemented in <0.18µm.

  9. The investigation of reverse traction current influence on tone track circuit modes

    Directory of Open Access Journals (Sweden)

    E.I.Jasсhuk

    2012-12-01

    Full Text Available Introduction: With the introduction of high-speed traffic there is an increased consumption of traction current by new types of rolling stock. This issue is important, as high levels of traction currents can have not only prevents, but also a dangerous impact on the equipment of railway automation devices. It is necessary to investigate the propagation of traction currents and potentials along the rails. Objective: Investigate the propagation of traction currents and potentials along the rails, the determination of critical currents, which not executed tone track circuits modes. Methods: In order to investigate the mathematical model, and the method of calculation tone track circuits modes was used. Results: By means of mathematical model, which includes being several rolling-stocks at the feeder zone, different rail resistance and isolation, the diagrams of currents and potentials propagations for DC and AC electric traction have been obtained. A comparative analysis of the experimental data and the results of the investigation has been realized. Based on received levels of reverse traction current their influence on track circuit modes has been investigated. Conclusions: The reverse traction current level near the substation and rolling-stock can be more than 600A. Great reverse traction current levels have an influence on tonal track circuit functioning, namely normal and shunt modes. When the traction current arrives 200 A there is a reduction criteria of tonal track circuits.

  10. Reversible Circuit Synthesis Using a Cycle-Based Approach

    CERN Document Server

    Saeedi, Mehdi; Sedighi, Mehdi; Sasanian, Zahra

    2010-01-01

    Reversible logic has applications in various research areas including signal processing, cryptography and quantum computation. In this paper, direct NCT-based synthesis of a given $k$-cycle in a cycle-based synthesis scenario is examined. To this end, a set of seven building blocks is proposed that reveals the potential of direct synthesis of a given permutation to reduce both quantum cost and average runtime. To synthesize a given large cycle, we propose a decomposition algorithm to extract the suggested building blocks from the input specification. Then, a synthesis method is introduced which uses the building blocks and the decomposition algorithm. Finally, a hybrid synthesis framework is suggested which uses the proposed cycle-based synthesis method in conjunction with one of the recent NCT-based synthesis approaches which is based on Reed-Muller (RM) spectra. The time complexity and the effectiveness of the proposed synthesis approach are analyzed in detail. Our analyses show that the proposed hybrid fra...

  11. Optimized Multiplier Using Reversible Multicontrol Input Toffoli Gates

    Directory of Open Access Journals (Sweden)

    H R Bhagyalakshmi

    2013-01-01

    Full Text Available Reversible logic is an important area to carry the computation into the world of quantum computing. In thispaper a 4-bit multiplier using a new reversible logic gate called BVPPG gate is presented. BVPPG gate isa 5 x 5 reversible gate which is designed to generate partial products required to perform multiplicationand also duplication of operand bits is obtained. This reduces the total cost of the circuit. Toffoli gate isthe universal and also most flexible reversible logic gate. So we have used the Toffoli gates to construct thedesigned multiplier.

  12. Commutation possibilities of reverse-connected dynistors and principles of RCD-circuit design (review)

    International Nuclear Information System (INIS)

    One generalized the results of investigation into the reverse-connected dynistors (RCD) designed for pulsed and conversion equipment high-power facilities. Paper describes the basic design principles for high-power RCD-switches and the base circuits of pulsed and high-frequency facilities based on RCD. Paper contains the results of tests of high-voltage microsecond and submicrosecond RCD-generators with 108-1010 W pulse intensity and of high-frequency RCD-inverters with 104-105 W average intensity

  13. Stand by Leakage Power Reduction in Nanoscale Static CMOS VLSI Multiplier Circuits Using Self Adjustable Voltage Level Circuit

    OpenAIRE

    Deeprose Subedi; Eugene John

    2012-01-01

    In this paper, we performed the comparative analysis of stand-by leakage (when the circuit is idle), delay and dynamic power (when the circuit switches) of the three different parallel digital multiplier circuits implemented with two adder modules and Self Adjustable Voltage level circuit (SVL). The adder modules chosen were 28 transistor-conventional CMOS adder and 10 transistor- Static Energy Recovery CMOS adder (SERF) circuits. The multiplier modules chosen were 4Bits Array, 4 bits Carry S...

  14. A novel reversible carry-selected adder with low latency

    Science.gov (United States)

    Li, Ming-Cui; Zhou, Ri-Gui

    2016-07-01

    Reversible logic is getting more and more attention in quantum computing, optical computing, nanotechnology and low-power complementary metal oxide semiconductor designs since reversible circuits do not loose information during computation and have only small energy dissipation. In this paper, a novel carry-selected reversible adder is proposed primarily optimised for low latency. A 4-bit reversible full adder with two kinds of outputs, minimum delay and optimal quantum cost is presented as the building block for ?-bit reversible adder. Three new reversible gates NPG (new Peres gate), TEPG (triple extension of Peres gate) and RMUX21 (reversible 2-to-1 multiplexer) are proposed and utilised to design efficient adder units. The secondary carry propagation chain is carefully designed to reduce the time consumption. The novelty of the proposed design is the consideration of low latency. The comparative study shows that the proposed adder achieves the improvement from 61.46% to 95.29% in delay over the existing designs.

  15. A 4-bit 7.5 GHz A/D Converter

    OpenAIRE

    Tsenes, Petros; Uzunoglu, Nikolaos

    2003-01-01

    Based on a conventional flash architecture a 4-bit GaAs analog to digital (A/D) converter has been designed using OMMIC-Philips GaAs foundry and particularly its commercial enhancement/depletion mode 0.18 µm pHEMT technology process. The ADC operates at 7.5 GHz sampling rate with full power analog input bandwidth from DC to Nyquist frequency. Differential source coupled FET logic (SCFL) was used and the complexity of the whole chip is more than 1900 active devices. The converter can be used i...

  16. Low-power 4-bit flash analogue to digital converter for ranging applications

    OpenAIRE

    Torfs, Guy; Li, Zhisheng; Bauwelinck, Johan; Yin, Xin; Plas, G. Van Der; Vandewege, Jan

    2011-01-01

    A 4-bit 700 MS/s flash ADC is presented in 0.18 mu m CMOS. By lowering the kickback noise of the individual comparators it was possible to reduce the power consumption to 4.43 mW. Improved calibration capabilities resulted in an INL and DNL smaller than 0.25 LSB. These low nonlinearities give rise to 3.77 effective number of bits at the Nyquist input frequency and this in turn yields an overall figure of merit of 0.46 pJ per conversion step, the lowest figure of merit reported for ADCs with s...

  17. GPU Kernels for High-Speed 4-Bit Astrophysical Data Processing

    CERN Document Server

    Klages, Peter; Denman, Nolan; Recnik, Andre; Sievers, Jonathan; Vanderlinde, Keith

    2015-01-01

    Interferometric radio telescopes often rely on computationally expensive O(N^2) correlation calculations; fortunately these computations map well to massively parallel accelerators such as low-cost GPUs. This paper describes the OpenCL kernels developed for the GPU based X-engine of a new hybrid FX correlator. Channelized data from the F-engine is supplied to the GPUs as 4-bit, offset-encoded real and imaginary integers. Because of the low bit width of the data, two values may be packed into a 32-bit register, allowing multiplication and addition of more than one value with a single fused multiply-add instruction. With this data and calculation packing scheme, as many as 5.6 effective tera-operations per second (TOPS) can be executed on a 4.3 TOPS GPU. The kernel design allows correlations to scale to large numbers of input elements, limited only by maximum buffer sizes on the GPU. This code is currently working on-sky with the CHIME Pathfinder Correlator in BC, Canada.

  18. Implementation on Electronic Circuits and RTR Pragmatical Adaptive Synchronization: Time-Reversed Uncertain Dynamical Systems' Analysis and Applications

    Directory of Open Access Journals (Sweden)

    Shih-Yu Li

    2013-01-01

    Full Text Available We expose the chaotic attractors of time-reversed nonlinear system, further implement its behavior on electronic circuit, and apply the pragmatical asymptotically stability theory to strictly prove that the adaptive synchronization of given master and slave systems with uncertain parameters can be achieved. In this paper, the variety chaotic motions of time-reversed Lorentz system are investigated through Lyapunov exponents, phase portraits, and bifurcation diagrams. For further applying the complex signal in secure communication and file encryption, we construct the circuit to show the similar chaotic signal of time-reversed Lorentz system. In addition, pragmatical asymptotically stability theorem and an assumption of equal probability for ergodic initial conditions (Ge et al., 1999, Ge and Yu, 2000, and Matsushima, 1972 are proposed to strictly prove that adaptive control can be accomplished successfully. The current scheme of adaptive control—by traditional Lyapunov stability theorem and Barbalat lemma, which are used to prove the error vector—approaches zero, as time approaches infinity. However, the core question—why the estimated or given parameters also approach to the uncertain parameters—remains without answer. By the new stability theory, those estimated parameters can be proved approaching the uncertain values strictly, and the simulation results are shown in this paper.

  19. All-optical design for inherently energy-conserving reversible gates and circuits

    Science.gov (United States)

    Cohen, Eyal; Dolev, Shlomi; Rosenblit, Michael

    2016-04-01

    As energy efficiency becomes a paramount issue in this day and age, reversible computing may serve as a critical step towards energy conservation in information technology. The inputs of reversible computing elements define the outputs and vice versa. Some reversible gates such as the Fredkin gate are also universal; that is, they may be used to produce any logic operation. It is possible to find physical representations for the information, so that when processed with reversible logic, the energy of the output is equal to the energy of the input. It is suggested that there may be devices that will do that without applying any additional power. Here, we present a formalism that may be used to produce any reversible logic gate. We implement this method over an optical design of the Fredkin gate, which utilizes only optical elements that inherently conserve energy.

  20. Carrier Synchronization for 3-and 4-bit-per-Symbol Optical Transmission

    Science.gov (United States)

    Ip, Ezra; Kahn, Joseph M.

    2005-12-01

    We investigate carrier synchronization for coherent detection of optical signals encoding 3 and 4 bits/symbol. We consider the effects of laser phase noise and of additive white Gaussian noise (AWGN), which can arise from local oscillator (LO) shot noise or LO-spontaneous beat noise. We identify 8-and 16-ary quadrature amplitude modulation (QAM) schemes that perform well when the receiver phase-locked loop (PLL) tracks the instantaneous signal phase with moderate phase error. We propose implementations of 8-and 16-QAM transmitters using Mach-Zehnder (MZ) modulators. We outline a numerical method for computing the bit error rate (BER) of 8-and 16-QAM in the presence of AWGN and phase error. It is found that these schemes can tolerate phase-error standard deviations of 2.48° and 1.24°, respectively, for a power penalty of 0.5 dB at a BER of 10-9. We propose a suitable PLL design and analyze its performance, taking account of laser phase noise, AWGN, and propagation delay within the PLL. Our analysis shows that the phase error depends on the constellation penalty, which is the mean power of constellation symbols times the mean inverse power. We establish a procedure for finding the optimal PLL natural frequency, and determine tolerable laser linewidths and PLL propagation delays. For zero propagation delay, 8-and 16-QAM can tolerate linewidth-to-bit-rate ratios of 1.8 × 10-5 and 1.4 × 10-6, respectively, assuming a total penalty of 1.0 dB.

  1. Encountering the Expertise Reversal Effect with a Computer-Based Environment on Electrical Circuit Analysis

    Science.gov (United States)

    Reisslein, Jana; Atkinson, Robert K.; Seeling, Patrick; Reisslein, Martin

    2006-01-01

    This study examined the effectiveness of a computer-based environment employing three example-based instructional procedures (example-problem, problem-example, and fading) to teach series and parallel electrical circuit analysis to learners classified by two levels of prior knowledge (low and high). Although no differences between the…

  2. Reverse engineering validation using a benchmark synthetic gene circuit in human cells.

    Science.gov (United States)

    Kang, Taek; White, Jacob T; Xie, Zhen; Benenson, Yaakov; Sontag, Eduardo; Bleris, Leonidas

    2013-05-17

    Multicomponent biological networks are often understood incompletely, in large part due to the lack of reliable and robust methodologies for network reverse engineering and characterization. As a consequence, developing automated and rigorously validated methodologies for unraveling the complexity of biomolecular networks in human cells remains a central challenge to life scientists and engineers. Today, when it comes to experimental and analytical requirements, there exists a great deal of diversity in reverse engineering methods, which renders the independent validation and comparison of their predictive capabilities difficult. In this work we introduce an experimental platform customized for the development and verification of reverse engineering and pathway characterization algorithms in mammalian cells. Specifically, we stably integrate a synthetic gene network in human kidney cells and use it as a benchmark for validating reverse engineering methodologies. The network, which is orthogonal to endogenous cellular signaling, contains a small set of regulatory interactions that can be used to quantify the reconstruction performance. By performing successive perturbations to each modular component of the network and comparing protein and RNA measurements, we study the conditions under which we can reliably reconstruct the causal relationships of the integrated synthetic network.

  3. A low power and low signal 4 bit 50MS/s double sampling pipelined ADC for monolithie active pixel sensors

    CERN Document Server

    Dahoumane, M; Bouvier, J; Lagorio, E; Hostachy, J Y; Gallin-Martel, L; Hostachy, J Y; Rossetto, O; Hu, Y; Ghazlane, H; Dallet, D

    2007-01-01

    A 4 bit very low power and low incoming signal analog to digital converter (ADC) using a double sampling switched capacitor technique, designed for use in CMOS monolithic active pixels sensor readout, has been implemented in 0.35μm CMOS technology. A non-resetting sample and hold stage is integrated to amplify the incoming signal by 4. This first stage compensates both the amplifier offset effect and the input common mode voltage fluctuations. The converter is composed of a 2.5 bit pipeline stage followed by a 2 bit flash stage. This prototype consists of 4 ADC double-channels; each one is sampling at 50MS/s and dissipates only 2.6mW at 3.3V supply voltage. A bias pulsing stage is integrated in the circuit. Therefore, the analog part is switched OFF or ON in less than 1μs. The size for the layout is 80μm*0.9mm. This corresponds to the pitch of 4 pixel columns, each one is 20μm wide.

  4. A low power and low signal 4 bit 50MS/s double sampling pipelined ADC for Monolithic Active Pixel Sensors

    International Nuclear Information System (INIS)

    A 4 bit very low power and low incoming signal analog to digital converter (ADC) using a double sampling switched capacitor technique, designed for use in CMOS monolithic active pixels sensor readout, has been implemented in 0.35μm CMOS technology. A non-resetting sample and hold stage is integrated to amplify the incoming signal by 4. This first stage compensates both the amplifier offset effect and the input common mode voltage fluctuations. The converter is composed of a 2.5 bit pipeline stage followed by a 2 bit flash stage. This prototype consists of 4 ADC double-channels; each one is sampling at 50MS/s and dissipates only 2.6mW at 3.3V supply voltage. A bias pulsing stage is integrated in the circuit. Therefore, the analog part is switched OFF or ON in less than 1μs. The size for the layout is 80μm*0.9mm. This corresponds to the pitch of 4 pixel columns, each one is 20μm wide

  5. A 4 GS/s 4 bit ADC with 3.8 GHz analog bandwidth in GaAs HBT technology*

    Institute of Scientific and Technical Information of China (English)

    Wu Danyu; Zhou Lei; Guo Jiannan; Liu Xinyu; Jin Zhi; Chen Jianwu

    2011-01-01

    An ultra-wideband 4 GS/s 4 bit analog-to-digital converter (ADC) which is fabricated in 2-level interconnect, 1.4 μm InGaP/GaAs HBT technology is presented. The ADC has a -3 dB analog bandwidth of 3.8 GHz and an effective resolution bandwidth (ERBW) of 2.6 GHz. The ADC adopts folding-interpolating architecture to minimize its size and complexity. A novel bit synchronization circuit is used in the coarse quantizer to eliminate the glitch codes of the ADC. The measurement results show that the chip achieves larger than 3.4 ENOBs with an input frequency band of DC-2.6 GHz and larger than 3.0 ENOBs within DC-4 GHz at 4 GS/s. It has 3.49 ENOBs when increasing input power by 4 dB at 6.001 GHz of input. That indicates that the ADC has the ability of sampling signals from 1st to 3rd Nyquist zones (DC-6 GHz). The measured DNL and INL are both less than ±0.15 LSB.The ADC consumes power of 1.98 W and occupies a total area of 1.45 × 1.45 mm2.

  6. Successive approximation-like 4-bit full-optical analog-to-digital converter based on Kerr-like nonlinear photonic crystal ring resonators

    Science.gov (United States)

    Tavousi, Alireza; Mansouri-Birjandi, Mohammad Ali; Saffari, Mehdi

    2016-09-01

    Implementing of photonic sampling and quantizing analog-to-digital converters (ADCs) enable us to extract a single binary word from optical signals without need for extra electronic assisting parts. This would enormously increase the sampling and quantizing time as well as decreasing the consumed power. To this end, based on the concept of successive approximation method, a 4-bit full-optical ADC that operates using the intensity-dependent Kerr-like nonlinearity in a two dimensional photonic crystal (2DPhC) platform is proposed. The Silicon (Si) nanocrystal is chosen because of the suitable nonlinear material characteristic. An optical limiter is used for the clamping and quantization of each successive levels that represent the ADC bits. In the proposal, an energy efficient optical ADC circuit is implemented by controlling the system parameters such as ring-to-waveguide coupling coefficients, the ring's nonlinear refractive index, and the ring's length. The performance of the ADC structure is verified by the simulation using finite difference time domain (FDTD) method.

  7. A study of the reverse cycle defrosting performance on a multi-circuit outdoor coil unit in an air source heat pump – Part I: Experiments

    International Nuclear Information System (INIS)

    Highlights: ► We experimental study the defrosting performance on a multi-circuit outdoor coil unit in an ASHP unit. ► We find that defrosting is quicker on the airside of upper circuits than that on the lower circuits. ► We discuss the effects of downwards flowing of the melted frost along the outdoor coil surface on defrosting performance. -- Abstract: When an air source heat pump (ASHP) unit operates in heating mode, frost can be accumulated on the surface of its finned outdoor coil which normally has multiple parallel circuits on its refrigerant side for minimized refrigerant pressure loss and enhanced heat transfer efficiency. On its airside, however, there is usually no segmentation corresponding to the number of refrigerant circuit. Frosting deteriorates the operation and energy efficiency of the ASHP unit and periodic defrosting becomes necessary. Currently the most widely used standard defrosting method for ASHPs is reverse cycle defrost. This paper, the first part of a two-part series, reports on the experimental part of a study of the reverse cycle defrosting performance on a multi-circuit outdoor coil unit in an experimental 6.5 kW heating capacity residential ASHP unit. Firstly the experimental ASHP unit is described and experimental procedures detailed. Secondly, the experimental results are reported. This is followed by the discussion on the effects of downwards flowing of the melted frost along a multi-circuit outdoor coil surface on defrosting performance. Finally, the evaluation of the defrosting efficiency for the experimental ASHP unit is provided. In the second part of the series, a modeling analysis on the effects of downwards flowing of the melted frost along the multi-circuit outdoor coil surface on defrosting performance of the experimental ASHP unit will be presented.

  8. Power and area efficient 4-bit column-level ADC in a CMOS pixel sensor for the ILD vertex detector

    International Nuclear Information System (INIS)

    A 48 × 64 pixels prototype CMOS pixel sensor (CPS) integrated with 4-bit column-level, self triggered ADCs for the outer layers of the ILD vertex detector (VTX) was developed and fabricated in a 0.35 μm CMOS process with a pixel pitch of 35 μm. The pixel concept combines in-pixel amplification with a correlated double sampling (CDS) operation. The ADCs accommodating the pixel read out in a rolling shutter mode complete the conversion by performing a multi-bit/step approximation. The design was optimised for power saving at sampling frequency. The prototype sensor is currently at the stage of being started testing and evaluation. So what is described is based on post simulation results rather than test data. This 4-bit ADC dissipates, at a 3-V supply and 6.25-MS/s sampling rate, 486 μW in its inactive mode, which is by far the most frequent. This value rises to 714 μW in case of the active mode. Its footprint amounts to 35 × 545 μm2.

  9. Power and area efficient 4-bit column-level ADC in a CMOS pixel sensor for the ILD vertex detector

    Science.gov (United States)

    Zhang, L.; Morel, F.; Hu-Guo, Ch; Hu, Y.

    2013-01-01

    A 48 × 64 pixels prototype CMOS pixel sensor (CPS) integrated with 4-bit column-level, self triggered ADCs for the outer layers of the ILD vertex detector (VTX) was developed and fabricated in a 0.35 μm CMOS process with a pixel pitch of 35 μm. The pixel concept combines in-pixel amplification with a correlated double sampling (CDS) operation. The ADCs accommodating the pixel read out in a rolling shutter mode complete the conversion by performing a multi-bit/step approximation. The design was optimised for power saving at sampling frequency. The prototype sensor is currently at the stage of being started testing and evaluation. So what is described is based on post simulation results rather than test data. This 4-bit ADC dissipates, at a 3-V supply and 6.25-MS/s sampling rate, 486 μW in its inactive mode, which is by far the most frequent. This value rises to 714 μW in case of the active mode. Its footprint amounts to 35 × 545 μm2.

  10. Stand by Leakage Power Reduction in Nanoscale Static CMOS VLSI Multiplier Circuits Using Self Adjustable Voltage Level Circuit

    Directory of Open Access Journals (Sweden)

    Deeprose Subedi

    2012-10-01

    Full Text Available In this paper, we performed the comparative analysis of stand-by leakage (when the circuit is idle, delay and dynamic power (when the circuit switches of the three different parallel digital multiplier circuits implemented with two adder modules and Self Adjustable Voltage level circuit (SVL. The adder modules chosen were 28 transistor-conventional CMOS adder and 10 transistor- Static Energy Recovery CMOS adder (SERF circuits. The multiplier modules chosen were 4Bits Array, 4 bits Carry Save and 4 Bits Baugh Wooley multipliers. At first, the circuits were simulated with adder modules without applying the SVL circuit. And secondly, SVL circuit was incorporated in the adder modules for simulation. In all the multiplier architectures chosen, less standby leakage power was observed being consumed by the SERF adder based multipliers applied with SVL circuit. The stand-by leakage power dissipation is 1.16µwatts in Bits array multiplier with SERF Adder applied with SVL vs. 1.39µwatts in the same multiplier with CMOS28T Adder applied with SVL circuit. It is 1.16µwatts in Carry Save multiplier with SERF Adder applied with SVL vs. 1.4µwatts in the same multiplier with CMOS 28T Adder applied with SVL circuit. It is 1.67µwatts in Baugh Wooley multiplier with SERF Adder applied with SVl circuit vs. 2.74µwatts in the same multiplier with CMOS 28T Adder applied with SVL circuit.

  11. Stand by Leakage Power Reduction in Nanoscale Static CMOS VLSI Multiplier Circuits Using Self Adjustable Voltage Level Circuit

    Directory of Open Access Journals (Sweden)

    Deeprose Subedi

    2012-11-01

    Full Text Available In this paper, we performed the comparative analysis of stand-by leakage (when the circuit is idle, delay and dynamic power (when the circuit switches of the three different parallel digital multiplier circuits implemented with two adder modules and Self Adjustable Voltage level circuit (SVL. The adder modules chosen were 28 transistor-conventional CMOS adder and 10 transistor- Static Energy Recovery CMOS adder (SERF circuits. The multiplier modules chosen were 4Bits Array, 4bits Carry Save and 4Bits Baugh Wooley multipliers. At first, the circuits were simulated with adder modules without applying the SVL circuit. And secondly, SVL circuit was incorporated in the adder modules for simulation. In all the multiplier architectures chosen, less standby leakage power was observed being consumed by the SERF adder based multipliers applied with SVL circuit. The stand-by leakage power dissipation is 1.16µwatts in Bits array multiplier with SERF Adder applied with SVL vs. 1.39µwatts in the same multiplier with CMOS28T Adder applied with SVL circuit. It is 1.16µwatts in Carry Save multiplier with SERF Adder applied with SVL vs. 1.4µwatts in the same multiplier with CMOS 28T Adder applied with SVL circuit. It is 1.67µwatts in Baugh Wooley multiplier with SERF Adder applied with SVl circuit vs. 2.74µwatts in the same multiplier with CMOS 28T Adder applied with SVL circuit.

  12. Design of Reversible Metrologic Sensor Based on Hall-effect Circuit%基于霍尔电路设计的可逆计量传感器

    Institute of Scientific and Technical Information of China (English)

    李述香; 邱召运; 张文

    2011-01-01

    In order to recognize the rotary direction and catch the reversible count information, the contrast studies of the different sampling modes based on several Hall circuit design are performed, the characteristics of the output pulse time se-quence are analyzed, and a simple design method is proposed. The assembly of switch operation Hall chip and latch operation Hall chip is adopted in the new sampling method. The rotary direction and acquisition of reversible count signal are realized in combination with the bipolar rotating magnet sampling system. The sensor circuit is composed of only two Hall circuits, with-out any external circuit. All the advantages of He'll sensor are remained. The circuit design and detailed description of the working principle and impletation method are offered in yhis paper.%以识别转向和获取可逆计数信息为主要目的,对比研究了几种基于霍尔电路设计的不同取样方式,分析了它们的输出脉冲时序特征,提出一种简单的设计方案.新的取样方式采用开关型霍尔芯片和锁存型霍尔芯片组合,配合双极旋转磁体取样系统,实现了转向识别和可逆计数信号的采集.传感器电路仅由两片霍尔电路构成,无外围电路,保留了霍尔传感器的全部优点.给出了电路设计,并详细说明了工作原理和实现方法.

  13. Is a 4-bit synaptic weight resolution enough? - constraints on enabling spike-timing dependent plasticity in neuromorphic hardware.

    Science.gov (United States)

    Pfeil, Thomas; Potjans, Tobias C; Schrader, Sven; Potjans, Wiebke; Schemmel, Johannes; Diesmann, Markus; Meier, Karlheinz

    2012-01-01

    Large-scale neuromorphic hardware systems typically bear the trade-off between detail level and required chip resources. Especially when implementing spike-timing dependent plasticity, reduction in resources leads to limitations as compared to floating point precision. By design, a natural modification that saves resources would be reducing synaptic weight resolution. In this study, we give an estimate for the impact of synaptic weight discretization on different levels, ranging from random walks of individual weights to computer simulations of spiking neural networks. The FACETS wafer-scale hardware system offers a 4-bit resolution of synaptic weights, which is shown to be sufficient within the scope of our network benchmark. Our findings indicate that increasing the resolution may not even be useful in light of further restrictions of customized mixed-signal synapses. In addition, variations due to production imperfections are investigated and shown to be uncritical in the context of the presented study. Our results represent a general framework for setting up and configuring hardware-constrained synapses. We suggest how weight discretization could be considered for other backends dedicated to large-scale simulations. Thus, our proposition of a good hardware verification practice may rise synergy effects between hardware developers and neuroscientists.

  14. A Novel Nanometric Reversible Signed Divider with Overflow Checking Capability

    OpenAIRE

    Faraz Dastan; Majid Haghparast

    2012-01-01

    One of the best approaches for designing future computers is that we use reversible logic. Reversible logic circuits have lower power consumption than the common circuits, used in computers nowadays. In this study we propose a new reversible division circuit. This reversible division circuit is signed divider and has an overflow checking capability. Among the designed and proposed reversible division circuits, our proposed division circuit is the first reversible signed divider with overflow ...

  15. Low area 4-bit 5 MS/s flash-type digitizer for hybrid-pixel detectors - Design study in 180 nm and 40 nm CMOS

    Science.gov (United States)

    Otfinowski, Piotr; Grybos, Pawel

    2015-11-01

    We report on the design of a 4-bit flash ADC with dynamic offset correction dedicated to measurement systems based on a pixel architecture. The presented converter was manufactured in two CMOS technologies: widespread and economical 180 nm and modern 40 nm process. The designs are optimized for the lowest area occupancy resulting in chip areas of 160×55 μm2 and 35×25 μm2. The experimental results indicate integral nonlinearity of +0.35/-0.21 LSB and +0.28/-0.25 LSB and power consumption of 52 μW and 17 μW at 5 MS/s for the prototypes in 180 nm and 40 nm technologies respectively.

  16. A novel image encryption algorithm using chaos and reversible cellular automata

    Science.gov (United States)

    Wang, Xingyuan; Luan, Dapeng

    2013-11-01

    In this paper, a novel image encryption scheme is proposed based on reversible cellular automata (RCA) combining chaos. In this algorithm, an intertwining logistic map with complex behavior and periodic boundary reversible cellular automata are used. We split each pixel of image into units of 4 bits, then adopt pseudorandom key stream generated by the intertwining logistic map to permute these units in confusion stage. And in diffusion stage, two-dimensional reversible cellular automata which are discrete dynamical systems are applied to iterate many rounds to achieve diffusion on bit-level, in which we only consider the higher 4 bits in a pixel because the higher 4 bits carry almost the information of an image. Theoretical analysis and experimental results demonstrate the proposed algorithm achieves a high security level and processes good performance against common attacks like differential attack and statistical attack. This algorithm belongs to the class of symmetric systems.

  17. A sub-sampling 4-bit 1.056-GS/s flash ADC with a novel track and hold amplifierfor an IR-UWB receiver

    Institute of Scientific and Technical Information of China (English)

    Zhao Yi; Wang Shenjie; Qin Yajie; Hong Zhiliang

    2011-01-01

    A sub-sampling 4-bit 1.056-GS/s flash ADC with a novel track and hold amplifier (THA) in 0.13 μm CMOS for an impulse radio ultra-wideband (IR-UWB) receiver is presented.The challenge is in implementing a sub-sampling ADC with ultra-high input signal that further exceeds the Nyquist frequency.This paper presents,to our knowledge for the second time,a sub-sampling ADC with input signals above 4 GHz operating at a sampling rate of 1.056 GHz.In this design,a novel THA is proposed to solve the degradation in amplitude and improve the linearity of signal with frequency increasing to giga Hz.A resistive averaging technique is carefully analyzed to relieve noise aliasing.A low-offset latch using a zero-static power dynamic offset cancellation technique is further optimized to realize the requirements of speed,power consumption and noise aliasing.The measurement results reveal that the spurious free dynamic range of the ADC is 30.1 dB even if the input signal is 4.2 GHz sampled at 1.056 GS/s.The core power of the ADC is 30 mW,excluding all of the buffers,and the active area is 0.6 mm2.The ADC achieves a figure of merit of 3.75 p J/conversion-step.

  18. Design of High speed Low Power Reversible Vedic multiplier and Reversible Divider

    OpenAIRE

    Srikanth G Department of Electronics & Communication Engineerig, Indur Institute of Engineering & Technology, Siddipet, Medak, JNTUH University, Telangana, India.; Nasam Sai Kumar

    2014-01-01

    This paper bring out a 32X32 bit reversible Vedic multiplier using "Urdhva Tiryakabhayam" sutra meaning vertical and crosswise, is designed using reversible logic gates, which is the first of its kind. Also in this paper we propose a new reversible unsigned division circuit. This circuit is designed using reversible components like reversible parallel adder, reversible left-shift register, reversible multiplexer, reversible n-bit register with parallel load line. The reversibl...

  19. Quantum noise in large-scale coherent nonlinear photonic circuits

    CERN Document Server

    Santori, Charles; Beausoleil, Raymond G; Tezak, Nikolas; Hamerly, Ryan; Mabuchi, Hideo

    2014-01-01

    A semiclassical simulation approach is presented for studying quantum noise in large-scale photonic circuits incorporating an ideal Kerr nonlinearity. A netlist-based circuit solver is used to generate matrices defining a set of stochastic differential equations, in which the resonator field variables represent random samplings of the Wigner quasi-probability distributions. Although the semiclassical approach involves making a large-photon-number approximation, tests on one- and two-resonator circuits indicate satisfactory agreement between the semiclassical and full-quantum simulation results in the parameter regime of interest. The semiclassical model is used to simulate random errors in a large-scale circuit that contains 88 resonators and hundreds of components in total, and functions as a 4-bit ripple counter. The error rate as a function of on-state photon number is examined, and it is observed that the quantum fluctuation amplitudes do not increase as signals propagate through the circuit, an important...

  20. Modeling and Simulation of Photovoltaic Energy Storage System Based on Current Reversible Chopper Circuit%基于电流可逆斩波电路的光伏储能系统建模与仿真

    Institute of Scientific and Technical Information of China (English)

    苏人奇; 任国臣; 程海军

    2016-01-01

    Aiming at the problem of the instability of the battery charging current in the energy storage systemcaused bythe randomness and volatility of the photovoltaic power generation system, the theoretical basis and circuit structure of the supercapacitor and battery hybrid energy storage based on the current reversible chopper circuitisstudied. Firstly, the shortcomings of the existing hybrid energy storage system and the advantages of the current reversible chopper circuitareanalyzed in theory. This circuit can adjust the input voltage and control current direction by controlling the working state of thethyristorsto achieve theenergytransferbetweensupercapacitor and battery. Secondly, a reasonable simulation experimentisdesigned to verify the hybrid energy storage structure of the current reversible chopper circuit in the MATLAB, which can make the charge current and voltage of the lead acid battery more stable.%针对由于光伏发电系统出力的随机性和波动性而导致的储能系统中蓄电池充电电流不稳定的问题,研究了基于电流可逆斩波电路的超级电容器和蓄电池混合储能的理论依据和电路结构。首先在理论上分析了现有混合储能系统并联方式的不足以及电流可逆斩波电路的优势,该电路通过控制开关管的工作状态来调节输入侧的电压及控制电流方向,实现超级电容器和蓄电池之间能量的转移。其次,通过在 MATLAB 上建立电路模型,设计合理的仿真实验,验证了经电流可逆斩波电路并联的混合储能结构,能使铅酸蓄电池的充电电流和电压更稳定。

  1. Design of Reversible Counter

    OpenAIRE

    Md. Selim Al Mamun; B. K. Karmaker

    2014-01-01

    This article presents a research work on the design and synthesis of sequential circuits and flip-flops that are available in digital arena; and describes a new synthesis design of reversible counter that is optimized in terms of quantum cost, delay and garbage outputs compared to the existing designs. We proposed a new model of reversible T flip-flop in designing reversible counter.

  2. An experimental study on the negative effects of downwards flow of the melted frost over a multi-circuit outdoor coil in an air source heat pump during reverse cycle defrosting

    International Nuclear Information System (INIS)

    Highlights: • A special experimental rig was built and its details are reported. • The negative effects of downwards flowing of the melted frost were shown. • Defrosting duration was shortened after installing water collecting trays. • Temperature of melted frost decreased after installing trays. - Abstract: When the surface temperature of the outdoor coil in an air source heat pump (ASHP) unit is lower than both freezing point of water and the air dew point, frost can be formed and accumulated over outdoor coil surface. Frosting affects the energy efficiency, and periodic defrosting therefore is necessary. Reverse cycle defrosting is currently the most widely used defrosting method. A previous related study has indicated that during reverse cycle defrosting, downwards flow of the melted frost over a multi-circuit outdoor coil could affect the defrosting performance, without however giving detailed quantitative analysis of the effects. Therefore an experimental study on the effects has been carried out and a quantitative analysis conducted using the experimental data. In this paper, the detailed description of an experimental ASHP unit which was specifically built up is firstly reported. This is followed by presenting experimental results. Result analysis and conclusions are finally given

  3. Online Testable Decoder using Reversible Logic

    Directory of Open Access Journals (Sweden)

    Hemalatha. K. N. Manjula B. B. Girija. S

    2012-02-01

    Full Text Available The project proposes to design and test 2 to 4 reversible Decoder circuit with arbitrary number of gates to an online testable reversible one and is independent of the type of reversible gate used. The constructed circuit can detect any single bit errors and to convert a decoder circuit that is designed by reversible gates to an online testable reversible decoder circuit. Conventional digital circuits dissipate a significant amount of energy because bits of information are erased during the logic operations. Thus if logic gates are designed such that the information bits are not destroyed, the power consumption can be reduced. The information bits are not lost in case of a reversible computation. Reversible logic can be used to implement any Boolean logic function.

  4. Design of a High Performance Reversible Multiplier

    Directory of Open Access Journals (Sweden)

    Md.Belayet Ali

    2011-11-01

    Full Text Available Reversible logic circuits are increasingly used in power minimization having applications such as low power CMOS design, optical information processing, DNA computing, bioinformatics, quantum computing and nanotechnology. The problem of minimizing the number of garbage outputs is an important issue in reversible logic design. In this paper we propose a new 44 universal reversible logic gate. The proposed reversible gate can be used to synthesize any given Boolean functions. The proposed reversible gate also can be used as a full adder circuit. In this paper we have used Peres gate and the proposed Modified HNG (MHNG gate to construct the reversible fault tolerant multiplier circuit. We show that the proposed 44 reversible multiplier circuit has lower hardware complexity and it is much better and optimized in terms of number of reversible gates and number of garbage outputs with compared to the existing counterparts.

  5. Basic Reversible Logic Gates and It’s Qca Implementation

    OpenAIRE

    Papiya Biswas; Namit Gupta

    2014-01-01

    Reversible logic has various applications in various field like in Nanotechnology, quantum computing, Low power CMOS, Optical computing and DNA computing, etc. Quantum computation is One of the most important applications of the reversible logic.Basically reversible circuits do not lose information & reversible computation is performed only when system comprises of reversible gates. The reversible logic is design,main purposes are - decrease quantum cost, depth of the circuits...

  6. Analog Nonvolatile Computer Memory Circuits

    Science.gov (United States)

    MacLeod, Todd

    2007-01-01

    , between the positive and negative FFET saturation values. This signal value would represent a numerical value of interest corresponding to multiple bits: for example, if the memory circuit were designed to distinguish among 16 different analog values, then each cell could store 4 bits. Simultaneously with writing the signal value in the storage FFET, a negative saturation signal value would be stored in the control FFET. The decay of this control-FFET signal from the saturation value would serve as a model of the decay, for use in regenerating the numerical value of interest from its decaying analog signal value. The memory circuit would include addressing, reading, and writing circuitry that would have features in common with the corresponding parts of other memory circuits, but would also have several distinctive features. The writing circuitry would include a digital-to-analog converter (DAC); the reading circuitry would include an analog-to-digital converter (ADC). For writing a numerical value of interest in a given cell, that cell would be addressed, the saturation value would be written in the control FFET in that cell, and the non-saturation analog value representing the numerical value of interest would be generated by use of the DAC and stored in the storage FFET in that cell. For reading the numerical value of interest stored in a given cell, the cell would be addressed, the ADC would convert the decaying control and storage analog signal values to digital values, and an associated fast digital processing circuit would regenerate the numerical value from digital values.

  7. Circuit Training.

    Science.gov (United States)

    Nelson, Jane B.

    1998-01-01

    Describes a research-based activity for high school physics students in which they build an LC circuit and find its resonant frequency of oscillation using an oscilloscope. Includes a diagram of the apparatus and an explanation of the procedures. (DDR)

  8. Controllable circuit

    DEFF Research Database (Denmark)

    2010-01-01

    A switch-mode power circuit comprises a controllable element and a control unit. The controllable element is configured to control a current in response to a control signal supplied to the controllable element. The control unit is connected to the controllable element and provides the control...

  9. Rate Control for MPEG-4 Bit Stream

    Institute of Scientific and Technical Information of China (English)

    王振洲; 李桂苓

    2003-01-01

    For a very long time video processing dealt exclusively with fixed-rate sequences of rectangular shaped images. However, interest has been recently moving toward a more flexible concept in which the subject of the processing and encoding operations is a set of visual elements organized in both time and space in a flexible and arbitrarily complex way. The moving picture experts group (MPEG-4) standard supports this concept and its verification model (VM) encoder has adopted scalable rate control (SRC) as the rate control scheme, which is based on the spatial domain and compatible with constant bit rate (CBR) and variable bit rate (VBR). In this paper,a new rate control algorithm based on the DCT domain instead of the pixel domain is presented. More-over, macroblock level rate control scheme to compute the quantization step for each macroblock has been adopted. The experimental results show that the new algorithm can achieve a much better result than the original one in both peak signal-to-noise ratio (PSNR) and the coding bits, and that the new algorithm is more flexible than test model 5 (TM5) rate control algorithm.

  10. Design of High speed Low Power Reversible Vedic multiplier and Reversible Divider

    Directory of Open Access Journals (Sweden)

    Srikanth G Department of Electronics & Communication Engineerig, Indur Institute of Engineering & Technology, Siddipet, Medak, JNTUH University, Telangana, India.

    2014-09-01

    Full Text Available This paper bring out a 32X32 bit reversible Vedic multiplier using "Urdhva Tiryakabhayam" sutra meaning vertical and crosswise, is designed using reversible logic gates, which is the first of its kind. Also in this paper we propose a new reversible unsigned division circuit. This circuit is designed using reversible components like reversible parallel adder, reversible left-shift register, reversible multiplexer, reversible n-bit register with parallel load line. The reversible vedic multiplier and reversible divider modules have been written in Verilog HDL and then synthesized and simulated using Xilinx ISE 9.2i. This reversible vedic multiplier results shows less delay and less power consumption by comparing with array multiplier.

  11. Fault Model for Testable Reversible Toffoli Gates

    Directory of Open Access Journals (Sweden)

    Yu Pang

    2012-09-01

    Full Text Available Techniques of reversible circuits can be used in low-power microchips and quantum communications. Current most works focuses on synthesis of reversible circuits but seldom for fault testing which is sure to be an important step in any robust implementation. In this study, we propose a Universal Toffoli Gate (UTG with four inputs which can realize all basic Boolean functions. The all single stuck-at faults are analyzed and a test-set with minimum test vectors is given. Using the proposed UTG, it is easy to implement a complex reversible circuit and test all stuck-at faults of the circuit. The experiments show that reversible circuits constructed by the UTGs have less quantum cost and test vectors compared to other works.

  12. EDA circuit simulation

    International Nuclear Information System (INIS)

    EDA technique is used for circuit simulation. The circuit simulation and the analysis are made for a gate circuit one-shot multivibrator. The result shows: EDA circuit simulation is very useful technique

  13. Analog and VLSI circuits

    CERN Document Server

    Chen, Wai-Kai

    2009-01-01

    Featuring hundreds of illustrations and references, this book provides the information on analog and VLSI circuits. It focuses on analog integrated circuits, presenting the knowledge on monolithic device models, analog circuit cells, high performance analog circuits, RF communication circuits, and PLL circuits.

  14. Optimized Reversible Binary-Coded Decimal Adders

    DEFF Research Database (Denmark)

    Thomsen, Michael Kirkedal; Glück, Robert

    2008-01-01

    Abstract Babu and Chowdhury [H.M.H. Babu, A.R. Chowdhury, Design of a compact reversible binary coded decimal adder circuit, Journal of Systems Architecture 52 (5) (2006) 272-282] recently proposed, in this journal, a reversible adder for binary-coded decimals. This paper corrects and optimizes...... in reversible logic design by drastically reducing the number of garbage bits. Specialized designs benefit from support by reversible logic synthesis. All circuit components required for optimizing the original design could also be synthesized successfully by an implementation of an existing synthesis algorithm....... Keywords: Reversible logic circuit; Full-adder; Half-adder; Parallel adder; Binary-coded decimal; Application of reversible logic synthesis...

  15. Short- circuit tests of circuit breakers

    OpenAIRE

    Chorovský, P.

    2015-01-01

    This paper deals with short-circuit tests of low voltage electrical devices. In the first part of this paper, there are described basic types of short- circuit tests and their principles. Direct and indirect (synthetic) tests with more details are described in the second part. Each test and principles are explained separately. Oscilogram is obtained from short-circuit tests of circuit breakers at laboratory. The aim of this research work is to propose a test circuit for performing indirect test.

  16. Fast magnetization reversal of nanoclusters in resonator

    OpenAIRE

    Yukalov, V. I.; Yukalova, E. P.

    2012-01-01

    An effective method for ultrafast magnetization reversal of nanoclusters is suggested. The method is based on coupling a nanocluster to a resonant electric circuit. This coupling causes the appearance of a magnetic feedback field acting on the cluster, which drastically shortens the magnetization reversal time. The influence of the resonator properties, nanocluster parameters, and external fields on the magnetization dynamics and reversal time is analyzed. The magnetization reversal time can ...

  17. Basic Reversible Logic Gates and It’s Qca Implementation

    Directory of Open Access Journals (Sweden)

    Papiya Biswas,

    2014-06-01

    Full Text Available Reversible logic has various applications in various field like in Nanotechnology, quantum computing, Low power CMOS, Optical computing and DNA computing, etc. Quantum computation is One of the most important applications of the reversible logic.Basically reversible circuits do not lose information & reversible computation is performed only when system comprises of reversible gates. The reversible logic is design,main purposes are - decrease quantum cost, depth of the circuits & the number of garbage output. This paper provides the basic‘s of reversible logic gates & its implementation in qca.

  18. Collective of mechatronics circuit

    International Nuclear Information System (INIS)

    This book is composed of three parts, which deals with mechatronics system about sensor, circuit and motor. The contents of the first part are photo sensor of collector for output, locating detection circuit with photo interrupts, photo sensor circuit with CdS cell and lamp, interface circuit with logic and LED and temperature sensor circuit. The second part deals with oscillation circuit with crystal, C-R oscillation circuit, F-V converter, timer circuit, stability power circuit, DC amp and DC-DC converter. The last part is comprised of bridge server circuit, deformation bridge server, controlling circuit of DC motor, controlling circuit with IC for PLL and driver circuit of stepping motor and driver circuit of Brushless.

  19. Analog circuit design designing dynamic circuit response

    CERN Document Server

    Feucht, Dennis

    2010-01-01

    This second volume, Designing Dynamic Circuit Response builds upon the first volume Designing Amplifier Circuits by extending coverage to include reactances and their time- and frequency-related behavioral consequences.

  20. Photomultiplier blanking circuit

    Science.gov (United States)

    Mcclenahan, J. O.

    1972-01-01

    Circuit for protecting photomultiplier equipment from current surges which occur when exposed to brilliant illumination is discussed. Components of circuit and details of operation are provided. Circuit diagram to show action of blanking pulse on zener diode is included.

  1. Analog circuit design designing waveform processing circuits

    CERN Document Server

    Feucht, Dennis

    2010-01-01

    The fourth volume in the set Designing Waveform-Processing Circuits builds on the previous 3 volumes and presents a variety of analog non-amplifier circuits, including voltage references, current sources, filters, hysteresis switches and oscilloscope trigger and sweep circuitry, function generation, absolute-value circuits, and peak detectors.

  2. Garbage-free reversible constant multipliers for arbitrary integers

    DEFF Research Database (Denmark)

    Mogensen, Torben Ægidius

    2013-01-01

    We present a method for constructing reversible circuitry for multiplying integers by arbitrary integer constants. The method is based on Mealy machines and gives circuits whose size are (in the worst case) linear in the size of the constant. This makes the method unsuitable for large constants, ......, but gives quite compact circuits for small constants. The circuits use no garbage or ancillary lines....

  3. Low Cost Reversible Signed Comparator

    Directory of Open Access Journals (Sweden)

    Farah Sharmin

    2013-10-01

    Full Text Available Nowadays exponential advancement in reversible comp utation has lead to better fabrication and integration process. It has become very popular ove r the last few years since reversible logic circuit s dramatically reduce energy loss. It consumes less p ower by recovering bit loss from its unique input-o utput mapping. This paper presents two new gates called RC-I and RC-II to design an n-bit signed binary comparator where simulation results show that the p roposed circuit works correctly and gives significa ntly better performance than the existing counterparts. An algorithm has been presented in this paper for constructing an optimized reversible n-bit signed c omparator circuit. Moreover some lower bounds have been proposed on the quantum cost, the numbers of g ates used and the number of garbage outputs generated for designing a low cost reversible sign ed comparator. The comparative study shows that the proposed design exhibits superior performance consi dering all the efficiency parameters of reversible logic design which includes number of gates used, quantum cost, garbage output and constant inputs. This proposed design has certainly outperformed all the other existing approaches.

  4. Reversible logic gates on Physarum Polycephalum

    Energy Technology Data Exchange (ETDEWEB)

    Schumann, Andrew [University of Information Technology and Management, Sucharskiego 2, Rzeszow, 35-225 (Poland)

    2015-03-10

    In this paper, we consider possibilities how to implement asynchronous sequential logic gates and quantum-style reversible logic gates on Physarum polycephalum motions. We show that in asynchronous sequential logic gates we can erase information because of uncertainty in the direction of plasmodium propagation. Therefore quantum-style reversible logic gates are more preferable for designing logic circuits on Physarum polycephalum.

  5. Modeling and Experimental Demonstration of a Hopfield Network Analog-to-Digital Converter with Hybrid CMOS/Memristor Circuits

    Directory of Open Access Journals (Sweden)

    Xinjie eGuo

    2015-12-01

    Full Text Available The purpose of this work was to demonstrate the feasibility of building recurrent artificial neural networks with hybrid complementary metal oxide semiconductor (CMOS/memristor circuits. To do so, we modeled a Hopfield network implementing an analog-to-digital converter (ADC with up to 8 bits of precision. Major shortcomings affecting the ADC’s precision, such as the non-ideal behavior of CMOS circuitry and the specific limitations of memristors, were investigated and an effective solution was proposed, capitalizing on the in-field programmability of memristors. The theoretical work was validated experimentally by demonstrating the successful operation of a 4-bit ADC circuit implemented with discrete Pt/TiO2-x/Pt memristors and CMOS integrated circuit components.

  6. Modeling and Experimental Demonstration of a Hopfield Network Analog-to-Digital Converter with Hybrid CMOS/Memristor Circuits.

    Science.gov (United States)

    Guo, Xinjie; Merrikh-Bayat, Farnood; Gao, Ligang; Hoskins, Brian D; Alibart, Fabien; Linares-Barranco, Bernabe; Theogarajan, Luke; Teuscher, Christof; Strukov, Dmitri B

    2015-01-01

    The purpose of this work was to demonstrate the feasibility of building recurrent artificial neural networks with hybrid complementary metal oxide semiconductor (CMOS)/memristor circuits. To do so, we modeled a Hopfield network implementing an analog-to-digital converter (ADC) with up to 8 bits of precision. Major shortcomings affecting the ADC's precision, such as the non-ideal behavior of CMOS circuitry and the specific limitations of memristors, were investigated and an effective solution was proposed, capitalizing on the in-field programmability of memristors. The theoretical work was validated experimentally by demonstrating the successful operation of a 4-bit ADC circuit implemented with discrete Pt/TiO2- x /Pt memristors and CMOS integrated circuit components. PMID:26732664

  7. Reverse Engineering

    International Nuclear Information System (INIS)

    This book gives descriptions of reverse engineering with principle and structure of it, including what reverse engineering is, prospect and concerned laws, basic knowledge for reverse engineering like manual and back to user mode, using tool such as IDA installation, dependency walker and dump bin, network monitoring and universal extractor. It indicates analysis of malignant code, giving explanations of file virus, spy ware, an infection way of malignant code, anti debugging like Find window.

  8. Readout integrated circuit for microbolometer with an analog non-uniformity correction

    Science.gov (United States)

    Hwang, C. H.; Woo, D. H.; Lee, Y. S.; Lee, H. C.

    2005-10-01

    We have developed a microbolometer readout integrated circuit (ROIC) that corrects the non-uniformity in analog operation and acts in both normal mode and edge detection mode. A capacitive transimpedance amplifier (CTIA) has been employed as the input circuit of the microbolometer. Generally, when fabricating microbolometer focal plane arrays (FPAs), offset-error and gain-error in the inter-microbolometer are induced by fabrication error. They are shown as fixed pattern noise (FPN) in the infrared image. In the present study, a circuit correcting the offset-error and the gain-error in the normal mode by controlling the bias and the integration capacitance of the CTIA is proposed. This circuit does not require an additional DSP chip, and the non-uniformity is corrected before the analog to digital conversion (ADC). Thus, it can utilize 3-4 bits lower ADC compared to the conventional readout circuit. In the edge detection mode, after correcting the gain-error in two adjacent pixels, edge detection can be realized by subtracting their signal without the DSP. We have designed the suggested circuit to output a 10bit level effective infrared signal using 0.35um 2-poly 3-metal CMOS technology.

  9. Solid-state circuits

    CERN Document Server

    Pridham, G J

    2013-01-01

    Solid-State Circuits provides an introduction to the theory and practice underlying solid-state circuits, laying particular emphasis on field effect transistors and integrated circuits. Topics range from construction and characteristics of semiconductor devices to rectification and power supplies, low-frequency amplifiers, sine- and square-wave oscillators, and high-frequency effects and circuits. Black-box equivalent circuits of bipolar transistors, physical equivalent circuits of bipolar transistors, and equivalent circuits of field effect transistors are also covered. This volume is divided

  10. Circuit analysis for dummies

    CERN Document Server

    Santiago, John

    2013-01-01

    Circuits overloaded from electric circuit analysis? Many universities require that students pursuing a degree in electrical or computer engineering take an Electric Circuit Analysis course to determine who will ""make the cut"" and continue in the degree program. Circuit Analysis For Dummies will help these students to better understand electric circuit analysis by presenting the information in an effective and straightforward manner. Circuit Analysis For Dummies gives you clear-cut information about the topics covered in an electric circuit analysis courses to help

  11. Reversible Logic to Cryptographic Hardware: A New Paradigm

    OpenAIRE

    Thapliyal, Himanshu; Zwolinski, Mark

    2006-01-01

    Differential Power Analysis (DPA) presents a major challenge to mathematically-secure cryptographic protocols. Attackers can break the encryption by measuring the energy consumed in the working digital circuit. To prevent this type of attack, this paper proposes the use of reversible logic for designing the ALU of a cryptosystem. Ideally, reversible circuits dissipate zero energy. Thus, it would be of great significance to apply reversible logic to designing secure cryptosystems. As far as is...

  12. Ionization tube simmer current circuit

    Science.gov (United States)

    Steinkraus, Jr., Robert F.

    1994-01-01

    A highly efficient flash lamp simmer current circuit utilizes a fifty percent duty cycle square wave pulse generator to pass a current over a current limiting inductor to a full wave rectifier. The DC output of the rectifier is then passed over a voltage smoothing capacitor through a reverse current blocking diode to a flash lamp tube to sustain ionization in the tube between discharges via a small simmer current. An alternate embodiment of the circuit combines the pulse generator and inductor in the form of an FET off line square wave generator with an impedance limited step up output transformer which is then applied to the full wave rectifier as before to yield a similar simmer current.

  13. Thermal rectification in nonlinear quantum circuits

    DEFF Research Database (Denmark)

    Ruokola, T.; Ojanen, T.; Jauho, Antti-Pekka

    2009-01-01

    We present a theoretical study of radiative heat transport in nonlinear solid-state quantum circuits. We give a detailed account of heat rectification effects, i.e., the asymmetry of heat current with respect to a reversal of the thermal gradient, in a system consisting of two reservoirs at finite...... the rectification changes sign as a function of temperature....

  14. Electronic devices and circuits

    CERN Document Server

    Pridham, Gordon John

    1972-01-01

    Electronic Devices and Circuits, Volume 3 provides a comprehensive account on electronic devices and circuits and includes introductory network theory and physics. The physics of semiconductor devices is described, along with field effect transistors, small-signal equivalent circuits of bipolar transistors, and integrated circuits. Linear and non-linear circuits as well as logic circuits are also considered. This volume is comprised of 12 chapters and begins with an analysis of the use of Laplace transforms for analysis of filter networks, followed by a discussion on the physical properties of

  15. The circuit designer's companion

    CERN Document Server

    Williams, Tim

    2013-01-01

    The Circuit Designer's Companion covers the theoretical aspects and practices in analogue and digital circuit design. Electronic circuit design involves designing a circuit that will fulfill its specified function and designing the same circuit so that every production model of it will fulfill its specified function, and no other undesired and unspecified function.This book is composed of nine chapters and starts with a review of the concept of grounding, wiring, and printed circuits. The subsequent chapters deal with the passive and active components of circuitry design. These topics are foll

  16. Intuitive analog circuit design

    CERN Document Server

    Thompson, Marc

    2013-01-01

    Intuitive Analog Circuit Design outlines ways of thinking about analog circuits and systems that let you develop a feel for what a good, working analog circuit design should be. This book reflects author Marc Thompson's 30 years of experience designing analog and power electronics circuits and teaching graduate-level analog circuit design, and is the ideal reference for anyone who needs a straightforward introduction to the subject. In this book, Dr. Thompson describes intuitive and ""back-of-the-envelope"" techniques for designing and analyzing analog circuits, including transistor amplifi

  17. Design of Digital Adder Using Reversible Logic

    Directory of Open Access Journals (Sweden)

    Gowthami P

    2016-02-01

    Full Text Available Reversible logic circuits have promising applications in Quantum computing, Low power VLSI design, Nanotechnology, optical computing, DNA computing and Quantum dot cellular automata. In spite of them another main prominent application of reversible logic is Quantum computers where the quantum devices are essential which are ideally operated at ultra high speed with less power dissipation must be built from reversible logic components. This makes the reversible logic as a one of the most promising research areas in the past few decades. In VLSI design the delay is the one of the major issue along with area and power. This paper presents the implementation of Ripple Carry Adder (RCA circuits using reversible logic gates are discussed.

  18. Reversible Sterilization

    Science.gov (United States)

    Largey, Gale

    1977-01-01

    Notes that difficult questions arise concerning the use of sterilization for alleged eugenic and euthenic purposes. Thus, how reversible sterilization will be used with relation to the poor, mentally ill, mentally retarded, criminals, and minors, is questioned. (Author/AM)

  19. Vasectomy Reversal

    Medline Plus

    Full Text Available ... improving health. Hello, my name is Harris Nagler. I'm the Chairman of the Sol and Margaret ... Israel Medical Center in New York City. Today I'm going to perform a vasectomy reversal using ...

  20. Vasectomy Reversal

    Medline Plus

    Full Text Available ... Today we are going to go to the operating room and show you microsurgical vasectomy reversal. We ... vas and that will be examined under the operating- under the microscope to see if there’s sperm ...

  1. Vasectomy Reversal

    Medline Plus

    Full Text Available ... is a realistic option for many patients. Today we are going to go to the operating room and show you microsurgical vasectomy reversal. We start the procedure by localizing the site of ...

  2. Vasectomy Reversal

    Medline Plus

    Full Text Available Vasectomy Reversal Beth Israel Medical Center, New York, NY February 19, 2009 Welcome to this "OR Live" Webcast presentation premiering from Beth Israel Medical Center in New York City. ...

  3. Design of a 16 gray scales 320×240 pixels OLED-on-silicon driving circuit

    Institute of Scientific and Technical Information of China (English)

    Huang Ran; Wang Xiaohui; Wang Wenbo; Du Huan; Han Zhengsheng

    2009-01-01

    A 320×240 pixel organic-light-emitting-diode-on-silicon (OLEDoS) driving circuit is implemented using the standard 0.5 μm CMOS process of CSMC. It gives 16 gray scales with integrated 4 bit D/A converters. A three-transistor voltage-programmed OLED pixel driver is proposed, which can realize the very small current driving required for the OLEDoS microdisplay. Both the D/A converter and the pixel driver are implemented with pMOS devices. The pass-transistor and capacitance in the OLED pixel driver can be used to sample the output of the D/A converter. An additional pMOS is added to OLED pixel driver, which is used to control the D/A converter operating only when one row is on. This can reduce the circuit's power consumption. This driving circuit can work properly in a frame frequency of 50 Hz, and the final layout of this circuit is given. The pixel area is 28.4×28.4 μm2 and the display area is 10.7×8.0 mm2 (the diagonal is about 13 mm). The measured pixel gray scale voltage shows that the function of the driver circuit is correct, and the power consumption of the chip is about 350 mW.

  4. Electrical Circuits and Water Analogies

    Science.gov (United States)

    Smith, Frederick A.; Wilson, Jerry D.

    1974-01-01

    Briefly describes water analogies for electrical circuits and presents plans for the construction of apparatus to demonstrate these analogies. Demonstrations include series circuits, parallel circuits, and capacitors. (GS)

  5. Circuits on Cylinders

    DEFF Research Database (Denmark)

    Hansen, Kristoffer Arnsfelt; Miltersen, Peter Bro; Vinay, V

    2006-01-01

    We consider the computational power of constant width polynomial size cylindrical circuits and nondeterministic branching programs. We show that every function computed by a Pi2 o MOD o AC0 circuit can also be computed by a constant width polynomial size cylindrical nondeterministic branching...... program (or cylindrical circuit) and that every function computed by a constant width polynomial size cylindrical circuit belongs to ACC0....

  6. Electric circuits essentials

    CERN Document Server

    REA, Editors of

    2012-01-01

    REA's Essentials provide quick and easy access to critical information in a variety of different fields, ranging from the most basic to the most advanced. As its name implies, these concise, comprehensive study guides summarize the essentials of the field covered. Essentials are helpful when preparing for exams, doing homework and will remain a lasting reference source for students, teachers, and professionals. Electric Circuits I includes units, notation, resistive circuits, experimental laws, transient circuits, network theorems, techniques of circuit analysis, sinusoidal analysis, polyph

  7. The negative differential resistance characteristics of an RC-IGBT and its equivalent circuit model

    Science.gov (United States)

    Wenliang, Zhang; Yangjun, Zhu; Shuojin, Lu; Xiaoli, Tian

    2014-02-01

    A simple equivalent circuit model is proposed according to the device structure of reverse conducting insulated gate bipolar transistors (RC-IGBT). Mathematical derivation and circuit simulations indicate that this model can explain the snap-back effect (including primary snap-back effect, secondary snap-back effect, and reverse snap-back effect) and hysteresis effect perfectly.

  8. Analysis of 220kV Bus Voltage Secondary Circuit Parallel Reverse Charging%220kV母线电压二次回路并列反充电情况分析

    Institute of Scientific and Technical Information of China (English)

    费传学

    2012-01-01

    This article through the analysis of a substation 220kV II, III section of bus potential transform- er secondary parallel reverse charging anomaly, sums up the causes of potential transformer secondary re- verse charging, analyzes the effects of this situation on safety production, and puts forward the prevention measures.%本文通过对某变电站220kVⅡ、Ⅲ段母线压变二次并列反充电的异常情况进行分析,总结出压变二次反充电的原因,同时分析了压变发生二次反充电对安全生产的影响,并提出预控措施。

  9. Signal sampling circuit

    NARCIS (Netherlands)

    Louwsma, Simon Minze; Vertregt, Maarten

    2010-01-01

    A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital converte

  10. Signal sampling circuit

    NARCIS (Netherlands)

    Louwsma, Simon Minze; Vertregt, Maarten

    2011-01-01

    A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital converte

  11. Piezoelectric drive circuit

    Science.gov (United States)

    Treu, Jr., Charles A.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes.

  12. Short-circuit logic

    NARCIS (Netherlands)

    J.A. Bergstra; A. Ponse

    2010-01-01

    Short-circuit evaluation denotes the semantics of propositional connectives in which the second argument is only evaluated if the first argument does not suffice to determine the value of the expression. In programming, short-circuit evaluation is widely used. A short-circuit logic is a variant of p

  13. Reversible thyristor converters of brushless synchronous compensators

    Directory of Open Access Journals (Sweden)

    А.М.Galynovskiy

    2013-12-01

    Full Text Available Behavior of models of three-phase-to-single-phase rotary reversible thyristor converters of brushless synchronous compensators in a circuit simulation system is analyzed. It is shown that combined control mode of opposite-connected thyristors may result in the exciter armature winding short circuits both at the thyristor feed-forward and lagging current delay angles. It must be taken into consideration when developing brushless compensator excitation systems.

  14. Practical microwave circuits

    CERN Document Server

    Maas, Stephen A

    2014-01-01

    This book differentiates itself by presenting microwave and RF technology from a circuit design viewpoint, rather than a set of electromagnetic problems. The emphasis is on gaining a practical understanding of often overlooked but vital physical processes.This resource provides microwave circuit engineers with analytical techniques for understanding and designing high-frequency circuits almost entirely from a circuit point of view. Electromagnetic concepts are not avoided, but they are employed only as necessary to support circuit-theoretical ones or to describe phenomena such as radiation and

  15. Exact Threshold Circuits

    DEFF Research Database (Denmark)

    Hansen, Kristoffer Arnsfelt; Podolskii, Vladimir V.

    2010-01-01

    We initiate a systematic study of constant depth Boolean circuits built using exact threshold gates. We consider both unweighted and weighted exact threshold gates and introduce corresponding circuit classes. We next show that this gives a hierarchy of classes that seamlessly interleave with the ......We initiate a systematic study of constant depth Boolean circuits built using exact threshold gates. We consider both unweighted and weighted exact threshold gates and introduce corresponding circuit classes. We next show that this gives a hierarchy of classes that seamlessly interleave...... with the well-studied corresponding hierarchies defined using ordinary threshold gates. A major open problem in Boolean circuit complexity is to provide an explicit super-polynomial lower bound for depth two threshold circuits. We identify the class of depth two exact threshold circuits as a natural subclass...

  16. Feedback in analog circuits

    CERN Document Server

    Ochoa, Agustin

    2016-01-01

    This book describes a consistent and direct methodology to the analysis and design of analog circuits with particular application to circuits containing feedback. The analysis and design of circuits containing feedback is generally presented by either following a series of examples where each circuit is simplified through the use of insight or experience (someone else’s), or a complete nodal-matrix analysis generating lots of algebra. Neither of these approaches leads to gaining insight into the design process easily. The author develops a systematic approach to circuit analysis, the Driving Point Impedance and Signal Flow Graphs (DPI/SFG) method that does not require a-priori insight to the circuit being considered and results in factored analysis supporting the design function. This approach enables designers to account fully for loading and the bi-directional nature of elements both in the feedback path and in the amplifier itself, properties many times assumed negligible and ignored. Feedback circuits a...

  17. Optimal design of APD biasing circuit

    Institute of Scientific and Technical Information of China (English)

    SUN Chun-sheng; QIN Shi-qiao; WANG Xing-shu; ZHU Dong-hua

    2007-01-01

    This paper proposes a control method for avalanche photodiode (APD) reverse bias with temperature compensation and load resistance compensation. The influence of background light and load resistance on APD detection circuit is analyzed in detail. A theoretical model of temperature compensation and load resistance compensation is established, which is used for APD biasing circuit designing. It is predicted that this control method is especially suitable for LD laser range finder used on vehicles. Experimental results confirm thatthe design proposed in this paper can considerablely improve the performance of range finder.

  18. Implementation of Effective Code Converters using Reversible Logic Gates

    Directory of Open Access Journals (Sweden)

    Ponnuru Koteswara Rao

    2016-05-01

    Full Text Available aThe development in the field of nanometer technology leads to minimize the power consumption of logic circuits. Reversible logic design has been one of the promising technologies gaining greater interest due to less dissipation of heat and low power consumption. In the digital design, the code converters are widely used process. So, the reversible logic gates and reversible circuits for realizing code converters like as Binary to Gray code, Gray to Binary code, BCD to Excess 3 code, Excess 3 to BCD codes using reversible logic gates is proposed. Designing of reversible logic circuit is challenging task, since not enough number of gates are available for design. Reversible processor design needs its building blocks should be reversible in this view the designing of reversible code converters became essential one. In the digital domain, data or information is represented by a combination of 0’s and 1’s. A code is basically the pattern of these 0’s and 1’s used to represent the data. Code converters are a class of combinational digital circuits that are used to convert one type of code in to another. The proposed design leads to the reduction of power consumption compared with conventional logic circuits

  19. Analog circuits cookbook

    CERN Document Server

    Hickman, Ian

    2013-01-01

    Analog Circuits Cookbook presents articles about advanced circuit techniques, components and concepts, useful IC for analog signal processing in the audio range, direct digital synthesis, and ingenious video op-amp. The book also includes articles about amplitude measurements on RF signals, linear optical imager, power supplies and devices, and RF circuits and techniques. Professionals and students of electrical engineering will find the book informative and useful.

  20. Stochastic Switching Circuit Synthesis

    OpenAIRE

    Wilhelm, Daniel; Bruck, Jehoshua

    2009-01-01

    Shannon in his 1938 Masterpsilas Thesis demonstrated that any Boolean function can be realized by a switching relay circuit, leading to the development of deterministic digital logic. Here, we replace each classical switch with a probabilistic switch (pswitch). We present algorithms for synthesizing circuits closed with a desired probability, including an algorithm that generates optimal size circuits for any binary fraction. We also introduce a new duality property for series-parallel stocha...

  1. Regenerative feedback resonant circuit

    Science.gov (United States)

    Jones, A. Mark; Kelly, James F.; McCloy, John S.; McMakin, Douglas L.

    2014-09-02

    A regenerative feedback resonant circuit for measuring a transient response in a loop is disclosed. The circuit includes an amplifier for generating a signal in the loop. The circuit further includes a resonator having a resonant cavity and a material located within the cavity. The signal sent into the resonator produces a resonant frequency. A variation of the resonant frequency due to perturbations in electromagnetic properties of the material is measured.

  2. Analog circuit design

    CERN Document Server

    Dobkin, Bob

    2012-01-01

    Analog circuit and system design today is more essential than ever before. With the growth of digital systems, wireless communications, complex industrial and automotive systems, designers are being challenged to develop sophisticated analog solutions. This comprehensive source book of circuit design solutions aids engineers with elegant and practical design techniques that focus on common analog challenges. The book's in-depth application examples provide insight into circuit design and application solutions that you can apply in today's demanding designs. <

  3. Design of Universal Shift Register Using Reversible Logic

    Directory of Open Access Journals (Sweden)

    Md. Hasanuzzaman

    2012-09-01

    Full Text Available Reversible sequential circuits are considered the significant memory block for their ultra-low power consumption. Universal shift register is an important memory element of the sequential circuit family. In this paper we proposed efficient design of reversible universal shift register that is optimized in terms of quantum cost, delay and garbage outputs. Appropriate theorems and lemmas are presented to clarify the proposed designs and establish its efficiency.

  4. Reversible dementias

    OpenAIRE

    Tripathi, Manjari; Vibha, Deepti

    2009-01-01

    In recent years, more attention has been given to the early diagnostic evaluation of patients with dementia which is essential to identify patients with cognitive symptoms who may have treatable conditions. Guidelines suggest that all patients presenting with dementia or cognitive symptoms should be evaluated with a range of laboratory tests, and with structural brain imaging with computed tomography (CT) or magnetic resonance imaging (MRI). While many of the disorders reported as ‘reversible...

  5. Signal sampling circuit

    OpenAIRE

    Louwsma, Simon Minze; Vertregt, Maarten

    2011-01-01

    A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital converter via a respective output switch. The output switch of each channel opens for a tracking time period when the track-and-hold circuit is in a tracking mode for sampling the signal, and closes for a ...

  6. Electronic devices and circuits

    CERN Document Server

    Pridham, Gordon John

    1968-01-01

    Electronic Devices and Circuits, Volume 1 deals with the design and applications of electronic devices and circuits such as passive components, diodes, triodes and transistors, rectification and power supplies, amplifying circuits, electronic instruments, and oscillators. These topics are supported with introductory network theory and physics. This volume is comprised of nine chapters and begins by explaining the operation of resistive, inductive, and capacitive elements in direct and alternating current circuits. The theory for some of the expressions quoted in later chapters is presented. Th

  7. Security electronics circuits manual

    CERN Document Server

    MARSTON, R M

    1998-01-01

    Security Electronics Circuits Manual is an invaluable guide for engineers and technicians in the security industry. It will also prove to be a useful guide for students and experimenters, as well as providing experienced amateurs and DIY enthusiasts with numerous ideas to protect their homes, businesses and properties.As with all Ray Marston's Circuits Manuals, the style is easy-to-read and non-mathematical, with the emphasis firmly on practical applications, circuits and design ideas. The ICs and other devices used in the practical circuits are modestly priced and readily available ty

  8. CMOS circuits manual

    CERN Document Server

    Marston, R M

    1995-01-01

    CMOS Circuits Manual is a user's guide for CMOS. The book emphasizes the practical aspects of CMOS and provides circuits, tables, and graphs to further relate the fundamentals with the applications. The text first discusses the basic principles and characteristics of the CMOS devices. The succeeding chapters detail the types of CMOS IC, including simple inverter, gate and logic ICs and circuits, and complex counters and decoders. The last chapter presents a miscellaneous collection of two dozen useful CMOS circuits. The book will be useful to researchers and professionals who employ CMOS circu

  9. Timergenerator circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Timer/Generator Circuits Manual is an 11-chapter text that deals mainly with waveform generator techniques and circuits. Each chapter starts with an explanation of the basic principles of its subject followed by a wide range of practical circuit designs. This work presents a total of over 300 practical circuits, diagrams, and tables.Chapter 1 outlines the basic principles and the different types of generator. Chapters 2 to 9 deal with a specific type of waveform generator, including sine, square, triangular, sawtooth, and special waveform generators pulse. These chapters also include pulse gen

  10. Circuits and filters handbook

    CERN Document Server

    Chen, Wai-Kai

    2003-01-01

    A bestseller in its first edition, The Circuits and Filters Handbook has been thoroughly updated to provide the most current, most comprehensive information available in both the classical and emerging fields of circuits and filters, both analog and digital. This edition contains 29 new chapters, with significant additions in the areas of computer-aided design, circuit simulation, VLSI circuits, design automation, and active and digital filters. It will undoubtedly take its place as the engineer's first choice in looking for solutions to problems encountered in the design, analysis, and behavi

  11. MOS integrated circuit design

    CERN Document Server

    Wolfendale, E

    2013-01-01

    MOS Integral Circuit Design aims to help in the design of integrated circuits, especially large-scale ones, using MOS Technology through teaching of techniques, practical applications, and examples. The book covers topics such as design equation and process parameters; MOS static and dynamic circuits; logic design techniques, system partitioning, and layout techniques. Also featured are computer aids such as logic simulation and mask layout, as well as examples on simple MOS design. The text is recommended for electrical engineers who would like to know how to use MOS for integral circuit desi

  12. Efficient Reversible Montgomery Multiplier and Its Application to Hardware Cryptography

    Directory of Open Access Journals (Sweden)

    Noor M. Nayeem

    2009-01-01

    Full Text Available Problem Statement: Arithmetic Logic Unit (ALU of a crypto-processor and microchips leak information through power consumption. Although the cryptographic protocols are secured against mathematical attacks, the attackers can break the encryption by measuring the energy consumption. Approach: To thwart attacks, this study proposed the use of reversible logic for designing the ALU of a crypto-processor. Ideally, reversible circuits do not dissipate any energy. If reversible circuits are used, then the attacker would not be able to analyze the power consumption. In order to design the reversible ALU of a crypto-processor, reversible Carry Save Adder (CSA using Modified TSG (MTSG gates and architecture of Montgomery multiplier were proposed. For reversible implementation of Montgomery multiplier, efficient reversible multiplexers and sequential circuits such as reversible registers and shift registers were presented. Results: This study showed that modified designs perform better than the existing ones in terms of number of gates, number of garbage outputs and quantum cost. Lower bounds of the proposed designs were established by providing relevant theorems and lemmas. Conclusion: The application of reversible circuit is suitable to the field of hardware cryptography.

  13. Reversibly Bistable Flexible Electronics

    KAUST Repository

    Alfaraj, Nasir

    2015-05-01

    Introducing the notion of transformational silicon electronics has paved the way for integrating various applications with silicon-based, modern, high-performance electronic circuits that are mechanically flexible and optically semitransparent. While maintaining large-scale production and prototyping rapidity, this flexible and translucent scheme demonstrates the potential to transform conventionally stiff electronic devices into thin and foldable ones without compromising long-term performance and reliability. In this work, we report on the fabrication and characterization of reversibly bistable flexible electronic switches that utilize flexible n-channel metal-oxide-semiconductor field-effect transistors. The transistors are fabricated initially on rigid (100) silicon substrates before they are peeled off. They can be used to control flexible batches of light-emitting diodes, demonstrating both the relative ease of scaling at minimum cost and maximum reliability and the feasibility of integration. The peeled-off silicon fabric is about 25 µm thick. The fabricated devices are transferred to a reversibly bistable flexible platform through which, for example, a flexible smartphone can be wrapped around a user’s wrist and can also be set back to its original mechanical position. Buckling and cyclic bending of such host platforms brings a completely new dimension to the development of flexible electronics, especially rollable displays.

  14. A Virtual Circuits Lab

    Science.gov (United States)

    Vick, Matthew E.

    2010-01-01

    The University of Colorado's Physics Education Technology (PhET) website offers free, high-quality simulations of many physics experiments that can be used in the classroom. The Circuit Construction Kit, for example, allows students to safely and constructively play with circuit components while learning the mathematics behind many circuit…

  15. Synchronizing Hyperchaotic Circuits

    DEFF Research Database (Denmark)

    Tamasevicius, Arunas; Cenys, Antanas; Namajunas, Audrius;

    1997-01-01

    Regarding possible applications to secure communications the technique of synchronizing hyperchaotic circuits with a single dynamical variable is discussed. Several specific examples including the fourth-order circuits with two positive Lyapunov exponents as well as the oscillator with a delay line...

  16. Parallelization of Reversible Ripple-carry Adders

    DEFF Research Database (Denmark)

    Thomsen, Michael Kirkedal; Axelsen, Holger Bock

    2009-01-01

    The design of fast arithmetic logic circuits is an important research topic for reversible and quantum computing. A special challenge in this setting is the computation of standard arithmetical functions without the generation of \\emph{garbage}. Here, we present a novel parallelization scheme...

  17. Improved AC pixel electrode circuit for active matrix of organic light-emitting display

    Science.gov (United States)

    Si, Yujuan; Lang, Liuqi; Chen, Wanzhong; Liu, Shiyong

    2004-05-01

    In this paper, a modified four-transistor pixel circuit for active-matrix organic light-emitting displays (AMOLED) was developed to improve the performance of OLED device. This modified pixel circuit can provide an AC driving mode to make the OLED working in a reversed-biased voltage during the certain cycle. The optimized values of the reversed-biased voltage and the characteristics of the pixel circuit were investigated using AIM-SPICE. The simulated results reveal that this circuit can provide a suitable output current and voltage characteristic, and little change was made in luminance current.

  18. Approximate circuits for increased reliability

    Energy Technology Data Exchange (ETDEWEB)

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-12-22

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  19. Approximate circuits for increased reliability

    Energy Technology Data Exchange (ETDEWEB)

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-08-18

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  20. Optimized design of Carry Skip BCD adder using new FHNG reversible logic gates

    Directory of Open Access Journals (Sweden)

    Md.Belayet Ali

    2012-07-01

    Full Text Available Reversible logic is very essential for the construction of low power, low loss computational structures which are very essential for the construction of arithmetic circuits used in quantum computation, nanotechnology and other low power digital circuits. In the present paper an optimized and low quantum cost one digit carry skip BCD adder using new reversible logic gates are proposed. The proposed work is best compared to the other existing circuits.

  1. Optimized design of BCD adder and Carry skip BCD adder using reversible logic gates

    Directory of Open Access Journals (Sweden)

    H.R.Bhagyalakshmi,

    2011-04-01

    Full Text Available Reversible logic is very essential for the construction of low power, low loss computational structures which are very essential for the construction of arithmetic circuits used in quantum computation, nano technology and other low power digital circuits. In the present paper an optimized and low quantum cost one digit BCD adder and an optimized one digit carry skip BCD adder using new reversible logic gates are proposed. The proposed work is best compared to the other existing circuits.

  2. Parallel Optimization of a Reversible (Quantum) Ripple-Carry Adder

    DEFF Research Database (Denmark)

    Thomsen, Michael Kirkedal; Axelsen, Holger Bock

    2008-01-01

    The design of fast arithmetic logic circuits is an important research topic for reversible and quantum computing. A special challenge in this setting is the computation of standard arithmetical functions without the generation of garbage. The CDKM-adder is a recent garbage-less reversible (quantum...

  3. Experimental confirmation of a new reversed butterfly-shaped attractor

    Institute of Scientific and Technical Information of China (English)

    Liu Ling; Su Yan-Chen; Liu Chong-Xin

    2007-01-01

    This paper reports a new reverse butterfly-shaped chaotic attractor and its experimental confirmation. Some basic dynamical properties, and chaotic behaviours of this new reverse butterfly attractor are studied. Simulation results support brief theoretical derivations. Furthermore, the system is experimentally confirmed by a simple electronic circuit.

  4. Reversible Statistics

    DEFF Research Database (Denmark)

    Tryggestad, Kjell

    2004-01-01

    The study aims is to describe how the inclusion and exclusion of materials and calculative devices construct the boundaries and distinctions between statistical facts and artifacts in economics. My methodological approach is inspired by John Graunt's (1667) Political arithmetic and more recent work...... within constructivism and the field of Science and Technology Studies (STS). The result of this approach is here termed reversible statistics, reconstructing the findings of a statistical study within economics in three different ways. It is argued that all three accounts are quite normal, albeit...... in different ways. The presence and absence of diverse materials, both natural and political, is what distinguishes them from each other. Arguments are presented for a more symmetric relation between the scientific statistical text and the reader. I will argue that a more symmetric relation can be achieved...

  5. Optoelectronics circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Optoelectronics Circuits Manual covers the basic principles and characteristics of the best known types of optoelectronic devices, as well as the practical applications of many of these optoelectronic devices. The book describes LED display circuits and LED dot- and bar-graph circuits and discusses the applications of seven-segment displays, light-sensitive devices, optocouplers, and a variety of brightness control techniques. The text also tackles infrared light-beam alarms and multichannel remote control systems. The book provides practical user information and circuitry and illustrations.

  6. Circuit analysis with Multisim

    CERN Document Server

    Baez-Lopez, David

    2011-01-01

    This book is concerned with circuit simulation using National Instruments Multisim. It focuses on the use and comprehension of the working techniques for electrical and electronic circuit simulation. The first chapters are devoted to basic circuit analysis.It starts by describing in detail how to perform a DC analysis using only resistors and independent and controlled sources. Then, it introduces capacitors and inductors to make a transient analysis. In the case of transient analysis, it is possible to have an initial condition either in the capacitor voltage or in the inductor current, or bo

  7. Troubleshooting analog circuits

    CERN Document Server

    Pease, Robert A

    1991-01-01

    Troubleshooting Analog Circuits is a guidebook for solving product or process related problems in analog circuits. The book also provides advice in selecting equipment, preventing problems, and general tips. The coverage of the book includes the philosophy of troubleshooting; the modes of failure of various components; and preventive measures. The text also deals with the active components of analog circuits, including diodes and rectifiers, optically coupled devices, solar cells, and batteries. The book will be of great use to both students and practitioners of electronics engineering. Other

  8. Load testing circuit

    DEFF Research Database (Denmark)

    2009-01-01

    A load testing circuit a circuit tests the load impedance of a load connected to an amplifier. The load impedance includes a first terminal and a second terminal, the load testing circuit comprising a signal generator providing a test signal of a defined bandwidth to the first terminal of the load...... impedance, an energy-storing element being connected to the second terminal of the load impedance and providing an output signal, and a measuring unit that measures the output signal or compares the output signal with a reference....

  9. Modern TTL circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Modern TTL Circuits Manual provides an introduction to the basic principles of Transistor-Transistor Logic (TTL). This book outlines the major features of the 74 series of integrated circuits (ICs) and introduces the various sub-groups of the TTL family.Organized into seven chapters, this book begins with an overview of the basics of digital ICs. This text then examines the symbology and mathematics of digital logic. Other chapters consider a variety of topics, including waveform generator circuitry, clocked flip-flop and counter circuits, special counter/dividers, registers, data latches, com

  10. Plasmonic Nanoguides and Circuits

    CERN Document Server

    Bozhevolnyi, Sergey

    2008-01-01

    Modern communication systems dealing with huge amounts of data at ever increasing speed try to utilize the best aspects of electronic and optical circuits. Electronic circuits are tiny but their operation speed is limited, whereas optical circuits are extremely fast but their sizes are limited by diffraction. Waveguide components utilizing surface plasmon (SP) modes were found to combine the huge optical bandwidth and compactness of electronics, and plasmonics thereby began to be considered as the next chip-scale technology. In this book, the authors concentrate on the SP waveguide configurati

  11. Pragmatic circuits frequency domain

    CERN Document Server

    Eccles, William

    2006-01-01

    Pragmatic Circuits: Frequency Domain goes through the Laplace transform to get from the time domain to topics that include the s-plane, Bode diagrams, and the sinusoidal steady state. This second of three volumes ends with a-c power, which, although it is just a special case of the sinusoidal steady state, is an important topic with unique techniques and terminology. Pragmatic Circuits: Frequency Domain is focused on the frequency domain. In other words, time will no longer be the independent variable in our analysis. The two other volumes in the Pragmatic Circuits series include titles on DC

  12. Monolithic microwave integrated circuits

    Science.gov (United States)

    Pucel, R. A.

    Monolithic microwave integrated circuits (MMICs), a new microwave technology which is expected to exert a profound influence on microwave circuit designs for future military systems as well as for the commercial and consumer markets, is discussed. The book contains an historical discussion followed by a comprehensive review presenting the current status in the field. The general topics of the volume are: design considerations, materials and processing considerations, monolithic circuit applications, and CAD, measurement, and packaging techniques. All phases of MMIC technology are covered, from design to testing.

  13. Counting rate logarithmic circuits

    International Nuclear Information System (INIS)

    This paper describes the basic circuit and the design method for a multidecade logarithmic counting ratemeter. The method is based on the charging and discharging of several RC time constants. An F.E.T. switch is used and the drain current is converted into a proportional voltage by a current to voltage converter. The logarithmic linearity was estimated for 4 decades starting from 50 cps. This circuit can be used in several nuclear instruments like survey meters and counting systems. This circuits has been developed as part of campbell channel instrumentation. (author)

  14. Optimized parity preserving quantum reversible full adder/subtractor

    Science.gov (United States)

    Haghparast, Majid; Bolhassani, Ali

    2016-07-01

    Reversible logic is one of the indispensable aspects of emerging technologies for reducing physical entropy gain, since reversible circuits do not lose information in the form of internal heat during computation. This paper aimed to initiate constructing parity preserving reversible circuits. A novel parity preserving reversible block, HB is presented. Then a new design of a cost-effective parity preserving reversible full adder/subtractor (PPFA/S) is proposed. Next, we suggested a new parity preserving binary to BCD converter. Finally, we proposed new realization of parity preserving reversible BCD adder. The proposed designs are cost-effective in terms of quantum cost and delay. All the scales are in the NANO-metric area.

  15. Symmetry Groups for the Decomposition of Reversible Computers, Quantum Computers, and Computers in between

    Directory of Open Access Journals (Sweden)

    Alexis De Vos

    2011-06-01

    Full Text Available Whereas quantum computing circuits follow the symmetries of the unitary Lie group, classical reversible computation circuits follow the symmetries of a finite group, i.e., the symmetric group. We confront the decomposition of an arbitrary classical reversible circuit with w bits and the decomposition of an arbitrary quantum circuit with w qubits. Both decompositions use the control gate as building block, i.e., a circuit transforming only one (qubit, the transformation being controlled by the other w−1 (qubits. We explain why the former circuit can be decomposed into 2w − 1 control gates, whereas the latter circuit needs 2w − 1 control gates. We investigate whether computer circuits, not based on the full unitary group but instead on a subgroup of the unitary group, may be decomposable either into 2w − 1 or into 2w − 1 control gates.

  16. Printed circuit for ATLAS

    CERN Multimedia

    Laurent Guiraud

    1999-01-01

    A printed circuit board made by scientists in the ATLAS collaboration for the transition radiaton tracker (TRT). This will read data produced when a high energy particle crosses the boundary between two materials with different electrical properties.

  17. Synthetic in vitro circuits

    OpenAIRE

    Hockenberry, Adam J.; Jewett, Michael C.

    2012-01-01

    Inspired by advances in the ability to construct programmable circuits in living organisms, in vitro circuits are emerging as a viable platform for designing, understanding, and exploiting dynamic biochemical circuitry. In vitro systems allow researchers to directly access and manipulate biomolecular parts without the unwieldy complexity and intertwined dependencies that often exist in vivo. Experimental and computational foundations in DNA, DNA/RNA, and DNA/RNA/protein based circuitry have g...

  18. AN IMPROVED DESIGN OF A MULTIPLIER USING REVERSIBLE LOGIC GATES

    Directory of Open Access Journals (Sweden)

    H.R.BHAGYALAKSHMI

    2010-08-01

    Full Text Available Reversible logic gates are very much in demand for the future computing technologies as they are known to produce zero power dissipation under ideal conditions. This paper proposes an improved design of a multiplier using reversible logic gates. Multipliers are very essential for the construction of various computational units of a quantum computer. The quantum cost of a reversible logic circuit can be minimized by reducing the number of reversible logic gates. For this two 4*4 reversible logic gates called a DPG gate and a BVF gate are used.

  19. Peak reading detector circuit

    International Nuclear Information System (INIS)

    The peak reading detector circuit serves for picking up the instants during which peaks of a given polarity occur in sequences of signals in which the extreme values, their time intervals, and the curve shape of the signals vary. The signal sequences appear in measuring the foetal heart beat frequence from amplitude-modulated ultrasonic, electrocardiagram, and blood pressure signals. In order to prevent undesired emission of output signals from, e. g., disturbing intermediate extreme values, the circuit consists of the series connections of a circuit to simulate an ideal diode, a strong unit, a discriminator for the direction of charging current, a time-delay circuit, and an electronic switch lying in the decharging circuit of the storage unit. The time-delay circuit thereby causes storing of a preliminary maximum value being used only after a certain time delay for the emission of the output signal. If a larger extreme value occurs during the delay time the preliminary maximum value is cleared and the delay time starts running anew. (DG/PB)

  20. Reversible Logic Synthesis of Fault Tolerant Carry Skip BCD Adder

    CERN Document Server

    Islam, Md Saiful; 10.3329/jbas.v32i2.2431

    2010-01-01

    Reversible logic is emerging as an important research area having its application in diverse fields such as low power CMOS design, digital signal processing, cryptography, quantum computing and optical information processing. This paper presents a new 4*4 parity preserving reversible logic gate, IG. The proposed parity preserving reversible gate can be used to synthesize any arbitrary Boolean function. It allows any fault that affects no more than a single signal readily detectable at the circuit's primary outputs. It is shown that a fault tolerant reversible full adder circuit can be realized using only two IGs. The proposed fault tolerant full adder (FTFA) is used to design other arithmetic logic circuits for which it is used as the fundamental building block. It has also been demonstrated that the proposed design offers less hardware complexity and is efficient in terms of gate count, garbage outputs and constant inputs than the existing counterparts.

  1. Describing and Optimizing Reversible Logic using a Functional Language

    DEFF Research Database (Denmark)

    Thomsen, Michael Kirkedal

    2012-01-01

    This paper presents the design of a language for the description and optimisation of reversible logic circuits. The language is a combinator-style functional language designed to be close to the reversible logical gate-level. The combinators include high-level constructs such as ripples, but also...... the description of arbitrary sized circuits. The combination of the functional language and the restricted reversible model results in many arithmetic laws, which provide more possibilities for term rewriting and, thus, the opportunity for good optimisation....... the recognisable inversion combinator f^(-1), which defines the inverse function of f using an efficient semantics. It is important to ensure that all circuits descriptions are reversible, and furthermore we must require this to be done statically. This is en- sured by the type system, which also allows...

  2. A proposed OEIC circuit with two metal layer silicon waveguide and low power photonic receiver circuit

    Directory of Open Access Journals (Sweden)

    Shiraz Afazal

    2012-09-01

    Full Text Available Recent development in the field of optical communication have increased the need for Opto Electronic Integrated circuit used for the high speed data transmission with low power consuming, high bandwidth and compact size. Presented is the OEIC chip with two metal layer waveguide and low power receiver circuit using standard CMOS technology. The silicon dioxide waveguide is composed of two metal layer reducing metal layer make OEIC cost effective , The silicon LED is fabricated using nwell/p-substrate with p+ octagonal rings, the p+/nwell forms the series pn junction to increase the light emitting area which operates in reverse bias mode. Photo detector is made of multiple PN junction to increase the depletion region width with n+ active implantation/n-well fabricated on the p substrate .the photocurrent receiver circuit is made of MOSFET to perform the function of photo detection and preamplification

  3. Reversible logic synthesis methodologies with application to quantum computing

    CERN Document Server

    Taha, Saleem Mohammed Ridha

    2016-01-01

    This book opens the door to a new interesting and ambitious world of reversible and quantum computing research. It presents the state of the art required to travel around that world safely. Top world universities, companies and government institutions  are in a race of developing new methodologies, algorithms and circuits on reversible logic, quantum logic, reversible and quantum computing and nano-technologies. In this book, twelve reversible logic synthesis methodologies are presented for the first time in a single literature with some new proposals. Also, the sequential reversible logic circuitries are discussed for the first time in a book. Reversible logic plays an important role in quantum computing. Any progress in the domain of reversible logic can be directly applied to quantum logic. One of the goals of this book is to show the application of reversible logic in quantum computing. A new implementation of wavelet and multiwavelet transforms using quantum computing is performed for this purpose. Rese...

  4. Assigning functional meaning to digital circuits

    Energy Technology Data Exchange (ETDEWEB)

    Eckmann, S.T.; Chisholm, G.H. [Argonne National Lab., IL (United States). Decision and Information Sciences Div.

    1997-07-01

    During computer-aided design, the problem of how to determine the logical function of a digital circuit arises in many contexts. For example, assigning functional meaning to a circuit is a fundamental operation in both reverse engineering and implementation validation. This report describes such a determination by discussing how a higher-level functional representation is constructed from a detailed circuit description (i.e., a gate-level netlist, which is a list of logic gates and their interconnections). The approach used involves transforming parts of the netlist into a functional representation and then manipulating this representation. Two types of functional representations are described: (1) a mathematical representation based on the logical operators ``exor`` and ``and`` and (2) a directed acyclic graph representation based on binary decision trees. Each representation provides a canonical form of the logical function being implemented (i.e., a form that is independent of implementation details). Such forms, however, have a well-known problem associated with the ordering of inputs: for each order, a unique form exists. A solution to this problem is given for both representations. Experimental results that demonstrate the use of these representations in the process of assigning functional meaning to a circuit are provided. The report also identifies and discusses issues critical to the performance required of this fundamental operation.

  5. A semiconductor laser excitation circuit

    Energy Technology Data Exchange (ETDEWEB)

    Kaadzunari, O.; Masaty, K.

    1984-03-27

    A semiconductor laser excitation circuit is patented that is designed for operation in a pulsed mode with a high pulse repetition frequency. This circuit includes, in addition to a semiconductor laser, a high speed photodetector, a reference voltage source, a comparator, and a pulse oscillator and modulator. If the circuit is built using standard silicon integrated circuits, its speed amounts to several hundred megahertz, if it is constructed using gallium arsenide integrated circuits, its speed is several gigahertz.

  6. The Mind Grows Circuits

    CERN Document Server

    Panigrahy, Rina

    2012-01-01

    There is a vast supply of prior art that study models for mental processes. Some studies in psychology and philosophy approach it from an inner perspective in terms of experiences and percepts. Others such as neurobiology or connectionist-machines approach it externally by viewing the mind as complex circuit of neurons where each neuron is a primitive binary circuit. In this paper, we also model the mind as a place where a circuit grows, starting as a collection of primitive components at birth and then builds up incrementally in a bottom up fashion. A new node is formed by a simple composition of prior nodes when we undergo a repeated experience that can be described by that composition. Unlike neural networks, however, these circuits take "concepts" or "percepts" as inputs and outputs. Thus the growing circuits can be likened to a growing collection of lambda expressions that are built on top of one another in an attempt to compress the sensory input as a heuristic to bound its Kolmogorov Complexity.

  7. The Smallest Transistor-Based Nonautonomous Chaotic Circuit

    DEFF Research Database (Denmark)

    Lindberg, Erik; Murali, K.; Tamasevicius, Arunas

    2005-01-01

    A nonautonomous chaotic circuit based on one transistor, two capacitors, and two resistors is described. The mechanism behind the chaotic performance is based on “disturbance of integration.” The forward part and the reverse part of the bipolar transistor are “fighting” about the charging...

  8. Organic reprogrammable circuits based on electrochemically formed diodes.

    Science.gov (United States)

    Liu, Jiang; Engquist, Isak; Berggren, Magnus

    2014-08-13

    We report a method to construct reprogrammable circuits based on organic electrochemical (EC) p-n junction diodes. The diodes are built up from the combination of the organic conjugated polymer poly[2-methoxy-5-(2-ethylhexyloxy)-1,4-phenylenevinylene] and a polymer electrolyte. The p-n diodes are defined by EC doping performed at 70 °C, and then stabilized at -30 °C. The reversible EC reaction allows for in situ reprogramming of the polarity of the organic p-n junction, thus enabling us to reconfigure diode circuits. By combining diodes of specific polarities dedicated circuits have been created, such as various logic gates, a voltage limiter and an AC/DC converter. Reversing the EC reaction allows in situ reprogramming of the p-n junction polarity, thus enabling reconfiguration of diode circuits, for example, from an AND gate to an OR gate. The reprogrammable circuits are based on p-n diodes defined from only two layers, the electrodes and then the active semiconductor:electrolyte composite material. Such simple device structures are promising for large-area and fully printed reconfigurable circuits manufactured using common printing tools. The structure of the reported p-n diodes mimics the architecture of and is based on identical materials used to construct light-emitting electrochemical cells (LEC). Our findings thus provide a robust signal routing technology that is easily integrated with traditional LECs.

  9. Chaotic memristive circuit: equivalent circuit realization and dynamical analysis

    Institute of Scientific and Technical Information of China (English)

    Bao Bo-Cheng; Xu Jian-Ping; Zhou Guo-Hua; Ma Zheng-Hua; Zou Ling

    2011-01-01

    In this paper,a practical equivalent circuit of an active flux-controlled memristor characterized by smooth piecewise-quadratic nonlinearity is designed and an experimental chaotic memristive circuit is implemented.The chaotic memristive circuit has an equilibrium set and its stability is dependent on the initial state of the memristor.The initial state-dependent and the circuit parameter-dependent dynamics of the chaotic memristive circuit are investigated via phase portraits,bifurcation diagrams and Lyapunov exponents.Both experimental and simulation results validate the proposed equivalent circuit realization of the active flux-controlled memristor.

  10. Circuit Quantum Electrodynamics

    CERN Document Server

    Bishop, Lev S

    2010-01-01

    Circuit Quantum Electrodynamics (cQED), the study of the interaction between superconducting circuits behaving as artificial atoms and 1-dimensional transmission-line resonators, has shown much promise for quantum information processing tasks. For the purposes of quantum computing it is usual to approximate the artificial atoms as 2-level qubits, and much effort has been expended on attempts to isolate these qubits from the environment and to invent ever more sophisticated control and measurement schemes. Rather than focussing on these technological aspects of the field, this thesis investigates the opportunities for using these carefully engineered systems for answering questions of fundamental physics.

  11. Electronic circuits fundamentals & applications

    CERN Document Server

    Tooley, Mike

    2015-01-01

    Electronics explained in one volume, using both theoretical and practical applications.New chapter on Raspberry PiCompanion website contains free electronic tools to aid learning for students and a question bank for lecturersPractical investigations and questions within each chapter help reinforce learning Mike Tooley provides all the information required to get to grips with the fundamentals of electronics, detailing the underpinning knowledge necessary to appreciate the operation of a wide range of electronic circuits, including amplifiers, logic circuits, power supplies and oscillators. The

  12. Primer printed circuit boards

    CERN Document Server

    Argyle, Andrew

    2009-01-01

    Step-by-step instructions for making your own PCBs at home. Making your own printed circuit board (PCB) might seem a daunting task, but once you master the steps, it's easy to attain professional-looking results. Printed circuit boards, which connect chips and other components, are what make almost all modern electronic devices possible. PCBs are made from sheets of fiberglass clad with copper, usually in multiplelayers. Cut a computer motherboard in two, for instance, and you'll often see five or more differently patterned layers. Making boards at home is relatively easy

  13. Electronic circuit analysis

    CERN Document Server

    Kishore, K Lal

    2008-01-01

    Second Edition of the book Electronic Circuit Analysis is brought out with certain new Topics and reorganization of text matter into eight units. With addition of new topics, syllabi of many universities in this subject can be covered. Besides this, the book can also meet the requirements of M.Sc (Electronics), AMIETE, AMIE (Electronics) courses. Text matter is improved thoroughly. New topics like frequency effects in multistage amplifiers, amplifier circuit analysis, design of high frequency amplifiers, switching regulators, voltage multipliers, Uninterrupted Power Supplies (UPS), and Switchi

  14. Inrush Current Control Circuit

    Science.gov (United States)

    Cole, Steven W. (Inventor)

    2002-01-01

    An inrush current control circuit having an input terminal connected to a DC power supply and an output terminal connected to a load capacitor limits the inrush current that charges up the load capacitor during power up of a system. When the DC power supply applies a DC voltage to the input terminal, the inrush current control circuit produces a voltage ramp at the load capacitor instead of an abrupt DC voltage. The voltage ramp results in a constant low level current to charge up the load capacitor, greatly reducing the current drain on the DC power supply.

  15. Circuit design for reliability

    CERN Document Server

    Cao, Yu; Wirth, Gilson

    2015-01-01

    This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units.  The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management. Provides comprehensive review on various reliability mechanisms at sub-45nm nodes; Describes practical modeling and characterization techniques for reliability; Includes thorough presentation of robust design techniques for major VLSI design units; Promotes physical understanding with first-principle simulations.

  16. TRANSISTOR IMPLEMENTATION OF REVERSIBLE PRT GATES

    Directory of Open Access Journals (Sweden)

    RASHMI S.B,

    2011-03-01

    Full Text Available Reversible logic has emerged as one of the most important approaches for power optimization with its application in low power VLSI design. Reversible or information lossless circuits have applications in nanotechnology, digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requirement in the emerging field of quantum computing. In this paper, two newoptimized universal gates are proposed. One of them has an ability to operate as a reversible half adder and half subtractor imultaneously. Another one acts only as half adder with minimum transistor count. The reversible gates are evaluated in terms of number of transistor count, critical path, garbage outputs and one to one mapping. Here transistor implementation of the proposed gates is done by using Virtuoso tool of cadence. Based on the results of the analysis, some of the trade-offs are made in the design to improve the efficiency.

  17. Heuristic Synthesis of Reversible Logic – A Comparative Study

    Directory of Open Access Journals (Sweden)

    Chua Shin Cheng

    2014-01-01

    Full Text Available Reversible logic circuits have been historically motivated by theoretical research in low-power, and recently attracted interest as components of the quantum algorithm, optical computing and nanotechnology. However due to the intrinsic property of reversible logic, traditional irreversible logic design and synthesis methods cannot be carried out. Thus a new set of algorithms are developed correctly to synthesize reversible logic circuit. This paper presents a comprehensive literature review with comparative study on heuristic based reversible logic synthesis. It reviews a range of heuristic based reversible logic synthesis techniques reported by researchers (BDD-based, cycle-based, search-based, non-search-based, rule-based, transformation-based, and ESOP-based. All techniques are described in detail and summarized in a table based on their features, limitation, library used and their consideration metric. Benchmark comparison of gate count and quantum cost are analysed for each synthesis technique. Comparing the synthesis algorithm outputs over the years, it can be observed that different approach has been used for the synthesis of reversible circuit. However, the improvements are not significant. Quantum cost and gate count has improved over the years, but arguments and debates are still on certain issues such as the issue of garbage outputs that remain the same. This paper provides the information of all heuristic based synthesis of reversible logic method proposed over the years. All techniques are explained in detail and thus informative for new reversible logic researchers and bridging the knowledge gap in this area.

  18. The Example and Summary of Single-stage and Two-stage Reverse Osmosis System in the Printed Circuit Boards Wastewater Reuse%单段式排列和二段式排列反渗透系统在印制线路板废水回用工程的实例及总结

    Institute of Scientific and Technical Information of China (English)

    吴奕波

    2012-01-01

    The paper described an example of a single-stage arrangement and two-stage arrangement of reverse osmosis systems in printed circuit boards wastewater reuse,through the comparison of the two groups under the same conditions,the results showed that: in water the TDS ≤500 mg?L-1 conditions,system recovery between 75 % and 80 %,the temperature ≤30 ℃,the quality of water could meet the conductivity ≤100 μs?cm-1 reuse requirements.Single-stage arrangement of the system energy consumption,and the salt rate was higher than the two-stage,but due to the short process cycle design,the chemical cleaning cycle was more longer;if the replacement cycle of membrane components could be extended,the design might be more economical;As for what kind of design was more economical,should be combined analysis of the replacement cycle of poor and water quality requirements and other factors.%文章介绍了单段式排列和二段式排列反渗透系统在印制线路板废水回用的实例,通过两组系统在同等条件下的对比,结果表明:在进水TDS≤500 mg.L-1,系统回收率介于75%~80%,温度≤30℃的条件下,系统产水水质均能满足电导率≤100μs.cm-1的回用要求。单段式排列在能耗、透盐率方面比二段式高,但由于采用了短流程大循环设计,化学清洗周期长;如果能延长膜元件的更换周期,单段式的设计可能会更为经济;至于何种设计更为经济,应综合分析更换周期差和水质需求等因素。

  19. ESD analog circuits and design

    CERN Document Server

    Voldman, Steven H

    2014-01-01

    A comprehensive and in-depth review of analog circuit layout, schematic architecture, device, power network and ESD design This book will provide a balanced overview of analog circuit design layout, analog circuit schematic development, architecture of chips, and ESD design.  It will start at an introductory level and will bring the reader right up to the state-of-the-art. Two critical design aspects for analog and power integrated circuits are combined. The first design aspect covers analog circuit design techniques to achieve the desired circuit performance. The second and main aspect pres

  20. Unstable oscillators based hyperchaotic circuit

    DEFF Research Database (Denmark)

    Murali, K.; Tamasevicius, A.; G. Mykolaitis, A.;

    1999-01-01

    A simple 4th order hyperchaotic circuit with unstable oscillators is described. The circuit contains two negative impedance converters, two inductors, two capacitors, a linear resistor and a diode. The Lyapunov exponents are presented to confirm hyperchaotic nature of the oscillations in the circ...... in the circuit. The performance of the circuit is investigated by means of numerical integration of appropriate differential equations, PSPICE simulations, and hardware experiment.......A simple 4th order hyperchaotic circuit with unstable oscillators is described. The circuit contains two negative impedance converters, two inductors, two capacitors, a linear resistor and a diode. The Lyapunov exponents are presented to confirm hyperchaotic nature of the oscillations...

  1. Quantum secure circuit evaluation

    Institute of Scientific and Technical Information of China (English)

    CHEN Huanhuan; LI Bin; ZHUANG Zhenquan

    2004-01-01

    In order to solve the problem of classical secure circuit evaluation, this paper proposes a quantum approach. In this approach, the method of inserting redundant entangled particles and quantum signature has been employed to strengthen the security of the system. Theoretical analysis shows that our solution is secure against classical and quantum attacks.

  2. Superconducting Quantum Circuits

    NARCIS (Netherlands)

    Majer, J.B.

    2002-01-01

    This thesis describes a number of experiments with superconducting cir- cuits containing small Josephson junctions. The circuits are made out of aluminum islands which are interconnected with a very thin insulating alu- minum oxide layer. The connections form a Josephson junction. The current trough

  3. Bioluminescent bioreporter integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Simpson, Michael L. (Knoxville, TN); Sayler, Gary S. (Blaine, TN); Paulus, Michael J. (Knoxville, TN)

    2000-01-01

    Disclosed are monolithic bioelectronic devices comprising a bioreporter and an OASIC. These bioluminescent bioreporter integrated circuit are useful in detecting substances such as pollutants, explosives, and heavy-metals residing in inhospitable areas such as groundwater, industrial process vessels, and battlefields. Also disclosed are methods and apparatus for environmental pollutant detection, oil exploration, drug discovery, industrial process control, and hazardous chemical monitoring.

  4. Signals and Circuits in the Purkinje Neuron

    Directory of Open Access Journals (Sweden)

    Ze'ev R Abrams

    2011-09-01

    Full Text Available Purkinje neurons in the cerebellum have over 100,000 inputs organized in an orthogonal geometry, and a single output channel. As the sole output of the cerebellar cortex layer, their complex firing pattern has been associated with motor control and learning. As such they have been extensively modeled and measured using tools ranging from electrophysiology and neuroanatomy, to dynamic systems and artificial intelligence methods. However, there is an alternative approach to analyze and describe the neuronal output of these cells using concepts from Electrical Engineering, particularly signal processing and digital/analog circuits. By viewing the Purkinje neuron as an unknown circuit to be reverse-engineered, we can use the tools that provide the foundations of today’s integrated circuits and communication systems to analyze the Purkinje system at the circuit level. We use Fourier transforms to analyze and isolate the inherent frequency modes in the Purkinje neuron and define 3 unique frequency ranges associated with the cells’ output. Comparing the Purkinje neuron to a signal generator that can be externally modulated adds an entire level of complexity to the functional role of these neurons both in terms of data analysis and information processing, relying on Fourier analysis methods in place of statistical ones. We also re-describe some of the recent literature in the field, using the nomenclature of signal processing. Furthermore, by comparing the experimental data of the past decade with basic electronic circuitry, we can resolve the outstanding controversy in the field, by recognizing that the Purkinje neuron can act as a multivibrator circuit.

  5. Sorting Network for Reversible Logic Synthesis

    CERN Document Server

    Islam, Md Saiful; Mahmud, Abdullah Al; karim, Muhammad Rezaul

    2010-01-01

    In this paper, we have introduced an algorithm to implement a sorting network for reversible logic synthesis based on swapping bit strings. The algorithm first constructs a network in terms of n*n Toffoli gates read from left to right. The number of gates in the circuit produced by our algorithm is then reduced by template matching and removing useless gates from the network. We have also compared the efficiency of the proposed method with the existing ones.

  6. An Improved Structure Of Reversible Adder And Subtractor

    Directory of Open Access Journals (Sweden)

    Aakash Gupta

    2013-03-01

    Full Text Available In today’s world everyday a new technology which is faster, smaller and more complex than its predecessor is being developed. The increased number of transistors packed onto a chip of a conventional system results in increased power consumption that is why Reversible logic has drawn attention of Researchers due to its less heat dissipating characteristics. Reversible logic can be imposed over applications such as quantum computing, optical computing, quantum dot cellular automata, low power VLSI circuits, DNA computing. This paper presents the reversible combinational circuit of adder, subtractor and parity preserving subtractor. The suggested circuit in this paper are designed using Feynman, Double Feynman and MUX gates which are better than the existing one in literature in terms of Quantum cost, Garbage output and Total logical calculations.

  7. An Adaptive Body-Bias Generator for Low Voltage CMOS VLSI Circuits

    OpenAIRE

    Ashok Srivastava; Chuang Zhang

    2008-01-01

    A CMOS body-bias generating circuit has been designed for generating adaptive body-biases for MOSFETs in CMOS circuits for low voltage operation. The circuit compares the frequency of an internal ring oscillator with an external reference clock. When the reference clock is “high,” a forward body-bias is generated. When the reference clock is “low,” a reverse body-bias is generated. The forward body bias is limited to no more than 0.4 V to avoid CMOS latchup. The reverse body bias is limited t...

  8. Resistor Combinations for Parallel Circuits.

    Science.gov (United States)

    McTernan, James P.

    1978-01-01

    To help simplify both teaching and learning of parallel circuits, a high school electricity/electronics teacher presents and illustrates the use of tables of values for parallel resistive circuits in which total resistances are whole numbers. (MF)

  9. The LMT circuit and SPICE

    DEFF Research Database (Denmark)

    Lindberg, Erik; Murali, K.; Tamacevicius, Arunas

    2006-01-01

    The state equations of the LMT circuit are modeled as a dedicated analogue computer circuit and solved by means of PSpice. The nonlinear part of the system is studied. Problems with the PSpice program are presented....

  10. Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

    Science.gov (United States)

    1975-01-01

    Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.

  11. Diode, transistor & fet circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Diode, Transistor and FET Circuits Manual is a handbook of circuits based on discrete semiconductor components such as diodes, transistors, and FETS. The book also includes diagrams and practical circuits. The book describes basic and special diode characteristics, heat wave-rectifier circuits, transformers, filter capacitors, and rectifier ratings. The text also presents practical applications of associated devices, for example, zeners, varicaps, photodiodes, or LEDs, as well as it describes bipolar transistor characteristics. The transistor can be used in three basic amplifier configuration

  12. Positive fractional linear electrical circuits

    Science.gov (United States)

    Kaczorek, Tadeusz

    2013-10-01

    The positive fractional linear systems and electrical circuits are addressed. New classes of fractional asymptotically stable and unstable electrical circuits are introduced. The Caputo and Riemann-Liouville definitions of fractional derivatives are used to analysis of the positive electrical circuits composed of resistors, capacitors, coils and voltage (current) sources. The positive fractional electrical and specially unstable different types electrical circuits are analyzed. Some open problems are formulated.

  13. Static Switching Dynamic Buffer Circuit

    OpenAIRE

    Pandey, A. K.; R. A. Mishra; R. K. Nagaria

    2013-01-01

    We proposed footless domino logic buffer circuit. It minimizes redundant switching at the dynamic and the output nodes. The proposed circuit avoids propagation of precharge pulse to the output node and allows the dynamic node which saves power consumption. Simulation is done using 0.18 µm CMOS technology. We have calculated the power consumption, delay, and power delay product of the proposed circuit and compared the results with the existing circuits for different logic function, loading co...

  14. Value Constraint and Monotone circuit

    OpenAIRE

    Kobayashi, Koji

    2012-01-01

    This paper talks about that monotone circuit is P-Complete. Decision problem that include P-Complete is mapping that classify input with a similar property. Therefore equivalence relation of input value is important for computation. But monotone circuit cannot compute the equivalence relation of the value because monotone circuit can compute only monotone function. Therefore, I make the value constraint explicitly in the input and monotone circuit can compute equivalence relation. As a result...

  15. LC-Circuit Calorimetry

    CERN Document Server

    Bossen, Olaf

    2011-01-01

    We present a new type of calorimeter in which we couple an unknown heat capacity with the aid of Peltier elements to an electrical circuit. The use of an electrical inductance and an amplifier in the circuit allows us to achieve autonomous oscillations, and the measurement of the corresponding resonance frequency makes it possible to accurately measure the heat capacity with an intrinsic statistical error that decreases as ~t^{-3/2} with measuring time t, as opposed to a corresponding error ~t^{-1/2} in the conventional alternating current (a.c.) method to measure heat capacities. We have built a demonstration experiment to show the feasibility of the new technique, and we have tested it on a gadolinium sample at its transition to the ferromagnetic state.

  16. Engineering prokaryotic gene circuits

    OpenAIRE

    Michalodimitrakis, Konstantinos; Isalan, Mark

    2009-01-01

    Engineering of synthetic gene circuits is a rapidly growing discipline, currently dominated by prokaryotic transcription networks, which can be easily rearranged or rewired to give different output behaviours. In this review, we examine both a rational and a combinatorial design of such networks and discuss progress on using in vitro evolution techniques to obtain functional systems. Moving beyond pure transcription networks, more and more networks are being implemented at the level of RNA, t...

  17. Refractory Neuron Circuits

    OpenAIRE

    Sarpeshkar, Rahul; Watts, Lloyd; Mead, Carver

    1992-01-01

    Neural networks typically use an abstraction of the behaviour of a biological neuron, in which the continuously varying mean firing rate of the neuron is presumed to carry information about the neuron's time-varying state of excitation. However, the detailed timing of action potentials is known to be important in many biological systems. To build electronic models of such systems, one must have well-characterized neuron circuits that capture the essential behaviour of real neur...

  18. Electronic devices and circuits

    CERN Document Server

    Kishore, K Lal

    2008-01-01

    This book is written in a simple lucid Language along with derivation of equations and supported by numerous solved problems to help the student to understand the concepts clearly.Advances in Miniaturization of Electronic Systems by ever increasing packaging densities on Integrated Circuits has made it very essential for thorough Knowledge of the concepts, phenomenon, characteristics and behaviour of semiconductor Devices for students and professionals.

  19. Cartography of serotonergic circuits.

    Science.gov (United States)

    Sparta, Dennis R; Stuber, Garret D

    2014-08-01

    Serotonin is an essential neuromodulator, but the precise circuit connectivity that regulates serotonergic neurons has not been well defined. Using rabies virus tracing strategies Weissbourd et al. (2014) and Pollak Dorocic et al. (2014) in this issue of Neuron and Ogawa et al. (2014) in Cell Reports provide a comprehensive map of the inputs to serotonergic neurons, highlighting the complexity and diversity of potential upstream cellular regulators.

  20. PARTICLE BEAM TRACKING CIRCUIT

    Science.gov (United States)

    Anderson, O.A.

    1959-05-01

    >A particle-beam tracking and correcting circuit is described. Beam induction electrodes are placed on either side of the beam, and potentials induced by the beam are compared in a voltage comparator or discriminator. This comparison produces an error signal which modifies the fm curve at the voltage applied to the drift tube, thereby returning the orbit to the preferred position. The arrangement serves also to synchronize accelerating frequency and magnetic field growth. (T.R.H.)

  1. Reversible arithmetic logic unit

    OpenAIRE

    zhou, Rigui; Shi, Yang; Zhang, Manqun

    2011-01-01

    Quantum computer requires quantum arithmetic. The sophisticated design of a reversible arithmetic logic unit (reversible ALU) for quantum arithmetic has been investigated in this letter. We provide explicit construction of reversible ALU effecting basic arithmetic operations. By provided the corresponding control unit, the proposed reversible ALU can combine the classical arithmetic and logic operation in a reversible integrated system. This letter provides actual evidence to prove the possib...

  2. Fundamental Atomtronic Circuit Elements

    Science.gov (United States)

    Lee, Jeffrey; McIlvain, Brian; Lobb, Christopher; Hill, Wendell T., III

    2012-06-01

    Recent experiments with neutral superfluid gases have shown that it is possible to create atomtronic circuits analogous to existing superconducting circuits. The goals of these experiments are to create complex systems such as Josephson junctions. In addition, there are theoretical models for active atomtronic components analogous to diodes, transistors and oscillators. In order for any of these devices to function, an understanding of the more fundamental atomtronic elements is needed. Here we describe the first experimental realization of these more fundamental elements. We have created an atomtronic capacitor that is discharged through a resistance and inductance. We will discuss a theoretical description of the system that allows us to determine values for the capacitance, resistance and inductance. The resistance is shown to be analogous to the Sharvin resistance, and the inductance analogous to kinetic inductance in electronics. This atomtronic circuit is implemented with a thermal sample of laser cooled rubidium atoms. The atoms are confined using what we call free-space atom chips, a novel optical dipole trap produced using a generalized phase-contrast imaging technique. We will also discuss progress toward implementing this atomtronic system in a degenerate Bose gas.

  3. Is the Ninth Circuit Too Large? A Statistical Study of Judicial Quality.

    OpenAIRE

    Posner, Richard A.

    2000-01-01

    This paper provides an empirical test of the claim that the U.S. Court of Appeals for the Ninth Circuit has too many judges to be able to do a good job. Reversals (especially summary reversals) by the Supreme Court and citations are used as proxies for quality of judicial output. The overall conclusion is that (1) adding judgeships tends to reduce the quality of a court's output and (2) the Ninth Circuit's uniquely high rate of being summarily reversed by the Supreme Court (a) is probably not...

  4. Changes to the shuttle circuits

    CERN Multimedia

    GS Department

    2011-01-01

    To fit with passengers expectation, there will be some changes to the shuttle circuits as from Monday 10 October. See details on http://cern.ch/ShuttleService (on line on 7 October). Circuit No. 5 is cancelled as circuit No. 1 also stops at Bldg. 33. In order to guarantee shorter travel times, circuit No. 1 will circulate on Meyrin site only and circuit No. 2, with departures from Bldg. 33 and 500, on Prévessin site only. Site Services Section

  5. Experimental determination of circuit equations

    CERN Document Server

    Shulman, Jason; Widjaja, Matthew; Gunaratne, Gemunu H

    2013-01-01

    Kirchhoff's laws offer a general, straightforward approach to circuit analysis. Unfortunately, use of the laws becomes impractical for all but the simplest of circuits. This work presents a novel method of analyzing direct current resistor circuits. It is based on an approach developed to model complex networks, making it appropriate for use on large, complicated circuits. It is unique in that it is not an analytic method. It is based on experiment, yet the approach produces the same circuit equations obtained by more traditional means.

  6. Power system with an integrated lubrication circuit

    Energy Technology Data Exchange (ETDEWEB)

    Hoff, Brian D. (East Peoria, IL); Akasam, Sivaprasad (Peoria, IL); Algrain, Marcelo C. (Peoria, IL); Johnson, Kris W. (Washington, IL); Lane, William H. (Chillicothe, IL)

    2009-11-10

    A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.

  7. Integrated coherent matter wave circuits

    International Nuclear Information System (INIS)

    An integrated coherent matter wave circuit is a single device, analogous to an integrated optical circuit, in which coherent de Broglie waves are created and then launched into waveguides where they can be switched, divided, recombined, and detected as they propagate. Applications of such circuits include guided atom interferometers, atomtronic circuits, and precisely controlled delivery of atoms. We report experiments demonstrating integrated circuits for guided coherent matter waves. The circuit elements are created with the painted potential technique, a form of time-averaged optical dipole potential in which a rapidly moving, tightly focused laser beam exerts forces on atoms through their electric polarizability. Moreover, the source of coherent matter waves is a Bose-Einstein condensate (BEC). Finally, we launch BECs into painted waveguides that guide them around bends and form switches, phase coherent beamsplitters, and closed circuits. These are the basic elements that are needed to engineer arbitrarily complex matter wave circuitry

  8. Efficient Approaches for Designing Fault Tolerant Reversible Carry Look-Ahead and Carry-Skip Adders

    CERN Document Server

    Islam, Md Saiful; begum, Zerina; Hafiz, Mohd Zulfiquar

    2010-01-01

    Combinational or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its corresponding output vector. Reversible logic circuit implements only the functions having one-to-one mapping between its input and output vectors and therefore naturally takes care of heating. Reversible logic design becomes one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power CMOS design, digital signal processing and nanotechnology. This paper presents the efficient approaches for designing fault tolerant reversible fast adders that implement carry look-ahead and carry-skip logic. The proposed high speed reversible adders include MIG gates for the realization of its basic building block. The MIG gate is universal and parity preserving. It allows any fault that affects no more than a single signal readily detectable at the circuit's primary outputs...

  9. Memristor based startup circuit for self biased circuits

    Science.gov (United States)

    Das, Mangal; Singh, Amit Kumar; Rathi, Amit; Singhal, Sonal

    2016-04-01

    This paper presents the design of a Memristor based startup circuit for self biased circuits. Memristor has many advantages over conventional CMOS devices such as low leakage current at nanometer scale, easy to manufacture. In this work the switching characteristics of memristor is utilized. First the theoretical equations describing the switching behavior of memristor are investigated. To prove the switching capability of Memristor, a startup circuit based on memristor is proposed which uses series combination of Memristor and capacitor. Proposed circuit is compared with the previously reported MOSFET based startup circuits. Comparison of different circuits was done to validate the results. Simulation results show that memristor based circuit can attain on (I = 12.94 µA) to off state (I = 1 .2 µA) in 25 ns while the MOSFET based startup circuits take on (I = 14.19 µA) to off state (I = 1.4 µA) in more than 90 ns. The benefit comes in terms of area because the number of components used in the circuit are lesser than the conventional startup circuits.

  10. Managing Reverse Logistics or Reversing Logistics Management?

    NARCIS (Netherlands)

    M.P. de Brito (Marisa)

    2004-01-01

    textabstractIn the past, supply chains were busy fine-tuning the logistics from raw material to the end customer. Today an increasing flow of products is going back in the chain. Thus, companies have to manage reverse logistics as well.This thesis contributes to a better understanding of reverse log

  11. Reversible Thermoset Adhesives

    Science.gov (United States)

    Mac Murray, Benjamin C. (Inventor); Tong, Tat H. (Inventor); Hreha, Richard D. (Inventor)

    2016-01-01

    Embodiments of a reversible thermoset adhesive formed by incorporating thermally-reversible cross-linking units and a method for making the reversible thermoset adhesive are provided. One approach to formulating reversible thermoset adhesives includes incorporating dienes, such as furans, and dienophiles, such as maleimides, into a polymer network as reversible covalent cross-links using Diels Alder cross-link formation between the diene and dienophile. The chemical components may be selected based on their compatibility with adhesive chemistry as well as their ability to undergo controlled, reversible cross-linking chemistry.

  12. Reversible Logic Elements with Memory and Their Universality

    Directory of Open Access Journals (Sweden)

    Kenichi Morita

    2013-09-01

    Full Text Available Reversible computing is a paradigm of computation that reflects physical reversibility, one of the fundamental microscopic laws of Nature. In this survey, we discuss topics on reversible logic elements with memory (RLEM, which can be used to build reversible computing systems, and their universality. An RLEM is called universal, if any reversible sequential machine (RSM can be realized as a circuit composed only of it. Since a finite-state control and a tape cell of a reversible Turing machine (RTM are formalized as RSMs, any RTM can be constructed from a universal RLEM. Here, we investigate 2-state RLEMs, and show that infinitely many kinds of non-degenerate RLEMs are all universal besides only four exceptions. Non-universality of these exceptional RLEMs is also argued.

  13. Photonic Integrated Circuits

    Science.gov (United States)

    Merritt, Scott; Krainak, Michael

    2016-01-01

    Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.

  14. Optoelectronics circuits manual

    CERN Document Server

    Marston, R M

    1999-01-01

    This manual is a useful single-volume guide specifically aimed at the practical design engineer, technician, and experimenter, as well as the electronics student and amateur. It deals with the subject in an easy to read, down to earth, and non-mathematical yet comprehensive manner, explaining the basic principles and characteristics of the best known devices, and presenting the reader with many practical applications and over 200 circuits. Most of the ICs and other devices used are inexpensive and readily available types, with universally recognised type numbers.The second edition

  15. Electronics circuits and systems

    CERN Document Server

    Bishop, Owen

    2007-01-01

    The material in Electronics - Circuits and Systems is a truly up-to-date textbook, with coverage carefully matched to the electronics units of the 2007 BTEC National Engineering and the latest AS and A Level specifications in Electronics from AQA, OCR and WJEC. The material has been organized with a logical learning progression, making it ideal for a wide range of pre-degree courses in electronics. The approach is student-centred and includes: numerous examples and activities; web research topics; Self Test features, highlighted key facts, formulae and definitions. Each chapter ends with a set

  16. Electric circuits problem solver

    CERN Document Server

    REA, Editors of

    2012-01-01

    Each Problem Solver is an insightful and essential study and solution guide chock-full of clear, concise problem-solving gems. All your questions can be found in one convenient source from one of the most trusted names in reference solution guides. More useful, more practical, and more informative, these study aids are the best review books and textbook companions available. Nothing remotely as comprehensive or as helpful exists in their subject anywhere. Perfect for undergraduate and graduate studies.Here in this highly useful reference is the finest overview of electric circuits currently av

  17. Electronic logic circuits

    CERN Document Server

    Gibson, J

    2013-01-01

    Most branches of organizing utilize digital electronic systems. This book introduces the design of such systems using basic logic elements as the components. The material is presented in a straightforward manner suitable for students of electronic engineering and computer science. The book is also of use to engineers in related disciplines who require a clear introduction to logic circuits. This third edition has been revised to encompass the most recent advances in technology as well as the latest trends in components and notation. It includes a wide coverage of application specific integrate

  18. Electronics circuits and systems

    CERN Document Server

    Bishop, Owen

    2011-01-01

    The material in Electronics - Circuits and Systems is a truly up-to-date textbook, with coverage carefully matched to the electronics units of the 2007 BTEC National Engineering and the latest AS and A Level specifications in Electronics from AQA, OCR and WJEC. The material has been organized with a logical learning progression, making it ideal for a wide range of pre-degree courses in electronics. The approach is student-centred and includes: numerous examples and activities; web research topics; Self Test features, highlighted key facts, formulae and definitions. Ea

  19. Linear integrated circuits

    CERN Document Server

    Carr, Joseph

    1996-01-01

    The linear IC market is large and growing, as is the demand for well trained technicians and engineers who understand how these devices work and how to apply them. Linear Integrated Circuits provides in-depth coverage of the devices and their operation, but not at the expense of practical applications in which linear devices figure prominently. This book is written for a wide readership from FE and first degree students, to hobbyists and professionals.Chapter 1 offers a general introduction that will provide students with the foundations of linear IC technology. From chapter 2 onwa

  20. Nano integrated circuit process

    Energy Technology Data Exchange (ETDEWEB)

    Yoon, Yung Sup

    2004-02-15

    This book contains nine chapters, which are introduction of manufacture of semiconductor chip, oxidation such as Dry-oxidation, wet oxidation, oxidation model and oxide film, diffusion like diffusion process, diffusion equation, diffusion coefficient and diffusion system, ion implantation, including ion distribution, channeling, multiimplantation and masking and its system, sputtering such as CVD and PVD, lithography, wet etch and dry etch, interconnection and flattening like metal-silicon connection, silicide, multiple layer metal process and flattening, an integrated circuit process, including MOSFET and CMOS.

  1. Optically controllable molecular logic circuits

    Energy Technology Data Exchange (ETDEWEB)

    Nishimura, Takahiro, E-mail: t-nishimura@ist.osaka-u.ac.jp; Fujii, Ryo; Ogura, Yusuke; Tanida, Jun [Graduate School of Information Science and Technology, Osaka University, 1-5 Yamadaoka, Suita, Osaka 565-0871 (Japan)

    2015-07-06

    Molecular logic circuits represent a promising technology for observation and manipulation of biological systems at the molecular level. However, the implementation of molecular logic circuits for temporal and programmable operation remains challenging. In this paper, we demonstrate an optically controllable logic circuit that uses fluorescence resonance energy transfer (FRET) for signaling. The FRET-based signaling process is modulated by both molecular and optical inputs. Based on the distance dependence of FRET, the FRET pathways required to execute molecular logic operations are formed on a DNA nanostructure as a circuit based on its molecular inputs. In addition, the FRET pathways on the DNA nanostructure are controlled optically, using photoswitching fluorescent molecules to instruct the execution of the desired operation and the related timings. The behavior of the circuit can thus be controlled using external optical signals. As an example, a molecular logic circuit capable of executing two different logic operations was studied. The circuit contains functional DNAs and a DNA scaffold to construct two FRET routes for executing Input 1 AND Input 2 and Input 1 AND NOT Input 3 operations on molecular inputs. The circuit produced the correct outputs with all possible combinations of the inputs by following the light signals. Moreover, the operation execution timings were controlled based on light irradiation and the circuit responded to time-dependent inputs. The experimental results demonstrate that the circuit changes the output for the required operations following the input of temporal light signals.

  2. Optically controllable molecular logic circuits

    International Nuclear Information System (INIS)

    Molecular logic circuits represent a promising technology for observation and manipulation of biological systems at the molecular level. However, the implementation of molecular logic circuits for temporal and programmable operation remains challenging. In this paper, we demonstrate an optically controllable logic circuit that uses fluorescence resonance energy transfer (FRET) for signaling. The FRET-based signaling process is modulated by both molecular and optical inputs. Based on the distance dependence of FRET, the FRET pathways required to execute molecular logic operations are formed on a DNA nanostructure as a circuit based on its molecular inputs. In addition, the FRET pathways on the DNA nanostructure are controlled optically, using photoswitching fluorescent molecules to instruct the execution of the desired operation and the related timings. The behavior of the circuit can thus be controlled using external optical signals. As an example, a molecular logic circuit capable of executing two different logic operations was studied. The circuit contains functional DNAs and a DNA scaffold to construct two FRET routes for executing Input 1 AND Input 2 and Input 1 AND NOT Input 3 operations on molecular inputs. The circuit produced the correct outputs with all possible combinations of the inputs by following the light signals. Moreover, the operation execution timings were controlled based on light irradiation and the circuit responded to time-dependent inputs. The experimental results demonstrate that the circuit changes the output for the required operations following the input of temporal light signals

  3. Sequential circuit design for radiation hardened multiple voltage integrated circuits

    Energy Technology Data Exchange (ETDEWEB)

    Clark, Lawrence T. (Phoenix, AZ); McIver, III, John K. (Albuquerque, NM)

    2009-11-24

    The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

  4. Reverse Shoulder Arthroplasty

    Medline Plus

    Full Text Available ... you can use for reverse shoulder replacement. The standard delto-pectoral approach, or the superior approach, which ... that are different between a reverse and a standard total is, first of all, we don't ...

  5. Quasi-Linear Circuit

    Science.gov (United States)

    Bradley, William; Bird, Ross; Eldred, Dennis; Zook, Jon; Knowles, Gareth

    2013-01-01

    This work involved developing spacequalifiable switch mode DC/DC power supplies that improve performance with fewer components, and result in elimination of digital components and reduction in magnetics. This design is for missions where systems may be operating under extreme conditions, especially at elevated temperature levels from 200 to 300 degC. Prior art for radiation-tolerant DC/DC converters has been accomplished utilizing classical magnetic-based switch mode converter topologies; however, this requires specific shielding and component de-rating to meet the high-reliability specifications. It requires complex measurement and feedback components, and will not enable automatic re-optimization for larger changes in voltage supply or electrical loading condition. The innovation is a switch mode DC/DC power supply that eliminates the need for processors and most magnetics. It can provide a well-regulated voltage supply with a gain of 1:100 step-up to 8:1 step down, tolerating an up to 30% fluctuation of the voltage supply parameters. The circuit incorporates a ceramic core transformer in a manner that enables it to provide a well-regulated voltage output without use of any processor components or magnetic transformers. The circuit adjusts its internal parameters to re-optimize its performance for changes in supply voltage, environmental conditions, or electrical loading at the output

  6. Simple Cell Balance Circuit

    Science.gov (United States)

    Johnson, Steven D.; Byers, Jerry W.; Martin, James A.

    2012-01-01

    A method has been developed for continuous cell voltage balancing for rechargeable batteries (e.g. lithium ion batteries). A resistor divider chain is provided that generates a set of voltages representing the ideal cell voltage (the voltage of each cell should be as if the cells were perfectly balanced). An operational amplifier circuit with an added current buffer stage generates the ideal voltage with a very high degree of accuracy, using the concept of negative feedback. The ideal voltages are each connected to the corresponding cell through a current- limiting resistance. Over time, having the cell connected to the ideal voltage provides a balancing current that moves the cell voltage very close to that ideal level. In effect, it adjusts the current of each cell during charging, discharging, and standby periods to force the cell voltages to be equal to the ideal voltages generated by the resistor divider. The device also includes solid-state switches that disconnect the circuit from the battery so that it will not discharge the battery during storage. This solution requires relatively few parts and is, therefore, of lower cost and of increased reliability due to the fewer failure modes. Additionally, this design uses very little power. A preliminary model predicts a power usage of 0.18 W for an 8-cell battery. This approach is applicable to a wide range of battery capacities and voltages.

  7. Reverse cholesterol transport revisited

    Institute of Scientific and Technical Information of China (English)

    Astrid; E; van; der; Velde

    2010-01-01

    Reverse cholesterol transport was originally described as the high-density lipoprotein-mediated cholesterol flux from the periphery via the hepatobiliary tract to the intestinal lumen, leading to fecal excretion. Since the introduction of reverse cholesterol transport in the 1970s, this pathway has been intensively investigated. In this topic highlight, the classical reverse cholesterol transport concepts are discussed and the subject reverse cholesterol transport is revisited.

  8. 49 CFR 236.13 - Spring switch; selection of signal control circuits through circuit controller.

    Science.gov (United States)

    2010-10-01

    ... circuits through circuit controller. 236.13 Section 236.13 Transportation Other Regulations Relating to...; selection of signal control circuits through circuit controller. The control circuits of signals governing... circuit controller, or through the contacts of relay repeating the position of such circuit...

  9. Reverse logistics - a framework

    NARCIS (Netherlands)

    M.P. de Brito (Marisa); R. Dekker (Rommert)

    2002-01-01

    textabstractIn this paper we define and compare Reverse Logistics definitions. We start by giving an understanding framework of Reverse Logistics: the why-what-how. By this means, we put in context the driving forces for Reverse Logistics, a typology of return reasons, a classification of product

  10. Synthetic Biology: Integrated Gene Circuits

    OpenAIRE

    Nandagopal, Nagarajan; Michael B Elowitz

    2011-01-01

    A major goal of synthetic biology is to develop a deeper understanding of biological design principles from the bottom up, by building circuits and studying their behavior in cells. Investigators initially sought to design circuits “from scratch” that functioned as independently as possible from the underlying cellular system. More recently, researchers have begun to develop a new generation of synthetic circuits that integrate more closely with endogenous cellular processes. These approaches...

  11. Quantum Circuits with Mixed States

    OpenAIRE

    Aharonov, Dorit; Kitaev, Alexei; Nisan, Noam

    1998-01-01

    We define the model of quantum circuits with density matrices, where non-unitary gates are allowed. Measurements in the middle of the computation, noise and decoherence are implemented in a natural way in this model, which is shown to be equivalent in computational power to standard quantum circuits. The main result in this paper is a solution for the subroutine problem: The general function that a quantum circuit outputs is a probabilistic function, but using pure state language, such a func...

  12. Pharmacokinetics and RC Circuit Concepts

    Science.gov (United States)

    Cock, Mieke De; Janssen, Paul

    2013-11-01

    Most introductory physics courses include a chapter on RC circuits in which the differential equations for the charging and discharging of a capacitor are derived. A number of papers in this journal describe lab experiments dealing with the measurement of different parameters in such RC circuits. In this contribution, we report on a lab experiment we developed for students majoring in pharmacy, using RC circuits to simulate a pharmacokinetic process.

  13. Analysis and modeling of Fano resonances using equivalent circuit elements.

    Science.gov (United States)

    Lv, Bo; Li, Rujiang; Fu, Jiahui; Wu, Qun; Zhang, Kuang; Chen, Wan; Wang, Zhefei; Ma, Ruyu

    2016-08-22

    Fano resonance presents an asymmetric line shape formed by an interference of a continuum coupled with a discrete autoionized state. In this paper, we show several simple circuits for Fano resonances from the stable-input impedance mechanism, where the elements consisting of inductors and capacitors are formulated for various resonant modes, and the resistor represents the damping of the oscillators. By tuning the pole-zero of the input impedance, a simple circuit with only three passive components e.g. two inductors and one capacitor, can exhibit asymmetric resonance with arbitrary Q-factors flexiblely. Meanwhile, four passive components can exhibit various resonances including the Lorentz-like and reversely electromagnetically induced transparency (EIT) formations. Our work not only provides an intuitive understanding of Fano resonances, but also pave the way to realize Fano resonaces using simple circuit elements.

  14. Analysis and modeling of Fano resonances using equivalent circuit elements

    Science.gov (United States)

    Lv, Bo; Li, Rujiang; Fu, Jiahui; Wu, Qun; Zhang, Kuang; Chen, Wan; Wang, Zhefei; Ma, Ruyu

    2016-08-01

    Fano resonance presents an asymmetric line shape formed by an interference of a continuum coupled with a discrete autoionized state. In this paper, we show several simple circuits for Fano resonances from the stable-input impedance mechanism, where the elements consisting of inductors and capacitors are formulated for various resonant modes, and the resistor represents the damping of the oscillators. By tuning the pole-zero of the input impedance, a simple circuit with only three passive components e.g. two inductors and one capacitor, can exhibit asymmetric resonance with arbitrary Q-factors flexiblely. Meanwhile, four passive components can exhibit various resonances including the Lorentz-like and reversely electromagnetically induced transparency (EIT) formations. Our work not only provides an intuitive understanding of Fano resonances, but also pave the way to realize Fano resonaces using simple circuit elements.

  15. A Circuit to Demonstrate Phase Relationships in "RLC" Circuits

    Science.gov (United States)

    Sokol, P. E.; Warren, G.; Zheng, B.; Smith, P.

    2013-01-01

    We have developed a circuit to demonstrate the phase relationships between resistive and reactive elements in series "RLC" circuits. We utilize a differential amplifier to allow the phases of the three elements and the current to be simultaneously displayed on an inexpensive four channel oscilloscope. We have included a novel circuit…

  16. Memristor Circuits and Systems

    KAUST Repository

    Zidan, Mohammed A.

    2015-05-01

    Current CMOS-based technologies are facing design challenges related to the continuous scaling down of the minimum feature size, according to Moore’s law. Moreover, conventional computing architecture is no longer an effective way of fulfilling modern applications demands, such as big data analysis, pattern recognition, and vector processing. Therefore, there is an exigent need to shift to new technologies, at both the architecture and the device levels. Recently, memristor devices and structures attracted attention for being promising candidates for this job. Memristor device adds a new dimension for designing novel circuits and systems. In addition, high-density memristor-based crossbar is widely considered to be the essential element for future memory and bio-inspired computing systems. However, numerous challenges need to be addressed before the memristor genuinely replaces current memory and computing technologies, which is the motivation behind this research effort. In order to address the technology challenges, we begin by fabricating and modeling the memristor device. The devices fabricated at our local clean room enriched our understanding of the memristive phenomenon and enabled the experimental testing for our memristor-based circuits. Moreover, our proposed mathematical modeling for memristor behavior is an essential element for the theoretical circuit design stage. Designing and addressing the challenges of memristor systems with practical complexity, however, requires an extra step, which takes the form of a reliable and modular simulation platform. We, therefore, built a new simulation platform for the resistive crossbar, which can simulate realistic size arrays filled with real memory data. In addition, this simulation platform includes various crossbar nonidealities in order to obtain accurate simulation results. Consequently, we were able to address the significant challenges facing the high density memristor crossbar, as the building block for

  17. A dishwasher for circuits

    CERN Multimedia

    Rosaria Marraffino

    2014-01-01

    You have always been told that electronic devices fear water. However, at the Surface Mount Devices (SMD) Workshop here at CERN all the electronic assemblies are cleaned with a machine that looks like a… dishwasher.   The circuit dishwasher. Credit: Clara Nellist.  If you think the image above shows a dishwasher, you wouldn’t be completely wrong. Apart from the fact that the whole pumping system and the case itself are made entirely from stainless steel and chemical resistant materials, and the fact that it washes electrical boards instead of dishes… it works exactly like a dishwasher. It’s a professional machine (mainly used in the pharmaceutical industry) designed to clean everything that can be washed with a water-based chemical soap. This type of treatment increases the lifetime of the electronic boards and therefore the LHC's reliability by preventing corrosion problems in the severe radiation and ozone environment of the LHC tunn...

  18. Basic electronic circuits

    CERN Document Server

    Buckley, P M

    1980-01-01

    In the past, the teaching of electricity and electronics has more often than not been carried out from a theoretical and often highly academic standpoint. Fundamentals and basic concepts have often been presented with no indication of their practical appli­ cations, and all too frequently they have been illustrated by artificially contrived laboratory experiments bearing little relationship to the outside world. The course comes in the form of fourteen fairly open-ended constructional experiments or projects. Each experiment has associated with it a construction exercise and an explanation. The basic idea behind this dual presentation is that the student can embark on each circuit following only the briefest possible instructions and that an open-ended approach is thereby not prejudiced by an initial lengthy encounter with the theory behind the project; this being a sure way to dampen enthusiasm at the outset. As the investigation progresses, questions inevitably arise. Descriptions of the phenomena encounte...

  19. Modeling cortical circuits.

    Energy Technology Data Exchange (ETDEWEB)

    Rohrer, Brandon Robinson; Rothganger, Fredrick H.; Verzi, Stephen J.; Xavier, Patrick Gordon

    2010-09-01

    The neocortex is perhaps the highest region of the human brain, where audio and visual perception takes place along with many important cognitive functions. An important research goal is to describe the mechanisms implemented by the neocortex. There is an apparent regularity in the structure of the neocortex [Brodmann 1909, Mountcastle 1957] which may help simplify this task. The work reported here addresses the problem of how to describe the putative repeated units ('cortical circuits') in a manner that is easily understood and manipulated, with the long-term goal of developing a mathematical and algorithmic description of their function. The approach is to reduce each algorithm to an enhanced perceptron-like structure and describe its computation using difference equations. We organize this algorithmic processing into larger structures based on physiological observations, and implement key modeling concepts in software which runs on parallel computing hardware.

  20. Closed Circuit Videoinstallationen

    DEFF Research Database (Denmark)

    Kacunko, Slavko

    be seen with only insignificant qualification as a specific characteristic of the medium. The closed-circuit video installations based on it represent the attest field of experiment for the assumptions on art and the theory and history of the medium that it might lead one make. In recent years......, theoretical debate on the medium has diagnosed with some precision where the electronic video image stands between analogue and digital codes, or again, between media representation and presentation; but that position has hardly ever been subjected to examination against the pertinent examples. An art...... of video as well as the latest digital art forms, can then be examined with the aid of such results and elucidated in historical terms. The prospect at least, of a gradual introduction of the electronic arts into the art history syllabus will be brought a deal closer thanks to such individual...

  1. Diamond Integrated Optomechanical Circuits

    CERN Document Server

    Rath, Patrik; Nebel, Christoph; Wild, Christoph; Pernice, Wolfram H P

    2013-01-01

    Diamond offers unique material advantages for the realization of micro- and nanomechanical resonators due to its high Young's modulus, compatibility with harsh environments and superior thermal properties. At the same time, the wide electronic bandgap of 5.45eV makes diamond a suitable material for integrated optics because of broadband transparency and the absence of free-carrier absorption commonly encountered in silicon photonics. Here we take advantage of both to engineer full-scale optomechanical circuits in diamond thin films. We show that polycrystalline diamond films fabricated by chemical vapour deposition provide a convenient waferscale substrate for the realization of high quality nanophotonic devices. Using free-standing nanomechanical resonators embedded in on-chip Mach-Zehnder interferometers, we demonstrate efficient optomechanical transduction via gradient optical forces. Fabricated diamond resonators reproducibly show high mechanical quality factors up to 11,200. Our low cost, wideband, carri...

  2. VLSI circuits implementing computational models of neocortical circuits.

    Science.gov (United States)

    Wijekoon, Jayawan H B; Dudek, Piotr

    2012-09-15

    This paper overviews the design and implementation of three neuromorphic integrated circuits developed for the COLAMN ("Novel Computing Architecture for Cognitive Systems based on the Laminar Microcircuitry of the Neocortex") project. The circuits are implemented in a standard 0.35 μm CMOS technology and include spiking and bursting neuron models, and synapses with short-term (facilitating/depressing) and long-term (STDP and dopamine-modulated STDP) dynamics. They enable execution of complex nonlinear models in accelerated-time, as compared with biology, and with low power consumption. The neural dynamics are implemented using analogue circuit techniques, with digital asynchronous event-based input and output. The circuits provide configurable hardware blocks that can be used to simulate a variety of neural networks. The paper presents experimental results obtained from the fabricated devices, and discusses the advantages and disadvantages of the analogue circuit approach to computational neural modelling. PMID:22342970

  3. Pharmacokinetics and "RC" Circuit Concepts

    Science.gov (United States)

    De Cock, Mieke; Janssen, Paul

    2013-01-01

    Most introductory physics courses include a chapter on "RC" circuits in which the differential equations for the charging and discharging of a capacitor are derived. A number of papers in this journal describe lab experiments dealing with the measurement of different parameters in such "RC" circuits. In this contribution, we…

  4. Enhancement of Linear Circuit Program

    DEFF Research Database (Denmark)

    Gaunholt, Hans; Dabu, Mihaela; Beldiman, Octavian

    1996-01-01

    In this report a preliminary user friendly interface has been added to the LCP2 program making it possible to describe an electronic circuit by actually drawing the circuit on the screen. Component values and other options and parameters can easily be set by the aid of the interface. The interface...

  5. Demonstrations with an "LCR" Circuit

    Science.gov (United States)

    Kraftmakher, Yaakov

    2011-01-01

    The "LCR" circuit is an important topic in the course of electricity and magnetism. Papers in this field consider mainly the forced oscillations and resonance. Our aim is to show how to demonstrate the free and self-excited oscillations in an "LCR" circuit. (Contains 4 figures.)

  6. Logic Circuit Design Selected Methods

    CERN Document Server

    Vingron, Shimon P

    2012-01-01

        In three main divisions the  book covers combinational circuits, latches, and asynchronous sequential circuits. Combinational circuits have  no memorising ability, while sequential circuits have such an ability to various degrees. Latches are the simplest sequential circuits, ones with the shortest memory. The presentation is decidedly non-standard.         The design of combinational circuits is discussed in an orthodox manner using normal forms and in an unorthodox manner using set-theoretical evaluation formulas relying heavily on Karnaugh maps. The latter approach allows for a new design technique called composition.          Latches are covered very extensively. Their memory functions are expressed mathematically in a time-independent manner allowing the use of (normal, non-temporal) Boolean logic in their calculation. The theory of latches is then used as the basis for calculating asynchronous circuits.         Asynchronous circuits are specified in a tree-representation, eac...

  7. Feasible Methodology for Optimization of a Novel Reversible Binary Compressor

    Directory of Open Access Journals (Sweden)

    Neeraj Kumar Misra

    2015-08-01

    Full Text Available Now a day’s reversible logic is an attractive research area due to its low power consumption in the area of VLSI circuit design. The reversible logic gate is utilized to optimize power consumption by a feature of retrieving input logic from an output logic because of bijective mapping between input and output. In this manuscript, we design 4:2 and 5:2 reversible compressor circuits using a new type of reversible gate. In addition, we propose new gate, named as inventive0 gate for optimizing a compressor circuit. The utility of the inventive0 gate is that it can be used as full adder and full subtraction with low value of garbage outputs and quantum cost. An algorithm is shown for designing a compressor structure. The comparative study shows that the proposed compressor structure outperforms the existing ones in terms of garbage outputs, number of gates and quantum cost. The compressor can reduce the effect of carry (Produce from full adder of the arithmetic frame design. In addition, we implement a basic reversible gate of MOS transistor with less number of MOS transistor count

  8. The GABAergic Anterior Paired Lateral Neurons Facilitate Olfactory Reversal Learning in "Drosophila"

    Science.gov (United States)

    Wu, Yanying; Ren, Qingzhong; Li, Hao; Guo, Aike

    2012-01-01

    Reversal learning has been widely used to probe the implementation of cognitive flexibility in the brain. Previous studies in monkeys identified an essential role of the orbitofrontal cortex (OFC) in reversal learning. However, the underlying circuits and molecular mechanisms are poorly understood. Here, we use the T-maze to investigate the neural…

  9. 49 CFR 236.728 - Circuit, trap.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, trap. 236.728 Section 236.728... Circuit, trap. A term applied to a circuit used where it is desirable to provide a track circuit but where it is impracticable to maintain a track circuit....

  10. Variational integrators for electric circuits

    CERN Document Server

    Ober-Blöbaum, Sina; Cheng, Mulin; Owhadi, Houman; Marsden, Jerrold E

    2011-01-01

    In this contribution, we develop a variational integrator for the simulation of (stochastic and multiscale) electric circuits. When considering the dynamics of an electrical circuit, one is faced with three special situations: 1. The system involves external (control) forcing through external (controlled) voltage sources and resistors. 2. The system is constrained via the Kirchhoff current (KCL) and voltage laws (KVL). 3. The Lagrangian is degenerate. Based on a geometric setting, an appropriate variational formulation is presented to model the circuit from which the equations of motion are derived. A time-discrete variational formulation provides an iteration scheme for the simulation of the electric circuit. Dependent on the discretization, the intrinsic degeneracy of the system can be canceled for the discrete variational scheme. In this way, a variational integrator is constructed that gains several advantages compared to standard integration tools for circuits; in particular, a comparison to BDF methods ...

  11. Electronic design with integrated circuits

    Science.gov (United States)

    Comer, D. J.

    The book is concerned with the application of integrated circuits and presents the material actually needed by the system designer to do an effective job. The operational amplifier (op amp) is discussed, taking into account the electronic amplifier, the basic op amp, the practical op amp, analog applications, and digital applications. Digital components are considered along with combinational logic, digital subsystems, the microprocessor, special circuits, communications, and integrated circuit building blocks. Attention is given to logic gates, logic families, multivibrators, the digital computer, digital methods, communicating with a computer, computer organization, register and timing circuits for data transfer, arithmetic circuits, memories, the microprocessor chip, the control unit, communicating with the microprocessor, examples of microprocessor architecture, programming a microprocessor, the voltage-controlled oscillator, the phase-locked loop, analog-to-digital conversion, amplitude modulation, frequency modulation, pulse and digital transmission, the semiconductor diode, the bipolar transistor, and the field-effect transistor.

  12. Demultiplexer circuit for neural stimulation

    Science.gov (United States)

    Wessendorf, Kurt O; Okandan, Murat; Pearson, Sean

    2012-10-09

    A demultiplexer circuit is disclosed which can be used with a conventional neural stimulator to extend the number of electrodes which can be activated. The demultiplexer circuit, which is formed on a semiconductor substrate containing a power supply that provides all the dc electrical power for operation of the circuit, includes digital latches that receive and store addressing information from the neural stimulator one bit at a time. This addressing information is used to program one or more 1:2.sup.N demultiplexers in the demultiplexer circuit which then route neural stimulation signals from the neural stimulator to an electrode array which is connected to the outputs of the 1:2.sup.N demultiplexer. The demultiplexer circuit allows the number of individual electrodes in the electrode array to be increased by a factor of 2.sup.N with N generally being in a range of 2-4.

  13. A Novel Design of Half Subtractor using Reversible Feynman Gate in Quantum Dot cellular Automata

    Directory of Open Access Journals (Sweden)

    Rubina Akter

    2014-12-01

    Full Text Available Quantum Dot cellular Automata (QCA is an emerging, promising alternative to CMOS technology that performs its task by encoding binary information on electronic charge configuration of a cell. All circuit based on QCA has an advantages of high speed, high parallel processing, high integrityand low power consumption. Reversible logic gates are the leading part in Quantum Dot cellular Automata. Reversible logic gates have an extensive feature that does not lose information. In this paper, we present a novel architecture of half subtractor gate design by reversible Feynman gate. This circuit is designedbased on QCA logic gates such as QCA majority voter gate, majority AND gate, majority OR gate and inverter gate. This circuit will provide an effective working efficiency on computational units of the digital circuit system.

  14. Quantum-dot cellular automata based reversible low power parity generator and parity checker design for nanocommunication

    Institute of Scientific and Technical Information of China (English)

    Jadav Chandra DAS; Debashis DE

    2016-01-01

    Quantum-dot cellular automata (QCA) is an emerging area of research in reversible computing. It can be used to design nanoscale circuits. In nanocommunication, the detection and correction of errors in a received message is a major factor. Besides, device density and power dissipation are the key issues in the nanocommunication architecture. For the first time, QCA-based designs of the reversible low-power odd parity generator and odd parity checker using the Feynman gate have been achieved in this study. Using the proposed parity generator and parity checker circuit, a nanocommunication architecture is pro-posed. The detection of errors in the received message during transmission is also explored. The proposed QCA Feynman gate outshines the existing ones in terms of area, cell count, and delay. The quantum costs of the proposed conventional reversible circuits and their QCA layouts are calculated and compared, which establishes that the proposed QCA circuits have very low quantum cost compared to conventional designs. The energy dissipation by the layouts is estimated, which ensures the possibility of QCA nano-device serving as an alternative platform for the implementation of reversible circuits. The stability of the proposed circuits under thermal randomness is analyzed, showing the operational efficiency of the circuits. The simulation results of the proposed design are tested with theoretical values, showing the accuracy of the circuits. The proposed circuits can be used to design more complex low-power nanoscale lossless nanocommunication architecture such as nano-transmitters and nano-receivers.

  15. From Boolean Network Model to Continuous Model Helps in Design of Functional Circuits

    OpenAIRE

    Bin Shao; Xiang Liu; Dongliang Zhang; Jiayi Wu; Qi Ouyang

    2015-01-01

    Computational circuit design with desired functions in a living cell is a challenging task in synthetic biology. To achieve this task, numerous methods that either focus on small scale networks or use evolutionary algorithms have been developed. Here, we propose a two-step approach to facilitate the design of functional circuits. In the first step, the search space of possible topologies for target functions is reduced by reverse engineering using a Boolean network model. In the second step, ...

  16. Improvement of driver to gate coupling circuits for SiC MOSFETS

    OpenAIRE

    Balcells Sendra, Josep; Mon González, Juan; Lamich Arocas, Manuel; Laguna, Alberto

    2014-01-01

    This work presents a study of the influence of different gate driver circuits on the switching behavior of SiC MOSFET devices used in a buck converter. The paper is based on several tests performed to determine the switching times and switching losses, using different reverse bias VGS voltage levels and different passive RCD (Resistance Capacitor Diode) circuits to interface the driver to the SiC MOSFET gate. Peer Reviewed

  17. Introduction to reversible computing

    CERN Document Server

    Perumalla, Kalyan S

    2013-01-01

    Few books comprehensively cover the software and programming aspects of reversible computing. Filling this gap, Introduction to Reversible Computing offers an expanded view of the field that includes the traditional energy-motivated hardware viewpoint as well as the emerging application-motivated software approach. Collecting scattered knowledge into one coherent account, the book provides a compendium of both classical and recently developed results on reversible computing. It explores up-and-coming theories, techniques, and tools for the application of rever

  18. Reversible optical-to-microwave quantum interface.

    Science.gov (United States)

    Barzanjeh, Sh; Abdi, M; Milburn, G J; Tombesi, P; Vitali, D

    2012-09-28

    We describe a reversible quantum interface between an optical and a microwave field using a hybrid device based on their common interaction with a micromechanical resonator in a superconducting circuit. We show that, by employing state-of-the-art optoelectromechanical devices, one can realize an effective source of (bright) two-mode squeezing with an optical idler (signal) and a microwave signal, which can be used for high-fidelity transfer of quantum states between optical and microwave fields by means of continuous variable teleportation. PMID:23030075

  19. Posterior Reversible Encephalopathy Syndrome

    OpenAIRE

    J Gordon Millichap

    2013-01-01

    Investigators at Children's Hospital of Montefiore, Albert Einstein College of Medicine, NY, determined the incidence of posterior reversible encephalopathy syndrome (PRES) in a pediatric critical care unit.

  20. Performance analysis of electrical circuits /PANE/

    Science.gov (United States)

    Johnson, K. L.; Steinberg, L. L.

    1968-01-01

    Automated statistical and worst case computer program has been designed to perform dc and ac steady circuit analyses. The program determines the worst case circuit performance by solving circuit equations.

  1. 30 CFR 75.800 - High-voltage circuits; circuit breakers.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 75.800... § 75.800 High-voltage circuits; circuit breakers. High-voltage circuits entering the underground area of any coal mine shall be protected by suitable circuit breakers of adequate interrupting...

  2. Global optimization of digital circuits

    Science.gov (United States)

    Flandera, Richard

    1991-12-01

    This thesis was divided into two tasks. The first task involved developing a parser which could translate a behavioral specification in Very High-Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL) into the format used by an existing digital circuit optimization tool, Boolean Reasoning In Scheme (BORIS). Since this tool is written in Scheme, a dialect of Lisp, the parser was also written in Scheme. The parser was implemented is Artez's modification of Earley's Algorithm. Additionally, a VHDL tokenizer was implemented in Scheme and a portion of the VHDL grammar was converted into the format which the parser uses. The second task was the incorporation of intermediate functions into BORIS. The existing BORIS contains a recursive optimization system that optimizes digital circuits by using circuit outputs as inputs into other circuits. Intermediate functions provide a greater selection of functions to be used as circuits inputs. Using both intermediate functions and output functions, the costs of the circuits in the test set were reduced by 43 percent. This is a 10 percent reduction when compared to the existing recursive optimization system. Incorporating intermediate functions into BORIS required the development of an intermediate-function generator and a set of control methods to keep the computation time from increasing exponentially.

  3. Reverse logistics as a means of organizational instrumentalization of sustainable development

    OpenAIRE

    Avero, Sharinne Allanne de Jesus; Senhoras, Eloi Martins

    2014-01-01

    The reverse, reverse or green logistics is an area of growing importance in business administration as it related to a logic behind forward in the management of physical flows of products and packaging, from the consumption points towards the production sites in order to implement a systemic logic of recycling, reuse and waste materials in their own supply chain. Based on these discussions, the book "Reverse logistics and sustainability" addresses the supply chain from a closed circuit, in...

  4. Spectral Purity Enhancement via Polyphase Multipath Circuits

    OpenAIRE

    Mensink, Eisse; Klumperink, Eric; Nauta, Bram

    2004-01-01

    The central question of this paper is: can we enhance the spectral purity of nonlinear circuits by using polyphase multipath circuits? The basic idea behind polyphase multipath circuits is to split the nonlinear circuits into two or more paths and exploit phase differences between these paths to cancel undesired distortion products. It turns out that it is very well possible to use polyphase multipath circuits to cancel distortion products produced by a nonlinear circuit. Unfortunately, there...

  5. A Comparative Study Of Low Power Consumption Techniques In A VLSI Circuit

    Directory of Open Access Journals (Sweden)

    Tripti Mehta

    2015-07-01

    Full Text Available Power optimization has become an important factor in designing a VLSI circuit. Earlier dynamic power was single largest concern but as transistor size decreases static power dominates the dynamic power. A comparable analysis of different low power, leakage current reduction techniques like sleep, stack, sleepy keeper and reverse body bias with sleep and stack has been done. Based on simulations performed on a XNOR circuit, the reverse body with sleep and stack achieves up to 60% less power consumption as compared to the base case which is better than other conventional techniques. Simulations to estimate power consumption are done on a TANNER EDA tool at 90 nm technology.

  6. Determining Covers in Combinational Circuits

    Directory of Open Access Journals (Sweden)

    Ljubomir Cvetkovic

    2011-05-01

    Full Text Available In this paper we propose a procedure for determining 0- or 1-cover of an arbitrary line in a combinational circuit. When determining a cover we do not need Boolean expression for the line; only the circuit structure is used. Within the proposed procedure we use the tools of the cube theory, in particular, some operations defined on cubes. The procedure can be applied for determining 0- and 1- covers of output lines in programmable logic devices. Basically, this procedure is a method for the analysis of a combinational circuit.

  7. The Maplin electronic circuits handbook

    CERN Document Server

    Tooley, Michael

    2015-01-01

    The Maplin Electronic Circuits Handbook provides pertinent data, formula, explanation, practical guidance, theory and practical guidance in the design, testing, and construction of electronic circuits. This book discusses the developments in electronics technology techniques.Organized into 11 chapters, this book begins with an overview of the common types of passive component. This text then provides the reader with sufficient information to make a correct selection of passive components for use in the circuits. Other chapters consider the various types of the most commonly used semiconductor

  8. Secure integrated circuits and systems

    CERN Document Server

    Verbauwhede, Ingrid MR

    2010-01-01

    On any advanced integrated circuit or 'system-on-chip' there is a need for security. In many applications the actual implementation has become the weakest link in security rather than the algorithms or protocols. The purpose of the book is to give the integrated circuits and systems designer an insight into the basics of security and cryptography from the implementation point of view. As a designer of integrated circuits and systems it is important to know both the state-of-the-art attacks as well as the countermeasures. Optimizing for security is different from optimizations for speed, area,

  9. Quantum reverse hypercontractivity

    Energy Technology Data Exchange (ETDEWEB)

    Cubitt, Toby [Department of Computer Science, University College London, London, United Kingdom and Centre for Quantum Information and Foundations, DAMTP, University of Cambridge, Cambridge (United Kingdom); Kastoryano, Michael [NBIA, Niels Bohr Institute, University of Copenhagen, 2100 Copenhagen (Denmark); Montanaro, Ashley [School of Mathematics, University of Bristol, Bristol (United Kingdom); Temme, Kristan [Institute for Quantum Information and Matter, California Institute of Technology, Pasadena, California 91125 (United States)

    2015-10-15

    We develop reverse versions of hypercontractive inequalities for quantum channels. By generalizing classical techniques, we prove a reverse hypercontractive inequality for tensor products of qubit depolarizing channels. We apply this to obtain a rapid mixing result for depolarizing noise applied to large subspaces and to prove bounds on a quantum generalization of non-interactive correlation distillation.

  10. Design, Analysis, Implementation and Synthesis of 16 bit Reversible ALU by using Xilinx 12.2

    Directory of Open Access Journals (Sweden)

    S.Anusha

    2014-04-01

    Full Text Available In the modern world, Arithmetic Logic Unit (ALU is one of the most crucial components of any system and is used in many appliances like calculators, cell phones, and computers and so on. An arithmetic logic unit is a multi-functional circuit that conditionally performs one of several possible functions on two operands A and B depending on control inputs. This paper proposes the design of programmable reversible logic gate structures, targeted for the ALU implementation and their use in the realization of an efficient reversible ALU. Reversible or information-lossless circuits have applications in digital signal processing, communication, computer graphics and cryptography. This ALU consists of thirteen operations, 5 arithmetic, 4 logical operations and 4 shifting operations. All the modules are being designed using the basic reversible gates. Using reversible logic gates instead of traditional logic AND/OR gates, a reversible ALU whose function is the same as traditional ALU is constructed. Comparing with the number of input bits and the discarded bits of the traditional ALU, the reversible ALU significantly reduce the use and loss of information bits. The proposed reversible 16-bit ALU reduces the information bits use and loss by reusing the logic information bits logically and realizes the goal of lowering power consumption of logic circuits. Programmable reversible logic gates are realized in Verilog by using XILINX 12.2. Key words:

  11. CADAT integrated circuit mask analysis

    Science.gov (United States)

    1981-01-01

    CADAT System Mask Analysis Program (MAPS2) is automated software tool for analyzing integrated-circuit mask design. Included in MAPS2 functions are artwork verification, device identification, nodal analysis, capacitance calculation, and logic equation generation.

  12. Discharge quenching circuit for counters

    International Nuclear Information System (INIS)

    A circuit for quenching discharges in gas-discharge detectors with working voltage of 3-5 kV based on transistors operating in the avalanche mode is described. The quenching circuit consists of a coordinating emitter follower, amplifier-shaper for avalanche key cascade control which changes potential on the counter electrodes and a shaper of discharge quenching duration. The emitter follower is assembled according to a widely used flowsheet with two transistors. The circuit permits to obtain a rectangular quenching pulse with front of 100 ns and an amplitude of up to 3.2 kV at duration of 500 μm-8 ms. Application of the quenching circuit described permits to obtain countering characteristics with the slope less than or equal to 0.02%/V and plateau extent greater than or equal to 300 V

  13. Wireless communications circuits and systems

    CERN Document Server

    Sun, Yichuang

    2004-01-01

    This new book examines integrated circuits, systems and transceivers for wireless and mobile communications. It covers the most recent developments in key RF, IF, analogue, mixed-signal components and single-chip transceivers in CMOS technology.

  14. Extensional Uniformity for Boolean Circuits

    CERN Document Server

    McKenzie, Pierre; Vollmer, Heribert

    2008-01-01

    Imposing an extensional uniformity condition on a non-uniform circuit complexity class C means simply intersecting C with a uniform class L. By contrast, the usual intensional uniformity conditions require that a resource-bounded machine be able to exhibit the circuits in the circuit family defining C. We say that (C,L) has the "Uniformity Duality Property" if the extensionally uniform class C \\cap L can be captured intensionally by means of adding so-called "L-numerical predicates" to the first-order descriptive complexity apparatus describing the connection language of the circuit family defining C. This paper exhibits positive instances and negative instances of the Uniformity Duality Property.

  15. Circuit design on plastic foils

    CERN Document Server

    Raiteri, Daniele; Roermund, Arthur H M

    2015-01-01

    This book illustrates a variety of circuit designs on plastic foils and provides all the information needed to undertake successful designs in large-area electronics.  The authors demonstrate architectural, circuit, layout, and device solutions and explain the reasons and the creative process behind each. Readers will learn how to keep under control large-area technologies and achieve robust, reliable circuit designs that can face the challenges imposed by low-cost low-temperature high-throughput manufacturing.   • Discusses implications of problems associated with large-area electronics and compares them to standard silicon; • Provides the basis for understanding physics and modeling of disordered material; • Includes guidelines to quickly setup the basic CAD tools enabling efficient and reliable designs; • Illustrates practical solutions to cope with hard/soft faults, variability, mismatch, aging and bias stress at architecture, circuit, layout, and device levels.

  16. Practical circuits with Physarum Wires

    OpenAIRE

    Whiting, James G. H.; Mayne, Richard; Moody, Nadine; Costello, Ben de Lacy; Adamatzky, Andrew

    2015-01-01

    Purpose: Protoplasmic tubes of Physarum polycephalum, also know as Physarum Wires (PW), have been previously suggested as novel bio- electronic components. Until recently, practical examples of electronic circuits using PWs have been limited. These PWs have been shown to be self repairing, offering significant advantage over traditional electronic components. This article documents work performed to produce practical circuits using PWs. Method: We have demonstrated through manufacture and tes...

  17. Receiver Gain Modulation Circuit

    Science.gov (United States)

    Jones, Hollis; Racette, Paul; Walker, David; Gu, Dazhen

    2011-01-01

    A receiver gain modulation circuit (RGMC) was developed that modulates the power gain of the output of a radiometer receiver with a test signal. As the radiometer receiver switches between calibration noise references, the test signal is mixed with the calibrated noise and thus produces an ensemble set of measurements from which ensemble statistical analysis can be used to extract statistical information about the test signal. The RGMC is an enabling technology of the ensemble detector. As a key component for achieving ensemble detection and analysis, the RGMC has broad aeronautical and space applications. The RGMC can be used to test and develop new calibration algorithms, for example, to detect gain anomalies, and/or correct for slow drifts that affect climate-quality measurements over an accelerated time scale. A generalized approach to analyzing radiometer system designs yields a mathematical treatment of noise reference measurements in calibration algorithms. By treating the measurements from the different noise references as ensemble samples of the receiver state, i.e. receiver gain, a quantitative description of the non-stationary properties of the underlying receiver fluctuations can be derived. Excellent agreement has been obtained between model calculations and radiometric measurements. The mathematical formulation is equivalent to modulating the gain of a stable receiver with an externally generated signal and is the basis for ensemble detection and analysis (EDA). The concept of generating ensemble data sets using an ensemble detector is similar to the ensemble data sets generated as part of ensemble empirical mode decomposition (EEMD) with exception of a key distinguishing factor. EEMD adds noise to the signal under study whereas EDA mixes the signal with calibrated noise. It is mixing with calibrated noise that permits the measurement of temporal-functional variability of uncertainty in the underlying process. The RGMC permits the evaluation of EDA by

  18. An Algebra of Reversible Computation

    OpenAIRE

    Wang, Yong

    2014-01-01

    We design an axiomatization for reversible computation called reversible ACP (RACP). It has four extendible modules, basic reversible processes algebra (BRPA), algebra of reversible communicating processes (ARCP), recursion and abstraction. Just like process algebra ACP in classical computing, RACP can be treated as an axiomatization foundation for reversible computation.

  19. Performance analysis of reverse recovery minimization effects in DC/DC converter using PSpice

    Energy Technology Data Exchange (ETDEWEB)

    Yahaya, N.Z.; Heng, D.K.; Wen, L.H.; Ng, A. [Petronas Technological Univ., Tronoh, Perak Darul Ridzuan (Malaysia)

    2007-07-01

    Diodes play a significant role in many power electronic such as freewheeling and/or snubber components. In order to reduce the overall power loss of the circuit, many design features are required for the diode. Therefore, fast switching and fast recovery power diode have been developed for use the design. One of the circuit losses is due to reverse recovery current of the power diode, which affects performance of the power systems in terms of switching losses and noises. By reducing the reverse recovery current, the power loss of the power diode will also be reduced. In order to reduce the power loss in the circuit, this paper investigated the minimization of the reverse recovery effects in the power diode. An inductive chopper circuit using a CoolMOS power switch was set up to serve as the platform for investigation. The paper presented how the variations of the parameter's values in the inductive load chopper circuit affected the diode's reverse recovery characteristics. The parameters that were considered in the study included the gate drive, duty ratio, CoolMOS switching frequency, and operating temperature. In order to investigate the impact of each parameter on the reverse recovery effects, a PSpice device simulation model using a power diode was utilized. It was concluded that the switching frequency affected the total energy losses more significantly than factors of temperature, gate resistance and the duty ratio. 8 refs., 4 tabs., 10 figs.

  20. Difference-Equation/Flow-Graph Circuit Analysis

    Science.gov (United States)

    Mcvey, I. M.

    1988-01-01

    Numerical technique enables rapid, approximate analyses of electronic circuits containing linear and nonlinear elements. Practiced in variety of computer languages on large and small computers; for circuits simple enough, programmable hand calculators used. Although some combinations of circuit elements make numerical solutions diverge, enables quick identification of divergence and correction of circuit models to make solutions converge.

  1. Multi-Layer E-Textile Circuits

    Science.gov (United States)

    Dunne, Lucy E.; Bibeau, Kaila; Mulligan, Lucie; Frith, Ashton; Simon, Cory

    2012-01-01

    Stitched e-textile circuits facilitate wearable, flexible, comfortable wearable technology. However, while stitched methods of e-textile circuits are common, multi-layer circuit creation remains a challenge. Here, we present methods of stitched multi-layer circuit creation using accessible tools and techniques.

  2. Tunable circuit for tunable capacitor devices

    Science.gov (United States)

    Rivkina, Tatiana; Ginley, David S.

    2006-09-19

    A tunable circuit (10) for a capacitively tunable capacitor device (12) is provided. The tunable circuit (10) comprises a tunable circuit element (14) and a non-tunable dielectric element (16) coupled to the tunable circuit element (16). A tunable capacitor device (12) and a method for increasing the figure of merit in a tunable capacitor device (12) are also provided.

  3. On the construction of reversible automata for reversible languages

    OpenAIRE

    Lombardy, Sylvain

    2002-01-01

    International audience Reversible languages occur in many different domains. Although the decision for the membership of reversible languages was solved in 1992 by Pin, an effective construction of a reversible automaton for a reversible language was still unknown. We give in this paper a method to compute a reversible automaton from the minimal automaton of a reversible language. With this intention, we use the universal automaton of the language that can be obtained from the minimal auto...

  4. Reversible flowchart languages and the structured reversible program theorem

    DEFF Research Database (Denmark)

    Yokoyama, Tetsuo; Axelsen, Holger Bock; Glück, Robert

    2008-01-01

    Many irreversible computation models have reversible counterparts, but these are poorly understood at present. We introduce reversible flowcharts with an assertion operator and show that any reversible flowchart can be simulated by a structured reversible flowchart using only three control flow o...... justification for low-level machine code for reversible microprocessors as well as high-level block-structured reversible languages. We give examples for both such languages and illustrate them with a lossless encoder for permutations given by Dijkstra....

  5. Comparison between four piezoelectric energy harvesting circuits

    Institute of Scientific and Technical Information of China (English)

    Jinhao QIU; Hao JIANG; Hongli JI; Kongjun ZHU

    2009-01-01

    This paper investigates and compares the efficiencies of four different interfaces for vibration-based energy harvesting systems. Among those four circuits, two circuits adopt the synchronous switching technique, in which the circuit is switched synchronously with the vibration. In this study, a simple source-less trigger circuit used to control the synchronized switch is proposed and two interface circuits of energy harvesting systems are designed based on the trigger circuit. To validate the effectiveness of the proposed circuits, an experimental system was established and the power harvested by those circuits from a vibration beam was measured. Experimental results show that the two new circuits can increase the harvested power by factors 2.6 and 7, respectively, without consuming extra power in the circuits.

  6. Reverse Shoulder Arthroplasty

    Medline Plus

    Full Text Available ... stability and soft tissue envelope. In the early days of reverse arthroplasty, it used to be said ... often we'll drain these patients for a day to try to prevent hematoma formation, especially in ...

  7. Purchasing As Reverse Marketing

    OpenAIRE

    Blenkhorn, D L; Banting, P M

    1989-01-01

    This paper describes a new concept called reverse marketing, which is changing the conventional buyer-seller relationship and has important implications for the traditional role of the industrial marketer.

  8. Reversible Data Hiding Techniques

    Directory of Open Access Journals (Sweden)

    Dhananjay Yadav

    2012-03-01

    Full Text Available Reversible data hiding is a technique that is used to hide data inside an image. The data is hidden in such a way that the exact or original data is not visible. The hidden data can be retrieved as and when required. There are several methods that are used in reversible data hiding techniques like Watermarking, Lossless embedding and encryption. In this paper we present a review of reversible watermarking techniques and show different methods that are used to get reversible data hiding technique with higher embedding capacity and invisible objects. Watermark need not be hidden. Watermarking can be applied to 1. Images, 2. Text, 3. Audio/video, 4. Software.

  9. Reverse Shoulder Arthroplasty

    Medline Plus

    Full Text Available ... dislocations, although it's also reported to have a higher rate of getting the components in not perfect ... about infection and other things. There is a higher rate of infection with reverse replacement, probably because ...

  10. Reverse Shoulder Arthroplasty

    Medline Plus

    Full Text Available ... here in New York to bring you a video of a recent case of reverse shoulder arthroplasty ... helped design the system that's shown in this video, so I receive royalties and therefore have a ...

  11. Reverse Shoulder Arthroplasty

    Medline Plus

    Full Text Available ... a friction bite that if you try to work it around the corner, you can get an ... stability and soft tissue envelope. In the early days of reverse arthroplasty, it used to be said ...

  12. Reverse Shoulder Arthroplasty

    Medline Plus

    Full Text Available ... with an intact cuff, we would consider a traditional shoulder replacement. There are two basic approaches you ... less limited with the superior reverse versus the traditional. And I assume the question means the approach: ...

  13. Reverse Shoulder Arthroplasty

    Medline Plus

    Full Text Available ... the reverse allow patients to play tennis or sports where the arm swings backward. Our experience has ... who simply wants to be stronger or play sports better. But in terms of the patients that ...

  14. Reverse Shoulder Arthroplasty

    Medline Plus

    Full Text Available ... case of reverse shoulder arthroplasty for cuff deficient arthritis. You should be aware that I helped design ... in the last decade for cuff deficient shoulder arthritis in the United States. The indications are a ...

  15. Vasectomy reversal in humans

    OpenAIRE

    Bernie, Aaron M.; Osterberg, E Charles; Stahl, Peter J.; Ramasamy, Ranjith; Goldstein, Marc

    2012-01-01

    Vasectomy is the most common urological procedure in the United States with 18% of men having a vasectomy before age 45. A significant proportion of vasectomized men ultimately request vasectomy reversal, usually due to divorce and/or remarriage. Vasectomy reversal is a commonly practiced but technically demanding microsurgical procedure that restores patency of the male excurrent ductal system in 80–99.5% of cases and enables unassisted pregnancy in 40–80% of couples. The discrepancy between...

  16. PROCESSING REVERSE LOGISTICS INVENTORIES

    OpenAIRE

    Bajor, Ivona; Novačko, Luka; Ogrizović, Dario

    2014-01-01

    Developed logistics systems have organized reverse logistics flows and are continuously analyzing product returns, tending to detect patterns in oscillations of returning products in certain time periods. Inventory management in reverse logistics systems depends on different criteria, regarding goods categories, formed contracts between subjects of supply chains, uncertainty in manufacturer’s quantities of DOA (dead on arrival) products, etc. The developing logistics systems, such as the Croa...

  17. Reverse vending machine update

    Energy Technology Data Exchange (ETDEWEB)

    Rypins, S.; Papke, C.

    1986-02-01

    The document discusses reverse vending machines. Placed outdoors in supermarket parking lots or indoors in the lobby of the grocery market, these hightech machines exchange aluminum cans (or other containers in more specialized machines) for cash, coupons or redeemable receipts. The placement of reverse venders (RV) in or near supermarkets has made recycling more visible and more convenient, although the machines have yet to fully reach industry goals.

  18. Modular construction of mammalian gene circuits using TALE transcriptional repressors.

    Science.gov (United States)

    Li, Yinqing; Jiang, Yun; Chen, He; Liao, Weixi; Li, Zhihua; Weiss, Ron; Xie, Zhen

    2015-03-01

    An important goal of synthetic biology is the rational design and predictable implementation of synthetic gene circuits using standardized and interchangeable parts. However, engineering of complex circuits in mammalian cells is currently limited by the availability of well-characterized and orthogonal transcriptional repressors. Here, we introduce a library of 26 reversible transcription activator-like effector repressors (TALERs) that bind newly designed hybrid promoters and exert transcriptional repression through steric hindrance of key transcriptional initiation elements. We demonstrate that using the input-output transfer curves of our TALERs enables accurate prediction of the behavior of modularly assembled TALER cascade and switch circuits. We also show that TALER switches using feedback regulation exhibit improved accuracy for microRNA-based HeLa cancer cell classification versus HEK293 cells. Our TALER library is a valuable toolkit for modular engineering of synthetic circuits, enabling programmable manipulation of mammalian cells and helping elucidate design principles of coupled transcriptional and microRNA-mediated post-transcriptional regulation.

  19. Progress in understanding mood disorders: optogenetic dissection of neural circuits.

    Science.gov (United States)

    Lammel, S; Tye, K M; Warden, M R

    2014-01-01

    Major depression is characterized by a cluster of symptoms that includes hopelessness, low mood, feelings of worthlessness and inability to experience pleasure. The lifetime prevalence of major depression approaches 20%, yet current treatments are often inadequate both because of associated side effects and because they are ineffective for many people. In basic research, animal models are often used to study depression. Typically, experimental animals are exposed to acute or chronic stress to generate a variety of depression-like symptoms. Despite its clinical importance, very little is known about the cellular and neural circuits that mediate these symptoms. Recent advances in circuit-targeted approaches have provided new opportunities to study the neuropathology of mood disorders such as depression and anxiety. We review recent progress and highlight some studies that have begun tracing a functional neuronal circuit diagram that may prove essential in establishing novel treatment strategies in mood disorders. First, we shed light on the complexity of mesocorticolimbic dopamine (DA) responses to stress by discussing two recent studies reporting that optogenetic activation of midbrain DA neurons can induce or reverse depression-related behaviors. Second, we describe the role of the lateral habenula circuitry in the pathophysiology of depression. Finally, we discuss how the prefrontal cortex controls limbic and neuromodulatory circuits in mood disorders.

  20. Distortion Cancellation via Polyphase Multipath Circuits

    OpenAIRE

    Mensink, Eisse; Klumperink, Eric A.M.; Nauta, Bram

    2004-01-01

    The central question of this paper is: can we enhance the spectral purity of nonlinear circuits with the help of polyphase multipath circuits. Polyphase multipath circuits are circuits with two or more paths that exploit phase differences between the paths to cancel unwanted signals. It turns out that it is very well possible to cancel distortion products produced by a nonlinear circuit. Unfortunately, there are also some spectral components that cannot be cancelled with the polyphase multipa...

  1. Instrumentation and test gear circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Instrumentation and Test Gear Circuits Manual provides diagrams, graphs, tables, and discussions of several types of practical circuits. The practical circuits covered in this book include attenuators, bridges, scope trace doublers, timebases, and digital frequency meters. Chapter 1 discusses the basic instrumentation and test gear principles. Chapter 2 deals with the design of passive attenuators, and Chapter 3 with passive and active filter circuits. The subsequent chapters tackle 'bridge' circuits, analogue and digital metering techniques and circuitry, signal and waveform generation, and p

  2. A New Method for Constructing Circuit Codes

    OpenAIRE

    Byrnes, Kevin M.

    2016-01-01

    Circuit codes are constructed from induced cycles in the graph of the $n$ dimensional hypercube. They are both theoretically and practically important, as circuit codes can be used as error correcting codes. When constructing circuit codes, the length of the cycle determines its accuracy and a parameter called the spread determines how many errors it can detect. We present a new method for constructing a circuit code of spread $k+1$ from a circuit code of spread $k$. This method leads to reco...

  3. Introduction to lethal circuit transformations

    Science.gov (United States)

    Fišer, Petr; Schmidt, Jan

    2015-12-01

    Logic optimization is a process that takes a logic circuit description (Boolean network) as an input and tries to refine it, to reduce its size and/or depth. An ideal optimization process should be able to devise an optimum implementation of a network in a reasonable time, given any circuit structure at the input. However, there are cases where it completely fails to produce even near-optimum solutions. Such cases are typically induced by non-standard circuit structure modifications. Surprisingly enough, such deviated structures are frequently present in standard benchmark sets too. We may only wonder whether it is an intention of the benchmarks creators, or just an unlucky coincidence. Even though synthesis tools should be primarily well suited for practical circuits, there is no guarantee that, e.g., a higher-level synthesis process will not generate such unlucky structures. Here we present examples of circuit transformations that lead to failure of most of state-of-the-art logic synthesis and optimization processes, both academic and commercial, and suggest actions to mitigate the disturbing effects.

  4. Improved Simulation of Stabilizer Circuits

    CERN Document Server

    Aaronson, S; Aaronson, Scott; Gottesman, Daniel

    2004-01-01

    The Gottesman-Knill theorem says that a stabilizer circuit -- that is, a quantum circuit consisting solely of CNOT, Hadamard, and phase gates -- can be simulated efficiently on a classical computer. This paper improves that theorem in several directions. * By removing the need for Gaussian elimination, we make the simulation algorithm much faster at the cost of a factor-2 increase in the number of bits needed to represent a state. We have implemented the improved algorithm in a freely-available program called CHP (CNOT-Hadamard-Phase), which can handle thousands of qubits easily. * We show that the problem of simulating stabilizer circuits is complete for the classical complexity class ParityL, which means that stabilizer circuits are probably not even universal for classical computation. * We give efficient algorithms for computing the inner product between two stabilizer states, putting any n-qubit stabilizer circuit into a "canonical form" that requires at most O(n^2/log n) gates, and other useful tasks. *...

  5. 30 CFR 75.518 - Electric equipment and circuits; overload and short circuit protection.

    Science.gov (United States)

    2010-07-01

    ... Equipment-General § 75.518 Electric equipment and circuits; overload and short circuit protection. Automatic... electric equipment and circuits against short circuit and overloads. Three-phase motors on all electric... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Electric equipment and circuits; overload...

  6. 30 CFR 77.800 - High-voltage circuits; circuit breakers.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 77.800... COAL MINES Surface High-Voltage Distribution § 77.800 High-voltage circuits; circuit breakers. High-voltage circuits supplying power to portable or mobile equipment shall be protected by suitable...

  7. 49 CFR 236.5 - Design of control circuits on closed circuit principle.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Design of control circuits on closed circuit..., AND APPLIANCES Rules and Instructions: All Systems General § 236.5 Design of control circuits on closed circuit principle. All control circuits the functioning of which affects safety of train...

  8. Circuit model of Rimfire switch

    International Nuclear Information System (INIS)

    A cascade gaps circuit model for Rimfire switch has been developed. The circuit model includes all stray capacitances and spark channel on-state conduction characteristics. It can not only describe the behavior of Rimfire switch, but also allow analysis of the time varying voltage and current at each part of the switch, describing the internal characters of the switch. PSpice was used to implement the cascade gaps circuit model and simulate a 700 kV Rimfire switch. The simulation shows that, the voltage of the whole switch will be higher than 700 kV when the laser triggered section has broken down but all cascade gaps keep dielectric, and the voltage of all gaps attenuates with high frequency oscillation. (authors)

  9. Additive Manufacturing of Hybrid Circuits

    Science.gov (United States)

    Sarobol, Pylin; Cook, Adam; Clem, Paul G.; Keicher, David; Hirschfeld, Deidre; Hall, Aaron C.; Bell, Nelson S.

    2016-07-01

    There is a rising interest in developing functional electronics using additively manufactured components. Considerations in materials selection and pathways to forming hybrid circuits and devices must demonstrate useful electronic function; must enable integration; and must complement the complex shape, low cost, high volume, and high functionality of structural but generally electronically passive additively manufactured components. This article reviews several emerging technologies being used in industry and research/development to provide integration advantages of fabricating multilayer hybrid circuits or devices. First, we review a maskless, noncontact, direct write (DW) technology that excels in the deposition of metallic colloid inks for electrical interconnects. Second, we review a complementary technology, aerosol deposition (AD), which excels in the deposition of metallic and ceramic powder as consolidated, thick conformal coatings and is additionally patternable through masking. Finally, we show examples of hybrid circuits/devices integrated beyond 2-D planes, using combinations of DW or AD processes and conventional, established processes.

  10. Vertically Integrated Circuits at Fermilab

    Energy Technology Data Exchange (ETDEWEB)

    Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom; /Fermilab

    2009-01-01

    The exploration of the vertically integrated circuits, also commonly known as 3D-IC technology, for applications in radiation detection started at Fermilab in 2006. This paper examines the opportunities that vertical integration offers by looking at various 3D designs that have been completed by Fermilab. The emphasis is on opportunities that are presented by through silicon vias (TSV), wafer and circuit thinning and finally fusion bonding techniques to replace conventional bump bonding. Early work by Fermilab has led to an international consortium for the development of 3D-IC circuits for High Energy Physics. The consortium has submitted over 25 different designs for the Fermilab organized MPW run organized for the first time.

  11. Nuclear sensor signal processing circuit

    Science.gov (United States)

    Kallenbach, Gene A.; Noda, Frank T.; Mitchell, Dean J.; Etzkin, Joshua L.

    2007-02-20

    An apparatus and method are disclosed for a compact and temperature-insensitive nuclear sensor that can be calibrated with a non-hazardous radioactive sample. The nuclear sensor includes a gamma ray sensor that generates tail pulses from radioactive samples. An analog conditioning circuit conditions the tail-pulse signals from the gamma ray sensor, and a tail-pulse simulator circuit generates a plurality of simulated tail-pulse signals. A computer system processes the tail pulses from the gamma ray sensor and the simulated tail pulses from the tail-pulse simulator circuit. The nuclear sensor is calibrated under the control of the computer. The offset is adjusted using the simulated tail pulses. Since the offset is set to zero or near zero, the sensor gain can be adjusted with a non-hazardous radioactive source such as, for example, naturally occurring radiation and potassium chloride.

  12. Design automation for integrated circuits

    Science.gov (United States)

    Newell, S. B.; de Geus, A. J.; Rohrer, R. A.

    1983-04-01

    Consideration is given to the development status of the use of computers in automated integrated circuit design methods, which promise the minimization of both design time and design error incidence. Integrated circuit design encompasses two major tasks: error specification, in which the goal is a logic diagram that accurately represents the desired electronic function, and physical specification, in which the goal is an exact description of the physical locations of all circuit elements and their interconnections on the chip. Design automation not only saves money by reducing design and fabrication time, but also helps the community of systems and logic designers to work more innovatively. Attention is given to established design automation methodologies, programmable logic arrays, and design shortcuts.

  13. Design of a Ternary Reversible/Quantum Adder using Genetic Algorithm

    Directory of Open Access Journals (Sweden)

    Vitaly G. Deibuk

    2015-08-01

    Full Text Available —Typical methods of quantum/reversible synthesis are based on using the binary character of quantum computing. However, multi-valued logic is a promising choice for future computer technologies, given a set of advantages when comparing to binary circuits. In this work, we have developed a genetic algorithm-based synthesis of ternary reversible circuits using Muthukrishnan-Stroud gates. The method for chromosomes coding that we present, as well as a judicious choice of algorithm parameters, allowed obtaining circuits for half-adder and full adder which are better than other published methods in terms of cost, delay times and amount of input ancillary bits. A structure of the circuits is analyzed in details, based on their decomposition.

  14. Embedded systems circuits and programming

    CERN Document Server

    Sanchez, Julio

    2012-01-01

    During the development of an engineered product, developers often need to create an embedded system--a prototype--that demonstrates the operation/function of the device and proves its viability. Offering practical tools for the development and prototyping phases, Embedded Systems Circuits and Programming provides a tutorial on microcontroller programming and the basics of embedded design. The book focuses on several development tools and resources: Standard and off-the-shelf components, such as input/output devices, integrated circuits, motors, and programmable microcontrollers The implementat

  15. Circuit modeling for electromagnetic compatibility

    CERN Document Server

    Darney, Ian B

    2013-01-01

    Very simply, electromagnetic interference (EMI) costs money, reduces profits, and generally wreaks havoc for circuit designers in all industries. This book shows how the analytic tools of circuit theory can be used to simulate the coupling of interference into, and out of, any signal link in the system being reviewed. The technique is simple, systematic and accurate. It enables the design of any equipment to be tailored to meet EMC requirements. Every electronic system consists of a number of functional modules interconnected by signal links and power supply lines. Electromagnetic interference

  16. Simplified design of filter circuits

    CERN Document Server

    Lenk, John

    1999-01-01

    Simplified Design of Filter Circuits, the eighth book in this popular series, is a step-by-step guide to designing filters using off-the-shelf ICs. The book starts with the basic operating principles of filters and common applications, then moves on to describe how to design circuits by using and modifying chips available on the market today. Lenk's emphasis is on practical, simplified approaches to solving design problems.Contains practical designs using off-the-shelf ICsStraightforward, no-nonsense approachHighly illustrated with manufacturer's data sheets

  17. Fermionic models with superconducting circuits

    Energy Technology Data Exchange (ETDEWEB)

    Las Heras, Urtzi; Garcia-Alvarez, Laura; Mezzacapo, Antonio; Lamata, Lucas [University of the Basque Country UPV/EHU, Department of Physical Chemistry, Bilbao (Spain); Solano, Enrique [University of the Basque Country UPV/EHU, Department of Physical Chemistry, Bilbao (Spain); IKERBASQUE, Basque Foundation for Science, Bilbao (Spain)

    2015-12-01

    We propose a method for the efficient quantum simulation of fermionic systems with superconducting circuits. It consists in the suitable use of Jordan-Wigner mapping, Trotter decomposition, and multiqubit gates, be with the use of a quantum bus or direct capacitive couplings. We apply our method to the paradigmatic cases of 1D and 2D Fermi-Hubbard models, involving couplings with nearest and next-nearest neighbours. Furthermore, we propose an optimal architecture for this model and discuss the benchmarking of the simulations in realistic circuit quantum electrodynamics setups. (orig.)

  18. Short-circuit impedance measurement

    DEFF Research Database (Denmark)

    Pedersen, Knud Ole Helgesen; Nielsen, Arne Hejde; Poulsen, Niels Kjølstad

    2003-01-01

    Methods for estimating the short-circuit impedance in the power grid are investigated for various voltage levels and situations. The short-circuit impedance is measured, preferably from naturally occurring load changes in the grid, and it is shown that such a measurement system faces different...... kinds of problems at different locations in the grid. This means that the best measurement methodology changes depending on the location in the grid. Three typical examples with different measurement problems at 400 kV, 132 kV and 400 V voltage level are discussed....

  19. Circuit, Thermal and Cost Characteristics of Impulse Magnetizing Circuits

    Institute of Scientific and Technical Information of China (English)

    2000-01-01

    This paper describes the development of circuit, thermal and cost model for a capacitor discharge impulse megnetizer and compares simulations to measurements from an actual system. We used a cost structure consisting of five major subsystems for cost modeling. Especially, we estimated the potential for cost reductions impulse magnetizer as a function of time using the learning curve.

  20. Efficient Design of Reversible Code Converters Using Quantum Dot Cellular Automata

    Directory of Open Access Journals (Sweden)

    Javeed Iqbal Reshi

    2016-06-01

    Full Text Available Quantum dot Cellular Automata (QCA is an attractive field of nano-technology which offers the various advantages over existing CMOS technology for the development of logic circuits. Contradictory to other technologies which use the voltage levels for logic representation, QCA utilizes the polarization of electrons for representing the binary states in the QCA Cell. Conventional logic circuits are not energy efficient as they are not reversible in nature and hence lead to energy dissipation. Thus there is a need of a serious effort that will provide an efficient paradigm for designing the circuits which does not dissipation the energy and hence will preserve the information. This paper offers the efficient design of various QCA reversible code converters which prove to be efficient in term of cell Area, cell count, total area, latency and complexity. All the proposed reversible code converter designs were simulated and their credibility was successfully verified with the QCADesigner tool

  1. Relaxation Based Electrical Simulation for VLSI Circuits

    Directory of Open Access Journals (Sweden)

    S. Rajkumar

    2012-06-01

    Full Text Available Electrical circuit simulation was one of the first CAD tools developed for IC design. The conventional circuit simulators like SPICE and ASTAP were designed initially for the cost effective analysis of circuits containing a few hundred transistors or less. A number of approaches have been used to improve the performances of congenital circuit simulators for the analysis of large circuits. Thereafter relaxation methods was proposed to provide more accurate waveforms than standard circuit simulators with up to two orders of magnitude speed improvement for large circuits. In this paper we have tried to highlights recently used waveform and point relaxation techniques for simulation of VLSI circuits. We also propose a simple parallelization technique and experimentally demonstrate that we can solve digital circuits with tens of million transistors in a few hours.

  2. Dynamically Tunable Memory in Two-Component Gene Circuit

    Energy Technology Data Exchange (ETDEWEB)

    Ghim, C; Almaas, E

    2008-09-05

    Cell has the potential to remember the environmental conditions for many (10{sup 7}) generations but stochastic fluctuations set a fundamental limit on the stability of this memory. Here we explicitly take the binding-unbinding of macromolecules into account to propose a novel rationale for the protein-protein interaction in cell physiology. Based on the first-exit time and the corresponding deterministic characterization of various genetic circuits, we show that the reversible binding dynamics may stabilize non-genetically inherited cell states, providing a practical strategy for designing robust epigenetic memory.

  3. Efficient Design of Reversible Code Converters Using Quantum Dot Cellular Automata

    OpenAIRE

    Javeed Iqbal Reshi; M. Tariq Banday

    2016-01-01

    Quantum dot Cellular Automata (QCA) is an attractive field of nano-technology which offers the various advantages over existing CMOS technology for the development of logic circuits. Contradictory to other technologies which use the voltage levels for logic representation, QCA utilizes the polarization of electrons for representing the binary states in the QCA Cell. Conventional logic circuits are not energy efficient as they are not reversible in nature and hence lead to energy dissipation. ...

  4. Reversed extension flow

    DEFF Research Database (Denmark)

    Nielsen, Jens Kromann; Rasmussen, Henrik K.

    2008-01-01

    Afilament stretching rheometer (FSR) was used for measuring the start-up of uni-axial elongational flow followed by reversed bi-axial flow, both with a constant elongational rate. A narrow molecular mass distribution linear polystyrene with a molecular weight of 145 kg / mole wis subjected...... to the start-up of elongation for three Hencky strain units and subsequently the reversed flow. The integral molecular stress function formulation within the 'interchain pressure' concept agrees with the experiments. In the experiments the Hencky strain at which the str~ss becomes zero (the recovery strain......) in the reversed flow has been identified. The recovery strain is found to increase with elongational rate, and has a maximum value of approximately 1.45. The Doi Edwards model using any stretch evolution equation is not able to predict the correct level of the recovery strain....

  5. Clocking Scheme for Switched-Capacitor Circuits

    DEFF Research Database (Denmark)

    Steensgaard-Madsen, Jesper

    1998-01-01

    A novel clocking scheme for switched-capacitor (SC) circuits is presented. It can enhance the understanding of SC circuits and the errors caused by MOSFET (MOS) switches. Charge errors, and techniques to make SC circuits less sensitive to them are discussed.......A novel clocking scheme for switched-capacitor (SC) circuits is presented. It can enhance the understanding of SC circuits and the errors caused by MOSFET (MOS) switches. Charge errors, and techniques to make SC circuits less sensitive to them are discussed....

  6. Digital circuit boards mach 1 GHz

    CERN Document Server

    Morrison, Ralph

    2012-01-01

    A unique, practical approach to the design of high-speed digital circuit boards The demand for ever-faster digital circuit designs is beginning to render the circuit theory used by engineers ineffective. Digital Circuit Boards presents an alternative to the circuit theory approach, emphasizing energy flow rather than just signal interconnection to explain logic circuit behavior. The book shows how treating design in terms of transmission lines will ensure that the logic will function, addressing both storage and movement of electrical energy on these lines. It cove

  7. Separating OR, SUM, and XOR Circuits

    OpenAIRE

    Find, Magnus; Göös, Mika; Järvisalo, Matti; Kaski, Petteri; Koivisto, Mikko; Korhonen, Janne H.

    2013-01-01

    Given a boolean n by n matrix A we consider arithmetic circuits for computing the transformation x->Ax over different semirings. Namely, we study three circuit models: monotone OR-circuits, monotone SUM-circuits (addition of non-negative integers), and non-monotone XOR-circuits (addition modulo 2). Our focus is on \\emph{separating} these models in terms of their circuit complexities. We give three results towards this goal: (1) We prove a direct sum type theorem on the monotone complexity of ...

  8. Advanced circuit simulation using Multisim workbench

    CERN Document Server

    Báez-López, David; Cervantes-Villagómez, Ofelia Delfina

    2012-01-01

    Multisim is now the de facto standard for circuit simulation. It is a SPICE-based circuit simulator which combines analog, discrete-time, and mixed-mode circuits. In addition, it is the only simulator which incorporates microcontroller simulation in the same environment. It also includes a tool for printed circuit board design.Advanced Circuit Simulation Using Multisim Workbench is a companion book to Circuit Analysis Using Multisim, published by Morgan & Claypool in 2011. This new book covers advanced analyses and the creation of models and subcircuits. It also includes coverage of transmissi

  9. A circuit mechanism for neurodegeneration.

    Science.gov (United States)

    Roselli, Francesco; Caroni, Pico

    2012-10-12

    How deficiency in SMN1 selectively affects motoneurons in spinal muscular atrophy is poorly understood. Here, Imlach et al. and Lotti et al. show that aberrant splicing of Stasimon in cholinergic sensory neurons and interneurons leads to motoneuron degeneration, suggesting that altered circuit function may underlie the disorder.

  10. Circuit design for RF transceivers

    CERN Document Server

    Leenaerts, Domine; Vaucher, Cicero S

    2007-01-01

    Second edition of this successful 2001 RF Circuit Design book, has been updated, latest technology reviews have been added as well as several actual case studies. Due to the authors being active in industry as well as academia, this should prove to be an essential guide on RF Transceiver Design for students and engineers.

  11. Integrated Circuit Stellar Magnitude Simulator

    Science.gov (United States)

    Blackburn, James A.

    1978-01-01

    Describes an electronic circuit which can be used to demonstrate the stellar magnitude scale. Six rectangular light-emitting diodes with independently adjustable duty cycles represent stars of magnitudes 1 through 6. Experimentally verifies the logarithmic response of the eye. (Author/GA)

  12. Unbalanced Neuronal Circuits in Addiction

    OpenAIRE

    Volkow, Nora D; Wang, Gen-Jack; Tomasi, Dardo; Baler, Ruben D.

    2013-01-01

    Through sequential waves of drug-induced neurochemical stimulation, addiction co-opts the brain's neuronal circuits that mediate reward, motivation, , to behavioral inflexibility and a severe disruption of self-control and compulsive drug intake. Brain imaging technologies have allowed neuroscientists to map out the neural landscape of addiction in the human brain and to understand how drugs modify it.

  13. Highly modular bow-tie gene circuits with programmable dynamic behaviour.

    Science.gov (United States)

    Prochazka, Laura; Angelici, Bartolomeo; Haefliger, Benjamin; Benenson, Yaakov

    2014-01-01

    Synthetic gene circuits often require extensive mutual optimization of their components for successful operation, while modular and programmable design platforms are rare. A possible solution lies in the 'bow-tie' architecture, which stipulates a focal component-a 'knot'-uncoupling circuits' inputs and outputs, simplifying component swapping, and introducing additional layer of control. Here we construct, in cultured human cells, synthetic bow-tie circuits that transduce microRNA inputs into protein outputs with independently programmable logical and dynamic behaviour. The latter is adjusted via two different knot configurations: a transcriptional activator causing the outputs to track input changes reversibly, and a recombinase-based cascade, converting transient inputs into permanent actuation. We characterize the circuits in HEK293 cells, confirming their modularity and scalability, and validate them using endogenous microRNA inputs in additional cell lines. This platform can be used for biotechnological and biomedical applications in vitro, in vivo and potentially in human therapy. PMID:25311543

  14. Radiation controlling reversible window

    Energy Technology Data Exchange (ETDEWEB)

    Gell, H.A. Jr.

    1980-01-01

    A coated glass glazing system is presented including a transparent glass substrate having one surface coated with a radiation absorptive film which is overcoated with a radiation reflective film by a technique which renders the radiation reflective film radiation absorptive at the surface contracting the radiating absorptive film. The coated glass system is used as glazing for storm windows which are adapted to be reversible so that the radiation reflective surface may be exposed to the outside of the dwelling during the warm seasons to prevent excessive solar radiation from entering a dwelling and reversed during cold seasons to absorb solar radiation and utilize it to aid in keeping the dwelling interior warm.

  15. Low voltage logic circuits exploiting gate level dynamic body biasing in 28 nm UTBB FD-SOI

    Science.gov (United States)

    Taco, Ramiro; Levi, Itamar; Lanuzza, Marco; Fish, Alexander

    2016-03-01

    In this paper, the recently proposed gate level body bias (GLBB) technique is evaluated for low voltage logic design in state-of-the-art 28 nm ultra-thin body and box (UTBB) fully-depleted silicon-on-insulator (FD-SOI) technology. The inherent benefits of the low-granularity body-bias control, provided by the GLBB approach, are emphasized by the efficiency of forward body bias (FBB) in the FD-SOI technology. In addition, the possibility to integrate PMOS and NMOS devices into a single common well configuration allows significant area reduction, as compared to an equivalent triple well implementation. Some arithmetic circuits were designed using GLBB approach and compared to their conventional CMOS and DTMOS counterparts under different running conditions at low voltage regime. Simulation results shows that, for 300 mV of supply voltage, a 4 × 4-bit GLBB Baugh Wooley multiplier allows performance improvement of about 30% and area reduction of about 35%, while maintaining low energy consumption as compared to the conventional CMOS ⧹ DTMOS solutions. Performance and energy benefits are maintained over a wide range of process-voltage-temperature (PVT) variations.

  16. Enhancement of Time-Reversal Subwavelength Wireless Transmission Using Pulse Shaping

    CERN Document Server

    Ding, Shuai; Zou, Lianfeng; Wang, Bingzhong; Caloz, Christophe

    2014-01-01

    A novel time-reversal subwavelength transmission technique, based on pulse shaping circuits (PSCs), is proposed. Compared to previously reported approaches, this technique removes the need for complex or electrically large electromagnetic structures by generating channel diversity via pulse shaping instead of angular spectrum transformation. Moreover, the pulse shaping circuits (PSCs) are based on Radio Analog Signal Processing (R-ASP), and therefore do not suffer from the well-known issues of digital signal processing in ultrafast regimes. The proposed PSC time-reversal systems is mathematically shown to offer high channel discrimination under appropriate PSC design conditions, and is experimentally demonstrated for the case of two receivers.

  17. Characterization of hereditarily reversible posets

    OpenAIRE

    Kukieła, Michał

    2013-01-01

    A poset P is called reversible if every order preserving bijective self map of P is an order automorphism. P is called hereditarily reversible if every subposet of P is reversible. We give a complete characterization of hereditarily reversible posets in terms of forbidden subsets. A similar result is stated also for preordered sets. As a corollary we extend the list of known examples of hereditarily reversible topological spaces.

  18. The voltage-current relationship and equivalent circuit implementation of parallel flux-controlled memristive circuits

    Institute of Scientific and Technical Information of China (English)

    Bao Bo-Cheng; Feng Fei; Dong Wei; Pan Sai-Hu

    2013-01-01

    A flux-controlled memristor characterized by smooth cubic nonlinearity is taken as an example,upon which the voltage-current relationships (VCRs) between two parallel memristive circuits-a parallel memristor and capacitor circuit (the parallel MC circuit),and a parallel memristor and inductor circuit (the parallel ML circuit)-are investigated.The results indicate that the VCR between these two parallel memristive circuits is closely related to the circuit parameters,and the frequency and amplitude of the sinusoidal voltage stimulus.An equivalent circuit model of the memristor is built,upon which the circuit simulations and experimental measurements of both the parallel MC circuit and the parallel ML circuit are performed,and the results verify the theoretical analysis results.

  19. Reverse Coherent Information

    OpenAIRE

    García-Patrón, Raúl; Pirandola, Stefano; Lloyd, Seth; Shapiro, Jeffrey H.

    2008-01-01

    In this letter we define a family of entanglement distribution protocols assisted by feedback classical communication that gives an operational interpretation to reverse coherent information, i.e., the symmetric counterpart of the well known coherent information. This lead to the definition of a new entanglement distribution capacity that exceeds the unassisted capacity for some interesting channels.

  20. Reverse Coherent Information

    Science.gov (United States)

    García-Patrón, Raúl; Pirandola, Stefano; Lloyd, Seth; Shapiro, Jeffrey H.

    2009-05-01

    In this Letter we define a family of entanglement distribution protocols assisted by feedback classical communication that gives an operational interpretation to reverse coherent information, i.e., the symmetric counterpart of the well-known coherent information. This leads to the definition of a new entanglement distribution capacity that exceeds the unassisted capacity for some interesting channels.

  1. Reversible focal splenial lesions

    Energy Technology Data Exchange (ETDEWEB)

    Gallucci, Massimo; Limbucci, Nicola [University of L' Aquila, Department of Radiology, S. Salvatore Hospital, L' Aquila (Italy); Paonessa, Amalia [Loreto Nuovo Hospital, Department of Neuroradiology, Napoli (Italy); Caranci, Ferdinando [Federico II University, Department of Neurological Sciences, Napoli (Italy)

    2007-07-15

    Reversible focal lesions in the splenium of the corpus callosum (SCC) have recently been reported.They are circumscribed and located in the median aspect of the SCC. On MRI, they are hyperintense on T2-W and iso-hypointense on T1-W sequences, with no contrast enhancement. On DWI, SCC lesions are hyperintense with low ADC values, reflecting restricted diffusion due to cytotoxic edema. The common element is the disappearance of imaging abnormalities with time, including normalization of DWI. Clinical improvement is often reported. The most established and frequent causes of reversible focal lesions of the SCC are viral encephalitis, antiepileptic drug toxicity/withdrawal and hypoglycemic encephalopathy. Many other causes have been reported, including traumatic axonal injury. The similar clinical and imaging features suggest a common mechanism induced by different pathological events leading to the same results. Edema and diffusion restriction in focal reversible lesions of the SCC have been attributed to excitotoxic mechanisms that can result from different mechanisms; no unifying relationship has been found to explain all the pathologies associated with SCC lesions. In our opinion, the similar imaging, clinical and prognostic aspects of these lesions depend on a high vulnerability of the SCC to excitotoxic edema and are less dependent on the underlying pathology. In this review, the relevant literature concerning reversible focal lesions in the SCC is analyzed and hypotheses about their pathogenesis are proposed. (orig.)

  2. Time reversal communication system

    Science.gov (United States)

    Candy, James V.; Meyer, Alan W.

    2008-12-02

    A system of transmitting a signal through a channel medium comprises digitizing the signal, time-reversing the digitized signal, and transmitting the signal through the channel medium. The channel medium may be air, earth, water, tissue, metal, and/or non-metal.

  3. On reverse hypercontractivity

    CERN Document Server

    Mossel, Elchanan; Sen, Arnab

    2011-01-01

    We study the notion of reverse hypercontractivity. We show that reverse hypercontractive inequalities are implied by standard hypercontractive inequalities as well as by the modified log-Sobolev inequality. Our proof is based on a new comparison lemma for Dirichlet forms and an extension of the Strook-Varapolos inequality. A consequence of our analysis is that {\\em all} simple operators $L=Id-\\E$ as well as their tensors satisfy uniform reverse hypercontractive inequalities. That is, for all $qreverse hypercontractive inequalities established here imply new mixing and isoperimetric results for short random walks in product spaces, for certain card-shufflings, for Glauber dynamics in high-temperat...

  4. Reversing insect pollinator decline

    OpenAIRE

    Potts, Simon; Wentworth, Jonathan

    2013-01-01

    Pollination by insects enables the reproduction of flowering plants and is critical to UK agriculture.1 Insect pollinators have declined globally, with implications for food security and wild habitats. This POSTnote summarises the causes for the recent trends, gaps in knowledge and possible strategies for reversing pollinator decline.

  5. Reverse Shoulder Arthroplasty

    Medline Plus

    Full Text Available Reverse Shoulder Arthroplasty Zimmer, Inc. New York City, New York March 17, 2010 Welcome to this OR Live presentation, brought to you by Zimmer. Hi. I'm ... my partner, Brad Parsons. We're here in New York to bring you a video of a ...

  6. An Approach To Design A Controlled Multi-logic Function Generator By Using COG Reversible Logic Gates

    Directory of Open Access Journals (Sweden)

    Shefali Mamataj

    2016-07-01

    Full Text Available In today‟s world everyday a new technology which is faster, smaller and more complex than its predecessor is being developed. Reversible computation is a research area characterized by having only computational models that is both forward and backward deterministic. Reversible Logic is gaining significant consideration as the potential logic design style for implementation in modern nanotechnology and quantum computing with minimal impact on physical entropy. It has become very popular over the last few years since reversible logic circuits dramatically reduce energy loss. It consumes less power by recovering bit loss from its unique input-output mapping. This paper represents the implementation of conventional Boolean functions for basic digital gate by using COG reversible gate. This paper also represents a multi logic function generator circuit for generating multiple logical function simultaneously using COG gates. And also represents a controlled multi logic function generator circuit for generating any specified output in a controlled way.

  7. Driver circuit for solid state light sources

    Energy Technology Data Exchange (ETDEWEB)

    Palmer, Fred; Denvir, Kerry; Allen, Steven

    2016-02-16

    A driver circuit for a light source including one or more solid state light sources, a luminaire including the same, and a method of so driving the solid state light sources are provided. The driver circuit includes a rectifier circuit that receives an alternating current (AC) input voltage and provides a rectified AC voltage. The driver circuit also includes a switching converter circuit coupled to the light source. The switching converter circuit provides a direct current (DC) output to the light source in response to the rectified AC voltage. The driver circuit also includes a mixing circuit, coupled to the light source, to switch current through at least one solid state light source of the light source in response to each of a plurality of consecutive half-waves of the rectified AC voltage.

  8. Plug-in integrated/hybrid circuit

    Science.gov (United States)

    Stringer, E. J.

    1974-01-01

    Hybrid circuitry can be installed into standard round bayonet connectors, to eliminate wiring from connector to circuit. Circuits can be connected directly into either section of connector pair, eliminating need for hard wiring to that section.

  9. Brain-machine interface circuits and systems

    CERN Document Server

    Zjajo, Amir

    2016-01-01

    This book provides a complete overview of significant design challenges in respect to circuit miniaturization and power reduction of the neural recording system, along with circuit topologies, architecture trends, and (post-silicon) circuit optimization algorithms. The introduced novel circuits for signal conditioning, quantization, and classification, as well as system configurations focus on optimized power-per-area performance, from the spatial resolution (i.e. number of channels), feasible wireless data bandwidth and information quality to the delivered power of implantable system.

  10. Black hole qubit correspondence from quantum circuits

    CERN Document Server

    Prudencio, Thiago; Silva, Edilberto O; Belich, Humberto

    2014-01-01

    We propose a black hole qubit correspondence (BHQC) from quantum circuits, taking into account the BHQC formulations of wrapped brane qubits. With base on BHQC, we implement the corresponding gate operations to realize any given quantum circuit. In particular, we implement cases of the generation of Bell states, quantum teleportation and GHZ states circuits. Finally, we give an interpretation of the BHQC from quantum circuits with base on the BHQC classification of entanglement classes.

  11. 49 CFR 236.721 - Circuit, control.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, control. 236.721 Section 236.721..., MAINTENANCE, AND REPAIR OF SIGNAL AND TRAIN CONTROL SYSTEMS, DEVICES, AND APPLIANCES Definitions § 236.721 Circuit, control. An electrical circuit between a source of electric energy and a device which it operates....

  12. Equivalence Checking of Hierarchical Combinational Circuits

    DEFF Research Database (Denmark)

    Williams, Poul Frederick; Hulgaard, Henrik; Andersen, Henrik Reif

    1999-01-01

    This paper presents a method for verifying that two hierarchical combinational circuits implement the same Boolean functions. The key new feature of the method is its ability to exploit the modularity of circuits to reuse results obtained from one part of the circuits in other parts. We demonstrate...

  13. An eigenvalue study of the MLC circuit

    DEFF Research Database (Denmark)

    Lindberg, Erik; Murali, K.

    1998-01-01

    The MLC (Murali-Lakshmanan-Chua) circuit is the simplest non-autonomous chaotic circuit. Insight in the behaviour of the circuit is obtained by means of a study of the eigenvalues of the linearized Jacobian of the nonlinear differential equations. The trajectories of the eigenvalues as functions...

  14. An Equivalent Circuit for Landau Damping

    DEFF Research Database (Denmark)

    Pécseli, Hans

    1976-01-01

    An equivalent circuit simulating the effect of Landau damping in a stable plasma‐loaded parallel‐plate capacitor is presented. The circuit contains a double infinity of LC components. The transition from stable to unstable plasmas is simulated by the introduction of active elements into the circuit....

  15. 49 CFR 236.731 - Controller, circuit.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Controller, circuit. 236.731 Section 236.731 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Controller, circuit. A device for opening and closing electric circuits....

  16. A Current-mode Logarithmic Function Circuit

    OpenAIRE

    Osama Oglah Faris; Muhammad Taher Abuelma'atti

    2004-01-01

    A new current-mode analog circuit configuration that implements the function ln (x/y) is proposed. The circuit uses bipolar transistors and resistors and is suitable for integration. In the proposed circuit the ratio (x/y) can be larger or smaller than unity. Simulation results are included.

  17. 47 CFR 32.2232 - Circuit equipment.

    Science.gov (United States)

    2010-10-01

    ... 47 Telecommunication 2 2010-10-01 2010-10-01 false Circuit equipment. 32.2232 Section 32.2232... FOR TELECOMMUNICATIONS COMPANIES Instructions for Balance Sheet Accounts § 32.2232 Circuit equipment... which is used for the amplification, modulation, regeneration, circuit patching, balancing or control...

  18. 49 CFR 236.726 - Circuit, track.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, track. 236.726 Section 236.726 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, track. An electrical circuit of which the rails of the track form a part....

  19. 30 CFR 56.6407 - Circuit testing.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Circuit testing. 56.6407 Section 56.6407... Blasting § 56.6407 Circuit testing. A blasting galvanometer or other instrument designed for testing blasting circuits shall be used to test each of the following: (a) Continuity of each electric detonator...

  20. 30 CFR 57.6407 - Circuit testing.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Circuit testing. 57.6407 Section 57.6407... Blasting-Surface and Underground § 57.6407 Circuit testing. A blasting galvanometer or other instrument designed for testing blasting circuits shall be used to test the following: (a) In surface operations—...

  1. 30 CFR 75.1323 - Blasting circuits.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Blasting circuits. 75.1323 Section 75.1323... MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Explosives and Blasting § 75.1323 Blasting circuits. (a) Blasting circuits shall be protected from sources of stray electric current. (b) Detonators made...

  2. New Logic Circuit with DC Parametric Excitation

    Science.gov (United States)

    Sugahara, Masanori; Kaneda, Hisayoshi

    1982-12-01

    It is shown that dc parametric excitation is possible in a circuit named JUDO, which is composed of two resistively-connected Josephson junctions. Simulation study proves that the circuit has large gain and properties suitable for the construction of small, high-speed logic circuits.

  3. A reversible optical to microwave quantum interface

    CERN Document Server

    Barzanjeh, Sh; Milburn, G J; Tombesi, P; Vitali, D

    2011-01-01

    Quantum technology, like many mature classical technologies, will ultimately integrate distinct modules to achieve a function that transcends the capability of any one of them. We describe a reversible quantum interface between an optical and a microwave photon using a hybrid device based on the common interaction of microwave and optical fields with a nano-mechanical resonator in a superconducting circuit, which is one of the major challenges in the field. The scheme provides a path for generating a traveling microwave field strongly entangled with an optical mode, thus bridging the gap between quantum optical and solid state implementations of quantum information. This is an effective source of (bright) two-mode squeezing with an optical idler (signal) and a microwave signal (idler) and as such enables a continuous variable teleportation protocol.

  4. Integrated circuits for multimedia applications

    DEFF Research Database (Denmark)

    Vandi, Luca

    2007-01-01

    , and it is applied to a broad-band dual-loop receiver architecture in order to boost the linearity performances of the stage. A simplified noise- and linearity analysis of the circuit is derived, and a comparison is provided with a more traditional dual-loop topology (a broad-band stage based on shunt......This work presents several key aspects in the design of RF integrated circuits for portable multimedia devices. One chapter is dedicated to the application of negative-feedback topologies to receiver frontends. A novel feedback technique suitable for common multiplier-based mixers is described......-series feedback), showing a difference in compression point in the order of 10dBm for the same power consumption. The same principle is also applied to a more conventional narrow-band stage in which a single loop is employed in order to enhance noise performances. Noise analysis shows sensible improvements...

  5. Handbook of microwave integrated circuits

    Science.gov (United States)

    Hoffmann, Reinmut K.

    The design and operation of ICs for use in the 0.5-20-GHz range are described in an introductory and reference work for industrial engineers. Chapters are devoted to an overview of microwave IC (MIC) technology, general stripline characteristics, microwave transmission line (MTL) parameters for microstrips with isotropic dielectric substrates, higher-order modes on a microstrip, the effects of metallic enclosure on MTL transmission parameters, losses in microstrips, the measurement of MTL parameters, and MTLs on anisotropic dielectric substrates. Consideration is given to coupled microstrips on dielectric substrates, microstrip discontinuities, radiation from microstrip circuits, MTL variations, coplanar MTLs, slotlines, and spurious modes in MTL circuits. Diagrams, drawings, graphs, and a glossary of symbols are provided.

  6. Delay locked loop integrated circuit.

    Energy Technology Data Exchange (ETDEWEB)

    Brocato, Robert Wesley

    2007-10-01

    This report gives a description of the development of a Delay Locked Loop (DLL) integrated circuit (IC). The DLL was developed and tested as a stand-alone IC test chip to be integrated into a larger application specific integrated circuit (ASIC), the Quadrature Digital Waveform Synthesizer (QDWS). The purpose of the DLL is to provide a digitally programmable delay to enable synchronization between an internal system clock and external peripherals with unknown clock skew. The DLL was designed and fabricated in the IBM 8RF process, a 0.13 {micro}m CMOS process. It was designed to operate with a 300MHz clock and has been tested up to 500MHz.

  7. 30 CFR 75.601-1 - Short circuit protection; ratings and settings of circuit breakers.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Short circuit protection; ratings and settings of circuit breakers. 75.601-1 Section 75.601-1 Mineral Resources MINE SAFETY AND HEALTH... Trailing Cables § 75.601-1 Short circuit protection; ratings and settings of circuit breakers....

  8. A Library-Based Synthesis Methodology for Reversible Logic

    CERN Document Server

    Saeedi, Mehdi; Zamani, Morteza Saheb; 10.1016/j.mejo.2010.02.002

    2010-01-01

    In this paper, a library-based synthesis methodology for reversible circuits is proposed where a reversible specification is considered as a permutation comprising a set of cycles. To this end, a pre-synthesis optimization step is introduced to construct a reversible specification from an irreversible function. In addition, a cycle-based representation model is presented to be used as an intermediate format in the proposed synthesis methodology. The selected intermediate format serves as a focal point for all potential representation models. In order to synthesize a given function, a library containing seven building blocks is used where each building block is a cycle of length less than 6. To synthesize large cycles, we also propose a decomposition algorithm which produces all possible minimal and inequivalent factorizations for a given cycle of length greater than 5. All decompositions contain the maximum number of disjoint cycles. The generated decompositions are used in conjunction with a novel cycle assi...

  9. Synthetic circuits, devices and modules

    OpenAIRE

    Zhang, Hong; Jiang, Taijiao

    2010-01-01

    The aim of synthetic biology is to design artificial biological systems for novel applications. From an engineering perspective, construction of biological systems of defined functionality in a hierarchical way is fundamental to this emerging field. Here, we highlight some current advances on design of several basic building blocks in synthetic biology including the artificial gene control elements, synthetic circuits and their assemblies into devices and modules. Such engineered basic buildi...

  10. ?Immunetworks?, intersecting circuits and dynamics

    OpenAIRE

    Demongeot, Jacques; Elena, Adrien; Noual, Mathilde; Sené, Sylvain; Thuderoz, Florence

    2011-01-01

    Abstract This paper proposes a study of biological regulatory networks based on a multi-level strategy. Given a network, the first structural level of this strategy consists in analysing the architecture of the network interactions in order to describe it. The second dynamical level consists in relating the patterns found in the architecture to the possible dynamical behaviours of the network. It is known that circuits are the patterns that play the most important part in the dynam...

  11. Microcontroller based Integrated Circuit Tester

    OpenAIRE

    Yousif Taha Yousif Elamin; Abdelrasoul Jabar Alzubaidi

    2015-01-01

    The digital integrated circuit (IC) tester is implemented by using the ATmega32 microcontroller . The microcontroller processes the inputs and outputs and displays the results on a Liquid Crystal Display (LCD). The basic function of the digital IC tester is to test a digital IC for correct logical functioning as described in the truth table and/or function table. The designed model can test digital ICs having 14 pins. Since it is programmable, any number of ICs can be tested . Thi...

  12. Monolithic readout circuits for RHIC

    Energy Technology Data Exchange (ETDEWEB)

    O`Connor, P.; Harder, J. [Brookhaven National Laboratory, Upton, NY (United States)

    1991-12-31

    Several CMOS ASICs have been developed for a proposed RHIC experiment. This paper discusses why ASIC implementation was chosen for certain functions, circuit specifications and the design techniques used to meet them, and results of simulations and early prototypes. By working closely together from an early stage in the planning process, in-house ASIC designers and detector and data acquisition experimenters can achieve optimal use of this important technology.

  13. CIRCUIT SWITCHING VERSUS PACKET SWITCHING

    OpenAIRE

    Sneps-Sneppe, Manfred

    2015-01-01

    Communication specialists around the world are facing the same problem: shifting from circuit switching (CS) to packet switching (CS). Communication service providers are favoring “All-over-IP” technologies hoping to boost their profits by providing multimedia services. The main stakeholder in this field of the paradigm shift is the industry itself: packet switching hardware manufacturers are going to earn billions of dollars and thus pay engineers and journalists many millions for the promot...

  14. An Interpreter for Quantum Circuits

    OpenAIRE

    Lucas Helms; Ruben Gamboa

    2013-01-01

    This paper describes an ACL2 interpreter for "netlists" describing quantum circuits. Several quantum gates are implemented, including the Hadamard gate H, which rotates vectors by 45 degrees, necessitating the use of irrational numbers, at least at the logical level. Quantum measurement presents an especially difficult challenge, because it requires precise comparisons of irrational numbers and the use of random numbers. This paper does not address computation with irrational numbers or the g...

  15. Circuit analysis of quantum measurement

    OpenAIRE

    Kurotani, Yuji; Ueda, Masahito

    2006-01-01

    We develop a circuit theory that enables us to analyze quantum measurements on a two-level system and on a continuous-variable system on an equal footing. As a measurement scheme applicable to both systems, we discuss a swapping state measurement which exchanges quantum states between the system and the measuring apparatus before the apparatus meter is read out. This swapping state measurement has an advantage in gravitational-wave detection over contractive state measurement in that the post...

  16. Quantum Circuits with Mixed States

    CERN Document Server

    Aharonov, D; Nisan, N; Aharonov, Dorit; Kitaev, Alexei; Nisan, Noam

    1998-01-01

    We define the model of quantum circuits with density matrices, where non-unitary gates are allowed. Measurements in the middle of the computation, noise and decoherence are implemented in a natural way in this model, which is shown to be equivalent in computational power to standard quantum circuits. The main result in this paper is a solution for the subroutine problem: The general function that a quantum circuit outputs is a probabilistic function, but using pure state language, such a function can not be used as a black box in other computations. We give a natural definition of using general subroutines, and analyze their computational power. We suggest convenient metrics for quantum computing with mixed states. For density matrices we analyze the so called ``trace metric'', and using this metric, we define and discuss the ``diamond metric'' on superoperators. These metrics enable a formal discussion of errors in the computation. Using a ``causality'' lemma for density matrices, we also prove a simple lowe...

  17. Ultra-low power integrated circuit design circuits, systems, and applications

    CERN Document Server

    Li, Dongmei; Wang, Zhihua

    2014-01-01

    This book describes the design of CMOS circuits for ultra-low power consumption including analog, radio frequency (RF), and digital signal processing circuits (DSP). The book addresses issues from circuit and system design to production design, and applies the ultra-low power circuits described to systems for digital hearing aids and capsule endoscope devices. Provides a valuable introduction to ultra-low power circuit design, aimed at practicing design engineers; Describes all key building blocks of ultra-low power circuits, from a systems perspective; Applies circuits and systems described to real product examples such as hearing aids and capsule endoscopes.

  18. Testing of Diode-Clamping in an Inductive Pulsed Plasma Thruster Circuit

    Science.gov (United States)

    Toftul, Alexandra; Polzin, Kurt A.; Martin, Adam K.; Hudgins, Jerry L.

    2014-01-01

    Testing of a 5.5 kV silicon (Si) diode and 5.8 kV prototype silicon carbide (SiC) diode in an inductive pulsed plasma thruster (IPPT) circuit was performed to obtain a comparison of the resulting circuit recapture efficiency,eta(sub r), defined as the percentage of the initial charge energy remaining on the capacitor bank after the diode interrupts the current. The diode was placed in a pulsed circuit in series with a silicon controlled rectifier (SCR) switch, and the voltages across different components and current waveforms were collected over a range of capacitor charge voltages. Reverse recovery parameters, including turn-off time and peak reverse recovery current, were measured and capacitor voltage waveforms were used to determine the recapture efficiency for each case. The Si fast recovery diode in the circuit was shown to yield a recapture efficiency of up to 20% for the conditions tested, while the SiC diode further increased recapture efficiency to nearly 30%. The data presented show that fast recovery diodes operate on a timescale that permits them to clamp the discharge quickly after the first half cycle, supporting the idea that diode-clamping in IPPT circuit reduces energy dissipation that occurs after the first half cycle

  19. Reversible quantum cellular automata

    CERN Document Server

    Schumacher, B

    2004-01-01

    We define quantum cellular automata as infinite quantum lattice systems with discrete time dynamics, such that the time step commutes with lattice translations and has strictly finite propagation speed. In contrast to earlier definitions this allows us to give an explicit characterization of all local rules generating such automata. The same local rules also generate the global time step for automata with periodic boundary conditions. Our main structure theorem asserts that any quantum cellular automaton is structurally reversible, i.e., that it can be obtained by applying two blockwise unitary operations in a generalized Margolus partitioning scheme. This implies that, in contrast to the classical case, the inverse of a nearest neighbor quantum cellular automaton is again a nearest neighbor automaton. We present several construction methods for quantum cellular automata, based on unitaries commuting with their translates, on the quantization of (arbitrary) reversible classical cellular automata, on quantum c...

  20. Reversible Multi-Head Finite Automata Characterize Reversible Logarithmic Space

    DEFF Research Database (Denmark)

    Axelsen, Holger Bock

    2012-01-01

    Deterministic and non-deterministic multi-head finite automata are known to characterize the deterministic and non- deterministic logarithmic space complexity classes, respectively. Recently, Morita introduced reversible multi-head finite automata (RMFAs), and posed the question of whether RMFAs...... characterize reversible logarithmic space as well. Here, we resolve the question affirmatively, by exhibiting a clean RMFA simulation of logarithmic space reversible Turing machines. Indirectly, this also proves that reversible and deterministic multi-head finite automata recognize the same languages....

  1. CMOS circuit design, layout and simulation

    CERN Document Server

    Baker, R Jacob

    2010-01-01

    The Third Edition of CMOS Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and much more. Regardless of one's integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples.

  2. Design of analog circuits through symbolic analysis

    CERN Document Server

    Fakhfakh, Mourad; V Fernández, Francisco

    2012-01-01

    Symbolic analyzers have the potential to offer knowledge to sophomores as well as practitioners of analog circuit design. Actually, they are an essential complement to numerical simulators, since they provide insight into circuit behavior which numerical analyzers do not provide. Symbolic analysis of electronic circuits addresses the generation of symbolic expressions for the parameters that describe the performance of linear and nonlinear circuits in three domains: DC, AC and time; some or all the circuit parameters can be kept as symbols. Due to the fact that these expressions remain va

  3. Reversible watermarking for images

    Science.gov (United States)

    van Leest, Arno J.; van der Veen, Michiel; Bruekers, Fons

    2004-06-01

    Reversible watermarking is a technique for embedding data in a digital host signal in such a manner that the original host signal can be restored in a bit-exact manner in the restoration process. In this paper, we present a general framework for reversible watermarking in multi-media signals. A mapping function, which is in general neither injective nor surjective, is used to map the input signal to a perceptually equivalent output signal. The resulting unused sample values of the output signal are used to encode additional (watermark) information and restoration data. At the 2003 SPIE conference, examples of this technique applied to digital audio were presented. In this paper we concentrate on color and gray-scale images. A particular challenge in this context is not only the optimization of rate-distortion, but also the measure of perceptual quality (i.e. the distortion). In literature distortion is often expressed in terms of PSNR, making comparison among different techniques relatively straightforward. We show that our general framework for reversible watermarking applies to digital images and that results can be presented in terms of PSNR rate-distortions. However, the framework allows for more subtle signal manipulations that are not easily expressed in terms of PSNR distortion. These changes involve manipulations of contrast and/or saturation.

  4. Method and Circuit for Injecting a Precise Amount of Charge onto a Circuit Node

    Science.gov (United States)

    Hancock, Bruce R. (Inventor)

    2016-01-01

    A method and circuit for injecting charge into a circuit node, comprising (a) resetting a capacitor's voltage through a first transistor; (b) after the resetting, pre-charging the capacitor through the first transistor; and (c) after the pre-charging, further charging the capacitor through a second transistor, wherein the second transistor is connected between the capacitor and a circuit node, and the further charging draws charge through the second transistor from the circuit node, thereby injecting charge into the circuit node.

  5. Unified model and reverse recovery nonlinearities of the driven diode resonator.

    Science.gov (United States)

    de Moraes, Renato Mariz; Anlage, Steven M

    2003-08-01

    We study the origins of period doubling and chaos in the driven series resistor-inductor-varactor diode (RLD) nonlinear resonant circuit. We find that resonators driven at frequencies much higher than the diode reverse recovery rate do not show period doubling. Models of chaos based on the nonlinear capacitance of the varactor diode display a reverse-recovery-like effect, and this effect strongly resembles reverse recovery of real diodes. We find for the first time that in addition to the known dependence of the reverse recovery time on past current maxima, there are also important nonlinear dependencies on pulse frequency, duty cycle, and dc voltage bias. Similar nonlinearities are present in the nonlinear capacitance models of these diodes. We conclude that a history-dependent and nonlinear reverse-recovery time is an essential ingredient for chaotic behavior of this circuit, and demonstrate for the first time that all major competing models have this effect, either explicitly or implicitly. Besides unifying the two major models of RLD chaos, our work reveals that the nonlinearities of the reverse-recovery time must be included for a complete understanding of period doubling and chaos in this circuit.

  6. Design of superconductor frame compression circuits

    Science.gov (United States)

    Sakurai, T.; Miyaho, N.; Miyahara, K.

    2007-10-01

    We proposed previously a novel interface circuit which was used between semiconductor data-input circuits and superconductor high-speed routers. The frame length of data packets is compressed in the interface circuit. Our proposed interface circuit has rather narrow timing margin. The problem was that our control circuit of the interface circuit could allow only very small timing delay. In this paper we propose a modified control circuit. We have improved the timing margin of the control circuit using RS-flip flop (RS-FF), where two shift registers and one control circuit are driven by clock pulses provided from a master clock-pulse generator. In this circuit, we have assumed fixed frame length packets. Our final target of master clock frequency is 100 GHz which will be realized with the device-parameter set of future advanced process. As the first step of realizing this target value, we aimed at 40 GHz clock operation with the conventional device-parameter set of NECs standard I process. The behavior of the whole frame compression circuit was simulated by a computer, and it was confirmed that it operated properly up to the master clock frequency of 23 GHz.

  7. Fractional linear systems and electrical circuits

    CERN Document Server

    Kaczorek, Tadeusz

    2015-01-01

    This monograph covers some selected problems of positive and fractional electrical circuits composed of resistors, coils, capacitors and voltage (current) sources. The book consists of 8 chapters, 4 appendices and a list of references. Chapter 1 is devoted to fractional standard and positive continuous-time and discrete-time linear systems without and with delays. In chapter 2 the standard and positive fractional electrical circuits are considered and the fractional electrical circuits in transient states are analyzed.  Descriptor linear electrical circuits and their properties are investigated in chapter 3,  while chapter 4 is devoted to the stability of fractional standard and positive linear electrical circuits. The reachability, observability and reconstructability of fractional positive electrical circuits and their decoupling zeros are analyzed in chapter 5. The fractional linear electrical circuits with feedbacks are considered in chapter 6. In chapter 7 solutions of minimum energy control for standa...

  8. Model Order Reduction for Electronic Circuits:

    DEFF Research Database (Denmark)

    Hjorth, Poul G.; Shontz, Suzanne

    Electronic circuits are ubiquitous; they are used in numerous industries including: the semiconductor, communication, robotics, auto, and music industries (among many others). As products become more and more complicated, their electronic circuits also grow in size and complexity. This increased...... the need for circuit simulators to evaluate potential designs before fabrication, as integrated circuit prototypes are expensive to build, and troubleshooting is difficult. In this report, we focus on the simulation of printed circuit boards (PCB’s) and interconnects both of which are of great importance...... in the semiconductor industry. Circuit simulation proceeds by using Maxwell’s equations to create a mathematical model of the circuit. The boundary element method is then used to discretize the equations, and the variational form of the equations are then solved on the graph network....

  9. Auto-programmable impulse neural circuits

    Science.gov (United States)

    Watula, D.; Meador, J.

    1990-01-01

    Impulse neural networks use pulse trains to communicate neuron activation levels. Impulse neural circuits emulate natural neurons at a more detailed level than that typically employed by contemporary neural network implementation methods. An impulse neural circuit which realizes short term memory dynamics is presented. The operation of that circuit is then characterized in terms of pulse frequency modulated signals. Both fixed and programmable synapse circuits for realizing long term memory are also described. The implementation of a simple and useful unsupervised learning law is then presented. The implementation of a differential Hebbian learning rule for a specific mean-frequency signal interpretation is shown to have a straightforward implementation using digital combinational logic with a variation of a previously developed programmable synapse circuit. This circuit is expected to be exploited for simple and straightforward implementation of future auto-adaptive neural circuits.

  10. Graphene radio frequency receiver integrated circuit.

    Science.gov (United States)

    Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A; Haensch, Wilfried

    2014-01-01

    Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

  11. Improved environmental impact with diversion of perfusion bypass circuit to municipal solid waste.

    Science.gov (United States)

    Debois, William; Prata, Jessica; Elmer, Barbara; Liu, Junli; Fominyam, Edward; Salemi, Arash

    2013-06-01

    The project goal was to reduce waste disposal volume, costs and minimize the negative impact that regulated waste treatment and disposal has on the environment. This was accomplished by diverting bypass circuits from the traditional regulated medical waste (RMW) to clear bag waste, or municipal solid waste (MSW). To qualify circuits to be disposed of through MSW stream, the circuits needed to be void of any free-flowing blood and be "responsibly clear." Traditionally the perfusion bypass circuit was emptied through the cardioplegia pump starting shortly after decannulation and heparin reversal. Up to 2000 mL of additional prime solution was added until the bypass circuit was rinsed clear. Three hundred sixty of 400 procedures (90%) had a complete circuit rinse and successful diversion to MSW. An additional 240 mL of processed cell salvage blood was available for transfusion. No additional time was spent in the operating room as a result of this procedure. Based on our procedure case volume and circuit weight of 15 pounds, almost 15,000 pounds (7.5 tons) of trash will be diverted from RMW. This technique represents another way for perfusionists to participate in sustainability efforts. Diverting the bypass circuit to clear bag waste results in a reduced environmental impact and annual cost savings. The treatment of RMW is associated with various environmental implications. MSW, or clear bag waste, on the other hand can now be disposed of in waste-to-energy facilities. This process not only releases a significantly less amount of carbon dioxide into the environment, but also helps generate renewable energy. Therefore, the bypass circuit diversion pilot project effectively demonstrates decreases in the carbon footprint of our organization and overall operating costs. PMID:23930387

  12. ABOUT TRACK CIRCUIT CALCULATION METHOD DEPENDENT ON FERROMAGNET PROPERTIES IN CONDITIONS OF TRACTION CURRENT NOISE INFLUENCE

    Directory of Open Access Journals (Sweden)

    A. Yu. Zhuravlev

    2016-04-01

    Full Text Available Purpose. The work is intended to investigate the electromagnetic processes in impedance bond in order to improve noise immunity of track circuits (TC for safe railway operation. Methodology. To achieve this purpose the methods of scientific analysis, mathematical modelling, experimental study, a large-scale simulation were used. Findings. The work examined the interference affecting the normal performance of track circuits. To a large extent, part of track circuit damages account for failures in track circuit equipment. Track circuit equipment is connected directly to the track line susceptible to traction current interference, which causes changes in its electrical characteristics and electromagnetic properties. Normal operability, performance of the main operating modes of the track circuit is determined by previous calculation of its performance and compilation of regulatory tables. The classical method for determination of track circuit parameters was analysed. The classical calculation method assumes representation of individual sections of the electrical track circuit using the quadripole network with known coefficients, usually in the A-form. Determining the coefficients of linear element circuit creates no metrological or mathematical difficulties. However, in circuits containing nonlinear ferromagnets (FM, obtaining the coefficients on the entire induction change range in the cores is quite a difficult task because the classical methods of idling (I and short circuit (SC are not acceptable. This leads to complicated methods for determining both the module and the arguments of quadripole network coefficients. Instead of the classical method, the work proposed the method for calculating the track circuit dependent on nonlinear properties of ferromagnets. Originality. The article examines a new approach to the calculation of TC taking into account the losses in ferromagnets (FM, without determination of equivalent circuit quadripole

  13. Reverse Engineering of RFID devices

    OpenAIRE

    Bokslag, Wouter

    2015-01-01

    This paper discusses the relevance and potential impact of both RFID and reverse engineering of RFID technology, followed by a discussion of common protocols and internals of RFID technology. The focus of the paper is on providing an overview of the different approaches to reverse engineering RFID technology and possible countermeasures that could limit the potential of such reverse engineering attempts.

  14. Development, integration and testing of automated triggering circuit for hybrid DC circuit breaker

    International Nuclear Information System (INIS)

    A novel concept of Hybrid DC circuit breaker having combination of mechanical switch and static switch provides arc-less current commutation into the dump resistor during quench in superconducting magnet operation. The triggering of mechanical and static switches in Hybrid DC breaker can be automatized which can effectively reduce the overall current commutation time of hybrid DC circuit breaker and make the operation independent of opening time of mechanical switch. With this view, a dedicated control circuit (auto-triggering circuit) has been developed which can decide the timing and pulse duration for mechanical switch as well as static switch from the operating parameters. This circuit has been tested with dummy parameters and thereafter integrated with the actual test set up of hybrid DC circuit breaker. This paper deals with the conceptual design of the auto-triggering circuit, its control logic and operation. The test results of Hybrid DC circuit breaker using this circuit have also been discussed. (author)

  15. Pragmatic circuits signals and filters

    CERN Document Server

    Eccles, William

    2006-01-01

    Pragmatic Circuits: Signals and Filters is built around the processing of signals. Topics include spectra, a short introduction to the Fourier series, design of filters, and the properties of the Fourier transform. The focus is on signals rather than power. But the treatment is still pragmatic. For example, the author accepts the work of Butterworth and uses his results to design filters in a fairly methodical fashion. This third of three volumes finishes with a look at spectra by showing how to get a spectrum even if a signal is not periodic. The Fourier transform provides a way of dealing wi

  16. Circuit considerations for repetitive railguns

    Energy Technology Data Exchange (ETDEWEB)

    Honih, E.M.

    1986-01-01

    Railgun electromagnetic launchers have significant military and scientific potential. They provide direct conversion of electrical energy to projectile kinetic energy, and they offer the hope of achieving projectile velocities greatly exceeding the limits of conventional guns. With over 10 km/sec already demonstrated, railguns are attracting attention for tactical and strategic weapons systems and for scientific equation-of-state research. The full utilization of railguns will require significant improvements in every aspect of system design - projectile, barrel, and power source - to achieve operation on a large scale. This paper will review fundamental aspects of railguns, with emphasis on circuit considerations and repetitive operation.

  17. Advanced Microwave Circuits and Systems

    DEFF Research Database (Denmark)

    is usually optimized to have high output power, high efficiency, optimum heat dissipation and high gain. The third part of this book presents power amplifier designs through a series of design examples. Designs undertaken include a switching mode power amplifier, Doherty power amplifier, and flexible power...... such as voltage-controlled oscillators and electron devices for millimeter wave and submillimeter wave applications. This part also covers studies of integrated buffer circuits. Passive components are indispensable elements of any electronic system. The increasing demands to miniaturization and cost effectiveness...

  18. HF radio systems and circuits

    CERN Document Server

    Sabin, William

    1998-01-01

    A comprehensive reference for the design of high frequency communications systems and equipment. This revised edition is loaded with practical data, much of which cannot be found in other reference books. Its approach to the subject follows the needs of an engineer from system definition and performance requirements down to the individual circuit elements that make up radio transmitters and receivers. The accompanying disk contains updated software on filters, matching networks and receiver analysis. SciTech Publishing also provides many other products related to Communication Systems Design.

  19. Radio frequency integrated circuit design

    CERN Document Server

    Rogers, John W M

    2010-01-01

    This newly revised and expanded edition of the 2003 Artech House classic, Radio Frequency Integrated Circuit Design, serves as an up-to-date, practical reference for complete RFIC know-how. The second edition includes numerous updates, including greater coverage of CMOS PA design, RFIC design with on-chip components, and more worked examples with simulation results. By emphasizing working designs, this book practically transports you into the authors' own RFIC lab so you can fully understand the function of each design detailed in this book. Among the RFIC designs examined are RF integrated LC

  20. Circuit for Driving Piezoelectric Transducers

    Science.gov (United States)

    Randall, David P.; Chapsky, Jacob

    2009-01-01

    The figure schematically depicts an oscillator circuit for driving a piezoelectric transducer to excite vibrations in a mechanical structure. The circuit was designed and built to satisfy application-specific requirements to drive a selected one of 16 such transducers at a regulated amplitude and frequency chosen to optimize the amount of work performed by the transducer and to compensate for both (1) temporal variations of the resonance frequency and damping time of each transducer and (2) initially unknown differences among the resonance frequencies and damping times of different transducers. In other words, the circuit is designed to adjust itself to optimize the performance of whichever transducer is selected at any given time. The basic design concept may be adaptable to other applications that involve the use of piezoelectric transducers in ultrasonic cleaners and other apparatuses in which high-frequency mechanical drives are utilized. This circuit includes three resistor-capacitor networks that, together with the selected piezoelectric transducer, constitute a band-pass filter having a peak response at a frequency of about 2 kHz, which is approximately the resonance frequency of the piezoelectric transducers. Gain for generating oscillations is provided by a power hybrid operational amplifier (U1). A junction field-effect transistor (Q1) in combination with a resistor (R4) is used as a voltage-variable resistor to control the magnitude of the oscillation. The voltage-variable resistor is part of a feedback control loop: Part of the output of the oscillator is rectified and filtered for use as a slow negative feedback to the gate of Q1 to keep the output amplitude constant. The response of this control loop is much slower than 2 kHz and, therefore, does not introduce significant distortion of the oscillator output, which is a fairly clean sine wave. The positive AC feedback needed to sustain oscillations is derived from sampling the current through the

  1. Model reduction for circuit simulation

    CERN Document Server

    Hinze, Michael; Maten, E Jan W Ter

    2011-01-01

    Simulation based on mathematical models plays a major role in computer aided design of integrated circuits (ICs). Decreasing structure sizes, increasing packing densities and driving frequencies require the use of refined mathematical models, and to take into account secondary, parasitic effects. This leads to very high dimensional problems which nowadays require simulation times too large for the short time-to-market demands in industry. Modern Model Order Reduction (MOR) techniques present a way out of this dilemma in providing surrogate models which keep the main characteristics of the devi

  2. Reversible brazing process

    Science.gov (United States)

    Pierce, Jim D.; Stephens, John J.; Walker, Charles A.

    1999-01-01

    A method of reversibly brazing surfaces together. An interface is affixed to each surface. The interfaces can be affixed by processes such as mechanical joining, welding, or brazing. The two interfaces are then brazed together using a brazing process that does not defeat the surface to interface joint. Interfaces of materials such as Ni-200 can be affixed to metallic surfaces by welding or by brazing with a first braze alloy. The Ni-200 interfaces can then be brazed together using a second braze alloy. The second braze alloy can be chosen so that it minimally alters the properties of the interfaces to allow multiple braze, heat and disassemble, rebraze cycles.

  3. 18k Channels single photon counting readout circuit for hybrid pixel detector

    International Nuclear Information System (INIS)

    We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm×20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96×192 pixels with 100 μm×100 μm pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 μW/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 μV/e− and the equivalent noise charge is 168 e− rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

  4. 18k Channels single photon counting readout circuit for hybrid pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Maj, P., E-mail: piotr.maj@agh.edu.pl [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Grybos, P.; Szczygiel, R.; Zoladz, M. [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Sakumura, T.; Tsuji, Y. [X-ray Analysis Division, Rigaku Corporation, Matsubara, Akishima, Tokyo 196-8666 (Japan)

    2013-01-01

    We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm Multiplication-Sign 20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96 Multiplication-Sign 192 pixels with 100 {mu}m Multiplication-Sign 100 {mu}m pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 {mu}W/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 {mu}V/e{sup -} and the equivalent noise charge is 168 e{sup -} rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

  5. 18k Channels single photon counting readout circuit for hybrid pixel detector

    Science.gov (United States)

    Maj, P.; Grybos, P.; Szczygiel, R.; Zoladz, M.; Sakumura, T.; Tsuji, Y.

    2013-01-01

    We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm×20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96×192 pixels with 100 μm×100 μm pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 μW/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 μV/e- and the equivalent noise charge is 168 e- rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

  6. Enhancement of Time Reversal Sub-wavelength Wireless Transmission Using Pulse Shaping Technique (submit/1139227)

    CERN Document Server

    Ding, Shuai; Zang, Rui; Zou, Lianfeng; Wang, Bing-Zhong; Caloz, Christophe

    2014-01-01

    A novel time-reversal subwavelength transmission technique, based on pulse shaping circuits (PSCs), is proposed. This technique removes the need for complex or electrically large electromagnetic structures by generating channel diversity via pulse shaping instead of angular spectrum transformation. It is shown that, compared to our previous time-reversal system based on chirped delay lines, the PSC approach offers greater flexibility and larger possible numbers of channels, i.e. ultimately higher transmission throughput. The PSC based time-reversal system is also demonstrated experimentally.

  7. Fundamentals of reversible flowchart languages

    DEFF Research Database (Denmark)

    Yokoyama, Tetsuo; Axelsen, Holger Bock; Glück, Robert

    2016-01-01

    . Although reversible flowcharts are superficially similar to classical flowcharts, there are crucial differences: atomic steps are limited to locally invertible operations, and join points require an explicit orthogonalizing conditional expression. Despite these constraints, we show that reversible......Abstract This paper presents the fundamentals of reversible flowcharts. They are intended to naturally represent the structure and control flow of reversible (imperative) programming languages in a simple computation model, in the same way classical flowcharts do for conventional languages......, structured reversible flowcharts are as expressive as unstructured ones, as shown by a reversible version of the classic Structured Program Theorem. We illustrate how reversible flowcharts can be concretized with two example programming languages, complete with syntax and semantics: a low-level unstructured...

  8. A Singularity in the Kirchhoff's Circuit Equations

    CERN Document Server

    Harsha, N R Sree

    2016-01-01

    Students often have difficulty in understanding qualitatively the behaviour of simple electric circuits. In particular, as different studies have shown, they find multiple batteries connected in multiple loops difficult to analyse. In a recent paper [Phys. Educ. 50 568 (2015)], we showed such an electric circuit, which consists of ideal batteries connected in parallel, that couldn't be solved by the existing circuit analysis methods. In this paper, we shall introduce a new mathematical method of solving simple electric circuits from the solutions of more general circuits and show that the currents, in this particular circuit, take the indeterminate 0/0 form. We shall also present some of the implications of teaching the method. We believe that the description presented in this paper should help the instructors in teaching the behaviour of multiple batteries connected in parallel.

  9. Physical synthesis of quantum circuits using templates

    Science.gov (United States)

    Mirkhani, Zahra; Mohammadzadeh, Naser

    2016-06-01

    Similar to traditional CMOS circuits, quantum circuit design flow is divided into two main processes: logic synthesis and physical design. Addressing the limitations imposed on optimization of the quantum circuit metrics because of no information sharing between logic synthesis and physical design processes, the concept of "physical synthesis" was introduced for quantum circuit flow, and a few techniques were proposed for it. Following that concept, in this paper a new approach for physical synthesis inspired by template matching idea in quantum logic synthesis is proposed to improve the latency of quantum circuits. Experiments show that by using template matching as a physical synthesis approach, the latency of quantum circuits can be improved by more than 23.55 % on average.

  10. Physical synthesis of quantum circuits using templates

    Science.gov (United States)

    Mirkhani, Zahra; Mohammadzadeh, Naser

    2016-10-01

    Similar to traditional CMOS circuits, quantum circuit design flow is divided into two main processes: logic synthesis and physical design. Addressing the limitations imposed on optimization of the quantum circuit metrics because of no information sharing between logic synthesis and physical design processes, the concept of " physical synthesis" was introduced for quantum circuit flow, and a few techniques were proposed for it. Following that concept, in this paper a new approach for physical synthesis inspired by template matching idea in quantum logic synthesis is proposed to improve the latency of quantum circuits. Experiments show that by using template matching as a physical synthesis approach, the latency of quantum circuits can be improved by more than 23.55 % on average.

  11. Worst Asymmetrical Short-Circuit Current

    DEFF Research Database (Denmark)

    Arana Aristi, Iván; Holmstrøm, O; Grastrup, L;

    2010-01-01

    In a typical power plant, the production scenario and the short-circuit time were found for the worst asymmetrical short-circuit current. Then, a sensitivity analysis on the missing generator values was realized in order to minimize the uncertainty of the results. Afterward the worst asymmetrical...... short-circuit current was analyzed in order to compare the results with the allowable DC current component based in the IEC. Finally the normal operating condition for the power plant was modeled....

  12. A Survey of Memristive Threshold Logic Circuits

    OpenAIRE

    Maan, Akshay Kumar; Jayadevi, Deepthi Anirudhan; James, Alex Pappachen

    2016-01-01

    In this paper, we review the different memristive threshold logic (MTL) circuits that are inspired from the synaptic action of flow of neurotransmitters in the biological brain. Brain like generalisation ability and area minimisation of these threshold logic circuits aim towards crossing the Moores law boundaries at device, circuits and systems levels.Fast switching memory, signal processing, control systems, programmable logic, image processing, reconfigurable computing, and pattern recognit...

  13. Monitoring transients in low inductance circuits

    Science.gov (United States)

    Guilford, R.P.; Rosborough, J.R.

    1985-10-21

    The instant invention relates to methods of and apparatus for monitoring transients in low inductance circuits and to a probe utilized to practice said method and apparatus. More particularly, the instant invention relates to methods of and apparatus for monitoring low inductance circuits, wherein the low inductance circuits include a pair of flat cable transmission lines. The instant invention is further directed to a probe for use in monitoring pairs of flat cable transmission lines.

  14. Theory of circuit block switch-off

    OpenAIRE

    S. Henzler; J. Berthold; G. Georgakos; Schmitt-Landsiedel, D.

    2005-01-01

    Switching-off unused circuit blocks is a promising approach to supress static leakage currents in ultra deep sub-micron CMOS digital systems. Basic performance parameters of Circuit Block Switch-Off (CBSO) schemes are defined and their dependence on basic circuit parameters is estimated. Therefore the design trade-off between strong leakage suppression in idle mode and adequate dynamic performance in active mode can be supported by simple analytic investigations. Additionally, a guideline for...

  15. Nonsmooth Modeling and Simulation for Switched Circuits

    CERN Document Server

    Acary, Vincent; Brogliato, Bernard

    2011-01-01

    "Nonsmooth Modeling and Simulation for Switched Circuits" concerns the modeling and the numerical simulation of switched circuits with the nonsmooth dynamical systems (NSDS) approach, using piecewise-linear and multivalued models of electronic devices like diodes, transistors, switches. Numerous examples (ranging from introductory academic circuits to various types of power converters) are analyzed and many simulation results obtained with the INRIA open-source SICONOS software package are presented. Comparisons with SPICE and hybrid methods demonstrate the power of the NSDS approach

  16. The analysis and design of linear circuits

    CERN Document Server

    Thomas, Roland E; Toussaint, Gregory J

    2009-01-01

    The Analysis and Design of Linear Circuits, 6e gives the reader the opportunity to not only analyze, but also design and evaluate linear circuits as early as possible. The text's abundance of problems, applications, pedagogical tools, and realistic examples helps engineers develop the skills needed to solve problems, design practical alternatives, and choose the best design from several competing solutions. Engineers searching for an accessible introduction to resistance circuits will benefit from this book that emphasizes the early development of engineering judgment.

  17. Analog circuit design art, science, and personalities

    CERN Document Server

    Williams, Jim

    1991-01-01

    Analog Circuit Design: Art, Science, and Personalities discusses the many approaches and styles in the practice of analog circuit design. The book is written in an informal yet informative manner, making it easily understandable to those new in the field. The selection covers the definition, history, current practice, and future direction of analog design; the practice proper; and the styles in analog circuit design. The book also includes the problems usually encountered in analog circuit design; approach to feedback loop design; and other different techniques and applications. The text is

  18. Electric circuit theory applied electricity and electronics

    CERN Document Server

    Yorke, R

    1981-01-01

    Electric Circuit Theory provides a concise coverage of the framework of electrical engineering. Comprised of six chapters, this book emphasizes the physical process of electrical engineering rather than abstract mathematics. Chapter 1 deals with files, circuits, and parameters, while Chapter 2 covers the natural and forced response of simple circuit. Chapter 3 talks about the sinusoidal steady state, and Chapter 4 discusses the circuit analysis. The fifth chapter tackles frequency response of networks, and the last chapter covers polyphase systems. This book will be of great help to electrical

  19. Wafer-scale graphene integrated circuit.

    Science.gov (United States)

    Lin, Yu-Ming; Valdes-Garcia, Alberto; Han, Shu-Jen; Farmer, Damon B; Meric, Inanc; Sun, Yanning; Wu, Yanqing; Dimitrakopoulos, Christos; Grill, Alfred; Avouris, Phaedon; Jenkins, Keith A

    2011-06-10

    A wafer-scale graphene circuit was demonstrated in which all circuit components, including graphene field-effect transistor and inductors, were monolithically integrated on a single silicon carbide wafer. The integrated circuit operates as a broadband radio-frequency mixer at frequencies up to 10 gigahertz. These graphene circuits exhibit outstanding thermal stability with little reduction in performance (less than 1 decibel) between 300 and 400 kelvin. These results open up possibilities of achieving practical graphene technology with more complex functionality and performance.

  20. Hyperchaotic circuit with damped harmonic oscillators

    DEFF Research Database (Denmark)

    Lindberg, Erik; Murali, K.; Tamasevicius, A.

    2001-01-01

    A simple fourth-order hyperchaotic circuit with damped harmonic oscillators is described. ANP3 and PSpice simulations including an eigenvalue study of the linearized Jacobian are presented together with a hardware implementation. The circuit contains two inductors with series resistance, two ideal...... capacitors and one nonlinear active conductor. The Lyapunov exponents are presented to confirm the hyperchaotic nature of the oscillations of the circuit. The nonlinear conductor is realized with a diode. A negative impedance converter and a linear resistor. The performance of the circuit is investigated...... by means of numerical integration of the appropriate differential equations....

  1. Reversible posterior leukoencephalopathy syndrome

    International Nuclear Information System (INIS)

    To review reversible posterior leukoencephalopathy syndrome. We reviewed 22 patients (M:F=3:19; age, 17-46 years) with the characteristic clinical and imaging features of reversible posterior leukoencephalopathy syndrome. All underwent brain MRI, and in three cases both CT and MRI were performed. In one, MRA was obtained, and in eleven, follow-up MR images were obtained. We evaluated the causes of this syndrome, its clinical manifestations, and MR findings including the locations of lesions, the presence or absence of contrast enhancement, and the changes seen at follow-up MRI. Of the 22 patients, 13 had eclampsia (six during pregnancy and seven during puerperium). Four were receiving immunosuppressive therapy (three, cyclosporine ; one, FK 506). Four suffered renal failure and one had complicated migraine. The clinical manifestations included headache (n=12), visual disturbance (n=13), seizure (n=15), focal neurologic sign (n=3), and altered mental status (n=2). Fifteen patients had hypertension and the others normotension. MRI revealed that lesions were bilateral (n=20) or unilateral (n=2). In all patients the lesion was found in the cortical and subcortical areas of the parieto-occipital lobes ; other locations were the basal ganglia (n=9), posterior temporal lobe (n=8), frontal lobe (n=5), cerebellum (n=5), pons (n=2), and thalamus (n=1). All lesions were of high signal intensity on T2-weighted images, and of iso to low intensity on T1-weighted images. One was combined with acute hematoma in the left basal ganglia. In eight of 11 patients who underwent postcontrast T1-weighted MRI, there was no definite enhancement ; in one, enhancement was mild, and in tow, patchy. CT studies showed low attenuation, and MRA revealed mild vasospasm. The symptoms of all patients improved. Follow-up MRI in nine of 11 patients depicted complete resolution of the lesions ; in two, small infarctions remained but the extent of the lesions had decreased. Reversible posterior

  2. Reversible posterior leukoencephalopathy syndrome

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Eun Ja; Yu, Won Jong; Ahn, Kook Jin; Jung, So Lyung; Lee, Yeon Soo; Kim, Ji Chang; Kang, Si Won [The Catholic Univ. of Korea, Taejon (Korea, Republic of); Song, Chang Joon [Chungnam National Univ. School of Medicine, Cheonju (Korea, Republic of); Song, Soon-Young; Koo, Ja Hong [Kwandong Univ. College of Medicine, Myungji Hospital, Seoul (Korea, Republic of); Kim, Man Deuk [College of Medicine Pochon CHA Univ., Seoul (Korea, Republic of)

    2001-10-01

    To review reversible posterior leukoencephalopathy syndrome. We reviewed 22 patients (M:F=3:19; age, 17-46 years) with the characteristic clinical and imaging features of reversible posterior leukoencephalopathy syndrome. All underwent brain MRI, and in three cases both CT and MRI were performed. In one, MRA was obtained, and in eleven, follow-up MR images were obtained. We evaluated the causes of this syndrome, its clinical manifestations, and MR findings including the locations of lesions, the presence or absence of contrast enhancement, and the changes seen at follow-up MRI. Of the 22 patients, 13 had eclampsia (six during pregnancy and seven during puerperium). Four were receiving immunosuppressive therapy (three, cyclosporine ; one, FK 506). Four suffered renal failure and one had complicated migraine. The clinical manifestations included headache (n=12), visual disturbance (n=13), seizure (n=15), focal neurologic sign (n=3), and altered mental status (n=2). Fifteen patients had hypertension and the others normotension. MRI revealed that lesions were bilateral (n=20) or unilateral (n=2). In all patients the lesion was found in the cortical and subcortical areas of the parieto-occipital lobes ; other locations were the basal ganglia (n=9), posterior temporal lobe (n=8), frontal lobe (n=5), cerebellum (n=5), pons (n=2), and thalamus (n=1). All lesions were of high signal intensity on T2-weighted images, and of iso to low intensity on T1-weighted images. One was combined with acute hematoma in the left basal ganglia. In eight of 11 patients who underwent postcontrast T1-weighted MRI, there was no definite enhancement ; in one, enhancement was mild, and in tow, patchy. CT studies showed low attenuation, and MRA revealed mild vasospasm. The symptoms of all patients improved. Follow-up MRI in nine of 11 patients depicted complete resolution of the lesions ; in two, small infarctions remained but the extent of the lesions had decreased. Reversible posterior

  3. Reversed field pinches

    Energy Technology Data Exchange (ETDEWEB)

    Bodin, H.A.B. (Euratom/UKAEA Fusion Association, Abingdon (UK). Culham Lab.)

    1983-03-15

    The present status of RFP research is reviewed with emphasis on recent experimental developments. The basic properties of the RFP are summarised in section 2 including equilibrium and relaxed states, self-reversal and stability. The remainder of the paper deals with experimental results. There are five intermediate sized machines operating with the minor radii of the metal bellows liner in the range 9-26 cm, peak currents of a few hundred kA reached in between 0.1 and 4 ms with pulse lengths of up to more than 10 ms. The field configuration is set up using self-reversal usually assisted by slow Bsub(PHI) control. The temperatures are typically a few hundred eV (maximum approx.=600 eV on TPE-IR(M) in Japan) and the density is typically 10/sup 13/-10/sup 14/ cm/sup -3/ with maximum ..beta..sub(THETA)> or approx.10%. It is found that some plasma properties depend on the value of I/N (I is the current and N the line density) with a clear high-density limit due to radiation. The electron temperature increases with current; much of the data fits a dependence T..cap alpha..Isup(n) where 0.5reversed field pinch research will be highlighted with an indication of future trends in this work.

  4. Partial Reversible Gates(PRG) for Reversible BCD Arithmetic

    OpenAIRE

    Thapliyal, Himanshu; Arabnia, Hamid R; Bajpai, Rajnish; Sharma, Kamal K

    2007-01-01

    IEEE 754r is the ongoing revision to the IEEE 754 floating point standard and a major enhancement to the standard is the addition of decimal format. Furthermore, in the recent years reversible logic has emerged as a promising computing paradigm having its applications in low power CMOS, quantum computing, nanotechnology, and optical computing. The major goal in reversible logic is to minimize the number of reversible gates and garbage outputs. Thus, this paper proposes the novel concept of pa...

  5. Solid state multi-ensemble quantum computer in waveguide circuit model

    CERN Document Server

    Moiseev, Sergey A; Gubaidullin, Firdus F

    2010-01-01

    The first realization of solid state quantum computer was demonstrated recently by using artificial atoms -- transmons in superconducting resonator. Here, we propose a novel architecture of flexible and scalable quantum computer based on a waveguide circuit coupling many quantum nodes of controlled atomic ensembles. For the first time, we found the optimal practically attainable parameters of the atoms and circuit for 100{%} efficiency of quantum memory for multi qubit photon fields and confirmed experimentally the predicted perfect storage. Then we revealed self modes for reversible transfer of qubits between the quantum memory node and arbitrary other nodes. We found a realization of iSWAP gate via direct coupling of two arbitrary nodes with a processing rate accelerated proportionally to number of atoms in the node. A large number of the two-qubit gates can be simultaneously realized in the circuit for implementation of parallel quantum processing. Dynamic coherent elimination procedure of excess quantum s...

  6. A Survey of Fast Analog Circuit Analysis Algorithm using SPICE

    OpenAIRE

    T.Murugajothi

    2014-01-01

    is paper presents a fast analog circuit analysis algorithm, fundamental circuit-based circuit analysis, for circuits being repeatedly modified and verified in product development. The algorithm reuses previous circuit simulation result on successive changed circuit analysis to achieve simulation operation reduction. The algorithm is implemented with SPICE simulator on linear and nonlinear circuit applications with the proposed device delta models. The experiments show that t...

  7. Reverse Osmosis Optimization

    Energy Technology Data Exchange (ETDEWEB)

    McMordie Stoughton, Kate; Duan, Xiaoli; Wendel, Emily M.

    2013-08-26

    This technology evaluation was prepared by Pacific Northwest National Laboratory on behalf of the U.S. Department of Energy’s Federal Energy Management Program (FEMP). ¬The technology evaluation assesses techniques for optimizing reverse osmosis (RO) systems to increase RO system performance and water efficiency. This evaluation provides a general description of RO systems, the influence of RO systems on water use, and key areas where RO systems can be optimized to reduce water and energy consumption. The evaluation is intended to help facility managers at Federal sites understand the basic concepts of the RO process and system optimization options, enabling them to make informed decisions during the system design process for either new projects or recommissioning of existing equipment. This evaluation is focused on commercial-sized RO systems generally treating more than 80 gallons per hour.¬

  8. Multiple stimulus reversible hydrogels

    Science.gov (United States)

    Gutowska, Anna; Krzyminski, Karol J.

    2006-04-25

    A polymeric solution capable of gelling upon exposure to a critical minimum value of a plurality of environmental stimuli is disclosed. The polymeric solution may be an aqueous solution utilized in vivo and capable of having the gelation reversed if at least one of the stimuli fall below, or outside the range of, the critical minimum value. The aqueous polymeric solution can be used either in industrial or pharmaceutical environments. In the medical environment, the aqueous polymeric solution is provided with either a chemical or radioisotopic therapeutic agent for delivery to a specific body part. The primary advantage of the process is that exposure to one environmental stimuli alone will not cause gelation, thereby enabling the therapeutic agent to be conducted through the body for relatively long distances without gelation occurring.

  9. Reverse Osmosis Optimization

    Energy Technology Data Exchange (ETDEWEB)

    None

    2013-08-01

    This technology evaluation was prepared by Pacific Northwest National Laboratory on behalf of the U.S. Department of Energy’s Federal Energy Management Program (FEMP). The technology evaluation assesses techniques for optimizing reverse osmosis (RO) systems to increase RO system performance and water efficiency. This evaluation provides a general description of RO systems, the influence of RO systems on water use, and key areas where RO systems can be optimized to reduce water and energy consumption. The evaluation is intended to help facility managers at Federal sites understand the basic concepts of the RO process and system optimization options, enabling them to make informed decisions during the system design process for either new projects or recommissioning of existing equipment. This evaluation is focused on commercial-sized RO systems generally treating more than 80 gallons per hour.

  10. Reverse osmosis application studies

    International Nuclear Information System (INIS)

    To assess the feasibility of applying reverse osmosis (RO) and ultrafiltration (UF) for effective treatment of process and waste streams from operations at Ontario Hydro's thermal and nuclear stations, an extensive literature survey has been carried out. It is concluded that RO is not at present economic for pretreatment of Great Lakes water prior to ion exchange demineralization for boiler makeup. Using both conventional and novel commercial membrane modules, RO pilot studies are recommended for treatment of boiler cleaning wastes, fly ash leachates, and flue gas desulphurization scrubber discharges for removal of heavy metals. Volume reduction and decontamination of nuclear station low-level active liquid waste streams by RO/UF also appear promising. Research programmes are proposed

  11. Reverse photoacoustic standoff spectroscopy

    Science.gov (United States)

    Van Neste, Charles W.; Senesac, Lawrence R.; Thundat, Thomas G.

    2011-04-12

    A system and method are disclosed for generating a reversed photoacoustic spectrum at a greater distance. A source may emit a beam to a target and a detector measures signals generated as a result of the beam being emitted on the target. By emitting a chopped/pulsed light beam to the target, it may be possible to determine the target's optical absorbance by monitoring the intensity of light collected at the detector at different wavelengths. As the wavelength of light is changed, the target may absorb or reject each optical frequency. Rejection may increase the intensity at the sensing element and absorption may decrease the intensity. Accordingly, an identifying spectrum of the target may be made with the intensity variation of the detector as a function of illuminating wavelength.

  12. A Reversible Processor Architecture and its Reversible Logic Design

    DEFF Research Database (Denmark)

    Thomsen, Michael Kirkedal; Axelsen, Holger Bock; Glück, Robert

    2012-01-01

    We describe the design of a purely reversible computing architecture, Bob, and its instruction set, BobISA. The special features of the design include a simple, yet expressive, locally-invertible instruction set, and fully reversible control logic and address calculation. We have designed...... an architecture with an ISA that is expressive enough to serve as the target for a compiler from a high-level structured reversible programming language. All-in-all, this paper demonstrates that the design of a complete reversible computing architecture is possible and can serve as the core of a programmable...

  13. Multilevel modulation of a sensory motor circuit during C. elegans sleep and arousal

    OpenAIRE

    Cho, Julie Y.; Paul W Sternberg

    2014-01-01

    Sleep is characterized by behavioral quiescence, homeostasis, increased arousal threshold, and rapid reversibility. Understanding how these properties are encoded by a neuronal circuit has been difficult, and no single molecular or neuronal pathway has been shown to be responsible for the regulation of sleep. Taking advantage of the well-mapped neuronal connections of Caenorhabditis elegans and the sleep-like states in this animal, we demonstrate the changed properties of both sensory neurons...

  14. Vacuum Dielectric Recovery Characteristics of a Novel Current Limiting Circuit Breaker Base on Artificial Current Zero

    Institute of Scientific and Technical Information of China (English)

    JIANG Zhuangxian; ZHUANG Jinwu; WANG Chen; WU Jin; LIU Luhui

    2012-01-01

    A novel current limiting circuit breaker employs zero current switching method in cutting off DC current, which gives out a reverse impulsive current towards a high speed vacuum interrupter and force the current down to zero. This kind of breaker is simply in structure and can act in a very short time with high current limiting capability, and therefore it has a long electric life and is extremely suitable to be installed in a DC electrical system as a fault orotection utility.

  15. Short-Circuit Withstand Current Rating for Low Voltage Switchgear : Short-Circuit Current Rating (SCCR)

    OpenAIRE

    Schütt, Matthias

    2016-01-01

    The subject of this thesis was to observe the short-circuit currents at electrical distribution boards. The purpose was to investigate different methods of protecting switchgears from dam-ages caused by short-circuit currents. Manufactures of switchgears need to indicate the rated short-circuit withstand current of their assembly. This thesis is presenting methods of defining the right value of the short-circuit withstand current. This thesis presents theoretical information about the cau...

  16. Towards programmable plant genetic circuits.

    Science.gov (United States)

    Medford, June I; Prasad, Ashok

    2016-07-01

    Synthetic biology enables the construction of genetic circuits with predictable gene functions in plants. Detailed quantitative descriptions of the transfer function or input-output function for genetic parts (promoters, 5' and 3' untranslated regions, etc.) are collected. These data are then used in computational simulations to determine their robustness and desired properties, thereby enabling the best components to be selected for experimental testing in plants. In addition, the process forms an iterative workflow which allows vast improvement to validated elements with sub-optimal function. These processes enable computational functions such as digital logic in living plants and follow the pathway of technological advances which took us from vacuum tubes to cell phones. PMID:27297052

  17. Beta-gamma discriminator circuit

    International Nuclear Information System (INIS)

    The major difficulty encountered in the determination of beta-ray dose in field conditions is generally the presence of a relatively high gamma-ray component. Conventional dosimetry instruments use a shield on the detector to estimate the gamma-ray component in comparison with the beta-ray component. More accurate dosimetry information can be obtained from the measured beta spectrum itself. At Los Alamos, a detector and discriminator circuit suitable for use in a portable spectrometer have been developed. This instrument will discriminate between gammas and betas in a mixed field. The portable package includes a 256-channel MCA which can be programmed to give a variety of outputs, including a spectral display, and may be programmed to read dose directly

  18. Electrical circuit theory and technology

    CERN Document Server

    Bird, John

    2014-01-01

    This much-loved textbook explains the principles of electrical circuit theory and technology so that students of electrical and mechanical engineering can master the subject. Real-world situations and engineering examples put the theory into context. The inclusion of worked problems with solutions help you to learn and further problems then allow you to test and confirm you have fully understood each subject. In total the book contains 800 worked problems, 1000 further problems and 14 revision tests with answers online. This an ideal text for foundation and undergraduate degree students and those on upper level vocational engineering courses, in particular electrical and mechanical. It provides a sound understanding of the knowledge required by technicians in fields such as electrical engineering, electronics and telecommunications. This edition has been updated with developments in key areas such as semiconductors, transistors, and fuel cells, along with brand new material on ABCD parameters and Fourier's An...

  19. Speed-up hyperspheres homotopic path tracking algorithm for PWL circuits simulations.

    Science.gov (United States)

    Ramirez-Pinero, A; Vazquez-Leal, H; Jimenez-Fernandez, V M; Sedighi, H M; Rashidi, M M; Filobello-Nino, U; Castaneda-Sheissa, R; Huerta-Chua, J; Sarmiento-Reyes, L A; Laguna-Camacho, J R; Castro-Gonzalez, F

    2016-01-01

    In the present work, we introduce an improved version of the hyperspheres path tracking method adapted for piecewise linear (PWL) circuits. This enhanced version takes advantage of the PWL characteristics from the homotopic curve, achieving faster path tracking and improving the performance of the homotopy continuation method (HCM). Faster computing time allows the study of complex circuits with higher complexity; the proposed method also decrease, significantly, the probability of having a diverging problem when using the Newton-Raphson method because it is applied just twice per linear region on the homotopic path. Equilibrium equations of the studied circuits are obtained applying the modified nodal analysis; this method allows to propose an algorithm for nonlinear circuit analysis. Besides, a starting point criteria is proposed to obtain better performance of the HCM and a technique for avoiding the reversion phenomenon is also proposed. To prove the efficiency of the path tracking method, several cases study with bipolar (BJT) and CMOS transistors are provided. Simulation results show that the proposed approach can be up to twelve times faster than the original path tracking method and also helps to avoid several reversion cases that appears when original hyperspheres path tracking scheme was employed.

  20. High pressure rotating reverse osmosis for long term space missions

    Science.gov (United States)

    Christensen Pederson, Cynthia Lynn

    Rotating reverse osmosis, which uses reverse osmosis to purify water and rotating filtration to improve the efficacy of filtration, has great potential for wastewater recycling on a long term space mission. Previous investigations of a proof-of-concept device indicated that the most efficient method to improve rotating reverse osmosis performance is to increase the operational pressure. Thus, a second generation device and fluid circuit were designed, fabricated, and tested to permit high pressure operation for long time periods. The design overcame several obstacles including membrane attachment, rotating seal design, and fluid and pressure management. A theoretical model of rotating reverse osmosis was modified to properly account for the flow conditions in the new design. Tests lasting a week were conducted with a variety of model wastewaters. Significant fouling and a decrease in flux were observed after three days of testing regardless of the operational parameters. A semi-empirical model, the fouling potential, was added to the theoretical model to account for the fouling. This allowed the simulation of 48 hour cleaning cycles that significantly increased the flux of the device. Experimental investigation of the rotational speed and concentrate flow rate indicated that an increase in either parameter decreased the fouling slightly. A week long test of a wastewater ersatz with a biocide did not exhibit a decrease in flux around day three that otherwise occurred. Therefore, biofouling was identified as the primary mechanism of fouling. Rotating reverse osmosis was compared with conventional spiral wound reverse osmosis and displayed increased rejection under dead end filtration conditions. The rotating device exhibited similar rejection and increased flux compared to a tubular reverse osmosis device previously used in a NASA wastewater recovery system. The integration of the rotating device into a NASA water recovery management system was evaluated. Lastly, a

  1. An Algebra of Reversible Quantum Computing

    OpenAIRE

    Wang, Yong

    2015-01-01

    Based on the axiomatization of reversible computing RACP, we generalize it to quantum reversible computing which is called qRACP. By use of the framework of quantum configuration, we show that structural reversibility and quantum state reversibility must be satisfied simultaneously in quantum reversible computation. RACP and qRACP has the same axiomatization modulo the so-called quantum forward-reverse bisimularity, that is, classical reversible computing and quantum reversible computing are ...

  2. Integrated Circuit Electromagnetic Immunity Handbook

    Science.gov (United States)

    Sketoe, J. G.

    2000-08-01

    This handbook presents the results of the Boeing Company effort for NASA under contract NAS8-98217. Immunity level data for certain integrated circuit parts are discussed herein, along with analytical techniques for applying the data to electronics systems. This handbook is built heavily on the one produced in the seventies by McDonnell Douglas Astronautics Company (MDAC, MDC Report E1929 of 1 August 1978, entitled Integrated Circuit Electromagnetic Susceptibility Handbook, known commonly as the ICES Handbook, which has served countless systems designers for over 20 years). Sections 2 and 3 supplement the device susceptibility data presented in section 4 by presenting information on related material required to use the IC susceptibility information. Section 2 concerns itself with electromagnetic susceptibility analysis and serves as a guide in using the information contained in the rest of the handbook. A suggested system hardening requirements is presented in this chapter. Section 3 briefly discusses coupling and shielding considerations. For conservatism and simplicity, a worst case approach is advocated to determine the maximum amount of RF power picked up from a given field. This handbook expands the scope of the immunity data in this Handbook is to of 10 MHz to 10 GHz. However, the analytical techniques provided are applicable to much higher frequencies as well. It is expected however, that the upper frequency limit of concern is near 10 GHz. This is due to two factors; the pickup of microwave energy on system cables and wiring falls off as the square of the wavelength, and component response falls off at a rapid rate due to the effects of parasitic shunt paths for the RF energy. It should be noted also that the pickup on wires and cables does not approach infinity as the frequency decreases (as would be expected by extrapolating the square law dependence of the high frequency roll-off to lower frequencies) but levels off due to mismatch effects.

  3. Defining the Polar Field Reversal

    Science.gov (United States)

    Upton, Lisa; Hathaway, David H.

    2013-01-01

    The polar fields on the Sun are directly related to solar cycle variability. Recently there has been interest in studying an important characteristic of the polar fields: the timing of the polar field reversals. However this characteristic has been poorly defined, mostly due to the limitations of early observations. In the past, the reversals have been calculated by averaging the flux above some latitude (i.e. 55deg or 75deg). Alternatively, the reversal could be defined by the time in which the previous polarity is completely canceled and replaced by the new polarity at 90de, precisely at the pole. We will use a surface flux transport model to illustrate the differences in the timing of the polar field reversal based on each of these definitions and propose standardization in the definition of the polar field reversal. The ability to predict the timing of the polar field reversal using a surface flux transport model will also be discussed.

  4. Company policy toward reverse logistics

    OpenAIRE

    Klapalová Alena; Králová Maria

    2012-01-01

    The paper deals with the results of questionnaire survey examining the character of companies’ policies towards management of reverse flows logistics, namely innovativeness of policy related to the reasons of involvement to manage reverse flows and to the planning system of reverse logistics. Answers from the informants and respondents from 150 Czech companies were analysed with the employment of statistical methods (frequencies, contingency tables and Man – Whitney test) to explore the poten...

  5. Geomagnetic Reversals during the Phanerozoic.

    Science.gov (United States)

    McElhinny, M W

    1971-04-01

    An antalysis of worldwide paleomagnetic measurements suggests a periodicity of 350 x 10(6) years in the polarity of the geomagnetic field. During the Mesozoic it is predominantly normal, whereas during the Upper Paleozoic it is predominantly reversed. Although geomagnetic reversals occur at different rates throughout the Phanerozoic, there appeaars to be no clear correlation between biological evolutionary rates and reversal frequency. PMID:17735224

  6. Magnetic reversals and mass extinctions

    Science.gov (United States)

    Raup, D. M.

    1985-01-01

    The results of a study of reversals of the earth's magnetic field over the past 165 Myr are presented. A stationary periodicity of 30 Myr emerges which predicts pulses of increased reversal activity centered at 10, 40, 70, . . . Myr before the present. The correlation between the reversal intensity and biological extinctions is examined, and a nontrivial discrepancy is found between the magnetic and extinction periodicity.

  7. Magnetic Reversal on Vicinal Surfaces

    OpenAIRE

    Hyman, R. A.; Zangwill, A.; Stiles, M. D.

    1998-01-01

    We present a theoretical study of in-plane magnetization reversal for vicinal ultrathin films using a one-dimensional micromagnetic model with nearest-neighbor exchange, four-fold anisotropy at all sites, and two-fold anisotropy at step edges. A detailed "phase diagram" is presented that catalogs the possible shapes of hysteresis loops and reversal mechanisms as a function of step anisotropy strength and vicinal terrace length. The steps generically nucleate magnetization reversal and pin the...

  8. Initiation of HIV Reverse Transcription

    Directory of Open Access Journals (Sweden)

    Roland Marquet

    2010-01-01

    Full Text Available Reverse transcription of retroviral genomes into double stranded DNA is a key event for viral replication. The very first stage of HIV reverse transcription, the initiation step, involves viral and cellular partners that are selectively packaged into the viral particle, leading to an RNA/protein complex with very specific structural and functional features, some of which being, in the case of HIV-1, linked to particular isolates. Recent understanding of the tight spatio-temporal regulation of reverse transcription and its importance for viral infectivity further points toward reverse transcription and potentially its initiation step as an important drug target.

  9. Reversal of underground mine ventilation

    Energy Technology Data Exchange (ETDEWEB)

    Ray, S.K.; Sahay, N.; Singh, R.P.; Singh, A.K.; Bhowmick, B.C. [Central Mining Research Institute, Dhanbad (India)

    2002-09-01

    Reversal of main ventilation is one of the important means to isolate a fire during emergency. In America, it has been reported that by fan reversal lives have been saved in underground coal mines. Indian coal mines have so far not come forward to adopt this method. Not much research work has so far been carried out in India. This paper deals with international review of the work carried out in other countries. Laws relating to the reversal of ventilation in different countries of the world is discussed. The effect of reversal on goaf gases and adjustment of ventilation flow is also outlined. 17 refs., 1 fig., 2 tabs.

  10. Analysis of circuits including magnetic cores (MTRAC)

    Science.gov (United States)

    Hanzen, G. R.; Nitzan, D.; Herndon, J. R.

    1972-01-01

    Development of automated circuit analysis computer program to provide transient analysis of circuits with magnetic cores is discussed. Allowance is made for complications caused by nonlinearity of switching core model and magnetic coupling among loop currents. Computer program is conducted on Univac 1108 computer using FORTRAN IV.

  11. Circuits in the Sun: Solar Panel Physics

    Science.gov (United States)

    Gfroerer, Tim

    2013-01-01

    Typical commercial solar panels consist of approximately 60 individual photovoltaic cells connected in series. Since the usual Kirchhoff rules apply, the current is uniform throughout the circuit, while the electric potential of the individual devices is cumulative. Hence, a solar panel is a good analog of a simple resistive series circuit, except…

  12. Sustainability issues in circuit board recycling

    DEFF Research Database (Denmark)

    Legarth, Jens Brøbech; Alting, Leo; Baldo, Gian Luca

    1995-01-01

    The resource recovery and environmental impact issues of printed circuit board recycling by secondary copper smelters are discussed. Guidelines concerning material selection for circuit board manufacture and concerning the recycling processes are given to enhance recovery efficiency and to lower...... the impacts on the external environment from recycling...

  13. CMOS circuits for analog signal processing

    NARCIS (Netherlands)

    Wallinga, Hans

    1988-01-01

    Design choices in CMOS analog signal processing circuits are presented. Special attention is focussed on continuous-time filter technologies. The basics of MOSFET-C continuous-time filters and CMOS Square Law Circuits are explained at the hand of a graphical MOST characteristics representation.

  14. Water quality control program in experimental circuits

    International Nuclear Information System (INIS)

    The Water Quality Control Program of the Experimental Circuits visualizes studying the water chemistry of the cooling in the primary and secondary circuits, monitoring the corrosion of the systems and studying the mechanism of the corrosion products transport in the systems. (author)

  15. POWER MOS FET MODELS FOR "SWITCHING" CIRCUITS

    OpenAIRE

    Rossel, P; Maimouni, R.; Belabadia, M.; Tranduc, Henri; Cordonnier, C.; Bairanzade, M.

    1988-01-01

    A compact model of the Power VDMOS Transistor compatible with the circuit simulator "SPICE2" is described in this article. This model is applied to the simulation of switching circuit with resistive and inductive loads ; comparisons with experimental results are presented.

  16. Memristive circuits simulate memcapacitors and meminductors

    CERN Document Server

    Pershin, Yuriy V

    2009-01-01

    We suggest electronic circuits with memristors (resistors with memory) that operate as memcapacitors (capacitors with memory) and meminductors (inductors with memory). Using a memristor emulator, the suggested circuits have been built and their operation has been demonstrated, showing a useful and interesting connection between the three memory elements.

  17. Automatic Test Pattern Generation for Digital Circuits

    Directory of Open Access Journals (Sweden)

    S. Hemalatha

    2014-04-01

    Full Text Available Digital circuits complexity and density are increasing and at the same time it should have more quality and reliability. It leads with high test costs and makes the validation more complex. The main aim is to develop a complete behavioral fault simulation and automatic test pattern generation (ATPG system for digital circuits modeled in verilog and VHDL. An integrated Automatic Test Generation (ATG and Automatic Test Executing/Equipment (ATE system for complex boards is developed here. An approach to use memristors (resistors with memory in programmable analog circuits. The Main idea consists in a circuit design in which low voltages are applied to memristors during their operation as analog circuit elements and high voltages are used to program the memristor’s states. This way, as it was demonstrated in recent experiments, the state of memristors does not essentially change during analog mode operation. As an example of our approach, we have built several programmable analog circuits demonstrating memristor -based programming of threshold, gain and frequency. In these circuits the role of memristor is played by a memristor emulator developed by us. A multiplexer is developed to generate a class of minimum transition sequences. The entire hardware is realized as digital logical circuits and the test results are simulated in Model sim software. The results of this research show that behavioral fault simulation will remain as a highly attractive alternative for the future generation of VLSI and system-on-chips (SoC.

  18. Verifying Relay Circuits using State Machines

    NARCIS (Netherlands)

    Eijk, P.H.J. van

    2008-01-01

    In this paper we present, illustrate and discuss a number of techniques that can be used in the modelling and verification of electro-mechanical relay circuits. These techniques are based on state machine descriptions of circuits and their functions, and on applying validation tools for properties o

  19. Automatic design of digital synthetic gene circuits.

    Directory of Open Access Journals (Sweden)

    Mario A Marchisio

    2011-02-01

    Full Text Available De novo computational design of synthetic gene circuits that achieve well-defined target functions is a hard task. Existing, brute-force approaches run optimization algorithms on the structure and on the kinetic parameter values of the network. However, more direct rational methods for automatic circuit design are lacking. Focusing on digital synthetic gene circuits, we developed a methodology and a corresponding tool for in silico automatic design. For a given truth table that specifies a circuit's input-output relations, our algorithm generates and ranks several possible circuit schemes without the need for any optimization. Logic behavior is reproduced by the action of regulatory factors and chemicals on the promoters and on the ribosome binding sites of biological Boolean gates. Simulations of circuits with up to four inputs show a faithful and unequivocal truth table representation, even under parametric perturbations and stochastic noise. A comparison with already implemented circuits, in addition, reveals the potential for simpler designs with the same function. Therefore, we expect the method to help both in devising new circuits and in simplifying existing solutions.

  20. IMPORTANT NOTICE: Cancellation of shuttle Circuit 3

    CERN Multimedia

    2013-01-01

    Circuit 3 of the CERN Shuttle Service (Point 5), which has served CMS since the start of LS1, will be cancelled with effect from Tuesday 16 April. This decision has been taken in consultation with CMS, as the circuit was seldom used.   In response to increasing demand for Circuit 1 - Meyrin and feedback from passengers, the two Circuit 3 journeys will be switched to Circuit 1 – Meyrin (see new timetable below): Mornings: Four journeys instead of three. Circuit 1 now starts at 8:10 (instead of 8:19 a.m.) and runs until 9:27 a.m. (instead of 9:16 a.m.). Lunchtimes: Five journeys in place between 12:10 p.m. and 1:47 p.m. Evenings: Circuit starts at 5:23 p.m. (instead of 5:03 p.m.) and ends at 6:20 p.m. at Building 33. Please note that the circuit will depart from Building 13 instead of Building 33.  

  1. 46 CFR 169.670 - Circuit breakers.

    Science.gov (United States)

    2010-10-01

    ... 46 Shipping 7 2010-10-01 2010-10-01 false Circuit breakers. 169.670 Section 169.670 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) NAUTICAL SCHOOLS SAILING SCHOOL VESSELS Machinery and... for— (a) Inverse time delay; (b) Instantaneous short circuit protection; and (c) Repeated opening...

  2. Active components for integrated plasmonic circuits

    DEFF Research Database (Denmark)

    Krasavin, A.V.; Bolger, P.M.; Zayats, A.V.;

    2009-01-01

    We present a comprehensive study of highly efficient and compact passive and active components for integrated plasmonic circuit based on dielectric-loaded surface plasmon polariton waveguides.......We present a comprehensive study of highly efficient and compact passive and active components for integrated plasmonic circuit based on dielectric-loaded surface plasmon polariton waveguides....

  3. F-Paris: integrated electronic circuits [Tender

    CERN Multimedia

    2003-01-01

    "Fourniture, montage et tests des circuits imprimes et modules multi composants pour le trajectographe central de CMS. Maximum de 12 000 circuits imprimes et modules multi-composants necessaires au trajectographe central de l'experience CMS aupres du Large Hadron Collider" (1 page).

  4. Post irradiation effects (PIE) in integrated circuits

    International Nuclear Information System (INIS)

    Post Irradiation Effects (PIE) ranging from normal recovery catastrophic failure have been observed in integrated circuits during the PIE period. These variations indicate that a rebound or PIE recipe used for radiation hardness assurance must be chosen with care. In this paper, the authors provide examples of PIE in a variety of integrated circuits of importance to spacecraft electronics

  5. Textbook Error: Short Circuiting on Electrochemical Cell

    Science.gov (United States)

    Bonicamp, Judith M.; Clark, Roy W.

    2007-01-01

    Short circuiting an electrochemical cell is an unreported but persistent error in the electrochemistry textbooks. It is suggested that diagrams depicting a cell delivering usable current to a load be postponed, the theory of open-circuit galvanic cells is explained, the voltages from the tables of standard reduction potentials is calculated and…

  6. Understanding the Behaviour of Infinite Ladder Circuits

    Science.gov (United States)

    Ucak, C.; Yegin, K.

    2008-01-01

    Infinite ladder circuits are often encountered in undergraduate electrical engineering and physics curricula when dealing with series and parallel combination of impedances, as a part of filter design or wave propagation on transmission lines. The input impedance of such infinite ladder circuits is derived by assuming that the input impedance does…

  7. Two New Families of Floating FDNR Circuits

    Directory of Open Access Journals (Sweden)

    Ahmed M. Soliman

    2010-01-01

    Full Text Available Two new configurations for realizing ideal floating frequency-dependent negative resistor elements (FDNR are introduced. The proposed circuits are symmetrical and are realizable by four CCII or ICCII or a combination of both. Each configuration is realizable by eight different circuits. Simulation results are included to support the theory.

  8. Designer's Casebook: current-mode minimax circuit

    NARCIS (Netherlands)

    Wassenaar, Roelof F.

    1992-01-01

    The minimum-maximum (minimax) circuit selects the minimum and maximum of two input currents. Four transistors in matched pairs are operated in the saturation region. Because the behavior of the circuit is based on matched devices and is independent of the relationship between the drain current and t

  9. Circuit model for cavity with a port

    International Nuclear Information System (INIS)

    These notes present, by way of an example, the calculation of lumped circuit elements to model a cavity that is connected to a transmission line through a coupling loop. This example is featured in a well-known text. It is adopted here to illustrate the concept and the procedures involved in the calculation of equivalent circuit elements. Its generalization is indicated. (author)

  10. Ion chromatography in the manufacture of multilayer circuit boards

    Science.gov (United States)

    Smith, Robert E.

    1990-09-01

    Ion chromatography (IC) has proven useful in analyzing chemical solutions used in the manufacture of multilayer circuit boards. The manufacturing process is described briefly and previously published IC methods are reviewed. Then, methods are described for determining chlorate and chlorite in a brown oxide solution; salicylic acid in an epoxy cure agent; formate, sulfate, and tartrate in an electroless copper bath; anionic detergents in a tin-lead brightener and in a cleaning solution; and aqueous photoresist and nonionic brightener in a tin-lead bath. Anion exchange, reverse phase HPLC on a poly(styrene/divinylbenzene), PS/DVB, column and 2-D liquid chromatography also are described. Chemically suppressed conductivity and photometric detection are used.

  11. 30 CFR 77.904 - Identification of circuit breakers.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Identification of circuit breakers. 77.904... COAL MINES Low- and Medium-Voltage Alternating Current Circuits § 77.904 Identification of circuit breakers. Circuit breakers shall be labeled to show which circuits they control unless identification...

  12. Remote tuning of NMR probe circuits.

    Science.gov (United States)

    Kodibagkar, V D; Conradi, M S

    2000-05-01

    There are many circumstances in which the probe tuning adjustments cannot be located near the rf NMR coil. These may occur in high-temperature NMR, low-temperature NMR, and in the use of magnets with small diameter access bores. We address here circuitry for connecting a fixed-tuned probe circuit by a transmission line to a remotely located tuning network. In particular, the bandwidth over which the probe may be remotely tuned while keeping the losses in the transmission line acceptably low is considered. The results show that for all resonant circuit geometries (series, parallel, series-parallel), overcoupling of the line to the tuned circuit is key to obtaining a large tuning bandwidth. At equivalent extents of overcoupling, all resonant circuit geometries have nearly equal remote tuning bandwidths. Particularly for the case of low-loss transmission line, the tuning bandwidth can be many times the tuned circuit's bandwidth, f(o)/Q. PMID:10783273

  13. Trigger circuits for the PHENIX electromagnetic calorimeter

    International Nuclear Information System (INIS)

    Monolithic and discrete circuits have been developed to provide trigger signals for the PHENIX electromagnetic calorimeter detector. These trigger circuits are deadtimeless and create overlapping 4 by 4 energy sums, a cosmic muon trigger, and a 144 channel energy sum. The front end electronics of the PHENIX system sample the energy and timing channels at each bunch crossing (BC) but it is not known immediately if this data is of interest. The information from the trigger circuits is used to determine if the data collected is of interest and should be digitized and stored or discarded. This paper presents details of the design, issues affecting circuit performance, characterization of prototypes fabricated in 1.2 microm Orbit CMOS, and integration of the circuits into the EMCal electronics system

  14. Grounding and shielding circuits and interference

    CERN Document Server

    Morrison, Ralph

    2016-01-01

    Applies basic field behavior in circuit design and demonstrates how it relates to grounding and shielding requirements and techniques in circuit design This book connects the fundamentals of electromagnetic theory to the problems of interference in all types of electronic design. The text covers power distribution in facilities, mixing of analog and digital circuitry, circuit board layout at high clock rates, and meeting radiation and susceptibility standards. The author examines the grounding and shielding requirements and techniques in circuit design and applies basic physics to circuit behavior. The sixth edition of this book has been updated with new material added throughout the chapters where appropriate. The presentation of the book has also been rearranged in order to reflect the current trends in the field.

  15. Progress in organic integrated circuit manufacture

    Science.gov (United States)

    Taylor, D. Martin

    2016-02-01

    This review article focuses on the development of processes for the manufacture of organic electronic circuits. Beginning with the first report of an organic transistor it highlights the key developments leading to the successful manufacture of microprocessors and other complex circuits incorporating organic transistors. Both batch processing (based on silicon integrated circuit technology) as well as mass-printing, roll-to-roll (R2R) approaches are discussed. Currently, the best circuit performances are achieved using batch processing. It is suggested that an emerging, large mass-market for electronic tags may dictate that R2R manufacture will likely be required to meet the high throughput rates needed. However, significant improvements in resolution and registration are necessary to achieve increased circuit operating speeds.

  16. Low cost design of microprocessor EDAC circuit

    International Nuclear Information System (INIS)

    An optimization method of error detection and correction (EDAC) circuit design is proposed. The method involves selecting or constructing EDAC codes of low cost hardware, associated with operation scheduling implementation based on 2-input XOR gates structure, and two actions for reducing hardware cells, which can reduce the delay penalties and area costs of the EDAC circuit effectively. The 32-bit EDAC circuit hardware implementation is selected to make a prototype, based on the 180 nm process. The delay penalties and area costs of the EDAC circuit are evaluated. Results show that the time penalty and area cost of the EDAC circuitries are affected with different parity-check matrices and different hardware implementation for the EDAC codes with the same capability of correction and detection code. This method can be used as a guide for low-cost radiation-hardened microprocessor EDAC circuit design and for more advanced technologies. (paper)

  17. Reversible and efficient conversion between microwave and optical light

    CERN Document Server

    Andrews, R W; Purdy, T P; Cicak, K; Simmonds, R W; Regal, C A; Lehnert, K W

    2013-01-01

    Converting low-frequency electrical signals into much higher frequency optical signals has enabled modern communications networks to leverage both the strengths of microfabricated electrical circuits and optical fiber transmission, allowing information networks to grow in size and complexity. A microwave-to-optical converter in a quantum information network could provide similar gains by linking quantum processors via low-loss optical fibers and enabling a large-scale quantum network. However, no current technology can convert low-frequency microwave signals into high-frequency optical signals while preserving their fragile quantum state. For this demanding application, a converter must provide a near-unitary transformation between different frequencies; that is, the ideal transformation is reversible, coherent, and lossless. Here we demonstrate a converter that reversibly, coherently, and efficiently links the microwave and optical portions of the electromagnetic spectrum. We use our converter to transfer cl...

  18. Field reversal experiments (FRX)

    International Nuclear Information System (INIS)

    The equilibrium, confinement, and stability properties of the reversed-field configuration (RFC) are being studied in two theta-pinch facilities. The RFC is an elongated toroidal plasma confined in a purely poloidal field geometry. The open field lines of the linear theta pinch support the closed-field RFC much like the vertical field centers the toroidal plasma in a tokamak. Depending on stability and confinement properties, the RFC might be used to greatly reduce the axial losses in linear fusion devices such as mirrors, theta pinches, and liners. The FRX systems produce RFC's with a major radius R = 2-6 cm, minor radius a approximately 2 cm, and a total length l approximately 35 cm. The observed temperatures are T/sub e/ approximately 100 eV and T/sub i/ = 150-350 eV with a peak density n approximately 2 x 1015 cm-3. After the plasma reaches equilibrium, the RFC remains stable for up to 30 μs followed by the rapid growth of the rotational m = 2 instability, which terminates the confinement. During the stable equilibrium, the particle and energy confinement times are more than 10 times longer than in an open-field system. The behavior of the m = 2 mode qualitatively agrees with the theoretically predicted instability for rotational velocities exceeding some critical value

  19. Driving forward in reverse

    International Nuclear Information System (INIS)

    We describe the use of TILLING in Lotus japonicus and the development of deletion (De)-TILLING in Medicago truncatula. The evolution of RevGenUK has been driven by the development of reverse genetics technologies in these two model legumes and Brassica rapa, which functions as a translational species for brassica crops. TILLING and De-TILLING, are underpinned by populations of plants mutagenised with either EMS (that causes point mutations) or fast neutrons (that cause deletions) respectively. They permit the isolation of either allelic series of mutants or knockouts. Mutation detection will be developed from a number of independent gel-based systems to be carried out on a single platform - capillary electrophoresis. We are currently TILLING in both model legumes, but these developments will be applied to all three species. The resource will develop an open source database-driven system to support laboratory information management, analysis and the cataloguing of mutants in a genome context across all the species. (author)

  20. Driving Forward in Reverse

    International Nuclear Information System (INIS)

    We describe the use of TILLING in Lotus japonicus and the development of deletion (De)-TILLING in Medicago truncatula. The evolution of RevGen UK has been driven by the development of reverse genetics technologies in these two model legumes and Brassica rapa, which functions as a translational species for brassica crops. TILLING and De-TILLING are underpinned by populations of plants mutagenized with either EMS (that causes point mutations) or fast neutrons (that cause deletions), respectively. They permit the isolation of either allelic series of mutants or knockouts. Mutation detection will be developed from a number of independent gel-based systems to be carried out on a single platform - capillary electrophoresis. We are currently TILLING in both model legumes, but these developments will be applied to all three species. The resource will develop an open source database-driven system to support laboratory information management, analysis and the cataloguing of mutants in a genome context across all the species. (author)

  1. Time Reversal Violation

    Energy Technology Data Exchange (ETDEWEB)

    Quinn, H; /SLAC

    2009-01-27

    This talk briefly reviews three types of time-asymmetry in physics, which I classify as universal, macroscopic and microscopic. Most of the talk is focused on the latter, namely the violation of T-reversal invariance in particle physics theories. In sum tests of microscopic T-invariance, or observations of its violation, are limited by the fact that, while we can measure many processes, only in very few cases can we construct a matched pair of process and inverse process and observe it with sufficient sensitivity to make a test. In both the cases discussed here we can achieve an observable T violation making use of flavor tagging, and in the second case also using the quantum properties of an antisymmetric coherent state of two B mesons to construct a CP-tag. Both these tagging properties depend only on very general properties of the flavor and/or CP quantum numbers and so provide model independent tests for T-invariance violations. The microscopic laws of physics are very close to T-symmetric. There are small effects that give CP- and T-violating processes in three-generation-probing weak decays. Where a T-violating observable can be constructed we see the relationships between T-violation and CP-violation expected in a CPT conserving theory. These microscopic effects are unrelated to the 'arrow of time' that is defined by increasing entropy, or in the time direction defined by the expansion of our Universe.

  2. A New Vector Frequency Modulation Method for Power Conversion Circuits

    Science.gov (United States)

    Takano, Akio

    This paper presents an excellent PWM method for power conversion circuits. The proposed method is called a Vector Frequency Modulation (VFM) in this paper. VFM does not belong to any conventional PWM methods. Although an idea of space voltage vector is employed in VFM, any traditional equations to calculate the periods of the voltage vectors are not used. The voltage vectors are classified into two groups, zero vectors and non-zero ones. Instead of the complicated equations, a very simple algorithm is employed in VFM. One vector period is fixed and the zero vectors are distributed among the non-zero vectors in the ratio determined by the command voltage or frequency. The behavior of VFM is performed in software and any modulation-wave oscillators, comparators and up-down counters are not needed. At first, a reversible chopper is modulated by VFM and a 2kW DC motor is driven by the chopper. The motor speed is regulated by modern control theory. Next, a three-phase inverter is modulated by VFM and a 2.2kW induction motor is driven by the inverter. Experimental results are shown to prove that VFM is actually useful for power conversion circuits.

  3. The Emergence of a Circuit Model for Addiction.

    Science.gov (United States)

    Lüscher, Christian

    2016-07-01

    Addiction is a disease of altered behavior. Addicts use drugs compulsively and will continue to do so despite negative consequences. Even after prolonged periods of abstinence, addicts are at risk of relapse, particularly when cues evoke memories that are associated with drug use. Rodent models mimic many of the core components of addiction, from the initial drug reinforcement to cue-associated relapse and continued drug intake despite negative consequences. Rodent models have also enabled unprecedented mechanistic insight into addiction, revealing plasticity of glutamatergic synaptic transmission evoked by the strong activation of mesolimbic dopamine-a defining feature of all addictive drugs-as a neural substrate for these drug-adaptive behaviors. Cell type-specific optogenetic manipulations have allowed both identification of the relevant circuits and design of protocols to reverse drug-evoked plasticity and to establish links of causality with drug-adaptive behaviors. The emergence of a circuit model for addiction will open the door for novel therapies, such as deep brain stimulation. PMID:27145911

  4. Light Sources and Ballast Circuits

    Science.gov (United States)

    Yorifuji, Takashi; Sakai, Makoto; Yasuda, Takeo; Maehara, Akiyoshi; Okada, Atsunori; Gouriki, Takeshi; Mannami, Tomoaki

    discharge models were reported. Further, studies on ultra high-pressure mercury lamps as light sources for projectors are becoming the mainstream of HID lamp related researches. For high-pressure sodium lamps, many studies on plant growing and pest control utilizing low insect attracting aspects were also reported in 2006. Additionally, for discharge lamps, the minimum sustaining electric power for arc tubes employed in electrode-less compact fluorescent lamps was investigated. For Hg-free rare-gas fluorescent lamps, a luminance of 10,000cd/m2 was attained by a 1 meter-long external duplex spiral electrode prototype using Xe/Ne barrier discharge. As to startup circuits, the commercialization of energy saving and high value added products mainly associated with fluorescent lamps and HID lamps are becoming common. Further, the miniaturization of startup circuits for self electronic-ballasted lamps has advanced. Speaking of the overall light sources and startup circuits in 2006 and with the enforcement of RoHS in Europe in July, the momentum toward hazardous substance-free and energy saving initiatives has been enhanced from the perspective of protecting the global environment. It is anticipated that similar restrictions will be globally enforced in the future.

  5. A new circuit model of HgCdTe photodiode for SPICE simulation of integrated IRFPA

    Science.gov (United States)

    Saxena, Raghvendra Sahai; Saini, Navneet Kaur; Bhan, R. K.; Sharma, R. K.

    2014-11-01

    We propose a novel sub circuit model to simulate HgCdTe infrared photodiodes in a circuit simulator, like PSPICE. We have used two diodes of opposite polarity in parallel to represent the forward biased and the reverse biased behavior of an HgCdTe photodiode separately. We also connected a resistor in parallel with them to represent the ohmic shunt and a constant current source to represent photocurrent. We show that by adjusting the parameters in standard diode models and the resistor and current values, we could actually fit the measured data of our various HgCdTe photodiodes having different characteristics. This is a very efficient model that can be used for simulation of readout integrated circuit (ROIC) for HgCdTe IR photodiode arrays. This model also allows circuit level Monte Carlo simulation on a complete IRFPA at a single circuit simulator platform to estimate the non-uniformity for given processes of HgCdTe device fabrication and Si ROIC fabrication.

  6. Enzyme recovery using reversed micelles.

    NARCIS (Netherlands)

    Dekker, M.

    1990-01-01

    The objective of this study was to develop a liquid-liquid extraction process for the recovery of extracellular enzymes. The potentials of reaching this goal by using reversed micelles in an organic solvent have been investigated.Reversed micelles are aggregates of surfactant molecules containing an

  7. Towards a Reversible Functional Language

    DEFF Research Database (Denmark)

    Yokoyama, Tetsuo; Axelsen, Holger Bock; Glück, Robert

    2011-01-01

    We identify concepts of reversibility for a functional language by means of a set of semantic rules with specific properties. These properties include injectivity along with local backward determinism, an important operational property for an efficient reversible language. We define a concise rev...

  8. Scope of Reversible Engineering at Gate-Level : Fault - Tolerant Combinational Adders

    Directory of Open Access Journals (Sweden)

    M.Bharathi

    2012-05-01

    Full Text Available Reversible engineering has been one of the thrust areas ensuring that continual process of the innovation trends that explore and sustain the resources of the nature. This reversible engineering is used in many fields like quantum computing, low power CMOS design, nanotechnology, optical information processing, digital signal processing, cryptography, etc. These are the digital domain implementations of Reversible and Fault-Tolerant logic gates. Any arbitrary Boolean function can be synthesized by using the proposed parity preserving reversible gates. Not only the possibility of detecting errors is induced inherently in the proposed high speed adders at their output side but also it allows any fault that affects no more than a single signal that is detectable. The fault tolerant reversible full adder circuits are realized by using two IG gates only. The derived fault tolerant full adder is used for designing other arithmetic- logic circuit by using it as fundamental building block. The proposed reversible gate is designed to have less hardwarecomplexity and efficiecyt in terms of gate count, garbage outputs and constant input. In this paper, we design BCD adder using carry select logic, Carry-select and Bypass adders using FG gates, and newly designed TG gates.

  9. Scope of Reversible Engineering at Gate-Level : Fault - Tolerant Combinational Adders

    Directory of Open Access Journals (Sweden)

    M.Bharathi

    2012-04-01

    Full Text Available Reversible engineering has been one of the thrust areas ensuring that continual process of the innovation trends that explore and sustain the resources of the nature. This reversible engineering is used in many fields like quantum computing, low power CMOS design, nanotechnology, optical information processing, digital signal processing, cryptography, etc. These are the digital domain implementations of Reversible and Fault-Tolerant logic gates. Any arbitrary Boolean function can be synthesized by using the proposed parity preserving reversible gates. Not only the possibility of detecting errors is induced inherently in the proposed high speed adders at their output side but also it allows any fault that affects no more than a single signal that is detectable. The fault tolerant reversible full adder circuits are realized by using two IG gates only. The derived fault tolerant full adder is used for designing other arithmetic- logic circuit by using it as fundamental building block. The proposed reversible gate is designed to have less hardware complexity and efficiecyt in terms of gate count, garbage outputs and constant input. In this paper, we design BCD adder using carry select logic, Carry-select and Bypass adders using FG gates, and newly designed TG gates.

  10. A Typology of Reverse Innovation

    DEFF Research Database (Denmark)

    von Zedtwitz, Max; Corsi, Simone; Søberg, Peder Veng;

    2015-01-01

    secondary market introduction, this study expands the espoused definition of reverse innovation beyond its market-introduction focus with reversals in the flow of innovation in the ideation and product development phases. Recognizing that each phase can take place in different geographical locations......Reverse innovation commonly refers to an innovation initially launched in a developing country and later introduced to an advanced country. Adopting a linear innovation model with the four sequential phases of concept ideation, product development, primary target market introduction, and subsequent......, the paper then introduces a typology of global innovation with 16 different types of innovation flows between advanced and emerging countries, 10 of which are reverse innovation flows. The latter are further differentiated into weak and strong reverse innovation, depending on the number of innovation phases...

  11. Functional molecules in electronic circuits.

    Science.gov (United States)

    Weibel, Nicolas; Grunder, Sergio; Mayor, Marcel

    2007-08-01

    Molecular electronics is a fascinating field of research contributing to both fundamental science and future technological achievements. A promising starting point for molecular devices is to mimic existing electronic functions to investigate the potential of molecules to enrich and complement existing electronic strategies. Molecules designed and synthesized to be integrated into electronic circuits and to perform an electronic function are presented in this article. The focus is set in particular on rectification and switching based on molecular devices, since the control over these two parameters enables the assembly of memory units, likely the most interesting and economic application of molecular based electronics. Both historical and contemporary solutions to molecular rectification are discussed, although not exhaustively. Several examples of integrated molecular switches that respond to light are presented. Molecular switches responding to an electrochemical signal are also discussed. Finally, supramolecular and molecular systems with intuitive application potential as memory units due to their hysteretic switching are highlighted. Although a particularly attractive feature of molecular electronics is its close cooperation with neighbouring disciplines, this article is written from the point of view of a chemist. Although the focus here is largely on molecular considerations, innovative contributions from physics, electro engineering, nanotechnology and other scientific disciplines are equally important. However, the ability of the chemist to correlate function with structure, to design and to provide tailor-made functional molecules is central to molecular electronics. PMID:17637951

  12. Ion implanted dielectric elastomer circuits

    Science.gov (United States)

    O'Brien, Benjamin M.; Rosset, Samuel; Anderson, Iain A.; Shea, Herbert R.

    2013-06-01

    Starfish and octopuses control their infinite degree-of-freedom arms with panache—capabilities typical of nature where the distribution of reflex-like intelligence throughout soft muscular networks greatly outperforms anything hard, heavy, and man-made. Dielectric elastomer actuators show great promise for soft artificial muscle networks. One way to make them smart is with piezo-resistive Dielectric Elastomer Switches (DES) that can be combined with artificial muscles to create arbitrary digital logic circuits. Unfortunately there are currently no reliable materials or fabrication process. Thus devices typically fail within a few thousand cycles. As a first step in the search for better materials we present a preliminary exploration of piezo-resistors made with filtered cathodic vacuum arc metal ion implantation. DES were formed on polydimethylsiloxane silicone membranes out of ion implanted gold nano-clusters. We propose that there are four distinct regimes (high dose, above percolation, on percolation, low dose) in which gold ion implanted piezo-resistors can operate and present experimental results on implanted piezo-resistors switching high voltages as well as a simple artificial muscle inverter. While gold ion implanted DES are limited by high hysteresis and low sensitivity, they already show promise for a range of applications including hysteretic oscillators and soft generators. With improvements to implanter process control the promise of artificial muscle circuitry for soft smart actuator networks could become a reality.

  13. EMI-resilient amplifier circuits

    CERN Document Server

    van der Horst, Marcel J; Linnenbank, André C

    2014-01-01

    This book enables circuit designers to reduce the errors introduced by the fundamental limitations and electromagnetic interference (EMI) in negative-feedback amplifiers.  The authors describe a systematic design approach for application specific negative-feedback amplifiers, with specified signal-to-error ratio (SER).  This approach enables designers to calculate noise, bandwidth, EMI, and the required bias parameters of the transistors used in  application specific amplifiers in order to meet the SER requirements.   ·         Describes design methods that incorporate electromagnetic interference (EMI) in the design of application specific negative-feedback amplifiers; ·         Provides designers with a structured methodology to avoid the use of trial and error in meeting signal-to-error ratio (SER) requirements; ·         Equips designers to increase EMI immunity of the amplifier itself, thus avoiding filtering at the input, reducing the number of components and avoiding detr...

  14. Brainstem Circuits Regulating Gastric Function

    Science.gov (United States)

    Travagli, R. Alberto; Hermann, Gerlinda E.; Browning, Kirsteen N.; Rogers, Richard C.

    2011-01-01

    Brainstem parasympathetic circuits that modulate digestive functions of the stomach are comprised of afferent vagal fibers, neurons of the nucleus tractus solitarius (NTS), and the efferent fibers originating in the dorsal motor nucleus of the vagus (DMV). A large body of evidence has shown that neuronal communications between the NTS and the DMV are plastic and are regulated by the presence of a variety of neurotransmitters and circulating hormones as well as the presence, or absence, of afferent input to the NTS. These data suggest that descending central nervous system inputs as well as hormonal and afferent feedback resulting from the digestive process can powerfully regulate vago-vagal reflex sensitivity. This paper first reviews the essential “static” organization and function of vago-vagal gastric control neurocircuitry. We then present data on the opioidergic modulation of NTS connections with the DMV as an example of the “gating” of these reflexes, i.e., how neurotransmitters, hormones, and vagal afferent traffic can make an otherwise static autonomic reflex highly plastic. PMID:16460274

  15. Microcontroller based Integrated Circuit Tester

    Directory of Open Access Journals (Sweden)

    Yousif Taha Yousif Elamin

    2015-02-01

    Full Text Available The digital integrated circuit (IC tester is implemented by using the ATmega32 microcontroller . The microcontroller processes the inputs and outputs and displays the results on a Liquid Crystal Display (LCD. The basic function of the digital IC tester is to test a digital IC for correct logical functioning as described in the truth table and/or function table. The designed model can test digital ICs having 14 pins. Since it is programmable, any number of ICs can be tested . This model applies the necessary signals to the inputs of the IC, monitoring the outputs at each stage and comparing them with the outputs in the truth table. Any discrepancy in the functioning of the IC results in a fail indication, displays the faulty and good gates on the LCD. The testing procedure is accomplished with the help of keypad keys present on the main board design. The test has been accomplished with most commonly used digital IC's, mainly belonging to the 74 series. Digital IC tester tests three samples of IC's ( NAND, NOT, NOR. The design is flexible . We can add extra IC bases and subroutines to test any other IC in the 74 series.

  16. 49 CFR 236.720 - Circuit, common return.

    Science.gov (United States)

    2010-10-01

    ... Circuit, common return. A term applied where one wire is used for the return of more than one electric circuit. ... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, common return. 236.720 Section...

  17. Reversed polarity patches at the CMB and geomagnetic field reversal

    Institute of Scientific and Technical Information of China (English)

    XU; Wenyao(徐文耀); WEI; Zigang(魏自刚)

    2002-01-01

    The International Geomagnetic Reference Field models (IGRF) for 1900-2000 are used to calculate the geomagnetic field distribution in the Earth' interior from the ground surface to the core-mantle boundary (CMB) under the assumption of insulated mantle. Four reversed polarity patches, as one of the most important features of the CMB field, are revealed. Two patches with +Z polarity (downward) at the southern African and the southern American regions stand out against the background of -Z polarity (upward) in the southern hemisphere, and two patches of -Z polarity at the North Polar and the northern Pacific regions stand out against the +Z background in the northern hemisphere. During the 1900-2000 period the southern African (SAF) patch has quickly drifted westward at a speed of 0.2-0.3°/a; meanwhile its area has expanded 5 times, and the magnetic flux crossing the area has intensified 30 times. On the other hand, other three patches show little if any change during this 100-year period. Extending upward, each of the reversed polarity patches at the CMB forms a chimney-shaped "reversed polarity column" in the mantle with the bottom at the CMB. The height of the SAF column has grown rapidly from 200km in 1900 to 900km in 2000. If the column grows steadily at the same rate in the future, its top will reach to the ground surface in 600-700 years. And then a reversed polarity patch will be observed at the Earth's surface, which will be an indicator of the beginning of a magnetic field reversal. On the basis of this study, one can describe the process of a geomagnetic polarity reversal, the polarity reversal may be observed firstly in one or several local regions; then the areas of these regions expand, and at the same time, other new reversed polarity regions may appear. Thus several poles may exist during a polarity reversal.

  18. Reversible computing and cellular automata - A survey

    OpenAIRE

    Morita, Kenichi

    2008-01-01

    Reversible computing is a paradigm where computing models are defined so that they reflect physical reversibility, one of the fundamental microscopic physical property of Nature. In this survey/tutorial paper, we discuss how computation can be carried out in a reversible system, how a universal reversible computer can be constructed by reversible logic elements, and how such logic elements are related to reversible physical phenomena. We shall see that, in reversible systems, computation can ...

  19. Visualization of circuit card electromagnetic fields

    Science.gov (United States)

    Zwillinger, Daniel

    1995-01-01

    Circuit boards are used in nearly every electrical appliance. Most board failures cause differing currents in the circuit board traces and components. This causes the circuit board to radiate a differing electromagnetic field. Imaging this radiated field, which is equivalent to measuring the field, could be used for error detection. Using estimates of the fields radiated by a low power digital circuit board, properties of known materials, and available equipment, we determined how well the following technologies could be used to visualize circuit board electromagnetic fields (prioritized by promise): electrooptical techniques, magnetooptical techniques, piezoelectric techniques, thermal techniques, and electrodynamic force technique. We have determined that sensors using the electrooptical effect (Pockels effect) appear to be sufficiently sensitive for use in a circuit board imaging system. Sensors utilizing the magnetooptical effect may also be adequate for this purpose, when using research materials. These sensors appear to be capable of achieving direct broadband measurements. We also reviewed existing electromagnetic field sensors. Only one of the sensors (recently patented) was specifically designed for circuit board measurements.

  20. Performance Analysis of Modified QSERL Circuit

    Directory of Open Access Journals (Sweden)

    Shipra Upadhyay

    2013-08-01

    Full Text Available This work is based on a new approach for minimizing energy consumption in quasi static energy recoverylogic (QSERL circuit which involves optimization by removing the non adiabatic losses completely.Energy recovering circuitry based on adiabatic principles is a promising technique leading towards lowpowerhigh performance circuit design. The efficiency of such circuits may be increased by reducing theadiabatic and non-adiabatic losses drawn by them during the charging and recovery operations. In thispaper, performance of the proposed logic style is analyzed and compared with CMOS in theirrepresentative inverters, gates, flip flops and adder circuits. All the circuits were simulated by VIRTUOSOSPECTRE simulator of Cadence in 0.18μm technology. In our proposed inverter the energy efficiency hasbeen improved to almost 30% & 20% upto 20MHz and 20fF external load capacitance in comparison toCMOS & QSERL circuits respectively. Our proposed circuit provides energy efficient performance up to100 MHz and thus it has proven to be used in high-performance VLSI circuitry.