Growth of light-emitting SiGe heterostructures on strained silicon-on-insulator substrates with a thin oxide layer

Energy Technology Data Exchange (ETDEWEB)

Baidakova, N. A., E-mail: banatale@ipmras.ru [Russian Academy of Sciences, Institute for Physics of Microstructures (Russian Federation); Bobrov, A. I. [University of Nizhny Novgorod (Russian Federation); Drozdov, M. N.; Novikov, A. V. [Russian Academy of Sciences, Institute for Physics of Microstructures (Russian Federation); Pavlov, D. A. [University of Nizhny Novgorod (Russian Federation); Shaleev, M. V.; Yunin, P. A.; Yurasov, D. V.; Krasilnik, Z. F. [Russian Academy of Sciences, Institute for Physics of Microstructures (Russian Federation)

2015-08-15

The possibility of using substrates based on “strained silicon on insulator” structures with a thin (25 nm) buried oxide layer for the growth of light-emitting SiGe structures is studied. It is shown that, in contrast to “strained silicon on insulator” substrates with a thick (hundreds of nanometers) oxide layer, the temperature stability of substrates with a thin oxide is much lower. Methods for the chemical and thermal cleaning of the surface of such substrates, which make it possible to both retain the elastic stresses in the thin Si layer on the oxide and provide cleaning of the surface from contaminating impurities, are perfecte. It is demonstrated that it is possible to use the method of molecular-beam epitaxy to grow light-emitting SiGe structures of high crystalline quality on such substrates.

A Novel Non-Destructive Silicon-on-Insulator Nonvolatile Memory - LDRD 99-0750 Final Report

Energy Technology Data Exchange (ETDEWEB)

DRAPER,BRUCE L.; FLEETWOOD,D. M.; MEISENHEIMER,TIMOTHY L.; MURRAY,JAMES R.; SCHWANK,JAMES R.; SHANEYFELT,MARTY R.; SMITH,PAUL M.; VANHEUSDEN,KAREL J.; WARREN,WILLIAM L.

1999-11-01

Defects in silicon-on-insulator (SOI) buried oxides are normally considered deleterious to device operation. Similarly, exposing devices to hydrogen at elevated temperatures often can lead to radiation-induced charge buildup. However, in this work, we take advantage of as-processed defects in SOI buried oxides and moderate temperature hydrogen anneals to generate mobile protons in the buried oxide to form the basis of a ''protonic'' nonvolatile memory. Capacitors and fully-processed transistors were fabricated. SOI buried oxides are exposed to hydrogen at moderate temperatures using a variety of anneal conditions to optimize the density of mobile protons. A fast ramp cool down anneal was found to yield the maximum number of mobile protons. Unfortunately, we were unable to obtain uniform mobile proton concentrations across a wafer. Capacitors were irradiated to investigate the potential use of protonic memories for space and weapon applications. Irradiating under a negative top-gate bias or with no applied bias was observed to cause little degradation in the number of mobile protons. However, irradiating to a total dose of 100 krad(SiO{sub 2}) under a positive top-gate bias caused approximately a 100% reduction in the number of mobile protons. Cycling capacitors up to 10{sup 4} cycles had little effect on the switching characteristics. No change in the retention characteristics were observed for times up to 3 x 10{sup 4} s for capacitors stored unbiased at 200 C. These results show the proof-of-concept for a protonic nonvolatile memory. Two memory architectures are proposed for a protonic non-destructive, nonvolatile memory.

A silicon-on-insulator vertical nanogap device for electrical transport measurements in aqueous electrolyte solution

Energy Technology Data Exchange (ETDEWEB)

Strobel, Sebastian [Walter Schottky Institut, Technische Universitaet Muenchen, Am Coulombwall, D-85748 Garching (Germany); Arinaga, Kenji [Walter Schottky Institut, Technische Universitaet Muenchen, Am Coulombwall, D-85748 Garching (Germany); Hansen, Allan [Walter Schottky Institut, Technische Universitaet Muenchen, Am Coulombwall, D-85748 Garching (Germany); Tornow, Marc [Walter Schottky Institut, Technische Universitaet Muenchen, Am Coulombwall, D-85748 Garching (Germany)

2007-07-25

A novel concept for metal electrodes with few 10 nm separation for electrical conductance measurements in an aqueous electrolyte environment is presented. Silicon-on-insulator (SOI) material with 10 nm buried silicon dioxide serves as a base substrate for the formation of SOI plateau structures which, after recess-etching the thin oxide layer, thermal oxidation and subsequent metal thin film evaporation, feature vertically oriented nanogap electrodes at their exposed sidewalls. During fabrication only standard silicon process technology without any high-resolution nanolithographic techniques is employed. The vertical concept allows an array-like parallel processing of many individual devices on the same substrate chip. As analysed by cross-sectional TEM analysis the devices exhibit a well-defined material layer architecture, determined by the chosen material thicknesses and process parameters. To investigate the device in aqueous solution, we passivated the sample surface by a polymer layer, leaving a micrometre-size fluid access window to the nanogap region only. First current-voltage characteristics of a 65 nm gap device measured in 60 mM buffer solution reveal excellent electrical isolation behaviour which suggests applications in the field of biomolecular electronics in a natural environment.

Hydrogen interactions with silicon-on-insulator materials

NARCIS (Netherlands)

Rivera de Mena, A.J.

2003-01-01

The booming of microelectronics in recent decades has been made possible by the excellent properties of the Si/SiO2 interface in oxide on silicon systems.. This semiconductor/insulator combination has proven to be of great value for the semiconductor industry. It has made it possible to continuously

Silicon on insulator self-aligned transistors

Science.gov (United States)

McCarthy, Anthony M.

2003-11-18

A method for fabricating thin-film single-crystal silicon-on-insulator (SOI) self-aligned transistors. Standard processing of silicon substrates is used to fabricate the transistors. Physical spaces, between the source and gate, and the drain and gate, introduced by etching the polysilicon gate material, are used to provide connecting implants (bridges) which allow the transistor to perform normally. After completion of the silicon substrate processing, the silicon wafer is bonded to an insulator (glass) substrate, and the silicon substrate is removed leaving the transistors on the insulator (glass) substrate. Transistors fabricated by this method may be utilized, for example, in flat panel displays, etc.

Ultra-low-loss inverted taper coupler for silicon-on-insulator ridge waveguide

DEFF Research Database (Denmark)

Pu, Minhao; Liu, Liu; Ou, Haiyan

2010-01-01

An ultra-low-loss coupler for interfacing a silicon-on-insulator ridge waveguide and a single-mode fiber in both polarizations is presented. The inverted taper coupler, embedded in a polymer waveguide, is optimized for both the transverse-magnetic and transverse-electric modes through tapering...... the width of the silicon-on-insulator waveguide from 450 nm down to less than 15 nm applying a thermal oxidation process. Two inverted taper couplers are integrated with a 3-mm long silicon-on-insulator ridge waveguide in the fabricated sample. The measured coupling losses of the inverted taper coupler...... for transverse-magnetic and transverse-electric modes are ~0.36 dB and ~0.66 dB per connection, respectively....

Space and military radiation effects in silicon-on-insulator devices

International Nuclear Information System (INIS)

Schwank, J.R.

1996-09-01

Advantages in transient ionizing and single-event upset (SEU) radiation hardness of silicon-on-insulator (SOI) technology spurred much of its early development. Both of these advantages are a direct result of the reduced charge collection volume inherent to SOI technology. The fact that SOI transistor structures do not include parasitic n-p-n-p paths makes them immune to latchup. Even though considerable improvement in transient and single-event radiation hardness can be obtained by using SOI technology, there are some attributes of SOI devices and circuits that tend to limit their overall hardness. These attributes include the bipolar effect that can ultimately reduce the hardness of SOI ICs to SEU and transient ionizing radiation, and charge buildup in buried and sidewall oxides that can degrade the total-dose hardness of SOI devices. Nevertheless, high-performance SOI circuits can be fabricated that are hardened to both space and nuclear radiation environments, and radiation-hardened systems remain an active market for SOI devices. The effects of radiation on SOI MOS devices are reviewed

High-density oxidized porous silicon

International Nuclear Information System (INIS)

Gharbi, Ahmed; Souifi, Abdelkader; Remaki, Boudjemaa; Halimaoui, Aomar; Bensahel, Daniel

2012-01-01

We have studied oxidized porous silicon (OPS) properties using Fourier transform infraRed (FTIR) spectroscopy and capacitance–voltage C–V measurements. We report the first experimental determination of the optimum porosity allowing the elaboration of high-density OPS insulators. This is an important contribution to the research of thick integrated electrical insulators on porous silicon based on an optimized process ensuring dielectric quality (complete oxidation) and mechanical and chemical reliability (no residual pores or silicon crystallites). Through the measurement of the refractive indexes of the porous silicon (PS) layer before and after oxidation, one can determine the structural composition of the OPS material in silicon, air and silica. We have experimentally demonstrated that a porosity approaching 56% of the as-prepared PS layer is required to ensure a complete oxidation of PS without residual silicon crystallites and with minimum porosity. The effective dielectric constant values of OPS materials determined from capacitance–voltage C–V measurements are discussed and compared to FTIR results predictions. (paper)

A novel partial SOI LDMOSFET with periodic buried oxide for breakdown voltage and self heating effect enhancement

Science.gov (United States)

Jamali Mahabadi, S. E.; Rajabi, Saba; Loiacono, Julian

2015-09-01

In this paper a partial silicon on insulator (PSOI) lateral double diffused metal oxide semiconductor field effect transistor (LDMOSFET) with periodic buried oxide layer (PBO) for enhancing breakdown voltage (BV) and self-heating effects (SHEs) is proposed for the first time. This new structure is called periodic buried oxide partial silicon on insulator (PBO-PSOI). In this structure, periodic small pieces of SiO2 were used as the buried oxide (BOX) layer in PSOI to modulate the electric field in the structure. It was demonstrated that the electric field is distributed more evenly by producing additional electric field peaks, which decrease the common peaks near the drain and gate junctions in the PBO-PSOI structure. Hence, the area underneath the electric field curve increases which leads to higher breakdown voltage. Also a p-type Si window was introduced in the source side to force the substrate to share the vertical voltage drop, leading to a higher vertical BV. Furthermore, the Si window under the source and those between periodic pieces of SiO2 create parallel conduction paths between the active layer and substrate thereby alleviating the SHEs. Simulations with the two dimensional ATLAS device simulator from the Silvaco suite of simulation tools show that the BV of PBO-PSOI is 100% higher than that of the conventional partial SOI (C-PSOI) structure. Furthermore the PBO-PSOI structure alleviates SHEs to a greater extent than its C-PSOI counterpart. The achieved drain current for the PBO-PSOI structure (100 μA), at drain-source voltage of VDS = 100 V and gate-source voltage of VGS = 25 V, is shown to be significantly larger than that in C-PSOI and fully depleted SOI (FD-SOI) structures (87 μA and 51 μA respectively). Drain current can be further improved at the expense of BV by increasing the doping of the drift region.

Electrical analysis of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors on flexible bulk mono-crystalline silicon

KAUST Repository

Ghoneim, Mohamed T.; Rojas, Jhonathan Prieto; Young, Chadwin D.; Bersuker, Gennadi; Hussain, Muhammad Mustafa

2015-01-01

We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin (25 μm) silicon fabric which is peeled off using a CMOS compatible process from a standard

Silicon dioxide with a silicon interfacial layer as an insulating gate for highly stable indium phosphide metal-insulator-semiconductor field effect transistors

Science.gov (United States)

Kapoor, V. J.; Shokrani, M.

1991-01-01

A novel gate insulator consisting of silicon dioxide (SiO2) with a thin silicon (Si) interfacial layer has been investigated for high-power microwave indium phosphide (InP) metal-insulator-semiconductor field effect transistors (MISFETs). The role of the silicon interfacial layer on the chemical nature of the SiO2/Si/InP interface was studied by high-resolution X-ray photoelectron spectroscopy. The results indicated that the silicon interfacial layer reacted with the native oxide at the InP surface, thus producing silicon dioxide, while reducing the native oxide which has been shown to be responsible for the instabilities in InP MISFETs. While a 1.2-V hysteresis was present in the capacitance-voltage (C-V) curve of the MIS capacitors with silicon dioxide, less than 0.1 V hysteresis was observed in the C-V curve of the capacitors with the silicon interfacial layer incorporated in the insulator. InP MISFETs fabricated with the silicon dioxide in combination with the silicon interfacial layer exhibited excellent stability with drain current drift of less than 3 percent in 10,000 sec, as compared to 15-18 percent drift in 10,000 sec for devices without the silicon interfacial layer. High-power microwave InP MISFETs with Si/SiO2 gate insulators resulted in an output power density of 1.75 W/mm gate width at 9.7 GHz, with an associated power gain of 2.5 dB and 24 percent power added efficiency.

Thermal radiative near field transport between vanadium dioxide and silicon oxide across the metal insulator transition

Energy Technology Data Exchange (ETDEWEB)

Menges, F.; Spieser, M.; Riel, H.; Gotsmann, B., E-mail: bgo@zurich.ibm.com [IBM Research-Zurich, Säumerstrasse 4, CH-8803 Rüschlikon (Switzerland); Dittberner, M. [IBM Research-Zurich, Säumerstrasse 4, CH-8803 Rüschlikon (Switzerland); Photonics Laboratory, ETH Zurich, 8093 Zurich (Switzerland); Novotny, L. [Photonics Laboratory, ETH Zurich, 8093 Zurich (Switzerland); Passarello, D.; Parkin, S. S. P. [IBM Almaden Research Center, 650 Harry Road, San Jose, California 95120 (United States)

2016-04-25

The thermal radiative near field transport between vanadium dioxide and silicon oxide at submicron distances is expected to exhibit a strong dependence on the state of vanadium dioxide which undergoes a metal-insulator transition near room temperature. We report the measurement of near field thermal transport between a heated silicon oxide micro-sphere and a vanadium dioxide thin film on a titanium oxide (rutile) substrate. The temperatures of the 15 nm vanadium dioxide thin film varied to be below and above the metal-insulator-transition, and the sphere temperatures were varied in a range between 100 and 200 °C. The measurements were performed using a vacuum-based scanning thermal microscope with a cantilevered resistive thermal sensor. We observe a thermal conductivity per unit area between the sphere and the film with a distance dependence following a power law trend and a conductance contrast larger than 2 for the two different phase states of the film.

Fabrication of heterojunction solar cells by improved tin oxide deposition on insulating layer

Science.gov (United States)

Feng, Tom; Ghosh, Amal K.

1980-01-01

Highly efficient tin oxide-silicon heterojunction solar cells are prepared by heating a silicon substrate, having an insulating layer thereon, to provide a substrate temperature in the range of about 300.degree. C. to about 400.degree. C. and thereafter spraying the so-heated substrate with a solution of tin tetrachloride in a organic ester boiling below about 250.degree. C. Preferably the insulating layer is naturally grown silicon oxide layer.

Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications

Science.gov (United States)

Schwank, James R.; Shaneyfelt, Marty R.; Draper, Bruce L.; Dodd, Paul E.

2001-01-01

A silicon-on-insulator (SOI) field-effect transistor (FET) and a method for making the same are disclosed. The SOI FET is characterized by a source which extends only partially (e.g. about half-way) through the active layer wherein the transistor is formed. Additionally, a minimal-area body tie contact is provided with a short-circuit electrical connection to the source for reducing floating body effects. The body tie contact improves the electrical characteristics of the transistor and also provides an improved single-event-upset (SEU) radiation hardness of the device for terrestrial and space applications. The SOI FET also provides an improvement in total-dose radiation hardness as compared to conventional SOI transistors fabricated without a specially prepared hardened buried oxide layer. Complementary n-channel and p-channel SOI FETs can be fabricated according to the present invention to form integrated circuits (ICs) for commercial and military applications.

Analysis of OFF-state and ON-state performance in a silicon-on-insulator power MOSFET with a low-k dielectric trench

International Nuclear Information System (INIS)

Wang Zhigang; Zhang Bo; Li Zhaoji

2013-01-01

A novel silicon-on-insulator (SOI) MOSFET with a variable low-k dielectric trench (LDT MOSFET) is proposed and its performance and characteristics are investigated. The trench in the drift region between drain and source is filled with low-k dielectric to extend the effective drift region. At OFF state, the low-k dielectric trench (LDT) can sustain high voltage and enhance the dielectric field due to the accumulation of ionized charges. At the same time, the vertical dielectric field in the buried oxide can also be enhanced by these ionized charges. Additionally, ON-state analysis of LDT MOSFET demonstrates excellent forward characteristics, such as low gate-to-drain charge density ( 2 ) and a robust safe operating area (0–84 V). (semiconductor devices)

Electrical analysis of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors on flexible bulk mono-crystalline silicon

KAUST Repository

Ghoneim, Mohamed T.

2015-06-01

We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin (25 μm) silicon fabric which is peeled off using a CMOS compatible process from a standard bulk mono-crystalline silicon substrate. A lifetime projection is extracted using statistical analysis of the ramping voltage (Vramp) breakdown and time dependent dielectric breakdown data. The obtained flexible MOSCAPs operational voltages satisfying the 10 years lifetime benchmark are compared to those of the control MOSCAPs, which are not peeled off from the silicon wafer. © 2014 IEEE.

A Novel Fully Depleted Air AlN Silicon-on-Insulator Metal-Oxide-Semiconductor Field Effect Transistor

International Nuclear Information System (INIS)

Yuan, Yang; Yong, Gao; Peng-Liang, Gong

2008-01-01

A novel fully depleted air AlN silicon-on-insulator (SOI) metal-oxide-semiconductor field effect transistor (MOS-FET) is presented, which can eliminate the self-heating effect and solve the problem that the off-state current of SOI MOSFETs increases and the threshold voltage characteristics become worse when employing a high thermal conductivity material as a buried layer. The simulation results reveal that the lattice temperature in normal SOI devices is 75 K higher than the atmosphere temperature, while the lattice temperature is just 4K higher than the atmosphere temperature resulting in less severe self-heating effect in air AlN SOI MOSFETs and AlN SOI MOSFETs. The on-state current of air AlN SOI MOSFETs is similar to the AlN SOI structure, and improves 12.3% more than that of normal SOI MOSFETs. The off-state current of AlN SOI is 6.7 times of normal SOI MOSFETs, while the counterpart of air AlN SOI MOSFETs is lower than that of SOI MOSFETs by two orders of magnitude. The threshold voltage change of air AlN SOI MOSFETs with different drain voltage is much less than that of AlN SOI devices, when the drain voltage is biased at 0.8 V, this difference is 28mV, so the threshold voltage change induced by employing high thermal conductivity material is cured. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

Influence of oxygen on the ion-beam synthesis of silicon carbide buried layers in silicon

International Nuclear Information System (INIS)

Artamanov, V.V.; Valakh, M.Ya.; Klyui, N.I.; Mel'nik, V.P.; Romanyuk, A.B.; Romanyuk, B.N.; Yukhimchuk, V.A.

1998-01-01

The properties of silicon structures with silicon carbide (SiC) buried layers produced by high-dose carbon implantation followed by a high-temperature anneal are investigated by Raman and infrared spectroscopy. The influence of the coimplantation of oxygen on the features of SiC buried layer formation is also studied. It is shown that in identical implantation and post-implantation annealing regimes a SiC buried layer forms more efficiently in CZ Si wafers or in Si (CZ or FZ) subjected to the coimplantation of oxygen. Thus, oxygen promotes SiC layer formation as a result of the formation of SiO x precipitates and accommodation of the volume change in the region where the SiC phase forms. Carbon segregation and the formation of an amorphous carbon film on the SiC grain boundaries are also discovered

Novel high-voltage power lateral MOSFET with adaptive buried electrodes

International Nuclear Information System (INIS)

Zhang Wen-Tong; Wu Li-Juan; Qiao Ming; Luo Xiao-Rong; Zhang Bo; Li Zhao-Ji

2012-01-01

A new high-voltage and low-specific on-resistance (R on,sp ) adaptive buried electrode (ABE) silicon-on-insulator (SOI) power lateral MOSFET and its analytical model of the electric fields are proposed. The MOSFET features are that the electrodes are in the buried oxide (BOX) layer, the negative drain voltage V d is divided into many partial voltages and the output to the electrodes is in the buried oxide layer and the potentials on the electrodes change linearly from the drain to the source. Because the interface silicon layer potentials are lower than the neighboring electrode potentials, the electronic potential wells are formed above the electrode regions, and the hole potential wells are formed in the spacing of two neighbouring electrode regions. The interface hole concentration is much higher than the electron concentration through designing the buried layer electrode potentials. Based on the interface charge enhanced dielectric layer field theory, the electric field strength in the buried layer is enhanced. The vertical electric field E I and the breakdown voltage (BV) of ABE SOI are 545 V/μm and −587 V in the 50 μm long drift region and the 1 μm thick dielectric layer, and a low R on,sp is obtained. Furthermore, the structure also alleviates the self-heating effect (SHE). The analytical model matches the simulation results. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

Vertical integration of high-Q silicon nitride microresonators into silicon-on-insulator platform.

Science.gov (United States)

Li, Qing; Eftekhar, Ali A; Sodagar, Majid; Xia, Zhixuan; Atabaki, Amir H; Adibi, Ali

2013-07-29

We demonstrate a vertical integration of high-Q silicon nitride microresonators into the silicon-on-insulator platform for applications at the telecommunication wavelengths. Low-loss silicon nitride films with a thickness of 400 nm are successfully grown, enabling compact silicon nitride microresonators with ultra-high intrinsic Qs (~ 6 × 10(6) for 60 μm radius and ~ 2 × 10(7) for 240 μm radius). The coupling between the silicon nitride microresonator and the underneath silicon waveguide is based on evanescent coupling with silicon dioxide as buffer. Selective coupling to a desired radial mode of the silicon nitride microresonator is also achievable using a pulley coupling scheme. In this work, a 60-μm-radius silicon nitride microresonator has been successfully integrated into the silicon-on-insulator platform, showing a single-mode operation with an intrinsic Q of 2 × 10(6).

SOI silicon on glass for optical MEMS

DEFF Research Database (Denmark)

Larsen, Kristian Pontoppidan; Ravnkilde, Jan Tue; Hansen, Ole

2003-01-01

and a final sealing at the interconnects can be performed using a suitable polymer. Packaged MEMS on glass are advantageous within Optical MEMS and for sensitive capacitive devices. We report on experiences with bonding SOI to Pyrex. Uniform DRIE shallow and deep etching was achieved by a combination......A newly developed fabrication method for fabrication of single crystalline Si (SCS) components on glass, utilizing Deep Reactive Ion Etching (DRIE) of a Silicon On Insulator (SOI) wafer is presented. The devices are packaged at wafer level in a glass-silicon-glass (GSG) stack by anodic bonding...... of an optimized device layout and an optimized process recipe. The behavior of the buried oxide membrane when used as an etch stop for the through-hole etch is described. No harmful buckling or fracture of the membrane is observed for an oxide thickness below 1 μm, but larger and more fragile released structures...

Design, fabrication and characterisation of advanced substrate crosstalk suppression structures in silicon on insulator substrates with buried ground planes (GPSOI)

International Nuclear Information System (INIS)

Stefanou, Stefanos

2002-07-01

Substrate crosstalk or coupling has been acknowledged to be a limiting factor in mixed signal RF integration. Although high levels of integration and high frequencies of operation are desirable for mixed mode RF and microwave circuits, they make substrate crosstalk more pronounced and may lead to circuit performance degradation. High signal isolation is dictated by requirements for low power dissipation, reduced number of components and lower integration costs for feasible system-on-chip (SoC) solutions. Substrate crosstalk suppression in ground plane silicon-on-insulator (GPSOI) substrates is investigated in this thesis. Test structures are designed and fabricated on SOI substrates with a buried WSi 2 plane that is connected to ground; hence it is called a ground plane. A Faraday cage structure that exhibits very high degrees of signal isolation is presented and compared to other SOI isolation schemes. The Faraday cage structure is shown to achieve 20 dB increased isolation in the frequency range of 0.5-50 GHz compared to published data for high resistivity (200 Ωcm) thin film SOI substrates with no ground planes, but where capacitive guard rings were used. The measurement results are analysed with the aid of planar electromagnetic simulators and compact lumped element models of all the fabricated test structures are developed. The accuracy of the lumped models is validated against experimental measurements. (author)

Buried Porous Silicon-Germanium Layers in Monocrystalline Silicon Lattices

Science.gov (United States)

Fathauer, Robert W. (Inventor); George, Thomas (Inventor); Jones, Eric W. (Inventor)

1998-01-01

Monocrystalline semiconductor lattices with a buried porous semiconductor layer having different chemical composition is discussed and monocrystalline semiconductor superlattices with a buried porous semiconductor layers having different chemical composition than that of its monocrystalline semiconductor superlattice are discussed. Lattices of alternating layers of monocrystalline silicon and porous silicon-germanium have been produced. These single crystal lattices have been fabricated by epitaxial growth of Si and Si-Ge layers followed by patterning into mesa structures. The mesa structures are strain etched resulting in porosification of the Si-Ge layers with a minor amount of porosification of the monocrystalline Si layers. Thicker Si-Ge layers produced in a similar manner emitted visible light at room temperature.

Increased carrier lifetimes in epitaxial silicon layers on buried silicon nitride produced by ion implantation

International Nuclear Information System (INIS)

Skorupa, W.; Kreissig, U.; Hensel, E.; Bartsch, H.

1984-01-01

Carrier lifetimes were measured in epitaxial silicon layers deposited on buried silicon nitride produced by high-dose nitrogen implantation at 330 keV. The values were in the range 20-200 μs. The results are remarkable taking into account the high density of crystal defects in the epitaxial layers. Comparing with other SOI technologies the measured lifetimes are higher by 1-2 orders of magnitude. (author)

Realization of a Hole-Doped Mott Insulator on a Triangular Silicon Lattice

Science.gov (United States)

Ming, Fangfei; Johnston, Steve; Mulugeta, Daniel; Smith, Tyler S.; Vilmercati, Paolo; Lee, Geunseop; Maier, Thomas A.; Snijders, Paul C.; Weitering, Hanno H.

2017-12-01

The physics of doped Mott insulators is at the heart of some of the most exotic physical phenomena in materials research including insulator-metal transitions, colossal magnetoresistance, and high-temperature superconductivity in layered perovskite compounds. Advances in this field would greatly benefit from the availability of new material systems with a similar richness of physical phenomena but with fewer chemical and structural complications in comparison to oxides. Using scanning tunneling microscopy and spectroscopy, we show that such a system can be realized on a silicon platform. The adsorption of one-third monolayer of Sn atoms on a Si(111) surface produces a triangular surface lattice with half filled dangling bond orbitals. Modulation hole doping of these dangling bonds unveils clear hallmarks of Mott physics, such as spectral weight transfer and the formation of quasiparticle states at the Fermi level, well-defined Fermi contour segments, and a sharp singularity in the density of states. These observations are remarkably similar to those made in complex oxide materials, including high-temperature superconductors, but highly extraordinary within the realm of conventional s p -bonded semiconductor materials. It suggests that exotic quantum matter phases can be realized and engineered on silicon-based materials platforms.

A multi-level capacitor-less memory cell fabricated on a nano-scale strained silicon-on-insulator

International Nuclear Information System (INIS)

Park, Jea-Gun; Kim, Seong-Je; Shin, Mi-Hee; Song, Seung-Hyun; Shim, Tae-Hun; Chung, Sung-Woong; Enomoto, Hirofumi

2011-01-01

A multi-level capacitor-less memory cell was fabricated with a fully depleted n-metal-oxide-semiconductor field-effect transistor on a nano-scale strained silicon channel on insulator (FD sSOI n-MOSFET). The 0.73% biaxial tensile strain in the silicon channel of the FD sSOI n-MOSFET enhanced the effective electron mobility to ∼ 1.7 times that with an unstrained silicon channel. This thereby enables both front- and back-gate cell operations, demonstrating eight-level volatile memory-cell operation with a 1 ms retention time and 12 μA memory margin. This is a step toward achieving a terabit volatile memory cell.

Towards nanometer-spaced silicon contacts to proteins

Science.gov (United States)

Schukfeh, Muhammed I.; Sepunaru, Lior; Behr, Pascal; Li, Wenjie; Pecht, Israel; Sheves, Mordechai; Cahen, David; Tornow, Marc

2016-03-01

A vertical nanogap device (VND) structure comprising all-silicon contacts as electrodes for the investigation of electronic transport processes in bioelectronic systems is reported. Devices were fabricated from silicon-on-insulator substrates whose buried oxide (SiO2) layer of a few nanometers in thickness is embedded within two highly doped single crystalline silicon layers. Individual VNDs were fabricated by standard photolithography and a combination of anisotropic and selective wet etching techniques, resulting in p+ silicon contacts, vertically separated by 4 or 8 nm, depending on the chosen buried oxide thickness. The buried oxide was selectively recess-etched with buffered hydrofluoric acid, exposing a nanogap. For verification of the devices’ electrical functionality, gold nanoparticles were successfully trapped onto the nanogap electrodes’ edges using AC dielectrophoresis. Subsequently, the suitability of the VND structures for transport measurements on proteins was investigated by functionalizing the devices with cytochrome c protein from solution, thereby providing non-destructive, permanent semiconducting contacts to the proteins. Current-voltage measurements performed after protein deposition exhibited an increase in the junctions’ conductance of up to several orders of magnitude relative to that measured prior to cytochrome c immobilization. This increase in conductance was lost upon heating the functionalized device to above the protein’s denaturation temperature (80 °C). Thus, the VND junctions allow conductance measurements which reflect the averaged electronic transport through a large number of protein molecules, contacted in parallel with permanent contacts and, for the first time, in a symmetrical Si-protein-Si configuration.

Towards nanometer-spaced silicon contacts to proteins

International Nuclear Information System (INIS)

Schukfeh, Muhammed I; Behr, Pascal; Tornow, Marc; Sepunaru, Lior; Li, Wenjie; Pecht, Israel; Sheves, Mordechai; Cahen, David

2016-01-01

A vertical nanogap device (VND) structure comprising all-silicon contacts as electrodes for the investigation of electronic transport processes in bioelectronic systems is reported. Devices were fabricated from silicon-on-insulator substrates whose buried oxide (SiO_2) layer of a few nanometers in thickness is embedded within two highly doped single crystalline silicon layers. Individual VNDs were fabricated by standard photolithography and a combination of anisotropic and selective wet etching techniques, resulting in p"+ silicon contacts, vertically separated by 4 or 8 nm, depending on the chosen buried oxide thickness. The buried oxide was selectively recess-etched with buffered hydrofluoric acid, exposing a nanogap. For verification of the devices’ electrical functionality, gold nanoparticles were successfully trapped onto the nanogap electrodes’ edges using AC dielectrophoresis. Subsequently, the suitability of the VND structures for transport measurements on proteins was investigated by functionalizing the devices with cytochrome c protein from solution, thereby providing non-destructive, permanent semiconducting contacts to the proteins. Current–voltage measurements performed after protein deposition exhibited an increase in the junctions’ conductance of up to several orders of magnitude relative to that measured prior to cytochrome c immobilization. This increase in conductance was lost upon heating the functionalized device to above the protein’s denaturation temperature (80 °C). Thus, the VND junctions allow conductance measurements which reflect the averaged electronic transport through a large number of protein molecules, contacted in parallel with permanent contacts and, for the first time, in a symmetrical Si–protein–Si configuration. (paper)

Radiation Effects in Advanced Multiple Gate and Silicon-on-Insulator Transistors

Science.gov (United States)

Simoen, Eddy; Gaillardin, Marc; Paillet, Philippe; Reed, Robert A.; Schrimpf, Ron D.; Alles, Michael L.; El-Mamouni, Farah; Fleetwood, Daniel M.; Griffoni, Alessio; Claeys, Cor

2013-06-01

The aim of this review paper is to describe in a comprehensive manner the current understanding of the radiation response of state-of-the-art Silicon-on-Insulator (SOI) and FinFET CMOS technologies. Total Ionizing Dose (TID) response, heavy-ion microdose effects and single-event effects (SEEs) will be discussed. It is shown that a very high TID tolerance can be achieved by narrow-fin SOI FinFET architectures, while bulk FinFETs may exhibit similar TID response to the planar devices. Due to the vertical nature of FinFETs, a specific heavy-ion response can be obtained, whereby the angle of incidence becomes highly important with respect to the vertical sidewall gates. With respect to SEE, the buried oxide in the SOI FinFETs suppresses the diffusion tails from the charge collection in the substrate compared to the planar bulk FinFET devices. Channel lengths and fin widths are now comparable to, or smaller than the dimensions of the region affected by the single ionizing ions or lasers used in testing. This gives rise to a high degree of sensitivity to individual device parameters and source-drain shunting during ion-beam or laser-beam SEE testing. Simulations are used to illuminate the mechanisms observed in radiation testing and the progress and needs for the numerical modeling/simulation of the radiation response of advanced SOI and FinFET transistors are highlighted.

ARROW-based silicon-on-insulator photonic crystal waveguides with reduced losses

DEFF Research Database (Denmark)

Lavrinenko, Andrei; Novitsky, A.; Zhilko, V.V.

2006-01-01

We employ an antiresonant reflecting layers arrangement with silicon-on-insulator based photonic crystal waveguides. The 3D FDTD numerical modelling reveals improved transmission in such structures with a promising potential for their application in photonic circuits.......We employ an antiresonant reflecting layers arrangement with silicon-on-insulator based photonic crystal waveguides. The 3D FDTD numerical modelling reveals improved transmission in such structures with a promising potential for their application in photonic circuits....

Color-selective photodetection from intermediate colloidal quantum dots buried in amorphous-oxide semiconductors.

Science.gov (United States)

Cho, Kyung-Sang; Heo, Keun; Baik, Chan-Wook; Choi, Jun Young; Jeong, Heejeong; Hwang, Sungwoo; Lee, Sang Yeol

2017-10-10

We report color-selective photodetection from intermediate, monolayered, quantum dots buried in between amorphous-oxide semiconductors. The proposed active channel in phototransistors is a hybrid configuration of oxide-quantum dot-oxide layers, where the gate-tunable electrical property of silicon-doped, indium-zinc-oxide layers is incorporated with the color-selective properties of quantum dots. A remarkably high detectivity (8.1 × 10 13 Jones) is obtained, along with three major findings: fast charge separation in monolayered quantum dots; efficient charge transport through high-mobility oxide layers (20 cm 2  V -1  s -1 ); and gate-tunable drain-current modulation. Particularly, the fast charge separation rate of 3.3 ns -1 measured with time-resolved photoluminescence is attributed to the intermediate quantum dots buried in oxide layers. These results facilitate the realization of efficient color-selective detection exhibiting a photoconductive gain of 10 7 , obtained using a room-temperature deposition of oxide layers and a solution process of quantum dots. This work offers promising opportunities in emerging applications for color detection with sensitivity, transparency, and flexibility.The development of highly sensitive photodetectors is important for image sensing and optical communication applications. Cho et al., report ultra-sensitive photodetectors based on monolayered quantum dots buried in between amorphous-oxide semiconductors and demonstrate color-detecting logic gates.

Front buried metallic contacts and thin porous silicon combination for efficient polycrystalline silicon solar cells

International Nuclear Information System (INIS)

Ben Rabha, M.; Boujmil, M.F.; Meddeb, N.; Saadoun, M.; Bessais, B.

2006-01-01

We investigate the impacts of achieving buried grid metallic contacts (BGMC), with and without application of a front porous silicon (PS) layer, on the photovoltaic properties of polycrystalline silicon (pc-Si) solar cells. A grooving method based on Chemical Vapor Etching (CVE) was used to perform buried grid contacts on the emitter of pc-Si solar cells. After realizing the n + /p junction using a phosphorus diffusion source, BGMCs were realized using the screen printing technique. We found that the buried metallic contacts improve the short circuit current from 16 mA/cm 2 (for reference cell without buried contacts) to about 19 mA/cm 2 . After application of a front PS layer on the n + emitter, we observe an enhancement of the short circuit current from 19 to 24 mA/cm 2 with a decrease of the reflectivity by about 40% of its initial value. The dark I-V characteristics of the pc-Si cells with PS-based emitter show an important reduction of the reverse current together with an improvement of the rectifying behaviour. Spectral response measurements performed at a wavelength range of 400-1100 nm showed a significant increase in the quantum efficiency, particularly at shorter wavelength (400-650 nm). These results indicate that the BGMCs improve the carrier collection and that the PS layer acts as an antireflective coating that reduces reflection losses and passivates the front surface. This low cost and simple technology based on the CVE technique could enable preparing efficient polycrystalline silicon solar cells

Electrical characterization of high-pressure reactive sputtered ScOx films on silicon

International Nuclear Information System (INIS)

Castan, H.; Duenas, S.; Gomez, A.; Garcia, H.; Bailon, L.; Feijoo, P.C.; Toledano-Luque, M.; Prado, A. del; San Andres, E.; Lucia, M.L.

2011-01-01

Al/ScO x /SiN x /n-Si and Al/ScO x /SiO x /n-Si metal-insulator-semiconductor capacitors have been electrically characterized. Scandium oxide was grown by high-pressure sputtering on different substrates to study the dielectric/insulator interface quality. The substrates were silicon nitride and native silicon oxide. The use of a silicon nitride interfacial layer between the silicon substrate and the scandium oxide layer improves interface quality, as interfacial state density and defect density inside the insulator are decreased.

Nonlinear Optical Functions in Crystalline and Amorphous Silicon-on-Insulator Nanowires

DEFF Research Database (Denmark)

Baets, R.; Kuyken, B.; Liu, X.

2012-01-01

Silicon-on-Insulator nanowires provide an excellent platform for nonlinear optical functions in spite of the two-photon absorption at telecom wavelengths. Work on both crystalline and amorphous silicon nanowires is reviewed, in the wavelength range of 1.5 to 2.5 µm....

Micromachining of buried micro channels in silicon

NARCIS (Netherlands)

de Boer, Meint J.; Tjerkstra, R.W.; Berenschot, Johan W.; Jansen, Henricus V.; Burger, G.J.; Burger, G.J.; Gardeniers, Johannes G.E.; Elwenspoek, Michael Curt; van den Berg, Albert

A new method for the fabrication of micro structures for fluidic applications, such as channels, cavities, and connector holes in the bulk of silicon wafers, called buried channel technology (BCT), is presented in this paper. The micro structures are constructed by trench etching, coating of the

Review on analog/radio frequency performance of advanced silicon MOSFETs

Science.gov (United States)

Passi, Vikram; Raskin, Jean-Pierre

2017-12-01

Aggressive gate-length downscaling of the metal-oxide-semiconductor field-effect transistor (MOSFET) has been the main stimulus for the growth of the integrated circuit industry. This downscaling, which has proved beneficial to digital circuits, is primarily the result of the need for improved circuit performance and cost reduction and has resulted in tremendous reduction of the carrier transit time across the channel, thereby resulting in very high cut-off frequencies. It is only in recent decades that complementary metal-oxide-semiconductor (CMOS) field-effect transistor (FET) has been considered as the radio frequency (RF) technology of choice. In this review, the status of the digital, analog and RF figures of merit (FoM) of silicon-based FETs is presented. State-of-the-art devices with very good performance showing low values of drain-induced barrier lowering, sub-threshold swing, high values of gate transconductance, Early voltage, cut-off frequencies, and low minimum noise figure, and good low-frequency noise characteristic values are reported. The dependence of these FoM on the device gate length is also shown, helping the readers to understand the trends and challenges faced by shorter CMOS nodes. Device performance boosters including silicon-on-insulator substrates, multiple-gate architectures, strain engineering, ultra-thin body and buried-oxide and also III-V and 2D materials are discussed, highlighting the transistor characteristics that are influenced by these boosters. A brief comparison of the two main contenders in continuing Moore’s law, ultra-thin body buried-oxide and fin field-effect transistors are also presented. The authors would like to mention that despite extensive research carried out in the semiconductor industry, silicon-based MOSFET will continue to be the driving force in the foreseeable future.

Polyenergy ion beam synthesis of buried oxynitride layer in silicon

Energy Technology Data Exchange (ETDEWEB)

Barabanenkov, M.Yu. E-mail: barab@ipmt-hpm.ac.ru; Agafonov, Yu.A.; Mordkovich, V.N.; Pustovit, A.N.; Vyatkin, A.F.; Zinenko, V.I

2000-11-01

The efficiency of silicon oxynitride synthesis in silicon crystals implanted with substoichiometric doses of oxygen and nitrogen ions is investigated both experimentally and theoretically. Si crystals are implanted with oxygen and nitrogen ions with doses of 1.5 and 4.5x10{sup 17} cm{sup -2}, respectively, at fixed oxygen ion energy of 150 keV and nitrogen ion energies varied from 80 to 180 keV. The samples annealed at 1200 deg C for 2 h were analysed by secondary ion mass spectroscopy (SIMS). Theoretically, a `diffusion-alternative sinks' model is applied to the annealing stage of ion beam synthesis of a buried layer of a new phase in solids. It is shown that the maximum of the ternary phase production is attained when nitrogen ions are implanted deeper than oxygen ions. An explanation of this fact is given in terms of that (i) the segregation of oxygen and nitrogen species on the surface of oxide nuclei removes the kinetic restriction of nuclei growth, characteristic of oxide growth, at the expense of only oxygen atoms, and (ii) the higher the implantation energy the smoother the shape of ion range distribution in the target, which, in its turn, causes the predominance of the impurity sink over the impurity diffusion.

Polyenergy ion beam synthesis of buried oxynitride layer in silicon

International Nuclear Information System (INIS)

Barabanenkov, M.Yu.; Agafonov, Yu.A.; Mordkovich, V.N.; Pustovit, A.N.; Vyatkin, A.F.; Zinenko, V.I.

2000-01-01

The efficiency of silicon oxynitride synthesis in silicon crystals implanted with substoichiometric doses of oxygen and nitrogen ions is investigated both experimentally and theoretically. Si crystals are implanted with oxygen and nitrogen ions with doses of 1.5 and 4.5x10 17 cm -2 , respectively, at fixed oxygen ion energy of 150 keV and nitrogen ion energies varied from 80 to 180 keV. The samples annealed at 1200 deg C for 2 h were analysed by secondary ion mass spectroscopy (SIMS). Theoretically, a `diffusion-alternative sinks' model is applied to the annealing stage of ion beam synthesis of a buried layer of a new phase in solids. It is shown that the maximum of the ternary phase production is attained when nitrogen ions are implanted deeper than oxygen ions. An explanation of this fact is given in terms of that (i) the segregation of oxygen and nitrogen species on the surface of oxide nuclei removes the kinetic restriction of nuclei growth, characteristic of oxide growth, at the expense of only oxygen atoms, and (ii) the higher the implantation energy the smoother the shape of ion range distribution in the target, which, in its turn, causes the predominance of the impurity sink over the impurity diffusion

360° tunable microwave phase shifter based on silicon-on-insulator dual-microring resonator

DEFF Research Database (Denmark)

Pu, Minhao; Xue, Weiqi; Liu, Liu

2010-01-01

We demonstrate tunable microwave phase shifters based on electrically tunable silicon-on-insulator dual-microring resonators. A quasi-linear phase shift of 360° with ~2dB radio frequency power variation at a microwave frequency of 40GHz is obtained......We demonstrate tunable microwave phase shifters based on electrically tunable silicon-on-insulator dual-microring resonators. A quasi-linear phase shift of 360° with ~2dB radio frequency power variation at a microwave frequency of 40GHz is obtained...

A High Performance Silicon-on-Insulator LDMOSTT Using Linearly Increasing Thickness Techniques

International Nuclear Information System (INIS)

Yu-Feng, Guo; Zhi-Gong, Wang; Gene, Sheu; Jian-Bing, Cheng

2010-01-01

We present a new technique to achieve uniform lateral electric field and maximum breakdown voltage in lateral double-diffused metal-oxide-semiconductor transistors fabricated on silicon-on-insulator substrates. A linearly increasing drift-region thickness from the source to the drain is employed to improve the electric field distribution in the devices. Compared to the lateral linear doping technique and the reduced surface field technique, two-dimensional numerical simulations show that the new device exhibits reduced specific on-resistance, maximum off- and on-state breakdown voltages, superior quasi-saturation characteristics and improved safe operating area. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

Silicon-on-Insulator Nanowire Based Optical Waveguide Biosensors

International Nuclear Information System (INIS)

Li, Mingyu; Liu, Yong; Chen, Yangqing; He, Jian-Jun

2016-01-01

Optical waveguide biosensors based on silicon-on-insulator (SOI) nanowire have been developed for label free molecular detection. This paper reviews our work on the design, fabrication and measurement of SOI nanowire based high-sensitivity biosensors employing Vernier effect. Biosensing experiments using cascaded double-ring sensor and Mach-Zehnder- ring sensor integrated with microfluidic channels are demonstrated (paper)

Guided Acoustic and Optical Waves in Silicon-on-Insulator for Brillouin Scattering and Optomechanics

Science.gov (United States)

2016-08-01

APL PHOTONICS 1, 071301 (2016) Guided acoustic and optical waves in silicon-on- insulator for Brillouin scattering and optomechanics Christopher J...is possible to simultaneously guide optical and acoustic waves in the technologically important silicon on insulator (SOI) material system. Thin...high sound velocity — makes guiding acoustic waves difficult, motivating the use of soft chalcogenide glasses and partial or complete releases (removal

Ultra-low loss nano-taper coupler for Silicon-on-Insulator ridge waveguide

DEFF Research Database (Denmark)

Pu, Minhao; Liu, Liu; Ou, Haiyan

2010-01-01

A nano-taper coupler is optimized specially for the transverse-magnetic mode for interfacing light between a silicon-on-insulator ridge waveguide and a single-mode fiber. An ultra-low coupling loss of ~0.36dB is achieved for the nano-taper coupler.......A nano-taper coupler is optimized specially for the transverse-magnetic mode for interfacing light between a silicon-on-insulator ridge waveguide and a single-mode fiber. An ultra-low coupling loss of ~0.36dB is achieved for the nano-taper coupler....

Accelerated life test of an ONO stacked insulator film for a silicon micro-strip detector

International Nuclear Information System (INIS)

Okuno, Shoji; Ikeda, Hirokazu; Saitoh, Yutaka

1996-01-01

We have used to acquire the signal through an integrated capacitor for a silicon micro-strip detector. When we have been using a double-sided silicon micro-strip detector, we have required a long-term stability and a high feasibility for the integrated capacitor. An oxide-nitride-oxide (ONO) insulator film was theoretically expected to have a superior nature in terms of long term reliability. In order to test long term reliability for integrated capacitor of a silicon micro-strip detector, we made a multi-channel measuring system for capacitors

Computer simulation for the formation of the insulator layer of silicon-on-insulator devices by N sup + and O sup + Co-implantation

CERN Document Server

Lin Qing; Xie Xin Yun; Lin Chenglu; Liu Xiang Hua

2002-01-01

A buried sandwiched layer consisting of silicon dioxide (upper part), silicon oxynitride (medium part) and silicon nitride (lower part) is formed by N sup + and O sup + co-implantation in silicon wafers at a constant temperature of 550 degree C. The microstructure is performed by cross-sectional transmission electron microscopy. To predict the quality of the buried sandwiched layer, the authors study the computer simulation for the formation of the SIMON (separated by implantation of oxygen and nitrogen) structure. The simulation program for SIMOX (separated by implantation of oxygen) is improved in order to be applied in O sup + and N sup + co-implantation on the basis of different formation mechanism between SIMOX and SIMNI (separated by implantation of nitrogen) structures. There is a good agreement between experiment and simulation results verifying the theoretical model and presumption in the program

Magneto-optical non-reciprocal devices in silicon photonics

Directory of Open Access Journals (Sweden)

Yuya Shoji

2014-01-01

Full Text Available Silicon waveguide optical non-reciprocal devices based on the magneto-optical effect are reviewed. The non-reciprocal phase shift caused by the first-order magneto-optical effect is effective in realizing optical non-reciprocal devices in silicon waveguide platforms. In a silicon-on-insulator waveguide, the low refractive index of the buried oxide layer enhances the magneto-optical phase shift, which reduces the device footprints. A surface activated direct bonding technique was developed to integrate a magneto-optical garnet crystal on the silicon waveguides. A silicon waveguide optical isolator based on the magneto-optical phase shift was demonstrated with an optical isolation of 30 dB and insertion loss of 13 dB at a wavelength of 1548 nm. Furthermore, a four port optical circulator was demonstrated with maximum isolations of 15.3 and 9.3 dB in cross and bar ports, respectively, at a wavelength of 1531 nm.

Demonstration of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with silicon-oxy-nitride as the gate insulator

International Nuclear Information System (INIS)

Balachander, K.; Arulkumaran, S.; Egawa, T.; Sano, Y.; Baskar, K.

2005-01-01

AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOSHEMTs) were fabricated with plasma enhanced chemical vapor deposited silicon oxy-nitride (SiON) as an insulating layer. The compositions of SiON thin films were confirmed using X-ray photoelectron spectroscopy. The fabricated MOSHEMTs exhibited a very high saturation current density of 1.1 A/mm coupled with high positive operational gate voltage up to +7 V. The MOSHEMTs also exhibited four orders of low gate leakage current and high forward-on voltage when compared with the conventional HEMTs. The drain current collapse using gate pulse measurements showed only a negligible difference in the saturation current density revealing the drastic improvement in passivation of the surface states due to the high quality of dielectric thin films deposited. Thus, based on the improved direct-current operation, SiON can be considered to be a potential gate oxide comparable with other dielectric insulators

Effect of oxygen on the processes of ion beam synthesis of buried SiC layers in silicon

International Nuclear Information System (INIS)

Artamonov, V.V.; Valakh, M.Ya.; Klyuj, N.I.; Mel'nik, V.P.; Romanyuk, A.B.; Romanyuk, B.N.; Yukhimchuk, V.A.

1998-01-01

The properties of Si-structures with buried silicon carbide (SiC) layers created by high dose carbon implantation into Cz-Si or Fz-Si wafers followed by high-temperature annealing were studied by Raman and infrared spectroscopy. Effect of additional oxygen implantation on the peculiarities of SiC layer formation was also studied. It was shown that under the same implantation and post-implantation annealing conditions the buried SiC layers are more effectively formed in Cz-Si or in Si subjected to additional oxygen implantation. Thus, oxygen in silicon promotes the SiC layer formation due to SiO x precipitate creation and accommodation of the crystal volume in the region where SiC phase is formed

Emerging heterogeneous integrated photonic platforms on silicon

Directory of Open Access Journals (Sweden)

Fathpour Sasan

2015-05-01

Full Text Available Silicon photonics has been established as a mature and promising technology for optoelectronic integrated circuits, mostly based on the silicon-on-insulator (SOI waveguide platform. However, not all optical functionalities can be satisfactorily achieved merely based on silicon, in general, and on the SOI platform, in particular. Long-known shortcomings of silicon-based integrated photonics are optical absorption (in the telecommunication wavelengths and feasibility of electrically-injected lasers (at least at room temperature. More recently, high two-photon and free-carrier absorptions required at high optical intensities for third-order optical nonlinear effects, inherent lack of second-order optical nonlinearity, low extinction ratio of modulators based on the free-carrier plasma effect, and the loss of the buried oxide layer of the SOI waveguides at mid-infrared wavelengths have been recognized as other shortcomings. Accordingly, several novel waveguide platforms have been developing to address these shortcomings of the SOI platform. Most of these emerging platforms are based on heterogeneous integration of other material systems on silicon substrates, and in some cases silicon is integrated on other substrates. Germanium and its binary alloys with silicon, III–V compound semiconductors, silicon nitride, tantalum pentoxide and other high-index dielectric or glass materials, as well as lithium niobate are some of the materials heterogeneously integrated on silicon substrates. The materials are typically integrated by a variety of epitaxial growth, bonding, ion implantation and slicing, etch back, spin-on-glass or other techniques. These wide range of efforts are reviewed here holistically to stress that there is no pure silicon or even group IV photonics per se. Rather, the future of the field of integrated photonics appears to be one of heterogenization, where a variety of different materials and waveguide platforms will be used for

The effect of gate length on SOI-MOSFETS operation | Baedi ...

African Journals Online (AJOL)

The effect of gate length on the operation of silicon-on-insulator (SOI) MOSFET structure with a layer of buried silicon oxide added to isolate the device body has been simulated. Three transistors with gate lengths of 100, 200 and 500 nm were simulated. Simulations showed that with a fixed channel length, when the gate ...

Etched ion tracks in silicon oxide and silicon oxynitride as charge injection or extraction channels for novel electronic structures

International Nuclear Information System (INIS)

Fink, D.; Petrov, A.V.; Hoppe, K.; Fahrner, W.R.; Papaleo, R.M.; Berdinsky, A.S.; Chandra, A.; Chemseddine, A.; Zrineh, A.; Biswas, A.; Faupel, F.; Chadderton, L.T.

2004-01-01

The impact of swift heavy ions onto silicon oxide and silicon oxynitride on silicon creates etchable tracks in these insulators. After their etching and filling-up with highly resistive matter, these nanometric pores can be used as charge extraction or injection paths towards the conducting channel in the underlying silicon. In this way, a novel family of electronic structures has been realized. The basic characteristics of these 'TEMPOS' (=tunable electronic material with pores in oxide on silicon) structures are summarized. Their functionality is determined by the type of insulator, the etch track diameters and lengths, their areal densities, the type of conducting matter embedded therein, and of course by the underlying semiconductor and the contact geometry. Depending on the TEMPOS preparation recipe and working point, the structures may resemble gatable resistors, condensors, diodes, transistors, photocells, or sensors, and they are therefore rather universally applicable in electronics. TEMPOS structures are often sensitive to temperature, light, humidity and organic gases. Also light-emitting TEMPOS structures have been produced. About 37 TEMPOS-based circuits such as thermosensors, photosensors, humidity and alcohol sensors, amplifiers, frequency multipliers, amplitude modulators, oscillators, flip-flops and many others have already been designed and successfully tested. Sometimes TEMPOS-based circuits are more compact than conventional electronics

Thermal processing of strained silicon-on-insulator for atomically precise silicon device fabrication

International Nuclear Information System (INIS)

Lee, W.C.T.; Bishop, N.; Thompson, D.L.; Xue, K.; Scappucci, G.; Cederberg, J.G.; Gray, J.K.; Han, S.M.; Celler, G.K.; Carroll, M.S.; Simmons, M.Y.

2013-01-01

Highlights: ► Strained silicon-on-insulator (sSOI) samples were flash-annealed at high temperature under ultra-high vacuum conditions. ► The extend of surface strain relaxation depends on the annealing temperature with no strain relaxation observed below 1020 °C. ► A 2 × 1 reconstructed surface with low defect density can be achieved. ► The annealed sSOI surface shows enhanced step undulations due to the unique energetics caused by surface strain. - Abstract: We investigate the ability to reconstruct strained silicon-on-insulator (sSOI) substrates in ultra-high vacuum for use in atomic scale device fabrication. Characterisation of the starting sSOI substrate using μRaman shows an average tensile strain of 0.8%, with clear strain modulation in a crosshatch pattern across the surface. The surfaces were heated in ultra-high vacuum from temperatures of 900 °C to 1100 °C and subsequently imaged using scanning tunnelling microscopy (STM). The initial strain modulation on the surface is observed to promote silicon migration and the formation of crosshatched surface features whose height and pitch increases with increasing annealing temperature. STM images reveal alternating narrow straight S A steps and triangular wavy S B steps attributed to the spontaneous faceting of S B and preferential adatom attachment on S B under biaxial tensile strain. Raman spectroscopy shows that despite these high temperature anneals no strain relaxation of the substrate is observed up to temperatures of 1020 °C. Above 1100 °C, strain relaxation is evident but is confined to the surface.

Electron spin resonance characterization of trapping centers in Unibond reg-sign buried oxides

International Nuclear Information System (INIS)

Conley, J.F. Jr.; Lenahan, P.M.; Wallace, B.D.

1996-01-01

Electron spin resonance and capacitance vs. voltage measurements are used to evaluate the radiation response of Unibond buried oxides. When damaged by hole injection, it is found that Unibond reg-sign buried oxides exhibit a rough correspondence between E' centers and positive charge as well as generation of P b centers at the Unibond buried oxide/Si interface. In these respects, Unibond buried oxides qualitatively resemble thermal SiO 2 . However, a hydrogen complexed E' center known as the 74 G doublet is also detected in the Unibond buried oxides. This defect is not detectable in thermal SiO 2 under similar circumstances. Since the presence of 74 G doublet center is generally indicative of very high hydrogen content and since hydrogen is clearly a significant participant in radiation damage, this result suggests a qualitative difference between the radiation response of Unibond and thermal SiO 2 . Unibond results are also compared and contrasted with similar investigations on separation-by-implanted-oxygen (SIMOX) buried oxides. Although the charge trapping response of Unibond buried oxides may be inferior to that of radiation hardened thermal SiO 2 , it appears to be more simple and superior to that of SIMOX buried oxides

Silicon-on-Insulator Lateral-Insulated-Gate-Bipolar-Transistor with Built-in Self-anti-ESD Diode

Directory of Open Access Journals (Sweden)

Xiaojun Cheng

2014-05-01

Full Text Available Power SOI (Silicon-On-Insulator devices have an inherent sandwich structure of MOS (Metal-Oxide-Semiconductor gate which is very easy to suffer ESD (Electro-Static Discharge overstress. To solve this reliability problem, studies on design and modification of a built-in self-anti-ESD diode for a preliminarily optimized high voltage SOI LIGBT (Lateral-Insulated-Gate-Bipolar-Transistor were carried out on the Silvaco TCAD (Technology-Computer-Aided-Design platform. According to the constrains of the technological process, the new introduction of the N+ doped region into P-well region that form the built-in self-anti-ESD diode should be done together with the doping of source under the same mask. The modifications were done by adjusting the vertical impurity profile in P-well into retrograde distribution and designing a cathode plate with a proper length to cover the forward depletion terminal and make sure that the thickness of the cathode plate is the same as that of the gate plate. The simulation results indicate that the modified device structure is compatible with the original one in process and design, the breakdown voltage margin of the former was expanded properly, and both the transient cathode voltages are clamped low enough very quickly. Therefore, the design and optimization results of the modified device structure of the built-in self-anti-ESD diode for the given SOI LIGBT meet the given requirements.

CMOS-compatible method for doping of buried vertical polysilicon structures by solid phase diffusion

Energy Technology Data Exchange (ETDEWEB)

Turkulets, Yury [Micron Semiconductor Israel Ltd., Qiryat Gat 82109 (Israel); Department of Electrical and Computer Engineering, Ben Gurion University of the Negev, Beer-Sheva 8410501 (Israel); Silber, Amir; Ripp, Alexander; Sokolovsky, Mark [Micron Semiconductor Israel Ltd., Qiryat Gat 82109 (Israel); Shalish, Ilan, E-mail: shalish@bgu.ac.il [Department of Electrical and Computer Engineering, Ben Gurion University of the Negev, Beer-Sheva 8410501 (Israel)

2016-03-28

Polysilicon receives attention nowadays as a means to incorporate 3D-structured photonic devices into silicon processes. However, doping of buried layers of a typical 3D structure has been a challenge. We present a method for doping of buried polysilicon layers by solid phase diffusion. Using an underlying silicon oxide layer as a dopant source facilitates diffusion of dopants into the bottom side of the polysilicon layer. The polysilicon is grown on top of the oxide layer, after the latter has been doped by ion implantation. Post-growth heat treatment drives in the dopant from the oxide into the polysilicon. To model the process, we studied the diffusion of the two most common silicon dopants, boron (B) and phosphorus (P), using secondary ion mass spectroscopy profiles. Our results show that shallow concentration profiles can be achieved in a buried polysilicon layer using the proposed technique. We present a quantitative 3D model for the diffusion of B and P in polysilicon, which turns the proposed method into an engineerable technique.

Widely tunable microwave phase shifter based on silicon-on-insulator dual-microring resonator

DEFF Research Database (Denmark)

Pu, Minhao; Liu, Liu; Xue, Weiqi

2010-01-01

We propose and demonstrate tunable microwave phase shifters based on electrically tunable silicon-on-insulator microring resonators. The phase-shifting range and the RF-power variation are analyzed. A maximum phase-shifting range of 0~600° is achieved by utilizing a dual-microring resonator...

Buried melting in germanium implanted silicon by millisecond flash lamp annealing

International Nuclear Information System (INIS)

Voelskow, Matthias; Yankov, Rossen; Skorupa, Wolfgang; Pezoldt, Joerg; Kups, Thomas

2008-01-01

Flash lamp annealing in the millisecond range has been used to induce buried melting in silicon. For this purpose high dose high-energy germanium implantation has been employed to lower the melting temperature of silicon in a predetermined depth region. Subsequent flash lamp treatment at high energy densities leads to local melting of the germanium rich layer. The thickness of the molten layer has been found to depend on the irradiation energy density. During the cool-down period, epitaxial crystallization takes place resulting in a largely defect-free layer

A high efficiency lateral light emitting device on SOI

NARCIS (Netherlands)

Hoang, T.; Le Minh, P.; Holleman, J.; Zieren, V.; Goossens, M.J.; Schmitz, Jurriaan

2005-01-01

The infrared light emission of lateral p/sup +/-p-n/sup +/ diodes realized on SIMOX-SOI (separation by implantation of oxygen - silicon on insulator) substrates has been studied. The confinement of the free carriers in one dimension due to the buried oxide was suggested to be a key point to increase

Silicon on insulator technology. Characteristics. Applications; Technologies silicium sur isolant. Caracteristiques. Exemples d'application

Energy Technology Data Exchange (ETDEWEB)

Suat, J. P.; Peccoud, L.; Le Goascoz, V.; Garcia, M.; Mackowiak, E.

1975-01-31

The advantages resulting from a SOS (Silicon-on-Sapphire) MOS technology are demonstrated. Experimental results giving the performance of C.MOS and depletion-enrichment P-channel technologies are presented, with an application of Silicon on insulator on development, that is to say a 1024 bits MNOS memory, peripheral circuits being developed according to the depletion-enrichment technology.

Etch-stop behavior of buried layers formed by substoichiometric nitrogen ion implantation into silicon

International Nuclear Information System (INIS)

Perez-Rodriguez, A.; Romano-Rodriguez, A.; Morante, J.R.; Acero, M.C. Esteve, J.; Montserrat, J.; El-Hassani, A.

1996-01-01

In this work the etch-stop behavior of buried layers formed by substoichiometric nitrogen ion implantation into silicon is studied as a function of the processing parameters, the implantation dose and temperature, and the presence of capping layers during implantation. Etching characteristics have been probed using tetramethylammonium hydroxide or KOH solutions for different times up to 6 h. Results show that, after annealing, the minimum dose required for the formation of an efficient etch-stop layer is about 4 x 10 17 cm -2 , for an implantation energy of 75 keV. This is defined as a layer with an efficient etch selectivity in relation to Si of s ≥ 100. For larger implantation doses efficient etch selectivities larger than 100 are obtained. However, for these doses a considerable density of pits is observed in the etch-stop layer. These are related to the presence of nitrogen poor Si regions in the buried layer after annealing, due to a partial separation of silicon and silicon nitride phases during the annealing process. The influence of this separation of phases as well as nitrogen gettering in the buried layer on the etch-stop behavior is discussed as a function of the processing parameters

Large current MOSFET on photonic silicon-on-insulator wafers and its monolithic integration with a thermo-optic 2 × 2 Mach-Zehnder switch.

Science.gov (United States)

Cong, G W; Matsukawa, T; Chiba, T; Tadokoro, H; Yanagihara, M; Ohno, M; Kawashima, H; Kuwatsuka, H; Igarashi, Y; Masahara, M; Ishikawa, H

2013-03-25

n-channel body-tied partially depleted metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated for large current applications on a silicon-on-insulator wafer with photonics-oriented specifications. The MOSFET can drive an electrical current as large as 20 mA. We monolithically integrated this MOSFET with a 2 × 2 Mach-Zehnder interferometer optical switch having thermo-optic phase shifters. The static and dynamic performances of the integrated device are experimentally evaluated.

Research on total-dose hardening for H-gate PD NMOSFET/SIMOX by ion implanting into buried oxide

International Nuclear Information System (INIS)

Qian Cong; Zhang Zhengxuan; Zhang Feng; Lin Chenglu

2008-01-01

In this work, we investigate the back-gate I-V characteristics for two kinds of NMOSFET/SIMOX transistors with H gate structure fabricated on two different SOI wafers. A transistors are made on the wafer implanted with Si + and then annealed in N 2 , and B transistors are made on the wafer without implantation and annealing. It is demonstrated experimentally that A transistors have much less back-gate threshold voltage shift ΔV th than B transistors under X-ray total close irradiation. Subthreshold charge separation technique is employed to estimate the build-up of oxide charge and interface traps during irradiation, showing that the reduced ΔV th for A transistors is mainly due to its less build-up of oxide charge than B transistors. Photo-luminescence (PL) research indicates that Si implantation results in the formation of silicon nanocrystalline (nanocluster) whose size increases with the implant dose. This structure can trap electrons to compensate the positive charge build-up in the buried oxide during irradiation, and thus reduce the threshold voltage negative shift. (authors)

Integrated programmable photonic filter on the silicon -on- insulator platform

DEFF Research Database (Denmark)

Liao, Shasha; Ding, Yunhong; Peucheret, Christophe

2014-01-01

We propose and demonstrate a silicon - on - insulator (SOI) on - chip programmable filter based on a four - tap finite impulse response structure. The photonic filter is programmable thanks to amplitude and phase modulation of each tap controlled by thermal heater s. We further demonstrate...... the tunability of the filter central wavelength, bandwidth and variable passband shape. The tuning range of the central wavelength is at least 42% of the free spectral range. The bandwidth tuning range is at least half of the free spectral range. Our scheme has distinct advantages of compactness, capability...

Peculiarities of electronic structure of silicon-on-insulator structures and their interaction with synchrotron radiation

Directory of Open Access Journals (Sweden)

Vladimir A. Terekhov

2015-09-01

Full Text Available SOI (silicon-on-insulator structures with strained and unstrained silicon layers were studied by ultrasoft X-ray emission spectroscopy and X-ray absorption near edge structure spectroscopy with the use of synchrotron radiation techniques. Analysis of X-ray data has shown a noticeable transformation of the electron energy spectrum and local partial density of states distribution in valence and conduction bands in the strained silicon layer of the SOI structure. USXES Si L2,3 spectra analysis revealed a decrease of the distance between the L2v′ и L1v points in the valence band of the strained silicon layer as well as a shift of the first two maxima of the XANES first derivation spectra to the higher energies with respect to conduction band bottom Ec. At the same time the X-ray standing waves of synchrotron radiation (λ~12–20 nm are formed in the silicon-on-insulator structure with and without strains of the silicon layer. Moreover changing the synchrotron radiation grazing angle θ by 2° leads to a change of the electromagnetic field phase to the opposite.

Oxidation-enhanced diffusion of boron in very low-energy N2+-implanted silicon

Science.gov (United States)

Skarlatos, D.; Tsamis, C.; Perego, M.; Fanciulli, M.

2005-06-01

In this article we study the interstitial injection during oxidation of very low-energy nitrogen-implanted silicon. Buried boron δ layers are used to monitor the interstitial supersaturation during the oxidation of nitrogen-implanted silicon. No difference in boron diffusivity enhancement was observed compared to dry oxidation of nonimplanted samples. This result is different from our experience from N2O oxynitridation study, during which a boron diffusivity enhancement of the order of 20% was observed, revealing the influence of interfacial nitrogen on interstitial kinetics. A possible explanation may be that implanted nitrogen acts as an excess interstitial sink in order to diffuse towards the surface via a non-Fickian mechanism. This work completes a wide study of oxidation of very low-energy nitrogen-implanted silicon related phenomena we performed within the last two years [D. Skarlatos, C. Tsamis, and D. Tsoukalas, J. Appl. Phys. 93, 1832 (2003); D. Skarlatos, E. Kapetanakis, P. Normand, C. Tsamis, M. Perego, S. Ferrari, M. Fanciulli, and D. Tsoukalas, J. Appl. Phys. 96, 300 (2004)].

Ultrathin silicon oxynitride layer on GaN for dangling-bond-free GaN/insulator interface.

Science.gov (United States)

Nishio, Kengo; Yayama, Tomoe; Miyazaki, Takehide; Taoka, Noriyuki; Shimizu, Mitsuaki

2018-01-23

Despite the scientific and technological importance of removing interface dangling bonds, even an ideal model of a dangling-bond-free interface between GaN and an insulator has not been known. The formation of an atomically thin ordered buffer layer between crystalline GaN and amorphous SiO 2 would be a key to synthesize a dangling-bond-free GaN/SiO 2 interface. Here, we predict that a silicon oxynitride (Si 4 O 5 N 3 ) layer can epitaxially grow on a GaN(0001) surface without creating dangling bonds at the interface. Our ab initio calculations show that the GaN/Si 4 O 5 N 3 structure is more stable than silicon-oxide-terminated GaN(0001) surfaces. The electronic properties of the GaN/Si 4 O 5 N 3 structure can be tuned by modifying the chemical components near the interface. We also propose a possible approach to experimentally synthesize the GaN/Si 4 O 5 N 3 structure.

Performance of current-in-plane pseudo-spin-valve devices on CMOS silicon-on-insulator underlayers

Science.gov (United States)

Katti, R. R.; Zou, D.; Reed, D.; Schipper, D.; Hynes, O.; Shaw, G.; Kaakani, H.

2003-05-01

Prior work has shown that current-in-plane (CIP) giant magnetoresistive (GMR) pseudo-spin-valve (PSV) devices grown on bulk Si wafers and bulk complementary metal-oxide semiconductor (CMOS) underlayers exhibit write and read characteristics that are suitable for application as nonvolatile memory devices. In this work, CIP GMR PSV devices fabricated on silicon-on-insulator CMOS underlayers are shown to support write and read performance. Reading and writing fields for selected devices are shown to be approximately 25%-50% that of unselected devices, which provides a margin for reading and writing specific bits in a memory without overwriting bits and without disturbing other bits. The switching characteristics of experimental devices were compared to and found to be similar with Landau-Lifschitz-Gilbert micromagnetic modeling results, which allowed inferring regions of reversible and irreversible rotations in magnetic reversal processes.

Processing of n{sup +}/p{sup −}/p{sup +} strip detectors with atomic layer deposition (ALD) grown Al{sub 2}O{sub 3} field insulator on magnetic Czochralski silicon (MCz-si) substrates

Energy Technology Data Exchange (ETDEWEB)

Härkönen, J., E-mail: jaakko.harkonen@helsinki.fi [Helsinki Institute of Physics (Finland); Tuovinen, E. [Helsinki Institute of Physics (Finland); VTT Technical Research Centre of Finland, Microsystems and Nanoelectronics (Finland); Luukka, P.; Gädda, A.; Mäenpää, T.; Tuominen, E.; Arsenovich, T. [Helsinki Institute of Physics (Finland); Junkes, A. [Institute for Experimental Physics, University of Hamburg (Germany); Wu, X. [VTT Technical Research Centre of Finland, Microsystems and Nanoelectronics (Finland); Picosun Oy, Tietotie 3, FI-02150 Espoo Finland (Finland); Li, Z. [School of Materials Science and Engineering, Xiangtan University, Xiangtan, Hunan 411105 (China)

2016-08-21

Detectors manufactured on p-type silicon material are known to have significant advantages in very harsh radiation environment over n-type detectors, traditionally used in High Energy Physics experiments for particle tracking. In p-type (n{sup +} segmentation on p substrate) position-sensitive strip detectors, however, the fixed oxide charge in the silicon dioxide is positive and, thus, causes electron accumulation at the Si/SiO{sub 2} interface. As a result, unless appropriate interstrip isolation is applied, the n-type strips are short-circuited. Widely adopted methods to terminate surface electron accumulation are segmented p-stop or p-spray field implantations. A different approach to overcome the near-surface electron accumulation at the interface of silicon dioxide and p-type silicon is to deposit a thin film field insulator with negative oxide charge. We have processed silicon strip detectors on p-type Magnetic Czochralski silicon (MCz-Si) substrates with aluminum oxide (Al{sub 2}O{sub 3}) thin film insulator, grown with Atomic Layer Deposition (ALD) method. The electrical characterization by current–voltage and capacitance−voltage measurement shows reliable performance of the aluminum oxide. The final proof of concept was obtained at the test beam with 200 GeV/c muons. For the non-irradiated detector the charge collection efficiency (CCE) was nearly 100% with a signal-to-noise ratio (S/N) of about 40, whereas for the 2×10{sup 15} n{sub eq}/cm{sup 2} proton irradiated detector the CCE was 35%, when the sensor was biased at 500 V. These results are comparable with the results from p-type detectors with the p-spray and p-stop interstrip isolation techniques. In addition, interestingly, when the aluminum oxide was irradiated with Co-60 gamma-rays, an accumulation of negative fixed oxide charge in the oxide was observed.

Optical microcavities based on surface modes in two-dimensional photonic crystals and silicon-on-insulator photonic crystals

DEFF Research Database (Denmark)

Xiao, Sanshui; Qiu, M.

2007-01-01

Surface-mode optical microcavities based on two-dimensional photonic crystals and silicon-on-insulator photonic crystals are studied. We demonstrate that a high-quality-factor microcavity can be easily realized in these structures. With an increasing of the cavity length, the quality factor is gr...... is gradually enhanced and the resonant frequency converges to that of the corresponding surface mode in the photonic crystals. These structures have potential applications such as sensing.......Surface-mode optical microcavities based on two-dimensional photonic crystals and silicon-on-insulator photonic crystals are studied. We demonstrate that a high-quality-factor microcavity can be easily realized in these structures. With an increasing of the cavity length, the quality factor...

Electron Band Alignment at Interfaces of Semiconductors with Insulating Oxides: An Internal Photoemission Study

Directory of Open Access Journals (Sweden)

Valeri V. Afanas'ev

2014-01-01

Full Text Available Evolution of the electron energy band alignment at interfaces between different semiconductors and wide-gap oxide insulators is examined using the internal photoemission spectroscopy, which is based on observations of optically-induced electron (or hole transitions across the semiconductor/insulator barrier. Interfaces of various semiconductors ranging from the conventional silicon to the high-mobility Ge-based (Ge, Si1-xGex, Ge1-xSnx and AIIIBV group (GaAs, InxGa1-xAs, InAs, GaP, InP, GaSb, InSb materials were studied revealing several general trends in the evolution of band offsets. It is found that in the oxides of metals with cation radii larger than ≈0.7 Å, the oxide valence band top remains nearly at the same energy (±0.2 eV irrespective of the cation sort. Using this result, it becomes possible to predict the interface band alignment between oxides and semiconductors as well as between dissimilar insulating oxides on the basis of the oxide bandgap width which are also affected by crystallization. By contrast, oxides of light elements, for example, Be, Mg, Al, Si, and Sc exhibit significant shifts of the valence band top. General trends in band lineup variations caused by a change in the composition of semiconductor photoemission material are also revealed.

18O isotopic tracer studies of silicon oxidation in dry oxygen

International Nuclear Information System (INIS)

Han, C.J.

1986-01-01

Oxidation of silicon in dry oxygen has been an important process in the integrated circuit industry for making gate insulators on metal-oxide-semiconductory (MOS) devices. This work examines this process using isotopic tracers of oxygen to determine the transport mechanisms of oxygen through silicon dioxide. Oxides were grown sequentially using mass-16 and mass-18 oxygen gas sources to label the oxygen molecules from each step. The resulting oxides are analyzed using secondary ion mass spectrometry (SIMS). The results of these analyses suggest two oxidant species are present during the oxidation, each diffuses and oxidizes separately during the process. A model from this finding using a sum of two linear-parabolic growth rates, each representing the growth rate from one of the oxidants, describes the reported oxidation kinetics in the literature closely. A fit of this relationship reveals excellent fits to the data for oxide thicknesses ranging from 30 A to 1 μm and for temperatures ranging from 800 to 1200 0 C. The mass-18 oxygen tracers also enable a direct observation of the oxygen solubility in the silicon dioxide during a dry oxidation process. The SIMS profiles establish a maximum solubility for interstitial oxygen at 1000 0 C at 2 x 10 20 cm -3 . Furthermore, the mass-18 oxygen profiles show negligible network diffusion during an 1000 0 C oxidation

Compact wavelength-insensitive fabrication-tolerant silicon-on-insulator beam splitter.

Science.gov (United States)

Rasigade, Gilles; Le Roux, Xavier; Marris-Morini, Delphine; Cassan, Eric; Vivien, Laurent

2010-11-01

A star coupler-based beam splitter for rib waveguides is reported. A design method is presented and applied in the case of silicon-on-insulator rib waveguides. Experimental results are in good agreement with simulations. Excess loss lower than 1 dB is experimentally obtained for star coupler lengths from 0.5 to 1 μm. Output balance is better than 1 dB, which is the measurement accuracy, and broadband transmission is obtained over 90 nm.

Ultrathin Oxide Passivation Layer by Rapid Thermal Oxidation for the Silicon Heterojunction Solar Cell Applications

Directory of Open Access Journals (Sweden)

Youngseok Lee

2012-01-01

Full Text Available It is difficult to deposit extremely thin a-Si:H layer in heterojunction with intrinsic thin layer (HIT solar cell due to thermal damage and tough process control. This study aims to understand oxide passivation mechanism of silicon surface using rapid thermal oxidation (RTO process by examining surface effective lifetime and surface recombination velocity. The presence of thin insulating a-Si:H layer is the key to get high Voc by lowering the leakage current (I0 which improves the efficiency of HIT solar cell. The ultrathin thermal passivation silicon oxide (SiO2 layer was deposited by RTO system in the temperature range 500–950°C for 2 to 6 minutes. The thickness of the silicon oxide layer was affected by RTO annealing temperature and treatment time. The best value of surface recombination velocity was recorded for the sample treated at a temperature of 850°C for 6 minutes at O2 flow rate of 3 Lpm. A surface recombination velocity below 25 cm/s was obtained for the silicon oxide layer of 4 nm thickness. This ultrathin SiO2 layer was employed for the fabrication of HIT solar cell structure instead of a-Si:H, (i layer and the passivation and tunneling effects of the silicon oxide layer were exploited. The photocurrent was decreased with the increase of illumination intensity and SiO2 thickness.

Implantation of oxygen ions for the realization of SOS (silicon on insulator) structures: SIMOX

International Nuclear Information System (INIS)

Margail, J.

1987-03-01

Highdose oxygen implantation is becoming a serious candidate for SOI (silicon on insulator) structure realization. The fabrication condition study of these substrates allowed to show up the implantation and annealing parameter importance for microstructure, and particularly for crystal quality of silicon films. It has been shown that the use of high temperature annealings leads to high quality substrates: monocrystal silicon film without any precipitate, at the card scale; Si/Si O 2 interface formation. After annealing at 1340 O C, Hall mobilities have been measured in silicon film, and its residual doping is very low. First characteristics and performance of submicron CMOS circuits prooves the electric quality of these substrates [fr

Structural and electrical evaluation for strained Si/SiGe on insulator

International Nuclear Information System (INIS)

Wang Dong; Ii, Seiichiro; Ikeda, Ken-ichi; Nakashima, Hideharu; Ninomiya, Masaharu; Nakamae, Masahiko; Nakashima, Hiroshi

2006-01-01

Three strained Si/SiGe on insulator wafers having different Ge fractions were evaluated using dual-metal-oxide-semiconductor (dual-MOS) deep level transient spectroscopy (DLTS) and transmission electron microscopy (TEM) methods. The interface of SiGe/buried oxide (BOX) shows roughness less than 1 nm by high resolution TEM observation. The interface states densities (D it ) of SiGe/BOX are approximately 1 x 10 12 cm -2 eV -1 , which is approximately one order of magnitude higher than that of Si/BOX in a Si on insulator wafer measured as reference by the same method of dual-MOS DLTS. The high D it of SiGe/BOX is not due to interface roughness but due to Ge atoms. The threading dislocations were also clearly observed by TEM and were analyzed

Ion beam induces nitridation of silicon

International Nuclear Information System (INIS)

Petravic, M.; Williams, J.S.; Conway, M.

1998-01-01

High dose ion bombardment of silicon with reactive species, such as oxygen and nitrogen, has attracted considerable interest due to possible applications of beam-induced chemical compounds with silicon. For example, high energy oxygen bombardment of Si is now routinely used to form buried oxide layers for device purposes, the so called SIMOX structures. On the other hand, Si nitrides, formed by low energy ( 100 keV) nitrogen beam bombardment of Si, are attractive as oxidation barriers or gate insulators, primarily due to the low diffusivity of many species in Si nitrides. However, little data exists on silicon nitride formation during bombardment and its angle dependence, in particular for N 2 + bombardment in the 10 keV range, which is of interest for analytical techniques such as SIMS. In SIMS, low energy oxygen ions are more commonly used as bombarding species, as oxygen provides stable ion yields and enhances the positive secondary ion yield. Therefore, a large body of data can be found in the literature on oxide formation during low energy oxygen bombardment. Nitrogen bombardment of Si may cause similar effects to oxygen bombardment, as nitrogen and oxygen have similar masses and ranges in Si, show similar sputtering effects and both have the ability to form chemical compounds with Si. In this work we explore this possibility in some detail. We compare oxide and nitride formation during oxygen and nitrogen ion bombardment of Si under similar conditions. Despite the expected similar behaviour, some large differences in compound formation were found. These differences are explained in terms of different atomic diffusivities in oxides and nitrides, film structural differences and thermodynamic properties. (author)

Realization of an ultra-compact polarization beam splitter using asymmetric MMI based on silicon nitride / silicon-on-insulator platform.

Science.gov (United States)

Sun, Xiao; Aitchison, J Stewart; Mojahedi, Mo

2017-04-03

We have experimentally demonstrated a compact polarization beam splitter (PBS) based on the silicon nitride/silicon-on-insulator platform using the recently proposed augmented-low-index-guiding (ALIG) waveguide structure. The two orthogonal polarizations are split in an asymmetric multimode interference (MMI) section, which was 1.6 μm wide and 4.8 μm long. The device works well over the entire C-band wavelength range and has a measured low insertion loss of less than 1 dB. The polarization extinction ratio at the Bar Port is approximately 17 dB and at the Cross Port is approximately 25 dB. The design of the device is robust and has a good fabrication tolerance.

The Microwave Noise Behaviour Of Dual Material Gate Silicon On Insulator

Science.gov (United States)

Jafar, N.; Soin, N.

2009-06-01

This work presents the noise behaviour due to the applied Dual Material Gate (DMG) on the 75 nm n-channel Silicon On Insulator (SOI) device operating in the fully depletion mode, particularly for microwave circuit design. Influences of DMG properties namely the gate length ratio (L1:L2) and gate material workfunction difference (ΔΦM) as well as structural and operational parameters which are silicon thickness (TSi) and threshold voltage (VTH) setting variation on the noise performance were carried out on simulation basis using ATLAS 2D. Results show better noise performance in DMG as compare to the standard gate structure of FD-SOI devices. Higher VTH for DMG design is recommended for minimized noise figure in line with the advantage of inverse VTH roll-off characteristics for short channel effects suppression.

Ultrathin Oxide Passivation Layer by Rapid Thermal Oxidation for the Silicon Heterojunction Solar Cell Applications

OpenAIRE

Lee, Youngseok; Oh, Woongkyo; Dao, Vinh Ai; Hussain, Shahzada Qamar; Yi, Junsin

2012-01-01

It is difficult to deposit extremely thin a-Si:H layer in heterojunction with intrinsic thin layer (HIT) solar cell due to thermal damage and tough process control. This study aims to understand oxide passivation mechanism of silicon surface using rapid thermal oxidation (RTO) process by examining surface effective lifetime and surface recombination velocity. The presence of thin insulating a-Si:H layer is the key to get high Voc by lowering the leakage current (I0) which improves the efficie...

High-Q silicon-on-insulator slot photonic crystal cavity infiltrated by a liquid

International Nuclear Information System (INIS)

Caër, Charles; Le Roux, Xavier; Cassan, Eric

2013-01-01

We report the experimental realization of a high-Q slot photonic crystal cavity in Silicon-On-Insulator (SOI) configuration infiltrated by a liquid. Loaded Q-factor of 23 000 is measured at telecom wavelength. The intrinsic quality factor inferred from the transmission spectrum is higher than 200 000, which represents a record value for slot photonic crystal cavities on SOI, whereas the maximum of intensity of the cavity is roughly equal to 20% of the light transmitted in the waveguide. This result makes filled slot photonic crystal cavities very promising for silicon-based light emission and ultrafast nonlinear optics

Formation of porous silicon oxide from substrate-bound silicon rich silicon oxide layers by continuous-wave laser irradiation

Science.gov (United States)

Wang, Nan; Fricke-Begemann, Th.; Peretzki, P.; Ihlemann, J.; Seibt, M.

2018-03-01

Silicon nanocrystals embedded in silicon oxide that show room temperature photoluminescence (PL) have great potential in silicon light emission applications. Nanocrystalline silicon particle formation by laser irradiation has the unique advantage of spatially controlled heating, which is compatible with modern silicon micro-fabrication technology. In this paper, we employ continuous wave laser irradiation to decompose substrate-bound silicon-rich silicon oxide films into crystalline silicon particles and silicon dioxide. The resulting microstructure is studied using transmission electron microscopy techniques with considerable emphasis on the formation and properties of laser damaged regions which typically quench room temperature PL from the nanoparticles. It is shown that such regions consist of an amorphous matrix with a composition similar to silicon dioxide which contains some nanometric silicon particles in addition to pores. A mechanism referred to as "selective silicon ablation" is proposed which consistently explains the experimental observations. Implications for the damage-free laser decomposition of silicon-rich silicon oxides and also for controlled production of porous silicon dioxide films are discussed.

Thin-film piezoelectric-on-silicon resonators for high-frequency reference oscillator applications.

Science.gov (United States)

Abdolvand, Reza; Lavasani, Hossein M; Ho, Gavin K; Ayazi, Farrokh

2008-12-01

This paper studies the application of lateral bulk acoustic thin-film piezoelectric-on-substrate (TPoS) resonators in high-frequency reference oscillators. Low-motional-impedance TPoS resonators are designed and fabricated in 2 classes--high-order and coupled-array. Devices of each class are used to assemble reference oscillators and the performance characteristics of the oscillators are measured and discussed. Since the motional impedance of these devices is small, the transimpedance amplifier (TIA) in the oscillator loop can be reduced to a single transistor and 3 resistors, a format that is very power-efficient. The lowest reported power consumption is approximately 350 microW for an oscillator operating at approximately 106 MHz. A passive temperature compensation method is also utilized by including the buried oxide layer of the silicon-on-insulator (SOI) substrate in the structural resonant body of the device, and a very small (-2.4 ppm/ degrees C) temperature coefficient of frequency is obtained for an 82-MHz oscillator.

Extreme temperature stability of thermally insulating graphene-mesoporous-silicon nanocomposite

Science.gov (United States)

Kolhatkar, Gitanjali; Boucherif, Abderraouf; Rahim Boucherif, Abderrahim; Dupuy, Arthur; Fréchette, Luc G.; Arès, Richard; Ruediger, Andreas

2018-04-01

We demonstrate the thermal stability and thermal insulation of graphene-mesoporous-silicon nanocomposites (GPSNC). By comparing the morphology of GPSNC carbonized at 650 °C as-formed to that after annealing, we show that this nanocomposite remains stable at temperatures as high as 1050 °C due to the presence of a few monolayers of graphene coating on the pore walls. This does not only make this material compatible with most thermal processes but also suggests applications in harsh high temperature environments. The thermal conductivity of GPSNCs carbonized at temperatures in the 500 °C-800 °C range is determined through Raman spectroscopy measurements. They indicate that the thermal conductivity of the composite is lower than that of silicon, with a value of 13 ± 1 W mK-1 at room temperature, and not affected by the thin graphene layer, suggesting a role of the high concentration of carbon related-defects as indicated by the high intensity of the D-band compared to G-band of the Raman spectra. This morphological stability at high temperature combined with a high thermal insulation make GPSNC a promising candidate for a broad range of applications including microelectromechanical systems and thermal effect microsystems such as flow sensors or IR detectors. Finally, at 120 °C, the thermal conductivity remains equal to that at room temperature, attesting to the potential of using our nanocomposite in devices that operate at high temperatures such as microreactors for distributed chemical conversion, solid oxide fuel cells, thermoelectric devices or thermal micromotors.

Nanogranular SiO{sub 2} proton gated silicon layer transistor mimicking biological synapses

Energy Technology Data Exchange (ETDEWEB)

Liu, M. J.; Huang, G. S., E-mail: gshuang@fudan.edu.cn, E-mail: pfeng@nju.edu.cn; Guo, Q. L.; Tian, Z. A.; Li, G. J.; Mei, Y. F. [Department of Materials Science, Fudan University, Shanghai 200433 (China); Feng, P., E-mail: gshuang@fudan.edu.cn, E-mail: pfeng@nju.edu.cn; Shao, F.; Wan, Q. [School of Electronic Science and Engineering and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210093 (China)

2016-06-20

Silicon on insulator (SOI)-based transistors gated by nanogranular SiO{sub 2} proton conducting electrolytes were fabricated to mimic synapse behaviors. This SOI-based device has both top proton gate and bottom buried oxide gate. Electrical transfer properties of top proton gate show hysteresis curves different from those of bottom gate, and therefore, excitatory post-synaptic current and paired pulse facilitation (PPF) behavior of biological synapses are mimicked. Moreover, we noticed that PPF index can be effectively tuned by the spike interval applied on the top proton gate. Synaptic behaviors and functions, like short-term memory, and its properties are also experimentally demonstrated in our device. Such SOI-based electronic synapses are promising for building neuromorphic systems.

Crosstalk analysis of silicon-on-insulator nanowire-arrayed waveguide grating

International Nuclear Information System (INIS)

Li Kai-Li; An Jun-Ming; Zhang Jia-Shun; Wang Yue; Wang Liang-Liang; Li Jian-Guang; Wu Yuan-Da; Yin Xiao-Jie; Hu Xiong-Wei

2016-01-01

The factors influencing the crosstalk of silicon-on-insulator (SOI) nanowire arrayed waveguide grating (AWG) are analyzed using the transfer function method. The analysis shows that wider and thicker arrayed waveguides, outsider fracture of arrayed waveguide, and larger channel space, could mitigate the deterioration of crosstalk. The SOI nanowire AWGs with different arrayed waveguide widths are fabricated by using deep ultraviolet lithography (DUV) and inductively coupled plasma etching (ICP) technology. The measurement results show that the crosstalk performance is improved by about 7 dB through adopting 800 nm arrayed waveguide width. (paper)

Mechanism of floating body effect mitigation via cutting off source injection in a fully-depleted silicon-on-insulator technology

International Nuclear Information System (INIS)

Huang Pengcheng; Chen Shuming; Chen Jianjun

2016-01-01

In this paper, the effect of floating body effect (FBE) on a single event transient generation mechanism in fully depleted (FD) silicon-on-insulator (SOI) technology is investigated using three-dimensional technology computer-aided design (3D-TCAD) numerical simulation. The results indicate that the main SET generation mechanism is not carrier drift/diffusion but floating body effect (FBE) whether for positive or negative channel metal oxide semiconductor (PMOS or NMOS). Two stacking layout designs mitigating FBE are investigated as well, and the results indicate that the in-line stacking (IS) layout can mitigate FBE completely and is area penalty saving compared with the conventional stacking layout. (paper)

Buried MoO x/Ag Electrode Enables High-Efficiency Organic/Silicon Heterojunction Solar Cells with a High Fill Factor.

Science.gov (United States)

Xia, Zhouhui; Gao, Peng; Sun, Teng; Wu, Haihua; Tan, Yeshu; Song, Tao; Lee, Shuit-Tong; Sun, Baoquan

2018-04-25

Silicon (Si)/organic heterojunction solar cells based on poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) and n-type Si have attracted wide interests because they promise cost-effectiveness and high-efficiency. However, the limited conductivity of PEDOT:PSS leads to an inefficient hole transport efficiency for the heterojunction device. Therefore, a high dense top-contact metal grid electrode is required to assure the efficient charge collection efficiency. Unfortunately, the large metal grid coverage ratio electrode would lead to undesirable optical loss. Here, we develop a strategy to balance PEDOT:PSS conductivity and grid optical transmittance via a buried molybdenum oxide/silver grid electrode. In addition, the grid electrode coverage ratio is optimized to reduce its light shading effect. The buried electrode dramatically reduces the device series resistance, which leads to a higher fill factor (FF). With the optimized buried electrode, a record FF of 80% is achieved for flat Si/PEDOT:PSS heterojunction devices. With further enhancement adhesion between the PEDOT:PSS film and Si substrate by a chemical cross-linkable silance, a power conversion efficiency of 16.3% for organic/textured Si heterojunction devices is achieved. Our results provide a path to overcome the inferior organic semiconductor property to enhance the organic/Si heterojunction solar cell.

Direct measurements of the velocity and thickness of ''explosively'' propagating buried molten layers in amorphous silicon

International Nuclear Information System (INIS)

Lowndes, D.H.; Jellison, G.E. Jr.; Pennycook, S.J.; Withrow, S.P.; Mashburn, D.N.

1986-01-01

Simultaneous infrared (1152 nm) and visible (633 nm) reflectivity measurements with nanosecond resolution were used to study the initial formation and subsequent motion of pulsed KrF laser-induced ''explosively'' propagating buried molten layers in ion implantation-amorphized silicon. The buried layer velocity decreases with depth below the surface, but increases with KrF laser energy density; a maximum velocity of about 14 m/s was observed, implying an undercooling-velocity relationship of approx. 14 K/(m/s). Z-contrast scanning transmission electron microscopy was used to form a direct chemical image of implanted Cu ions transported by the buried layer and showed that the final buried layer thickness was <15 nm

Design and Fabrication of Silicon-on-Silicon-Carbide Substrates and Power Devices for Space Applications

Directory of Open Access Journals (Sweden)

Gammon P.M.

2017-01-01

Full Text Available A new generation of power electronic semiconductor devices are being developed for the benefit of space and terrestrial harsh-environment applications. 200-600 V lateral transistors and diodes are being fabricated in a thin layer of silicon (Si wafer bonded to silicon carbide (SiC. This novel silicon-on-silicon-carbide (Si/SiC substrate solution promises to combine the benefits of silicon-on-insulator (SOI technology (i.e device confinement, radiation tolerance, high and low temperature performance with that of SiC (i.e. high thermal conductivity, radiation hardness, high temperature performance. Details of a process are given that produces thin films of silicon 1, 2 and 5 μm thick on semi-insulating 4H-SiC. Simulations of the hybrid Si/SiC substrate show that the high thermal conductivity of the SiC offers a junction-to-case temperature ca. 4× less that an equivalent SOI device; reducing the effects of self-heating, and allowing much greater power density. Extensive electrical simulations are used to optimise a 600 V laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET implemented entirely within the silicon thin film, and highlight the differences between Si/SiC and SOI solutions.

An experimental study of solid source diffusion by spin on dopants and its application for minimal silicon-on-insulator CMOS fabrication

Science.gov (United States)

Liu, Yongxun; Koga, Kazuhiro; Khumpuang, Sommawan; Nagao, Masayoshi; Matsukawa, Takashi; Hara, Shiro

2017-06-01

Solid source diffusions of phosphorus (P) and boron (B) into the half-inch (12.5 mm) minimal silicon (Si) wafers by spin on dopants (SOD) have been systematically investigated and the physical-vapor-deposited (PVD) titanium nitride (TiN) metal gate minimal silicon-on-insulator (SOI) complementary metal-oxide-semiconductor (CMOS) field-effect transistors (FETs) have successfully been fabricated using the developed SOD thermal diffusion technique. It was experimentally confirmed that a low temperature oxidation (LTO) process which depresses a boron silicide layer formation is effective way to remove boron-glass in a diluted hydrofluoric acid (DHF) solution. It was also found that top Si layer thickness of SOI wafers is reduced in the SOD thermal diffusion process because of its consumption by thermal oxidation owing to the oxygen atoms included in SOD films, which should be carefully considered in the ultrathin SOI device fabrication. Moreover, normal operations of the fabricated minimal PVD-TiN metal gate SOI-CMOS inverters, static random access memory (SRAM) cells and ring oscillators have been demonstrated. These circuit level results indicate that no remarkable particles and interface traps were introduced onto the minimal wafers during the device fabrication, and the developed solid source diffusion by SOD is useful for the fabrication of functional logic gate minimal SOI-CMOS integrated circuits.

Guided acoustic and optical waves in silicon-on-insulator for Brillouin scattering and optomechanics

Directory of Open Access Journals (Sweden)

Christopher J. Sarabalis

2016-10-01

Full Text Available We numerically study silicon waveguides on silica showing that it is possible to simultaneously guide optical and acoustic waves in the technologically important silicon on insulator (SOI material system. Thin waveguides, or fins, exhibit geometrically softened mechanical modes at gigahertz frequencies with phase velocities below the Rayleigh velocity in glass, eliminating acoustic radiation losses. We propose slot waveguides on glass with telecom optical frequencies and strong radiation pressure forces resulting in Brillouin gains on the order of 500 and 50 000 W−1m−1 for backward and forward Brillouin scattering, respectively.

A pile-up phenomenon during arsenic diffusion in silicon-on-insulator structures formed by oxygen implantation

Science.gov (United States)

Normand, P.; Tsoukalas, D.; Guillemot, N.; Chenevier, P.

1989-10-01

Arsenic diffusion in silicon-on-insulator formed by deep oxygen implantation is studied by secondary ion mass spectroscopy and speading resistance measurements. An enhanced diffusivity as well as a pile-up phenomenon are observed in the thin silicon layer. The McNabb and Foster equations [Trans. TMS-AIME 22, 618 (1963)] for diffusion with trapping are solved in order to simulate this last effect.

Thermal insulation product for insulation, especially in nuclear power engineering, and method of its production

International Nuclear Information System (INIS)

Veselovsky, P.; Zink, S.; Balacek, P.; Mares, I.

1989-01-01

The insulation consists of a sewn fabric cover made of inorganic fibers, in which the fiber filling is reinforced mechanically by dense point interweaving. The inorganic fibers, 1 to 5 μm in diameter, consist of min. 97 wt.% mixture of aluminium and silicon oxides in the vitreous state. The fibers making up the cover consist of min. 95% silicon, aluminium, calcium, magnesium and boron oxides in the vitreous state; the rest can consist of alloy steel fibres. The bulk density of the insulation is 70 to 150 kg/m 3 . The product is highly resistant to temperature and to the action of chemicals, water, and acid and alkaline deactivation solutions. Its manufacture is fast and undemanding. It is designed for thermal insulation of pipes, tanks and valves in nuclear power plants. (M.D.). 2 figs

A high voltage SOI pLDMOS with a partial interface equipotential floating buried layer

International Nuclear Information System (INIS)

Wu Lijuan; Zhang Wentong; Zhang Bo; Li Zhaoji

2013-01-01

A novel silicon-on-insulator (SOI) high-voltage pLDMOS is presented with a partial interface equipotential floating buried layer (FBL) and its analytical model is analyzed in this paper. The surface heavily doped p-top layers, interface floating buried N + /P + layers, and three-step field plates are designed carefully in the FBL SOI pLDMOS to optimize the electric field distribution of the drift region and reduce the specific resistance. On the condition of ESIMOX (epoxy separated by implanted oxygen), it has been shown that the breakdown voltage of the FBL SOI pLDMOS is increased from −232 V of the conventional SOI to −425 V and the specific resistance R on,sp is reduced from 0.88 to 0.2424 Ω·cm 2 . (semiconductor devices)

Nano-SiC region formation in (100) Si-on-insulator substrate: Optimization of hot-C+-ion implantation process to improve photoluminescence intensity

Science.gov (United States)

Mizuno, Tomohisa; Omata, Yuhsuke; Kanazawa, Rikito; Iguchi, Yusuke; Nakada, Shinji; Aoki, Takashi; Sasaki, Tomokazu

2018-04-01

We experimentally studied the optimization of the hot-C+-ion implantation process for forming nano-SiC (silicon carbide) regions in a (100) Si-on-insulator substrate at various hot-C+-ion implantation temperatures and C+ ion doses to improve photoluminescence (PL) intensity for future Si-based photonic devices. We successfully optimized the process by hot-C+-ion implantation at a temperature of about 700 °C and a C+ ion dose of approximately 4 × 1016 cm-2 to realize a high intensity of PL emitted from an approximately 1.5-nm-thick C atom segregation layer near the surface-oxide/Si interface. Moreover, atom probe tomography showed that implanted C atoms cluster in the Si layer and near the oxide/Si interface; thus, the C content locally condenses even in the C atom segregation layer, which leads to SiC formation. Corrector-spherical aberration transmission electron microscopy also showed that both 4H-SiC and 3C-SiC nanoareas near both the surface-oxide/Si and buried-oxide/Si interfaces partially grow into the oxide layer, and the observed PL photons are mainly emitted from the surface SiC nano areas.

High-performance a-IGZO thin-film transistor with conductive indium-tin-oxide buried layer

Science.gov (United States)

Ahn, Min-Ju; Cho, Won-Ju

2017-10-01

In this study, we fabricated top-contact top-gate (TCTG) structure of amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) with a thin buried conductive indium-tin oxide (ITO) layer. The electrical performance of a-IGZO TFTs was improved by inserting an ITO buried layer under the IGZO channel. Also, the effect of the buried layer's length on the electrical characteristics of a-IGZO TFTs was investigated. The electrical performance of the transistors improved with increasing the buried layer's length: a large on/off current ratio of 1.1×107, a high field-effect mobility of 35.6 cm2/Vs, a small subthreshold slope of 116.1 mV/dec, and a low interface trap density of 4.2×1011 cm-2eV-1 were obtained. The buried layer a-IGZO TFTs exhibited enhanced transistor performance and excellent stability against the gate bias stress.

Strong Electro-Absorption in GeSi Epitaxy on Silicon-on-Insulator (SOI

Directory of Open Access Journals (Sweden)

John E. Cunningham

2012-04-01

Full Text Available We have investigated the selective epitaxial growth of GeSi bulk material on silicon-on-insulator substrates by reduced pressure chemical vapor deposition. We employed AFM, SIMS, and Hall measurements, to characterize the GeSi heteroepitaxy quality. Optimal growth conditions have been identified to achieve low defect density, low RMS roughness with high selectivity and precise control of silicon content. Fabricated vertical p-i-n diodes exhibit very low dark current density of 5 mA/cm² at −1 V bias. Under a 7.5 V/µm E-field, GeSi alloys with 0.6% Si content demonstrate very strong electro-absorption with an estimated effective ∆α/α around 3.5 at 1,590 nm. We compared measured ∆α/α performance to that of bulk Ge. Optical modulation up to 40 GHz is observed in waveguide devices while small signal analysis indicates bandwidth is limited by device parasitics.

Improved the Surface Roughness of Silicon Nanophotonic Devices by Thermal Oxidation Method

Energy Technology Data Exchange (ETDEWEB)

Shi Zujun; Shao Shiqian; Wang Yi, E-mail: ywangwnlo@mail.hust.edu.cn [Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, No. 1037, Luoyu Street, Wuhan 430074 (China)

2011-02-01

The transmission loss of the silicon-on-insulator (SOI) waveguide and the coupling loss of the SOI grating are determined to a large extent by the surface roughness. In order to obtain smaller loss, thermal oxidation is a good choice to reduce the surface roughness of the SOI waveguide and grating. Before the thermal oxidation, the root mean square of the surface roughness is over 11 nm. After the thermal oxidation, the SEM figure shows that the bottom of the grating is as smooth as quartz surface, while the AFM shows that the root mean square of the surface is less than 5 nm.

Helium ion beam induced electron emission from insulating silicon nitride films under charging conditions

Science.gov (United States)

Petrov, Yu. V.; Anikeva, A. E.; Vyvenko, O. F.

2018-06-01

Secondary electron emission from thin silicon nitride films of different thicknesses on silicon excited by helium ions with energies from 15 to 35 keV was investigated in the helium ion microscope. Secondary electron yield measured with Everhart-Thornley detector decreased with the irradiation time because of the charging of insulating films tending to zero or reaching a non-zero value for relatively thick or thin films, respectively. The finiteness of secondary electron yield value, which was found to be proportional to electronic energy losses of the helium ion in silicon substrate, can be explained by the electron emission excited from the substrate by the helium ions. The method of measurement of secondary electron energy distribution from insulators was suggested, and secondary electron energy distribution from silicon nitride was obtained.

Integration of functional complex oxide nanomaterials on silicon

Directory of Open Access Journals (Sweden)

Jose Manuel eVila-Fungueiriño

2015-06-01

Full Text Available The combination of standard wafer-scale semiconductor processing with the properties of functional oxides opens up to innovative and more efficient devices with high value applications that can be produced at large scale. This review uncovers the main strategies that are successfully used to monolithically integrate functional complex oxide thin films and nanostructures on silicon: the chemical solution deposition approach (CSD and the advanced physical vapor deposition techniques such as oxide molecular beam epitaxy (MBE. Special emphasis will be placed on complex oxide nanostructures epitaxially grown on silicon using the combination of CSD and MBE. Several examples will be exposed, with a particular stress on the control of interfaces and crystallization mechanisms on epitaxial perovskite oxide thin films, nanostructured quartz thin films, and octahedral molecular sieve nanowires. This review enlightens on the potential of complex oxide nanostructures and the combination of both chemical and physical elaboration techniques for novel oxide-based integrated devices.

Compact Buried Ducts in a Hot-Humid Climate House

Energy Technology Data Exchange (ETDEWEB)

Mallay, Dave [Home Innovation Research Labs, Upper Marlboro, MD (United States)

2016-01-07

"9A system of compact, buried ducts provides a high-performance and cost-effective solution for delivering conditioned air throughout the building. This report outlines research activities that are expected to facilitate adoption of compact buried duct systems by builders. The results of this research would be scalable to many new house designs in most climates and markets, leading to wider industry acceptance and building code and energy program approval. The primary research question with buried ducts is potential condensation at the outer jacket of the duct insulation in humid climates during the cooling season. Current best practices for buried ducts rely on encapsulating the insulated ducts with closed-cell spray polyurethane foam insulation to control condensation and improve air sealing. The encapsulated buried duct concept has been analyzed and shown to be effective in hot-humid climates. The purpose of this project is to develop an alternative buried duct system that performs effectively as ducts in conditioned space - durable, energy efficient, and cost-effective - in a hot-humid climate (IECC warm-humid climate zone 3A) with three goals that distinguish this project: 1) Evaluation of design criteria for buried ducts that use common materials and do not rely on encapsulation using spray foam or disrupt traditional work sequences; 2) Establishing design criteria for compact ducts and incorporate those with the buried duct criteria to further reduce energy losses and control installed costs; 3) Developing HVAC design guidance for performing accurate heating and cooling load calculations for compact buried ducts.

Influence of germanium on thermal dewetting and agglomeration of the silicon template layer in thin silicon-on-insulator

International Nuclear Information System (INIS)

Zhang, P P; Yang, B; Rugheimer, P P; Roberts, M M; Savage, D E; Lagally, M G; Liu Feng

2009-01-01

We investigate the influence of heteroepitaxially grown Ge on the thermal dewetting and agglomeration of the Si(0 0 1) template layer in ultrathin silicon-on-insulator (SOI). We show that increasing Ge coverage gradually destroys the long-range ordering of 3D nanocrystals along the (1 3 0) directions and the 3D nanocrystal shape anisotropy that are observed in the dewetting and agglomeration of pure SOI(0 0 1). The results are qualitatively explained by Ge-induced bond weakening and decreased surface energy anisotropy. Ge lowers the dewetting and agglomeration temperature to as low as 700 0 C.

Local sensor based on nanowire field effect transistor from inhomogeneously doped silicon on insulator

Science.gov (United States)

Presnov, Denis E.; Bozhev, Ivan V.; Miakonkikh, Andrew V.; Simakin, Sergey G.; Trifonov, Artem S.; Krupenin, Vladimir A.

2018-02-01

We present the original method for fabricating a sensitive field/charge sensor based on field effect transistor (FET) with a nanowire channel that uses CMOS-compatible processes only. A FET with a kink-like silicon nanowire channel was fabricated from the inhomogeneously doped silicon on insulator wafer very close (˜100 nm) to the extremely sharp corner of a silicon chip forming local probe. The single e-beam lithographic process with a shadow deposition technique, followed by separate two reactive ion etching processes, was used to define the narrow semiconductor nanowire channel. The sensors charge sensitivity was evaluated to be in the range of 0.1-0.2 e /√{Hz } from the analysis of their transport and noise characteristics. The proposed method provides a good opportunity for the relatively simple manufacture of a local field sensor for measuring the electrical field distribution, potential profiles, and charge dynamics for a wide range of mesoscopic objects. Diagnostic systems and devices based on such sensors can be used in various fields of physics, chemistry, material science, biology, electronics, medicine, etc.

The oxidation of titanium nitride- and silicon nitride-coated stainless steel in carbon dioxide environments

International Nuclear Information System (INIS)

Mitchell, D.R.G.; Stott, F.H.

1992-01-01

A study has been undertaken into the effects of thin titanium nitride and silicon nitride coatings, deposited by physical vapour deposition and chemical vapour deposition processes, on the oxidation resistance of 321 stainless steel in a simulated advanced gas-cooled reactor carbon dioxide environment for long periods at 550 o C and 700 o C under thermal-cycling conditions. The uncoated steel contains sufficient chromium to develop a slow-growing chromium-rich oxide layer at these temperatures, particularly if the surfaces have been machine-abraded. Failure of this layer in service allows formation of less protective iron oxide-rich scales. The presence of a thin (3-4 μm) titanium nitride coating is not very effective in increasing the oxidation resistance since the ensuing titanium oxide scale is not a good barrier to diffusion. Even at 550 o C, iron oxide-rich nodules are able to develop following relatively rapid oxidation and breakdown of the coating. At 700 o C, the coated specimens oxidize at relatively similar rates to the uncoated steel. A thin silicon nitride coating gives improved oxidation resistance, with both the coating and its slow-growing oxide being relatively electrically insulating. The particular silicon nitride coating studied here was susceptible to spallation on thermal cycling, due to an inherently weak coating/substrate interface. (Author)

Friction-induced nanofabrication on monocrystalline silicon

International Nuclear Information System (INIS)

Yu Bingjun; Qian Linmao; Yu Jiaxin; Zhou Zhongrong; Dong Hanshan; Chen Yunfei

2009-01-01

Fabrication of nanostructures has become a major concern as the scaling of device dimensions continues. In this paper, a friction-induced nanofabrication method is proposed to fabricate protrusive nanostructures on silicon. Without applying any voltage, the nanofabrication is completed by sliding an AFM diamond tip on a sample surface under a given normal load. Nanostructured patterns, such as linear nanostructures, nanodots or nanowords, can be fabricated on the target surface. The height of these nanostructures increases rapidly at first and then levels off with the increasing normal load or number of scratching cycles. TEM analyses suggest that the friction-induced hillock is composed of silicon oxide, amorphous silicon and deformed silicon structures. Compared to the tribochemical reaction, the amorphization and crystal defects induced by the mechanical interaction may have played a dominating role in the formation of the hillocks. Similar to other proximal probe methods, the proposed method enables fabrication at specified locations and facilitates measuring the dimensions of nanostructures with high precision. It is highlighted that the fabrication can also be realized on electrical insulators or oxide surfaces, such as quartz and glass. Therefore, the friction-induced method points out a new route in fabricating nanostructures on demand.

A Difference in Using Atomic Layer Deposition or Physical Vapour Deposition TiN as Electrode Material in Metal-Insulator-Metal and Metal-Insulator-Silicon Capacitors

NARCIS (Netherlands)

Groenland, A.W.; Wolters, Robertus A.M.; Kovalgin, Alexeij Y.; Schmitz, Jurriaan

2011-01-01

In this work, metal-insulator-metal (MIM) and metal-insulator-silicon (MIS) capacitors are studied using titanium nitride (TiN) as the electrode material. The effect of structural defects on the electrical properties on MIS and MIM capacitors is studied for various electrode configurations. In the

Generation and confinement of mobile charges in buried oxide of SOI substrates

International Nuclear Information System (INIS)

Gruber, O.; Krawiec, S.; Musseau, O.; Paillet, Ph.; Courtot-Descharles, A.

1999-01-01

We analyze the mechanisms of generation and confinement of mobile protons resulting from hydrogen annealing of SOI buried oxides. This study of the mechanisms of generation and confinement of mobile protons in the buried oxide of SOI wafers emphasizes the importance of H+ diffusion in the oxide in the formation of a mobile charge. Under specific electric field conditions the irradiation of these devices results in a pinning of this mobile charge at the bottom Si-SiO 2 interface. Ab initio calculations are in progress to investigate the possible precursor defects in the oxide and detail the mechanism for mobile proton generation and confinement. (authors)

The silicon-silicon oxide multilayers utilization as intrinsic layer on pin solar cells

International Nuclear Information System (INIS)

Colder, H.; Marie, P.; Gourbilleau, F.

2008-01-01

Silicon nanostructures are promising candidate for the intrinsic layer on pin solar cells. In this work we report on new material: silicon-rich silicon oxide (SRSO) deposited by reactive magnetron sputtering of a pure silica target and an interesting structure: multilayers consisting of a stack of SRSO and pure silicon oxide layers. Two thicknesses of the SRSO sublayer, t SRSO , are studied 3 nm and 5 nm whereas the thickness of silica sublayer is maintaining at 3 nm. The presence of nanocrystallites of silicon, evidenced by X-Ray diffraction (XRD), leads to photoluminescence (PL) emission at room temperature due to the quantum confinement of the carriers. The PL peak shifts from 1.3 eV to 1.5 eV is correlated to the decreasing of t SRSO from 5 nm down to 3 nm. In the purpose of their potential utilization for i-layer, the optical properties are studied by absorption spectroscopy. The achievement a such structures at promising absorption properties. Moreover by favouring the carriers injection by the tunnel effect between silicon nanograins and silica sublayers, the multilayers seem to be interesting for solar cells

Redistribution of erbium during the crystallization of buried amorphous silicon layers

International Nuclear Information System (INIS)

Aleksandrov, O.V.; Nikolaev, Yu.A.; Sobolev, N.A.; Sakharov, V.I.; Serenkov, I.T.; Kudryavtsev, Yu.A.

1999-01-01

The redistribution of Er during its implantation in silicon at doses close to the amorphization threshold and its subsequent solid-phase epitaxial (SPE) crystallization is investigated. The formation of a buried amorphous (a) layer is discovered at Er doses equal to 5x10 13 and 1x10 14 cm -2 using Rutherford backscattering. The segregation of Er in this case takes place inwardly from the two directions corresponding to the upper and lower boundaries of the buried αlayer and leads to the formation of a concentration peak at the meeting place of the two crystallization fronts. A method for calculating the coordinate dependence of the segregation coefficient k from the distribution profiles of the erbium impurity before and after annealing is proposed. The k(x) curve exhibits a drop, whose width increases with decreasing Er implantation dose. Its appearance is attributed to the nonequilibrium nature of the segregation process at the beginning of SPE crystallization

Oxygen-induced inhibition of silicon-on-insulator dewetting

Energy Technology Data Exchange (ETDEWEB)

Curiotto, S.; Leroy, F.; Cheynis, F.; Müller, P. [Aix Marseille Université, CNRS, CINaM UMR 7325, 13288 Marseille (France)

2014-02-10

We report that solid state dewetting of Si thin film on SiO{sub 2} can be reversibly inhibited by exposing the Si surface to a partial pressure of dioxygen (∼10{sup −7}Torr) at high temperature (∼1100K). Coupling in situ Low-Energy Electron Microscopy and ex situ atomic force microscopy we propose that the pinning of the contact line induced by the presence of small amounts of silicon oxide is the main physical process that inhibits the dewetting.

Bipolar resistive switching in metal-insulator-semiconductor nanostructures based on silicon nitride and silicon oxide

Science.gov (United States)

Koryazhkina, M. N.; Tikhov, S. V.; Mikhaylov, A. N.; Belov, A. I.; Korolev, D. S.; Antonov, I. N.; Karzanov, V. V.; Gorshkov, O. N.; Tetelbaum, D. I.; Karakolis, P.; Dimitrakis, P.

2018-03-01

Bipolar resistive switching in metal-insulator-semiconductor (MIS) capacitor-like structures with an inert Au top electrode and a Si3N4 insulator nanolayer (6 nm thick) has been observed. The effect of a highly doped n +-Si substrate and a SiO2 interlayer (2 nm) is revealed in the changes in the semiconductor space charge region and small-signal parameters of parallel and serial equivalent circuit models measured in the high- and low-resistive capacitor states, as well as under laser illumination. The increase in conductivity of the semiconductor capacitor plate significantly reduces the charging and discharging times of capacitor-like structures.

Ultra-low power high temperature and radiation hard complementary metal-oxide-semiconductor (CMOS) silicon-on-insulator (SOI) voltage reference.

Science.gov (United States)

Boufouss, El Hafed; Francis, Laurent A; Kilchytska, Valeriya; Gérard, Pierre; Simon, Pascal; Flandre, Denis

2013-12-13

This paper presents an ultra-low power CMOS voltage reference circuit which is robust under biomedical extreme conditions, such as high temperature and high total ionized dose (TID) radiation. To achieve such performances, the voltage reference is designed in a suitable 130 nm Silicon-on-Insulator (SOI) industrial technology and is optimized to work in the subthreshold regime of the transistors. The design simulations have been performed over the temperature range of -40-200 °C and for different process corners. Robustness to radiation was simulated using custom model parameters including TID effects, such as mobilities and threshold voltages degradation. The proposed circuit has been tested up to high total radiation dose, i.e., 1 Mrad (Si) performed at three different temperatures (room temperature, 100 °C and 200 °C). The maximum drift of the reference voltage V(REF) depends on the considered temperature and on radiation dose; however, it remains lower than 10% of the mean value of 1.5 V. The typical power dissipation at 2.5 V supply voltage is about 20 μW at room temperature and only 75 μW at a high temperature of 200 °C. To understand the effects caused by the combination of high total ionizing dose and temperature on such voltage reference, the threshold voltages of the used SOI MOSFETs were extracted under different conditions. The evolution of V(REF) and power consumption with temperature and radiation dose can then be explained in terms of the different balance between fixed oxide charge and interface states build-up. The total occupied area including pad-ring is less than 0.09 mm2.

High temperature study of flexible silicon-on-insulator fin field-effect transistors

KAUST Repository

Diab, Amer El Hajj

2014-09-29

We report high temperature electrical transport characteristics of a flexible version of the semiconductor industry\\'s most advanced architecture: fin field-effect transistor on silicon-on-insulator with sub-20 nm fins and high-κ/metal gate stacks. Characterization from room to high temperature (150 °C) was completed to determine temperature dependence of drain current (Ids), gate leakage current (Igs), transconductance (gm), and extracted low-field mobility (μ0). Mobility degradation with temperature is mainly caused by phonon scattering. The other device characteristics show insignificant difference at high temperature which proves the suitability of inorganic flexible electronics with advanced device architecture.

Silicon-on-insulator-based polarization-independent 1×3 broadband beam splitter with adiabatic coupling

Science.gov (United States)

Gong, Yuanhao; Liu, Lei; Chang, Limin; Li, Zhiyong; Tan, Manqing; Yu, Yude

2017-10-01

We propose and numerically simulate a polarization-independent 1×3 broadband beam splitter based on silicon-on-insulator (SOI) technology with adiabatic coupling. The designed structure is simulated by beam-propagation-method (BPM) and gets simulated transmission uniformity of three outputs better than 0.3dB for TE-polarization and 0.8dB for TM-polarization in a broadband of 180nm.

Features of carrier tunneling between the silicon valence band and metal in devices based on the Al/high-K oxide/SiO_2/Si structure

International Nuclear Information System (INIS)

Vexler, M. I.; Grekhov, I. V.

2016-01-01

The features of electron tunneling from or into the silicon valence band in a metal–insulator–semiconductor system with the HfO_2(ZrO_2)/SiO_2 double-layer insulator are theoretically analyzed for different modes. It is demonstrated that the valence-band current plays a less important role in structures with HfO_2(ZrO_2)/SiO_2 than in structures containing only silicon dioxide. In the case of a very wide-gap high-K oxide ZrO_2, nonmonotonic behavior related to tunneling through the upper barrier is predicted for the valence-band–metal current component. The use of an insulator stack can offer certain advantages for some devices, including diodes, bipolar tunnel-emitter transistors, and resonant-tunneling diodes, along with the traditional use of high-K insulators in a field-effect transistor.

Modelling of a DBR laser based on Raman effect in a silicon-on-insulator rib waveguide

International Nuclear Information System (INIS)

De Leonardis, Francesco; Dimastrodonato, Valeria; Passaro, Vittorio M N

2008-01-01

In this paper, third-order nonlinearities in silicon-on-insulator rib waveguides are investigated to obtain complete modelling, describing the behaviour of a stimulated Raman scattering based laser. The simulations of a distributed Bragg reflector laser operation in a time domain allow for the first time to study in detail the dependence of threshold and output powers on different device parameters. Both continuous wave and pulsed laser operations are theoretically demonstrated, as well as their dependence on device parameters

Demonstration of slot-waveguide structures on silicon nitride / silicon oxide platform.

Science.gov (United States)

Barrios, C A; Sánchez, B; Gylfason, K B; Griol, A; Sohlström, H; Holgado, M; Casquel, R

2007-05-28

We report on the first demonstration of guiding light in vertical slot-waveguides on silicon nitride/silicon oxide material system. Integrated ring resonators and Fabry-Perot cavities have been fabricated and characterized in order to determine optical features of the slot-waveguides. Group index behavior evidences guiding and confinement in the low-index slot region at O-band (1260-1370nm) telecommunication wavelengths. Propagation losses of <20 dB/cm have been measured for the transverse-electric mode of the slot-waveguides.

Selective SiO2 etching in three dimensional structures using parylene-C as mask

NARCIS (Netherlands)

Veltkamp, Henk-Willem; Zhao, Yiyuan; de Boer, Meint J.; Wiegerink, Remco J.; Lötters, Joost Conrad

2017-01-01

This abstract describes an application of an easy and straightforward method for selective SiO2 etching in three dimensional structures, which is developed by our group. The application in this abstract is the protection of the buried-oxide (BOX) layer of a silicon-on-insulator (SOI) wafer against

Hot-Electron Bolometer Mixers on Silicon-on-Insulator Substrates for Terahertz Frequencies

Science.gov (United States)

Skalare, Anders; Stern, Jeffrey; Bumble, Bruce; Maiwald, Frank

2005-01-01

A terahertz Hot-Electron Bolometer (HEB) mixer design using device substrates based on Silicon-On-Insulator (SOI) technology is described. This substrate technology allows very thin chips (6 pm) with almost arbitrary shape to be manufactured, so that they can be tightly fitted into a waveguide structure and operated at very high frequencies with only low risk for power leakages and resonance modes. The NbTiN-based bolometers are contacted by gold beam-leads, while other beamleads are used to hold the chip in place in the waveguide test fixture. The initial tests yielded an equivalent receiver noise temperature of 3460 K double-sideband at a local oscillator frequency of 1.462 THz and an intermediate frequency of 1.4 GHz.

Synchrotron Topographic and Diffractometer Studies of Buried Layered Structures Obtained by Implantation with Swift Heavy Ions in Silicon Single Crystals

International Nuclear Information System (INIS)

Wierzchowski, W.; Wieteska, K.; Zymierska, D.; Graeff, W.; Czosnyka, T.; Choinski, J.

2006-01-01

A distribution of crystallographic defects and deformation in silicon crystals subjected to deep implantation (20-50 μm) with ions of the energy of a few MeV/amu is studied. Three different buried layered structures (single layer, binary buried structure and triple buried structure) were obtained by implantation of silicon single crystals with 184 MeV argon ions, 29.7 MeV boron ions, and 140 MeV argon ions, each implantation at a fluency of 1x10 14 ions cm -2 . The implanted samples were examined by means of white beam X-ray section and projection topography, monochromatic beam topography and by recording local rocking curves with the beam restricted to 50 x 50 μm 2 . The experiment pointed to a very low level of implantation-induced strain (below 10 -5 ). The white beam Bragg case section experiment revealed a layer producing district black contrast located at a depth of the expected mean ion range. The presence of these buried layered structures in studied silicon crystals strongly affected the fringe pattern caused by curvature of the samples. In case of white beam projection and monochromatic beam topographs the implanted areas were revealed as darker regions with a very tiny grain like structure. One may interpret these results as the effect of considerable heating causing annihilation of point defects and formation of dislocation loops connected with point defect clusters. (author)

The influence of initial defects on mechanical stress and deformation distribution in oxidized silicon

Directory of Open Access Journals (Sweden)

Kulinich O. A.

2008-10-01

Full Text Available The near-surface silicon layers in silicon – dioxide silicon systems with modern methods of research are investigated. It is shown that these layers have compound structure and their parameters depend on oxidation and initial silicon parameters. It is shown the influence of initial defects on mechanical stress and deformation distribution in oxidized silicon.

Reactions and Diffusion During Annealing-Induced H(+) Generation in SOI Buried Oxides

International Nuclear Information System (INIS)

Devine, R.A.B.; Fleetwood, D.M.; Vanheusden, K; Warren, W.L.

1999-01-01

We report experimental results suggesting that mobile protons are generated at strained Si-O-Si bonds near the Si/SiO 2 interface during annealing in forming gas. Our data further suggest that the presence of the top Si layer plays a crucial role in the mobile H + generation process. Finally, we show that the diffusion of the reactive species (presumably H 2 or H 0 ) towards the H + generation sites occurs laterally along the buried oxide layer, and can be impeded significantly due to the presence of trapping sites in the buried oxide

Photoluminescence and electrical properties of silicon oxide and silicon nitride superlattices containing silicon nanocrystals

International Nuclear Information System (INIS)

Shuleiko, D V; Ilin, A S

2016-01-01

Photoluminescence and electrical properties of superlattices with thin (1 to 5 nm) alternating silicon-rich silicon oxide or silicon-rich silicon nitride, and silicon oxide or silicon nitride layers containing silicon nanocrystals prepared by plasma-enhanced chemical vapor deposition with subsequent annealing were investigated. The entirely silicon oxide based superlattices demonstrated photoluminescence peak shift due to quantum confinement effect. Electrical measurements showed the hysteresis effect in the vicinity of zero voltage due to structural features of the superlattices from SiOa 93 /Si 3 N 4 and SiN 0 . 8 /Si 3 N 4 layers. The entirely silicon nitride based samples demonstrated resistive switching effect, comprising an abrupt conductivity change at about 5 to 6 V with current-voltage characteristic hysteresis. The samples also demonstrated efficient photoluminescence with maximum at ∼1.4 eV, due to exiton recombination in silicon nanocrystals. (paper)

Magnetic oxide heterostructures. EuO on cubic oxides and on silicon

International Nuclear Information System (INIS)

Caspers, Christian

2013-01-01

In the thesis at hand, we explore fundamental properties of ultrathin europium oxide (EuO) films. EuO is a model system of a localized 4f Heisenberg ferromagnet, in which the ferromagnetic coupling. provided a high crystalline quality. can be tuned by biaxial lattice strain. Moreover, the magnetic oxide EuO is perfectly suited as a spin-functional tunnel contact for silicon spintronics. However, up to now a challenging bulk and interface chemistry of EuO and Si has hampered a seamless integration into functional silicon heterostructures. In order to investigate fundamental aspects of the magnetic and electronic structure of ultrathin EuO, in the first part of this thesis, we synthesize EuO thin films on conductive YSZ substrates from bulklike thicknesses down to one nanometer by oxide molecular beam epitaxy (MBE). The EuO thin films are of textbook-like single-crystalline quality, and show bulk-like magnetic properties. We control the stoichiometry of buried EuO thin films by hard X-ray photoemission spectroscopy (HAXPES); even a 1 nm ultrathin EuO film exhibits no valence change or interface shifts. Furthermore, we conduct an advanced magnetic characterization by the magnetic circular dichroism (MCD) of Eu core-levels in photoemission, this gives us insight into the intra-atomic exchange coupling of EuO thin films. The MCD reveals large asymmetries of up to 49% in the well-resolved Eu 4d photoemission multiplet. Thus, ultrathin EuO coherently grown on conductive YSZ allows us to explore fundamental magnetic and electronic properties of a 4f magnetic oxide. Biaxial lateral strain applied to single-crystalline EuO is of fundamental interest, since it alters the electronic structure and magnetic coupling in a controlled way. We apply +4.2% tensile biaxial strain to EuO by epitaxial EuO/LaAlO 3 (100) heterostructures. EuO seamlessly adapts the lateral lattice parameter of LaAlO 3 , while the perpendicular parameter of EuO is the unchanged EuO bulk value, thus the

Flexible high-κ/Metal gate metal/insulator/metal capacitors on silicon (100) fabric

KAUST Repository

Rojas, Jhonathan Prieto

2013-10-01

Implementation of memory on bendable substrates is an important step toward a complete and fully developed notion of mechanically flexible computational systems. In this paper, we have demonstrated a simple fabrication flow to build metal-insulator-metal capacitors, key components of dynamic random access memory, on a mechanically flexible silicon (100) fabric. We rely on standard microfabrication processes to release a thin sheet of bendable silicon (area: 18 {\\ m cm}2 and thickness: 25 \\\\mu{\\ m m}) in an inexpensive and reliable way. On such platform, we fabricated and characterized the devices showing mechanical robustness (minimum bending radius of 10 mm at an applied strain of 83.33% and nominal strain of 0.125%) and consistent electrical behavior regardless of the applied mechanical stress. Furthermore, and for the first time, we performed a reliability study suggesting no significant difference in performance and showing an improvement in lifetime projections. © 1963-2012 IEEE.

Formation and dielectric properties of polyelectrolyte multilayers studied by a silicon-on-insulator based thin film resistor.

Science.gov (United States)

Neff, Petra A; Wunderlich, Bernhard K; Klitzing, Regine V; Bausch, Andreas R

2007-03-27

The formation of polyelectrolyte multilayers (PEMs) is investigated using a silicon-on-insulator based thin film resistor which is sensitive to variations of the surface potential. The buildup of the PEMs at the silicon oxide surface of the device can be observed in real time as defined potential shifts. The influence of polymer charge density is studied using the strong polyanion poly(styrene sulfonate), PSS, combined with the statistical copolymer poly(diallyl-dimethyl-ammoniumchloride-stat-N-methyl-N-vinylacetamide), P(DADMAC-stat-NMVA), at various degrees of charge (DC). The multilayer formation stops after a few deposition steps for a DC below 75%. We show that the threshold of surface charge compensation corresponds to the threshold of multilayer formation. However, no reversion of the preceding surface charge was observed. Screening of polyelectrolyte charges by mobile ions within the polymer film leads to a decrease of the potential shifts with the number of layers deposited. This decrease is much slower for PEMs consisting of P(DADMAC-stat-NMVA) and PSS as compared to PEMs consisting of poly(allylamine-hydrochloride), PAH, and PSS. From this, significant differences in the dielectric constants of the polyelectrolyte films and in the concentration of mobile ions within the films can be derived.

Wafer scale formation of monocrystalline silicon-based Mie resonators via silicon-on-insulator dewetting.

Science.gov (United States)

Abbarchi, Marco; Naffouti, Meher; Vial, Benjamin; Benkouider, Abdelmalek; Lermusiaux, Laurent; Favre, Luc; Ronda, Antoine; Bidault, Sébastien; Berbezier, Isabelle; Bonod, Nicolas

2014-11-25

Subwavelength-sized dielectric Mie resonators have recently emerged as a promising photonic platform, as they combine the advantages of dielectric microstructures and metallic nanoparticles supporting surface plasmon polaritons. Here, we report the capabilities of a dewetting-based process, independent of the sample size, to fabricate Si-based resonators over large scales starting from commercial silicon-on-insulator (SOI) substrates. Spontaneous dewetting is shown to allow the production of monocrystalline Mie-resonators that feature two resonant modes in the visible spectrum, as observed in confocal scattering spectroscopy. Homogeneous scattering responses and improved spatial ordering of the Si-based resonators are observed when dewetting is assisted by electron beam lithography. Finally, exploiting different thermal agglomeration regimes, we highlight the versatility of this technique, which, when assisted by focused ion beam nanopatterning, produces monocrystalline nanocrystals with ad hoc size, position, and organization in complex multimers.

Pr-O-Al-N dielectrics for metal insulator semiconductor stacks

Energy Technology Data Exchange (ETDEWEB)

Henkel, Karsten; Torche, Mohamed; Sohal, Rakesh; Karavaev, Konstantin; Burkov, Yevgen; Schwiertz, Carola; Schmeisser, Dieter [Brandenburg University of Technology, Chair of Applied Physics and Sensors, K.-Wachsmann-Allee 1, 03046 Cottbus (Germany)

2011-02-15

This work focuses on praseodymium oxide films as a high-k material on silicon and silicon carbide (SiC) in metal insulator semiconductor samples. The electrical results are correlated to spectroscopic findings on this material system. Strong interfacial reactions between the praseodymium oxide and the semiconductor as well as silicon inter-diffusion into the high-k material are observed. The importance of a buffer layer is discussed and its optimisation is addressed, too. In particular the improvement of the performance by the introduction of an aluminium oxynitride buffer layer, which acts as an inter-diffusion barrier and reduces the leakage current, the interface state density and the equivalent oxide thickness is demonstrated. (Copyright copyright 2011 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

Subsurface oxidation for micropatterning silicon (SOMS).

Science.gov (United States)

Zhang, Feng; Sautter, Ken; Davis, Robert C; Linford, Matthew R

2009-02-03

Here we present a straightforward patterning technique for silicon: subsurface oxidation for micropatterning silicon (SOMS). In this method, a stencil mask is placed above a silicon surface. Radio-frequency plasma oxidation of the substrate creates a pattern of thicker oxide in the exposed regions. Etching with HF or KOH produces very shallow or much higher aspect ratio features on silicon, respectively, where patterning is confirmed by atomic force microscopy, scanning electron microscopy, and optical microscopy. The oxidation process itself is studied under a variety of reaction conditions, including higher and lower oxygen pressures (2 and 0.5 Torr), a variety of powers (50-400 W), different times and as a function of reagent purity (99.5 or 99.994% oxygen). SOMS can be easily executed in any normal chemistry laboratory with a plasma generator. Because of its simplicity, it may have industrial viability.

Silver nanoparticle formation in thin oxide layer on silicon by silver-negative-ion implantation for Coulomb blockade at room temperature

International Nuclear Information System (INIS)

Tsuji, Hiroshi; Arai, Nobutoshi; Matsumoto, Takuya; Ueno, Kazuya; Gotoh, Yasuhito; Adachi, Kouichiro; Kotaki, Hiroshi; Ishikawa, Junzo

2004-01-01

Formation of silver nanoparticles formed by silver negative-ion implantation in a thin SiO 2 layer and its I-V characteristics were investigated for development single electron devices. In order to obtain effective Coulomb blockade phenomenon at room temperature, the isolated metal nanoparticles should be in very small size and be formed in a thin insulator layer such as gate oxide on the silicon substrate. Therefore, conditions of a fine particles size, high particle density and narrow distribution should be controlled at their formation without any electrical breakdown of the thin insulator layer. We have used a negative-ion implantation technique with an advantage of 'charge-up free' for insulators, with which no breakdown of thin oxide layer on Si was obtained. In the I-V characteristics with Au electrode, the current steps were observed with a voltage interval of about 0.12 V. From the step voltage the corresponded capacitance was calculated to be 0.7 aF. In one nanoparticle system, this value of capacitance could be given by a nanoparticle of about 3 nm in diameter. This consideration is consistent to the measured particle size in the cross-sectional TEM observation. Therefore, the observed I-V characteristics with steps are considered to be Coulomb staircase by the Ag nanoparticles

Study of high energy ion implantation of boron and oxygen in silicon

International Nuclear Information System (INIS)

Thevenin, P.

1991-06-01

Three aspects of high energy (0.5-3 MeV) light ions ( 11 B + and 16 O + ) implantation in silicon are examined: (1)Spatial repartition; (2) Target damage and (3) Synthesis by oxygen implantation of a buried silicon oxide layer

Use of porous silicon to minimize oxidation induced stacking fault defects in silicon

International Nuclear Information System (INIS)

Shieh, S.Y.; Evans, J.W.

1992-01-01

This paper presents methods for minimizing stacking fault defects, generated during oxidation of silicon, include damaging the back of the wafer or depositing poly-silicon on the back. In either case a highly defective structure is created and this is capable of gettering either self-interstitials or impurities which promote nucleation of stacking fault defects. A novel method of minimizing these defects is to form a patch of porous silicon on the back of the wafer by electrochemical etching. Annealing under inert gas prior to oxidation may then result in the necessary gettering. Experiments were carried out in which wafers were subjected to this treatment. Subsequent to oxidation, the wafers were etched to remove oxide and reveal defects. The regions of the wafer adjacent to the porous silicon patch were defect-free, whereas remote regions had defects. Deep level transient spectroscopy has been used to examine the gettering capability of porous silicon, and the paper discusses the mechanism by which the porous silicon getters

Observation of an optical event horizon in a silicon-on-insulator photonic wire waveguide.

Science.gov (United States)

Ciret, Charles; Leo, François; Kuyken, Bart; Roelkens, Gunther; Gorza, Simon-Pierre

2016-01-11

We report on the first experimental observation of an optical analogue of an event horizon in integrated nanophotonic waveguides, through the reflection of a continuous wave on an intense pulse. The experiment is performed in a dispersion-engineered silicon-on-insulator waveguide. In this medium, solitons do not suffer from Raman induced self-frequency shift as in silica fibers, a feature that is interesting for potential applications of optical event horizons. As shown by simulations, this also allows the observation of multiple reflections at the same time on fundamental solitons ejected by soliton fission.

Non-classical polycrystalline silicon thin-film transistor with embedded block-oxide for suppressing the short channel effect

International Nuclear Information System (INIS)

Lin, Jyi-Tsong; Huang, Kuo-Dong; Hu, Shu-Fen

2008-01-01

In this paper, a polycrystalline silicon (polysilicon) thin-film transistor with a block oxide enclosing body, BTFT, is fabricated and investigated. By utilizing the block-oxide structure of thin-film transistors, the BTFT is shown to suppress the short channel effect. This proposed structure is formed by burying self-aligned oxide spacers along the sidewalls of the source and drain junctions, which reduces the P–N junction area, thereby reducing the junction capacitance and leakage current. Measurements demonstrate that the BTFT eliminates the punch-through effect even down to gate lengths of 1.5 µm, whereas the conventional TFT suffers serious short channel effects at this gate length

Mode converter based on an inverse taper for multimode silicon nanophotonic integrated circuits.

Science.gov (United States)

Dai, Daoxin; Mao, Mao

2015-11-02

An inverse taper on silicon is proposed and designed to realize an efficient mode converter available for the connection between multimode silicon nanophotonic integrated circuits and few-mode fibers. The present mode converter has a silicon-on-insulator inverse taper buried in a 3 × 3μm(2) SiN strip waveguide to deal with not only for the fundamental mode but also for the higher-order modes. The designed inverse taper enables the conversion between the six modes (i.e., TE(11), TE(21), TE(31), TE(41), TM(11), TM(12)) in a 1.4 × 0.22μm(2) multimode SOI waveguide and the six modes (like the LP(01), LP(11a), LP(11b) modes in a few-mode fiber) in a 3 × 3μm(2) SiN strip waveguide. The conversion efficiency for any desired mode is higher than 95.6% while any undesired mode excitation ratio is lower than 0.5%. This is helpful to make multimode silicon nanophotonic integrated circuits (e.g., the on-chip mode (de)multiplexers developed well) available to work together with few-mode fibers in the future.

Effect of TMAH Etching Duration on the Formation of Silicon Nano wire Transistor Patterned by AFM Nano lithography

International Nuclear Information System (INIS)

Hutagalung, S.D.; Lew, K.C.

2012-01-01

Atomic force microscopy (AFM) lithography was applied to produce nano scale pattern for silicon nano wire transistor fabrication. This technique takes advantage of imaging facility of AFM and the ability of probe movement controlling over the sample surface to create nano patterns. A conductive AFM tip was used to grow the silicon oxide nano patterns on silicon on insulator (SOI) wafer. The applied tip-sample voltage and writing speed were well controlled in order to form pre-designed silicon oxide nano wire transistor structures. The effect of tetra methyl ammonium hydroxide (TMAH) etching duration on the oxide covered silicon nano wire transistor structure has been investigated. A completed silicon nano wire transistor was obtained by removing the oxide layer via hydrofluoric acid etching process. The fabricated silicon nano wire transistor consists of a silicon nano wire that acts as a channel with source and drain pads. A lateral gate pad with a nano wire head was fabricated very close to the channel in the formation of transistor structures. (author)

Enhancement of photovoltaic properties of multicrystalline silicon solar cells by combination of buried metallic contacts and thin porous silicon

Energy Technology Data Exchange (ETDEWEB)

Ben Rabha, M.; Bessais, B. [Laboratoire de Photovoltaique, Centre de Recherches et des Technologies de l' Energie, Technopole de Borj-Cedria, BP 95, 2050 Hammam-Lif (Tunisia)

2010-03-15

Photovoltaic properties of buried metallic contacts (BMCs) with and without application of a front porous silicon (PS) layer on multicrystalline silicon (mc-Si) solar cells were investigated. A Chemical Vapor Etching (CVE) method was used to perform front PS layer and BMCs of mc-Si solar cells. Good electrical performance for the mc-Si solar cells was observed after combination of BMCs and thin PS films. As a result the current-voltage (I-V) characteristics and the internal quantum efficiency (IQE) were improved, and the effective minority carrier diffusion length (Ln) increases from 75 to 110 {mu}m after BMCs achievement. The reflectivity was reduced to 8% in the 450-950 nm wavelength range. This simple and low cost technology induces a 12% conversion efficiency (surface area = 3.2 cm{sup 2}). The obtained results indicate that the BMCs improve charge carrier collection while the PS layer passivates the front surface. (author)

Improved vertical MOSFET performance using an epitaxial channel and a stacked silicon-insulator structure

International Nuclear Information System (INIS)

Uchino, T; Gili, E; Ashburn, P; Tan, L; Buiu, O; Hall, S

2012-01-01

A vertical MOSFET (VMOST) incorporating an epitaxial channel and a drain junction in a stacked silicon-insulator structure is presented. In this device structure, an oxide layer near the drain junction edge (referred to as a junction stop) acts as a dopant diffusion barrier and consequently a shallow drain junction is formed to suppress short channel effects. To investigate the scalability of this device, a simulation study in the sub-100 nm regime calibrated to measured results on the fabricated devices is carried out. The use of an epitaxial channel delivers 50% higher drive current due to the higher mobility of the retrograde channel and the junction stop structure delivers improvements of threshold voltage roll-off and drain-induced barrier lowering compared with a conventional VMOST. (fast track communication)

Compositional analysis of silicon oxide/silicon nitride thin films

Directory of Open Access Journals (Sweden)

Meziani Samir

2016-06-01

Full Text Available Hydrogen, amorphous silicon nitride (SiNx:H abbreviated SiNx films were grown on multicrystalline silicon (mc-Si substrate by plasma enhanced chemical vapour deposition (PECVD in parallel configuration using NH3/SiH4 gas mixtures. The mc-Si wafers were taken from the same column of Si cast ingot. After the deposition process, the layers were oxidized (thermal oxidation in dry oxygen ambient environment at 950 °C to get oxide/nitride (ON structure. Secondary ion mass spectroscopy (SIMS, Rutherford backscattering spectroscopy (RBS, Auger electron spectroscopy (AES and energy dispersive X-ray analysis (EDX were employed for analyzing quantitatively the chemical composition and stoichiometry in the oxide-nitride stacked films. The effect of annealing temperature on the chemical composition of ON structure has been investigated. Some species, O, N, Si were redistributed in this structure during the thermal oxidation of SiNx. Indeed, oxygen diffused to the nitride layer into Si2O2N during dry oxidation.

MOS structures containing silicon nanoparticles for memory device applications

International Nuclear Information System (INIS)

Nedev, N; Zlatev, R; Nesheva, D; Manolov, E; Levi, Z; Brueggemann, R; Meier, S

2008-01-01

Metal-oxide-silicon structures containing layers with amorphous or crystalline silicon nanoparticles in a silicon oxide matrix are fabricated by sequential physical vapour deposition of SiO x (x = 1.15) and RF sputtering of SiO 2 on n-type crystalline silicon, followed by high temperature annealing in an inert gas ambient. Depending on the annealing temperature, 700 deg. C or 1000 deg. C, amorphous or crystalline silicon nanoparticles are formed in the silicon oxide matrix. The annealing process is used not only for growing nanoparticles but also to form a dielectric layer with tunnelling thickness at the silicon/insulator interface. High frequency C-V measurements demonstrate that both types of structures can be charged negatively or positively by applying a positive or negative voltage on the gate. The structures with amorphous silicon nanoparticles show several important advantages compared to the nanocrystal ones, such as lower defect density at the interface between the crystalline silicon wafer and the tunnel silicon oxide, better retention characteristics and better reliability

Analysis of silicon on insulator (SOI) optical microring add-drop filter based on waveguide intersections

Science.gov (United States)

Kaźmierczak, Andrzej; Bogaerts, Wim; Van Thourhout, Dries; Drouard, Emmanuel; Rojo-Romeo, Pedro; Giannone, Domenico; Gaffiot, Frederic

2008-04-01

We present a compact passive optical add-drop filter which incorporates two microring resonators and a waveguide intersection in silicon-on-insulator (SOI) technology. Such a filter is a key element for designing simple layouts of highly integrated complex optical networks-on-chip. The filter occupies an area smaller than 10μm×10μm and exhibits relatively high quality factors (up to 4000) and efficient signal dropping capabilities. In the present work, the influence of filter parameters such as the microring-resonators radii and the coupling section shape are analyzed theoretically and experimentally

A Numerical Study on Phonon Spectral Contributions to Thermal Conduction in Silicon-on-Insulator Transistor Using Electron-Phonon Interaction Model

Energy Technology Data Exchange (ETDEWEB)

Kang, Hyung-sun; Koh, Young Ha; Jin, Jae Sik [Chosun College of Science and Technology, Gwangju (Korea, Republic of)

2017-06-15

The aim of this study is to understand the phonon transfer characteristics of a silicon thin film transistor. For this purpose, the Joule heating mechanism was considered through the electron-phonon interaction model whose validation has been done. The phonon transport characteristics were investigated in terms of phonon mean free path for the variations in the device power and silicon layer thickness from 41 nm to 177 nm. The results may be used for developing the thermal design strategy for achieving reliability and efficiency of the silicon-on-insulator (SOI) transistor, further, they will increase the understanding of heat conduction in SOI systems, which are very important in the semiconductor industry and the nano-fabrication technology.

A parametric study of laser induced ablation-oxidation on porous silicon surfaces

International Nuclear Information System (INIS)

De Stefano, Luca; Rea, Ilaria; Nigro, M Arcangela; Della Corte, Francesco G; Rendina, Ivo

2008-01-01

We have investigated the laser induced ablation-oxidation process on porous silicon layers having different porosities and thicknesses by non-destructive optical techniques. In particular, the interaction between a low power blue light laser and the porous silicon surfaces has been characterized by variable angle spectroscopic ellipsometry and Fourier transform infrared spectroscopy. The oxidation profiles etched on the porous samples can be tuned as functions of the layer porosity and laser fluence. Oxide stripes of width less than 2 μm and with thicknesses between 100 nm and 5 μm have been produced, depending on the porosity of the porous silicon, by using a 40 x focusing objective

Silicon on insulator by ion implantation: A dream or a reality

Energy Technology Data Exchange (ETDEWEB)

Pinizzotto, R F [Ultrastructure, Inc., Richardson, TX (USA)

1985-03-01

One method of producing a silicon-on-oxide structure is to implant a sufficient dose of oxygen into a conventional silicon substrate to synthesize a layer of SiO/sub 2/ just below the surface. If the proper implant conditions are maintained, the top silicon layer will be a single crystal. The required doses are large, but the use of commercially available medium current implanters can reduce the time to 25 minutes per wafer. This adds about $ 10 per chip in process related costs. A very large implanter (100 mA analyzed beam) may not be the best approach for scaling up the process. The power in the beam and the power required for operation of the machine are both enormous. A more conservative approach of using multiple medium current implanters may prove to be more economical in the long run.

Performance of the THS4302 and the Class V Radiation-Tolerant THS4304-SP Silicon Germanium Wideband Amplifiers at Extreme Temperatures

Science.gov (United States)

Patterson, Richard L.; Elbuluk, Malik; Hammoud, Ahmad; VanKeuls, Frederick W.

2009-01-01

This report discusses the performance of silicon germanium, wideband gain amplifiers under extreme temperatures. The investigated devices include Texas Instruments THS4304-SP and THS4302 amplifiers. Both chips are manufactured using the BiCom3 process based on silicon germanium technology along with silicon-on-insulator (SOI) buried oxide layers. The THS4304-SP device was chosen because it is a Class V radiation-tolerant (150 kRad, TID silicon), voltage-feedback operational amplifier designed for use in high-speed analog signal applications and is very desirable for NASA missions. It operates with a single 5 V power supply [1]. It comes in a 10-pin ceramic flatpack package, and it provides balanced inputs, low offset voltage and offset current, and high common mode rejection ratio. The fixed-gain THS4302 chip, which comes in a 16-pin leadless package, offers high bandwidth, high slew rate, low noise, and low distortion [2]. Such features have made the amplifier useful in a number of applications such as wideband signal processing, wireless transceivers, intermediate frequency (IF) amplifier, analog-to-digital converter (ADC) preamplifier, digital-to-analog converter (DAC) output buffer, measurement instrumentation, and medical and industrial imaging.

Simulation of atomistic processes during silicon oxidation

OpenAIRE

Bongiorno, Angelo

2003-01-01

Silicon dioxide (SiO2) films grown on silicon monocrystal (Si) substrates form the gate oxides in current Si-based microelectronics devices. The understanding at the atomic scale of both the silicon oxidation process and the properties of the Si(100)-SiO2 interface is of significant importance in state-of-the-art silicon microelectronics manufacturing. These two topics are intimately coupled and are both addressed in this theoretical investigation mainly through first-principles calculations....

Waveguide silicon nitride grating coupler

Science.gov (United States)

Litvik, Jan; Dolnak, Ivan; Dado, Milan

2016-12-01

Grating couplers are one of the most used elements for coupling of light between optical fibers and photonic integrated components. Silicon-on-insulator platform provides strong confinement of light and allows high integration. In this work, using simulations we have designed a broadband silicon nitride surface grating coupler. The Fourier-eigenmode expansion and finite difference time domain methods are utilized in design optimization of grating coupler structure. The fully, single etch step grating coupler is based on a standard silicon-on-insulator wafer with 0.55 μm waveguide Si3N4 layer. The optimized structure at 1550 nm wavelength yields a peak coupling efficiency -2.6635 dB (54.16%) with a 1-dB bandwidth up to 80 nm. It is promising way for low-cost fabrication using complementary metal-oxide- semiconductor fabrication process.

High temperature resistant cermet and ceramic compositions. [for thermal resistant insulators and refractory coatings

Science.gov (United States)

Phillips, W. M. (Inventor)

1978-01-01

High temperature oxidation resistance, high hardness and high abrasion and wear resistance are properties of cermet compositions particularly to provide high temperature resistant refractory coatings on metal substrates, for use as electrical insulation seals for thermionic converters. The compositions comprise a sintered body of particles of a high temperature resistant metal or metal alloy, preferably molybdenum or tungsten particles, dispersed in and bonded to a solid solution formed of aluminum oxide and silicon nitride, and particularly a ternary solid solution formed of a mixture of aluminum oxide, silicon nitride and aluminum nitride. Ceramic compositions comprising a sintered solid solution of aluminum oxide, silicon nitride and aluminum nitride are also described.

Synthesis of highly integrated optical network based on microdisk-resonator add-drop filters in silicon-on-insulator technology

Science.gov (United States)

Kaźmierczak, Andrzej; Dortu, Fabian; Giannone, Domenico; Bogaerts, Wim; Drouard, Emmanuel; Rojo-Romeo, Pedro; Gaffiot, Frederic

2009-10-01

We analyze a highly compact optical add-drop filter topology based on a pair of microdisk resonators and a bus waveguide intersection. The filter is further assessed on an integrated optical 4×4 network for optical on-chip communication. The proposed network structure, as compact as 50×50 μm, is fabricated in a CMOS-compatible process on a silicon-on-insulator (SOI) substrate. Finally, the experimental results demonstrate the proper operation of the fabricated devices.

Electrical characteristics of SiGe-base bipolar transistors on thin-film SOI substrates

International Nuclear Information System (INIS)

Liao, Shu-Hui; Chang, Shu-Tong

2010-01-01

This paper, based on two-dimensional simulations, provides a comprehensive analysis of the electrical characteristics of the Silicon germanium (SiGe)-base bipolar transistors on thin-film siliconon-insulator (SOI) substrates. The impact of the buried oxide thickness (T OX ), the emitter width (W E ), and the lateral distance between the edge of the intrinsic base and the reach-through region (L col ) on both the AC and DC device characteristics was analyzed in detail. Regarding the DC characteristics, the simulation results suggest that a thicker T OX gives a larger base-collector breakdown voltage (BV CEO ), whereas reducing the T OX leads to an enhanced maximum electric field at the B-C junction. As for the AC characteristics, cut-off frequency (f T ) increases slightly with increasing buried oxide thickness and finally saturates to a constant value when the buried oxide thickness is about 0.15 μm. The collector-substrate capacitance (C CS ) decreases with increasing buried oxide thickness while the maximum oscillation frequency (f max ) increases with increasing buried oxide thickness. Furthermore, the impact of self-heating effects in the device was analyzed in various areas. The thermal resistance as a function of the buried oxide thickness indicates that the thermal resistance of the SiGe-base bipolar transistor on a SOI substrate is slightly higher than that of a bulk SiGe-base bipolar transistor. The thermal resistance is reduced by ∼37.89% when the emitter width is increased by a factor of 5 for a fixed buried oxide thickness of 0.1 μm. All the results can be used to design and optimize SiGe-base bipolar transistors on SOI substrates with minimum thermal resistance to enhance device performance.

Grazing incidence X-ray fluorescence analysis of buried interfaces in periodically structured crystalline silicon thin-film solar cells

Energy Technology Data Exchange (ETDEWEB)

Eisenhauer, David; Preidel, Veit; Becker, Christiane [Young Investigator Group Nanostructured Silicon for Photovoltaic and Photonic Implementations (Nano-SIPPE), Helmholtz-Zentrum Berlin fuer Materialien und Energie GmbH, Berlin (Germany); Pollakowski, Beatrix; Beckhoff, Burkhard [Physikalisch-Technische Bundesanstalt, Berlin (Germany); Baumann, Jonas; Kanngiesser, Birgit [Institut fuer Optik und Atomare Physik, Technische Universitaet Berlin (Germany); Amkreutz, Daniel; Rech, Bernd [Institut Silizium Photovoltaik, Helmholtz-Zentrum Berlin fuer Materialien und Energie GmbH, Berlin (Germany); Back, Franziska; Rudigier-Voigt, Eveline [SCHOTT AG, Mainz (Germany)

2015-03-01

We present grazing incidence X-ray fluorescence (GIXRF) experiments on 3D periodically textured interfaces of liquid phase crystallized silicon thin-film solar cells on glass. The influence of functional layers (SiO{sub x} or SiO{sub x}/SiC{sub x}) - placed between glass substrate and silicon during crystallization - on the final carbon and oxygen contaminations inside the silicon was analyzed. Baring of the buried structured silicon surface prior to GIXRF measurement was achieved by removal of the original nano-imprinted glass substrate by wet-chemical etching. A broad angle of incidence distribution was determined for the X-ray radiation impinging on this textured surface. Optical simulations were performed in order to estimate the incident radiation intensity on the structured surface profile considering total reflection and attenuation effects. The results indicate a much lower contamination level for SiO{sub x} compared to the SiO{sub x}/SiC{sub x} interlayers, and about 25% increased contamination when comparing structured with planar silicon layers, both correlating with the corresponding solar cell performances. (copyright 2015 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

Integrated circuits of silicon on insulator S.O.I. technologies: State of the art and perspectives

International Nuclear Information System (INIS)

Leray, J.L.; Dupont-Nivet, E.; Raffaelli, M.; Coic, Y.M.; Musseau, O.; Pere, J.F.; Lalande, P.; Bredy, J.; Auberton-Herve, A.J.; Bruel, M.; Giffard, B.

1989-01-01

Silicon On Insulator technologies have been proposed to increase the integrated circuits performances in radiation operation. Active researches are conducted, in France and abroad. This paper reviews briefly radiation effects phenomenology in that particular type of structure S.O.I. New results are presented that show very good radiation behaviour in term of speed, dose (10 to 100 megarad (Si)), dose rate and S.E.U. performances [fr

Effect of preliminary annealing of silicon substrates on the spectral sensitivity of photodetectors in bipolar integrated circuits

International Nuclear Information System (INIS)

Blynskij, V.I.; Bozhatkin, O.A.; Golub, E.S.; Lemeshevskaya, A.M.; Shvedov, S.V.

2010-01-01

We examine the results of an effect of preliminary annealing on the spectral sensitivity of photodetectors in bipolar integrated circuits, formed in silicon grown by the Czochralski method. We demonstrate the possibility of substantially improving the sensitivity of photodetectors in the infrared region of the spectrum with twostep annealing. The observed effect is explained by participation of oxidation in the gettering process, where oxidation precedes formation of a buried n + layer in the substrate. (authors)

Topological Oxide Insulator in Cubic Perovskite Structure

Science.gov (United States)

Jin, Hosub; Rhim, Sonny H.; Im, Jino; Freeman, Arthur J.

2013-01-01

The emergence of topologically protected conducting states with the chiral spin texture is the most prominent feature at the surface of topological insulators. On the application side, large band gap and high resistivity to distinguish surface from bulk degrees of freedom should be guaranteed for the full usage of the surface states. Here, we suggest that the oxide cubic perovskite YBiO3, more than just an oxide, defines itself as a new three-dimensional topological insulator exhibiting both a large bulk band gap and a high resistivity. Based on first-principles calculations varying the spin-orbit coupling strength, the non-trivial band topology of YBiO3 is investigated, where the spin-orbit coupling of the Bi 6p orbital plays a crucial role. Taking the exquisite synthesis techniques in oxide electronics into account, YBiO3 can also be used to provide various interface configurations hosting exotic topological phenomena combined with other quantum phases. PMID:23575973

Influence of sample oxidation on the nature of optical luminescence from porous silicon

International Nuclear Information System (INIS)

Coulthard, I.; Antel, W. J. Jr.; Freeland, J. W.; Sham, T. K.; Naftel, S. J.; Zhang, P.

2000-01-01

Site-selective luminescence experiments were performed upon porous-silicon samples exposed to varying degrees of oxidation. The source of different luminescence bands was determined to be due to either quantum confinement in nanocrystalline silicon or defective silicon oxide. Of particular interest is the defective silicon-oxide luminescence band found at 2.1 eV, which was found to frequently overlap with a luminescence band from nanocrystalline silicon. Some of the historical confusion and debate with regards to the source of luminescence from porous silicon can be attributed to this overlap. (c) 2000 American Institute of Physics

Effect of porous silicon layer on the performance of Si/oxide photovoltaic and photoelectrochemical cells

International Nuclear Information System (INIS)

Badawy, Waheed A.

2008-01-01

Photovoltaic and photoelectrochemical systems were prepared by the formation of a thin porous film on silicon. The porous silicon layer was formed on the top of a clean oxide free silicon wafer surface by anodic etching in HF/H 2 O/C 2 H 5 OH mixture (2:1:1). The silicon was then covered by an oxide film (tin oxide, ITO or titanium oxide). The oxide films were prepared by the spray/pyrolysis technique which enables doping of the oxide film by different atoms like In, Ru or Sb during the spray process. Doping of SnO 2 or TiO 2 films with Ru atoms improves the surface characteristics of the oxide film which improves the solar conversion efficiency. The prepared solar cells are stable against environmental attack due to the presence of the stable oxide film. It gives relatively high short circuit currents (I sc ), due to the presence of the porous silicon layer, which leads to the recorded high conversion efficiency. Although the open-circuit potential (V oc ) and fill factor (FF) were not affected by the thickness of the porous silicon film, the short circuit current was found to be sensitive to this thickness. An optimum thickness of the porous film and also the oxide layer is required to optimize the solar cell efficiency. The results represent a promising system for the application of porous silicon layers in solar energy converters. The use of porous silicon instead of silicon single crystals in solar cell fabrication and the optimization of the solar conversion efficiency will lead to the reduction of the cost as an important factor and also the increase of the solar cell efficiency making use of the large area of the porous structures

A monolithic active pixel sensor for ionizing radiation using a 180 nm HV-SOI process

Energy Technology Data Exchange (ETDEWEB)

Hemperek, Tomasz; Kishishita, Tetsuichi; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn, Bonn (Germany)

2016-07-01

An improved SOI-MAPS (Silicon On Insulator Monolithic Active Pixel Sensor) for ionizing radiation based on thick-180 nm High Voltage SOI technology (HV-SOI) has been developed. Similar to existing Fully Depleted SOI-based (FD-SOI) MAPS, a buried silicon oxide inter-dielectric (BOX) layer is used to separate the CMOS electronics from the handle wafer which is used as a depleted charge collection layer. Standard FD-SOI MAPS suffer from radiation damage such as transistor threshold voltage shifts due to trapped charge in the buried oxide layer and charged interface states created at the silicon oxide boundaries (back gate effect). The X-FAB 180 nm HV-SOI technology offers an additional isolation using a deep non-depleted implant between the BOX layer and the active circuitry which mitigates this problem. Therefore we see in this technology a high potential to implement radiation-tolerant MAPS with fast charge collection. The design and measurement results from first prototypes are presented including radiation tolerance to total ionizing dose and charge collection properties of neutron irradiated samples.

Epitaxial Reactor Development for Growth of Silicon-on-Insulator Devices.

Science.gov (United States)

1987-04-01

emision from substrate reflected from interface 40 Constructive interference condition 2tc= n X / 1 * Destrictive interference condition 2tD= (2n+1) X...combinations of growth conditions resulted in no oxide growth on the original silicon wafer. Growths occurred for Si:O molecular ratios higher than 1:1...growth rates occurred at 1050 0 C with water vapor at 1250 cc/min and silane at 50 cc/min. These results are shown in Table 6. The molecular ratio was 2:1

Silicon heterojunction solar cells with novel fluorinated n-type nanocrystalline silicon oxide emitters on p-type crystalline silicon

Science.gov (United States)

Dhar, Sukanta; Mandal, Sourav; Das, Gourab; Mukhopadhyay, Sumita; Pratim Ray, Partha; Banerjee, Chandan; Barua, Asok Kumar

2015-08-01

A novel fluorinated phosphorus doped silicon oxide based nanocrystalline material have been used to prepare heterojunction solar cells on flat p-type crystalline silicon (c-Si) Czochralski (CZ) wafers. The n-type nc-SiO:F:H material were deposited by radio frequency plasma enhanced chemical vapor deposition. Deposited films were characterized in detail by using atomic force microscopy (AFM), high resolution transmission electron microscopy (HRTEM), Raman, fourier transform infrared spectroscopy (FTIR) and optoelectronics properties have been studied using temperature dependent conductivity measurement, Ellipsometry, UV-vis spectrum analysis etc. It is observed that the cell fabricated with fluorinated silicon oxide emitter showing higher initial efficiency (η = 15.64%, Jsc = 32.10 mA/cm2, Voc = 0.630 V, FF = 0.77) for 1 cm2 cell area compare to conventional n-a-Si:H emitter (14.73%) on flat c-Si wafer. These results indicate that n type nc-SiO:F:H material is a promising candidate for heterojunction solar cell on p-type crystalline wafers. The high Jsc value is associated with excellent quantum efficiencies at short wavelengths (<500 nm).

Structural and photoluminescent properties of a composite tantalum oxide and silicon nanocrystals embedded in a silicon oxide film

International Nuclear Information System (INIS)

Díaz-Becerril, T.; Herrera, V.; Morales, C.; García-Salgado, G.; Rosendo, E.; Coyopol, A.; Galeazzi, R.; Romano, R.; Nieto-Caballero, F.G.; Sarmiento, J.

2017-01-01

Tantalum oxide crystals encrusted in a silicon oxide matrix were synthesized by using a hot filament chemical vapor deposition system (HFCVD). A solid source composed by a mixture in different percentages of Ta 2 O 5 and silicon (Si) powders were used as reactants. The films were grown at 800 °C and 1000 °C under hydrogen ambient. The deposited films were characterized by X-ray photoelectron spectroscopy (XPS), high-resolution transmission electron microscopy (HRTEM) and photoluminescence (PL) at room temperature. From the XPS results it was confirmed the formation of a mixture of Tantalum oxide, silicon oxide and Si nanoparticles (Ta 2 O 5- SiO 2 -Si(nc)) as seen from the Si (2p) and Ta (4f) lines corresponding to Si + and Ta + states respectively. Ta 2 O 5 and Si nanocrystals (Si-NCs) embedded in the silicon oxide films were observed on HRTEM images which corroborate the XPS results. Finally the emission properties of the films exhibited a broad band from 400 to 850 nm caused by the independent PL properties of tantalum oxide and Si-NCs that compose the film. The intensity of the emissions was observed to be dependent on both temperature of deposition and the ratio Ta 2 O 5 /Si, used as initial reactants. Results from this work might supply useful data for the development of future light emitter devices.

Charge accumulation in the buried oxide of SOI structures with the bonded Si/SiO2 interface under γ-irradiation: effect of preliminary ion implantation

International Nuclear Information System (INIS)

Naumova, O V; Fomin, B I; Ilnitsky, M A; Popov, V P

2012-01-01

In this study, we examined the effect of preliminary boron or phosphorous implantation on charge accumulation in the buried oxide of SOI-MOSFETs irradiated with γ-rays in the total dose range (D) of 10 5 –5 × 10 7 rad. The buried oxide was obtained by high-temperature thermal oxidation of Si, and it was not subjected to any implantation during the fabrication process of SOI structures. It was found that implantation with boron or phosphorous ions, used in fabrication technologies of SOI-MOSFETs, increases the concentration of precursor traps in the buried oxide of SOI structures. Unlike in the case of boron implantation, phosphorous implantation leads to an increased density of states at the Si/buried SiO 2 interface during subsequent γ-irradiation. In the γ-irradiated SOI-MOSFETs, the accumulated charge density and the density of surface states in the Si/buried oxide layer systems both vary in proportion to k i ln D. The coefficients k i for as-fabricated and ion-implanted Si/buried SiO 2 systems were evaluated. From the data obtained, it was concluded that a low density of precursor hole traps was a factor limiting the positive charge accumulation in the buried oxide of as-fabricated (non-implanted) SOI structures with the bonded Si/buried SiO 2 interface. (paper)

Effects of aging on the structural, mechanical, and thermal properties of the silicone rubber current transformer insulation bushing for a 500 kV substation.

Science.gov (United States)

Wang, Zhigao; Zhang, Xinghai; Wang, Fangqiang; Lan, Xinsheng; Zhou, Yiqian

2016-01-01

In order to analyze the cracking and aging reason of the silicone rubber current transformer (CT) insulation bushing used for 8 years from a 500 kV alternating current substation, characteristics including Fourier transform infrared (FTIR) spectroscopy, mechanical properties analysis, hardness, and thermo gravimetric analysis have been carried out. The FTIR results indicated that the external surface of the silicone rubber CT insulation bushing suffered from more serious aging than the internal part, fracture of side chain Si-C bond was much more than the backbone. Mechanical properties and thermal stability results illustrated that the main aging reasons were the breakage of side chain Si-C bond and the excessive cross-linking reaction of the backbone. This study can provide valuable basis for evaluating degradation mechanism and aging state of the silicone rubber insulation bushing in electric power field.

Broadband Silicon-On-Insulator directional couplers using a combination of straight and curved waveguide sections.

Science.gov (United States)

Chen, George F R; Ong, Jun Rong; Ang, Thomas Y L; Lim, Soon Thor; Png, Ching Eng; Tan, Dawn T H

2017-08-03

Broadband Silicon-On-Insulator (SOI) directional couplers are designed based on a combination of curved and straight coupled waveguide sections. A design methodology based on the transfer matrix method (TMM) is used to determine the required coupler section lengths, radii, and waveguide cross-sections. A 50/50 power splitter with a measured bandwidth of 88 nm is designed and fabricated, with a device footprint of 20 μm × 3 μm. In addition, a balanced Mach-Zehnder interferometer is fabricated showing an extinction ratio of >16 dB over 100 nm of bandwidth.

Tunable complex-valued multi-tap microwave photonic filter based on single silicon-on-insulator microring resonator.

Science.gov (United States)

Lloret, Juan; Sancho, Juan; Pu, Minhao; Gasulla, Ivana; Yvind, Kresten; Sales, Salvador; Capmany, José

2011-06-20

A complex-valued multi-tap tunable microwave photonic filter based on single silicon-on-insulator microring resonator is presented. The degree of tunability of the approach involving two, three and four taps is theoretical and experimentally characterized, respectively. The constraints of exploiting the optical phase transfer function of a microring resonator aiming at implementing complex-valued multi-tap filtering schemes are also reported. The trade-off between the degree of tunability without changing the free spectral range and the number of taps is studied in-depth. Different window based scenarios are evaluated for improving the filter performance in terms of the side-lobe level.

Oxide film assisted dopant diffusion in silicon carbide

Energy Technology Data Exchange (ETDEWEB)

Tin, Chin-Che, E-mail: cctin@physics.auburn.ed [Department of Physics, Auburn University, Alabama 36849 (United States); Mendis, Suwan [Department of Physics, Auburn University, Alabama 36849 (United States); Chew, Kerlit [Department of Electrical and Electronic Engineering, Faculty of Engineering and Science, Universiti Tunku Abdul Rahman, Kuala Lumpur (Malaysia); Atabaev, Ilkham; Saliev, Tojiddin; Bakhranov, Erkin [Physical Technical Institute, Uzbek Academy of Sciences, 700084 Tashkent (Uzbekistan); Atabaev, Bakhtiyar [Institute of Electronics, Uzbek Academy of Sciences, 700125 Tashkent (Uzbekistan); Adedeji, Victor [Department of Chemistry, Geology and Physics, Elizabeth City State University, North Carolina 27909 (United States); Rusli [School of Electrical and Electronic Engineering, Nanyang Technological University (Singapore)

2010-10-01

A process is described to enhance the diffusion rate of impurities in silicon carbide so that doping by thermal diffusion can be done at lower temperatures. This process involves depositing a thin film consisting of an oxide of the impurity followed by annealing in an oxidizing ambient. The process uses the lower formation energy of silicon dioxide relative to that of the impurity-oxide to create vacancies in silicon carbide and to promote dissociation of the impurity-oxide. The impurity atoms then diffuse from the thin film into the near-surface region of silicon carbide.

Oxide film assisted dopant diffusion in silicon carbide

International Nuclear Information System (INIS)

Tin, Chin-Che; Mendis, Suwan; Chew, Kerlit; Atabaev, Ilkham; Saliev, Tojiddin; Bakhranov, Erkin; Atabaev, Bakhtiyar; Adedeji, Victor; Rusli

2010-01-01

A process is described to enhance the diffusion rate of impurities in silicon carbide so that doping by thermal diffusion can be done at lower temperatures. This process involves depositing a thin film consisting of an oxide of the impurity followed by annealing in an oxidizing ambient. The process uses the lower formation energy of silicon dioxide relative to that of the impurity-oxide to create vacancies in silicon carbide and to promote dissociation of the impurity-oxide. The impurity atoms then diffuse from the thin film into the near-surface region of silicon carbide.

Laser direct writing of oxide structures on hydrogen-passivated silicon surfaces

DEFF Research Database (Denmark)

Müllenborn, Matthias; Birkelund, Karen; Grey, Francois

1996-01-01

on amorphous and crystalline silicon surfaces in order to determine the depassivation mechanism. The minimum linewidth achieved is about 450 nm using writing speeds of up to 100 mm/s. The process is fully compatible with local oxidation of silicon by scanning probe lithography. Wafer-scale patterns can...

Improving breakdown voltage and self-heating effect for SiC LDMOS with double L-shaped buried oxide layers

Science.gov (United States)

Bao, Meng-tian; Wang, Ying

2017-02-01

In this paper, a SiC LDMOS with double L-shaped buried oxide layers (DL-SiC LDMOS) is investigated and simulated. The DL-SiC LDMOS consists of two L-shaped buried oxide layers and two SiC windows. Using 2-D numerical simulation software, Atlas, Silvaco TCAD, the breakdown voltage, and the self-heating effect are discussed. The double-L shaped buried oxide layers and SiC windows in the active area can introduce an additional electric field peak and make the electric field distribution more uniform in the drift region. In addition, the SiC windows, which connect the active area to the substrate, can facilitate heat dissipation and reduce the maximum lattice temperature of the device. Compared with the BODS structure, the DL-SiC LDMOS and BODS structures have the same device parameters, except of the buried oxide layers. The simulation results of DL-SiC LDMOS exhibits outstanding characteristics including an increase of the breakdown voltage by 32.6% to 1220 V, and a low maximum lattice temperature (535 K) at room temperature.

Structural and photoluminescent properties of a composite tantalum oxide and silicon nanocrystals embedded in a silicon oxide film

Energy Technology Data Exchange (ETDEWEB)

Díaz-Becerril, T., E-mail: tomas.diaz.be@gmail.com; Herrera, V.; Morales, C.; García-Salgado, G.; Rosendo, E.; Coyopol, A., E-mail: acoyopol@gmail.com; Galeazzi, R.; Romano, R.; Nieto-Caballero, F.G.; Sarmiento, J.

2017-04-15

Tantalum oxide crystals encrusted in a silicon oxide matrix were synthesized by using a hot filament chemical vapor deposition system (HFCVD). A solid source composed by a mixture in different percentages of Ta{sub 2}O{sub 5} and silicon (Si) powders were used as reactants. The films were grown at 800 °C and 1000 °C under hydrogen ambient. The deposited films were characterized by X-ray photoelectron spectroscopy (XPS), high-resolution transmission electron microscopy (HRTEM) and photoluminescence (PL) at room temperature. From the XPS results it was confirmed the formation of a mixture of Tantalum oxide, silicon oxide and Si nanoparticles (Ta{sub 2}O{sub 5-}SiO{sub 2}-Si(nc)) as seen from the Si (2p) and Ta (4f) lines corresponding to Si{sup +} and Ta{sup +} states respectively. Ta{sub 2}O{sub 5} and Si nanocrystals (Si-NCs) embedded in the silicon oxide films were observed on HRTEM images which corroborate the XPS results. Finally the emission properties of the films exhibited a broad band from 400 to 850 nm caused by the independent PL properties of tantalum oxide and Si-NCs that compose the film. The intensity of the emissions was observed to be dependent on both temperature of deposition and the ratio Ta{sub 2}O{sub 5}/Si, used as initial reactants. Results from this work might supply useful data for the development of future light emitter devices.

The effect of oxidation on the efficiency and spectrum of photoluminescence of porous silicon

International Nuclear Information System (INIS)

Bulakh, B. M.; Korsunska, N. E.; Khomenkova, L. Yu.; Staraya, T. R.; Sheinkman, M. K.

2006-01-01

The photoluminescence spectra of porous silicon and their temperature dependences and transformations on aging are studied. It is shown that the infrared band prevailing in the spectra of as-prepared samples is due to exciton recombination in silicon crystallites. On aging, a well-pronounced additional band is observed at shorter wavelengths of the spectra. It is assumed that this band is due to the recombination of carriers that are excited in silicon crystallites and recombine via some centers located in oxide. It is shown that the broad band commonly observable in oxidized porous silicon is a superposition of the above two bands. The dependences of the peak positions and integrated intensities of the bands on time and temperature are studied. The data on the distribution of oxide centers with depth in the porous layer are obtained

Oxidation under electron bombardment. A tool for studying the initial states of silicon oxidation

Energy Technology Data Exchange (ETDEWEB)

Carriere, B.; Deville, J.P.; El Maachi, A.

1987-06-01

The exciting beam of an Auger electron spectrometer has been used to monitor the oxidation of silicon single crystals at room temperature and very low pressures of oxygen (approx. 10/sup -7/ Torr). This process allows us to build ultra-thin layers of silica on silicon (down to 30 A) but it is mostly used to investigate the mechanisms of the initial stages of oxidation. Auger spectra recorded continuously during the oxidation process provide information on (1) the nature of the silicon-oxygen chemical bonds which are interpreted through fine structure in the Auger peak, and (2) the kinetics of oxide formation which are deduced from curves of Auger signal versus time. An account is given of the contribution of these Auger studies to the description of the intermediate oxide layer during the reaction between silicon and oxygen and the influence of surface structural disorder, induced mainly by argon-ion bombardment, is discussed in terms of reactivity and oxide coverage.

Influence of post-annealing on the electrical properties of metal/oxide/silicon nitride/oxide/silicon capacitors for flash memories

International Nuclear Information System (INIS)

Kim, Hee Dong; An, Ho-Myoung; Kim, Kyoung Chan; Seo, Yu Jeong; Kim, Tae Geun

2008-01-01

We report the effect of post-annealing on the electrical properties of metal/oxide/silicon nitride/oxide/silicon (MONOS) capacitors. Four samples, namely as-deposited and annealed at 750, 850 and 950 °C for 30 s in nitrogen ambient by a rapid thermal process, were prepared and characterized for comparison. The best performance with the largest memory window of 4.4 V and the fastest program speed of 10 ms was observed for the sample annealed at 850 °C. In addition, the highest traps density of 6.84 × 10 18 cm −3 was observed with ideal trap distributions for the same sample by capacitance–voltage (C–V) measurement. These results indicate that the memory traps in the ONO structure can be engineered by post-annealing to improve the electrical properties of the MONOS device

To minimized power outage by the application of 'RTV' (room temperature vulcanizing) silicon on high voltage porcelain insulators in Pakistan

International Nuclear Information System (INIS)

Hafiz Tehzeeb ul Hassan

2003-01-01

In Pakistan power network comprises of 500KV, 220KV, 132KV, 66KV and 33KV transmission lines and 11KV power distribution systems. Number of insulators are used in connected units in the shape of strings with transmission line as per insulation requirements with proper design according to the various kinds of pollution stresses. The transmission lines are passing from or near polluted areas and very dusty plains of Punjab and Sindh provinces. Practices are being used in these transmission lines for removal of accumulated contamination of insulators by periodic cleaning twice a year or de-energized transmission lines. Even then discontinuation of supply takes place in the polluted areas in foggy weather. Special technique of using water repellent (Room Temperature Vulcanizing) silicone coating/paint has been introduced on high voltage disc Insulators to minimize the outage in power net work in Pakistan. Especially in high pollution areas near chemical factories and near brick kilns etc comparison study of coated and uncoated disc Insulators have been carried out by ESDD (Equal Salt Deposit Density) measurement in salt fog chamber. (author)

Advanced TEM Characterization for the Development of 28-14nm nodes based on fully-depleted Silicon-on-Insulator Technology

International Nuclear Information System (INIS)

Servanton, G; Clement, L; Lepinay, K; Lorut, F; Pantel, R; Pofelski, A; Bicais, N

2013-01-01

The growing demand for wireless multimedia applications (smartphones, tablets, digital cameras) requires the development of devices combining both high speed performances and low power consumption. A recent technological breakthrough making a good compromise between these two antagonist conditions has been proposed: the 28-14nm CMOS transistor generations based on a fully-depleted Silicon-on-Insulator (FD-SOI) performed on a thin Si film of 5-6nm. In this paper, we propose to review the TEM characterization challenges that are essential for the development of extremely power-efficient System on Chip (SoC)

Segregation of boron implanted into silicon on angular configurations of silicon/silicon dioxide oxidation interface

CERN Document Server

Tarnavskij, G A; Obrekht, M S

2001-01-01

One studies segregation of boron implanted into silicon when a wave (interface) of oxidation moves within it. There are four types of angular configurations of SiO sub 2 /Si oxidation interface, that is: direct and reverse shoulders, trench type cavities and a square. By means of computer-aided simulation one obtained and analyzed complex patterns of B concentration distribution within Si, SiO sub 2 domains and at SiO sub 2 /Si interface for all types of angular configurations of the oxidation interface

High-performance flexible thin-film transistors fabricated using print-transferrable polycrystalline silicon membranes on a plastic substrate

International Nuclear Information System (INIS)

Qin, Guoxuan; Yuan, Hao-Chih; Ma, Zhenqiang; Yang, Hongjun; Zhou, Weidong

2011-01-01

Inexpensive polycrystalline Si (poly-Si) with large grain size is highly desirable for flexible electronics applications. However, it is very challenging to directly deposit high-quality poly-Si on plastic substrates due to processing constrictions, such as temperature tolerance and residual stress. In this paper, we present our study on poly-Si membranes that are stress free and most importantly, are transferrable to any substrate including a low-temperature polyethylene terephthalate (PET) substrate. We formed poly-Si-on-insulator by first depositing small-grain size poly-Si on an oxidized Si wafer. We then performed high-temperature annealing for recrystallization to obtain larger grain size. After selective doping on the poly-Si-on-insulator, buried oxide was etched away. By properly patterning the poly-Si layer, residual stress in the released poly-Si membranes was completely relaxed. The flat membrane topology allows the membranes to be print transferred to any substrates. High-performance TFTs were demonstrated on the transferred poly-Si membranes on a PET substrate

Anomalous radiation effects in fully depleted SOI MOSFETs fabricated on SIMOX

Science.gov (United States)

Li, Ying; Niu, Guofu; Cressler, J. D.; Patel, J.; Marshall, C. J.; Marshall, P. W.; Kim, H. S.; Reed, R. A.; Palmer, M. J.

2001-12-01

We investigate the proton tolerance of fully depleted silicon-on-insulator (SOI) MOSFETs with H-gate and regular-gate structural configurations. For the front-gate characteristics, the H-gate does not show the edge leakage observed in the regular-gate transistor. An anomalous kink in the back-gate linear I/sub D/-V/sub GS/ characteristics of the fully depleted SOI nFETs has been observed at high radiation doses. This kink is attributed to charged traps generated in the bandgap at the buried oxide/silicon film interface during irradiation. Extensive two-dimensional simulations with MEDICI were used to understand the physical origin of this kink. We also report unusual self-annealing effects in the devices when they are cooled to liquid nitrogen temperature.

Oxide-nitride-oxide dielectric stacks with Si nanoparticles obtained by low-energy ion beam synthesis

International Nuclear Information System (INIS)

Ioannou-Sougleridis, V; Dimitrakis, P; Vamvakas, V Em; Normand, P; Bonafos, C; Schamm, S; Mouti, A; Assayag, G Ben; Paillard, V

2007-01-01

Formation of a thin band of silicon nanoparticles within silicon nitride films by low-energy (1 keV) silicon ion implantation and subsequent thermal annealing is demonstrated. Electrical characterization of metal-insulator-semiconductor capacitors reveals that oxide/Si-nanoparticles-nitride/oxide dielectric stacks exhibit enhanced charge transfer characteristics between the substrate and the silicon nitride layer compared to dielectric stacks using unimplanted silicon nitride. Attractive results are obtained in terms of write/erase memory characteristics and data retention, indicating the large potential of the low-energy ion-beam-synthesis technique in SONOS memory technology

Silicon oxide nanoimprint stamp fabrication by edge lithography reinforced with silicon nitride

NARCIS (Netherlands)

Zhao, Yiping; Berenschot, Johan W.; de Boer, Meint J.; Jansen, Henricus V.; Tas, Niels Roelof; Huskens, Jurriaan; Elwenspoek, Michael Curt

2007-01-01

The fabrication of silicon oxide nanoimprint stamp employing edge lithography in combination with silicon nitride deposition is presented. The fabrication process is based on conventional photolithography an weg etching methods. Nanoridges with width dimension of sub-20 nm were fabricated by edge

Y-Ba-Cu-O superconducting film on oxidized silicon

International Nuclear Information System (INIS)

Gupta, R.P.; Khokle, W.S.; Dubey, R.C.; Singhal, S.; Nagpal, K.C.; Rao, G.S.T.; Jain, J.D.

1988-01-01

We report thick superconducting films of Y-Ba-Cu-O on oxidized silicon substrates. The critical temperatures for onset and zero resistance are 96 and 77 K, respectively. X-ray diffraction analysis predicts 1, 2, 3 composition and orthorhombic phase of the film

Light extraction from GaN-based LED structures on silicon-on-insulator substrates

Energy Technology Data Exchange (ETDEWEB)

Tripathy, S.; Teo, S.L.; Lin, V.K.X.; Chen, M.F. [Institute of Materials Research and Engineering, A*STAR (Agency for Science, Technology, and Research), 117602 (Singapore); Dadgar, A.; Krost, A. [Institut fuer Exerimentelle Physik, Otto-von Guericke Universitaet Magdeburg, Universitaetsplatz 1, 39016 Magdeburg (Germany); AZZURRO Semiconductors AG, Universitaetsplatz 1, 39016 Magdeburg (Germany); Christen, J. [Institut fuer Exerimentelle Physik, Otto-von Guericke Universitaet Magdeburg, Universitaetsplatz 1, 39016 Magdeburg (Germany)

2010-01-15

Nano-patterning of GaN-based devices is a promising technology in the development of high output power devices. Recent researches have been focused on the realization of two-dimensional (2D) photonic crystal (PhC) structure to improve light extraction efficiency and to control the direction of emission. In this study, we have demonstrated improved light extraction from green light emitting diode (LED) structures on thin silicon-on-insulator (SOI) substrates using surface nanopatterning. Scanning electron microscopy (SEM) is used to probe the size, shape, and etch depth of nano-patterns on the LED surfaces. Different types of nanopatterns were created by e-beam lithography and inductively coupled plasma etching. The LED structures after post processing are studied by photoluminescence (PL) measurements. The GaN nanophotonic structures formed by ICP etching led to more than five-fold increase in the intensity of the green emission. The improved light extraction is due to the combination of SOI substrate reflectivity and photonic structures on top GaN LED surfaces. (copyright 2010 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

Fluorescence and thermoluminescence in silicon oxide films rich in silicon

International Nuclear Information System (INIS)

Berman M, D.; Piters, T. M.; Aceves M, M.; Berriel V, L. R.; Luna L, J. A.

2009-10-01

In this work we determined the fluorescence and thermoluminescence (TL) creation spectra of silicon rich oxide films (SRO) with three different silicon excesses. To study the TL of SRO, 550 nm of SRO film were deposited by Low Pressure Chemical Vapor Deposition technique on N-type silicon substrates with resistivity in the order of 3 to 5 Ω-cm with silicon excess controlled by the ratio of the gases used in the process, SRO films with Ro= 10, 20 and 30 (12-6% silicon excess) were obtained. Then, they were thermally treated in N 2 at high temperatures to diffuse and homogenize the silicon excess. In the fluorescence spectra two main emission regions are observed, one around 400 nm and one around 800 nm. TL creation spectra were determined by plotting the integrated TL intensity as function of the excitation wavelength. (Author)

Broadband dielectric spectroscopy of oxidized porous silicon

International Nuclear Information System (INIS)

Axelrod, Ekaterina; Urbach, Benayahu; Sa'ar, Amir; Feldman, Yuri

2006-01-01

Dielectric measurements accompanied by infrared absorption and photoluminescence (PL) spectroscopy were used to investigate the electrical and optical properties of oxidized porous silicon (PS). As opposed to non-oxidized PS, only high temperature relaxation processes could be resolved for oxidized PS. Two relaxation processes have been observed. The first process is related to dc-conductivity that dominates at high temperatures and low frequencies. After subtraction of dc-conductivity we could analyse a second high-temperature relaxation process that is related to interface polarization induced by charge carriers trapped at the host matrix-pore interfaces. We found that, while the main effect of the oxidation on the PL appears to be a size reduction in the silicon nanocrystals that gives rise to a blue shift of the PL spectrum, its main contribution to the dielectric properties turns out to be blocking of transport channels in the host tissue and activation of hopping conductivity between silicon nanocrystals

Broadband dielectric spectroscopy of oxidized porous silicon

Energy Technology Data Exchange (ETDEWEB)

Axelrod, Ekaterina [Department of Applied Physics, Hebrew University of Jerusalem, Jerusalem, 91904 (Israel); Urbach, Benayahu [Racah Institute of Physics and the Center for Nanoscience and Nanotechnology, Hebrew University of Jerusalem, Jerusalem, 91904 (Israel); Sa' ar, Amir [Racah Institute of Physics and the Center for Nanoscience and Nanotechnology, Hebrew University of Jerusalem, Jerusalem, 91904 (Israel); Feldman, Yuri [Department of Applied Physics, Hebrew University of Jerusalem, Jerusalem, 91904 (Israel)

2006-04-07

Dielectric measurements accompanied by infrared absorption and photoluminescence (PL) spectroscopy were used to investigate the electrical and optical properties of oxidized porous silicon (PS). As opposed to non-oxidized PS, only high temperature relaxation processes could be resolved for oxidized PS. Two relaxation processes have been observed. The first process is related to dc-conductivity that dominates at high temperatures and low frequencies. After subtraction of dc-conductivity we could analyse a second high-temperature relaxation process that is related to interface polarization induced by charge carriers trapped at the host matrix-pore interfaces. We found that, while the main effect of the oxidation on the PL appears to be a size reduction in the silicon nanocrystals that gives rise to a blue shift of the PL spectrum, its main contribution to the dielectric properties turns out to be blocking of transport channels in the host tissue and activation of hopping conductivity between silicon nanocrystals.

Magnesium Oxide (MgO) pH-sensitive Sensing Membrane in Electrolyte-Insulator-Semiconductor Structures with CF4 Plasma Treatment.

Science.gov (United States)

Kao, Chyuan-Haur; Chang, Chia Lung; Su, Wei Ming; Chen, Yu Tzu; Lu, Chien Cheng; Lee, Yu Shan; Hong, Chen Hao; Lin, Chan-Yu; Chen, Hsiang

2017-08-03

Magnesium oxide (MgO) sensing membranes in pH-sensitive electrolyte-insulator-semiconductor structures were fabricated on silicon substrate. To optimize the sensing capability of the membrane, CF 4 plasma was incorporated to improve the material quality of MgO films. Multiple material analyses including FESEM, XRD, AFM, and SIMS indicate that plasma treatment might enhance the crystallization and increase the grain size. Therefore, the sensing behaviors in terms of sensitivity, linearity, hysteresis effects, and drift rates might be improved. MgO-based EIS membranes with CF 4 plasma treatment show promise for future industrial biosensing applications.

Silicon-on-insulator based nanopore cavity arrays for lipid membrane investigation.

Science.gov (United States)

Buchholz, K; Tinazli, A; Kleefen, A; Dorfner, D; Pedone, D; Rant, U; Tampé, R; Abstreiter, G; Tornow, M

2008-11-05

We present the fabrication and characterization of nanopore microcavities for the investigation of transport processes in suspended lipid membranes. The cavities are situated below the surface of silicon-on-insulator (SOI) substrates. Single cavities and large area arrays were prepared using high resolution electron-beam lithography in combination with reactive ion etching (RIE) and wet chemical sacrificial underetching. The locally separated compartments have a circular shape and allow the enclosure of picoliter volume aqueous solutions. They are sealed at their top by a 250 nm thin Si membrane featuring pores with diameters from 2 µm down to 220 nm. The Si surface exhibits excellent smoothness and homogeneity as verified by AFM analysis. As biophysical test system we deposited lipid membranes by vesicle fusion, and demonstrated their fluid-like properties by fluorescence recovery after photobleaching. As clearly indicated by AFM measurements in aqueous buffer solution, intact lipid membranes successfully spanned the pores. The nanopore cavity arrays have potential applications in diagnostics and pharmaceutical research on transmembrane proteins.

Oxide layers for silicon detector protection against enviroment effects

International Nuclear Information System (INIS)

Bel'tsazh, E.; Brylovska, I.; Valerian, M.

1986-01-01

It is shown that for protection of silicon detectors of nuclear radiations oxide layers could be used. The layers are produced by electrochemical oxidation of silicon surface with the following low-temperature annealing. These layers have characteristics similar to those for oxide layers produced by treatment of silicon samples at elevated temperature in oxygen flow. To determine properties of oxide layers produced by electrochemical oxidation the α-particle back-scattering method and the method of volt-farad characteristics were used. Protection properties of such layers were checked on the surface-barrier detectors. It was shown that protection properties of such detectors were conserved during long storage at room temperature and during their storage under wet-bulb temperature. Detectors without protection layer have worsened their characteristics

Passivating electron contact based on highly crystalline nanostructured silicon oxide layers for silicon solar cells

Czech Academy of Sciences Publication Activity Database

Stuckelberger, J.; Nogay, G.; Wyss, P.; Jeangros, Q.; Allebe, Ch.; Debrot, F.; Niquille, X.; Ledinský, Martin; Fejfar, Antonín; Despeisse, M.; Haug, F.J.; Löper, P.; Ballif, C.

2016-01-01

Roč. 158, Dec (2016), s. 2-10 ISSN 0927-0248 R&D Projects: GA MŠk LM2015087 Institutional support: RVO:68378271 Keywords : surface passivation * passivating contact * nanostructure * silicon oxide * nanocrystalline * microcrystalline * poly-silicon * crystallization * Raman * transmission line measurement Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 4.784, year: 2016

The kinetics of solid phase epitaxy in As-doped buried amorphous silicon layers

International Nuclear Information System (INIS)

McCallum, J.C.

1999-01-01

Ion implantation is the principal method used to introduce dopants into silicon for fabrication of semiconductor devices. During ion implantation, damage accumulates in the crystalline silicon lattice and amorphisation may occur over the depth range of the ions if the implant dose is sufficiently high. As device dimensions shrink, the need to produce shallower and shallower highly-doped layers increases and the probability of amorphisation also increases. To achieve dopant-activation, the amorphous or damaged material must be returned to the crystalline state by thermal annealing. Amorphous silicon layers can be crystallised by the solid-state process of solid phase epitaxy (SPE) in which the amorphous layer transforms to crystalline silicon (c-Si) layer by layer using the underlying c-Si as a seed. The atomic mechanism that is responsible for the crystallisation is thought to involve highly-localised bond-breaking and rearrangement processes at the amorphous/crystalline (a/c) interface but the defect responsible for these bond rearrangements has not yet been identified. Since the bond breaking process necessarily generates dangling bonds, it has been suggested that the crystallisation process may solely involve the formation and migration of dangling bonds at the interface. One of the key factors which may shed further light on the nature of the SPE defect is the observed dopant-dependence of the rate of crystallisation. It has been found that moderate concentrations of dopants enhance the SPE crystallisation rate while the presence of equal concentrations of an n-type and a p-type dopant (impurity compensation) returns the SPE rate to the intrinsic value. This provides crucial evidence that the SPE mechanism is sensitive to the position of the Fermi level in the bandgap of the crystalline and/or the amorphous silicon phases and may lead to identification of an energy level within the bandgap that can be associated with the defect. This paper gives details of SPE

Hydrothermal deposition and characterization of silicon oxide nanospheres

International Nuclear Information System (INIS)

Pei, L.Z.

2008-01-01

Silicon oxide nanospheres with the average diameter of about 100 nm have been synthesized by hydrothermal deposition process using silicon and silica as the starting materials. The silicon oxide nanospheres were characterized by field emission scanning electron microscopy (FESEM), energy dispersive X-ray spectrum (EDS), transmission electron microscopy (TEM), high-resolution transmission electron microscopy (HRTEM) and photoluminescence (PL) spectrum, respectively. The results show that large scale silicon oxide nanospheres with the uniform size are composed of Si and O showing the amorphous structure. Strong PL peak at 435 nm is observed demonstrating the good blue light emission property

Adiabatic Nanofocusing in Hybrid Gap Plasmon Waveguides on the Silicon-on-Insulator Platform.

Science.gov (United States)

Nielsen, Michael P; Lafone, Lucas; Rakovich, Aliaksandra; Sidiropoulos, Themistoklis P H; Rahmani, Mohsen; Maier, Stefan A; Oulton, Rupert F

2016-02-10

We present an experimental demonstration of a new class of hybrid gap plasmon waveguides on the silicon-on-insulator (SOI) platform. Created by the hybridization of the plasmonic mode of a gap in a thin metal sheet and the transverse-electric (TE) photonic mode of an SOI slab, this waveguide is designed for efficient adiabatic nanofocusing simply by varying the gap width. For gap widths greater than 100 nm, the mode is primarily photonic in character and propagation lengths can be many tens of micrometers. For gap widths below 100 nm, the mode becomes plasmonic in character with field confinement predominantly within the gap region and with propagation lengths of a few microns. We estimate the electric field intensity enhancement in hybrid gap plasmon waveguide tapers at 1550 nm by three-photon absorption of selectively deposited CdSe/ZnS quantum dots within the gap. Here, we show electric field intensity enhancements of up to 167 ± 26 for a 24 nm gap, proving the viability of low loss adiabatic nanofocusing on a commercially relevant photonics platform.

Imaging of buried phosphorus nanostructures in silicon using scanning tunneling microscopy

Energy Technology Data Exchange (ETDEWEB)

Oberbeck, Lars [Centre for Quantum Computation and Communication Technology, School of Physics, University of New South Wales, Sydney, New South Wales 2052 (Australia); TOTAL Marketing Services, New Energies, La Défense 10, 92069 Paris La Défense Cedex (France); Reusch, Thilo C. G.; Hallam, Toby; Simmons, Michelle Y., E-mail: n.curson@ucl.ac.uk, E-mail: michelle.simmons@unsw.edu.au [Centre for Quantum Computation and Communication Technology, School of Physics, University of New South Wales, Sydney, New South Wales 2052 (Australia); Schofield, Steven R. [Centre for Quantum Computation and Communication Technology, School of Physics, University of New South Wales, Sydney, New South Wales 2052 (Australia); London Centre for Nanotechnology, UCL, London WC1H 0AH (United Kingdom); Department of Physics and Astronomy, UCL, London WC1E 6BT (United Kingdom); Curson, Neil J., E-mail: n.curson@ucl.ac.uk, E-mail: michelle.simmons@unsw.edu.au [Centre for Quantum Computation and Communication Technology, School of Physics, University of New South Wales, Sydney, New South Wales 2052 (Australia); London Centre for Nanotechnology, UCL, London WC1H 0AH (United Kingdom); Department of Electronic and Electrical Engineering, UCL, London WC1E 7JE (United Kingdom)

2014-06-23

We demonstrate the locating and imaging of single phosphorus atoms and phosphorus dopant nanostructures, buried beneath the Si(001) surface using scanning tunneling microscopy. The buried dopant nanostructures have been fabricated in a bottom-up approach using scanning tunneling microscope lithography on Si(001). We find that current imaging tunneling spectroscopy is suited to locate and image buried nanostructures at room temperature and with residual surface roughness present. From these studies, we can place an upper limit on the lateral diffusion during encapsulation with low-temperature Si molecular beam epitaxy.

Imaging of buried phosphorus nanostructures in silicon using scanning tunneling microscopy

International Nuclear Information System (INIS)

Oberbeck, Lars; Reusch, Thilo C. G.; Hallam, Toby; Simmons, Michelle Y.; Schofield, Steven R.; Curson, Neil J.

2014-01-01

We demonstrate the locating and imaging of single phosphorus atoms and phosphorus dopant nanostructures, buried beneath the Si(001) surface using scanning tunneling microscopy. The buried dopant nanostructures have been fabricated in a bottom-up approach using scanning tunneling microscope lithography on Si(001). We find that current imaging tunneling spectroscopy is suited to locate and image buried nanostructures at room temperature and with residual surface roughness present. From these studies, we can place an upper limit on the lateral diffusion during encapsulation with low-temperature Si molecular beam epitaxy.

Ultra-thin silicon (UTSi) on insulator CMOS transceiver and time-division multiplexed switch chips for smart pixel integration

Science.gov (United States)

Zhang, Liping; Sawchuk, Alexander A.

2001-12-01

We describe the design, fabrication and functionality of two different 0.5 micron CMOS optoelectronic integrated circuit (OEIC) chips based on the Peregrine Semiconductor Ultra-Thin Silicon on insulator technology. The Peregrine UTSi silicon- on-sapphire (SOS) technology is a member of the silicon-on- insulator (SOI) family. The low-loss synthetic sapphire substrate is optically transparent and has good thermal conductivity and coefficient of thermal expansion properties, which meet the requirements for flip-chip bonding of VCSELs and other optoelectronic input-output components. One chip contains transceiver and network components, including four channel high-speed CMOS transceiver modules, pseudo-random bit stream (PRBS) generators, a voltage controlled oscillator (VCO) and other test circuits. The transceiver chips can operate in both self-testing mode and networking mode. An on- chip clock and true-single-phase-clock (TSPC) D-flip-flop have been designed to generate a PRBS at over 2.5 Gb/s for the high-speed transceiver arrays to operate in self-testing mode. In the networking mode, an even number of transceiver chips forms a ring network through free-space or fiber ribbon interconnections. The second chip contains four channel optical time-division multiplex (TDM) switches, optical transceiver arrays, an active pixel detector and additional test devices. The eventual applications of these chips will require monolithic OEICs with integrated optical input and output. After fabrication and testing, the CMOS transceiver array dies will be packaged with 850 nm vertical cavity surface emitting lasers (VCSELs), and metal-semiconductor- metal (MSM) or GaAs p-i-n detector die arrays to achieve high- speed optical interconnections. The hybrid technique could be either wire bonding or flip-chip bonding of the CMOS SOS smart-pixel arrays with arrays of VCSELs and photodetectors onto an optoelectronic chip carrier as a multi-chip module (MCM).

Building America Case Study: Compact Buried Ducts in a Hot-Humid Climate House, Lady's Island, South Carolina

Energy Technology Data Exchange (ETDEWEB)

2016-02-01

A system of compact, buried ducts provides a high-performance and cost-effective solution for delivering conditioned air throughout the building. This report outlines research activities that are expected to facilitate adoption of compact buried duct systems by builders. The results of this research would be scalable to many new house designs in most climates and markets, leading to wider industry acceptance and building code and energy program approval. The primary research question with buried ducts is potential condensation at the outer jacket of the duct insulation in humid climates during the cooling season. Current best practices for buried ducts rely on encapsulating the insulated ducts with closed-cell spray polyurethane foam insulation to control condensation and improve air sealing. The encapsulated buried duct concept has been analyzed and shown to be effective in hot-humid climates. The purpose of this project is to develop an alternative buried duct system that performs effectively as ducts in conditioned space - durable, energy efficient, and cost-effective - in a hot-humid climate (IECC warm-humid climate zone 3A) with three goals that distinguish this project: 1) Evaluation of design criteria for buried ducts that use common materials and do not rely on encapsulation using spray foam or disrupt traditional work sequences, 2) Establishing design criteria for compact ducts and incorporate those with the buried duct criteria to further reduce energy losses and control installed costs, and 3) Developing HVAC design guidance for performing accurate heating and cooling load calculations for compact buried ducts.

Evanescently Coupled Rectangular Microresonators in Silicon-on-Insulator with High Q-Values: Experimental Characterization

Directory of Open Access Journals (Sweden)

Manuel Mendez-Astudillo

2017-04-01

Full Text Available We report on evanescently coupled rectangular microresonators with dimensions up to 20 × 10 μm2 in silicon-on-insulator in an add-drop filter configuration. The influence of the geometrical parameters of the device was experimentally characterized and a high Q value of 13,000 was demonstrated as well as the multimode optical resonance characteristics in the drop port. We also show a 95% energy transfer between ports when the device is operated in TM-polarization and determine the full symmetry of the device by using an eight-port configuration, allowing the drop waveguide to be placed on any of its sides, providing a way to filter and route optical signals. We used the FDTD method to analyze the device and e-beam lithography and dry etching techniques for fabrication.

Mechanical anomaly impact on metal-oxide-semiconductor capacitors on flexible silicon fabric

KAUST Repository

Ghoneim, Mohamed T.; Kutbee, Arwa T.; Ghodsi Nasseri, Seyed Faizelldin; Bersuker, G.; Hussain, Muhammad Mustafa

2014-01-01

We report the impact of mechanical anomaly on high-κ/metal-oxide-semiconductor capacitors built on flexible silicon (100) fabric. The mechanical tests include studying the effect of bending radius up to 5 mm minimum bending radius with respect

Toward the hybrid organic semiconductor FET (HOSFET) electrical and electrochemical characterization of functionalized and unfunctionalized, covalently bound organic monolayers on silicon

NARCIS (Netherlands)

Faber, Erik Jouwert

2006-01-01

Since their introduction in 1993 the class of covalently bound organic monolayers on oxide free silicon surfaces have found their way to multiple application fields such as passivation layers in solar cells, masking layers in lithographic processing, insulating films in hybrid moleculesilicon

STM imaging of buried P atoms in hydrogen-terminated Si for the fabrication of a Si:P quantum computer

Energy Technology Data Exchange (ETDEWEB)

Oberbeck, L.; Curson, N.J.; Hallam, T.; Simmons, M.Y.; Clark, R.G

2004-10-01

The fabrication of atomic-scale devices in silicon requires the encapsulation of dopant atoms which have been incorporated into the silicon surface at atomically precise positions using scanning tunnelling microscopy (STM) lithography. During silicon encapsulation, it is important to minimise segregation and diffusion of dopant atoms in order to retain the lithography defined device structure. Buried dopant imaging using STM is capable of imaging dopant atoms such as phosphorus after encapsulation in silicon several monolayers below the silicon surface, thus making it possible to check the integrity of the device structure. To fabricate buried phosphorus-doped samples, we use phosphine gas as a source of phosphorus atoms and incorporate the phosphorus atoms into a Si(001) surface during an annealing step. Molecular beam epitaxy is used to encapsulate the dopant atoms with several monolayers of silicon. After encapsulation, we hydrogen terminate the silicon surface in order to image the buried phosphorus dopants using STM. We show that a buried phosphorus atom appears as a bright glow superimposed on the silicon dimer structure in empty state STM images, whereas filled state images only show a very faint protrusion in the vicinity of the phosphorus atom. We highlight the importance of our results for the fabrication of atomic-scale devices.

STM imaging of buried P atoms in hydrogen-terminated Si for the fabrication of a Si:P quantum computer

International Nuclear Information System (INIS)

Oberbeck, L.; Curson, N.J.; Hallam, T.; Simmons, M.Y.; Clark, R.G.

2004-01-01

The fabrication of atomic-scale devices in silicon requires the encapsulation of dopant atoms which have been incorporated into the silicon surface at atomically precise positions using scanning tunnelling microscopy (STM) lithography. During silicon encapsulation, it is important to minimise segregation and diffusion of dopant atoms in order to retain the lithography defined device structure. Buried dopant imaging using STM is capable of imaging dopant atoms such as phosphorus after encapsulation in silicon several monolayers below the silicon surface, thus making it possible to check the integrity of the device structure. To fabricate buried phosphorus-doped samples, we use phosphine gas as a source of phosphorus atoms and incorporate the phosphorus atoms into a Si(001) surface during an annealing step. Molecular beam epitaxy is used to encapsulate the dopant atoms with several monolayers of silicon. After encapsulation, we hydrogen terminate the silicon surface in order to image the buried phosphorus dopants using STM. We show that a buried phosphorus atom appears as a bright glow superimposed on the silicon dimer structure in empty state STM images, whereas filled state images only show a very faint protrusion in the vicinity of the phosphorus atom. We highlight the importance of our results for the fabrication of atomic-scale devices

Note: Laser ablation technique for electrically contacting a buried implant layer in single crystal diamond

International Nuclear Information System (INIS)

Ray, M. P.; Baldwin, J. W.; Butler, J. E.; Pate, B. B.; Feygelson, T. I.

2011-01-01

The creation of thin, buried, and electrically conducting layers within an otherwise insulating diamond by annealed ion implantation damage is well known. Establishing facile electrical contact to the shallow buried layer has been an unmet challenge. We demonstrate a new method, based on laser micro-machining (laser ablation), to make reliable electrical contact to a buried implant layer in diamond. Comparison is made to focused ion beam milling.

Fabrication of Si-based planar type patch clamp biosensor using silicon on insulator substrate

International Nuclear Information System (INIS)

Zhang, Z.L.; Asano, T.; Uno, H.; Tero, R.; Suzui, M.; Nakao, S.; Kaito, T.; Shibasaki, K.; Tominaga, M.; Utsumi, Y.; Gao, Y.L.; Urisu, T.

2008-01-01

The aim of this paper is to fabricate the planar type patch clamp ion-channel biosensor, which is suitable for the high throughput screening, using silicon-on-insulator (SOI) substrate. The micropore with 1.2 μm diameter is formed through the top Si layer and the SiO 2 box layer of the SOI substrate by focused ion beam (FIB). Then the substrate is assembled into the microfluidic circuit. The human embryonic kidney 293 (HEK-293) cell transfected with transient receptor potential vanilloid type 1 (TRPV1) is positioned on the micropore and the whole-cell configuration is formed by the suction. Capsaicin is added to the extracellular solution as a ligand molecule, and the channel current showing the desensitization unique to TRPV1 is measured successfully

Planar Fully-Depleted-Silicon-On-Insulator technologies: Toward the 28 nm node and beyond

Science.gov (United States)

Doris, B.; DeSalvo, B.; Cheng, K.; Morin, P.; Vinet, M.

2016-03-01

This paper presents a comprehensive overview of the research done in the last decade on planar Fully-Depleted-Silicon-On-Insulator (FDSOI) technologies in the frame of the joint development program between IBM, ST Microelectronics and CEA-LETI. In particular, we review the technological developments ranging from substrate engineering to process modules that enable functionality and improve FDSOI performance over several generations. Various multi Vt integration schemes to maximize the benefits of the thin BOX FDSOI platform are discussed. Manufacturability as well as scalability concerns are highlighted and addressed. In addition, this work provides understanding of the performance/power trade-offs for FDSOI circuits and device variability. Finally, clear directions for future application-specific products are given, demonstrating that FDSOI is an attractive CMOS option for next generation high performance and low-power applications.

Fabrication of Si-based planar type patch clamp biosensor using silicon on insulator substrate

Energy Technology Data Exchange (ETDEWEB)

Zhang, Z.L.; Asano, T. [Graduate University for Advanced Studies, Myodaiji, Okazaki, 444-8585 (Japan); Uno, H. [Institute for Molecular Science, Myodaiji, Okazaki, 444-8585 (Japan); Tero, R. [Graduate University for Advanced Studies, Myodaiji, Okazaki, 444-8585 (Japan); Institute for Molecular Science, Myodaiji, Okazaki, 444-8585 (Japan); Suzui, M.; Nakao, S. [Institute for Molecular Science, Myodaiji, Okazaki, 444-8585 (Japan); Kaito, T. [SII NanoTechnology Inc., 36-1, Takenoshita, Oyama-cho, Sunto-gun, Shizuoka, 410-1393 (Japan); Shibasaki, K.; Tominaga, M. [Okazaki Institute for Integrative Bioscience, 5-1, Higashiyama, Myodaiji, Okazaki, 444-8787 (Japan); Utsumi, Y. [Laboratory of Advanced Science and Technology for Industry, University of Hyogo, 3-1-2, Koto, Kamigori, Ako-gun, Hyogo, 678-1205 (Japan); Gao, Y.L. [Department of Physics and Astronomy, Rochester University, Rochester, New York 14627 (United States); Urisu, T. [Graduate University for Advanced Studies, Myodaiji, Okazaki, 444-8585 (Japan); Institute for Molecular Science, Myodaiji, Okazaki, 444-8585 (Japan)], E-mail: urisu@ims.ac.jp

2008-03-03

The aim of this paper is to fabricate the planar type patch clamp ion-channel biosensor, which is suitable for the high throughput screening, using silicon-on-insulator (SOI) substrate. The micropore with 1.2 {mu}m diameter is formed through the top Si layer and the SiO{sub 2} box layer of the SOI substrate by focused ion beam (FIB). Then the substrate is assembled into the microfluidic circuit. The human embryonic kidney 293 (HEK-293) cell transfected with transient receptor potential vanilloid type 1 (TRPV1) is positioned on the micropore and the whole-cell configuration is formed by the suction. Capsaicin is added to the extracellular solution as a ligand molecule, and the channel current showing the desensitization unique to TRPV1 is measured successfully.

Suppression of interfacial voids formation during silane (SiH4)-based silicon oxide bonding with a thin silicon nitride capping layer

Science.gov (United States)

Lee, Kwang Hong; Bao, Shuyu; Wang, Yue; Fitzgerald, Eugene A.; Seng Tan, Chuan

2018-01-01

The material properties and bonding behavior of silane-based silicon oxide layers deposited by plasma-enhanced chemical vapor deposition were investigated. Fourier transform infrared spectroscopy was employed to determine the chemical composition of the silicon oxide films. The incorporation of hydroxyl (-OH) groups and moisture absorption demonstrates a strong correlation with the storage duration for both as-deposited and annealed silicon oxide films. It is observed that moisture absorption is prevalent in the silane-based silicon oxide film due to its porous nature. The incorporation of -OH groups and moisture absorption in the silicon oxide films increase with the storage time (even in clean-room environments) for both as-deposited and annealed silicon oxide films. Due to silanol condensation and silicon oxidation reactions that take place at the bonding interface and in the bulk silicon, hydrogen (a byproduct of these reactions) is released and diffused towards the bonding interface. The trapped hydrogen forms voids over time. Additionally, the absorbed moisture could evaporate during the post-bond annealing of the bonded wafer pair. As a consequence, defects, such as voids, form at the bonding interface. To address the problem, a thin silicon nitride capping film was deposited on the silicon oxide layer before bonding to serve as a diffusion barrier to prevent moisture absorption and incorporation of -OH groups from the ambient. This process results in defect-free bonded wafers.

An 8.68% efficiency chemically-doped-free graphene-silicon solar cell using silver nanowires network buried contacts.

Science.gov (United States)

Yang, Lifei; Yu, Xuegong; Hu, Weidan; Wu, Xiaolei; Zhao, Yan; Yang, Deren

2015-02-25

Graphene-silicon (Gr-Si) heterojunction solar cells have been recognized as one of the most low-cost candidates in photovoltaics due to its simple fabrication process. However, the high sheet resistance of chemical vapor deposited (CVD) Gr films is still the most important limiting factor for the improvement of the power conversion efficiency of Gr-Si solar cells, especially in the case of large device-active area. In this work, we have fabricated a novel transparent conductive film by hybriding a monolayer Gr film with silver nanowires (AgNWs) network soldered by the graphene oxide (GO) flakes. This Gr-AgNWs hybrid film exhibits low sheet resistance and larger direct-current to optical conductivity ratio, quite suitable for solar cell fabrication. An efficiency of 8.68% has been achieved for the Gr-AgNWs-Si solar cell, in which the AgNWs network acts as buried contacts. Meanwhile, the Gr-AgNWs-Si solar cells have much better stability than the chemically doped Gr-Si solar cells. These results show a new route for the fabrication of high efficient and stable Gr-Si solar cells.

Catalytic oxidation of silicon by cesium ion bombardment

International Nuclear Information System (INIS)

Souzis, A.E.; Huang, H.; Carr, W.E.; Seidl, M.

1991-01-01

Results for room-temperature oxidation of silicon using cesium ion bombardment and low oxygen exposure are presented. Bombardment with cesium ions is shown to allow oxidation at O 2 pressures orders of magnitude smaller than with noble gas ion bombardment. Oxide layers of up to 30 A in thickness are grown with beam energies ranging from 20--2000 eV, O 2 pressures from 10 -9 to 10 -6 Torr, and total O 2 exposures of 10 0 to 10 4 L. Results are shown to be consistent with models indicating that initial oxidation of silicon is via dissociative chemisorption of O 2 , and that the low work function of the cesium- and oxygen-coated silicon plays the primary role in promoting the oxidation process

Organic filler from golden apple snails shells to improve the silicone rubber insulator properties

Science.gov (United States)

Tepsila, Sujirat; Suksri, Amnart

2018-02-01

This paper investigates the effect of an addition of filler compound using golden apple snail shell as an organic filler to the silicone rubber insulator. The filler obtained from golden apple snail shell is found mostly contained calcium carbonate. The organic calcium carbonate (CaCO3) with particle size of 45, 75, 100 and 300 micron were prepared. Sample of silicone rubber that were filled with fillers were tested under ASTM D638-02a type standard for mechanical test. Also, electrical test such as I-V characteristics (ASTM D257-07) and dry arc test according to ASTM D495-14 have been performed. The results revealed that using larger particle size of organic filler obtained from the golden apple snail shell resulted to higher value of dielectric constant as well as higher dielectric strength. Also, the filler helps slow down the tracking activity at an insulator surface due to its crystals of calcium carbonate. However, when using excessive amount of filler, the sample will have a drawbacks in mechanical properties. By using agriculture waste as a filler compound, one can reduced the usage of commercial CaCO3 as an inorganic materials and to lower the investment cost to a final silicone rubber product.

Advanced photonic filters based on cascaded Sagnac loop reflector resonators in silicon-on-insulator nanowires

Science.gov (United States)

Wu, Jiayang; Moein, Tania; Xu, Xingyuan; Moss, David J.

2018-04-01

We demonstrate advanced integrated photonic filters in silicon-on-insulator (SOI) nanowires implemented by cascaded Sagnac loop reflector (CSLR) resonators. We investigate mode splitting in these standing-wave (SW) resonators and demonstrate its use for engineering the spectral profile of on-chip photonic filters. By changing the reflectivity of the Sagnac loop reflectors (SLRs) and the phase shifts along the connecting waveguides, we tailor mode splitting in the CSLR resonators to achieve a wide range of filter shapes for diverse applications including enhanced light trapping, flat-top filtering, Q factor enhancement, and signal reshaping. We present the theoretical designs and compare the CSLR resonators with three, four, and eight SLRs fabricated in SOI. We achieve versatile filter shapes in the measured transmission spectra via diverse mode splitting that agree well with theory. This work confirms the effectiveness of using CSLR resonators as integrated multi-functional SW filters for flexible spectral engineering.

The role of extra-atomic relaxation in determining Si2p binding energy shifts at silicon/silicon oxide interfaces

International Nuclear Information System (INIS)

Zhang, K.Z.; Greeley, J.N.; Banaszak Holl, M.M.; McFeely, F.R.

1997-01-01

The observed binding energy shift for silicon oxide films grown on crystalline silicon varies as a function of film thickness. The physical basis of this shift has previously been ascribed to a variety of initial state effects (Si endash O ring size, strain, stoichiometry, and crystallinity), final state effects (a variety of screening mechanisms), and extrinsic effects (charging). By constructing a structurally homogeneous silicon oxide film on silicon, initial state effects have been minimized and the magnitude of final state stabilization as a function of film thickness has been directly measured. In addition, questions regarding the charging of thin silicon oxide films on silicon have been addressed. From these studies, it is concluded that initial state effects play a negligible role in the thickness-dependent binding energy shift. For the first ∼30 Angstrom of oxide film, the thickness-dependent binding energy shift can be attributed to final state effects in the form of image charge induced stabilization. Beyond about 30 Angstrom, charging of the film occurs. copyright 1997 American Institute of Physics

Tuning of structural, light emission and wetting properties of nanostructured copper oxide-porous silicon matrix formed on electrochemically etched copper-coated silicon substrates

Science.gov (United States)

Naddaf, M.

2017-01-01

Matrices of copper oxide-porous silicon nanostructures have been formed by electrochemical etching of copper-coated silicon surfaces in HF-based solution at different etching times (5-15 min). Micro-Raman, X-ray diffraction and X-ray photoelectron spectroscopy results show that the nature of copper oxide in the matrix changes from single-phase copper (I) oxide (Cu2O) to single-phase copper (II) oxide (CuO) on increasing the etching time. This is accompanied with important variation in the content of carbon, carbon hydrides, carbonyl compounds and silicon oxide in the matrix. The matrix formed at the low etching time (5 min) exhibits a single broad "blue" room-temperature photoluminescence (PL) band. On increasing the etching time, the intensity of this band decreases and a much stronger "red" PL band emerges in the PL spectra. The relative intensity of this band with respect to the "blue" band significantly increases on increasing the etching time. The "blue" and "red" PL bands are attributed to Cu2O and porous silicon of the matrix, respectively. In addition, the water contact angle measurements reveal that the hydrophobicity of the matrix surface can be tuned from hydrophobic to superhydrophobic state by controlling the etching time.

Time-dependence hole and electron trapping effects in SIMOX buried oxides

International Nuclear Information System (INIS)

Boesch, H.E. Jr.; Taylor, T.L.; Hite, L.R.; Bailey, W.E.

1990-01-01

Back-channel threshold shift associated with the buried oxide layers of separation by implanted oxygen (SIMOX) and zone-melted recrystallization (ZMR) field-effect transistors (FETs) was measured following pulsed irradiation as a function of temperature and back-gate bias using a fast time-resolved I-V measurement technique. The SIMOX FETs showed large initial negative voltage shifts at 0.2 ms after irradiation followed by temperature- and bias-dependent additional negative shifts to 800s. Analysis and modeling of the results indicate efficient deep trapping of radiation-generated holes in the bulk of the oxide, substantial initial trapping of radiation-generated electrons in the oxide, and rapid removal of the trapped electrons by a thermal detrapping process. The ZMR FETs showed evidence of substantial trapping of holes alone in the oxide bulk

Cryogenic microwave imaging of metal–insulator transition in doped silicon

KAUST Repository

Kundhikanjana, Worasom; Lai, Keji; Kelly, Michael A.; Shen, Zhi-Xun

2011-01-01

We report the instrumentation and experimental results of a cryogenic scanning microwave impedance microscope. The microwave probe and the scanning stage are located inside the variable temperature insert of a helium cryostat. Microwave signals in the distance modulation mode are used for monitoring the tip-sample distance and adjusting the phase of the two output channels. The ability to spatially resolve the metal-insulator transition in a doped silicon sample is demonstrated. The data agree with a semiquantitative finite element simulation. Effects of the thermal energy and electric fields on local charge carriers can be seen in the images taken at different temperatures and dc biases. © 2011 American Institute of Physics.

Evaluation of diagnostic technique for degradation of low-voltage electric cables with silicone rubber insulator

International Nuclear Information System (INIS)

Mikami, Masao

2005-01-01

As a part of countermeasures against ageing problems of nuclear power plants, it is requested to establish non-destructive diagnostic technique for their degradation of low voltage electric cables and assessment standard of their life. Having aimed at investigating the degradation of low-voltage electric cable with silicone rubber insulator, change of its surface hardness at elevated temperature were measured by indenter modules. Moreover, we also measured the elongation at break, which is regarded as general degradation index of electric cables, and the surface hardness with a micro hardness meter. Consequently, it is seen that the indenter modulus measurement is (1) capable to obtain general feature of the thermal degradation of silicone rubber insulator, (2) applicable to diagnose the degree of degradation of the electric cable by converting the result to elongation at break, (3) well correlated with the hardness measurement of the electric cable with the micro hardness meter. (author)

Silicon microphotonic waveguides

International Nuclear Information System (INIS)

Ta'eed, V.; Steel, M.J.; Grillet, C.; Eggleton, B.; Du, J.; Glasscock, J.; Savvides, N.

2004-01-01

Full text: Silicon microphotonic devices have been drawing increasing attention in the past few years. The high index-difference between silicon and its oxide (Δn = 2) suggests a potential for high-density integration of optical functions on to a photonic chip. Additionally, it has been shown that silicon exhibits strong Raman nonlinearity, a necessary property as light interaction can occur only by means of nonlinearities in the propagation medium. The small dimensions of silicon waveguides require the design of efficient tapers to couple light to them. We have used the beam propagation method (RSoft BeamPROP) to understand the principles and design of an inverse-taper mode-converter as implemented in several recent papers. We report on progress in the design and fabrication of silicon-based waveguides. Preliminary work has been conducted by patterning silicon-on-insulator (SOI) wafers using optical lithography and reactive ion etching. Thus far, only rib waveguides have been designed, as single-mode ridge-waveguides are beyond the capabilities of conventional optical lithography. We have recently moved to electron beam lithography as the higher resolutions permitted will provide the flexibility to begin fabricating sub-micron waveguides

A grating coupler with a trapezoidal hole array for perfectly vertical light coupling between optical fibers and waveguides

Science.gov (United States)

Mizutani, Akio; Eto, Yohei; Kikuta, Hisao

2017-12-01

A grating coupler with a trapezoidal hole array was designed and fabricated for perfectly vertical light coupling between a single-mode optical fiber and a silicon waveguide on a silicon-on-insulator (SOI) substrate. The grating coupler with an efficiency of 53% was computationally designed at a 1.1-µm-thick buried oxide (BOX) layer. The grating coupler and silicon waveguide were fabricated on the SOI substrate with a 3.0-µm-thick BOX layer by a single full-etch process. The measured coupling efficiency was 24% for TE-polarized light at 1528 nm wavelength, which was 0.69 times of the calculated coupling efficiency for the 3.0-µm-thick BOX layer.

Effect of additive gases and injection methods on chemical dry etching of silicon nitride, silicon oxynitride, and silicon oxide layers in F2 remote plasmas

International Nuclear Information System (INIS)

Yun, Y. B.; Park, S. M.; Kim, D. J.; Lee, N.-E.; Kim, K. S.; Bae, G. H.

2007-01-01

The authors investigated the effects of various additive gases and different injection methods on the chemical dry etching of silicon nitride, silicon oxynitride, and silicon oxide layers in F 2 remote plasmas. N 2 and N 2 +O 2 gases in the F 2 /Ar/N 2 and F 2 /Ar/N 2 /O 2 remote plasmas effectively increased the etch rate of the layers. The addition of direct-injected NO gas increased the etch rates most significantly. NO radicals generated by the addition of N 2 and N 2 +O 2 or direct-injected NO molecules contributed to the effective removal of nitrogen and oxygen in the silicon nitride and oxide layers, by forming N 2 O and NO 2 by-products, respectively, and thereby enhancing SiF 4 formation. As a result of the effective removal of the oxygen, nitrogen, and silicon atoms in the layers, the chemical dry etch rates were enhanced significantly. The process regime for the etch rate enhancement of the layers was extended at elevated temperature

Tunnel Oxides Formed by Field-Induced Anodisation for Passivated Contacts of Silicon Solar Cells

Directory of Open Access Journals (Sweden)

Jingnan Tong

2018-02-01

Full Text Available Tunnel silicon oxides form a critical component for passivated contacts for silicon solar cells. They need to be sufficiently thin to allow carriers to tunnel through and to be uniform both in thickness and stoichiometry across the silicon wafer surface, to ensure uniform and low recombination velocities if high conversion efficiencies are to be achieved. This paper reports on the formation of ultra-thin silicon oxide layers by field-induced anodisation (FIA, a process that ensures uniform oxide thickness by passing the anodisation current perpendicularly through the wafer to the silicon surface that is anodised. Spectroscopical analyses show that the FIA oxides contain a lower fraction of Si-rich sub-oxides compared to wet-chemical oxides, resulting in lower recombination velocities at the silicon and oxide interface. This property along with its low temperature formation highlights the potential for FIA to be used to form low-cost tunnel oxide layers for passivated contacts of silicon solar cells.

Analysis and design of tunable wideband microwave photonics phase shifter based on Fabry-Perot cavity and Bragg mirrors in silicon-on-insulator waveguide.

Science.gov (United States)

Qu, Pengfei; Zhou, Jingran; Chen, Weiyou; Li, Fumin; Li, Haibin; Liu, Caixia; Ruan, Shengping; Dong, Wei

2010-04-20

We designed a microwave (MW) photonics phase shifter, consisting of a Fabry-Perot filter, a phase modulation region (PMR), and distributed Bragg reflectors, in a silicon-on-insulator rib waveguide. The thermo-optics effect was employed to tune the PMR. It was theoretically demonstrated that the linear MW phase shift of 0-2pi could be achieved by a refractive index variation of 0-9.68x10(-3) in an ultrawideband (about 38?GHz-1.9?THz), and the corresponding tuning resolution was about 6.92 degrees / degrees C. The device had a very compact size. It could be easily integrated in silicon optoelectronic chips and expected to be widely used in the high-frequency MW photonics field.

Reducing Thermal Losses and Gains With Buried and Encapsulated Ducts in Hot-Humid Climates

Energy Technology Data Exchange (ETDEWEB)

Shapiro, C.; Magee, A.; Zoeller, W.

2013-02-01

The Consortium for Advanced Residential Buildings (CARB) monitored three houses in Jacksonville, FL, to investigate the effectiveness of encapsulated and encapsulated/buried ducts in reducing thermal losses and gains from ductwork in unconditioned attics. Burying ductwork beneath loose-fill insulation has been identified as an effective method of reducing thermal losses and gains from ductwork in dry climates, but it is not applicable in humid climates where condensation may occur on the outside of the duct jacket. By encapsulating the ductwork in closed cell polyurethane foam (ccSPF) before burial beneath loose-fill mineral fiber insulation, the condensation potential may be reduced while increasing the R-value of the ductwork.

Effects of insulating vanadium oxide composite in concomitant mixed phases via interface barrier modulations on the performance improvements in metal-insulator-metal diodes

Directory of Open Access Journals (Sweden)

Kaleem Abbas

2018-03-01

Full Text Available The performance of metal-insulator-metal diodes is investigated for insulating vanadium oxide (VOx composite composed of concomitant mixed phases using the Pt metal as the top and the bottom electrodes. Insulating VOx composite in the Pt/VOx/Pt diode exhibits a high asymmetry of 10 and a very high sensitivity of 2,135V−1 at 0.6 V. The VOx composite provides Schottky-like barriers at the interface, which controls the current flow and the trap-assisted conduction mechanism. Such dramatic enhancement in asymmetry and rectification performance at low applied bias may be ascribed to the dynamic control of the insulating and metallic phases in VOx composites. We find that the nanostructure details of the insulating VOx layer can be critical in enhancing the performance of MIM diodes.

Effect of air on speed of insulating material deterioration under simulated LOCA environment. [Gamma radiation

Energy Technology Data Exchange (ETDEWEB)

Kusama, Yasuo; Yagi, Toshiaki; Ito, Masayuki; Okada, Sohei; Yoshikawa, Masato (Japan Atomic Energy Research Inst., Takasaki, Gunma. Takasaki Radiation Chemistry Research Establishment)

1982-12-01

To examine the quality approval testing method for the electric cables used for nuclear reactors, various covering insulating materials employed for the cables have been investigated from all angles. The factors which are considered to affect the deterioration of cable materials in a simulated LOCA (loss of coolant accident) environmental test are numerous. This paper reports on the result of investigation on the effect of air on the rate of deterioration of various organic materials usually used as the insulating and covering materials for the cables. Five kinds of polymer sheets (1 mm thick) used for reactor cables were employed as samples. The samples of both standard compounding ratio and the compounding ratio for practical reactor use were tested. As the deterioration prior to LOCA simulation, the thermal deterioration corresponding to 40 years aging (at 121 deg C for 7 days) was given, and subsequently, 50 Mrad gamma -irradiation at 1 Mrad/h was performed in the air. After that, the samples were subject to LOCA simulated environment. Since the results were different according to the kinds of samples, those are described separately for Hypalon, ethylene propylene rubber, cross-linked polyethylene, chloroprene and silicone rubber. The existence of air under LOCA environment accelerated the deterioration of insulation materials except silicone rubber, though its influence differed to the polymers. These materials swelled in the presence of air, and the degree of swelling increased with the temperature, having the close relation to oxidation deterioration. Polyethylene was more susceptible to the effect of air, and silicone rubber was rather stable. The samples of fire-retardant compounding ratio more swelled by water absorption than those of standard compounding ratio.

Role of masking oxide on silicon in processes of defect generation at formation of SIMOX structures

CERN Document Server

Askinazi, A Y; Miloglyadova, L V

2002-01-01

One investigated into Si-SiO sub 2 structures formed by implantation of oxygen ions into silicon (SIMOX-technology) by means of techniques based on measuring of high-frequency volt-farad characteristics and by means of electroluminescence. One determined existence of electrically active centres and of luminescence centres in the formed oxide layer near boundary with silicon. One clarified the role SiO sub 2 masking layer in silicon in defect generation under formation of the masked oxide layer. One established dependence of concentration of electrically active and luminescence centres on thickness of masking layer

Determination of Insulator-to-Semiconductor Transition in Sol-Gel Oxide Semiconductors Using Derivative Spectroscopy.

Science.gov (United States)

Lee, Woobin; Choi, Seungbeom; Kim, Kyung Tae; Kang, Jingu; Park, Sung Kyu; Kim, Yong-Hoon

2015-12-23

We report a derivative spectroscopic method for determining insulator-to-semiconductor transition during sol-gel metal-oxide semiconductor formation. When an as-spun sol-gel precursor film is photochemically activated and changes to semiconducting state, the light absorption characteristics of the metal-oxide film is considerable changed particularly in the ultraviolet region. As a result, a peak is generated in the first-order derivatives of light absorption ( A' ) vs. wavelength (λ) plots, and by tracing the peak center shift and peak intensity, transition from insulating-to-semiconducting state of the film can be monitored. The peak generation and peak center shift are described based on photon-energy-dependent absorption coefficient of metal-oxide films. We discuss detailed analysis method for metal-oxide semiconductor films and its application in thin-film transistor fabrication. We believe this derivative spectroscopy based determination can be beneficial for a non-destructive and a rapid monitoring of the insulator-to-semiconductor transition in sol-gel oxide semiconductor formation.

Advanced photonic filters based on cascaded Sagnac loop reflector resonators in silicon-on-insulator nanowires

Directory of Open Access Journals (Sweden)

Jiayang Wu

2018-04-01

Full Text Available We demonstrate advanced integrated photonic filters in silicon-on-insulator (SOI nanowires implemented by cascaded Sagnac loop reflector (CSLR resonators. We investigate mode splitting in these standing-wave (SW resonators and demonstrate its use for engineering the spectral profile of on-chip photonic filters. By changing the reflectivity of the Sagnac loop reflectors (SLRs and the phase shifts along the connecting waveguides, we tailor mode splitting in the CSLR resonators to achieve a wide range of filter shapes for diverse applications including enhanced light trapping, flat-top filtering, Q factor enhancement, and signal reshaping. We present the theoretical designs and compare the CSLR resonators with three, four, and eight SLRs fabricated in SOI. We achieve versatile filter shapes in the measured transmission spectra via diverse mode splitting that agree well with theory. This work confirms the effectiveness of using CSLR resonators as integrated multi-functional SW filters for flexible spectral engineering.

Formation of silicon carbide by laser ablation in graphene oxide-N-methyl-2-pyrrolidone suspension on silicon surface

Science.gov (United States)

Jaleh, Babak; Ghasemi, Samaneh; Torkamany, Mohammad Javad; Salehzadeh, Sadegh; Maleki, Farahnaz

2018-01-01

Laser ablation of a silicon wafer in graphene oxide-N-methyl-2-pyrrolidone (GO-NMP) suspension was carried out with a pulsed Nd:YAG laser (pulse duration = 250 ns, wavelength = 1064 nm). The surface of silicon wafer before and after laser ablation was studied using optical microscopy, scanning electron microscopy (SEM) and energy dispersive X-ray analysis (EDX). The results showed that the ablation of silicon surface in liquid by pulsed laser was done by the process of melt expulsion under the influence of the confined plasma-induced pressure or shock wave trapped between the silicon wafer and the liquid. The X-ray diffraction‌ (XRD) pattern of Si wafer after laser ablation showed that 4H-SiC layer is formed on its surface. The formation of the above layer was also confirmed by Raman spectroscopy, and X-ray photoelectron spectroscopy‌ (XPS), as well as EDX was utilized. The reflectance of samples decreased with increasing pulse energy. Therefore, the morphological alteration and the formation of SiC layer at high energy increase absorption intensity in the UV‌-vis regions. Theoretical calculations confirm that the formation of silicon carbide from graphene oxide and silicon wafer is considerably endothermic. Development of new methods for increasing the reflectance without causing harmful effects is still an important issue for crystalline Si solar cells. By using the method described in this paper, the optical properties of solar cells can be improved.

High dose implantations of antimony for buried layer applications

International Nuclear Information System (INIS)

Gailliard, J.P.; Dupuy, M.; Garcia, M.; Roussin, J.C.

1978-01-01

Electrical and physical properties of high dose implantations of antimony in silicon have been studied for use in buried layer applications. The results have been obtained both on and oriented silicon wafers. Following implantations which lead to amorphization we perform an annealing at 600 0 C for 10 mn in order to recrystallize the layer. The observed electrical properties (μ, R) show that the concentration of electrically active antimony ions is greater than that predicted from the solubility of antimony in silicon. Further annealing (in the range 1050 0 - 1200 0 ) induces: firstly a precipitation of the Sb and secondly a diffusion and dissolution of the precipitates. There is a different evolution of the defects in the and silicon slices. T.E.M. reveals no defects in the wafers after one hour annealing at 1200 0 C, whereas defects and twins remain in wafers. Having obtained the evolution of R with time and temperature it is then determined the implantation and annealing conditions which lead to the low resistivity (R = 10) needed for buried layer applications. Results with very many industrially made devices are discussed

Effect on the insulation material of a MOSFET device submitted to a standard diagnostic radiation beam

International Nuclear Information System (INIS)

De Magalhaes, C M S; Dos Santos, L A P; Souza, D do N; Maia, A F

2010-01-01

MOSFET electronic devices have been used for dosimetry in radiology and radiotherapy. Several communications show that due to the radiation exposure defects appear on the semiconductor crystal lattice. Actually, the structure of a MOSFET consists of three materials: a semiconductor, a metal and an insulator between them. The MOSFET is a quadripolar device with a common terminal: gate-source is the input; drain-source is the output. The gate controls the electrical current passing through semiconductor medium by the field effect because the silicon oxide acts as insulating material. The proposal of this work is to show some radiation effects on the insulator of a MOSFET device. A 6430 Keithley sub-femtoamp SourceMeter was used to verify how the insulating material layer in the structure of the device varies with the radiation exposure. We have used the IEC 61267 standard radiation X-ray beams generated from a Pantak industrial unit in the radiation energy range of computed tomography. This range was chosen because we are using the MOSFET device as radiation detector for dosimetry in computed tomography. The results showed that the behaviour of the electrical current of the device is different in the insulator and semiconductor structures.

Ellipsometry measurements of thickness of oxide and water layers on spherical and flat silicon surfaces

International Nuclear Information System (INIS)

Kenny, M.J.; Netterfield, R.; Wielunski, L.S.

1998-01-01

Full text: Ellipsometry has been used to measure the thickness of oxide layers on single crystal silicon surfaces, both flat and spherical and also to measure the extent of adsorption of moisture on the surface as a function of partial water vapour pressure. The measurements form part of an international collaborative project to make a precise determination of the Avogadro constant (ΔN A /N A -8 ) which will then be used to obtain an absolute definition of the kilogram, rather than one in terms of an artefact. Typically the native oxide layer on a cleaned silicon wafer is about 2 nm thick. On a polished sphere this oxide layer is typically 8 to 10 nm thick, the increased thickness being attributed to parameters related to the polishing process. Ellipsometry measurements on an 89 mm diameter polished silicon sphere at both VUW and CSIRO indicated a SiO 2 layer at 7 to 10 nm thick. It was observed that this thickness varied regularly. The crystal orientation of the sphere was determined using electron patterns generated from an electron microscope and the oxide layer was then measured through 180 arcs of great circles along (110) and (100) planes. It was observed that the thickness varied systematically with orientation. The minimum thickness was 7.4 nm at the axis (softest direction in silicon) and the greatest thickness was 9.5 nm at the axis (hardest direction in silicon). This is similar to an orientation dependent cubic pattern which has been observed to be superimposed on polished silicon spheres. At VUW, the sphere was placed in an evacuated bell jar and the ellipsometry signal was observed as the water vapour pressure was progressively increased up to saturation. The amount of water vapour adsorbed at saturation was one or two monolayers, indicating that the sphere does not wet

A novel self-aligned oxygen (SALOX) implanted SOI MOSFET device structure

Science.gov (United States)

Tzeng, J. C.; Baerg, W.; Ting, C.; Siu, B.

The morphology of the novel self-aligned oxygen implanted SOI (SALOX SOI) [1] MOSFET was studied. The channel silicon of SALOX SOI was confirmed to be undamaged single crystal silicon and was connected with the substrate. Buried oxide formed by oxygen implantation in this SALOX SOI structure was shown by a cross section transmission electron micrograph (X-TEM) to be amorphous. The source/drain silicon on top of the buried oxide was single crystal, as shown by the transmission electron diffraction (TED) pattern. The source/drain regions were elevated due to the buried oxide volume expansion. A sharp silicon—silicon dioxide interface between the source/drain silicon and buried oxide was observed by Auger electron spectroscopy (AES). Well behaved n-MOS transistor current voltage characteristics were obtained and showed no I-V kink.

Thermal oxidation of silicon with two oxidizing species

International Nuclear Information System (INIS)

Vild-Maior, A.A.; Filimon, S.

1979-01-01

A theoretical model for the thermal oxidation of silicon in wet oxygen is presented. It is shown that the presence of oxygen in the oxidation furnace has an important effect when the water temperature is not too high (less than about 65 deg C). The model is in good agreement with the experimental data. (author)

Functionalization of 2D macroporous silicon under the high-pressure oxidation

Science.gov (United States)

Karachevtseva, L.; Kartel, M.; Kladko, V.; Gudymenko, O.; Bo, Wang; Bratus, V.; Lytvynenko, O.; Onyshchenko, V.; Stronska, O.

2018-03-01

Addition functionalization after high-pressure oxidation of 2D macroporous silicon structures is evaluated. X-ray diffractometry indicates formation of orthorhombic SiO2 phase on macroporous silicon at oxide thickness of 800-1200 nm due to cylindrical symmetry of macropores and high thermal expansion coefficient of SiO2. Pb center concentration grows with the splitting energy of LO- and TO-phonons and SiO2 thickness in oxidized macroporous silicon structures. This increase EPR signal amplitude and GHz radiation absorption and is promising for development of high-frequency devices and electronically controlled elements.

A 2D simulation study and characterization of a novel vertical SOI MOSFET with a smart source/body tie

International Nuclear Information System (INIS)

Lin, Jyi-Tsong; Lee, Tai-Yi; Lin, Kao-Cheng

2008-01-01

A novel vertical silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET) with a smart source/body contact, SSBVMOS, is presented here for the first time. 2D simulations reveal that the SSBVMOS reduces self-heating effects, with the lattice temperature reduced by 14% and the hole temperature reduced by 25%. The SSBVMOS also eliminates the floating body effect, something that other SOI vertical MOSFETs are unable to accomplish, regardless of the thickness of the thin film. The SSBVMOS is further found to have a better drain-induced barrier lowering and subthreshold swing than either a conventional vertical MOSFET or an SOI vertical MOSFET. Moreover, these results are achieved using typical pillar heights and buried oxide thicknesses. Should future technological advances allow for lower pillars or thinner buried oxides, the SSBVMOS performance would further increase

Effect of yttrium on the oxide scale adherence of pre-oxidized silicon-containing heat-resistant alloy

International Nuclear Information System (INIS)

Yan Jingbo; Gao Yimin; Shen Yudi; Yang Fang; Yi Dawei; Ye Zhaozhong; Liang Long; Du Yingqian

2011-01-01

Highlights: → AE experiment shows yttrium has a beneficial effect on the pre-oxidized HP40 alloy. → Yttrium facilitates the formation of internal oxide after 10 h of oxidation. → Internal oxide changes the rupture behaviour of the oxide scale. → Twins form in the internal oxide and improve the binding strength of the scale. - Abstract: This paper investigates the effect of the rare earth element yttrium on the rupture behaviour of the oxide scale on the silicon-containing heat-resistant alloy during cooling. After 10 h of oxidation, yttrium is found to facilitate the formation of internal oxides (silica) at the scale-matrix interface. Due to the twinning observed by scanning transmission electron microscopy (STEM) in silica, the critical strain value for the scale failure can be dramatically improved, and the formation of cracks at the scale-matrix interface is inhibited.

The influence of oxidation properties on the electron emission characteristics of porous silicon

International Nuclear Information System (INIS)

He, Li; Zhang, Xiaoning; Wang, Wenjiang; Wei, Haicheng

2016-01-01

Highlights: • Evaluated the oxidation properties of porous silicon from semi-quantitative methods. • Discovered the relationship between oxidation properties and emission characteristics. • Revealed the micro-essence of the electron emission of the porous silicon. - Abstract: In order to investigate the influence of oxidation properties such as oxygen content and its distribution gradient on the electron emission characteristics of porous silicon (PS) emitters, emitters with PS thickness of 8 μm, 5 μm, and 3 μm were prepared and then oxidized by electrochemical oxidation (ECO) and ECO-RTO (rapid thermal oxidation) to get different oxidation properties. The experimental results indicated that the emission current density, efficiency, and stability of the PS emitters are mainly determined by oxidation properties. The higher oxygen content and the smaller oxygen distribution gradient in the PS layer, the larger emission current density and efficiency we noted. The most favorable results occurred for the PS emitter with the smallest oxygen distribution gradient and the highest level of oxygen content, with an emission current density of 212.25 μA/cm"2 and efficiency of 59.21‰. Additionally, it also demonstrates that thick PS layer benefits to the emission stability due to its longer electron acceleration tunnel. The FN fitting plots indicated that the effective emission areas of PS emitters can be enlarged and electron emission thresholds is decreased because of the higher oxygen content and smaller distribution gradient, which were approved by the optical micrographs of top electrode of PS emitters before and after electron emission.

The influence of oxidation properties on the electron emission characteristics of porous silicon

Energy Technology Data Exchange (ETDEWEB)

He, Li [Key Laboratory of Physical Electronics and Devices of the Ministry of Education, Xi’an Jiaotong University, Xi’an 710049 (China); Zhang, Xiaoning, E-mail: znn@mail.xjtu.edu.cn [Key Laboratory of Physical Electronics and Devices of the Ministry of Education, Xi’an Jiaotong University, Xi’an 710049 (China); Wang, Wenjiang [Key Laboratory of Physical Electronics and Devices of the Ministry of Education, Xi’an Jiaotong University, Xi’an 710049 (China); Wei, Haicheng [School of Electrical and Information Engineering, Beifang University of Nationalities, Yinchuan750021 (China)

2016-09-30

Highlights: • Evaluated the oxidation properties of porous silicon from semi-quantitative methods. • Discovered the relationship between oxidation properties and emission characteristics. • Revealed the micro-essence of the electron emission of the porous silicon. - Abstract: In order to investigate the influence of oxidation properties such as oxygen content and its distribution gradient on the electron emission characteristics of porous silicon (PS) emitters, emitters with PS thickness of 8 μm, 5 μm, and 3 μm were prepared and then oxidized by electrochemical oxidation (ECO) and ECO-RTO (rapid thermal oxidation) to get different oxidation properties. The experimental results indicated that the emission current density, efficiency, and stability of the PS emitters are mainly determined by oxidation properties. The higher oxygen content and the smaller oxygen distribution gradient in the PS layer, the larger emission current density and efficiency we noted. The most favorable results occurred for the PS emitter with the smallest oxygen distribution gradient and the highest level of oxygen content, with an emission current density of 212.25 μA/cm{sup 2} and efficiency of 59.21‰. Additionally, it also demonstrates that thick PS layer benefits to the emission stability due to its longer electron acceleration tunnel. The FN fitting plots indicated that the effective emission areas of PS emitters can be enlarged and electron emission thresholds is decreased because of the higher oxygen content and smaller distribution gradient, which were approved by the optical micrographs of top electrode of PS emitters before and after electron emission.

Growth and Etch Rate Study of Low Temperature Anodic Silicon Dioxide Thin Films

Directory of Open Access Journals (Sweden)

Akarapu Ashok

2014-01-01

Full Text Available Silicon dioxide (SiO2 thin films are most commonly used insulating films in the fabrication of silicon-based integrated circuits (ICs and microelectromechanical systems (MEMS. Several techniques with different processing environments have been investigated to deposit silicon dioxide films at temperatures down to room temperature. Anodic oxidation of silicon is one of the low temperature processes to grow oxide films even below room temperature. In the present work, uniform silicon dioxide thin films are grown at room temperature by using anodic oxidation technique. Oxide films are synthesized in potentiostatic and potentiodynamic regimes at large applied voltages in order to investigate the effect of voltage, mechanical stirring of electrolyte, current density and the water percentage on growth rate, and the different properties of as-grown oxide films. Ellipsometry, FTIR, and SEM are employed to investigate various properties of the oxide films. A 5.25 Å/V growth rate is achieved in potentiostatic mode. In the case of potentiodynamic mode, 160 nm thickness is attained at 300 V. The oxide films developed in both modes are slightly silicon rich, uniform, and less porous. The present study is intended to inspect various properties which are considered for applications in MEMS and Microelectronics.

Silicon oxide: a non-innocent surface for molecular electronics and nanoelectronics studies.

Science.gov (United States)

Yao, Jun; Zhong, Lin; Natelson, Douglas; Tour, James M

2011-02-02

Silicon oxide (SiO(x)) has been widely used in many electronic systems as a supportive and insulating medium. Here, we demonstrate various electrical phenomena such as resistive switching and related nonlinear conduction, current hysteresis, and negative differential resistance intrinsic to a thin layer of SiO(x). These behaviors can largely mimic numerous electrical phenomena observed in molecules and other nanomaterials, suggesting that substantial caution should be paid when studying conduction in electronic systems with SiO(x) as a component. The actual electrical phenomena can be the result of conduction from SiO(x) at a post soft-breakdown state and not the presumed molecular or nanomaterial component. These electrical properties and the underlying mechanisms are discussed in detail.

Charging effects during focused electron beam induced deposition of silicon oxide

NARCIS (Netherlands)

de Boer, Sanne K.; van Dorp, Willem F.; De Hosson, Jeff Th. M.

2011-01-01

This paper concentrates on focused electron beam induced deposition of silicon oxide. Silicon oxide pillars are written using 2, 4, 6, 8, 10-pentamethyl-cyclopenta-siloxane (PMCPS) as precursor. It is observed that branching of the pillar occurs above a minimum pillar height. The branching is

Influence of Chemical Composition and Structure in Silicon Dielectric Materials on Passivation of Thin Crystalline Silicon on Glass.

Science.gov (United States)

Calnan, Sonya; Gabriel, Onno; Rothert, Inga; Werth, Matteo; Ring, Sven; Stannowski, Bernd; Schlatmann, Rutger

2015-09-02

In this study, various silicon dielectric films, namely, a-SiOx:H, a-SiNx:H, and a-SiOxNy:H, grown by plasma enhanced chemical vapor deposition (PECVD) were evaluated for use as interlayers (ILs) between crystalline silicon and glass. Chemical bonding analysis using Fourier transform infrared spectroscopy showed that high values of oxidant gases (CO2 and/or N2), added to SiH4 during PECVD, reduced the Si-H and N-H bond density in the silicon dielectrics. Various three layer stacks combining the silicon dielectric materials were designed to minimize optical losses between silicon and glass in rear side contacted heterojunction pn test cells. The PECVD grown silicon dielectrics retained their functionality despite being subjected to harsh subsequent processing such as crystallization of the silicon at 1414 °C or above. High values of short circuit current density (Jsc; without additional hydrogen passivation) required a high density of Si-H bonds and for the nitrogen containing films, additionally, a high N-H bond density. Concurrently high values of both Jsc and open circuit voltage Voc were only observed when [Si-H] was equal to or exceeded [N-H]. Generally, Voc correlated with a high density of [Si-H] bonds in the silicon dielectric; otherwise, additional hydrogen passivation using an active plasma process was required. The highest Voc ∼ 560 mV, for a silicon acceptor concentration of about 10(16) cm(-3), was observed for stacks where an a-SiOxNy:H film was adjacent to the silicon. Regardless of the cell absorber thickness, field effect passivation of the buried silicon surface by the silicon dielectric was mandatory for efficient collection of carriers generated from short wavelength light (in the vicinity of the glass-Si interface). However, additional hydrogen passivation was obligatory for an increased diffusion length of the photogenerated carriers and thus Jsc in solar cells with thicker absorbers.

Additive advantage in characteristics of MIMCAPs on flexible silicon (100) fabric with release-first process

KAUST Repository

Ghoneim, Mohamed T.

2013-11-20

We report the inherent increase in capacitance per unit planar area of state-of-the art high-κ integrated metal/insulator/metal capacitors (MIMCAPs) fabricated on flexible silicon fabric with release-first process. We methodically study and show that our approach to transform bulk silicon (100) into a flexible fabric adds an inherent advantage of enabling higher integration density dynamic random access memory (DRAM) on the same chip area. Our approach is to release an ultra-thin silicon (100) fabric (25 μm thick) from the bulk silicon wafer, then build MIMCAPs using sputtered aluminium electrodes and successive atomic layer depositions (ALD) without break-ing the vacuum of a high-κ aluminium oxide sandwiched between two tantalum nitride layers. This result shows that we can obtain flexible electronics on silicon without sacrificing the high density integration aspects and also utilize the non-planar geometry associated with fabrication process to obtain a higher integration density compared to bulk silicon integration due to an increased normalized capacitance per unit planar area. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Exploring the deposition of oxides on silicon for photovoltaic cells by pulsed laser deposition

NARCIS (Netherlands)

Doeswijk, L.M.; de Moor, Hugo H.C.; Rogalla, Horst; Blank, David H.A.

2002-01-01

Since most commercially available solar cells are still made from silicon, we are exploring the introduction of passivating qualities in oxides, with the potential to serve as an antireflection coating. Pulsed laser deposition (PLD) was used to deposit TiO2 and SrTiO3 coatings on silicon substrates.

Theoretical model for the detection of charged proteins with a silicon-on-insulator sensor

International Nuclear Information System (INIS)

Birner, S; Uhl, C; Bayer, M; Vogl, P

2008-01-01

For a bio-sensor device based on a silicon-on-insulator structure, we calculate the sensitivity to specific charge distributions in the electrolyte solution that arise from protein binding to the semiconductor surface. This surface is bio-functionalized with a lipid layer so that proteins can specifically bind to the headgroups of the lipids on the surface. We consider charged proteins such as the green fluorescent protein (GFP) and artificial proteins that consist of a variable number of aspartic acids. Specifically, we calculate self-consistently the spatial charge and electrostatic potential distributions for different ion concentrations in the electrolyte. We fully take into account the quantum mechanical charge density in the semiconductor. We determine the potential change at the binding sites as a function of protein charge and ionic strength. Comparison with experiment is generally very good. Furthermore, we demonstrate the superiority of the full Poisson-Boltzmann equation by comparing its results to the simplified Debye-Hueckel approximation

Electrical properties and radiation hardness of SOI systems with multilayer buried dielectric

International Nuclear Information System (INIS)

Barchuk, I.P.; Kilchitskaya, V.I.; Lysenko, V.S.

1997-01-01

In this work SOI structures with buried SiO 2 -Si 3 N 4 -SiO 2 layers have been fabricated by the ZMR-technique with the aim of improving the total dose radiation hardness of the buried dielectric layer. To optimize the fabrication process, buried layers were investigated by secondary ion mass spectrometry before and after the ZMR process, and the obtained results were compared with electrical measurements. It is shown that optimization of the preparation processes of the initial buried dielectric layers provides ZMR SOI structures with multilayer buried isolation, which are of high quality for both Si film interfaces. Particular attention is paid to the investigation of radiation-induced charge trapping in buried insulators. Buried isolation structures with a nitride layer exhibit significant reduction of radiation-induced positive charge as compared to classical buried SiO 2 layers produced by either the ZMR or the SIMOX technique

A Monolithic Active Pixel Sensor for ionizing radiation using a 180 nm HV-SOI process

Energy Technology Data Exchange (ETDEWEB)

Hemperek, Tomasz, E-mail: hemperek@uni-bonn.de; Kishishita, Tetsuichi; Krüger, Hans; Wermes, Norbert

2015-10-01

An improved SOI-MAPS (Silicon On Insulator Monolithic Active Pixel Sensor) for ionizing radiation based on thick-film High Voltage SOI technology (HV-SOI) has been developed. Similar to existing Fully Depleted SOI-based (FD-SOI) MAPS, a buried silicon oxide inter-dielectric (BOX) layer is used to separate the CMOS electronics from the handle wafer which is used as a depleted charge collection layer. FD-SOI MAPS suffers from radiation damage such as transistor threshold voltage shifts due to charge traps in the oxide layers and charge states created at the silicon oxide boundaries (back gate effect). The X-FAB 180-nm HV-SOI technology offers an additional isolation by deep non-depleted implant between the BOX layer and the active circuitry which mitigates this problem. Therefore we see in this technology a high potential to implement radiation-tolerant MAPS with fast charge collection property. The design and measurement results from a first prototype are presented including charge collection in neutron irradiated samples.

Ultra-low specific on-resistance SOI double-gate trench-type MOSFET

International Nuclear Information System (INIS)

Lei Tianfei; Luo Xiaorong; Ge Rui; Chen Xi; Wang Yuangang; Yao Guoliang; Jiang Yongheng; Zhang Bo; Li Zhaoji

2011-01-01

An ultra-low specific on-resistance (R on,sp ) silicon-on-insulator (SOI) double-gate trench-type MOSFET (DG trench MOSFET) is proposed. The MOSFET features double gates and an oxide trench: the oxide trench is in the drift region, one trench gate is inset in the oxide trench and one trench gate is extended into the buried oxide. Firstly, the double gates reduce R on,sp by forming dual conduction channels. Secondly, the oxide trench not only folds the drift region, but also modulates the electric field, thereby reducing device pitch and increasing the breakdown voltage (BV). ABV of 93 V and a R on,sp of 51.8 mΩ·mm 2 is obtained for a DG trench MOSFET with a 3 μm half-cell pitch. Compared with a single-gate SOI MOSFET (SG MOSFET) and a single-gate SOI MOSFET with an oxide trench (SG trench MOSFET), the R on,sp of the DG trench MOSFET decreases by 63.3% and 33.8% at the same BV, respectively. (semiconductor devices)

Photoconduction in silicon rich oxide films

Energy Technology Data Exchange (ETDEWEB)

Luna-Lopez, J A; Carrillo-Lopez, J; Flores-Gracia, F J; Garcia-Salgado, G [CIDS-ICUAP, Benemerita Universidad Autonoma de Puebla. Ed. 103 D and C, col. San Manuel, Puebla, Pue. Mexico 72570 (Mexico); Aceves-Mijares, M; Morales-Sanchez, A, E-mail: jluna@buap.siu.m, E-mail: jluna@inaoep.m [INAOE, Luis Enrique Erro No. 1, Apdo. 51, Tonantzintla, Puebla, Mexico 72000 (Mexico)

2009-05-01

Photoconduction of silicon rich oxide (SRO) thin films were studied by current-voltage (I-V) measurements, where ultraviolet (UV) and white (Vis) light illumination were applied. SRO thin films were deposited by low pressure chemical vapour deposition (LPCVD) technique, using SiH{sub 4} (silane) and N{sub 2}O (nitrous oxide) as reactive gases at 700 {sup 0}. The gas flow ratio, Ro = [N{sub 2}O]/[SiH{sub 4}] was used to control the silicon excess. The thickness and refractive index of the SRO films were 72.0 nm, 75.5 nm, 59.1 nm, 73.4 nm and 1.7, 1.5, 1.46, 1.45, corresponding to R{sub o} = 10, 20, 30 and 50, respectively. These results were obtained by null ellipsometry. Si nanoparticles (Si-nps) and defects within SRO films permit to obtain interesting photoelectric properties as a high photocurrent and photoconduction. These effects strongly depend on the silicon excess, thickness and structure type. Two different structures (Al/SRO/Si and Al/SRO/SRO/Si metal-oxide-semiconductor (MOS)-like structures) were fabricated and used as devices. The photocurrent in these structures is dominated by the generation of carriers due to the incident photon energies ({approx}3.0-1.6 eV and 5 eV). These structures showed large photoconductive response at room temperature. Therefore, these structures have potential applications in optoelectronics devices.

Silicon based light emitter utilizing tunnel injection of excess carriers via MIS structure

Energy Technology Data Exchange (ETDEWEB)

Arguirov, Tzanimir; Kittler, Martin [IHP - Innovations for High Performance Microelectronics, Im Technologiepark 25, 15236 Frankfurt (Oder) (Germany); IHP/BTU Joint Lab BTU Cottbus, Konrad-Wachsmann-Allee 1, 03013 Cottbus (Germany); Wenger, Christian; Lukosius, Mindaugas [IHP - Innovations for High Performance Microelectronics, Im Technologiepark 25, 15236 Frankfurt (Oder) (Germany); Mchedlidze, Teimuraz [IHP/BTU Joint Lab BTU Cottbus, Konrad-Wachsmann-Allee 1, 03013 Cottbus (Germany); Reiche, Manfred [Max-Planck-Institut fuer Mikrostrukturphysik, Weinberg 2, 06120 Halle (Germany)

2011-04-15

We report on electro-luminescence from metal-insulator-semiconductor diodes (MISLED). MISLEDs prepared on silicon with HfO2 layers of different thicknesses were investigated and their properties compared with such prepared by using SiO2 insulator layer. The role of the insulator layer was studied in view of the efficiency of the band-to-band radiation from silicon. We show that the luminescence efficiency depends on the dielectric constant of the insulator as well as on its ability to conduct carriers by tunnelling. Efficiency enhancement of 3.3 times was detected when the SiO{sub 2} insulator was substituted by HfO{sub 2} in the MIS emitter. Optimal injection current exists, which leads to a maximal efficiency of the luminescence. The optimal current depends strongly on the thickness of the oxide. We relate the existence of an optimal current with the depth at which the injected minority carriers recombine radiatively. Thus the electric field in the semiconductor and the surface recombination are the factors determining the optimal injection (copyright 2011 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

Covalent Surface Modification of Silicon Oxides with Alcohols in Polar Aprotic Solvents.

Science.gov (United States)

Lee, Austin W H; Gates, Byron D

2017-09-05

Alcohol-based monolayers were successfully formed on the surfaces of silicon oxides through reactions performed in polar aprotic solvents. Monolayers prepared from alcohol-based reagents have been previously introduced as an alternative approach to covalently modify the surfaces of silicon oxides. These reagents are readily available, widely distributed, and are minimally susceptible to side reactions with ambient moisture. A limitation of using alcohol-based compounds is that previous reactions required relatively high temperatures in neat solutions, which can degrade some alcohol compounds or could lead to other unwanted side reactions during the formation of the monolayers. To overcome these challenges, we investigate the condensation reaction of alcohols on silicon oxides carried out in polar aprotic solvents. In particular, propylene carbonate has been identified as a polar aprotic solvent that is relatively nontoxic, readily accessible, and can facilitate the formation of alcohol-based monolayers. We have successfully demonstrated this approach for tuning the surface chemistry of silicon oxide surfaces with a variety of alcohol containing compounds. The strategy introduced in this research can be utilized to create silicon oxide surfaces with hydrophobic, oleophobic, or charged functionalities.

Anchoring of alkyl chain molecules on oxide surface using silicon alkoxide

Energy Technology Data Exchange (ETDEWEB)

Narita, Ayumi, E-mail: narita.ayumi@jaea.go.jp [Quantum Beam Science Directorate, Japan Atomic Energy Agency, Tokai-mura, Naka-gun, Ibaraki-ken 319-1195 (Japan); Graduate School of Science and Engineering, Ibaraki University, Bunnkyo, Mito-shi, Ibaraki-ken 310-8512 (Japan); Baba, Yuji; Sekiguchi, Tetsuhiro; Shimoyama, Iwao; Hirao, Norie [Quantum Beam Science Directorate, Japan Atomic Energy Agency, Tokai-mura, Naka-gun, Ibaraki-ken 319-1195 (Japan); Yaita, Tsuyoshi [Quantum Beam Science Directorate, Japan Atomic Energy Agency, Tokai-mura, Naka-gun, Ibaraki-ken 319-1195 (Japan); Graduate School of Science and Engineering, Ibaraki University, Bunnkyo, Mito-shi, Ibaraki-ken 310-8512 (Japan)

2012-01-01

Chemical states of the interfaces between octadecyl-triethoxy-silane (ODTS) molecules and sapphire surface were measured by X-ray photoelectron spectroscopy (XPS) and near edge X-ray absorption fine structure (NEXAFS) using synchrotron soft X-rays. The nearly self-assembled monolayer of ODTS was formed on the sapphire surface. For XPS and NEXAFS measurements, it was elucidated that the chemical bond between silicon alkoxide in ODTS and the surface was formed, and the alkane chain of ODTS locates upper side on the surface. As a result, it was elucidated that the silicon alkoxide is a good anchor for the immobilization of organic molecules on oxides.

Unified analytical threshold voltage model for non-uniformly doped dual metal gate fully depleted silicon-on-insulator MOSFETs

Science.gov (United States)

Rao, Rathnamala; Katti, Guruprasad; Havaldar, Dnyanesh S.; DasGupta, Nandita; DasGupta, Amitava

2009-03-01

The paper describes the unified analytical threshold voltage model for non-uniformly doped, dual metal gate (DMG) fully depleted silicon-on-insulator (FDSOI) MOSFETs based on the solution of 2D Poisson's equation. 2D Poisson's equation is solved analytically for appropriate boundary conditions using separation of variables technique. The solution is then extended to obtain the threshold voltage of the FDSOI MOSFET. The model is able to handle any kind of non-uniform doping, viz. vertical, lateral as well as laterally asymetric channel (LAC) profile in the SOI film in addition to the DMG structure. The analytical results are validated with the numerical simulations using the device simulator MEDICI.

Thermally insulating and fire-retardant lightweight anisotropic foams based on nanocellulose and graphene oxide

Science.gov (United States)

Wicklein, Bernd; Kocjan, Andraž; Salazar-Alvarez, German; Carosio, Federico; Camino, Giovanni; Antonietti, Markus; Bergström, Lennart

2015-03-01

High-performance thermally insulating materials from renewable resources are needed to improve the energy efficiency of buildings. Traditional fossil-fuel-derived insulation materials such as expanded polystyrene and polyurethane have thermal conductivities that are too high for retrofitting or for building new, surface-efficient passive houses. Tailored materials such as aerogels and vacuum insulating panels are fragile and susceptible to perforation. Here, we show that freeze-casting suspensions of cellulose nanofibres, graphene oxide and sepiolite nanorods produces super-insulating, fire-retardant and strong anisotropic foams that perform better than traditional polymer-based insulating materials. The foams are ultralight, show excellent combustion resistance and exhibit a thermal conductivity of 15 mW m-1 K-1, which is about half that of expanded polystyrene. At 30 °C and 85% relative humidity, the foams retained more than half of their initial strength. Our results show that nanoscale engineering is a promising strategy for producing foams with excellent properties using cellulose and other renewable nanosized fibrous materials.

Cobalt micro-magnet integration on silicon MOS quantum dots

Science.gov (United States)

Camirand Lemyre, Julien; Rochette, Sophie; Anderson, John; Manginell, Ronald P.; Pluym, Tammy; Ward, Dan; Carroll, Malcom S.; Pioro-Ladrière, Michel

Integration of cobalt micro-magnets on silicon metal-oxide-semiconductor (MOS) quantum dot devices has been investigated. The micro-magnets are fabricated in a lift-off process with e-beam lithography and deposited directly on top of an etched poly-silicon gate stack. Among the five resist stacks tested, one is found to be compatible with our MOS specific materials (Si and SiO2) . Moreover, devices with and without additional Al2O3 insulating layer show no additional gate leakage after processing. Preliminary transport data indicates electrostatic stability of our devices with integrated magnets. This work was performed, in part, at the Center for Integrated Nanotechnologies, an Office of Science User Facility operated for the U.S. Department of Energy (DOE) Office of Science. Sandia National Laboratories is a multi-program laboratory operated by Sandia Corporation, a Lockheed-Martin Company, for the U. S. Department of Energy under Contract No. DE-AC04-94AL85000.

Mechanical anomaly impact on metal-oxide-semiconductor capacitors on flexible silicon fabric

KAUST Repository

Ghoneim, Mohamed T.

2014-06-09

We report the impact of mechanical anomaly on high-κ/metal-oxide-semiconductor capacitors built on flexible silicon (100) fabric. The mechanical tests include studying the effect of bending radius up to 5 mm minimum bending radius with respect to breakdown voltage and leakage current of the devices. We also report the effect of continuous mechanical stress on the breakdown voltage over extended periods of times.

X-ray characterization of Ge dots epitaxially grown on nanostructured Si islands on silicon-on-insulator substrates.

Science.gov (United States)

Zaumseil, Peter; Kozlowski, Grzegorz; Yamamoto, Yuji; Schubert, Markus Andreas; Schroeder, Thomas

2013-08-01

On the way to integrate lattice mismatched semiconductors on Si(001), the Ge/Si heterosystem was used as a case study for the concept of compliant substrate effects that offer the vision to be able to integrate defect-free alternative semiconductor structures on Si. Ge nanoclusters were selectively grown by chemical vapour deposition on Si nano-islands on silicon-on-insulator (SOI) substrates. The strain states of Ge clusters and Si islands were measured by grazing-incidence diffraction using a laboratory-based X-ray diffraction technique. A tensile strain of up to 0.5% was detected in the Si islands after direct Ge deposition. Using a thin (∼10 nm) SiGe buffer layer between Si and Ge the tensile strain increases to 1.8%. Transmission electron microscopy studies confirm the absence of a regular grid of misfit dislocations in such structures. This clear experimental evidence for the compliance of Si nano-islands on SOI substrates opens a new integration concept that is not only limited to Ge but also extendable to semiconductors like III-V and II-VI materials.

Oxidation of ultra low carbon and silicon bearing steels

Energy Technology Data Exchange (ETDEWEB)

Suarez, Lucia [CTM - Technologic Centre, Materials Technology Area, Manresa, Barcelona (Spain)], E-mail: lucia.suarez@ctm.com.es; Rodriguez-Calvillo, Pablo [CTM - Technologic Centre, Materials Technology Area, Manresa, Barcelona (Spain)], E-mail: pablo.rodriguez@ctm.com.es; Houbaert, Yvan [Department of Materials Science and Engineering, University of Ghent (Belgium)], E-mail: Yvan.Houbaert@UGent.be; Colas, Rafael [Facultad de Ingenieria Mecanica y Electrica, Universidad Autonoma de Nuevo Leon (Mexico)], E-mail: rcolas@mail.uanl.mx

2010-06-15

Oxidation tests were carried out in samples from an ultra low carbon and two silicon bearing steels to determine the distribution and morphology of the oxide species present. The ultra low carbon steel was oxidized for short periods of time within a chamber designed to obtain thin oxide layers by controlling the atmosphere, and for longer times in an electric furnace; the silicon steels were reheated only in the electric furnace. The chamber was constructed to study the behaviour encountered during the short period of time between descaling and rolling in modern continuous mills. It was found that the oxide layers formed on the samples reheated in the electric furnace were made of different oxide species. The specimens treated in the chamber had layers made almost exclusively of wustite. Selected oxide samples were studied by scanning electron microscopy to obtain electron backscattered diffraction patterns, which were used to identify the oxide species in the layer.

Temperature dependence of nickel oxide effect on the optoelectronic properties of porous silicon

Energy Technology Data Exchange (ETDEWEB)

Riahi, R., E-mail: riahirim01@gmail.com [Laboratory of Semiconductors, Nanostructures and Advanced Technology (LSNTA), Research and Technology Center of Energy, Tourist Road Soliman, BP 95, 2050 Hammam-Lif (Tunisia); Faculty of Sciences Tunis–El Manar University (Tunisia); Derbali, L. [Laboratory of Semiconductors, Nanostructures and Advanced Technology (LSNTA), Research and Technology Center of Energy, Tourist Road Soliman, BP 95, 2050 Hammam-Lif (Tunisia); Ouertani, B. [Laboratory of Semiconductors, Nanostructures and Advanced Technology (LSNTA), Research and Technology Center of Energy, Tourist Road Soliman, BP 95, 2050 Hammam-Lif (Tunisia); Higher Institute of Environment Science and Technology of Borj-Cedria (Tunisia); Ezzaouia, H. [Laboratory of Semiconductors, Nanostructures and Advanced Technology (LSNTA), Research and Technology Center of Energy, Tourist Road Soliman, BP 95, 2050 Hammam-Lif (Tunisia)

2017-05-15

Highlights: • The treatment of porous silicon (PS) with nickel oxide (NiO) decreases the reflectivity significantly. • FTIR analysis showed a substitution of Si−H bonds to Si−O−Si and Si−O−Ni after the thermal annealing. • Annealing the treated NiO/PS at 400 °C leads to a noticeable improvement of the photoluminescence (PL) intensity. • A blueshift was obtained in the PL spectra due to the decrease of silicon nanocrystallites size after exceeding 400 °C. - Abstract: This paper investigates the effect of Nickel oxide (NiO) on the structural and optical properties of porous silicon (PS). Our investigations showed an obvious improvement of porous silicon optoelectronique properties after coating the PS with NiO thin film as a passivating process. The as-prepared NiO/PS thin film was subjected to a thermal annealing to study the effect of temperature on the efficiency of this treatment. The deposition of NiO onto the porous silicon layer was performed using the spray pyrolysis method. The surface modification of the as-prepared NiO/PS samples was investigated after annealing at various temperatures, using an infrared furnace, ranging between 300 °C and 600 °C. The X-ray Diffraction results showed that obtained films show cubic structure with preferred (200) plane orientation. We found an obvious dependence of the PS nanocrystallites size (nc-Si) to the annealing temperature. Photoluminescence (PL) is directly related to the electronic structure and transitions. The characteristic change of the band gap with decrease in size of the nanostructures can be pointed out by the observed blue shift in the photoluminescence spectra. Nickel oxide treatment of Porous silicon led to a significant increase of photoluminescence with a resulting blue-shift at higher annealing temperature. The surface morphology was examined by scanning electron microscope (SEM), and FTIR spectroscopy was used to study the chemical composition of the films. Moreover, the total

Temperature dependence of nickel oxide effect on the optoelectronic properties of porous silicon

International Nuclear Information System (INIS)

Riahi, R.; Derbali, L.; Ouertani, B.; Ezzaouia, H.

2017-01-01

Highlights: • The treatment of porous silicon (PS) with nickel oxide (NiO) decreases the reflectivity significantly. • FTIR analysis showed a substitution of Si−H bonds to Si−O−Si and Si−O−Ni after the thermal annealing. • Annealing the treated NiO/PS at 400 °C leads to a noticeable improvement of the photoluminescence (PL) intensity. • A blueshift was obtained in the PL spectra due to the decrease of silicon nanocrystallites size after exceeding 400 °C. - Abstract: This paper investigates the effect of Nickel oxide (NiO) on the structural and optical properties of porous silicon (PS). Our investigations showed an obvious improvement of porous silicon optoelectronique properties after coating the PS with NiO thin film as a passivating process. The as-prepared NiO/PS thin film was subjected to a thermal annealing to study the effect of temperature on the efficiency of this treatment. The deposition of NiO onto the porous silicon layer was performed using the spray pyrolysis method. The surface modification of the as-prepared NiO/PS samples was investigated after annealing at various temperatures, using an infrared furnace, ranging between 300 °C and 600 °C. The X-ray Diffraction results showed that obtained films show cubic structure with preferred (200) plane orientation. We found an obvious dependence of the PS nanocrystallites size (nc-Si) to the annealing temperature. Photoluminescence (PL) is directly related to the electronic structure and transitions. The characteristic change of the band gap with decrease in size of the nanostructures can be pointed out by the observed blue shift in the photoluminescence spectra. Nickel oxide treatment of Porous silicon led to a significant increase of photoluminescence with a resulting blue-shift at higher annealing temperature. The surface morphology was examined by scanning electron microscope (SEM), and FTIR spectroscopy was used to study the chemical composition of the films. Moreover, the total

Natural Contamination and Surface Flashover on Silicone Rubber Surface under Haze–Fog Environment

Directory of Open Access Journals (Sweden)

Ang Ren

2017-10-01

Full Text Available Anti-pollution flashover of insulator is important for power systems. In recent years, haze-fog weather occurs frequently, which makes discharge occurs easily on the insulator surface and accelerates insulation aging of insulator. In order to study the influence of haze-fog on the surface discharge of room temperature vulcanized silicone rubber, an artificial haze-fog lab was established. Based on four consecutive years of insulator contamination accumulation and atmospheric sampling in haze-fog environment, the contamination configuration appropriate for RTV-coated surface discharge test under simulation environment of haze-fog was put forward. ANSYS Maxwell was used to analyze the influence of room temperature vulcanized silicone rubber surface attachments on electric field distribution. The changes of droplet on the polluted room temperature vulcanized silicone rubber surface and the corresponding surface flashover voltage under alternating current (AC, direct current (DC positive polar (+, and DC negative polar (− power source were recorded by a high speed camera. The results are as follows: The main ion components from haze-fog atmospheric particles are NO3−, SO42−, NH4+, and Ca2+. In haze-fog environment, both the equivalent salt deposit density (ESDD and non-soluble deposit density (NSDD of insulators are higher than that under general environment. The amount of large particles on the AC transmission line is greater than that of the DC transmission line. The influence of DC polarity power source on the distribution of contamination particle size is not significant. After the deposition of haze-fog, the local conductivity of the room temperature vulcanized silicone rubber surface increased, which caused the flashover voltage reduce. Discharge is liable to occur at the triple junction point of droplet, air, and room temperature vulcanized silicone rubber surface. After the deformation or movement of droplets, a new triple junction

Effects of ion implantation on charges in the silicon--silicon dioxide system

International Nuclear Information System (INIS)

Learn, A.J.; Hess, D.W.

1977-01-01

Structures consisting of thermally grown oxide on silicon were implanted with boron, arsenic, or argon ions. For argon implantation through oxides, an increased fixed oxide charge (Q/sub ss/) was observed with the increase being greater for than for silicon. This effect is attributed to oxygen recoil which produces additional excess ionized silicon in the oxide of a type similar to that arising in thermal oxidation. Fast surface state (N/sub st/) generation was also noted which in most cases obscured the Q/sub ss/ increase. Of various heat treatments tested, only a 900 degreeC anneal in hydrogen annihilated N/sub st/ and allowed Q/sub ss/ measurement. Such N/sub st/ apparently arises as a consequence of implantation damage at the silicon--silicon dioxide interface. With the exception of boron implantations into thick oxides or through aluminum electrodes, reduction of the mobile ionic charge (Q/sub o/) was achieved by implantation. The reduction again is presumably damage related and is not negated by high-temperature annealing but may be counterbalanced by aluminum incorporation in the oxide

Oxidation and corrosion of silicon-based ceramics and composites

International Nuclear Information System (INIS)

Jacobson, N.S.; Fox, D.S.; Smialek, J.L.

1997-01-01

Silica scales exhibit slow growth rates and a low activation energy. Thus silica-protected materials are attractive high temperature structural materials for their potentially excellent oxidation resistance and well-documented high temperature strength. This review focuses on silicon carbide, silicon nitride, and composites of these materials. It is divided into four parts: (i) Fundamental oxidation mechanisms, (ii) Special properties of silica scales, (iii) Protective coatings, and (iv) Internal oxidation behavior of composites. While the fundamental oxidation mechanism of SiC is understood, there are still many questions regarding the oxidation mechanism of Si 3 N 4 . Silica scales exhibit many unique properties as compared to chromia and alumina. These include slower growth rates, SiO(g) formation, sensitivity to water vapor and impurities, and dissolution by basic molten salts. Protective coatings can limit the deleterious effects. The fourth area-internal oxidation of fibers and fiber coatings in composites-has limited the application of these novel materials. Strategies for understanding and limiting this internal oxidation are discussed. (orig.)

Fluorescence studies of Rhodamine 6G functionalized silicon oxide nanostructures

International Nuclear Information System (INIS)

Baumgaertel, Thomas; Borczyskowski, Christian von; Graaf, Harald

2010-01-01

Selective anchoring of optically active molecules on nanostructured surfaces is a promising step towards the creation of nanoscale devices with new functionalities. Recently we have demonstrated the electrostatic attachment of charged fluorescent molecules on silicon oxide nanostructures prepared by atomic force microscopy (AFM) nanolithography via local anodic oxidation (LAO) of dodecyl-terminated silicon. In this paper we report on our findings from a more detailed optical investigation of the bound dye Rhodamine 6G. High sensitivity optical wide field microscopy as well as confocal laser microscopy have been used to characterize the Rhodamine fluorescence emission. A highly interesting question concerns the interaction between an emitter close to a silicon surface because mechanisms such as energy transfer and fluorescence quenching will occur which are still not fully understood. Since the oxide thickness can be varied during preparation continuously from 1 to ∼ 5 nm, it is possible to investigate the fluorescence of the bound dye in close proximity to the underlying silicon. Using confocal laser microscopy we were also able to obtain optical spectra from the bound molecules. Together with the results from an analysis of their photochemical bleaching behaviour, we conjecture that some of the Rhodamine 6G molecules on the structure are interacting with the oxide, causing a spectral shift and differences in their photochemical properties.

Solar thermoelectric generators fabricated on a silicon-on-insulator substrate

International Nuclear Information System (INIS)

De Leon, Maria Theresa; Chong, Harold; Kraft, Michael

2014-01-01

Solar thermal power generation is an attractive electricity generation technology as it is environment-friendly, has the potential for increased efficiency, and has high reliability. The design, modelling, and evaluation of solar thermoelectric generators (STEGs) fabricated on a silicon-on-insulator substrate are presented in this paper. Solar concentration is achieved by using a focusing lens to concentrate solar input onto the membrane of the STEG. A thermal model is developed based on energy balance and heat transfer equations using lumped thermal conductances. This thermal model is shown to be in good agreement with actual measurement results. For a 1 W laser input with a spot size of 1 mm, a maximum open-circuit voltage of 3.06 V is obtained, which translates to a temperature difference of 226 °C across the thermoelements and delivers 25 µW of output power under matched load conditions. Based on solar simulator measurements, a maximum TEG voltage of 803 mV was achieved by using a 50.8 mm diameter plano-convex lens to focus solar input to a TEG with a length of 1000 µm, width of 15 µm, membrane diameter of 3 mm, and 114 thermocouples. This translates to a temperature difference of 18 °C across the thermoelements and an output power under matched load conditions of 431 nW. This paper demonstrates that by utilizing a solar concentrator to focus solar radiation onto the hot junction of a TEG, the temperature difference across the device is increased; subsequently improving the TEG’s efficiency. By using materials that are compatible with standard CMOS and MEMS processes, integration of solar-driven TEGs with on-chip electronics is seen to be a viable way of solar energy harvesting where the resulting microscale system is envisioned to have promising applications in on-board power sources, sensor networks, and autonomous microsystems. (paper)

Controlled localised melting in silicon by high dose germanium implantation and flash lamp annealing

International Nuclear Information System (INIS)

Voelskow, Matthias; Skorupa, Wolfgang; Pezoldt, Joerg; Kups, Thomas

2009-01-01

High intensity light pulse irradiation of monocrystalline silicon wafers is usually accompanied by inhomogeneous surface melting. The aim of the present work is to induce homogeneous buried melting in silicon by germanium implantation and subsequent flash lamp annealing. For this purpose high dose, high energy germanium implantation has been employed to lower the melting temperature of silicon in a predetermined depth region. Subsequent flash lamp irradiation at high energy densities leads to local melting of the germanium rich buried layer, whereby the thickness of the molten layer depends on the irradiation energy density. During the cooling down epitaxial crystallization takes place resulting in a largely defect-free layer. The combination of buried melting and dopant segregation has the potential to produce unusually buried doping profiles or to create strained silicon structures.

Field oxide radiation damage measurements in silicon strip detectors

Energy Technology Data Exchange (ETDEWEB)

Laakso, M [Particle Detector Group, Fermilab, Batavia, IL (United States) Research Inst. for High Energy Physics (SEFT), Helsinki (Finland); Singh, P; Shepard, P F [Dept. of Physics and Astronomy, Univ. Pittsburgh, PA (United States)

1993-04-01

Surface radiation damage in planar processed silicon detectors is caused by radiation generated holes being trapped in the silicon dioxide layers on the detector wafer. We have studied charge trapping in thick (field) oxide layers on detector wafers by irradiating FOXFET biased strip detectors and MOS test capacitors. Special emphasis was put on studying how a negative bias voltage across the oxide during irradiation affects hole trapping. In addition to FOXFET biased detectors, negatively biased field oxide layers may exist on the n-side of double-sided strip detectors with field plate based n-strip separation. The results indicate that charge trapping occurred both close to the Si-SiO[sub 2] interface and in the bulk of the oxide. The charge trapped in the bulk was found to modify the electric field in the oxide in a way that leads to saturation in the amount of charge trapped in the bulk when the flatband/threshold voltage shift equals the voltage applied over the oxide during irradiation. After irradiation only charge trapped close to the interface is annealed by electrons tunneling to the oxide from the n-type bulk. (orig.).

Foam insulated transfer line test report

International Nuclear Information System (INIS)

Squier, D.M.

1994-06-01

Miles of underground insulated piping will be installed at the Hanford site to transfer liquid waste. Significant cost savings may be realized by using pre-fabricated polyurethane foam insulated piping. Measurements were made on sections of insulated pipe to determine the insulation's resistance to axial expansion of the pipe, the force required to compress the foam in the leg of an expansion loop and the time required for heat up and cool down of a buried piping loop. These measurements demonstrated that the peak axial force increases with the amount of adhesion between the encasement pipe and the insulation. The compressive strength of the foam is too great to accommodate the thermal growth of long straight pipe sections into the expansion loops. Mathematical models of the piping system's thermal behavior can be refined by data from the heated piping loop

An optical MEMS accelerometer fabricated using double-sided deep reactive ion etching on silicon-on-insulator wafer

Science.gov (United States)

Teo, Adrian J. T.; Li, Holden; Tan, Say Hwa; Yoon, Yong-Jin

2017-06-01

Optical MEMS devices provide fast detection, electromagnetic resilience and high sensitivity. Using this technology, an optical gratings based accelerometer design concept was developed for seismic motion detection purposes that provides miniaturization, high manufacturability, low costs and high sensitivity. Detailed in-house fabrication procedures of a double-sided deep reactive ion etching (DRIE) on a silicon-on-insulator (SOI) wafer for a micro opto electro mechanical system (MOEMS) device are presented and discussed. Experimental results obtained show that the conceptual device successfully captured motion similar to a commercial accelerometer with an average sensitivity of 13.6 mV G-1, and a highest recorded sensitivity of 44.1 mV G-1. A noise level of 13.5 mV was detected due to experimental setup limitations. This is the first MOEMS accelerometer developed using double-sided DRIE on SOI wafer for the application of seismic motion detection, and is a breakthrough technology platform to open up options for lower cost MOEMS devices.

An optical MEMS accelerometer fabricated using double-sided deep reactive ion etching on silicon-on-insulator wafer

International Nuclear Information System (INIS)

Teo, Adrian J T; Li, Holden; Yoon, Yong-Jin; Tan, Say Hwa

2017-01-01

Optical MEMS devices provide fast detection, electromagnetic resilience and high sensitivity. Using this technology, an optical gratings based accelerometer design concept was developed for seismic motion detection purposes that provides miniaturization, high manufacturability, low costs and high sensitivity. Detailed in-house fabrication procedures of a double-sided deep reactive ion etching (DRIE) on a silicon-on-insulator (SOI) wafer for a micro opto electro mechanical system (MOEMS) device are presented and discussed. Experimental results obtained show that the conceptual device successfully captured motion similar to a commercial accelerometer with an average sensitivity of 13.6 mV G −1 , and a highest recorded sensitivity of 44.1 mV G −1 . A noise level of 13.5 mV was detected due to experimental setup limitations. This is the first MOEMS accelerometer developed using double-sided DRIE on SOI wafer for the application of seismic motion detection, and is a breakthrough technology platform to open up options for lower cost MOEMS devices. (technical note)

Mechanical grooving of oxidized porous silicon to reduce the reflectivity of monocrystalline silicon solar cells

Energy Technology Data Exchange (ETDEWEB)

Zarroug, A.; Dimassi, W.; Ouertani, R.; Ezzaouia, H. [Laboratoire de Photovoltaique, Centre des Recherches et des Technologies de l' Energie, BP. 95, Hammam-Lif 2050 (Tunisia)

2012-10-15

In this work, we are interested to use oxidized porous silicon (ox-PS) as a mask. So, we display the creating of a rough surface which enhances the absorption of incident light by solar cells and reduces the reflectivity of monocrystalline silicon (c-Si). It clearly can be seen that the mechanical grooving enables us to elaborate the texturing of monocrystalline silicon wafer. Results demonstrated that the application of a PS layer followed by a thermal treatment under O2 ambient easily gives us an oxide layer of uniform size which can vary from a nanometer to about ten microns. In addition, the Fourier transform infrared (FTIR) spectroscopy investigations of the PS layer illustrates the possibility to realize oxide layer as a mask for porous silicon. We found also that this simple and low cost method decreases the total reflectivity (copyright 2012 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

DOUBLE BOSS SCULPTURED DIAPHRAGM EMPLOYED PIEZORESISTIVE MEMS PRESSURE SENSOR WITH SILICON-ON-INSULATOR (SOI

Directory of Open Access Journals (Sweden)

D. SINDHANAISELVI

2017-07-01

Full Text Available This paper presents the detailed study on the measurement of low pressure sensor using double boss sculptured diaphragm of piezoresistive type with MEMS technology in flash flood level measurement. The MEMS based very thin diaphragms to sense the low pressure is analyzed by introducing supports to achieve linearity. The simulation results obtained from Intellisuite MEMS CAD design tool show that very thin diaphragms with rigid centre or boss give acceptable linearity. Further investigations on very thin diaphragms embedded with piezoresistor for low pressure measurement show that it is essential to analyse the piezoresistor placement and size of piezoresistor to achieve good sensitivity. A modified analytical modelling developed in this study for double boss sculptured diaphragm results were compared with simulated results. Further the enhancement of sensitivity is analyzed using non uniform thickness diaphragm and Silicon-On-Insulator (SOI technique. The simulation results indicate that the double boss square sculptured diaphragm with SOI layer using 0.85μm thickness yields the higher voltage sensitivity, acceptable linearity with Small Scale Deflection.

Irradiation effects of swift heavy ions on gallium arsenide, silicon and silicon diodes

International Nuclear Information System (INIS)

Bhoraskar, V.N.

2001-01-01

The irradiation effects of high energy lithium, boron, oxygen and silicon ions on crystalline silicon, gallium arsenide, porous silicon and silicon diodes were investigated. The ion energy and fluence were varied over the ranges 30 to 100 MeV and 10 11 to 10 14 ions/cm 2 respectively. Semiconductor samples were characterized with the x-ray fluorescence, photoluminescence, thermally stimulated exo-electron emission and optical reflectivity techniques. The life-time of minority carriers in crystalline silicon was measured with a pulsed electron beam and the lithium depth distribution in GaAs was measured with the neutron depth profiling technique. The diodes were characterized through electrical measurements. The results of optical reflectivity, life-time of minority carriers and photoluminescence show that swift heavy ions induce defects in the surface region of crystalline silicon. In the ion-irradiated GaAs, migration of silicon, oxygen and lithium atoms from the buried region towards the surface was observed, with orders of magnitude enhancement in the diffusion coefficients. Enhancement in the photoluminescence intensity was observed in the GaAs and porous silicon samples that, were irradiated with silicon ions. The trade-off between the turn-off time and the voltage, drop in diodes irradiated with different swift heavy ions was also studied. (author)

Electrical leakage phenomenon in heteroepitaxial cubic silicon carbide on silicon

Science.gov (United States)

Pradeepkumar, Aiswarya; Zielinski, Marcin; Bosi, Matteo; Verzellesi, Giovanni; Gaskill, D. Kurt; Iacopi, Francesca

2018-06-01

Heteroepitaxial 3C-SiC films on silicon substrates are of technological interest as enablers to integrate the excellent electrical, electronic, mechanical, thermal, and epitaxial properties of bulk silicon carbide into well-established silicon technologies. One critical bottleneck of this integration is the establishment of a stable and reliable electronic junction at the heteroepitaxial interface of the n-type SiC with the silicon substrate. We have thus investigated in detail the electrical and transport properties of heteroepitaxial cubic silicon carbide films grown via different methods on low-doped and high-resistivity silicon substrates by using van der Pauw Hall and transfer length measurements as test vehicles. We have found that Si and C intermixing upon or after growth, particularly by the diffusion of carbon into the silicon matrix, creates extensive interstitial carbon traps and hampers the formation of a stable rectifying or insulating junction at the SiC/Si interface. Although a reliable p-n junction may not be realistic in the SiC/Si system, we can achieve, from a point of view of the electrical isolation of in-plane SiC structures, leakage suppression through the substrate by using a high-resistivity silicon substrate coupled with deep recess etching in between the SiC structures.

High-field Overhauser dynamic nuclear polarization in silicon below the metal-insulator transition.

Science.gov (United States)

Dementyev, Anatoly E; Cory, David G; Ramanathan, Chandrasekhar

2011-04-21

Single crystal silicon is an excellent system to explore dynamic nuclear polarization (DNP), as it exhibits a continuum of properties from metallic to insulating as a function of doping concentration and temperature. At low doping concentrations DNP has been observed to occur via the solid effect, while at very high-doping concentrations an Overhauser mechanism is responsible. Here we report the hyperpolarization of (29)Si in n-doped silicon crystals, with doping concentrations in the range of (1-3) × 10(17) cm(-3). In this regime exchange interactions between donors become extremely important. The sign of the enhancement in our experiments and its frequency dependence suggest that the (29)Si spins are directly polarized by donor electrons via an Overhauser mechanism within exchange-coupled donor clusters. The exchange interaction between donors only needs to be larger than the silicon hyperfine interaction (typically much smaller than the donor hyperfine coupling) to enable this Overhauser mechanism. Nuclear polarization enhancement is observed for a range of donor clusters in which the exchange energy is comparable to the donor hyperfine interaction. The DNP dynamics are characterized by a single exponential time constant that depends on the microwave power, indicating that the Overhauser mechanism is a rate-limiting step. Since only about 2% of the silicon nuclei are located within 1 Bohr radius of the donor electron, nuclear spin diffusion is important in transferring the polarization to all the spins. However, the spin-diffusion time is much shorter than the Overhauser time due to the relatively weak silicon hyperfine coupling strength. In a 2.35 T magnetic field at 1.1 K, we observed a DNP enhancement of 244 ± 84 resulting in a silicon polarization of 10.4 ± 3.4% following 2 h of microwave irradiation.

Formation of silicon Oxide nano thickness on Si (III) with the assistance of Cs

International Nuclear Information System (INIS)

Bahari, A.; Bagheri, M.

2006-01-01

: The possibility of controlling the growth of a uniform ultra thin oxide on silicon via oxygen dosing at low temperatures, would be a great interest for the projected further development of nano electronics. One way to achieve this is to be able to control the conversion of chemically adsorbed oxygen and retained at room temperature into oxide during subsequent heating. Oxygen is chemisorbed at room temperature on Si(111) surface to saturation ( >100 L O 2 ), and the experimental chamber is then evacuated. This leaves adsorbed oxygen as atomically inserted on Si surface which sits on the back bonds. This surface is then used as a base for further processing which in one case consists of annealing to 600- 700 d eg C and subsequent exposures equivalent to the first step. This is repeated again. As the focus of this work, a series of experiments are done with adsorbed Cs, which assists in retaining oxygen and in transforming the adsorbed oxygen into oxide upon heating. It was found that the oxide formed on the surface at low coverage clusters. Without any external influence, the clusters may be made to coalesce upon further oxygen adsorption at room temperature, and annealing terminates as a continuous monolayer of amorphous oxide on top of a well-ordered silicon substrate. This configuration is inert to further uptake of oxygen. A higher oxide thickness could be obtained with Cs. Also in this case, the oxide growth saturates in an inert oxide Iayer

Nafion/Silicon Oxide Composite Membrane for High Temperature Proton Exchange Membrane Fuel Cell

Institute of Scientific and Technical Information of China (English)

无

2007-01-01

Nafion/Silicon oxide composite membranes were produced via in situ sol-gel reaction of tetraethylorthosilicate (TEOS) in Nafion membranes. The physicochemical properties of the membranes were studied by FT-IR, TG-DSC and tensile strength. The results show that the silicon oxide is compatible with the Nafion membrane and the thermo stability of Nafion/Silicon oxide composite membrane is higher than that of Nafion membrane. Furthermore, the tensile strength of Nafion/Silicon oxide composite membrane is similar to that of the Nafion membrane. The proton conductivity of Nafion/Silicon oxide composite membrane is higher than that of Nafion membrane. When the Nafion/Silicon oxide composite membrane was employed as an electrolyte in H2/O2 PEMFC, a higher current density value (1 000 mA/cm2 at 0.38 V) than that of the Nafion 1135 membrane (100 mA/cm2 at 0.04 V) was obtained at 110 ℃.

The electronic structure and metal-insulator transitions in vanadium oxides

International Nuclear Information System (INIS)

Mossanek, Rodrigo Jose Ochekoski

2010-01-01

The electronic structure and metal-insulator transitions in vanadium oxides (SrVO_3, CaVO_3, LaVO_3 and YVO_3) are studied here. The purpose is to show a new interpretation to the spectra which is coherent with the changes across the metal-insulator transition. The main experimental techniques are the X-ray photoemission (PES) and X-ray absorption (XAS) spectroscopies. The spectra are interpreted with cluster model, band structure and atomic multiplet calculations. The presence of charge-transfer satellites in the core-level PES spectra showed that these vanadium oxides cannot be classified in the Mott-Hubbard regime. Further, the valence band and core-level spectra presented a similar behavior across the metal insulator transition. In fact, the structures in the spectra and their changes are determined by the different screening channels present in the metallic or insulating phases. The calculated spectral weight showed that the coherent fluctuations dominate the spectra at the Fermi level and give the metallic character to the SrVO_3 and CaVO_3 compounds. The vanishing of this charge fluctuation and the replacement by the Mott-Hubbard screening in the LaVO_3 and YVO_3 systems is ultimately responsible for the opening of a band gap and the insulating character. Further, the correlation effects are, indeed, important to the occupied electronic structure (coherent and incoherent peaks). On the other hand, the unoccupied electronic structure is dominated by exchange and crystal field effects (t2g and eg sub-bands of majority and minority spins). The optical conductivity spectrum was obtained by convoluting the removal and addition states. It showed that the oxygen states, as well as the crystal field and exchange effects are necessary to correctly compare and interpret the experimental results. Further, a correlation at the charge-transfer region of the core-level and valence band optical spectra was observed, which could be extended to other transition metal oxides

Nano-ridge fabrication by local oxidation of silicon edges with silicon nitride as a mask

NARCIS (Netherlands)

Haneveld, J.; Berenschot, Johan W.; Maury, P.A.; Jansen, Henricus V.

2005-01-01

A method to fabricate nano-ridges over a full wafer is presented. The fabrication method uses local oxidation of silicon, with silicon nitride as a mask, and wet anisotropic etching of silicon. The realized structures are 7-20 nm wide, 40-100 nm high and centimeters long. All dimensions are easily

Study Trapped Charge Distribution in P-Channel Silicon-Oxide-Nitride-Oxide-Silicon Memory Device Using Dynamic Programming Scheme

Science.gov (United States)

Li, Fu-Hai; Chiu, Yung-Yueh; Lee, Yen-Hui; Chang, Ru-Wei; Yang, Bo-Jun; Sun, Wein-Town; Lee, Eric; Kuo, Chao-Wei; Shirota, Riichiro

2013-04-01

In this study, we precisely investigate the charge distribution in SiN layer by dynamic programming of channel hot hole induced hot electron injection (CHHIHE) in p-channel silicon-oxide-nitride-oxide-silicon (SONOS) memory device. In the dynamic programming scheme, gate voltage is increased as a staircase with fixed step amplitude, which can prohibits the injection of holes in SiN layer. Three-dimensional device simulation is calibrated and is compared with the measured programming characteristics. It is found, for the first time, that the hot electron injection point quickly traverses from drain to source side synchronizing to the expansion of charged area in SiN layer. As a result, the injected charges quickly spread over on the almost whole channel area uniformly during a short programming period, which will afford large tolerance against lateral trapped charge diffusion by baking.

Influence of silicon on hot-dip aluminizing process and subsequent oxidation for preparing hydrogen/tritium permeation barrier

Energy Technology Data Exchange (ETDEWEB)

Han, Shilei; Li, Hualing; Wang, Shumao; Jiang, Lijun; Liu, Xiaopeng [Energy Materials and Technology Research Institute, General Research Institute for Nonferrous Metals, Beijing 100088 (China)

2010-04-15

The development of the International Thermonuclear Experimental Reactor (ITER) requires the production of a material capable of acting as a hydrogen/tritium permeation barrier on low activation steel. It is well known that thin alumina layer can reduce the hydrogen permeation rate by several orders of magnitude. A technology is introduced here to form a ductile Fe/Al intermetallic layer on the steel with an alumina over-layer. This technology, consisting of two main steps, hot-dip aluminizing (HDA) and subsequent oxidation behavior, seems to be a promising coating method to fulfill the required goals. According to the experiments that have been done in pure Al, the coatings were inhomogeneous and too thick. Additionally, a large number of cracks and porous band could be observed. In order to solve these problems, the element silicon was added to the aluminum melt with a nominal composition. The influence of silicon on the aluminizing and following oxidation process was investigated. With the addition of silicon into the aluminum melt, the coating became thinner and more homogeneous. The effort of the silicon on the oxidation behavior was observed as well concerning the suppression of porous band and cracks. (author)

Wet-Chemical Preparation of Silicon Tunnel Oxides for Transparent Passivated Contacts in Crystalline Silicon Solar Cells.

Science.gov (United States)

Köhler, Malte; Pomaska, Manuel; Lentz, Florian; Finger, Friedhelm; Rau, Uwe; Ding, Kaining

2018-05-02

Transparent passivated contacts (TPCs) using a wide band gap microcrystalline silicon carbide (μc-SiC:H(n)), silicon tunnel oxide (SiO 2 ) stack are an alternative to amorphous silicon-based contacts for the front side of silicon heterojunction solar cells. In a systematic study of the μc-SiC:H(n)/SiO 2 /c-Si contact, we investigated selected wet-chemical oxidation methods for the formation of ultrathin SiO 2 , in order to passivate the silicon surface while ensuring a low contact resistivity. By tuning the SiO 2 properties, implied open-circuit voltages of 714 mV and contact resistivities of 32 mΩ cm 2 were achieved using μc-SiC:H(n)/SiO 2 /c-Si as transparent passivated contacts.

Modeling of Buried Wire Detection by Radio-Frequency Electromagnetic Waves

NARCIS (Netherlands)

Naus, H.W.L.

2013-01-01

The detection of buried insulated wires of finite length with a transmitter–receiver electromagnetic induction sensor is theoretically investigated. The transmitter is modeled as a magnetic dipole. Its electric field induces a current in the cable. Analytical results for its Fourier transform are

Carbon nanotube network-silicon oxide non-volatile switches.

Science.gov (United States)

Liao, Albert D; Araujo, Paulo T; Xu, Runjie; Dresselhaus, Mildred S

2014-12-08

The integration of carbon nanotubes with silicon is important for their incorporation into next-generation nano-electronics. Here we demonstrate a non-volatile switch that utilizes carbon nanotube networks to electrically contact a conductive nanocrystal silicon filament in silicon dioxide. We form this device by biasing a nanotube network until it physically breaks in vacuum, creating the conductive silicon filament connected across a small nano-gap. From Raman spectroscopy, we observe coalescence of nanotubes during breakdown, which stabilizes the system to form very small gaps in the network~15 nm. We report that carbon nanotubes themselves are involved in switching the device to a high resistive state. Calculations reveal that this switching event occurs at ~600 °C, the temperature associated with the oxidation of nanotubes. Therefore, we propose that, in switching to a resistive state, the nanotube oxidizes by extracting oxygen from the substrate.

Direct Measurement of the Band Structure of a Buried Two-Dimensional Electron Gas

DEFF Research Database (Denmark)

Miwa, Jill; Hofmann, Philip; Simmons, Michelle Y.

2013-01-01

We directly measure the band structure of a buried two dimensional electron gas (2DEG) using angle resolved photoemission spectroscopy. The buried 2DEG forms 2 nm beneath the surface of p-type silicon, because of a dense delta-type layer of phosphorus n-type dopants which have been placed there...

Heterojunction Solar Cells Based on Silicon and Composite Films of Graphene Oxide and Carbon Nanotubes.

Science.gov (United States)

Yu, LePing; Tune, Daniel; Shearer, Cameron; Shapter, Joseph

2015-09-07

Graphene oxide (GO) sheets have been used as the surfactant to disperse single-walled carbon nanotubes (CNT) in water to prepare GO/CNT electrodes that are applied to silicon to form a heterojunction that can be used in solar cells. GO/CNT films with different ratios of the two components and with various thicknesses have been used as semitransparent electrodes, and the influence of both factors on the performance of the solar cell has been studied. The degradation rate of the GO/CNT-silicon devices under ambient conditions has also been explored. The influence of the film thickness on the device performance is related to the interplay of two competing factors, namely, sheet resistance and transmittance. CNTs help to improve the conductivity of the GO/CNT film, and GO is able to protect the silicon from oxidation in the atmosphere. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Ultracompact on-chip photothermal power monitor based on silicon hybrid plasmonic waveguides

Directory of Open Access Journals (Sweden)

Wu Hao

2017-01-01

Full Text Available We propose and demonstrate an ultracompact on-chip photothermal power monitor based on a silicon hybrid plasmonic waveguide (HPWG, which consists of a metal strip, a silicon core, and a silicon oxide (SiO2 insulator layer between them. When light injected to an HPWG is absorbed by the metal strip, the temperature increases and the resistance of the metal strip changes accordingly due to the photothermal and thermal resistance effects of the metal. Therefore, the optical power variation can be monitored by measuring the resistance of the metal strip on the HPWG. To obtain the electrical signal for the resistance measurement conveniently, a Wheatstone bridge circuit is monolithically integrated with the HPWG on the same chip. As the HPWG has nanoscale light confinement, the present power monitor is as short as ~3 μm, which is the smallest photothermal power monitor reported until now. The compactness helps to improve the thermal efficiency and the response speed. For the present power monitor fabricated with simple fabrication processes, the measured responsivity is as high as about 17.7 mV/mW at a bias voltage of 2 V and the power dynamic range is as large as 35 dB.

Determination of the quasi-TE mode (in-plane) graphene linear absorption coefficient via integration with silicon-on-insulator racetrack cavity resonators.

Science.gov (United States)

Crowe, Iain F; Clark, Nicholas; Hussein, Siham; Towlson, Brian; Whittaker, Eric; Milosevic, Milan M; Gardes, Frederic Y; Mashanovich, Goran Z; Halsall, Matthew P; Vijayaraghaven, Aravind

2014-07-28

We examine the near-IR light-matter interaction for graphene integrated cavity ring resonators based on silicon-on-insulator (SOI) race-track waveguides. Fitting of the cavity resonances from quasi-TE mode transmission spectra reveal the real part of the effective refractive index for graphene, n(eff) = 2.23 ± 0.02 and linear absorption coefficient, α(gTE) = 0.11 ± 0.01dBμm(-1). The evanescent nature of the guided mode coupling to graphene at resonance depends strongly on the height of the graphene above the cavity, which places limits on the cavity length for optical sensing applications.

Silicon on ferroelectic insulator field effect transistor (SOF-FET) a new device for the next generation ultra low power circuits

Science.gov (United States)

Es-Sakhi, Azzedin D.

concept of negative capacitance. The new field effect transistor (FET) based on ferroelectric insulator named Silicon-On-Ferroelectric Insulator Field Effect Transistor (SOF-FET). This proposal is a promising methodology for future ultra-low-power applications, because it demonstrates the ability to replace the silicon-bulk based MOSFET, and offers subthreshold swing significantly lower than 60mV/decade and reduced threshold voltage to form a conducting channel. The SOF-FET can also solve the issue of junction leakage (due to the presence of unipolar junction between the top plate of the negative capacitance and the diffused areas that form the transistor source and drain). In this device the charge hungry ferroelectric film already limits the leakage.

Thermal Oxidation of Structured Silicon Dioxide

DEFF Research Database (Denmark)

Christiansen, Thomas Lehrmann; Hansen, Ole; Jensen, Jørgen Arendt

2014-01-01

The topography of thermally oxidized, structured silicon dioxide is investigated through simulations, atomic force microscopy, and a proposed analytical model. A 357 nm thick oxide is structured by removing regions of the oxide in a masked etch with either reactive ion etching or hydrofluoric acid....... Subsequent thermal oxidation is performed in both dry and wet ambients in the temperature range 950◦C to 1100◦C growing a 205 ± 12 nm thick oxide in the etched mask windows. Lifting of the original oxide near the edge of the mask in the range 6 nm to 37 nm is seen with increased lifting for increasing...

Characterization of Transition Metal Oxide/Silicon Heterojunctions for Solar Cell Applications

Directory of Open Access Journals (Sweden)

Luis G. Gerling

2015-10-01

Full Text Available During the last decade, transition metal oxides have been actively investigated as hole- and electron-selective materials in organic electronics due to their low-cost processing. In this study, four transition metal oxides (V2O5, MoO3, WO3, and ReO3 with high work functions (>5 eV were thermally evaporated as front p-type contacts in planar n-type crystalline silicon heterojunction solar cells. The concentration of oxygen vacancies in MoO3−x was found to be dependent on film thickness and redox conditions, as determined by X-ray Photoelectron Spectroscopy. Transfer length method measurements of oxide films deposited on glass yielded high sheet resistances (~109 Ω/sq, although lower values (~104 Ω/sq were measured for oxides deposited on silicon, indicating the presence of an inversion (hole rich layer. Of the four oxide/silicon solar cells, ReO3 was found to be unstable upon air exposure, while V2O5 achieved the highest open-circuit voltage (593 mV and conversion efficiency (12.7%, followed by MoO3 (581 mV, 12.6% and WO3 (570 mV, 11.8%. A short-circuit current gain of ~0.5 mA/cm2 was obtained when compared to a reference amorphous silicon contact, as expected from a wider energy bandgap. Overall, these results support the viability of a simplified solar cell design, processed at low temperature and without dopants.

The Role of Interfaces in Polyethylene/Metal-Oxide Nanocomposites for Ultrahigh-Voltage Insulating Materials.

Science.gov (United States)

Pourrahimi, Amir Masoud; Olsson, Richard T; Hedenqvist, Mikael S

2018-01-01

Recent progress in the development of polyethylene/metal-oxide nanocomposites for extruded high-voltage direct-current (HVDC) cables with ultrahigh electric insulation properties is presented. This is a promising technology with the potential of raising the upper voltage limit in today's underground/submarine cables, based on pristine polyethylene, to levels where the loss of energy during electric power transmission becomes low enough to ensure intercontinental electric power transmission. The development of HVDC insulating materials together with the impact of the interface between the particles and the polymer on the nanocomposites electric properties are shown. Important parameters from the atomic to the microlevel, such as interfacial chemistry, interfacial area, and degree of particle dispersion/aggregation, are discussed. This work is placed in perspective with important work by others, and suggested mechanisms for improved insulation using nanoparticles, such as increased charge trap density, adsorption of impurities/ions, and induced particle dipole moments are considered. The effects of the nanoparticles and of their interfacial structures on the mechanical properties and the implications of cavitation on the electric properties are also discussed. Although the main interest in improving the properties of insulating polymers has been on the use of nanoparticles, leading to nanodielectrics, it is pointed out here that larger microscopic hierarchical metal-oxide particles with high surface porosity also impart good insulation properties. The impact of the type of particle and its inherent properties (purity and conductivity) on the nanocomposite dielectric and insulating properties are also discussed based on data obtained by a newly developed technique to directly observe the charge distribution on a nanometer scale in the nanocomposite. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Charge transport along luminescent oxide layers containing Si and SiC nanoparticles

Energy Technology Data Exchange (ETDEWEB)

Jambois, O. [EME, Departament d' Electronica, Universitat de Barcelona, Marti i Franques 1, 08028 Barcelona (Spain)]. E-mail: ojambois@el.ub.es; Vila, A. [EME, Departament d' Electronica, Universitat de Barcelona, Marti i Franques 1, 08028 Barcelona (Spain); Pellegrino, P. [EME, Departament d' Electronica, Universitat de Barcelona, Marti i Franques 1, 08028 Barcelona (Spain); Carreras, J. [EME, Departament d' Electronica, Universitat de Barcelona, Marti i Franques 1, 08028 Barcelona (Spain); Perez-Rodriguez, A. [EME, Departament d' Electronica, Universitat de Barcelona, Marti i Franques 1, 08028 Barcelona (Spain); Garrido, B. [EME, Departament d' Electronica, Universitat de Barcelona, Marti i Franques 1, 08028 Barcelona (Spain); Bonafos, C. [Nanomaterials Group, CEMES-CNRS, 29 rue J. Marvig 31055, Toulouse (France); BenAssayag, G. [Nanomaterials Group, CEMES-CNRS, 29 rue J. Marvig 31055, Toulouse (France)

2006-12-15

The electrical conductivity of silicon oxides containing silicon and silicon-carbon nanoparticles has been investigated. By use of sequential Si{sup +} and C{sup +} ion implantations in silicon oxide followed by an annealing at 1100 deg. C, luminescent Si nanocrystals and SiC nanoparticles were precipitated. The characterization of the electrical transport has been carried out on two kinds of structures, allowing parallel or perpendicular transport, with respect to the substrate. The first type of samples were elaborated by means of a focus-ion-beam technique: electrical contacts to embedded nanoparticles were made by milling two nanotrenches on the sample surface until reaching the buried layer, then filling them with tungsten. The distance between the electrodes is about 100 nm. The second type of samples correspond to 40 nm thick typical MOS capacitors. The electron transport along the buried layer has shown a dramatic lowering of the electrical current, up to five orders of magnitude, when applying a sequence of voltages. It has been related to a progressive charge retention inside the nanoparticles, which, on its turn, suppresses the electrical conduction along the layer. On the other hand, the MOS capacitors show a reversible carrier charge and discharge effect that limits the current at low voltage, mostly due to the presence of C in the layers. A typical Fowler-Nordheim injection takes place at higher applied voltages, with a threshold voltage equal to 23 V.

Stressing effects on the charge trapping of silicon oxynitride prepared by thermal oxidation of LPCVD Si-rich silicon nitride

International Nuclear Information System (INIS)

Choi, H.Y.; Wong, H.; Filip, V.; Sen, B.; Kok, C.W.; Chan, M.; Poon, M.C.

2006-01-01

It was recently found that the silicon oxynitride prepared by oxidation of silicon-rich silicon nitride (SRN) has several important features. The high nitrogen and extremely low hydrogen content of this material allows it to have a high dielectric constant and a low trap density. The present work investigates in further detail the electrical reliability of this kind of gate dielectric films by studying the charge trapping and interface state generation induced by constant current stressing. Capacitance-voltage (C-V) measurements indicate that for oxidation temperatures of 850 and 950 deg. C, the interface trap generation is minimal because of the high nitrogen content at the interface. At a higher oxidation temperature of 1050 deg. C, a large flatband shift is found for constant current stressing. This observation can be explained by the significant reduction of the nitrogen content and the phase separation effect at this temperature as found by X-ray photoelectron spectroscopy study. In addition to the high nitrogen content, the Si atoms at the interface exist in the form of random bonding to oxygen and nitrogen atoms for samples oxidized at 850 and 950 deg. C. This structure reduces the interface bonding constraint and results in the low interface trap density. For heavily oxidized samples the trace amount of interface nitrogen atoms exist in the form of a highly constraint SiN 4 phase and the interface oxynitride layer is a random mixture of SiO 4 and SiN 4 phases, which consequently reduces the reliability against high energy electron stressing

The effect of oxidation on physical properties of porous silicon layers for optical applications

Energy Technology Data Exchange (ETDEWEB)

Pirasteh, Parasteh [Laboratoire d' Optronique, CNRS-UMR FOTON 6082, Universite de Rennes 1, ENSSAT Tecnhopole Anticipa, 6 rue de Kerampont, BP 447, 22305 Lannion Cedex (France); Charrier, Joel [Laboratoire d' Optronique, CNRS-UMR FOTON 6082, Universite de Rennes 1, ENSSAT Tecnhopole Anticipa, 6 rue de Kerampont, BP 447, 22305 Lannion Cedex (France)]. E-mail: joel.charrier@univ-rennes1.fr; Soltani, Ali [Institut d' Electronique, de Microemectronique et de Nanotechnologie, CNRS-UMR 8520, Cite Scientifique Avenue Poincare, BP 69, 59652 Villeneuve d' Ascq Cedex (France); Haesaert, Severine [Laboratoire d' Optronique, CNRS-UMR FOTON 6082, Universite de Rennes 1, ENSSAT Tecnhopole Anticipa, 6 rue de Kerampont, BP 447, 22305 Lannion Cedex (France); Haji, Lazhar [Laboratoire d' Optronique, CNRS-UMR FOTON 6082, Universite de Rennes 1, ENSSAT Tecnhopole Anticipa, 6 rue de Kerampont, BP 447, 22305 Lannion Cedex (France); Godon, Christine [Laboratoire de Physique Crystalline, Institut des Materiaux Jean Rouxel, 44322 Nantes Cedex 3 (France); Errien, Nicolas [Laboratoire de Physique Crystalline, Institut des Materiaux Jean Rouxel, 44322 Nantes Cedex 3 (France)

2006-12-15

In order to understand the optical loss mechanisms in porous silicon based waveguides, structural and optical studies have been performed. Scanning and transmission electron microscopic observations of porous silicon layers are obtained before and after an oxidation process at high temperature in wet O{sub 2}. Pore size and shape of heavily p-type doped Si wafers are estimated and correlated to the optical properties of the material before and after oxidation. The refractive index was measured and compared to that determined by the Bruggeman model.

A metallic buried interconnect process for through-wafer interconnection

International Nuclear Information System (INIS)

Ji, Chang-Hyeon; Herrault, Florian; Allen, Mark G

2008-01-01

In this paper, we present the design, fabrication process and experimental results of electroplated metal interconnects buried at the bottom of deep silicon trenches with vertical sidewalls. A manual spray-coating process along with a unique trench-formation process has been developed for the electroplating of a metal interconnection structure at the bottom surface of the deep trenches. The silicon etch process combines the isotropic dry etch process and conventional Bosch process to fabricate a deep trench with angled top-side edges and vertical sidewalls. The resulting trench structure, in contrast to the trenches fabricated by wet anisotropic etching, enables spray-coated photoresist patterning with good sidewall and top-side edge coverage while maintaining the ability to form a high-density array of deep trenches without excessive widening of the trench opening. A photoresist spray-coating process was developed and optimized for the formation of electroplating mold at the bottom of 300 µm deep trenches having vertical sidewalls. A diluted positive tone photoresist with relatively high solid content and multiple coating with baking between coating steps has been experimentally proven to provide high quality sidewall and edge coverage. To validate the buried interconnect approach, a three-dimensional daisy chain structure having a buried interconnect as the bottom connector and traces on the wafer surface as the top conductor has been designed and fabricated

The effects of trichloroethane HCl and ion-implantation on the oxidation rate of silicon

International Nuclear Information System (INIS)

Ahmed, W.; Ahmed, E.

1994-01-01

The thermal oxidation of silicon was studied using a large-scale industrial oxidation system. The characteristics of the oxides resulting from pure hydrogen/oxygen (Hsub(2)/Osub(2)), trichloroethane/oxygen (TCA/Osub(2) and hydrogen chloride/oxygen (HCI/Osub(2)) mixtures are compared. Both HCI and TCA addition to oxygen produced an enhanced oxidation rate. The oxidation rate for TCA/Osub(2) was approximately 30-40% higher than for HCI/Osub(2) mixtures. A molar ratio of TCA/Osub(2) of 1% gives an optimum process for very-large-scale industrial (VLSI) applications. However, 3% HCI/Osub(2) gives comparable results to 1% TCA. In addition, boron and phosphorus implantation are observed to increase the oxidation rate. Phosphorus doping of the silicon yields a higher rate than boron-doped wafers. This behaviour is explained in terms of surface damage and chemistry. It appears that the overall mechanisms governing all these processes are similar. (8 figures, 22 references) (Author)

An Ultra-Efficient Nonlinear Platform: AlGaAs-On-Insulator

DEFF Research Database (Denmark)

Pu, Minhao; Ottaviano, Luisa; Semenova, Elizaveta

The combination of nonlinear and integrated photonics enables applications including optical signal processing, multi-wavelength lasers, metrology, spectroscopy, and quantum information science. Silicon-on-insulator (SOI) has emerged as a promising platform [1, 2] due to its high material...... nonlinearity and its compatibility with the CMOS industry. However, silicon suffers two-photon absorption (TPA) in the telecommunication wavelength band around 1.55 µm, which hampers its applications. Different platforms have been proposed to avoid TPA in the telecom wavelength range such as Si3N4 and Hydex [3...... a nonlinear index (n2) on the order of 10−17 W/m2 and a high refractive index (n ≈3.3), a large transparency window (from near- to mid-infrared), and the ability to engineer the material bandgap to mitigate TPA [5]. In this presentation, we introduce AlGaAson-insulator (AlGaAsOI) platform which combines both...

Electrochemical deposition of buried contacts in high-efficiency crystalline silicon photovoltaic cells

DEFF Research Database (Denmark)

Jensen, Jens Arne Dahl; Møller, Per; Bruton, Tim

2003-01-01

This article reports on a newly developed method for electrochemical deposition of buried Cu contacts in Si-based photovoltaic ~PV! cells. Contact grooves, 20 mm wide by 40 mm deep, were laser-cut into Si PV cells, hereafter applied with a thin electroless NiP base and subsequently filled with Cu...... by electrochemical deposition at a rate of up to 10 mm per min. With the newly developed process, void-free, superconformal Cu-filling of the laser-cut grooves was observed by scanning electron microscopy and focused ion beam techniques. The Cu microstructure in grooves showed both bottom and sidewall texture......, with a grain-size decreasing from the center to the edges of the buried Cu contacts and a pronounced lateral growth outside the laser-cut grooves. The measured specific contact resistances of the buried contacts was better than the production standard. Overall performance of the new PV cells was equal...

Porous silicon formation by hole injection from a back side p+/n junction for electrical insulation applications

International Nuclear Information System (INIS)

Fèvre, A; Menard, S; Defforge, T; Gautier, G

2016-01-01

In this paper, we propose to study the formation of porous silicon (PS) in low doped (1 × 10 14 cm −3 ) n-type silicon through hole injection from a back side p + /n junction in the dark. This technique is investigated within the framework of electrical insulation. Three different types of junctions are investigated. The first one is an epitaxial n-type layer grown on p + doped silicon wafer. The two other junctions are carried out by boron diffusion leading to p + regions with junction depths of 20 and 115 μm. The resulting PS morphology is a double layer with a nucleation layer (NL) and macropores fully filled with mesoporous material. This result is unusual for low doped n-type silicon. Morphology variations are described depending on the junction formation process, the electrolyte composition, the anodization current density and duration. In order to validate the more interesting industrial potentialities of the p + /n injection technique, a comparison is achieved with back side illumination in terms of resulting morphology and experiments confirm comparable results. Electrical characterizations of the double layer, including NL and fully filled macropores, are then performed. To our knowledge, this is the first electrical investigation in low doped n type silicon with this morphology. Compared to the bulk silicon, the measured electrical resistivities are 6–7 orders of magnitude higher at 373 K. (paper)

22.5% efficient silicon heterojunction solar cell with molybdenum oxide hole collector

Energy Technology Data Exchange (ETDEWEB)

Geissbühler, Jonas, E-mail: jonas.geissbuehler@epfl.ch; Werner, Jérémie; Martin de Nicolas, Silvia; Hessler-Wyser, Aïcha; Tomasi, Andrea; Niesen, Bjoern; De Wolf, Stefaan [Photovoltaics and Thin Film Electronics Laboratory, Institute of Microengineering (IMT), École Polytechnique Fédérale de Lausanne (EPFL), Rue de la Maladière 71b, CH-2000 Neuchâtel (Switzerland); Barraud, Loris; Despeisse, Matthieu; Nicolay, Sylvain [CSEM PV-Center, Jaquet-Droz 1, CH-2000 Neuchâtel (Switzerland); Ballif, Christophe [Photovoltaics and Thin Film Electronics Laboratory, Institute of Microengineering (IMT), École Polytechnique Fédérale de Lausanne (EPFL), Rue de la Maladière 71b, CH-2000 Neuchâtel (Switzerland); CSEM PV-Center, Jaquet-Droz 1, CH-2000 Neuchâtel (Switzerland)

2015-08-24

Substituting the doped amorphous silicon films at the front of silicon heterojunction solar cells with wide-bandgap transition metal oxides can mitigate parasitic light absorption losses. This was recently proven by replacing p-type amorphous silicon with molybdenum oxide films. In this article, we evidence that annealing above 130 °C—often needed for the curing of printed metal contacts—detrimentally impacts hole collection of such devices. We circumvent this issue by using electrodeposited copper front metallization and demonstrate a silicon heterojunction solar cell with molybdenum oxide hole collector, featuring a fill factor value higher than 80% and certified energy conversion efficiency of 22.5%.

Studies of phase formation in CoSi2 buried layers fabricated using ion implantation

International Nuclear Information System (INIS)

Galaev, A.A.; Parkhomenko, Yu.N.; Podgornyi, D.A.; Shcherbachev, K.D.

1998-01-01

The processes of the formation of cobalt disilicide buried layers in silicon are studied under different conditions of implantation with Co. In particular, the effects of the implantation dose and the postimplantation annealing temperature on the state of the Co-implanted layer are considered. Two types of heteroepitaxial Si/CoSi 2 /Si structures are obtained with the conducting layers of thicknesses 70 and 90 nm buried at the depths 80 and 10 nm, respectively

Analysis of switching characteristics for negative capacitance ultra-thin-body germanium-on-insulator MOSFETs

Science.gov (United States)

Pi-Ho Hu, Vita; Chiu, Pin-Chieh

2018-04-01

The impact of device parameters on the switching characteristics of negative capacitance ultra-thin-body (UTB) germanium-on-insulator (NC-GeOI) MOSFETs is analyzed. NC-GeOI MOSFETs with smaller gate length (L g), EOT, and buried oxide thickness (T box) and thicker ferroelectric layer thickness (T FE) exhibit larger subthreshold swing improvements over GeOI MOSFETs due to better capacitance matching. Compared with GeOI MOSFETs, NC-GeOI MOSFETs exhibit better switching time due to improvements in effective drive current (I eff) and subthreshold swing. NC-GeOI MOSFET exhibits larger ST improvements at V dd = 0.3 V (-82.9%) than at V dd = 0.86 V (-9.7%), because NC-GeOI MOSFET shows 18.2 times higher I eff than the GeOI MOSFET at V dd = 0.3 V, while 2.5 times higher I eff at V dd = 0.86 V. This work provides the device design guideline of NC-GeOI MOSFETs for ultra-low power applications.

BUSFET -- A radiation-hardened SOI transistor

International Nuclear Information System (INIS)

Schwank, J.R.; Shaneyfelt, M.R.; Draper, B.L.; Dodd, P.E.

1999-01-01

The total-dose hardness of SOI technology is limited by radiation-induced charge trapping in gate, field, and SOI buried oxides. Charge trapping in the buried oxide can lead to back-channel leakage and makes hardening SOI transistors more challenging than hardening bulk-silicon transistors. Two avenues for hardening the back-channel are (1) to use specially prepared SOI buried oxides that reduce the net amount of trapped positive charge or (2) to design transistors that are less sensitive to the effects of trapped charge in the buried oxide. In this work, the authors propose a partially-depleted SOI transistor structure for mitigating the effects of trapped charge in the buried oxide on radiation hardness. They call this structure the BUSFET--Body Under Source FET. The BUSFET utilizes a shallow source and a deep drain. As a result, the silicon depletion region at the back channel caused by radiation-induced charge trapping in the buried oxide does not form a conducting path between source and drain. Thus, the BUSFET structure design can significantly reduce radiation-induced back-channel leakage without using specially prepared buried oxides. Total dose hardness is achieved without degrading the intrinsic SEU or dose rate hardness of SOI technology. The effectiveness of the BUSFET structure for reducing total-dose back-channel leakage depends on several variables, including the top silicon film thickness and doping concentration, and the depth of the source. 3-D simulations show that for a body doping concentration of 10 18 cm -3 , a drain bias of 3 V, and a source depth of 90 nm, a silicon film thickness of 180 nm is sufficient to almost completely eliminate radiation-induced back-channel leakage. However, for a doping concentration of 3 x 10 17 cm -3 , a thicker silicon film (300 nm) must be used

Defects and defect generation in oxide layer of ion implanted silicon-silicon dioxide structures

CERN Document Server

Baraban, A P

2002-01-01

One studies mechanism of generation of defects in Si-SiO sub 2 structure oxide layer as a result of implantation of argon ions with 130 keV energy and 10 sup 1 sup 3 - 3.2 x 10 sup 1 sup 7 cm sup - sup 2 doses. Si-SiO sub 2 structures are produced by thermal oxidation of silicon under 950 deg C temperature. Investigations were based on electroluminescence technique and on measuring of high-frequency volt-farad characteristics. Increase of implantation dose was determined to result in spreading of luminosity centres and in its maximum shifting closer to boundary with silicon. Ion implantation was shown, as well, to result in increase of density of surface states at Si-SiO sub 2 interface. One proposed model of defect generation resulting from Ar ion implantation into Si-SiO sub 2

A novel nanoscale SOI MOSFET by embedding undoped region for improving self-heating effect

Science.gov (United States)

Ghaffari, Majid; Orouji, Ali A.

2018-06-01

Because of the low thermal conductivity of the SiO2 (oxide), the Buried Oxide (BOX) layer in a Silicon-On-Insulator Metal-Oxide Semiconductor Field-Effect Transistor (SOI MOSFET) prevents heat dissipation in the silicon layer and causes increase in the device lattice temperature. In this paper, a new technique is proposed for reducing Self-Heating Effects (SHEs). The key idea in the proposed structure is using a Silicon undoped Region (SR) in the nanoscale SOI MOSFET under the drain and channel regions in order to decrease the SHE. The novel transistor is named Silicon undoped Region SOI-MOSFET (SR-SOI). Due to the embedded silicon undoped region in the suitable place, the proposed structure has decreased the device lattice temperature. The location and dimensions of the proposed region have been carefully optimized to achieve the best results. This work has explored enhancement such as decreased maximum lattice temperature, increased electron mobility, increased drain current, lower DC drain conductance and higher DC transconductance and also decreased bandgap energy variations. Also, for modeling of the structure in the SPICE tools, the main characterizations have been extracted such as thermal resistance (RTH), thermal capacitance (CTH), and SHE characteristic frequency (fTH). All parameters are extracted in relation with the AC operation indicate excellent performance of the SR-SOI device. The results show that proposed region is a suitable alternative to oxide as a part of the buried oxide layer in SOI structures and has better performance in high temperature. Using two-dimensional (2-D) and two-carrier device simulation is done comparison of the SR-SOI structure with a Conventional SOI (C-SOI). As a result, the SR-SOI device can be regarded as a useful substitution for the C-SOI device in nanoscale integrated circuits as a reliable device.

Sponge-like reduced graphene oxide/silicon/carbon nanotube composites for lithium ion batteries

Science.gov (United States)

Fang, Menglu; Wang, Zhao; Chen, Xiaojun; Guan, Shiyou

2018-04-01

Three-dimensional sponge-like reduced graphene oxide/silicon/carbon nanotube composites were synthesized by one-step hydrothermal self-assembly using silicon nanoparticles, graphene oxide and amino modified carbon nanotubes to develop high-performance anode materials of lithium ion batteries. Scanning electron microscopy and transmission electron microscopy images show the structure of composites that Silicon nanoparticles are coated with reduced graphene oxide while amino modified carbon nanotubes wrap around the reduced graphene oxide in the composites. When applied to lithium ion battery, these composites exhibit high initial specific capacity of 2552 mA h/g at a current density of 0.05 A/g. In addition, reduced graphene oxide/silicon/carbon nanotube composites also have better cycle stability than bare Silicon nanoparticles electrode with the specific capacity of 1215 mA h/g after 100 cycles. The three-dimension sponge-like structure not only ensures the electrical conductivity but also buffers the huge volume change, which has broad potential application in the field of battery.

Fiber-chip edge coupler with large mode size for silicon photonic wire waveguides.

Science.gov (United States)

Papes, Martin; Cheben, Pavel; Benedikovic, Daniel; Schmid, Jens H; Pond, James; Halir, Robert; Ortega-Moñux, Alejandro; Wangüemert-Pérez, Gonzalo; Ye, Winnie N; Xu, Dan-Xia; Janz, Siegfried; Dado, Milan; Vašinek, Vladimír

2016-03-07

Fiber-chip edge couplers are extensively used in integrated optics for coupling of light between planar waveguide circuits and optical fibers. In this work, we report on a new fiber-chip edge coupler concept with large mode size for silicon photonic wire waveguides. The coupler allows direct coupling with conventional cleaved optical fibers with large mode size while circumventing the need for lensed fibers. The coupler is designed for 220 nm silicon-on-insulator (SOI) platform. It exhibits an overall coupling efficiency exceeding 90%, as independently confirmed by 3D Finite-Difference Time-Domain (FDTD) and fully vectorial 3D Eigenmode Expansion (EME) calculations. We present two specific coupler designs, namely for a high numerical aperture single mode optical fiber with 6 µm mode field diameter (MFD) and a standard SMF-28 fiber with 10.4 µm MFD. An important advantage of our coupler concept is the ability to expand the mode at the chip edge without leading to high substrate leakage losses through buried oxide (BOX), which in our design is set to 3 µm. This remarkable feature is achieved by implementing in the SiO 2 upper cladding thin high-index Si 3 N 4 layers. The Si 3 N 4 layers increase the effective refractive index of the upper cladding near the facet. The index is controlled along the taper by subwavelength refractive index engineering to facilitate adiabatic mode transformation to the silicon wire waveguide while the Si-wire waveguide is inversely tapered along the coupler. The mode overlap optimization at the chip facet is carried out with a full vectorial mode solver. The mode transformation along the coupler is studied using 3D-FDTD simulations and with fully-vectorial 3D-EME calculations. The couplers are optimized for operating with transverse electric (TE) polarization and the operating wavelength is centered at 1.55 µm.

Modified MIS-structure based on nanoporous silicon with enhanced sensitivity to the hydrogen containing gases

Energy Technology Data Exchange (ETDEWEB)

Gorbanyuk, T.; Evtukh, A.; Litovchenko, V.; Solntsev, V. [Institute of Semiconductor Physics, Kiev (Ukraine)

2008-07-01

The gas sensitivity of metal-insulator-semiconductor (MIS)-structures based on nanoporous silicon with active electrodes from palladium/tungsten oxide composite has been studied. It was found that the using of palladium/tungsten oxide composite (instead of thin palladium film) leads to enhanced sensitivity of MIS structures to hydrogen sulphide in air. The mechanism of this phenomenon has been established. The enhanced H{sub 2}S sensitivity is explained in the following way. The microparticles of tungsten trioxide inside palladium matrix stimulate the dissociation of hydrogen sulphide molecules, and hydrogen atoms and/or protons flow down to palladium surface, are absorbed by palladium volume, diffuse to palladium/oxidized nanoporous silicon interface. Hydrogen atoms adsorbed at the interface are polarized and give rise to a dipole layer. As a result, the voltage shift of the capacity-voltage (C-V) curve proportional to the measured gas concentration is observed. The surface microstructure of Pd/WO{sub 3} composite was studied by AFM microscopy. The chemical content of the composite film has been investigated by SIMS. It was found that the composite film on nanoporous silicon surface poses the holes with the size about 0.05 {mu}m, the mean separation between tungsten oxide microparticles is 1-2 {mu}m. It also was found that the using of the additional double layer polymer film (polymer film (phthalocyanine zinc)/semicon-ductor film (cadmium sulphide)) on composite film surface leads to the additional enhancement of the gas sensitivity to hydrogen sulphide. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

Silicon effects on formation of EPO oxide coatings on aluminum alloys

International Nuclear Information System (INIS)

Wang, L.; Nie, X.

2006-01-01

Electrolytic plasma processes (EPP) can be used for cleaning, metal-coating, carburizing, nitriding, and oxidizing. Electrolytic plasma oxidizing (EPO) is an advanced technique to deposit thick and hard ceramic coatings on a number of aluminum alloys. However, the EPO treatment on Al-Si alloys with a high Si content has rarely been reported. In this research, an investigation was conducted to clarify the effects of silicon contents on the EPO coating formation, morphology, and composition. Cast hypereutectic 390 alloys (∼ 17% Si) and hypoeutectic 319 alloys (∼ 7% Si) were chosen as substrates. The coating morphology, composition, and microstructure of the EPO coatings on those substrates were investigated using scanning electron microscopy (SEM) with energy dispersive X-ray (EDX) analysis and X-ray diffraction (XRD). A stylus roughness tester was used for surface roughness measurement. It was found that the EPO process had four stages where each stage was corresponding to various coating surface morphology, composition, and phase structures, characterised by different coating growth mechanisms

Fabrication of double-dot single-electron transistor in silicon nanowire

International Nuclear Information System (INIS)

Jo, Mingyu; Kaizawa, Takuya; Arita, Masashi; Fujiwara, Akira; Ono, Yukinori; Inokawa, Hiroshi; Choi, Jung-Bum; Takahashi, Yasuo

2010-01-01

We propose a simple method for fabricating Si single-electron transistors (SET) with coupled dots by means of a pattern-dependent-oxidation (PADOX) method. The PADOX method is known to convert a small one-dimensional Si wire formed on a silicon-on-insulator (SOI) substrate into a SET automatically. We fabricated a double-dot Si SET when we oxidized specially designed Si nanowires formed on SOI substrates. We analyzed the measured electrical characteristics by fitting the measurement and simulation results and confirmed the double-dot formation and the position of the two dots in the Si wire.

Involvement of nitric oxide in anticompulsive-like effect of agmatine on marble-burying behaviour in mice.

Science.gov (United States)

Gawali, Nitin B; Chowdhury, Amrita A; Kothavade, Pankaj S; Bulani, Vipin D; Nagmoti, Dnyaneshwar M; Juvekar, Archana R

2016-01-05

In view of the reports that nitric oxide modulates the neurotransmitters implicated in obsessive-compulsive disorder (OCD), patients with OCD exhibit higher plasma nitrate levels, and drugs useful in OCD influence nitric oxide. Agmatine is a polyamine and widely distributed in mammalian brain which interacts with nitrergic systems. Hence, the present study was carried out to understand the involvement of nitrergic systems in the anticompulsive-like effect of agmatine. We used marble-burying behaviour (MBB) of mice as the animal model of OCD, and nitric oxide levels in hippocampus (HC) and cortex homogenate were measured. Results revealed that, agmatine (20 and 40mg/kg, i.p) significantly inhibited the MBB. Intraperitoneal administration of nitric oxide enhancers viz. nitric oxide precursor - l-arginine (l-ARG) (400mg/kg and 800mg/kg) increased MBB as well as brain nitrites levels, whereas treatment with N(G)-nitro-l-arginine methyl ester (l-NAME) neuronal nitric oxide synthase inhibitor (30mg/kg and 50mg/kg, i.p.) and 7-nitroindazole (7-NI) (20mg/kg and 40mg/kg) attenuated MBB and nitrites levels in brain. Further, in combination studies, the anticompulsive-like effect of agmatine (20mg/kg, ip) was exacerbated by prior administration of l-ARG (400mg/kg) and conversely l-NAME (15mg/kg) or 7-NI (10.0mg/kg) attenuated OCD-like behaviour with HC and cortex changes in the levels of NO. None of the above treatment had any significant influence on locomotor activity. In conclusion, Agmatine is effective in ameliorating the compulsive-like behaviour in mice which appears to be related to nitric oxide in brain. Copyright © 2015 Elsevier B.V. All rights reserved.

Current redistribution in cables made of insulated, soldered, or oxidized strands

International Nuclear Information System (INIS)

Turck, B.

1979-07-01

Current redistributions are compared in cables made of insulated strands, soldered, or oxidized strands and insulated strands with periodic joints. After discussing the different current redistributions in the cases of a rapidly changing current and a dc current, several particular situations are investigated: what happens if a strand is broken, or if a local normal zone appears that does not affect all the strands equally, the detection of this normal zone, and the influence of short circuits between strands

Nitric oxide levels in the anterior chamber of vitrectomized eyes with silicon oil

Directory of Open Access Journals (Sweden)

Paulo Escarião

2013-10-01

Full Text Available PURPOSE: To investigate the nitric oxide levels in the anterior chamber of eyes who underwent pars plana vitrectomy (PPV with silicone oil. METHODS: Patients who underwent PPV with silicon oil injection, from february 2005 to august 2007, were selected. Nine patients (nine eyes participated in the study (five women and four men. Nitric oxide concentration was quantified after the aspiration of aqueous humor samples during the procedure of silicon oil removal. Data such as: oil emulsification; presence of oil in the anterior chamber; intraocular pressure and time with silicone oil were evaluated. Values of p <0.05 were considered to be statistically significant. RESULTS: A positive correlation between nitric oxide concentration and time with silicon oil in the vitreous cavity (r=0.799 was observed. The nitric oxide concentration was significantly higher (p=0.02 in patients with silicon oil more than 24 months (0.90µmol/ml ± 0.59, n=3 in the vitreous cavity comparing to patients with less than 24 months (0.19µmol/ml ± 0.10, n=6. CONCLUSION: A positive correlation linking silicone oil time in the vitreous cavity with the nitric oxide concentration in the anterior chamber was observed.

Surface texture of single-crystal silicon oxidized under a thin V{sub 2}O{sub 5} layer

Energy Technology Data Exchange (ETDEWEB)

Nikitin, S. E., E-mail: nikitin@mail.ioffe.ru; Verbitskiy, V. N.; Nashchekin, A. V.; Trapeznikova, I. N.; Bobyl, A. V.; Terukova, E. E. [Russian Academy of Sciences, Ioffe Physical–Technical Institute (Russian Federation)

2017-01-15

The process of surface texturing of single-crystal silicon oxidized under a V{sub 2}O{sub 5} layer is studied. Intense silicon oxidation at the Si–V{sub 2}O{sub 5} interface begins at a temperature of 903 K which is 200 K below than upon silicon thermal oxidation in an oxygen atmosphere. A silicon dioxide layer 30–50 nm thick with SiO{sub 2} inclusions in silicon depth up to 400 nm is formed at the V{sub 2}O{sub 5}–Si interface. The diffusion coefficient of atomic oxygen through the silicon-dioxide layer at 903 K is determined (D ≥ 2 × 10{sup –15} cm{sup 2} s{sup –1}). A model of low-temperature silicon oxidation, based on atomic oxygen diffusion from V{sub 2}O{sub 5} through the SiO{sub 2} layer to silicon, and SiO{sub x} precipitate formation in silicon is proposed. After removing the V{sub 2}O{sub 5} and silicon-dioxide layers, texture is formed on the silicon surface, which intensely scatters light in the wavelength range of 300–550 nm and is important in the texturing of the front and rear surfaces of solar cells.

Metal-oxide-semiconductor devices based on epitaxial germanium-carbon layers grown directly on silicon substrates by ultra-high-vacuum chemical vapor deposition

Science.gov (United States)

Kelly, David Quest

After the integrated circuit was invented in 1959, complementary metal-oxide-semiconductor (CMOS) technology soon became the mainstay of the semiconductor industry. Silicon-based CMOS has dominated logic technologies for decades. During this time, chip performance has grown at an exponential rate at the cost of higher power consumption and increased process complexity. The performance gains have been made possible through scaling down circuit dimensions by improvements in lithography capabilities. Since scaling cannot continue forever, researchers have vigorously pursued new ways of improving the performance of metal-oxide-semiconductor field-effect transistors (MOSFETs) without having to shrink gate lengths and reduce the gate insulator thickness. Strained silicon, with its ability to boost transistor current by improving the channel mobility, is one of the methods that has already found its way into production. Although not yet in production, high-kappa dielectrics have also drawn wide interest in industry since they allow for the reduction of the electrical oxide thickness of the gate stack without having to reduce the physical thickness of the dielectric. Further out on the horizon is the incorporation of high-mobility materials such as germanium (Ge), silicon-germanium (Si1-xGe x), and the III-V semiconductors. Among the high-mobility materials, Ge has drawn the most attention because it has been shown to be compatible with high-kappa dielectrics and to produce high drive currents compared to Si. Among the most difficult challenges for integrating Ge on Si is finding a suitable method for reducing the number of crystal defects. The use of strain-relaxed Si1- xGex buffers has proven successful for reducing the threading dislocation density in Ge epitaxial layers, but questions remain as to the viability of this method in terms of cost and process complexity. This dissertation presents research on thin germanium-carbon (Ge 1-yCy layers on Si for the fabrication

The effect of thermal oxidation on the luminescence properties of nanostructured silicon.

Science.gov (United States)

Liu, Lijia; Sham, Tsun-Kong

2012-08-06

Herein is reported a detailed study of the luminescence properties of nanostructured Si using X-ray excited optical luminescence (XEOL) in combination with X-ray absorption near-edge structures (XANES). P-type Si nanowires synthesized via electroless chemical etching from Si wafers of different doping levels and porous Si synthesized using electrochemical method are examined under X-ray excitation across the Si K-, L(3,2) -, and O K-edges. It is found that while as-prepared Si nanostructures are weak light emitters, intense visible luminescence is observed from thermally oxidized Si nanowires and porous Si. The luminescence mechanism of Si upon oxidation is investigated by oxidizing nanostructured Si at different temperatures. Interestingly, the two luminescence bands observed show different response with the variation of absorption coefficient upon Si and O core-electron excitation in elemental silicon and silicon oxide. A correlation between luminescence properties and electronic structures is thus established. The implications of the finding are discussed in terms of the behavior of the oxygen deficient center (OCD) and non-bridging oxygen hole center (NBOHC). Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

International Nuclear Information System (INIS)

Yin, Lan; Harburg, Daniel V.; Rogers, John A.; Bozler, Carl; Omenetto, Fiorenzo

2015-01-01

Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems

Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

Energy Technology Data Exchange (ETDEWEB)

Yin, Lan; Harburg, Daniel V.; Rogers, John A., E-mail: jrogers@illinois.edu [Department of Materials Science and Engineering, Beckman Institute for Advanced Science and Technology, and Frederick Seitz Materials Research Laboratory, University of Illinois at Urbana-Champaign, 104 S Goodwin Ave., Urbana, Illinois 61801 (United States); Bozler, Carl [Lincoln Laboratory, Massachusetts Institute of Technology, 244 Wood Street, Lexington, Massachusetts 02420 (United States); Omenetto, Fiorenzo [Department of Biomedical Engineering, Department of Physics, Tufts University, 4 Colby St., Medford, Massachusetts 02155 (United States)

2015-01-05

Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems.

Reduction of charge trapping and electron tunneling in SIMOX by supplemental implantation of oxygen

International Nuclear Information System (INIS)

Stahlbush, R.E.; Hughes, H.L.; Krull, W.A.

1993-01-01

Silicon-on-insulator, SOI, technologies are being aggressively pursued to produce high density, high speed, radiation tolerant electronics. The dielectric isolation of the buried oxide makes it possible to design integrated circuits that greatly minimize single event upset and eliminate dose-rate induced latchup and upset. The reduction of excess-silicon related defects in SIMOX by the supplemental implantation of oxygen has been examined. The supplemental implant is 6% of the oxygen dose used to form the buried oxide, and is followed by a 1,000 C anneal, in contrast to the >1,300 C anneal used to form the buried oxide layer of SIMOX. The defects examined include shallow electron traps, deep hole traps, and silicon clusters. The radiation-induced shallow electron and deep hole trapping are measured by cryogenic detrapping and isothermal annealing techniques. The low-field (3 to 6 MV/cm) electron tunneling is interpreted as due to a two phase mixture of stoichiometric SiO 2 and Si clusters a few nm in size. Single and triple SIMOS samples have been examined. All of the defects are reduced by the supplemental oxygen processing. Shallow electron trapping is reduced by an order of magnitude. Because of the larger capture cross section for hole trapping, hole trapping is not reduced as much. The low-field electron tunneling due to Si clusters is also significantly reduced. Both uniform and nonuniform electron tunneling have been observed in SIMOX samples without supplement processing. In samples exhibiting only uniform tunneling, electron capture at holes has been observed. The nonuniform tunneling is superimposed upon the uniform tunneling and is characterized by current spiking

In situ nanoscale refinement by highly controllable etching of the (111) silicon crystal plane and its influence on the enhanced electrical property of a silicon nanowire

International Nuclear Information System (INIS)

Gong Yibin; Dai Pengfei; Gao Anran; Li Tie; Zhou Ping; Wang Yuelin

2011-01-01

Nanoscale refinement on a (100) oriented silicon-on-insulator (SOI) wafer was introduced by using tetra-methyl-ammonium hydroxide (TMAH, 25 wt%) anisotropic silicon etchant, with temperature kept at 50 °C to achieve precise etching of the (111) crystal plane. Specifically for a silicon nanowire (SiNW) with oxide sidewall protection, the in situ TMAH process enabled effective size reduction in both lateral (2.3 nm/min) and vertical (1.7 nm/min) dimensions. A sub-50 nm SiNW with a length of microns with uniform triangular cross-section was achieved accordingly, yielding enhanced field effect transistor (FET) characteristics in comparison with its 100 nm-wide pre-refining counterpart, which demonstrated the feasibility of this highly controllable refinement process. Detailed examination revealed that the high surface quality of the (111) plane, as well as the bulk depletion property should be the causes of this electrical enhancement, which implies the great potential of the as-made cost-effective SiNW FET device in many fields. (semiconductor materials)

Thermal insulation layer for the vacuum containers of a thermonuclear device

International Nuclear Information System (INIS)

Nishikawa, Masana; Yamada, Masao; Kameari, Akihisa; Niikura, Setsuo.

1980-01-01

Purpose: To prevent temperature rise of a thermal insulation layer for a vacuum container of a thermonuclear device higher than allowable value when irradiated by neutron by constructing the layer of a cooling unit in thermal insulation material. Constitution: A metal plate attached with cooling pipes is buried in a thermal insulation material forming a thermal insulation layer to form the layer provided between a vacuum container of a thermonuclear device and a shield. (Yoshihara, H.)

Oxide-Free Bonding of III-V-Based Material on Silicon and Nano-Structuration of the Hybrid Waveguide for Advanced Optical Functions

Directory of Open Access Journals (Sweden)

Konstantinos Pantzas

2015-10-01

Full Text Available Oxide-free bonding of III-V-based materials for integrated optics is demonstrated on both planar Silicon (Si surfaces and nanostructured ones, using Silicon on Isolator (SOI or Si substrates. The hybrid interface is characterized electrically and mechanically. A hybrid InP-on-SOI waveguide, including a bi-periodic nano structuration of the silicon guiding layer is demonstrated to provide wavelength selective transmission. Such an oxide-free interface associated with the nanostructured design of the guiding geometry has great potential for both electrical and optical operation of improved hybrid devices.

Generation and confinement of mobile charges in buried oxide of SOI substrates; Generation et confinement de charges mobiles dans les oxydes enterres de substrats SOI

Energy Technology Data Exchange (ETDEWEB)

Gruber, O.; Krawiec, S.; Musseau, O.; Paillet, Ph.; Courtot-Descharles, A. [CEA Bruyeres-le-Chatel, DIF, 91 (France)

1999-07-01

We analyze the mechanisms of generation and confinement of mobile protons resulting from hydrogen annealing of SOI buried oxides. This study of the mechanisms of generation and confinement of mobile protons in the buried oxide of SOI wafers emphasizes the importance of H+ diffusion in the oxide in the formation of a mobile charge. Under specific electric field conditions the irradiation of these devices results in a pinning of this mobile charge at the bottom Si-SiO{sub 2} interface. Ab initio calculations are in progress to investigate the possible precursor defects in the oxide and detail the mechanism for mobile proton generation and confinement. (authors)

Spectroellipsometric detection of silicon substrate damage caused by radiofrequency sputtering of niobium oxide

Science.gov (United States)

Lohner, Tivadar; Serényi, Miklós; Szilágyi, Edit; Zolnai, Zsolt; Czigány, Zsolt; Khánh, Nguyen Quoc; Petrik, Péter; Fried, Miklós

2017-11-01

Substrate surface damage induced by deposition of metal atoms by radiofrequency (rf) sputtering or ion beam sputtering onto single-crystalline silicon (c-Si) surface has been characterized earlier by electrical measurements. The question arises whether it is possible to characterize surface damage using spectroscopic ellipsometry (SE). In our experiments niobium oxide layers were deposited by rf sputtering on c-Si substrates in gas mixture of oxygen and argon. Multiple angle of incidence spectroscopic ellipsometry measurements were performed, a four-layer optical model (surface roughness layer, niobium oxide layer, native silicon oxide layer and ion implantation-amorphized silicon [i-a-Si] layer on a c-Si substrate) was created in order to evaluate the spectra. The evaluations yielded thicknesses of several nm for the i-a-Si layer. Better agreement could be achieved between the measured and the generated spectra by inserting a mixed layer (with components of c-Si and i-a-Si applying the effective medium approximation) between the silicon oxide layer and the c-Si substrate. High depth resolution Rutherford backscattering (RBS) measurements were performed to investigate the interface disorder between the deposited niobium oxide layer and the c-Si substrate. Atomic resolution cross-sectional transmission electron microscopy investigation was applied to visualize the details of the damaged subsurface region of the substrate.

Waveguiding properties of Er-implanted silicon-rich oxides

International Nuclear Information System (INIS)

Elliman, R.G.; Forcales, M.; Wilkinson, A.R.; Smith, N.J.

2007-01-01

The optical properties of erbium-doped silicon-rich silicon-oxide waveguides containing amorphous silicon nanoclusters and/or silicon nanocrystals are reported. Both amorphous nanoclusters and nanocrystals are shown to act as effective sensitizers for Er, with nanocrystals being more effective at low pump powers and nanoclusters being more effective at higher pump powers. All samples are shown to exhibit photo-induced absorption, as measured for a guided 1.5 μm probe beam while the waveguide was illuminated from above with a 477 nm pump beam. At a given pump power samples containing silicon nanocrystals exhibited greater attenuation than samples containing amorphous nanoclusters. The absorption is shown to be consistent with confined-carrier absorption due to photoexcited carriers in the nanocrystals and/or nanoclusters

Density of oxidation-induced stacking faults in damaged silicon

NARCIS (Netherlands)

Kuper, F.G.; Hosson, J.Th.M. De; Verwey, J.F.

1986-01-01

A model for the relation between density and length of oxidation-induced stacking faults on damaged silicon surfaces is proposed, based on interactions of stacking faults with dislocations and neighboring stacking faults. The model agrees with experiments.

Fabrication of amorphous silicon nanoribbons by atomic force microscope tip-induced local oxidation for thin film device applications

International Nuclear Information System (INIS)

Pichon, L; Rogel, R; Demami, F

2010-01-01

We demonstrate the feasibility of induced local oxidation of amorphous silicon by atomic force microscopy. The resulting local oxide is used as a mask for the elaboration of a thin film silicon resistor. A thin amorphous silicon layer deposited on a glass substrate is locally oxidized following narrow continuous lines. The corresponding oxide line is then used as a mask during plasma etching of the amorphous layer leading to the formation of a nanoribbon. Such an amorphous silicon nanoribbon is used for the fabrication of the resistor

Iron oxide shell coating on nano silicon prepared from the sand for lithium-ion battery application

Science.gov (United States)

Furquan, Mohammad; Vijayalakshmi, S.; Mitra, Sagar

2018-05-01

Elemental silicon, due to its high specific capacity (4200 mAh g-1) and non-toxicity is expected to be an attractive anode material for Li-ion battery. But its huge expansion volume (> 300 %) during charging of battery, leads to pulverization and cracking in the silicon particles and causes sudden failure of the Li-ion battery. In this work, we have designed yolk-shell type morphology of silicon, prepared from carbon coated silicon nanoparticles soaked in aqueous solution of ferric nitrate and potassium hydroxide. The soaked silicon particles were dried and finally calcined at 800 °C for 30 minutes. The product obtained is deprived of carbon and has a kind of yolk-shell morphology of nano silicon with iron oxide coating (Si@Iron oxide). This material has been tested for half-cell lithium-ion battery configuration. The discharge capacity is found to be ≈ 600 mAh g-1 at a current rate of 1.0 A g-1 for 200 cycles. It has shown a stable performance as anode for Li-ion battery application.

Influence of silicon species on the transformation of green rust I(Cl-) in aqueous solution by oxidation

International Nuclear Information System (INIS)

Sahoo, Gadadhar; Fujieda, Shun; Shinoda, Kozo; Yamaguchi, Shinichi; Korosaki, Masao; Suzuki, Shigeru

2011-01-01

Highlights: → Addition of silicate species and silica to GRI(Cl - ) increased oxidation time. → The lepidocrocite particle size in silicate added case has been reduced significantly. → The influence of silicate was attributed to its adsorption on lepidocrocite. → Silicate also influenced GRI(Cl - ) transformation due to adsorption on it. - Abstract: X-ray diffraction (XRD) and solution analysis were used for characterizing the influence of different silicon species on oxidation of green rust (GRI(Cl - )) suspension. While addition of silicon to metallic iron enhanced the formation of β-FeOOH, GRI(Cl - ) in aqueous solution oxidized into lepidocrocite and oxidation was delayed in presence of silica and silicate species as noticed from potential, pH, and dissolved oxygen (DO) measurements. Transmission electron micrographs showed that the particle size of lepidocrocite was reduced due to silicate addition. The influence of silicate was attributed to its adsorption on GRI(Cl - ) and lepidocrocite particles as confirmed from ICP-AES analysis of supernatant solution.

Nanopatterning of Crystalline Silicon Using Anodized Aluminum Oxide Templates for Photovoltaics

Science.gov (United States)

Chao, Tsu-An

A novel thin film anodized aluminum oxide templating process was developed and applied to make nanopatterns on crystalline silicon to enhance the optical properties of silicon. The thin film anodized aluminum oxide was created to improve the conventional thick aluminum templating method with the aim for potential large scale fabrication. A unique two-step anodizing method was introduced to create high quality nanopatterns and it was demonstrated that this process is superior over the original one-step approach. Optical characterization of the nanopatterned silicon showed up to 10% reduction in reflection in the short wavelength range. Scanning electron microscopy was also used to analyze the nanopatterned surface structure and it was found that interpore spacing and pore density can be tuned by changing the anodizing potential.

Technology Development on P-type Silicon Strip Detectors for Proton Beam Dosimetry

International Nuclear Information System (INIS)

Aouadi, K.; Bouterfa, M.; Delamare, R.; Flandre, D.; Bertrand, D.; Henry, F.

2013-06-01

In this paper, we present a technology for the fabrication of n-in-p silicon strip detectors, which is based on the use of Al 2 O 3 oxide compared to p-spray insulation scheme. This technology has been developed using the best technological parameters deduced from simulations, particularly for the p-spray implantation parameters. Different wafers were processed towards the fabrication of the radiation detectors with p-spray insulation and Al 2 O 3 . The evaluation of the prototype detectors has been carried out by performing the electrical characterization of the devices through the measurement of current-voltage and capacitance-voltage characteristics, as well as the measurement of detection response under radiation. The results of electrical measurements indicate that detectors fabricated with Al 2 O 3 exhibit a dark current several times lower than p-spray detectors and show an excellent electrical insulation between strips with a higher inter-strip resistance. Response of Al 2 O 3 strip detector under radiation has been found better. The resulting improved output signal dynamic range finally makes the use of Al 2 O 3 more attractive. (authors)

Improved reaction sintered silicon nitride. [protective coatings to improve oxidation resistance

Science.gov (United States)

Baumgartner, H. R.

1978-01-01

Processing treatments were applied to as-nitrided reaction sintered silicon nitride (RSSN) with the purposes of improving strength after processing to above 350 MN/m2 and improving strength after oxidation exposure. The experimental approaches are divided into three broad classifications: sintering of surface-applied powders; impregnation of solution followed by further thermal processing; and infiltration of molten silicon and subsequent carburization or nitridation of the silicon. The impregnation of RSSN with solutions of aluminum nitrate and zirconyl chloride, followed by heating at 1400-1500 C in a nitrogen atmosphere containing silicon monoxide, improved RSSN strength and oxidation resistance. The room temperature bend strength of RSSN was increased nearly fifty percent above the untreated strength with mean absolute strengths up to 420 MN/m2. Strengths of treated samples that were measured after a 12 hour oxidation exposure in air were up to 90 percent of the original as-nitrided strength, as compared to retained strengths in the range of 35 to 60 percent for untreated RSSN after the same oxidation exposure.

Fluorinated alkyne-derived monolayers on oxide-free silicon nanowires via one-step hydrosilylation

International Nuclear Information System (INIS)

Nguyen Minh, Quyen; Pujari, Sidharam P.; Wang, Bin; Wang, Zhanhua; Haick, Hossam; Zuilhof, Han; Rijn, Cees J.M. van

2016-01-01

Highlights: • Oxide-free H-terminated silicon nanowires undergo efficient surface modification by reaction with fluorinated 1-alkynes (HC≡C−(CH 2 ) 6 C 8 H 17−x F x ; x = 0–17). • These surface-modified Si NWs are chemically stable under range of conditions (including acid, base). • The surface coating yields efficient electrical passivation as demonstrated by a near-zero electrochemical activity of the surface. - Abstract: Passivation of oxide-free silicon nanowires (Si NWs) by the formation of high-quality fluorinated 1-hexadecyne-derived monolayers with varying fluorine content has been investigated. Alkyl chain monolayers (C 16 H 30−x F x ) with a varying number of fluorine substituents (x = 0, 1, 3, 9, 17) were attached onto hydrogen-terminated silicon (Si−H) surfaces with an effective one-step hydrosilylation. This surface chemistry gives well-defined monolayers on nanowires that have a cylindrical core–shell structure, as characterized by X-ray photoelectron spectroscopy (XPS), Fourier transform infrared spectroscopy (FT-IR) and static contact angle (SCA) analysis. The monolayers were stable under acidic and basic conditions, as well as under extreme conditions (such as UV exposure), and provide excellent surface passivation, which opens up applications in the fields of field effect transistors, optoelectronics and especially for disease diagnosis.

Characterization of light element impurities in ultrathin silicon-on-insulator layers by luminescence activation using electron irradiation

International Nuclear Information System (INIS)

Nakagawa-Toyota, Satoko; Tajima, Michio; Hirose, Kazuyuki; Ohshima, Takeshi; Itoh, Hisayoshi

2009-01-01

We analyzed light element impurities in ultrathin top Si layers of silicon-on-insulator (SOI) wafers by luminescence activation using electron irradiation. Photoluminescence (PL) analysis under ultraviolet (UV) light excitation was performed on various commercial SOI wafers after the irradiation. We detected the C-line related to a complex of interstitial carbon and oxygen impurities and the G-line related to a complex of interstitial and substitutional carbon impurities in the top Si layer with a thickness down to 62 nm after electron irradiation. We showed that there were differences in the impurity concentration depending on the wafer fabrication methods and also that there were variations in these concentrations in the respective wafers. Xenon ion implantation was used to activate top Si layers selectively so that we could confirm that the PL signal under the UV light excitation comes not from substrates but from top Si layers. The present method is a very promising tool to evaluate the light element impurities in top Si layers. (author)

Label-free electrical determination of trypsin activity by a silicon-on-insulator based thin film resistor.

Science.gov (United States)

Neff, Petra A; Serr, Andreas; Wunderlich, Bernhard K; Bausch, Andreas R

2007-10-08

A silicon-on-insulator (SOI) based thin film resistor is employed for the label-free determination of enzymatic activity. We demonstrate that enzymes, which cleave biological polyelectrolyte substrates, can be detected by the sensor. As an application, we consider the serine endopeptidase trypsin, which cleaves poly-L-lysine (PLL). We show that PLL adsorbs quasi-irreversibly to the sensor and is digested by trypsin directly at the sensor surface. The created PLL fragments are released into the bulk solution due to kinetic reasons. This results in a measurable change of the surface potential allowing for the determination of trypsin concentrations down to 50 ng mL(-1). Chymotrypsin is a similar endopeptidase with a different specificity, which cleaves PLL with a lower efficiency as compared to trypsin. The activity of trypsin is analyzed quantitatively employing a kinetic model for enzyme-catalyzed surface reactions. Moreover, we have demonstrated the specific inactivation of trypsin by a serine protease inhibitor, which covalently binds to the active site of the enzyme.

Fabrication and characterization of NiO based metal-insulator-metal diode using Langmuir-Blodgett method for high frequency rectification

Science.gov (United States)

Azad, Ibrahim; Ram, Manoj K.; Goswami, D. Yogi; Stefanakos, Elias

2018-04-01

Thin film metal-insulator-metal (MIM) diodes have attracted significant attention for use in infrared energy harvesting and detection applications. As demonstrated over the past decades, MIM or metal-insulator-insulator-metal (MIIM) diodes can operate at the THz frequencies range by quantum tunneling of electrons. The aim of this work is to synthesize required ultra-thin insulating layers and fabricate MIM diodes using the Langmuir-Blodgett (LB) technique. The nickel stearate (NiSt) LB precursor film was deposited on glass, silicon (Si), ITO glass and gold coated silicon substrates. The photodesorption (UV exposure) and the thermodesorption (annealing at 100 °C and 350 °C) methods were used to remove organic components from the NiSt LB film and to achieve a uniform homogenous nickel oxide (NiO) film. These ultrathin NiO films were characterized by EDS, AFM, FTIR and cyclic voltammetry methods, respectively. The MIM diode was fabricated by depositing nickel (Ni) on the NiO film, all on a gold (Au) plated silicon (Si) substrate. The current (I)-voltage (V) characteristics of the fabricated diode were studied to understand the conduction mechanism assumed to be tunneling of electron through the ultra-thin insulating layer. The sensitivity of the diode was measured to be as high as 35 V-1. The diode resistance was ˜100 ohms (at a bias voltage of 0.60 V), and the rectification ratio was about 22 (for a signal voltage of ±200 mV). At the bias point, the diode response demonstrated significant non-linearity and high asymmetry, which are very desirable characteristics for applications in infrared detection and harvesting.

Study of thin insulating films using secondary ion emission

International Nuclear Information System (INIS)

Hilleret, Noel

1973-01-01

Secondary ion emission from insulating films was investigated using a CASTAING-SLODZIAN ion analyzer. Various different aspects of the problem were studied: charge flow across a silica film; the mobilization of sodium during ion bombardment; consequences of the introduction of oxygen on the emission of secondary ions from some solids; determination of the various characteristics of secondary ion emission from silica, silicon nitride and silicon. An example of measurements made using this type of operation is presented: profiles (concentration as a function of depth) of boron introduced by diffusion or implantation in thin films of silica on silicon or silicon nitride. Such measurements have applications in microelectronics. The same method of operation was extended to other types of insulating film, and in particular, to the metallurgical study of passivation films formed on the surface of stainless steels. (author) [fr

Ultrafast all-optical switching and error-free 10 Gbit/s wavelength conversion in hybrid InP-silicon on insulator nanocavities using surface quantum wells

Energy Technology Data Exchange (ETDEWEB)

Bazin, Alexandre; Monnier, Paul; Beaudoin, Grégoire; Sagnes, Isabelle; Raj, Rama [Laboratoire de Photonique et de Nanostructures (CNRS UPR20), Route de Nozay, Marcoussis 91460 (France); Lenglé, Kevin; Gay, Mathilde; Bramerie, Laurent [Université Européenne de Bretagne (UEB), 5 Boulevard Laënnec, 35000 Rennes (France); CNRS-Foton Laboratory (UMR 6082), Enssat, BP 80518, 22305 Lannion Cedex (France); Braive, Rémy; Raineri, Fabrice, E-mail: fabrice.raineri@lpn.cnrs.fr [Laboratoire de Photonique et de Nanostructures (CNRS UPR20), Route de Nozay, Marcoussis 91460 (France); Université Paris Diderot, Sorbonne Paris Cité, 75207 Paris Cedex 13 (France)

2014-01-06

Ultrafast switching with low energies is demonstrated using InP photonic crystal nanocavities embedding InGaAs surface quantum wells heterogeneously integrated to a silicon on insulator waveguide circuitry. Thanks to the engineered enhancement of surface non radiative recombination of carriers, switching time is obtained to be as fast as 10 ps. These hybrid nanostructures are shown to be capable of achieving systems level performance by demonstrating error free wavelength conversion at 10 Gbit/s with 6 mW switching powers.

22.5% efficient silicon heterojunction solar cell with molybdenum oxide hole collector

OpenAIRE

Geissbühler Jonas; Werner Jérémie; Martin de Nicolas Silvia; Barraud Loris; Hessler-Wyser Aïcha; Despeisse Matthieu; Nicolay Sylvain; Tomasi Andrea; Niesen Bjoern; De Wolf Stefaan; Ballif Christophe

2015-01-01

Substituting the doped amorphous silicon films at the front of silicon heterojunction solar cells with wide bandgap transition metal oxides can mitigate parasitic light absorption losses. This was recently proven by replacing p type amorphous silicon with molybdenum oxide films. In this article we evidence that annealing above 130?°C—often needed for the curing of printed metal contacts—detrimentally impacts hole collection of such devices. We circumvent this issue by using electrodeposited c...

Application of hydrogen-plasma technology for property modification of silicon and producing the silicon-based structures

International Nuclear Information System (INIS)

Fedotov, A.K.; Mazanik, A.V.; Ul'yashin, A.G.; Dzhob, R; Farner, V.R.

2000-01-01

Effects of atomic hydrogen on the properties of Czochralski-grown single crystal silicon as well as polycrystalline shaped silicon have been investigated. It was established that the buried defect layers created by high-energy hydrogen or helium ion implantation act as a good getter centers for hydrogen atoms introduced in silicon in the process of hydrogen plasma hydrogenation. Atomic hydrogen was shown to be active as a catalyzer significantly enhancing the rate of thermal donors formation in p-type single crystal silicon. This effect can be used for n-p- and p-n-p-silicon based device structures producing [ru

Room temperature NO2-sensing properties of porous silicon/tungsten oxide nanorods composite

International Nuclear Information System (INIS)

Wei, Yulong; Hu, Ming; Wang, Dengfeng; Zhang, Weiyi; Qin, Yuxiang

2015-01-01

Highlights: • Porous silicon/WO 3 nanorods composite is synthesized via hydrothermal method. • The morphology of WO 3 nanorods depends on the amount of oxalic acid (pH value). • The sensor can detect ppb level NO 2 at room temperature. - Abstract: One-dimensional single crystalline WO 3 nanorods have been successfully synthesized onto the porous silicon substrates by a seed-induced hydrothermal method. The controlled morphology of porous silicon/tungsten oxide nanorods composite was obtained by using oxalic acid as an organic inducer. The reaction was carried out at 180 °C for 2 h. The influence of oxalic acid (pH value) on the morphology of porous silicon/tungsten oxide nanorods composite was investigated by scanning electron microscopy (SEM), X-ray diffraction (XRD) and transmission electron microscopy (TEM). The NO 2 -sensing properties of the sensor based on porous silicon/tungsten oxide nanorods composite were investigated at different temperatures ranging from room temperature (∼25 °C) to 300 °C. At room temperature, the sensor behaved as a typical p-type semiconductor and exhibited high gas response, good repeatability and excellent selectivity characteristics toward NO 2 gas due to its high specific surface area, special structure, and large amounts of oxygen vacancies

Preparation of highly aligned silicon oxide nanowires with stable intensive photoluminescence

International Nuclear Information System (INIS)

Duraia, El-Shazly M.; Mansurov, Z.A.; Tokmolden, S.; Beall, Gary W.

2010-01-01

In this work we report the successful formation of highly aligned vertical silicon oxide nanowires. The source of silicon was from the substrate itself without any additional source of silicon. X-ray measurement demonstrated that our nanowires are amorphous. Photoluminescence measurements were conducted through 18 months and indicated that there is a very good intensive emission peaks near the violet regions. The FTIR measurements indicated the existence of peaks at 463, 604, 795 and a wide peak at 1111 cm -1 and this can be attributed to Si-O-Si and Si-O stretching vibrations. We also report the formation of the octopus-like silicon oxide nanowires and the growth mechanism of these structures was discussed.

Preparation of highly aligned silicon oxide nanowires with stable intensive photoluminescence

Energy Technology Data Exchange (ETDEWEB)

Duraia, El-Shazly M., E-mail: duraia_physics@yahoo.co [Suez Canal University, Faculty of Science, Physics Department, Ismailia (Egypt); Al-Farabi Kazakh National University, Almaty (Kazakhstan); Institute of Physics and Technology, 11 Ibragimov Street, 050032 Almaty (Kazakhstan); Mansurov, Z.A. [Al-Farabi Kazakh National University, Almaty (Kazakhstan); Tokmolden, S. [Institute of Physics and Technology, 11 Ibragimov Street, 050032 Almaty (Kazakhstan); Beall, Gary W. [Texas State University-San Marcos, Department of Chemistry and Biochemistry, 601 University Dr., San Marcos, TX 78666 (United States)

2010-02-15

In this work we report the successful formation of highly aligned vertical silicon oxide nanowires. The source of silicon was from the substrate itself without any additional source of silicon. X-ray measurement demonstrated that our nanowires are amorphous. Photoluminescence measurements were conducted through 18 months and indicated that there is a very good intensive emission peaks near the violet regions. The FTIR measurements indicated the existence of peaks at 463, 604, 795 and a wide peak at 1111 cm{sup -1} and this can be attributed to Si-O-Si and Si-O stretching vibrations. We also report the formation of the octopus-like silicon oxide nanowires and the growth mechanism of these structures was discussed.

Systematic study of metal-insulator-metal diodes with a native oxide

KAUST Repository

Donchev, E.; Gammon, P. M.; Pang, J. S.; Petrov, P. K.; Alford, N. McN.

2014-01-01

© 2014 SPIE. In this paper, a systematic analysis of native oxides within a Metal-Insulator-Metal (MIM) diode is carried out, with the goal of determining their practicality for incorporation into a nanoscale Rectenna (Rectifying Antenna

Electrical properties improvement of multicrystalline silicon solar cells using a combination of porous silicon and vanadium oxide treatment

International Nuclear Information System (INIS)

Derbali, L.; Ezzaouia, H.

2013-01-01

In this paper, we will report the enhancement of the conversion efficiency of multicrystalline silicon solar cells after coating the front surface with a porous silicon layer treated with vanadium oxide. The incorporation of vanadium oxide into the porous silicon (PS) structure, followed by a thermal treatment under oxygen ambient, leads to an important decrease of the surface reflectivity, a significant enhancement of the effective minority carrier lifetime (τ eff ) and a significant enhancement of the photoluminescence (PL) of the PS structure. We Obtained a noticeable increase of (τ eff ) from 3.11 μs to 134.74 μs and the surface recombination velocity (S eff ) have decreased from 8441 cm s −1 to 195 cm s −1 . The reflectivity spectra of obtained films, performed in the 300–1200 nm wavelength range, show an important decrease of the average reflectivity from 40% to 5%. We notice a significant improvement of the internal quantum efficiency (IQE) in the used multicrystalline silicon substrates. Results are analyzed and compared to those carried out on a reference (untreated) sample. The electrical properties of the treated silicon solar cells were improved noticeably as regard to the reference (untreated) sample.

Annealing effects on magnetic properties of silicone-coated iron-based soft magnetic composites

Science.gov (United States)

Wu, Shen; Sun, Aizhi; Zhai, Fuqiang; Wang, Jin; Zhang, Qian; Xu, Wenhuan; Logan, Philip; Volinsky, Alex A.

2012-03-01

This paper focuses on novel iron-based soft magnetic composites synthesis utilizing high thermal stability silicone resin to coat iron powder. The effect of an annealing treatment on the magnetic properties of synthesized magnets was investigated. The coated silicone insulating layer was characterized by scanning electron microscopy and energy dispersive X-ray spectroscopy. Silicone uniformly coated the powder surface, resulting in a reduction of the imaginary part of the permeability, thereby increasing the electrical resistivity and the operating frequency of the synthesized magnets. The annealing treatment increased the initial permeability, the maximum permeability, and the magnetic induction, and decreased the coercivity. Annealing at 580 °C increased the maximum permeability by 72.5%. The result of annealing at 580 °C shows that the ferromagnetic resonance frequency increased from 2 kHz for conventional epoxy resin coated samples to 80 kHz for the silicone resin insulated composites.

Development of Doped Microcrystalline Silicon Oxide and its Application to Thin‑Film Silicon Solar Cells

NARCIS (Netherlands)

Lambertz, A.

2015-01-01

The aim of the present study is the development of doped microcrystalline silicon oxide (µc‑SiOx:H) alloys and its application in thin‑film silicon solar cells. The doped µc‑SiOx:H material was prepared from carbon dioxide (CO2), silane (SiH4), hydrogen (H2) gas mixtures using plasma enhanced

A 680 V LDMOS on a thin SOI with an improved field oxide structure and dual field plate

International Nuclear Information System (INIS)

Wang Zhongjian; Cheng Xinhong; Xia Chao; Xu Dawei; Cao Duo; Song Zhaorui; Yu Yuehui; Shen Dashen

2012-01-01

A 680 V LDMOS on a thin SOI with an improved field oxide (FOX) and dual field plate was studied experimentally. The FOX structure was formed by an 'oxidation-etch-oxidation' process, which took much less time to form, and had a low protrusion profile. A polysilicon field plate extended to the FOX and a long metal field plate was used to improve the specific on-resistance. An optimized drift region implant for linear-gradient doping was adopted to achieve a uniform lateral electric field. Using a SimBond SOI wafer with a 1.5 μm top silicon and a 3 μm buried oxide layer, CMOS compatible SOI LDMOS processes are designed and implemented successfully. The off-state breakdown voltage reached 680 V, and the specific on-resistance was 8.2 Ω·mm 2 . (semiconductor devices)

Indium oxide/n-silicon heterojunction solar cells

Science.gov (United States)

Feng, Tom; Ghosh, Amal K.

1982-12-28

A high photo-conversion efficiency indium oxide/n-silicon heterojunction solar cell is spray deposited from a solution containing indium trichloride. The solar cell exhibits an Air Mass One solar conversion efficiency in excess of about 10%.

Transparent conductive oxides for thin-film silicon solar cells

NARCIS (Netherlands)

Löffler, J.

2005-01-01

This thesis describes research on thin-film silicon solar cells with focus on the transparent conductive oxide (TCO) for such devices. In addition to the formation of a transparent and electrically conductive front electrode for the solar cell allowing photocurrent collection with low ohmic losses,

Characterization of a vertically movable gate field effect transistor using a silicon-on-insulator wafer

Science.gov (United States)

Song, In-Hyouk; Forfang, William B. D.; Cole, Bryan; You, Byoung Hee

2014-10-01

The vertically movable gate field effect transistor (VMGFET) is a FET-based sensing element, whose gate moves in a vertical direction over the channel. A VMGFET gate covers the region between source and drain. A 1 μm thick air layer separates the gate and the substrate of the VMGFET. A novel fabrication process to form a VMGFET using a silicon-on-insulator (SOI) wafer provides minimal internal stress of the gate structure. The enhancement-type n-channel VMGFET is fabricated with the threshold voltage of 2.32 V in steady state. A non-inverting amplifier is designed and integrated on a printable circuit board (PCB) to characterize device sensitivity and mechanical properties. The VMGFET is mechanically coupled to a speaker membrane to apply mechanical vibration. The oscillated drain current of FET are monitored and sampled with NI LabVIEW. The frequency of the output signal correlates with that of the input stimulus. The resonance frequency of the fabricated VMGFET is measured to be 1.11 kHz. The device sensitivity linearly increases by 0.106 mV/g Hz in the range of 150 Hz and 1 kHz.

Characterization of a vertically movable gate field effect transistor using a silicon-on-insulator wafer

International Nuclear Information System (INIS)

Song, In-Hyouk; Forfang, William B D; Cole, Bryan; Hee You, Byoung

2014-01-01

The vertically movable gate field effect transistor (VMGFET) is a FET-based sensing element, whose gate moves in a vertical direction over the channel. A VMGFET gate covers the region between source and drain. A 1 μm thick air layer separates the gate and the substrate of the VMGFET. A novel fabrication process to form a VMGFET using a silicon-on-insulator (SOI) wafer provides minimal internal stress of the gate structure. The enhancement-type n-channel VMGFET is fabricated with the threshold voltage of 2.32 V in steady state. A non-inverting amplifier is designed and integrated on a printable circuit board (PCB) to characterize device sensitivity and mechanical properties. The VMGFET is mechanically coupled to a speaker membrane to apply mechanical vibration. The oscillated drain current of FET are monitored and sampled with NI LabVIEW. The frequency of the output signal correlates with that of the input stimulus. The resonance frequency of the fabricated VMGFET is measured to be 1.11 kHz. The device sensitivity linearly increases by 0.106 mV/g Hz in the range of 150 Hz and 1 kHz. (paper)

Ion beam studied of silicon oxynitride and silicon nitroxide thin layers

International Nuclear Information System (INIS)

Oude Elferink, J.B.

1989-01-01

In this the processes occurring during high temperature treatments of silicon oxynitride and silicon oxide layers are described. Oxynitride layers with various atomic oxygen to nitrogen concentration ration (O/N) are considered. The high energy ion beam techniques Rutherford backscattering spectroscopy, elastic recoil detection and nuclear reaction analysis have been used to study the layer structures. A detailed discussion of these ion beam techniques is given. Numerical methods used to obtain quantitative data on elemental compositions and depth profiles are described. The electrical compositions and depth profiles are described. The electrical properties of silicon nitride films are known to be influenced by the behaviour of hydrogen in the film during high temperature anneling. Investigations of the behaviour of hydrogen are presented. Oxidation of silicon (oxy)nitride films in O 2 /H 2 0/HCl and nitridation of silicon dioxide films in NH 3 are considered since oxynitrides are applied as an oxidation mask in the LOCOS (Local oxidation of silicon) process. The nitridation of silicon oxide layers in an ammonia ambient is considered. The initial stage and the dependence on the oxide thickness of nitrogen and hydrogen incorporation are discussed. Finally, oxidation of silicon oxynitride layers and of silicon oxide layers are compared. (author). 76 refs.; 48 figs.; 1 tab

Oxidation of mullite-zirconia-alumina-silicon carbide composites

International Nuclear Information System (INIS)

Baudin, C.; Moya, J.S.

1990-01-01

This paper reports the isothermal oxidation of mullite-alumina-zirconia-silicon carbide composites obtained by reaction sintering studied in the temperature interval 800 degrees to 1400 degrees C. The kinetics of the oxidation process was related to the viscosity of the surface glassy layer as well as to the crystallization of the surface film. The oxidation kinetics was halted to T ≤ 1300 degrees C, presumably because of crystallization

Effects of size and defects on the elasticity of silicon nanocantilevers

International Nuclear Information System (INIS)

Sadeghian, Hamed; Goosen, Johannes F L; Van Keulen, Fred; Yang, Chung-Kai; Bossche, Andre; French, Paddy J; Staufer, Urs

2010-01-01

The size-dependent elastic behavior of silicon nanocantilevers and nanowires, specifically the effective Young's modulus, has been determined by experimental measurements and theoretical investigations. The size dependence becomes more significant as the devices scale down from micro- to nano-dimensions, which has mainly been attributed to surface effects. However, discrepancies between experimental measurements and computational investigations show that there could be other influences besides surface effects. In this paper, we try to determine to what extent the surface effects, such as surface stress, surface elasticity, surface contamination and native oxide layers, influence the effective Young's modulus of silicon nanocantilevers. For this purpose, silicon cantilevers were fabricated in the top device layer of silicon on insulator (SOI) wafers, which were thinned down to 14 nm. The effective Young's modulus was extracted with the electrostatic pull-in instability method, recently developed by the authors (H Sadeghian et al 2009 Appl. Phys. Lett. 94 221903). In this work, the drop in the effective Young's modulus was measured to be significant at around 150 nm thick cantilevers. The comparison between theoretical models and experimental measurements demonstrates that, although the surface effects influence the effective Young's modulus of silicon to some extent, they alone are insufficient to explain why the effective Young's modulus decreases prematurely. It was observed that the fabrication-induced defects abruptly increased when the device layer was thinned to below 100 nm. These defects became visible as pinholes during HF-etching. It is speculated that they could be the origin of the reduced effective Young's modulus experimentally observed in ultra-thin silicon cantilevers.

Influence of oxidation treatment on ballistic electron surface-emitting display of porous silicon

International Nuclear Information System (INIS)

Du, Wentao; Zhang, Xiaoning; Zhang, Yujuan; Wang, Wenjiang; Duan, Xiaotao

2012-01-01

Two groups of porous silicon (PS) samples are treated by rapid thermal oxidation (RTO) and electrochemical oxidation (ECO), respectively. Scanning electron microscopy images show that PS samples are segmented into two layers. Oxidized film layer is formed on the top surface of PS samples treated by RTO while at the bottom of PS samples treated by ECO. Both ECO and RTO treatment can make emission current density, diode current density, and emission efficiency of PS increase with the bias voltage increasing. The emission current density and the field emission enhancement factor β of PS sample treated by RTO are larger than that treated by ECO. The Fowler–Nordheim curves of RTO and ECO samples are linear which indicates that high electric field exists on the oxidized layer and field emission occurs whether PS is treated by RTO or ECO.

An integrated optic ethanol vapor sensor based on a silicon-on-insulator microring resonator coated with a porous ZnO film.

Science.gov (United States)

Yebo, Nebiyu A; Lommens, Petra; Hens, Zeger; Baets, Roel

2010-05-24

Optical structures fabricated on silicon-on-insulator technology provide a convenient platform for the implementation of highly compact, versatile and low cost devices. In this work, we demonstrate the promise of this technology for integrated low power and low cost optical gas sensing. A room temperature ethanol vapor sensor is demonstrated using a ZnO nanoparticle film as a coating on an SOI micro-ring resonator of 5 microm in radius. The local coating on the ring resonators is prepared from colloidal suspensions of ZnO nanoparticles of around 3 nm diameter. The porous nature of the coating provides a large surface area for gas adsorption. The ZnO refractive index change upon vapor adsorption shifts the microring resonance through evanescent field interaction. Ethanol vapor concentrations down to 100 ppm are detected with this sensing configuration and a detection limit below 25 ppm is estimated.

BUSFET - A Novel Radiation-Hardened SOI Transistor

International Nuclear Information System (INIS)

Schwank, J.R.; Shaneyfelt, M.R.; Draper, B.L.; Dodd, P.E.

1999-01-01

The total-dose hardness of SOI technology is limited by radiation-induced charge trapping in gate, field, and SOI buried oxides. Charge trapping in the buried oxide can lead to back-channel leakage and makes hardening SOI transistors more challenging than hardening bulk-silicon transistors. Two avenues for hardening the back-channel are (1) to use specially prepared SOI buried oxides that reduce the net amount of trapped positive charge or (2) to design transistors that are less sensitive to the effects of trapped charge in the buried oxide. In this work, we propose a new partially-depleted SOI transistor structure that we call the BUSFET--Body Under Source FET. The BUSFET utilizes a shallow source and a deep drain. As a result, the silicon depletion region at the back channel caused by radiation-induced charge trapping in the buried oxide does not form a conducting path between source and drain. Thus, the BUSFET structure design can significantly reduce radiation-induced back-channel leakage without using specially prepared buried oxides. Total dose hardness is achieved without degrading the intrinsic SEU and dose rate hardness of SOI technology. The effectiveness of the BUSFET structure for reducing total-dose back-channel leakage depends on several variables, including the top silicon film thickness and doping concentration and the depth of the source. 3-D simulations show that for a doping concentration of 10 18 cm -3 and a source depth of 90 nm, a silicon film thickness of 180 nm is sufficient to almost completely eliminate radiation-induced back-channel leakage. However, for a doping concentration of 3x10 17 cm -3 , a thicker silicon film (300 nm) must be used

[Synergetic effects of silicon carbide and molecular sieve loaded catalyst on microwave assisted catalytic oxidation of toluene].

Science.gov (United States)

Wang, Xiao-Hui; Bo, Long-Li; Liu, Hai-Nan; Zhang, Hao; Sun, Jian-Yu; Yang, Li; Cai, Li-Dong

2013-06-01

Molecular sieve loaded catalyst was prepared by impregnation method, microwave-absorbing material silicon carbide and the catalyst were investigated for catalytic oxidation of toluene by microwave irradiation. Research work examined effects of silicon carbide and molecular sieve loading Cu-V catalyst's mixture ratio as well as mixed approach changes on degradation of toluene, and characteristics of catalyst were measured through scanning electron microscope, specific surface area test and X-ray diffraction analysis. The result showed that the fixed bed reactor had advantages of both thermal storage property and low-temperature catalytic oxidation when 20% silicon carbide was filled at the bottom of the reactor, and this could effectively improve the utilization of microwave energy as well as catalytic oxidation efficiency of toluene. Under microwave power of 75 W and 47 W, complete-combustion temperatures of molecular sieve loaded Cu-V catalyst and Cu-V-Ce catalyst to toluene were 325 degrees C and 160 degrees C, respectively. Characteristics of the catalysts showed that mixture of rare-earth element Ce increased the dispersion of active components in the surface of catalyst, micropore structure of catalyst effectively guaranteed high adsorption capacity for toluene, while amorphous phase of Cu and V oxides increased the activity of catalyst greatly.

Formation of III–V-on-insulator structures on Si by direct wafer bonding

International Nuclear Information System (INIS)

Yokoyama, Masafumi; Iida, Ryo; Ikku, Yuki; Kim, Sanghyeon; Takenaka, Mitsuru; Takagi, Shinichi; Takagi, Hideki; Yasuda, Tetsuji; Yamada, Hisashi; Ichikawa, Osamu; Fukuhara, Noboru; Hata, Masahiko

2013-01-01

We have studied the formation of III–V-compound-semiconductors-on-insulator (III–V-OI) structures with thin buried oxide (BOX) layers on Si wafers by using developed direct wafer bonding (DWB). In order to realize III–V-OI MOSFETs with ultrathin body and extremely thin body (ETB) InGaAs-OI channel layers and ultrathin BOX layers, we have developed an electron-cyclotron resonance (ECR) O 2 plasma-assisted DWB process with ECR sputtered SiO 2 BOX layers and a DWB process based on atomic-layer-deposition Al 2 O 3 (ALD-Al 2 O 3 ) BOX layers. It is essential to suppress micro-void generation during wafer bonding process to achieve excellent wafer bonding. We have found that major causes of micro-void generation in DWB processes with ECR-SiO 2 and ALD-Al 2 O 3 BOX layers are desorption of Ar and H 2 O gas, respectively. In order to suppress micro-void generation in the ECR-SiO 2 BOX layers, it is effective to introduce the outgas process before bonding wafers. On the other hand, it is a possible solution for suppressing micro-void generation in the ALD-Al 2 O 3 BOX layers to increase the deposition temperature of the ALD-Al 2 O 3 BOX layers. It is also another possible solution to deposit ALD-Al 2 O 3 BOX layers on thermally oxidized SiO 2 layers, which can absorb the desorption gas from ALD-Al 2 O 3 BOX layers. (invited paper)

Fluorinated alkyne-derived monolayers on oxide-free silicon nanowires via one-step hydrosilylation

Energy Technology Data Exchange (ETDEWEB)

Nguyen Minh, Quyen [Laboratory of Organic Chemistry, Wageningen University, Stippeneng 4, 6708 WE Wageningen (Netherlands); Nanosens, IJsselkade 7, 7201 HB Zutphen (Netherlands); Pujari, Sidharam P. [Laboratory of Organic Chemistry, Wageningen University, Stippeneng 4, 6708 WE Wageningen (Netherlands); Wang, Bin [The Department of Chemical Engineering and Russell Berrie Nanotechnology Institute, Technion – Israel Institute of Technology, Haifa 3200003 (Israel); Wang, Zhanhua [Laboratory of Organic Chemistry, Wageningen University, Stippeneng 4, 6708 WE Wageningen (Netherlands); Haick, Hossam [The Department of Chemical Engineering and Russell Berrie Nanotechnology Institute, Technion – Israel Institute of Technology, Haifa 3200003 (Israel); Zuilhof, Han [Laboratory of Organic Chemistry, Wageningen University, Stippeneng 4, 6708 WE Wageningen (Netherlands); Rijn, Cees J.M. van, E-mail: cees.vanrijn@wur.nl [Laboratory of Organic Chemistry, Wageningen University, Stippeneng 4, 6708 WE Wageningen (Netherlands)

2016-11-30

Highlights: • Oxide-free H-terminated silicon nanowires undergo efficient surface modification by reaction with fluorinated 1-alkynes (HC≡C−(CH{sub 2}){sub 6}C{sub 8}H{sub 17−x}F{sub x}; x = 0–17). • These surface-modified Si NWs are chemically stable under range of conditions (including acid, base). • The surface coating yields efficient electrical passivation as demonstrated by a near-zero electrochemical activity of the surface. - Abstract: Passivation of oxide-free silicon nanowires (Si NWs) by the formation of high-quality fluorinated 1-hexadecyne-derived monolayers with varying fluorine content has been investigated. Alkyl chain monolayers (C{sub 16}H{sub 30−x}F{sub x}) with a varying number of fluorine substituents (x = 0, 1, 3, 9, 17) were attached onto hydrogen-terminated silicon (Si−H) surfaces with an effective one-step hydrosilylation. This surface chemistry gives well-defined monolayers on nanowires that have a cylindrical core–shell structure, as characterized by X-ray photoelectron spectroscopy (XPS), Fourier transform infrared spectroscopy (FT-IR) and static contact angle (SCA) analysis. The monolayers were stable under acidic and basic conditions, as well as under extreme conditions (such as UV exposure), and provide excellent surface passivation, which opens up applications in the fields of field effect transistors, optoelectronics and especially for disease diagnosis.

Selective CVD tungsten on silicon implanted SiO/sub 2/

International Nuclear Information System (INIS)

Hennessy, W.A.; Ghezzo, M.; Wilson, R.H.; Bakhru, H.

1988-01-01

The application range of selective CVD tungsten is extended by its coupling to the ion implantation of insulating materials. This article documents the results of selective CVD tungsten using silicon implanted into SiO/sub 2/ to nucleate the tungsten growth. The role of implant does, energy, and surface preparation in achieving nucleation are described. SEM micrographs are presented to demonstrate the selectivity of this process. Measurements of the tungsten film thickness and sheet resistance are provided for each of the experimental variants corresponding to successful deposition. RBS and XPS analysis are discussed in terms of characterizing the tungsten/oxide interface and to evaluate the role of the silicon implant in the CVD tungsten mechanism. Utilizing this method a desired metallization pattern can be readily defined with lithography and ion implantation, and accurately replicated with a layer of CVD tungsten. This approach avoids problems usually associated with blanket deposition and pattern transfer, which are particularly troublesome for submicron VLSI technology

Microcrystalline silicon oxides for silicon-based solar cells: impact of the O/Si ratio on the electronic structure

Science.gov (United States)

Bär, M.; Starr, D. E.; Lambertz, A.; Holländer, B.; Alsmeier, J.-H.; Weinhardt, L.; Blum, M.; Gorgoi, M.; Yang, W.; Wilks, R. G.; Heske, C.

2014-10-01

Hydrogenated microcrystalline silicon oxide (μc-SiOx:H) layers are one alternative approach to ensure sufficient interlayer charge transport while maintaining high transparency and good passivation in Si-based solar cells. We have used a combination of complementary x-ray and electron spectroscopies to study the chemical and electronic structure of the (μc-SiOx:H) material system. With these techniques, we monitor the transition from a purely Si-based crystalline bonding network to a silicon oxide dominated environment, coinciding with a significant decrease of the material's conductivity. Most Si-based solar cell structures contain emitter/contact/passivation layers. Ideally, these layers fulfill their desired task (i.e., induce a sufficiently high internal electric field, ensure a good electric contact, and passivate the interfaces of the absorber) without absorbing light. Usually this leads to a trade-off in which a higher transparency can only be realized at the expense of the layer's ability to properly fulfill its task. One alternative approach is to use hydrogenated microcrystalline silicon oxide (μc-SiOx:H), a mixture of microcrystalline silicon and amorphous silicon (sub)oxide. The crystalline Si regions allow charge transport, while the oxide matrix maintains a high transparency. To date, it is still unclear how in detail the oxygen content influences the electronic structure of the μc-SiOx:H mixed phase material. To address this question, we have studied the chemical and electronic structure of the μc-SiOx:H (0 0.5, we observe a pronounced decrease of Si 3s - Si 3p hybridization in favor of Si 3p - O 2p hybridization in the upper valence band. This coincides with a significant increase of the material's resistivity, possibly indicating the breakdown of the conducting crystalline Si network. Silicon oxide layers with a thickness of several hundred nanometres were deposited in a PECVD (plasma-enhanced chemical vapor deposition) multi chamber system

Study of an Amorphous Silicon Oxide Buffer Layer for p-Type Microcrystalline Silicon Oxide/n-Type Crystalline Silicon Heterojunction Solar Cells and Their Temperature Dependence

Directory of Open Access Journals (Sweden)

Taweewat Krajangsang

2014-01-01

Full Text Available Intrinsic hydrogenated amorphous silicon oxide (i-a-SiO:H films were used as front and rear buffer layers in crystalline silicon heterojunction (c-Si-HJ solar cells. The surface passivity and effective lifetime of these i-a-SiO:H films on an n-type silicon wafer were improved by increasing the CO2/SiH4 ratios in the films. Using i-a-SiO:H as the front and rear buffer layers in c-Si-HJ solar cells was investigated. The front i-a-SiO:H buffer layer thickness and the CO2/SiH4 ratio influenced the open-circuit voltage (Voc, fill factor (FF, and temperature coefficient (TC of the c-Si-HJ solar cells. The highest total area efficiency obtained was 18.5% (Voc=700 mV, Jsc=33.5 mA/cm2, and FF=0.79. The TC normalized for this c-Si-HJ solar cell efficiency was −0.301%/°C.

Super-oxidation of silicon nanoclusters: magnetism and reactive oxygen species at the surface

Energy Technology Data Exchange (ETDEWEB)

Lepeshkin, Sergey; Baturin, Vladimir; Tikhonov, Evgeny; Matsko, Nikita; Uspenskii, Yurii; Naumova, Anastasia; Feya, Oleg; Schoonen, Martin A.; Oganov, Artem R.

2016-01-01

Oxidation of silicon nanoclusters depending on the temperature and oxygen pressure is explored from first principles using the evolutionary algorithm, and structural and thermodynamic analysis. From our calculations of 90 SinOm clusters we found that under normal conditions oxidation does not stop at the stoichiometric SiO2 composition, as it does in bulk silicon, but goes further placing extra oxygen atoms on the cluster surface. These extra atoms are responsible for light emission, relevant to reactive oxygen species and many of them are magnetic. We argue that the super-oxidation effect is size-independent and discuss its relevance to nanotechnology and miscellaneous applications, including biomedical ones.

On the oxidation mechanism of microcrystalline silicon thin films studied by Fourier transform infrared spectroscopy

NARCIS (Netherlands)

Bronneberg, A. C.; Smets, A. H. M.; Creatore, M.; M. C. M. van de Sanden,

2011-01-01

Insight into the oxidation mechanism of microcrystalline silicon thin films has been obtained by means of Fourier transform infrared spectroscopy. The films were deposited by using the expanding thermal plasma and their oxidation upon air exposure was followed in time. Transmission spectra were

Unified computational model of transport in metal-insulating oxide-metal systems

Science.gov (United States)

Tierney, B. D.; Hjalmarson, H. P.; Jacobs-Gedrim, R. B.; Agarwal, Sapan; James, C. D.; Marinella, M. J.

2018-04-01

A unified physics-based model of electron transport in metal-insulator-metal (MIM) systems is presented. In this model, transport through metal-oxide interfaces occurs by electron tunneling between the metal electrodes and oxide defect states. Transport in the oxide bulk is dominated by hopping, modeled as a series of tunneling events that alter the electron occupancy of defect states. Electron transport in the oxide conduction band is treated by the drift-diffusion formalism and defect chemistry reactions link all the various transport mechanisms. It is shown that the current-limiting effect of the interface band offsets is a function of the defect vacancy concentration. These results provide insight into the underlying physical mechanisms of leakage currents in oxide-based capacitors and steady-state electron transport in resistive random access memory (ReRAM) MIM devices. Finally, an explanation of ReRAM bipolar switching behavior based on these results is proposed.

Development of an oxidized porous silicon vacuum microtriode

Energy Technology Data Exchange (ETDEWEB)

Smith, II, Don Deewayne [Texas A & M Univ., College Station, TX (United States)

1994-05-01

In order to realize a high-power microwave amplifier design known as a gigatron, a gated field emission array must be developed that can deliver a high-intensity electron beam at gigahertz frequencies. No existing field emission device meets the requirements for a gigatron cathode. In the present work, a porous silicon-based approach is evaluated. The use of porous silicon reduces the size of a single emitter to the nanometer scale, and a true two-dimensional array geometry can be approached. A wide number of applications for such a device exist in various disciplines. Oxidized porous silicon vacuum diodes were first developed in 1990. No systematic study had been done to characterize the performance of these devices as a function of the process parameters. The author has done the first such study, fabricating diodes from p<100>, p<111>, and n<100> silicon substrates. Anodization current densities from 11 mA/cm² to 151 mA/cm² were used, and Fowler-Nordheim behavior was observed in over 80% of the samples. In order to effectively adapt this technology to mainstream vacuum microelectronic applications, a means of creating a gated triodic structure must be found. No previous attempts had successfully yielded such a device. The author has succeeded in utilizing a novel metallization method to fabricate the first operational oxidized porous silicon vacuum microtriodes, and results are encouraging.

Biomolecule detection using a silicon nanoribbon: accumulation mode versus inversion mode

International Nuclear Information System (INIS)

Elfstroem, Niklas; Linnros, Jan

2008-01-01

Silicon nanoribbons were fabricated using standard optical lithography from silicon on insulator material with top silicon layer thicknesses of 100, 60 and 45 nm. Electrically these work as Schottky-barrier field-effect transistors and, depending on the substrate voltage, electron or hole injection is possible. The current through the nanoribbon is extremely sensitive to charge changes at the oxidized top surface and can be used for biomolecule detection in a liquid. We show that for detection of streptavidin molecules the response is larger in the accumulation mode than in the inversion mode, although not leading to higher detection sensitivity due to increased noise. The effect is attributed to the location in depth of the conducting channel, which for holes is closer to the screened surface charges of the biomolecules. Furthermore, the response increases for decreasing silicon thickness in both the accumulation mode and the inversion mode. The results are verified qualitatively and quantitatively through a two-dimensional simulation model on a cross section along the nanoribbon device

Multifunctional epitaxial systems on silicon substrates

Energy Technology Data Exchange (ETDEWEB)

Singamaneni, Srinivasa Rao, E-mail: ssingam@ncsu.edu [Department of Materials Science and Engineering, North Carolina State University, Raleigh, North Carolina 27695 (United States); Materials Science Division, Army Research Office, Research Triangle Park, North Carolina 27709 (United States); Department of Physics, The University of Texas at El Paso, El Paso, Texas 79968 (United States); Prater, John Thomas [Department of Materials Science and Engineering, North Carolina State University, Raleigh, North Carolina 27695 (United States); Materials Science Division, Army Research Office, Research Triangle Park, North Carolina 27709 (United States); Narayan, Jagdish [Department of Materials Science and Engineering, North Carolina State University, Raleigh, North Carolina 27695 (United States)

2016-09-15

Multifunctional heterostructures can exhibit a wide range of functional properties, including colossal magneto-resistance, magnetocaloric, and multiferroic behavior, and can display interesting physical phenomena including spin and charge ordering and strong spin-orbit coupling. However, putting this functionality to work remains a challenge. To date, most of the work reported in the literature has dealt with heterostructures deposited onto closely lattice matched insulating substrates such as DyScO{sub 3}, SrTiO{sub 3} (STO), or STO buffered Si(100) using concepts of lattice matching epitaxy (LME). However, strain in heterostructures grown by LME is typically not fully relaxed and the layers contain detrimental defects such as threading dislocations that can significantly degrade the physical properties of the films and adversely affect the device characteristics. In addition, most of the substrates are incompatible with existing CMOS-based technology, where Si (100) substrates dominate. This review discusses recent advances in the integration of multifunctional oxide and non-oxide materials onto silicon substrates. An alternative thin film growth approach, called “domain matching epitaxy,” is presented which identifies approaches for minimizing lattice strain and unwanted defects in large misfit systems (7%–25% and higher). This approach broadly allows for the integration of multifunctional materials onto silicon substrates, such that sensing, computation, and response functions can be combined to produce next generation “smart” devices. In general, pulsed laser deposition has been used to epitaxially grow these materials, although the concepts developed here can be extended to other deposition techniques, as well. It will be shown that TiN and yttria-stabilized zirconia template layers provide promising platforms for the integration of new functionality into silicon-based computer chips. This review paper reports on a number of thin

Effect of annealing and oxide layer thickness on doping profiles shape of ''through-oxide'' implanted P+ ions in textured silicon